Liquid crystal display device and drive method of the same

Abstract

To provide a liquid crystal display device capable of operating while changing polarity inversion drive methods without bringing about degradation in display quality.SOLUTION: A common electrode driver 400 includes an operational amplifier 423, a resistor 422 having one end connected to an inverting input terminal of the operational amplifier 423 and the other end connected to an output terminal 46 of the operational amplifier 423, and a regulation circuit 421 whose internal combined resistance value can be regulated according to an applied polarity inversion drive method. The combined resistance value obtained when a one-column inversion drive method is applied is smaller than the combined resistance value obtained when a two-column inversion drive method is applied.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The following disclosure relates to a liquid crystal display device that operates while switching polarity inversion driving methods and a driving method thereof. [Background technology]

[0002] Conventionally, liquid crystal display devices have been used in various devices such as televisions, notebook computers, and mobile phones. The display section of a liquid crystal display device is provided with a plurality of pixel electrodes to which a video signal corresponding to a target display image is given, and a common electrode for applying a voltage between the plurality of pixel electrodes via liquid crystal. The common electrode is formed on a substrate constituting a liquid crystal panel, and a predetermined voltage is supplied to the common electrode from a circuit provided on a drive substrate. As will be described later, the value of the voltage output to the common electrode from the circuit provided on the drive substrate does not necessarily match the actual voltage value of the common electrode in the liquid crystal panel. Therefore, for convenience, in this specification, the voltage output to the common electrode from the circuit provided on the drive substrate is referred to as the "output common voltage", and the voltage of the common electrode in the liquid crystal panel is referred to as the "intra-panel common voltage". In addition, when there is no distinction between the output common voltage and the intra-panel common voltage, the term "common voltage" is used. In addition, the common voltage (the voltage of the common electrode) is often called "Vcom".

[0003] In recent years, there has been an increasing demand for lower power consumption in liquid crystal display devices. One driving method known as a low-frequency driving method for achieving low power consumption is a driving method called low-frequency driving. With low-frequency driving, the driving frequency (refresh rate) of a liquid crystal display device is reduced to 1 / 2, 1 / 3, or the like, of the standard frequency. Since the driving frequency of a conventional liquid crystal display device is 60 Hz, when low-frequency driving is adopted, the driving frequency is reduced to 30 Hz, 20 Hz, or the like.

[0004] There are also liquid crystal display devices that switch between normal driving and low frequency driving during operation. For example, there are liquid crystal display devices that switch between normal driving with a driving frequency of 60 Hz and low frequency driving with a driving frequency of 30 Hz. Since the driving frequencies are different between normal driving and low frequency driving, the refresh period (period for writing video signals to the liquid crystal capacitance) is also different. Such a difference in refresh period may cause flicker to be visible. This is because the magnitude of the influence of leakage current on the effective voltage during normal driving and low frequency driving differs, causing an imbalance in the effective voltage. Therefore, such liquid crystal display devices are provided with an offset voltage setting circuit that switches the level of the common voltage for each refresh period of different length in order to suppress the occurrence of flicker caused by the imbalance in the effective voltage.

[0005] However, when the output common voltage VcomOUT is generated by a configuration as shown in FIG. 11, which is composed of a voltage follower circuit 900 and an offset voltage setting circuit 910, the intra-panel common voltage fluctuates depending on the display image due to the presence of parasitic capacitance formed between a source bus line (video signal line) and a common electrode. Specifically, even if the output common voltage VcomOUT is a constant voltage for each driving frequency as shown by the thick dotted line with reference number 91 in FIG. 12, the intra-panel common voltage fluctuates depending on the display image as shown by the solid line with reference number 92 in FIG. 12. Due to such fluctuation of the intra-panel common voltage, a display abnormality called crosstalk may occur. In this regard, even if fluctuation of the intra-panel common voltage occurs, if the intra-panel common voltage converges to a target constant voltage by the end of each horizontal scanning period, crosstalk does not occur. On the other hand, if the intra-panel common voltage does not converge to a target constant voltage by the end of each horizontal scanning period, crosstalk occurs. Therefore, crosstalk is likely to occur especially when the liquid crystal charging period (the length of one horizontal scanning period) is short in order to perform high resolution display.

[0006] An example of crosstalk will now be described with reference to Fig. 13. In the display unit shown in Fig. 13, it is assumed that a killer pattern is displayed in region P1, and half-tone images are displayed in regions P2 to P5. In this case, the boundaries between regions P2 and P3, between regions P2 and P4, between regions P3 and P5, and between regions P4 and P5 are visible. In Fig. 13, these boundaries are indicated by thick dotted lines.

[0007] A liquid crystal display device equipped with a circuit called a "Vcom feedback circuit" for suppressing the occurrence of crosstalk as described above is disclosed in, for example, JP 2019-133019 A. As shown in FIG. 14, the Vcom feedback circuit 920 is composed of a resistor 921, a resistor 922, and an operational amplifier 923. From the connection relationship between the resistor 921, the resistor 922, and the operational amplifier 923, it can be understood that the Vcom feedback circuit 920 is composed of an inverting amplifier. With such a configuration, the Vcom feedback circuit 920 outputs a voltage obtained by correcting the adjusted reference voltage (a voltage obtained by adjusting the reference voltage by an offset voltage setting circuit) VREFa based on a voltage (hereinafter simply referred to as "feedback voltage") VcomFB obtained by feeding back the common voltage in the panel through a dedicated wiring as the output common voltage VcomOUT. In such a Vcom feedback circuit 920, the ratio between the resistance value of resistor 921 and the resistance value of resistor 922 is adjusted so that the intra-panel common voltage converges to a target constant voltage by the end of each horizontal scanning period. In a liquid crystal display device equipped with the Vcom feedback circuit 920, when a configuration is adopted in which switching is performed between normal driving with a driving frequency of 60 Hz and low-frequency driving with a driving frequency of 30 Hz is performed, when the waveform of the output common voltage VcomOUT is a waveform shown by a thick dotted line with reference numeral 93 in FIG. 15, the intra-panel common voltage fluctuates, for example, as shown by a solid line with reference numeral 94 in FIG. 15. It can be seen from FIG. 15 that the intra-panel common voltage converges to a target constant voltage by the end of each horizontal scanning period. That is, even if the intra-panel common voltage fluctuates, the occurrence of crosstalk is suppressed.

[0008] Incidentally, Japanese Patent Application Laid-Open No. 2001-147420 discloses a technique for generating an output common voltage based on a coupling signal corresponding to the sum of the outputs of all data signal lines. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] JP 2019-133019 A [Patent Document 2] JP 2001-147420 A Summary of the Invention [Problem to be solved by the invention]

[0010] Regarding the Vcom feedback circuit 920 (see FIG. 14), the ratio of the resistance value of resistor 922 to the resistance value of resistor 921 is called the "correction strength." The larger the correction strength, the shorter the time required for the intra-panel common voltage to converge, but the greater the power consumption in the operational amplifier 923. Therefore, the correction strength is adjusted so that the intra-panel common voltage converges to a target constant voltage by the end of each horizontal scanning period while suppressing an increase in power consumption.

[0011] Incidentally, in a liquid crystal display device that switches between normal driving and low frequency driving during operation, a one-column inversion driving method (one-source line inversion driving method) has been typically adopted as a polarity inversion driving method (a driving method that inverts the polarity of the voltage applied to the liquid crystal to prevent deterioration of the liquid crystal), but in recent years, a two-column inversion driving method (two-source line inversion driving method) may be adopted to prevent an increase in power consumption during high frequency driving. The one-column inversion driving method is a method in which the polarity is inverted for every pixel (every column) (every source bus line) in each row (the direction in which the gate bus line extends) and the polarity is inverted for all pixels every frame, and the two-column inversion driving method is a method in which the polarity is inverted for every two pixels (every two columns) (every two source bus lines) in each row and the polarity is inverted for all pixels every frame. When the one-column inversion driving method is adopted, for example, a polarity state as shown in part A of FIG. 16 and a polarity state as shown in part B of FIG. 16 alternate every frame. In Fig. 16, one gate bus line is denoted by the symbol GL, and one source bus line is denoted by the symbol SL (similar to Fig. 17). When a two-column inversion driving method is adopted, for example, a polarity state as shown in part A of Fig. 17 and a polarity state as shown in part B of Fig. 17 appear alternately every frame.

[0012] As mentioned above, in recent years, there are liquid crystal display devices that adopt the two-column inversion drive method. However, in liquid crystal display devices that adopt the two-column inversion drive method, vertical stripes may be visible during low-frequency drive. For this reason, for liquid crystal display devices that can operate at a wide range of refresh rates, it is considered to switch the polarity inversion drive method from the two-column inversion drive method to the one-column inversion drive method during low-frequency drive. However, the adoption of the one-column inversion drive method is likely to cause a decrease in display quality, such as a phenomenon called "greenish" in which green appears strongly.

[0013] The intra-panel common voltage when the correction intensity is adjusted so as to converge to a target constant voltage by the end of each horizontal scanning period will be described with reference to FIG. 18. In FIG. 18, the thick dotted line with reference numeral 97 indicates the waveform of the output common voltage VcomOUT. In a liquid crystal display device employing a two-column inversion drive method, the intra-panel common voltage fluctuates, for example, as shown by the solid line with reference numeral 95 in FIG. 18. In contrast, in a liquid crystal display device employing a one-column inversion drive method, the intra-panel common voltage fluctuates, for example, as shown by the thick solid line with reference numeral 96 in FIG. The fluctuation of the intra-panel common voltage also depends on the displayed image (display pattern). As shown in FIG. 18, when the one-column inversion drive method is employed, the intra-panel common voltage fluctuates more greatly than when the two-column inversion drive method is employed. From this point of view, it can be understood that the adoption of the one-column inversion drive method is likely to cause a deterioration in display quality.

[0014] Therefore, an object of the following disclosure is to realize a liquid crystal display device that can operate while switching polarity inversion driving methods without causing a deterioration in display quality. [Means for solving the problem]

[0015] (1) A liquid crystal display device according to some embodiments of the present invention comprises: a display section including a plurality of video signal lines, a plurality of scanning signal lines, a plurality of pixel electrodes provided corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, and a common electrode provided in common to the plurality of pixel electrodes; a video signal line drive circuit that drives the plurality of video signal lines; a scanning signal line driving circuit that drives the plurality of scanning signal lines; a common electrode driving circuit for driving the common electrode; Equipped with A polarity inversion driving method is configured to be switchable, in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted; The common electrode driving circuit includes: an operational amplifier having an inverting input terminal, a non-inverting input terminal to which a reference voltage which is a voltage to be applied to the common electrode is applied, and an output terminal connected to the common electrode; a first resistor having one end connected to the inverting input terminal of the operational amplifier and the other end connected to the output terminal of the operational amplifier; an adjustment circuit having a first terminal to which a feedback voltage of the voltage of the common electrode is applied and a second terminal connected to an inverting input terminal of the operational amplifier, the adjustment circuit being configured so that a combined resistance value between the first terminal and the second terminal can be adjusted in accordance with an applied polarity inversion drive method; Includes.

[0016] (2) Furthermore, a liquid crystal display device according to some embodiments of the present invention includes the configuration of (1) above, a polarity inversion drive system is switchable between a 1-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for each video signal line in the direction in which the plurality of scanning signal lines extend, and an N-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for every N video signal lines in the direction in which the plurality of scanning signal lines extend, where N is an integer of 2 or more; The adjustment circuit makes the combined resistance value smaller when the applied polarity inversion drive method is the 1-column inversion drive method than the combined resistance value when the applied polarity inversion drive method is the N-column inversion drive method.

[0017] (3) Furthermore, a liquid crystal display device according to some embodiments of the present invention includes the configuration of (1) above, The adjustment circuit includes: a second resistor having one end connected to the first terminal and the other end connected to the second terminal; a third resistor provided in parallel with the second resistor between the first terminal and the second terminal; a switching element provided in series with the third resistor between the first terminal and the second terminal, the switching element having a control terminal, a first conduction terminal, and a second conduction terminal; Including, A switching control signal is applied to a control terminal of the switching element, which controls the state of the switching element depending on the polarity reversal driving scheme being applied.

[0018] (4) Furthermore, in addition to the configuration of (3), a liquid crystal display device according to some embodiments of the present invention further includes a timing control circuit that controls an operation of the video signal line drive circuit, an operation of the scanning signal line drive circuit, and an operation of the common electrode drive circuit, A drive frequency is switchable between a first frequency and a second frequency lower than the first frequency, The timing control circuit includes: a drive frequency determination unit that determines a drive frequency to be either the first frequency or the second frequency; a polarity inversion drive method determination unit that determines a polarity inversion drive method based on the drive frequency determined by the drive frequency determination unit, and outputs the switching control signal in accordance with the determined polarity inversion drive method; Includes.

[0019] (5) Furthermore, a liquid crystal display device according to some embodiments of the present invention includes the configuration of (4) above, a polarity inversion drive system is switchable between a 1-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for each video signal line in the direction in which the plurality of scanning signal lines extend, and an N-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for every N video signal lines in the direction in which the plurality of scanning signal lines extend, where N is an integer of 2 or more; If the driving frequency determined by the driving frequency determination unit is the first frequency, the polarity inversion drive method determination unit determines the polarity inversion drive method to be the N-column inversion drive method, and if the driving frequency determined by the driving frequency determination unit is the second frequency, the polarity inversion drive method to be the 1-column inversion drive method.

[0020] (6) Furthermore, a liquid crystal display device according to some embodiments of the present invention includes the configuration of (5) above, The adjustment circuit maintains the switching element in an on state when the applied polarity inversion driving method is the 1-column inversion driving method, and maintains the switching element in an off state when the applied polarity inversion driving method is the N-column inversion driving method.

[0021] (7) Furthermore, a liquid crystal display device according to some embodiments of the present invention includes the configuration of (3) or (4) above, a polarity inversion drive system is switchable between a 1-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for each video signal line in the direction in which the plurality of scanning signal lines extend, and an N-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for every N video signal lines in the direction in which the plurality of scanning signal lines extend, where N is an integer of 2 or more; The adjustment circuit maintains the switching element in an on state when the applied polarity inversion driving method is the 1-column inversion driving method, and maintains the switching element in an off state when the applied polarity inversion driving method is the N-column inversion driving method.

[0022] (8) Furthermore, a driving method according to some embodiments of the present invention is a driving method for a liquid crystal display device, comprising the steps of: The liquid crystal display device includes: a display section including a plurality of video signal lines, a plurality of scanning signal lines, a plurality of pixel electrodes provided corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, and a common electrode provided in common to the plurality of pixel electrodes; a video signal line drive circuit that drives the plurality of video signal lines; a scanning signal line driving circuit that drives the plurality of scanning signal lines; a common electrode driving circuit for driving the common electrode; Equipped with The common electrode driving circuit includes: an operational amplifier having an inverting input terminal, a non-inverting input terminal to which a reference voltage which is a voltage to be applied to the common electrode is applied, and an output terminal connected to the common electrode; a first resistor having one end connected to the inverting input terminal of the operational amplifier and the other end connected to the output terminal of the operational amplifier; an adjustment circuit having a first terminal to which a feedback voltage of the voltage of the common electrode is applied, a second terminal connected to the inverting input terminal of the operational amplifier, and at least one resistor; Including, The driving method includes: a drive frequency determination step of determining a drive frequency to be either a first frequency or a second frequency lower than the first frequency; a polarity inversion drive method determination step of determining, according to the drive frequency determined in the drive frequency determination step, a polarity inversion drive method to be either a 1-column inversion drive method in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for each video signal line in the direction in which the plurality of scanning signal lines extend, or an N-column inversion drive method in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for every N video signal lines in the direction in which the plurality of scanning signal lines extend; a combined resistance value adjusting step of adjusting a combined resistance value between the first terminal and the second terminal in accordance with the polarity reversal drive method determined in the polarity reversal drive method determining step; Includes. Effect of the Invention

[0023] According to some embodiments of the liquid crystal display device of the present invention, an inverting amplifier is formed in the common electrode driving circuit by an operational amplifier, a first resistor, and an adjustment circuit. Here, the combined resistance value in the adjustment circuit can be adjusted according to the applied polarity inversion driving method. That is, for the inverting amplifier, the ratio of the resistance value of the first resistor to the combined resistance value can be adjusted according to the applied polarity inversion driving method. Therefore, for example, by making the ratio of the resistance value of the first resistor to the combined resistance value larger when the one-column inversion driving method is applied than when the two-column inversion driving method is applied, it is possible to suppress the deterioration of the display quality when the one-column inversion driving method is applied. As described above, a liquid crystal display device that can operate while switching the polarity inversion driving method without causing a deterioration of the display quality is realized. [Brief description of the drawings]

[0024] [Figure 1] 4 is a diagram for explaining a configuration of a common electrode driver in one embodiment. FIG. [Diagram 2] FIG. 2 is a block diagram showing an overall configuration of the liquid crystal display device according to the embodiment. [Diagram 3] 3A to 3C are diagrams for explaining a configuration of a substrate of the liquid crystal display device in the embodiment. [Figure 4] 2 is a schematic diagram showing a configuration of a liquid crystal panel in the embodiment. [Diagram 5] FIG. 2 is a block diagram for explaining a configuration related to control of a common electrode driver, among the configurations of a timing controller, in the embodiment. [Figure 6] 4 is a circuit diagram showing a detailed configuration of an offset voltage setting circuit in the embodiment. FIG. [Figure 7] FIG. 11 is a circuit diagram for explaining a Vcom feedback circuit when a two-column inversion driving method is applied in the embodiment. [Figure 8]FIG. 11 is a circuit diagram for explaining a Vcom feedback circuit when a one-column inversion driving method is applied in the embodiment. [Figure 9] 10 is a waveform diagram for explaining fluctuations in a common voltage within a panel in the embodiment. [Figure 10] 11 is a flowchart for illustrating a flow of processing relating to adjustment of correction strength in the embodiment. [Figure 11] FIG. 1 is a diagram showing an example of a configuration for generating an output common voltage according to the prior art. [Figure 12] FIG. 11 is a waveform diagram for explaining fluctuations in a common voltage within a panel, relating to the prior art. [Figure 13] FIG. 1 is a diagram for explaining crosstalk that occurs in the conventional technology. [Figure 14] FIG. 1 is a circuit diagram showing a configuration of a Vcom feedback circuit according to the prior art. [Figure 15] FIG. 11 is a waveform diagram for explaining how the occurrence of crosstalk is suppressed by providing a Vcom feedback circuit, relating to the conventional technology. [Figure 16] FIG. 1 is a diagram showing changes in polarity state when a one-column inversion driving method is adopted in the prior art. [Figure 17] FIG. 1 is a diagram showing changes in polarity state when a two-column inversion driving method is adopted in the prior art; [Figure 18] FIG. 11 is a waveform diagram showing the difference in fluctuation of a common voltage within a panel when a one-column inversion drive method is adopted and when a two-column inversion drive method is adopted, relating to the conventional technology. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0025] Hereinafter, an embodiment will be described with reference to the accompanying drawings.

[0026] <1. Overall configuration and operation overview> Fig. 2 is a block diagram showing the overall configuration of a liquid crystal display device according to one embodiment. This liquid crystal display device includes a timing controller (timing control circuit) 100, a gate driver (scanning signal line drive circuit) 200, a source driver (video signal line drive circuit) 300, a common electrode driver (common electrode drive circuit) 400, and a display unit 500. Note that Fig. 2 is a diagram showing the functional configuration, and therefore the positional relationships between the components are different from the actual configuration.

[0027] The display section 500 is provided with a plurality of source bus lines (video signal lines) SL and a plurality of gate bus lines (scanning signal lines) GL. A pixel formation section 5 for forming pixels is provided at each intersection of the source bus lines SL and the gate bus lines GL. That is, the display section 500 includes a plurality of pixel formation sections 5. Each pixel formation section 5 includes a thin film transistor (pixel TFT) 50, which is a switching element having a control terminal connected to a gate bus line GL passing through the corresponding intersection and a first conductive terminal connected to a source bus line SL passing through the intersection, a pixel electrode 51 connected to a second conductive terminal of the thin film transistor 50, a common electrode 54 and an auxiliary capacitance electrode 55 provided in common to the plurality of pixel formation sections 5 (in other words, a common electrode 54 and an auxiliary capacitance electrode 55 provided in common to the plurality of pixel electrodes 51), a liquid crystal capacitance 52 formed by the pixel electrode 51 and the common electrode 54, and an auxiliary capacitance 53 formed by the pixel electrode 51 and the auxiliary capacitance electrode 55. The liquid crystal capacitor 52 and the auxiliary capacitor 53 form a pixel capacitor 56. Note that only one pixel formation portion 5 is shown in FIG.

[0028] FIG. 3 is a diagram for explaining the configuration of the substrate of the liquid crystal display device. However, the configuration shown here is an example, and the present invention is not limited to this. This liquid crystal display device is composed of a liquid crystal panel 610 including a display unit 500, a PCBA (PCB assembly) 620 as a driving substrate, and an FPC (flexible printed circuit board) 630. The liquid crystal panel 610 is composed of a TFT array substrate 617 including pixel electrodes 51 and on which a TFT array is formed, an opposing substrate 618 on which a common electrode 54, a color filter, etc. are formed, and a liquid crystal layer 619 sandwiched between the TFT array substrate 617 and the opposing substrate 618 (see FIG. 4). Note that the polarizing plate is not shown in FIG. 4.

[0029] A source driver 300 is provided in the form of an IC chip in a frame region on a TFT array substrate 617 constituting the liquid crystal panel 610. The gate driver 200 is monolithically formed on the TFT array substrate 617. Wiring for transmitting various signals from the timing controller 100 to the liquid crystal panel 610 is formed on the FPC 630. The PCBA 620 is provided with the timing controller 100 and a common electrode driver 400. A common voltage control signal VCTL is provided to the common electrode driver 400 from the timing controller 100. In this regard, for example, I2C (Inter-Integrated Circuit) communication is adopted as a communication interface between the timing controller 100 and the common electrode driver 400.

[0030] In this embodiment, the common electrode 54 is a single planar electrode, and a dedicated wiring connects one or more points on the single electrode to the common electrode driver 400, and an intra-panel common voltage (the voltage of the common electrode 54 in the liquid crystal panel 610) is provided to the common electrode driver 400 as a feedback voltage VcomFB.

[0031] When the IPS mode is adopted as the liquid crystal mode, the pixel electrode 51 and the common electrode 54 are formed on the same substrate. The present invention can also be applied to such a case.

[0032] Next, the operation of the components shown in Fig. 2 will be described. The timing controller 100 controls the operation of the gate driver 200, the source driver 300, and the common electrode driver 400. In detail, the timing controller 100 receives image data DAT and a group of timing signals (horizontal synchronous signal, vertical synchronous signal, etc.) TG sent from the outside, and outputs a digital video signal DV, a gate control signal GCTL that controls the operation of the gate driver 200, a source control signal SCTL that controls the operation of the source driver 300, and a common voltage control signal VCTL that controls the operation of the common electrode driver 400. The gate control signal GCTL includes a gate start pulse signal, a gate clock signal, etc. The source control signal SCTL includes a source start pulse signal, a source clock signal, a latch strobe signal, etc. The common voltage control signal VCTL includes a polarity inversion drive method switching signal SPOL and a reference voltage adjustment signal SB, which will be described later.

[0033] The gate driver 200 repeatedly applies an active scanning signal to each gate bus line GL in a cycle of one vertical scanning period based on the gate control signal GCTL sent from the timing controller 100. In this manner, the gate driver 200 drives the multiple gate bus lines GL arranged in the display unit 500.

[0034] The source driver 300 applies a driving video signal to each source bus line SL based on the digital video signal DV and the source control signal SCTL sent from the timing controller 100. At this time, the source driver 300 sequentially holds the digital video signal DV indicating the voltage to be applied to each source bus line SL at the timing when a pulse of the source clock signal is generated. Then, the held digital video signal DV is converted to an analog voltage at the timing when a pulse of the latch strobe signal is generated. The converted analog voltage is applied to all the source bus lines SL simultaneously as a driving video signal. As described above, the source driver 300 drives a plurality of source bus lines SL arranged in the display unit 500.

[0035] The common electrode driver 400 receives a reference voltage VREF, which is a voltage serving as a reference for generating a common voltage, a common voltage control signal VCTL sent from the timing controller 100, and the above-mentioned feedback voltage VcomFB, and outputs a voltage obtained by appropriately correcting the reference voltage VREF as an output common voltage VcomOUT. The output common voltage VcomOUT is applied to the common electrode 54. In this manner, the common electrode driver 400 drives the common electrode 54.

[0036] In this manner, with a common voltage applied to the common electrode 54, a scanning signal is applied to the gate bus line GL and a driving video signal is applied to the source bus line SL, whereby an image based on image data DAT sent from outside is displayed on the display unit 500.

[0037] The liquid crystal display device according to this embodiment is configured to be switchable in a polarity inversion driving method, which is a method for inverting the polarity of a voltage applied between each of the plurality of pixel electrodes 51 and the common electrode 54. In this regard, it is assumed that this embodiment employs a configuration that is switchable between a one-column inversion driving method and a two-column inversion driving method. However, the present invention is not limited to this.

[0038] <2. Timing controller> The configuration of the timing controller 100 that is involved in controlling the common electrode driver 400 will be described with reference to the block diagram shown in Fig. 5. As shown in Fig. 5, the timing controller 100 includes a drive frequency determination unit 110, a polarity inversion drive method determination unit 120, and a source driver drive signal output unit 130.

[0039] The drive frequency determination unit 110 determines a drive frequency based on a group of timing signals (horizontal synchronizing signals, vertical synchronizing signals, etc.) TG and image data DAT. The drive frequency determination unit 110 then outputs a drive frequency instruction signal SR indicating the determined drive frequency and a reference voltage adjustment signal SB for adjusting the above-mentioned reference voltage VREF. The drive frequency instruction signal SR is provided to the polarity inversion drive method determination unit 120, and the reference voltage adjustment signal SB is provided to the common electrode driver 400.

[0040] The polarity inversion drive method determination unit 120 determines the polarity inversion drive method to be applied based on the drive frequency instruction signal SR. In the present embodiment, specifically, it is determined whether the one-column inversion drive method or the two-column inversion drive method is to be applied. More specifically, if the drive frequency indicated by the drive frequency instruction signal SR is 60 Hz, the polarity inversion drive method to be applied is determined to be the two-column inversion drive method, and if the drive frequency indicated by the drive frequency instruction signal SR is 30 Hz, the polarity inversion drive method to be applied is determined to be the one-column inversion drive method. Then, the polarity inversion drive method determination unit 120 outputs a polarity inversion drive method switching signal SPOL according to the determined polarity inversion drive method. The polarity inversion drive method switching signal SPOL is provided to the source driver drive signal output unit 130 and the common electrode driver 400.

[0041] The source driver driving signal output unit 130 outputs a source control signal SCTL and a digital video signal DV based on the image data DAT, based on the polarity inversion driving method switching signal SPOL. The source control signal SCTL and the digital video signal DV are provided to the source driver 300.

[0042] <3. Common electrode driver> The configuration of the common electrode driver 400 will be described with reference to Fig. 1. As shown in Fig. 1, the common electrode driver 400 includes an offset voltage setting circuit 410 and a Vcom feedback circuit 420. An output common voltage VcomOUT output from the Vcom feedback circuit 420 is provided to a common electrode 54 in the liquid crystal panel 610. In addition, an intra-panel common voltage (the voltage of the common electrode 54 in the liquid crystal panel 610) is provided to the Vcom feedback circuit 420 as a feedback voltage VcomFB via a dedicated wiring 7.

[0043] A detailed configuration of the offset voltage setting circuit 410 is shown in FIG. 6. The offset voltage setting circuit 410 is composed of resistors 411, 412, and a changeover switch 413. The resistor 411 has one end to which a reference voltage VREF is applied, and the other end to which is grounded. The resistor 412 has one end to which a reference voltage VREF is applied, and the other end to which is grounded. The resistors 411 and 412 are variable resistors. A first reference voltage VREF1 is taken out from a tap of the resistor 411, and a second reference voltage VREF2 is taken out from a tap of the resistor 412. The changeover switch 413 includes a first input terminal 4131 to which the first reference voltage VREF1 is applied, a second input terminal 4132 to which the second reference voltage VREF2 is applied, and an output terminal 4133 connected to a non-inverting input terminal of an operational amplifier 423 (see FIG. 1) in the Vcom feedback circuit 420. Regarding the changeover switch 413, the connection destination of the output terminal 4133 is switched between the first input terminal 4131 and the second input terminal 4132 based on the reference voltage adjustment signal SB sent from the timing controller 100. With the above-mentioned configuration, the first reference voltage VREF1 or the second reference voltage VREF2 is provided to the non-inverting input terminal of the operational amplifier 423 as the adjusted reference voltage VREFa.

[0044] For example, the voltage value of the first reference voltage VREF1 is higher than the voltage value of the second reference voltage VREF2, and the output terminal 4133 is connected to the first input terminal 4131 during normal driving (when the driving frequency is 60 Hz), and the output terminal 4133 is connected to the second input terminal 4132 during low frequency driving (when the driving frequency is 30 Hz). In this example, a higher voltage is applied to the non-inverting input terminal of the operational amplifier 423 in the Vcom feedback circuit 420 during normal driving than during low frequency driving. However, this is not limited to this.

[0045] As shown in FIG. 1, the Vcom feedback circuit 420 is composed of an adjustment circuit 421, a resistor 422, and an operational amplifier 423. The adjustment circuit 421 is composed of a resistor 4211, a resistor 4212, and a field effect transistor (FET) 4213 as a switching element. The adjustment circuit 421 is a circuit for adjusting the correction strength described above, and is configured to be able to adjust the internal combined resistance value as described later. Regarding the resistor 4211, one end is connected to a node 43, and the other end is connected to a node 44. Regarding the field effect transistor 4213, a polarity inversion drive method switching signal SPOL is given to a control terminal, a first conductive terminal is connected to the node 43, and a second conductive terminal is connected to one end of the resistor 4212. Regarding the resistor 4212, one end is connected to the second conductive terminal of the field effect transistor 4213, and the other end is connected to the node 44. As described above, in the adjustment circuit 421, the resistor 4211 and the resistor 4212 are connected in parallel. Meanwhile, the node 43 is connected to the wiring 7 dedicated to transmitting the feedback voltage VcomFB. Therefore, the feedback voltage VcomFB is applied to one end of the resistor 4211 and the first conductive terminal of the field effect transistor 4213. As for the resistor 422, one end is connected to the node 45, and the other end is connected to the output terminal 46 of the operational amplifier 423. As for the operational amplifier 423, the inverting input terminal is connected to the node 45, the adjustment reference voltage VREFa is applied to the non-inverting input terminal, and the output terminal 46 is connected to the other end of the resistor 422 and the common electrode 54. Since the node 44 and the node 45 are connected, the other end of the resistor 4211, the other end of the resistor 4212, one end of the resistor 422, and the inverting input terminal of the operational amplifier 423 are connected to each other.

[0046] In this embodiment, the polarity inversion drive method switching signal SPOL realizes the switching control signal, the resistor 422 realizes the first resistor, the resistor 4211 realizes the second resistor, and the resistor 4212 realizes the third resistor. Also, the node 43 corresponds to the first terminal, and the node 44 corresponds to the second terminal.

[0047] Here, the voltage to be applied to the common electrode 54 (in this embodiment, the first reference voltage VREF1 or the second reference voltage VREF2) and given to the non-inverting input terminal of the operational amplifier 423 is called a "target voltage". Since the adjustment circuit 421 includes a resistor, an inverting amplifier is configured by the adjustment circuit 421, the resistor 422, and the operational amplifier 423. Therefore, if the feedback voltage VcomFB is higher than the target voltage, a voltage lower than the target voltage is output from the output terminal 46 of the operational amplifier 423 as the output common voltage VcomOUT, and if the feedback voltage VcomFB is lower than the target voltage, a voltage higher than the target voltage is output from the output terminal 46 of the operational amplifier 423 as the output common voltage VcomOUT. By supplying the voltage obtained by correcting the target voltage to the common electrode 54 in this way, the fluctuating intra-panel common voltage gradually converges to the target voltage.

[0048] <4. Adjustment of correction strength> Next, how the above-mentioned correction strength is adjusted will be described. Regarding the Vcom feedback circuit 420, the ratio of the resistance value of the resistor 422 to the combined resistance value between the node 43 and the node 44 is the correction strength in this embodiment. In this embodiment, the correction strength is adjusted by controlling the on / off of the field effect transistor 4213 to change the combined resistance value between the node 43 and the node 44. As described above, the larger the correction strength, the shorter the time required for the intra-panel common voltage to converge, but the greater the power consumption in the operational amplifier 423. Hereinafter, the resistance value of the resistor 4211 is represented by R1, the resistance value of the resistor 4212 is represented by R2, and the resistance value of the resistor 422 is represented by Rb, the combined resistance value when the 1-column inversion driving method is applied is represented by Ra1, and the combined resistance value when the 2-column inversion driving method is applied is represented by Ra2.

[0049] In this embodiment, when the one-column inversion drive method is applied, the polarity inversion drive method switching signal SPOL is maintained at a high level by the polarity inversion drive method decision unit 120, and when the two-column inversion drive method is applied, the polarity inversion drive method switching signal SPOL is maintained at a low level by the polarity inversion drive method decision unit 120. When the polarity inversion drive method switching signal SPOL is maintained at a high level, the field effect transistor 4213 is maintained in an on state. On the other hand, when the polarity inversion drive method switching signal SPOL is maintained at a low level, the field effect transistor 4213 is maintained in an off state.

[0050] From the above, when the two-column inversion driving method is applied, the field effect transistor 4213 is maintained in the off state. At this time, the Vcom feedback circuit 420 is equivalent to the circuit shown in Figure 7. Therefore, the combined resistance value Ra2 is expressed by the following equation (1). Ra2 = R1 (1)

[0051] In contrast, when the one-column inversion driving method is applied, the field-effect transistor 4213 is maintained in the on state. At this time, the Vcom feedback circuit 420 is equivalent to the circuit shown in Fig. 8. Since the following equation (2) is established regarding the combined resistance value Ra1, the combined resistance value Ra1 is expressed by the following equation (3).

number

number

[0052] Here, from the above equations (1) and (3), the following equation (4) is established.

number

[0053] As described above, adjustment circuit 421 in Vcom feedback circuit 420 is configured to be able to adjust the combined resistance between node 43 (node ​​to which feedback voltage VcomFB is applied) and node 44 (node ​​connected to the inverting input terminal of operational amplifier 423) according to the applied polarity inversion drive method. More specifically, adjustment circuit 421 in Vcom feedback circuit 420 makes the combined resistance when the applied polarity inversion drive method is the 1-column inversion drive method smaller than the combined resistance when the applied polarity inversion drive method is the 2-column inversion drive method.

[0054] FIG. 9 is a waveform diagram for explaining the fluctuation of the common voltage in the panel in this embodiment. In FIG. 9, the thick dotted line with reference numeral 73 is the waveform of the output common voltage VcomOUT. When the two-column inversion driving method is applied, the common voltage in the panel fluctuates, for example, as shown by the solid line with reference numeral 71 in FIG. 9. On the other hand, when the one-column inversion driving method is applied, the common voltage in the panel fluctuates, for example, as shown by the thick solid line with reference numeral 72 in FIG. 9. In the conventional example shown in FIG. 18, when the one-column inversion driving method is applied, the common voltage in the panel fluctuates more greatly than when the two-column inversion driving method is applied. However, from FIG. 9, in this embodiment, it can be understood that there is no significant difference in the degree of fluctuation of the common voltage in the panel between when the one-column inversion driving method is applied and when the two-column inversion driving method is applied. In addition, in FIG. 9, waveforms when the one-column inversion drive method and waveforms when the two-column inversion drive method are applied are shown for both the 60 Hz drive period and the 30 Hz drive period. However, in reality, for example, polarity inversion is performed by the two-column inversion drive method during a period when the drive frequency is 60 Hz, and polarity inversion is performed by the one-column inversion drive method during a period when the drive frequency is 30 Hz.

[0055] 10 is a flowchart for explaining the flow of processing related to the adjustment of the correction strength. First, the drive frequency determination unit 110 in the timing controller 100 determines the drive frequency at a predetermined timing (step S10). In this embodiment, it is determined whether the drive frequency is 60 Hz or 30 Hz.

[0056] Next, according to the drive frequency determined in step S10 (i.e., according to the drive frequency determined by the drive frequency determination unit 110), the polarity inversion drive method determination unit 120 in the timing controller 100 determines the polarity inversion drive method to be either the one-column inversion drive method or the two-column inversion drive method (step S20). Specifically, if the drive frequency determined in step S10 is 60 Hz, the polarity inversion drive method is determined to be the two-column inversion drive method, and if the drive frequency determined in step S10 is 30 Hz, the polarity inversion drive method is determined to be the one-column inversion drive method. If the drive frequency determined in step S10 is 60 Hz, the polarity inversion drive method determination unit 120 sets the polarity inversion drive method switching signal SPOL to a low level, and if the drive frequency determined in step S10 is 30 Hz, the polarity inversion drive method determination unit 120 sets the polarity inversion drive method switching signal SPOL to a high level.

[0057] Next, the combined resistance value between the nodes 43 and 44 in the adjustment circuit 421 is adjusted according to the polarity reversal drive method determined in step S20 (step S30). Specifically, if the polarity reversal drive method determined in step S20 is the two-column inversion drive method, the field effect transistor 4213 in the adjustment circuit 421 is turned off by the polarity reversal drive method switching signal SPOL at a low level, and the Vcom feedback circuit 420 becomes equivalent to the circuit shown in FIG. 7 as described above. As a result, the combined resistance value becomes as shown in the above formula (1). On the other hand, if the polarity reversal drive method determined in step S20 is the one-column inversion drive method, the field effect transistor 4213 in the adjustment circuit 421 is turned on by the polarity reversal drive method switching signal SPOL at a high level, and the Vcom feedback circuit 420 becomes equivalent to the circuit shown in FIG. 8 as described above. As a result, the combined resistance value becomes as shown in the above formula (3). In step S30, the combined resistance value is adjusted as described above. Since the above-mentioned correction strength depends on the combined resistance value, the correction strength is also adjusted by adjusting the combined resistance value in step S30.

[0058] In this embodiment, a drive frequency determination step is realized by step S10, a polarity inversion drive method determination step is realized by step S20, and a combined resistance value adjustment step is realized by step S30. Regarding the drive frequency, 60 Hz corresponds to the first frequency, and 30 Hz corresponds to the second frequency.

[0059] <5. Effects> According to this embodiment, the common electrode driver 400 includes a Vcom feedback circuit 420 that outputs a voltage obtained by correcting a target voltage (a voltage to be applied to a non-inverting input terminal of an operational amplifier 423 constituting an inverting amplifier) ​​that is a voltage to be applied to the common electrode 54 based on a feedback voltage (a voltage obtained by feeding back a common voltage in the panel through a dedicated wiring 7) VcomFB as an output common voltage VcomOUT. The Vcom feedback circuit 420 includes an adjustment circuit 421 configured to adjust a combined resistance value between a node 44 connected to an inverting input terminal of the operational amplifier 423 and one end of a resistor 422, and a node 43 to which a feedback voltage VcomFB is applied. With the above configuration, an inverting amplifier is configured by the operational amplifier 423, the resistor 422, and the adjustment circuit 421 in the Vcom feedback circuit 420. Here, the combined resistance value is adjusted according to the polarity inversion driving method applied. That is, for the inverting amplifier, the ratio (correction strength) of the resistance value of the resistor 422 to the combined resistance value is adjusted according to the polarity inversion driving method applied. Specifically, the correction strength is made larger when the one-column inversion driving method is applied than when the two-column inversion driving method is applied. This prevents the common voltage in the panel from fluctuating significantly when the one-column inversion driving method is applied. As a result, the degradation of display quality when the one-column inversion driving method is applied is suppressed. As described above, according to this embodiment, a liquid crystal display device that can operate while switching polarity inversion driving methods without causing degradation of display quality is realized.

[0060] <6.Other> In the above embodiment, an example in which the polarity inversion drive method is switched between a one-column inversion drive method and a two-column inversion drive method has been described, but the present invention is not limited to this. The present invention can be applied to a liquid crystal display device in which the polarity inversion drive method is switched between a one-column inversion drive method and an N-column inversion drive method, where N is an integer of 2 or more. In addition, the internal configuration of the adjustment circuit 421 is not limited to the configuration shown in FIG. 1 as long as it is possible to adjust the combined resistance value between the dedicated wiring 7 for transmitting the feedback voltage VcomFB and the node 45 (the node connected to one end of the resistor 422 and the inverting input terminal of the operational amplifier 423).

[0061] Although the present invention has been described in detail above, the above description is illustrative in all respects and is not restrictive, and it will be understood that many other changes and modifications can be made without departing from the scope of the present invention. [Explanation of symbols]

[0062] 51...Pixel electrode 54…Common electrode 100...Timing controller 400…Common electrode driver 410...Offset voltage setting circuit 420…Vcom feedback circuit 421…adjustment circuit 422, 4211, 4212…resistors (in the Vcom feedback circuit) 423…Op-amp 500...Display section 610...LCD panel SPOL: Polarity inversion drive method switching signal VcomOUT: Output common voltage VcomFB: Feedback voltage VCTL: Common voltage control signal

Claims

1. a display section including a plurality of video signal lines, a plurality of scanning signal lines, a plurality of pixel electrodes provided corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, and a common electrode provided in common to the plurality of pixel electrodes; a video signal line drive circuit that drives the plurality of video signal lines; a scanning signal line driving circuit that drives the plurality of scanning signal lines; a common electrode driving circuit for driving the common electrode; Equipped with A polarity inversion driving method in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted is switchably configured; The common electrode driving circuit includes: an operational amplifier having an inverting input terminal, a non-inverting input terminal to which a reference voltage which is a voltage to be applied to the common electrode is applied, and an output terminal connected to the common electrode; a first resistor having one end connected to the inverting input terminal of the operational amplifier and the other end connected to the output terminal of the operational amplifier; an adjustment circuit having a first terminal to which a feedback voltage of the voltage of the common electrode is applied and a second terminal connected to an inverting input terminal of the operational amplifier, the adjustment circuit being configured so that a combined resistance value between the first terminal and the second terminal can be adjusted in accordance with an applied polarity inversion driving method; A liquid crystal display device comprising:

2. a polarity inversion drive system is switchable between a 1-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for each video signal line in the direction in which the plurality of scanning signal lines extend, and an N-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for every N video signal lines in the direction in which the plurality of scanning signal lines extend, where N is an integer of 2 or more; 2. The liquid crystal display device according to claim 1, wherein the adjustment circuit makes the combined resistance value smaller when the applied polarity inversion drive method is the 1-column inversion drive method than when the applied polarity inversion drive method is the N-column inversion drive method.

3. The adjustment circuit includes: a second resistor having one end connected to the first terminal and the other end connected to the second terminal; a third resistor provided in parallel with the second resistor between the first terminal and the second terminal; a switching element provided in series with the third resistor between the first terminal and the second terminal, the switching element having a control terminal, a first conduction terminal and a second conduction terminal; Including, 2. The liquid crystal display device according to claim 1, wherein a switching control signal for controlling the state of said switching element in accordance with an applied polarity reversal driving method is applied to a control terminal of said switching element.

4. a timing control circuit for controlling an operation of the video signal line drive circuit, an operation of the scanning signal line drive circuit, and an operation of the common electrode drive circuit; A drive frequency is switchable between a first frequency and a second frequency lower than the first frequency, The timing control circuit includes: a drive frequency determination unit that determines a drive frequency to be either the first frequency or the second frequency; a polarity inversion drive method determination unit that determines a polarity inversion drive method based on the drive frequency determined by the drive frequency determination unit, and outputs the switching control signal in accordance with the determined polarity inversion drive method; The liquid crystal display device according to claim 3 ,

5. a polarity inversion drive system is switchable between a 1-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for each video signal line in the direction in which the plurality of scanning signal lines extend, and an N-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for every N video signal lines in the direction in which the plurality of scanning signal lines extend, where N is an integer of 2 or more; 5. The liquid crystal display device according to claim 4, wherein the polarity inversion drive method determination unit determines the polarity inversion drive method to be the N-column inversion drive method if the drive frequency determined by the drive frequency determination unit is the first frequency, and determines the polarity inversion drive method to be the 1-column inversion drive method if the drive frequency determined by the drive frequency determination unit is the second frequency.

6. 6. The liquid crystal display device according to claim 5, wherein the adjustment circuit maintains the switching element in an on state when the applied polarity inversion driving method is the 1-column inversion driving method, and maintains the switching element in an off state when the applied polarity inversion driving method is the N-column inversion driving method.

7. a polarity inversion drive system is switchable between a 1-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for each video signal line in the direction in which the plurality of scanning signal lines extend, and an N-column inversion drive system in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for every N video signal lines in the direction in which the plurality of scanning signal lines extend, where N is an integer of 2 or more; 5. The liquid crystal display device according to claim 3, wherein the adjustment circuit maintains the switching element in an on state when the applied polarity inversion driving method is the 1-column inversion driving method, and maintains the switching element in an off state when the applied polarity inversion driving method is the N-column inversion driving method.

8. A method for driving a liquid crystal display device, comprising the steps of: The liquid crystal display device includes: a display section including a plurality of video signal lines, a plurality of scanning signal lines, a plurality of pixel electrodes provided corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, and a common electrode provided in common to the plurality of pixel electrodes; a video signal line drive circuit that drives the plurality of video signal lines; a scanning signal line driving circuit that drives the plurality of scanning signal lines; a common electrode driving circuit for driving the common electrode; Equipped with The common electrode driving circuit includes: an operational amplifier having an inverting input terminal, a non-inverting input terminal to which a reference voltage which is a voltage to be applied to the common electrode is applied, and an output terminal connected to the common electrode; a first resistor having one end connected to the inverting input terminal of the operational amplifier and the other end connected to the output terminal of the operational amplifier; an adjustment circuit having a first terminal to which a feedback voltage of the voltage of the common electrode is applied, a second terminal connected to the inverting input terminal of the operational amplifier, and at least one resistor; Including, The driving method includes: a drive frequency determination step of determining a drive frequency to be either a first frequency or a second frequency lower than the first frequency; a polarity inversion drive method determining step of determining a polarity inversion drive method to be either a 1-column inversion drive method in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for each video signal line in the direction in which the plurality of scanning signal lines extend, or an N-column inversion drive method in which the polarity of a voltage applied between each of the plurality of pixel electrodes and the common electrode is inverted for every N video signal lines in the direction in which the plurality of scanning signal lines extend; a combined resistance value adjusting step of adjusting a combined resistance value between the first terminal and the second terminal in accordance with the polarity reversal drive method determined in the polarity reversal drive method determining step; A driving method comprising:

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