Photoelectron structure element, pixel, and display arrangement structure body, and method related thereto

Abstract

To provide a display arrangement structure body in which an optical cross talk is reduced.SOLUTION: The present invention provides a photoelectron structure element 10 having at least one semiconductor element 12 having an active zone formed so as to generate a light. A structure element is arranged onto a first main front surface 14 of at least the semiconductor element, and contains: a dielectric filter 18 that is formed so as to only penetrate a light to a predetermined direction; and a reflection material 19 that is arranged to at least one side surface 16 of at least one semiconductor element and at least one side surface of the dielectric filter.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] This patent application claims the priority of the German Patent Application Publication No. 102019112604.5 of May 14, 2019, the priority of the German Patent Application Publication No. 102019113792.6 of May 23, 2019, the priority of the German Patent Application Publication No. 102019129209.3 of October 29, 2019, the priority of the German Patent Application Publication No. 102019131506.9 of November 21, 2019, and the priority of the International Application PCT / EP2020 / 052191 of January 29, 2020, the disclosures of which are incorporated herein by reference.

[0002] The present invention relates to optoelectronic structural elements and pixels including optoelectronic structural elements. The present invention further relates to a display arrangement structure and a method for manufacturing the same.

[0003] Background Art In many applications such as displays, optoelectronic structural elements are assembled monolithically. Therefore, instead of arranging individual structural elements on a board or a backplane, optoelectronic structural elements are integrated into a substrate so that these elements can be individually driven and controlled. This not only enables miniaturization but also has the advantage of reducing the number of transfer processes and soldering processes. Furthermore, such monolithic modules can be easily scaled both in terms of the size of individual structural elements and the size of the module. The structural elements can be arranged in a freely definable matrix. Such a scaling effect is very effective especially during mass production.

[0004] Depending on different applications, different radiation patterns are required, especially. In some applications, optoelectronic structural elements should have a Lambert radiation pattern, and in other applications, it is desirable for the radiation to be as directional as possible.

[0005] In the case of a monolithic design, on the one hand, the drive control electronics (Ansteuerelektronik) can be integrated into the substrate on which the optoelectronic structural element is manufactured. On the other hand, it is also possible to manufacture the circuit and the optoelectronic structural element separately and then combine them. In this case, it is important to ensure an appropriate positional relationship.

[0006] This application particularly addresses some aspects of a monolithic display involving the themes of redundancy, radiation pattern, and drive control in the case where the optoelectronic structural element fails.

[0007] Summary of the Invention In one aspect, it relates to the improvement of the radiation pattern of an LED with a dielectric filter having an added reflective surface. The optoelectronic structural element, particularly an LED, according to the first aspect of the present disclosure includes at least one semiconductor element, one dielectric filter, and one reflective material.

[0008] At least one semiconductor element includes an active zone formed to generate light. In particular, this may be configured as a vertical or horizontal LED. Measures for enhancing the efficiency of the structural element are possible. Further, at least one semiconductor element has a first main surface, a second main surface opposite the first main surface, and side surfaces extending between the two main surfaces. For example, at least one semiconductor element may have three or four or more side surfaces. However, it is also conceivable that at least one semiconductor element has a round main surface and thus has only one aspect.

[0009] The dielectric filter is disposed on the first main surface of the at least one semiconductor element and is configured to transmit or pass only light incident on the dielectric filter in a predetermined direction.

[0010] For example, the dielectric filter may be configured to transmit light only at a predetermined cone angle (Winkelkegel). The cone angle is oriented such that its axis is perpendicular to the first main surface of at least one semiconductor element. The angle between the outer surface or generatrix of the cone and the axis of the cone, i.e., half of the cone's aperture angle, may have a predetermined value. For example, half of the cone's aperture angle can be at most 5°, at most 15°, at most 30°, or at most 60°. Light components incident on the dielectric filter from the semiconductor element at an angle within a predetermined cone angle range are transmitted, and the remaining light components are not substantially transmitted and are, for example, reflected back to the semiconductor element. This enables high directivity of the light emitted from the optoelectronic device.

[0011] The dielectric filter may be configured to have a very small aperture angle of the cone angle, so that only the light exiting the semiconductor element perpendicular to the first main surface is transmitted by the dielectric filter.

[0012] In one aspect, the dielectric filter may be composed of a stack of dielectric layers, which is applied onto the semiconductor element by coating and has a particularly high transmittance. For example, the dielectric layers in the stack may alternately have a low refractive index and a high refractive index. As materials for the dielectric layers with a high refractive index, for example, Nb 2 O 5 , TiO 2 , ZrO 2 , HfO 2 , Al 2 O 3 , Ta 2 O 5 or ZnO can be used. For the dielectric layers with a low refractive index, for example, SiO 2 , SiN, SiON, or MgF 2 can be used. A stack of dielectric layers alternately having a high refractive index and a low refractive index may be configured as a Bragg filter. Furthermore, the dielectric filter may be a photonic crystal.

[0013] On at least one side of at least one semiconductor element and one or more dielectric filters, a reflective material is deposited. The reflective material may be provided so as to cover at least one or all sides of at least one semiconductor element. Similarly, the reflective material may cover at least one or all sides of the dielectric filter. In one configuration, the reflective material completely laterally surrounds both the at least one semiconductor element and the dielectric filter.

[0014] The reflective material may be reflective with respect to light emitted from at least one semiconductor element or at least a part of the wavelength range of this light. As a result, the light emitted through the side of at least one semiconductor element or the dielectric filter is reflected back, and the efficiency of the optoelectronic structure element is improved.

[0015] A plurality of structural elements may be proposed. These also have one or more monolithically assembled semiconductor elements each having the above-described characteristics. A dielectric filter is disposed on each semiconductor element. Further, the semiconductor element is surrounded by a reflective material. Additionally or alternatively, a plurality of structural elements including semiconductor elements may be surrounded by such a mirror. For example, in such a configuration, redundancy can be provided, so that even if one semiconductor element fails, a redundant semiconductor element can take over its function. For example, the semiconductor elements may be arranged in an array, that is, in a regular arrangement structure of a monolithic display.

[0016] The optoelectronic structure element may be incorporated in a display, that is, a display device. Each of the semiconductor elements can represent or constitute one pixel of the display. Further, each of the semiconductor elements can represent a sub-pixel of the pixel, and each pixel is formed from a plurality of sub-pixels that emit light having, for example, red, green, and blue.

[0017] High contrast can be obtained between adjacent pixels by a reflective material that laterally surrounds each semiconductor element and its respective dielectric filter. Furthermore, a high pixel density is also possible. According to one configuration, the semiconductor element is configured as an LED. The LED has a small lateral spread of the emission surface, particularly in the range of 140 μm to 750 μm. The structural elements of the monolithic array, unlike individual LEDs, each form a self - contained unit. The light emitted by the semiconductor element can be, for example, in the visible range, ultraviolet (UV) light, and / or infrared (IR) light.

[0018] In addition to displays, the optoelectronic structural element according to the first aspect of the present application can be used, for example, in AR (augmented reality; German: erweiterte Realität) applications or other applications of pixelated arrays or pixelated light sources.

[0019] According to one configuration, at least one or more or all sides of at least one semiconductor element extend inclined at the height of the active zone. That is, at least a part of each side forms an angle with the first main surface of the at least one semiconductor element, and this angle is not 90°, particularly less than 90°. The at least one semiconductor element may be chamfered over its entire height or only partially, but in any case, it is desirable that the active zone is in the chamfered area. The fully or partially chamfered sides may form an interface with an insulating layer of low refractive index. The light emitted in the horizontal direction is reflected by the chamfered sides towards the surface of the component.

[0020] At least one semiconductor element may have a first electrical terminal and a second electrical terminal. For example, one terminal can represent the cathode and the other terminal can represent the anode. Further, the reflective material may be conductive and may be electrically coupled to the first terminal of the at least one semiconductor element. In particular, the first terminal may be connected to the n-type doped region of the at least one semiconductor element. As a result, the reflective material causes optical separation between adjacent pixels and at the same time provides electrical contact to the at least one semiconductor element.

[0021] When a plurality of optoelectronic structural elements including a large number of semiconductor elements are proposed, the reflective material and the conductive material surrounding each semiconductor element may be interconnected, whereby the first terminals of the semiconductor elements can be controlled together from the outside. In this case, the second contact of the semiconductor element may be individually drivable, for example, via the lower surface of the semiconductor element. Since it is only necessary to define only one contact with good resolution, this configuration is advantageous in manufacturing, and it also facilitates the manufacture of very small pixels where the area is insufficient when two separate contacts are provided on the lower surface of the chip. The reflective material may be, for example, a metal, may contain a metal, or may be electrodeposited.

[0022] The reflective layer may be disposed under the second main surface of the at least one semiconductor element. Thereby, the light coming out through the second main surface is reflected back to the semiconductor element again and exits completely from the optoelectronic structural element through the upper surface. Further, the reflective layer may be conductive and may be electrically coupled to the second terminal of the at least one semiconductor element. For example, the second terminal may be connected to the p-type doped region of the at least one semiconductor element. As a result, in addition to its reflective characteristics, the reflective layer also serves to establish electrical contact with the at least one semiconductor element. It has also been proposed that the second terminals of each semiconductor element can be individually driven and controlled.

[0023] The reflective layer may use the same material as the reflective material, but it doesn't have to. For example, a metal can be used for the reflective layer.

[0024] Instead of the above configuration, the reflective layer may be electrically insulated, and one or more conductive layers coupled to the second contact of at least one semiconductor element may be disposed above and / or below the reflective layer. In this case, the reflective layer may be, for example, a dielectric mirror, and in particular, may be disposed on a metal layer. Then, the electrical contact connection is made through a feed-through penetrating the dielectric layer or through the side surface of the dielectric layer. Further, a conductive and transparent layer may be disposed above the reflective layer, that is, between at least one semiconductor element and the reflective layer. As the material of the conductive and transparent layer, for example, indium tin oxide (English: indium tin oxide; abbreviated as ITO) can be used.

[0025] According to one configuration, for example, a silver mirror is disposed under a conductive and transparent layer of indium tin oxide and a dielectric mirror. Alternatively, only a conductive and transparent layer of indium tin oxide and a silver mirror may be disposed under at least one semiconductor element.

[0026] An electrically insulating first material may be disposed between the reflective material and the reflective layer. Further, the electrically insulating first material may be in direct contact with one or more of the side surfaces of at least one semiconductor element, particularly the chamfered portion of the side surface. Further, the electrically insulating first material may have a lower refractive index than at least one semiconductor element, particularly in the region of the interface with the electrically insulating first material. As a result, the electrically insulating first material causes electrical insulation between the first terminal and the second terminal of at least one semiconductor element. Further, due to the refractive index contrast, light can be reflected and returned at the interface between at least one semiconductor element and the electrically insulating first material.

[0027] The electrically insulating first material is, for example, SiO 2It may be formed from, and deposited by, for example, a vapor phase growth method using TEOS (tetraethyl orthosilicate) or another method based on, for example, silane so as to satisfy a high aspect ratio.

[0028] A layer having a roughened surface configured to change the direction of light to other spatial directions or scatter light may be disposed between at least one semiconductor element and the dielectric filter, that is, on the first main surface of at least one semiconductor element. This layer may have a Lambert emission pattern. Further, since the layer may be formed such that light components at an angle exceeding the critical angle of total reflection change their directions, in principle, all components can be extracted and none will remain "trapped" within the component.

[0029] The above-described layer may be composed of, for example, a randomly or deterministically patterned semiconductor surface. The surface may have a roughened structure having inclined Frank parts, and the height of the roughened structure is at most several hundred nanometers. The roughened structure can be created, for example, by etching.

[0030] Furthermore, it is also possible to roughen the first main surface of at least one semiconductor element without using the above-described layer. For this purpose, for example, a random or deterministic topology can be etched onto the first main surface, particularly to realize a Lambert emission pattern. The roughened first main surface of at least one semiconductor element can have the same characteristics as the roughened surface of the above-described layer.

[0031] On the roughened surface of at least one semiconductor element or a layer disposed on the semiconductor element, for example, a further layer made of SiO 2 having a refractive index different from that of the underlying layer and having a flat upper surface may be deposited. This additional layer allows the dielectric filter to be applied by its flat upper surface, and at the same time, maintains the function of the roughened surface of the underlying layer due to the refractive index difference.

[0032] By having the lateral spread of the pixel in the range of, for example, 140 μm to 750 μm, it is possible to reduce the height of at least one semiconductor element in the range of several μm. In particular, at least one semiconductor element can have a height in the range of 3 μm to 30 μm.

[0033] As described above, the device can include a plurality of optoelectronic structural elements that can have the configurations described in the present application. Each of the semiconductor elements of the structural element may be completely surrounded laterally by a reflective material, together with an associated dielectric filter and a reflective layer disposed under each semiconductor element. According to one configuration, the semiconductor elements are arranged in an array, and adjacent semiconductor elements are separated from each other by a reflective material. As a result, the reflective material forms a lattice, and adjacent semiconductor elements are separated from each other only by the lattice.

[0034] When the reflective material is further conductive, the first terminals of all the semiconductor elements may be connected to a common external terminal via the reflective material. The second terminals of the semiconductor elements may be individually drive - controllable.

[0035] According to an alternative configuration, a plurality of semiconductor elements each laterally surrounded by a reflective material are juxtaposed, and an electrically insulating second material is disposed between adjacent semiconductor elements. For example, the electrically insulating second material may be a potting material.

[0036] In this configuration, the reflective material may be conductive. In order to connect the first terminals of the semiconductor elements to a common external terminal, conductor tracks for connecting the first terminals of the semiconductor elements to a common external terminal may extend above and / or below and / or inside the electrically insulating second material. The second terminals of the semiconductor elements may be individually drive - controllable.

[0037] For drive control, an additional substrate may be provided and contacts may be arranged on the substrate to connect the terminals of the semiconductor structural elements.

[0038] The method according to the second aspect of the present application is used to manufacture an optoelectronic structure element. This method includes providing at least one semiconductor element having an active zone configured to generate light, and disposing a dielectric filter on the first main surface of the at least one semiconductor element. The dielectric filter is configured to transmit only light in a predetermined direction. Further, a reflective material is disposed or deposited on at least one side surface of the at least one semiconductor element and at least one side surface of the dielectric filter.

[0039] The method for manufacturing an optoelectronic device according to the second aspect of the present application may have the above-described configuration of the optoelectronic structure element according to these aspects of the present application.

[0040] Hereinafter, aspects of processes and methods for manufacturing LEDs or displays or modules will be described in detail. As already explained, the aspects of the processes include the processing of semiconductor structures or materials and vice versa. In this regard, the following aspects can be easily combined with those described so far.

[0041] Due to the very small dimensions of the manufacturing process and the individual optical elements, individual pixel elements among the numerous pixels of a display may become defective. This problem has a greater impact on monolithic display modules. This is because defects and variations in manufacturing are difficult to repair or correct due to their integration. Especially in a monolithic display, since defective pixels cannot be replaced individually, when the defect density is high, the entire module has to be replaced.

[0042] For example, known solutions attempt to compensate for the missing light of defective pixels so that by setting surrounding pixels or adjacent pixels to a higher brightness, the loss of light from the defective pixels can be at least partially compensated. In many cases, since the replacement or repair of these defective pixels is considered to be neither economically nor process - meaningful, it is desirable that the manufactured display can be used with sufficiently good quality even if there are individual defective pixels.

[0043] The following aspects regarding pixel elements having sub - pixels that are electrically separated and optically coupled can compensate for such small defects, thus improving the yield while maintaining the quality of the display or display module. It should be noted here that the concept presented here can also be used for the above - mentioned structural elements in that, as will be described later, the material attached to the side plays a role in optical and electrical separation.

[0044] These aspects take into account the use of measures suitable for preventing light leakage. Therefore, in that regard, the means proposed below are not only suitable for the above - mentioned problems, but also the reduction of light leakage has further advantages, especially when the optically active regions are very close to each other in a monolithic structural element and it is necessary to achieve good optical separation. In the case of a very densely arranged monolithic array or display or display module, a clean optical separation between pixels is required so that the light emitted by the optically active elements, i.e., LEDs, does not radiate into the regions of adjacent pixels. To reduce light leakage, a trench (more generally, a structure for optical separation) is often provided between two LEDs. On the one hand, in order to achieve a sufficiently good high - contrast image quality, it is necessary to suppress light leakage, but this may also make pixel failures more prominent.

[0045] Therefore, an optical pixel element for generating pixels of a display, formed by at least two sub-pixels, is proposed. According to one embodiment, one pixel element is provided with 2, 4, 6, 9, 12, or 16 sub-pixels. In other words, here two sub-pixels receive the same drive control information and have redundancy, for example, being implemented according to the same wavelength. Therefore, even if one of these at least two sub-pixels fails, the pixel element can emit light of that wavelength. According to one embodiment, by adjusting the luminance of the sub-pixels, the shortage of the amount of light of the failed sub-pixel can be compensated. According to one embodiment, the sub-pixels are implemented as so-called fields. For example, when the pixel element is implemented in a rectangular structure, the sub-pixels within the structure of the pixel element are formed by being divided into fields again. Each of these sub-pixels can be driven and controlled independently of the sub-pixels of other fields.

[0046] The sub-pixels each have an optical emitter region. This is for the purpose that each sub-pixel can be individually driven and controlled and can function autonomously. The emitter region includes a pn junction, one or more quantum well structures, or other active layers provided for generating light. On the lower surface of the emitter region, contacts are implemented to connect to a control unit or drive control electronic circuit.

[0047] The drive control electronic circuit is configured to electrically control individual pixel elements and individual sub-pixels. For example, the drive control electronic circuit or the control device may be configured to detect defects in the sub-pixels and subsequently not use the defective sub-pixels. Further, according to one embodiment, the drive control electronic circuit may be configured to drive adjacent sub-pixels so as to increase the luminance so that the luminance of adjacent defective sub-pixels is corrected. For this purpose, for example, a storage unit for storing the operating state of the sub-pixels may be provided in the drive control electronic circuit. In other words, in this case, defective sub-pixels detected as defects can be intensively detected in order to perform luminance adjustment and defect compensation for turning on / off adjacent sub-pixels or pixel elements as needed. In other configurations, for example, in order to compensate for defective sub-pixels, the time for which the sub-pixels become active may be increased. On the other hand, when all the sub-pixels are functioning, the drive control circuit can also drive control all the sub-pixels by reducing the luminance of each, shortening the duration, or multiplexing. By using functional sub-pixels with less current and / or duration, it is possible to extend the life of the sub-pixels.

[0048] A sub-pixel separation element is provided to separate two adjacent sub-pixels within the pixel element from each other. Thereby, the sub-pixel separation element acts to perform electrical separation with respect to the drive control of each emitter chip or the drive control of the sub-pixels. In other words, this sub-pixel separation element may be configured as a type that prevents electrical interaction between the emitter chips of adjacent sub-pixels.

[0049] In particular, since a semiconductor is used and the distance between the emitter regions of individual sub-pixels is short in the μm range, driving and controlling the emitter chip may have secondary electrical or electromagnetic effects on spatially adjacent regions or peripheral regions. Depending on the situation, this may cause adjacent emitter chips to be similarly activated when driving and controlling the primary emitter chip. Therefore, the sub-pixel isolation element is configured to prevent electrical or optical crosstalk to adjacent sub-pixels and possible activation of adjacent sub-pixels.

[0050] On the other hand, the sub-pixel isolation element is configured to optically couple the light emitted from the emitter chips of adjacent sub-pixels, canceling the visual impression that the individual sub-pixels are off. Optically coupling means that the light generated by the primary emitter chip or primary sub-pixel can penetrate into adjacent sub-pixels due to light crosstalk. In this way, it is possible to advantageously prevent black dots or black spots from being formed due to sub-pixel defects. Instead, light can also penetrate from adjacent sub-pixels and radiate in the emission direction starting from the defective sub-pixel. Thereby, the visible effect of the defective sub-pixel can be advantageously corrected. Therefore, the sub-pixel isolation element does not have an optical separation effect and does not achieve this.

[0051] This is advantageous when one sub-pixel fails. Since it is not optically separated, the pixel is still recognized as a whole and does not give a different visual impression from when both sub-pixels are active. In one aspect, the sub-pixel isolation element may electrically isolate but not optically isolate, or may promote optical crosstalk. In one variant, the sub-pixel isolation element is only drawn up to just in front of or within the active layer of the two sub-pixels. In other words, the sub-pixel isolation element electrically isolates two sub-pixel elements connected via a common layer.

[0052] In one aspect, the sub-pixels have a common epitaxial layer. In many cases, the pixel element or the entire display is configured such that a common layer or a plurality of stacked layers that connect a plurality of sub-pixels and / or pixel elements to each other grow. This can also be used, for example, to provide a common electrical contact or connection. According to one embodiment, the epitaxial layer has gallium, indium, or aluminum of group III elements and nitrogen, arsenic, or phosphorus of group V elements, or a combination thereof, or a material system having the aforementioned elements. Thereby, in particular, it is possible to affect the color and wavelength of the light emitted by the light-emitting diode. The epitaxial layer can also or have an active semiconductor layer, that is, a p-type doped region and an n-type doped region including, for example, an active boundary region.

[0053] For example, an emitter chip is disposed on a first surface of the epitaxial layer that is transverse to the longitudinal extension of the epitaxial layer plane. In this case, the light of the emitter chip is emitted laterally with respect to the epitaxial layer and toward a second opposite surface of the epitaxial layer, from which it is radiated. The sub-pixel separation element extends in a trench shape in the epitaxial layer laterally with respect to the epitaxial layer plane starting from the first surface of the epitaxial layer on which the emitter chip or LED is disposed.

[0054] In other words, the sub-pixel separation element is here implemented as a structure such as a recess, a gap, a slot, etc., and may further be filled with an electrically insulating material. The insulating material is further desirably optically transparent in order to facilitate light leakage. Here, according to one embodiment, the length of the trench is selected such that a drive control signal to one sub-pixel does not electrically cross-talk with a second adjacent sub-pixel of the same pixel. In particular, such a trench-like structure causes electrical decoupling because the electrical resistance increases due to a significant extension of the current flow path.

[0055] The optical effects related to the emitted light are also related to regions within the epitaxial layer region that are more centrally located within the epitaxial layer or regions that face the second remote surface of the epitaxial layer. That is, the depth of the trench is selected so as to ensure electrical decoupling, while on the other hand, the trench terminates in front of the region of the epitaxial layer where light can move between two adjacent sub-pixels. The emission direction of the emitter chip extends, for example, in a direction across the epitaxial layer, enabling light to be emitted from the opposing second surface.

[0056] According to one embodiment, the trench extends perpendicular to the epitaxial layer plane. Assuming the trench extends in this way, in another example, the length d1 of the trench is smaller than the total thickness of the epitaxial layer. In this case, it is assumed that the epitaxial layer has at least approximately the same total thickness across a plurality of pixel elements and sub-pixels. In another example, the length d1 of the trench between the pixel elements is the same as the thickness of the epitaxial layer. That is, in other words, it means that the trench extends continuously from the first surface to the second surface of the epitaxial layer. In another example, the trench extends continuously obliquely to the epitaxial layer at an angle of 0 to 90° with respect to the epitaxial layer plane.

[0057] In one aspect, each pixel element or their sub-pixel elements includes a plurality of semiconductor layers in the form of a layer sequence, and an active layer for generating light is further provided. The active layer may include structures such as quantum wells prepared for generating light. In one aspect, one or more layers extend across a plurality of pixels or sub-pixels. For example, it may be proposed that the active layer extends across a plurality of color sub-pixels.

[0058] In one aspect, the sub-pixels or pixel elements can be electrically contact-connected and / or driven and controlled independently of each other. For this purpose, for example, contacts may be provided on the surface of the sub-pixel remote from the epitaxial layer. These may be, for example, mechanical contacts, solder connections, clamp connections, etc. What is important here is that the sub-pixels of the individual sub-pixels can be contact-connected and electrically operable without substantially interacting with the adjacent sub-pixels of the adjacent sub-pixels. This is particularly advantageous for detecting the functional state or operating state of the sub-pixels. This is because diagnostic information can be created individually for each individual sub-pixel. Similarly, it is also convenient to turn on / off individual sub-pixels without passing through adjacent sub-pixels. Thereby, a plurality of sub-pixels can be operated at a lower light intensity simultaneously, so that thermal or other stresses on the sub-pixels can be reduced even at a higher light intensity.

[0059] According to a further aspect, the individual sub-pixels are contact-connected via a carrier substrate. The carrier substrate aims to enable mechanical stability on the one hand and incorporate a fine conductor structure for contact-connecting the individual sub-pixels individually on the other hand. It is also possible to incorporate further elements such as drive control electronic circuits or driver circuits into the carrier substrate, particularly a silicon wafer. This may have the same material system, or may have different material systems via an alignment layer. Thus, silicon can also be used as the carrier material. Thereby, circuits for drive control in particular can be easily implemented on this carrier.

[0060] According to one embodiment, the luminance of the pixel element can be adjusted by turning individual sub-pixels off or on. Here, it can be cited as an advantage that effective brightness control can already be achieved with one turn-off or turn-on. Thereby, for example, the drive control electronic circuit or the control unit can be significantly simplified. In another example, the luminance of one or more sub-pixels of the pixel element can be additionally adjusted. In this way, it becomes possible to more accurately adjust or calibrate the color spectrum with finer gradations of brightness or the interaction with different wavelengths of the sub-pixels of the same pixel element. The adjustment of the brightness can be performed by PWM drive control. Even when a sub-pixel fails, equivalent brightness can be ensured by appropriately extending the PWM drive control. Conversely, when there is no problem with the sub-pixel, by adjusting the PWM drive control, the sub-pixel can be operated at its maximum efficiency, reducing thermal stress and possibly increasing the lifespan.

[0061] For example, when eight sub-pixels are patterned on one pixel element, without further changing control parameters such as current or on-time, for example, 3 (2^3) levels of luminance dynamic range can be realized. In other words, in this configuration variant, the dynamic range can be increased by a factor of 2 3 (2^3). Thereby, similarly, the complexity of the electronic control device and the associated cost can be suppressed.

[0062] In another aspect, a display having a plurality of pixel elements as described above and below is proposed. According to one aspect, such a display may be, for example, an optoelectronic display for applications in the field of augmented reality or the automotive field where a small display with a very high resolution is used. Similarly, such a display can be used in wearable devices such as smartwatches or wearables.

[0063] A pixel element separation layer is provided between two adjacent pixel elements. This is configured such that adjacent pixel elements are electrically separated from each other with respect to the drive control of each pixel element. Further, the pixel element separation layer is configured to perform optical separation on the light emitted from the pixel elements. The pixel element separation layer can be abstractly understood first as any structure or material that separates two pixel elements from each other. Usually, a large number of such pixel elements are juxtaposed on a plane, for example, on a support surface, and are connected to a drive control electronic circuit via contacts. In this way, a display can be formed as a whole.

[0064] Electrical and electromagnetic separation is for ensuring that pixel elements can be driven and controlled independently of adjacent pixel elements, with minimal or no electrical or electromagnetic interaction, especially no optical interaction. This is important for the sole reason that each pixel can be generated independently of each other in order to display specific image content on the display. This optical separation is also necessary for individual pixels on the display to obtain sufficient sharpness, contrast or rendering power with respect to each other.

[0065] In one aspect, a plurality of pixel elements have a common epitaxial layer. The pixel element separation layer is configured in a trench shape and extends laterally with respect to the epitaxial layer surface in the light emission direction of the emitter chip. That is to say, in other words, the pixel element separation layer is configured as a recess such as a trench, slit, slot, etc., and does not contain a solid material or has, for example, a reflective or absorptive material. In one example, the pixel separation element is filled with an insulating material in which a mirror layer is incorporated. The insulating material electrically separates two adjacent pixels, and the mirror element prevents light leakage. In some configurations, the mirror element is also provided for or promotes the collimation of light.

[0066] The pixel element isolation layer is for preventing an electrical signal or an electromagnetic signal from being transmitted from one pixel element to the other pixel element. At the same time, the pixel element isolation layer is for making the radiation of light from a pixel element to an adjacent pixel element as little as possible or not occur at all. In one example, the pixel element isolation layer can be formed only by arranging two separated pixel elements adjacent to each other when arranging them, thereby generating corresponding insulating or reflective interface layers. According to one embodiment, the trench is perpendicular to the epitaxial layer plane, and the length of the pixel element isolation layer is less than or equal to the thickness of the epitaxial layer.

[0067] According to a further aspect, the trench depth of the pixel element isolation layer is greater than the trench depth of the sub-pixel isolation layer. This has the advantage that, in particular, when the length of the pixel element isolation layer becomes longer, both electrical separation and optical separation become possible. On the other hand, if the trench depth between sub-pixels is shallow, although light leakage is desirable, only electrical separation can be obtained. In some aspects, the depth of the pixel element isolation layer penetrates through the active layer of the second adjacent pixel and separates it. Furthermore, the pixel element isolation layer may extend to the radiation surface or just below it.

[0068] In another aspect, a method for calibrating pixel elements has been proposed. This method is based on the idea that optimal drive control should be possible when the display is activated. That is, for example, it means detecting a defective sub-pixel as such and then not performing further drive control as necessary. Thereby, for example, error messages and malfunctions can be avoided. Due to the structure of the pixel element having sub-pixels, each sub-pixel can be individually driven and controlled for testing.

[0069] Therefore, in the first step, the sub-pixels of the pixel element are driven and controlled, for example, by a drive control electronic circuit or a control unit. In the next step, detection of the defect information of the sub-pixels is performed. In other words, the drive control electronic circuit may be designed and configured so that malfunctions or defects are detected. For this purpose, for example, the current intensity can be measured or other electrical parameters can be evaluated.

[0070] In a further step, the defect information is stored in the storage unit of the control unit. This information can be used, for example, to perform optimal drive control by the drive control electronic circuit. For example, when a specific luminance is to be realized and it is known that a certain sub-pixel has a defect, the drive control electronic circuit can drive and control adjacent sub-pixels separately as appropriate to correct the luminance, for example. As a result, even if there is a defect in the sub-pixel, the intensity of the light emitted from the pixel element does not change at all or hardly changes and will not be noticed by the viewer.

[0071] In another aspect of this method, the drive control, detection, and storage are sequentially performed for all individual sub-pixels of the pixel element. In other words, the drive control electronic circuit may be configured to continuously check all sub-pixels available by individually addressable emitter chips to detect the functional state of the entire pixel element. According to one embodiment, it may be performed only once when the display is powered on or after a certain period of time has elapsed.

[0072] The pixelated emitter or the extension of other emitters with reduced optical and electrical crosstalk is presented in the following concept.

[0073] In conventional monolithic pixel arrays, in some embodiments, it is common practice to etch the active zones to separate the individual pixels and make them individually addressable. However, the etching process of the active layer can cause defects that, on the one hand, may lead to an increase in leakage current at the edges and, on the other hand, result in further non-radiative recombination. The smaller the pixel, the relatively larger the damaged area becomes. Conventionally, the edges of the etched active zones have been passivated in various ways. Such methods include regrowth, deposition of an in-situ passivation layer, shifting of the pn junction, diffusion of dopants to increase the bandgap around the active zone, and wet etching cleaning to remove damage as much as possible.

[0074] According to the proposed principle, a pixel structure having a material bridge including at least an active layer is proposed. This can suppress an increase in the defect density in the region of the active layer.

[0075] Thus, an array of optoelectronic pixels or sub-pixels includes respective pixels or sub-pixels that form an active zone between an n-type doped layer and a p-type doped layer. According to the proposed principle, between two adjacent pixels formed, the material of the layer sequence is interrupted or removed from the n-type doped side and the p-type doped side up to or within the cladding layer, or up to or at least partially within the active zone. In this way, a material transition portion with a maximum thickness d c is formed, which results in a decrease in the electrical and / or optical conductivity at the material transition portion.

[0076] According to a second aspect, a method for manufacturing an array of optoelectronic pixels or sub-pixels is proposed. In a first step, an overall planar layer sequence having an n-type doped layer and a p-type doped layer is provided along the array, and an active zone suitable for light emission is formed between those layers. Subsequently, between adjacent pixels formed, the material of the layer sequence is removed from the n-type doped side and the p-type doped side up to or into an undoped cladding layer, or up to or into the active zone. This removal may be carried out by an etching process.

[0077] However, even after the removal, a material transition region including the active zone and optionally small regions on the upper, lower or both sides remains between adjacent pixels. This is the maximum thickness d c including that the electrical and / or optical conductivity is effectively reduced by the material transition region.

[0078] In the concept, on the one hand, an array of pixels can be generated in a planar manner. The material is removed by an etching process, but a material transition region including the active layer remains between adjacent pixels or sub-pixels. Therefore, the defect density in the region of the active layer, particularly in the pixel region, does not increase due to the etching process. Nevertheless, the individual pixels or sub-pixels are optically and electrically separated from each other. Thus, it is proposed to manufacture a pixel-emitter-array without etching through the active zone so as to avoid optical and electrical crosstalk and a decrease in the performance and reliability of the etched active zone. In this way, etching defects are avoided or the number of defects is effectively reduced.

[0079] In this connection, each pixel or sub-pixel includes at least one optoelectronic structural element or LED that emits light during operation. In principle, a plurality of sub-pixels of different colors are combined into one pixel, which is also called a pixel element.

[0080] According to one configuration, the removed material may be at least partially replaced with a filling material. In other words, after partially removing a material, particularly an n-type doped or p-type doped layer, a planar surface can be obtained by refilling the resulting space. Thereby, functions of mechanical support, bonding, and / or electrical insulation can be provided.

[0081] According to a further configuration, the removed material may be at least partially replaced with a material having a relatively small bandgap and thus absorbing the light in the active zone. Thereby, optical crosstalk is effectively reduced. Alternatively, at least a part of the removed material may be replaced with a material having a high refractive index, particularly higher than the refractive index of the cladding layer or the active zone. Thereby, a high-refractive-index interface that hinders the propagation of the fundamental mode can be effectively created. Further, alternatively, in one aspect, a light-absorbing material and / or a high-refractive-index material may be applied to each material transition part. In this way, by such a material affecting the waveguide (Wellenleitung) of the material transition part, crosstalk can be prevented.

[0082] According to a further configuration, a material having a high refractive index can be formed by diffusing or injecting a refractive-index-increasing material into the filling material, particularly up to each cladding layer. In this way, the array can be effectively improved with respect to crosstalk in a simple way that does not require etching.

[0083] Another aspect relates to the reduction of electrical crosstalk. Based on this, a material that enhances light absorption and / or a material that enhances electrical resistance can be introduced into the active zone of each material transition part. The corresponding method can be carried out relatively easily. In this way, the array can be effectively improved with respect to crosstalk in a simple way that does not require etching.

[0084] According to a further configuration, at least one optical structure, in particular a photonic crystal and / or a Bragg mirror, may be fabricated along, on or within the material transition region. These are particularly effective elements for reducing optical crosstalk. Such a photonic crystal or structure can also be used to improve the collimation of light.

[0085] In other embodiments, an electrical bias may be applied to two main surfaces of the material transition region by two opposing electrical contacts, generating an electric field through each material transition region. This is an effective element for reducing optical crosstalk. In this case, the electric field is generated by applying a bias. This bias may, for example, be derived from or be related to the voltage for operating the pixel. However, in some embodiments, such a field may also be determined by the inherent material properties. Thus, in one embodiment, it is proposed to generate an electric field in each material transition region by an n-type doped material and / or a p-type doped material applied or grown on at least one of the two main surfaces of the material transition region. In this way, since the electric field is introduced into the corresponding array, there is no need to apply a voltage.

[0086] According to a further configuration, the exposed main surface of the material transition region and / or the exposed surface region of the pixel may be electrically insulated and passivated, in particular by respective passivation layers having silicon dioxide. In this way, it is possible to effectively and specifically prevent current flow through selected regions of the array, in particular current flow through material transitions functioning as waveguides. A vertical optical structure element can be fabricated by electrically contacting the main surface of the pixel with a contact layer. Here, one main surface may be electrically connected to each other via a shared layer. According to a further configuration, the material and / or the material transition between one pixel and its adjacent pixel may be formed differently from each other, particularly depending on the direction.

[0087] OLEDs have been proposed in particular for displays with active light sources of pixel size. However, they have the disadvantages of low brightness and limited lifespan. As an alternative to self-emitting light sources with long lifespan, high efficiency, and furthermore fast response, there are LEDs arranged in a matrix based on, for example, GaN or InGaN. These are particularly suitable for display arrangement structures with a high packing density for forming high-resolution displays.

[0088] The starting point of this consideration is a display arrangement structure including an IC substrate component and a monolithic pixelated optochip mounted on the component. In this specification, a monolithic pixelated optochip is understood to be a matrix arrangement of light-emitting optoelectronic structure elements formed on a coherent chip substrate by a common manufacturing process. The IC substrate component has a monolithic integrated circuit, which is also obtained from a common manufacturing process. Furthermore, on the upper surface of the IC substrate component facing the monolithic pixelated optochip, there are IC substrate contacts arranged in a matrix.

[0089] The monolithic pixelated optochip includes a semiconductor layer sequence having a first semiconductor layer with a first doping and a second semiconductor layer with a second doping, wherein the polarity of the charge carriers in the first semiconductor layer is different from the polarity of the charge carriers in the second semiconductor layer. Preferably, the first semiconductor layer and the second semiconductor layer extend in the lateral direction across the entire monolithic pixelated optochip. In one configuration, the first semiconductor layer may have p-type doping and the second semiconductor layer may have n-type doping. Reverse doping is also possible, and it is likewise possible to use multiple sub-layers of the same doping for at least one of the different semiconductor layers with respect to doping intensity and / or semiconductor material. In particular, the semiconductor layer sequence may form a double heterostructure. There is a region between the first semiconductor layer and the second semiconductor layer that has a junction where a light-emitting active zone is formed during the operation of the display. In one possible configuration, the active zone is located in a doped or undoped active layer, which is placed between the first semiconductor layer and the second semiconductor layer and has, for example, one or more quantum well structures.

[0090] The individual light-emitting optoelectronic light sources of the pixelated optochip each represent an LED arranged in a matrix, and each LED has an LED back surface facing the IC substrate component and a first light source contact, and the first light source contact is adjacent to the first semiconductor layer in contact therewith and is electrically connected to each one of the IC substrate contacts. In other words, each LED of the pixelated optochip is formed to constitute a region of any of the above active layers. Between adjacent LEDs, the active layer or other layers described above may be interrupted to avoid crosstalk.

[0091] The inventors have recognized that if the projected area of the first light source contact onto the LED back surface corresponds to at most half of the area of the LED back surface and the first light source contact is surrounded laterally by a backside absorber, a display arrangement structure with a high packing density and simplified manufacturing can be realized. In this specification, the lateral direction is understood to be a direction perpendicular to the stacking direction determined by averaging the surface normal of the semiconductor layer sequence.

[0092] The current path of the semiconductor layer stack is narrowed laterally by a first light source contact applied in a small area that is considerably smaller than the pixel area of the associated LED. As a result, the lateral expansion of the active zone is limited to the μm dimension, and the locally driven and controllable LEDs are separated from each other by local recombination zones within the semiconductor layer stack. Here, it is advantageous that the pixel size of each LED, defined as the maximum diagonal area on the back side of the LED, is selected to be less than 1500 μm, preferably less than 900 μm, and particularly in the range of 200 μm to 1200 μm. Also, the preferred first light source contact is small, and in an advantageous configuration, the projected area of the first light source contact onto the back side of the LED occupies at most 25%, preferably at most 10%, of the area of the back side of the LED.

[0093] To limit the lateral expansion of the active zone, preferably, the first semiconductor layer and the second semiconductor layer are formed with p-type or n-type conductivity that is smaller than 10 4 Sm -1 and preferably smaller than 3·10 3 Sm -1 and even more preferably smaller than 10 3 Sm -1 The layer thickness of the first semiconductor layer in the stacking direction is advantageously at most 10 times, preferably at most 5 times, the maximum diagonal of the first light source contact in the lateral direction.

[0094] As a further design, the contact of the first light source on the monolithic pixelated optochip is not directly adjacent to the associated IC substrate contact. Instead, with reference to the stacking direction, below the first light source contact, there is an actual optochip contact element having a larger cross-sectional area than the first light source contact. This measure simplifies the positioning and mutual contact connection of the monolithic pixelated optochip on the IC substrate components without deteriorating the lateral limitation of the current path.

[0095] According to the present invention, a backside absorber that reduces light leakage between adjacent LEDs is arranged by utilizing the region of the first light source contact with a small structure. In particular, the downward electromagnetic radiation emitted at an angular position from the active zone is absorbed as long as it exceeds the limiting angle with respect to the stacking direction. As the material of the backside absorber, a patterning layer having silicon, germanium, and gallium arsenide is preferable. It is also possible to incorporate graphene or carbon black particles into the backside absorber.

[0096] The backside absorber laterally surrounds the first light source contact and extends laterally from the first light source contact. The backside absorbers of adjacent LEDs are adjacent to each other and are preferably integrally formed. In one configuration, the backside absorber extends at least up to the first semiconductor layer in the stacking direction. As a further design, a part of the region of the backside absorber extends into the first semiconductor layer appropriately patterned to shield the boundary region between adjacent LEDs. For this purpose, a light-blocking material with a reflecting action such as a reflector material like aluminum, gold, or silver, or a dielectric material having a refractive index smaller than that of the first semiconductor layer can be used additionally or alternatively. As a further design, the backside absorber not only performs an optical function but also functions as an electrical insulator that laterally restricts the current path.

[0097] This display arrangement structure has a second light source contact in the stacking direction above the second semiconductor layer of each LED, which is made of a transparent material such as ITO (indium tin oxide) and is electrically connected to the transparent and flatly extended contact layer on the front side of the pixelated optochip. In an advantageous configuration, the second light source contact is formed by the large-area contact layer itself, so that the entire second light source contact of the LEDs arranged in a matrix can be applied as a common area contact. In an alternative configuration for further reducing light leakage, the second light source contacts are adjacent to each other in such a way that each touches one contact layer, and the second light source contacts of adjacent LEDs are separated from each other by a front-side absorber in the lateral direction indicating the direction perpendicular to the stacking direction. The front-side absorber may consist of a material that absorbs the electromagnetic radiation emitted from the active zone or a material that reflects this radiation. Additionally or alternatively, the front-side absorber functions as an electrical insulator and can contribute to the lateral restriction of the current path in order to localize the recombination zone in the range of micrometer dimensions.

[0098] As a further possible design, the front-side absorber extends in a direction opposite to the stacking direction in at least a part of the second semiconductor layer. Furthermore, the lower and / or upper surface of the second light source contact and / or the contact layer and / or the upper surface of the second semiconductor layer may have an optically effective patterning for improving light extraction.

[0099] In the method for manufacturing the proposed display arrangement structure, an IC substrate component having a monolithic integrated circuit and IC substrate contacts arranged in a matrix is electrically connected to a monolithic pixelated optochip. In the manufacture of the previous monolithic pixelated optochip, it is preferable to epitaxially grow a semiconductor layer sequence having a first semiconductor layer with a first doping and a second semiconductor layer with a second doping. The polarity of the charge carriers in the first semiconductor layer is different from the polarity of the charge carriers in the second semiconductor layer, and the semiconductor layer sequence defines the stacking direction. Further, in the pixelated optochip, LEDs are arranged in a matrix, and each LED has a back surface facing the IC substrate component and a first light source contact. The first light source contact is adjacent to the first semiconductor layer in contact therewith and is electrically connected to each one of the contacts of the IC substrate. According to the present invention, the first light source contact is formed to have a projected area having a plane normal perpendicular to the stacking direction that occupies at most half of the area of the LED back surface. Further, the first light source contact is surrounded by a backside absorber in the lateral direction indicating the direction perpendicular to the stacking direction.

[0100] Hereinafter, the present invention will be described in more detail with reference to the drawings.

Brief Description of the Drawings

[0101]

Figure 1

Figure 2A

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Figure 3B

Figure 3C

Figure 3D

Figure 3E

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Figure 5

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Figure 7

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Figure 10A

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Figure 21

[0102] Detailed Description The following configuration relates mainly to a display device and a display, and thus to a base unit and a module having a monolithically integrated optoelectronic structure element. However, the present invention is not limited to this application or the illustrated monolithic components. Rather, the presented principles and configurations can be generalized to suit a wide range of electronic applications and applications that require scaling. In particular, aspects regarding directed radiation can be combined with aspects regarding the redundancy and perspective of the pixels in FIG. 18. The same applies to the configurations in FIGS. 18 to 21, and their principles are suitable for combinations with the configurations in FIGS. 5 and 6 or FIGS. 8 to 16, for example. The examples shown here can also be combined with a mirror as in FIG. 1 or FIG. 2B. This applies not only to the configuration but also mainly to the features of these aspects described in the claims.

[0103] In a monolithic display, since the individual optoelectronic structure elements are separated by a defined distance, a defined radiation pattern is required for some applications. Other applications that require a Lambert radiator can be easily modified based on directed radiation by adding a diffuser element. Therefore, a solution with a dielectric filter with an added reflective surface, after improving the radiation pattern of the LED and making it directional, is a suitable starting point for various monolithic display applications.

[0104] FIG. 1 shows a schematic cross-sectional view of the optoelectronic structure element 10. Hereinafter, the structure, operation mode, and manufacturing of the optoelectronic structure element 10 will be described.

[0105] The optoelectronic structure element 10 includes a pixel 11 having an optoelectronic structure element in the form of an LED, also called an LED semiconductor element 12. The LED semiconductor element 12 includes an active zone 13 configured to generate light and has a height in the range of 1 to 2 μm. The LED semiconductor element 12 has a first main surface 14, a second main surface 15 facing the first main surface 14, and, for example, four side surfaces 16. Each of the side surfaces 16 is chamfered in the lower region, and the side surface 16 forms an angle α of less than 90° with the first main surface 14 in this chamfered region. The active zone 13 is located at the height of the chamfered region.

[0106] On the first main surface 14 of the LED semiconductor element 12, there is a layer 17 including a random or deterministic topology. Alternatively, the corresponding topology may be etched on the first main surface 14 of the LED semiconductor element 12.

[0107] Although not shown in FIG. 1, on the layer 17, a further layer having a refractive index different from that of the layer 17 is deposited. The layer 17, in combination with the layer deposited thereon, deflects the light that does not exit perpendicularly to the first main surface 14 from the LED semiconductor element 12 in other directions, for example, by reflection at the interface between the layer 17 and the layer disposed thereon. Further, the layer disposed on the layer 17 has a function of providing a smooth surface that can impart a dielectric mirror layer.

[0108] On the layer 17 and the layer having a smooth upper surface thereon, there is a dielectric filter 18 composed of a stack of dielectric layers, which is configured to transmit only the light components within a predetermined cone angle and reflect the more flat beams. This cone angle is oriented such that its axis is perpendicular to the first main surface 14 of the LED semiconductor element 12.

[0109] Furthermore, on all side surfaces 16 of the LED semiconductor element 12, a reflective material 19 having conductivity and made of, for example, metal is deposited. The reflective material 19 is in contact with the n-type doped region of the LED semiconductor element 12. Below the second main surface 15 of the LED semiconductor element 12, there is also a reflective layer 20 having conductivity. The reflective layer 20 is in contact with the p-type doped region of the LED semiconductor element 12.

[0110] The chamfered side surface 16 of the LED semiconductor element 12 is covered with an electrically insulating first material 21. The electrically insulating first material 21 is disposed between the material 19 and the layer 20 and provides electrical insulation between the n-type contact and the p-type contact of the LED semiconductor element 12. Furthermore, the material 21 has a low refractive index so as to reflect the light emitted from the LED semiconductor element 12 on the chamfered side surface 16.

[0111] The layer formed from the reflective material 19 is formed so as to completely surround the pixel 11 in the horizontal direction and extend over the entire pixel 11 in the vertical direction. That is, the layer made of the reflective material 19 extends from the lower side of the electrically insulating first material 21 covering the LED semiconductor element 12 to the upper side of the dielectric filter 18. The light emitted laterally from the pixel 11 is reflected back by the reflective material 19, so that the highly directional light can only be emitted above the optoelectronic device 10.

[0112] FIGS. 2A and 2B schematically show a plan view and a cross-sectional view of the optoelectronic structure element 30 as seen from above, respectively. The optoelectronic structure element 30 includes a plurality of pixels 11 as described above. The pixels 11 are arranged in an array and are separated from each other by a reflective material 19 that extends in a grid pattern through the optoelectronic structure element 30. On one side of the optoelectronic structure element 30, an external terminal 31 is provided, and by this external terminal 31, the n-type region of the LED semiconductor element 12 can be contacted from the outside of the optoelectronic structure element 30. In this configuration example, the anodes of the LED semiconductor elements 12 are connected to each other, and this is called a common anode arrangement. Similarly, a common cathode arrangement in which the cathodes are connected to each other is also possible.

[0113] The array of pixels 11 is disposed on the carrier 32. The carrier 32 has p-type contact terminals 33 for each p-type contact, enabling the p-type contacts of each pixel 11 to be individually driven and controlled, for example, by an IC. The optoelectronic device 30 enables a very high pixel density. Furthermore, with a monolithic design, the layout structure can be scaled extensively.

[0114] Figures 3A, 3B, and 3C show a plan view and a cross-sectional view of the optoelectronic structural element 40, respectively, as seen from above, and two different variants are shown in Figures 3B and 3C.

[0115] The optoelectronic structural element 40 includes a plurality of pixels 11, and the pixels 11 are not arranged directly adjacent to each other but are spaced apart, like the optoelectronic structural element 30 shown in Figures 2A and 2B. Each pixel 11 has its four sides completely covered by a reflective material 19 within the optoelectronic structural element 40. The space between the pixels 11 is filled with an electrically insulating second material 41, such as a potting material.

[0116] The n-type contacts of the LEDs within the pixel 11 may be connected on the lower side of the optoelectronic structural element 40, on the upper side, or between the upper and lower sides. In Figure 3B, the pixel 11 is disposed on a carrier 42 incorporating n-type contact terminals 43 that connect the n-type contacts of the pixel 11 to each other. Furthermore, the carrier 42 has p-type contact terminals 44 for each p-type contact so that the p-type contacts of each pixel 11 can be individually driven and controlled. The carrier 42 may further incorporate an IC. The spaced-apart arrangement structure of the LED semiconductor elements 12 within the optoelectronic device 40 further enables contact connections that can individually drive and control both the n-type and p-type contacts of each pixel 11.

[0117] Figure 3C shows an alternative variant in which the carrier 45 includes only the individual p-type contact terminals 46 of each pixel 11 arranged on the carrier 45. Of course, it is also possible to interchange the p-type doped layer and the n-type doped layer. Conductor tracks 47 are arranged in a grid pattern on the electrically insulating second material 41, and these conductor tracks 47 connect the n-type contacts of the pixels 11 to each other and are wired to an external terminal 48 arranged on one side of the optoelectronic device 40, as shown in Figure 3A.

[0118] Figure 3D shows a configuration in which the dielectric layer 19' is formed on two opposite side surfaces of a substantially rectangular semiconductor element or LED 12. From the plan view of Figure 3E, it can be seen that the dielectric elements 19, 19' alternately wrap the semiconductor element 12 and the dielectric filter 18. The dielectric elements 19 and 19' have different configurations. The element 19' includes at least one conductive partial region, for example, in the form of a surface along the side wall of the LED 12 or in the form of a plurality of strips extending along the side wall. The element 19 is not electrically connected to the LED 12, that is, it does not contribute to the current supply to the element 12.

[0119] In Figure 3D, the direction of the current is indicated by an arrow. The current flows to the surface or enters the semiconductor layer from the surface through the dielectric filter 18 and flows into the active region. Alternatively, the conductive partial region of the dielectric element may be connected to the contact layer of the LED. The contact layer is arranged, for example, between the dielectric filter and the LED and may be configured as a cover electrode, as shown by the thin layer without a reference sign between the elements 12 and 18 in Figure 3A. In any case, the contact layer serves to spread the current over the entire surface.

[0120] The following configurations relate to various aspects of processes that can be used in a semiconductor structure to improve the characteristics of the semiconductor structure or to create new application fields or possibilities.

[0121] Figure 4 shows a simplified schematic diagram of an electronic display 10, such as frequently used in small devices like monitors, TVs, display panels, or smartwatches and smartphones, etc., to illustrate an aspect of a pixel element having electrically separated sub-pixels and optically coupled sub-pixels. In this case, it is known that the basic structure is realized by arranging a plurality of pixels or pixel elements 12 closely adjacent to each other in a plane. The pixel elements 12 are configured in rows and columns and can be individually driven and controlled electronically. The drive control is performed in such a way that not only the light intensity of the pixel elements 12 but also the color tone and emission wavelength change. In the latter case, each pixel often includes three sub-pixels, and each sub-pixel is configured to emit different wavelengths. The pixel elements 12 are often applied on a substrate or carrier structure 14, and in this aspect, it is mainly necessary to ensure the mechanical stability of the arrangement structure.

[0122] In this figure, it can be clearly seen that in order to create a sufficiently high resolution, it is necessary not only to mechanically arrange millions of such pixel elements 12 densely in space but also to electrically connect them. At the same time, often, defective pixel elements 12 may appear as dark dots between active pixels. In particular, for example, in the case of very small-sized ones for LEDs, while the density and resolution of such a display are improved, on the other hand, a function with as few errors as possible and production with a low defect rate are required.

[0123] In Figure 5, section AA shown in Figure 4 is enlarged so as to more accurately explain the features of the solution described here. In this way, a substrate 14 is shown that includes drive control elements and at the same time functions as a carrier structure for the pixels. Individual pixel elements 12 are provided on the substrate 14, and here they are rectangular in shape and have the same size. These same sizes of the pixel elements 12 are often advantageous for manufacturing reasons, but according to one embodiment, they may be configured in different shapes or sizes. In the example shown here, the pixel element 12 has a length l 1 and a width b 1It has. A pixel element isolation layer 16 is provided between the pixel elements 12. The pixel element isolation layer 16 is in the range of several μm, for example, in the range of 2 μm to 100 μm.

[0124] The pixel element isolation layer 16 is configured such that adjacent pixel elements 12 are electrically separated with respect to the drive control of each pixel element. FIG. 6 shows a cross-sectional view of a section of the pixel element. The pixel element 12 is separated by the pixel element isolation layer 16 and each includes a sub-pixel 18. Electrical and optical separation is performed between the pixel elements 12 by the pixel element isolation layer 16. This is to prevent light emitted from one pixel element 12 from entering the adjacent pixel element 12 and being emitted therefrom due to light leakage.

[0125] In the pixel element 12, further subdivision according to the present invention to the sub-pixel 18 for the selected pixel element 12 is exemplarily shown here. The sub-pixel 18, also called a so-called field, has the same size and shape here. The length l of the sub-pixel 18 2 is defined, and according to one embodiment, the length l of the pixel element 12 1 is, in some cases, the length l of the sub-pixel 1 of the same size including a gap 2 which can be obtained from a multiple of. Similarly, the width b of the sub-pixel is shown 2 and here too, according to one embodiment, the width b of the pixel element 2 is, in some cases, approximately a multiple of the width b of each sub-pixel 18 of the same size including a gap. In the figure selected here, the subdivision of the pixel element 12 into sub-pixels 18 or so-called fields is shown only for one pixel element 12. However, the patterning is applicable to all pixel elements 12 arranged in the display 10. 1 which can be obtained from a multiple of. 2 Furthermore, a sub-pixel separation element 20 is provided between two adjacent sub-pixels 18 of the same pixel element 12. This sub-pixel separation element 20 is for the related sub-pixel (length l

[0126] ​2 )(Refer to FIG. 6) It is configured such that electrical isolation is performed with respect to drive control. The sub-pixel separation element 20 is further configured to enable optical coupling or optical leakage with respect to the light emitted by the sub-pixel 18. In other words, this means that photons or light from one sub-pixel 18 within one pixel element 12 can cross-talk to one or more sub-pixels 18 present within the same pixel element 12, but cannot cross-talk between two pixel elements 12.

[0127] For example, the generation of different colors that the pixel element 12 can emit can be realized by a combination of the primary colors red, green, and blue. As a result, the pixel element 12 can include sub-pixels 18 that can emit light of different wavelengths. In FIG. 5, exemplarily, a total of nine sub-pixels 18 are marked with the initials A to K. According to one embodiment, the sub-pixels A, D, and G are configured as red LEDs, the sub-pixels B, E, and H are configured as green LEDs, and the sub-pixels C, F, and K are configured as blue LEDs. For example, when it is desired to emit red light with the pixel element 12, the sub-pixels A, D, and G are simultaneously driven and controlled by the drive control electronic circuit. In some cases, the drive control electronic circuit can test whether all of the sub-pixels A, D, and G have normal functions. In this way, the desired luminance can be set.

[0128] For example, even if there is a defect in any of the sub-pixels A, D, or G, the remaining pixels can be driven and controlled normally because they are electrically separated. However, due to the light leakage enabled by the sub-pixel separation element 20, the missing light of the defective sub-pixel 18 can be compensated for by the adjacent sub-pixel 18. That is, as long as one sub-pixel 18 of a certain group of sub-pixels of the same color is functioning and the remaining sub-pixels 18 in that group have defects, this remaining functioning sub-pixel 18 can compensate for the failure of the defective sub-pixel, and thus the function of the pixel element 12 can be guaranteed by redundancy. As an example, light leakage may also occur between multiple sub-pixels within the pixel element 12. As another arrangement, for example, it is also possible to assign three sub-pixels 18 each to one of the primary colors red, green, or blue. Examples of this are groupings such as A / B / C, D / E / F, and G / H / K. However, it is also possible to assign them diagonally, in which case light leakage can advantageously be enabled.

[0129] FIG. 6 is a cross-sectional view showing a partial region of the display 10. The substrate 14 is shown at the bottom of the figure, which is specifically intended to provide a sufficiently mechanically stable carrier structure for accommodating other structural elements. According to one embodiment, this can be a wafer of a silicon IC. The substrate 14 can further have a driver circuit or drive control electronic circuit (not shown) and various electrical terminals. These may be realized, for example, by conductor structures within an integrated circuit. Further, a contact structure 24 that can be used to drive and control the sub-pixel region 26 is provided. In the example shown here, the sub-pixel region 26 is arranged in direct contact with the contact structure 24. Through the contact structure 24, it is possible to individually and selectively drive and control the emitter chip 26 by a drive control electronic circuit.

[0130] The epitaxial layer 26 has, for example, various different layers that enable the functionality of the light-emitting diode in particular. For example, the pn junction may be implemented by correspondingly different doped layers or may have one or more quantum well structures. Schematically and for the sake of simplicity, the region of the pn junction 28 is indicated here by a dashed line. In addition, the structures of the pixel element 12 and the sub-pixel 18 are introduced into the epitaxial layer 26.

[0131] Specifically, the individual pixel elements 12 are distinguishable via the pixel element isolation layer 16. Each of these has a length l corresponding to the distance between two pixel element isolation layers 16. 1 In this case, in the pixel element 12, three sub-pixels 18 can be delimited in the longitudinal direction. These sub-pixels 18 each have a length l. 2 A sub-pixel separation element 20 is arranged between the individual sub-pixels 18.

[0132] In the example shown here, the pixel element isolation layer 16 and the sub-pixel separation element 20 are each configured as a structure such as a trench. That is, the pixel element isolation layer 16 and the sub-pixel separation element 20 are each introduced into the epitaxial layer 26 as a structure such as a trench shape or a gap shape, for example by an etching process. Then, an electrically insulating material, for example SiO, is deposited in the trench. At that time, for example, in order to determine the electrical and optical characteristics of these trenches, the trench depth d of the pixel element isolation layer 16 is selected to be greater than the trench depth d of the sub-pixel separation element 20. Thereby, by making the depth d of the trench of the sub-pixel separation element 20 small, light leakage between the sub-pixels 18 can be enabled. 2 At that time, for example, in order to determine the electrical and optical characteristics of these trenches, the trench depth d of the pixel element isolation layer 16 1 is selected to be greater than the trench depth d of the sub-pixel separation element 20. 2 Thereby, by making the depth d of the trench of the sub-pixel separation element 20 small, light leakage between the sub-pixels 18 can be enabled. 2 By making the depth d of the trench of the sub-pixel separation element 20 small, light leakage between the sub-pixels 18 can be enabled.

[0133] On the other hand, between the two pixel elements 12, both light leakage 30 and electrical leakage are prevented by making the trench d of the pixel element isolation layer 16 deep. According to one embodiment, the trench depth d of the sub-pixel separation element 20 1 is selected to be greater than the trench depth d of the sub-pixel separation element 20.2 is selected to pass through the region of the pn junction 28. This can advantageously prevent two adjacent sub-pixels 18 or related emitter chips 22 from electrically interacting with each other and / or prevent electrical or optical crosstalk from occurring.

[0134] In the above example, the pixel element isolation layer 16 extends through the active layer to the edge of the opposite emission surface but does not cut the surface. In this way, the region near the surface may be formed as a common contact that potentially connects all pixels and sub-pixels. Further, the pixel element isolation layer 16 may include a mirror layer so as to optically deflect the light generated by the pixel. In the example of FIG. 133, it is also shown that the sub-pixel isolation element 20 extends through the active layer but then immediately terminates. Thereby, electrical crosstalk is prevented, but optical crosstalk is not prevented. Depending on the design and manufacturing parameters, the sub-pixel isolation element 20 may extend only up to the same extent as the active layer or slightly enter it.

[0135] In this configuration, the pixel element isolation layer 16 and the sub-pixel isolation element 20 are configured as trenches having substantially vertical sidewalls, but the present invention is not limited thereto. For example, other shapes having additional functions such as light collimation or light guiding can be intentionally selected. An example in this regard is the slanted sidewalls of the pixel element isolation layer 16.

[0136] FIG. 7 shows a method 100 according to the present invention for calibrating the pixel element 12. In this regard, in the first step 110, the sub-pixels 18 of the pixel element 12 are driven and controlled as described above and below. The driving and control of this sub-pixel 18 are for enabling the test of the function of the sub-pixel 18. This can be done, for example, by a control signal of a driving and control electronic circuit, and as a result, it may be possible to individually contact and connect the individual sub-pixels 18. In the subsequent step 120, defect information of the sub-pixel 18 is detected. In other words, here, information on whether the sub-pixel 18 is functioning normally is generated.

[0137] Such defect information may be, for example, a flag or a specific value including information on the normal function of the sub-pixel 18. According to the next step 130, this defect information can be stored, for example, in a storage unit of the driving and control electronic circuit. Thereby, a defective sub-pixel can be corrected by appropriately adjusting the driving and control signals of the sub-pixels of the same wavelength related thereto, and the normal function of the entire pixel element 12 can be realized.

[0138] In one example, the sub-pixel separation element 20 may be configured to allow light leakage between sub-pixels 18 of the same color or wavelength, and the sub-pixel separation element 20 is configured to optically separate between sub-pixels 18 of different colors or wavelengths.

[0139] An enlarged view of a pixelated or other emitter in which optical and electrical leakage between pixels of an array is prevented by a pixel structure with a material bridge is shown in FIG. 8. This shows a cross-sectional view of a section of an array A in which two adjacent optoelectronic pixels P are connected by a material bridge.

[0140] Array A has two optoelectronic pixels P, which are generally planar and in the form of vertical LEDs. Each pixel P includes an n-type doped layer 1, a p-type doped layer 3, and an active zone 5 suitable for light emission. Between the two formed pixels P, the materials of the layer sequence are removed from the n-type doped side and the p-type doped side. Only the thin material transition part 9 with a maximum thickness d including the active layer 5 and the thin cladding layer 7 remains. From the perspective of manufacturing technology, the cladding layer can be formed from the same material as layer 3 or 5. This material transition part is considerably longer than its thickness. The thickness d c is selected such that electromagnetic waves do not propagate through the material transition part. In this way, the optical mode is suppressed. In other words, the electrical and / or optical conductivity of the material transition part 9 in FIG. 8 is effectively reduced in the horizontal direction. c The two main surfaces of the material transition part 9 exposed as a result of removing the materials of the layer sequence, and the exposed surface area 11 of the pixel P, are electrically insulated and passivated by respective passivation layers 13 having silicon dioxide in particular. Further, the region where the materials of the layer sequence are removed is filled with a filling material 15. Finally, the two main surfaces of the pixel P are electrically contact-connected by a contact layer 33 capable of forming end contacts. The contact layer 33 may have a transparent material, such as ITO, so that the light generated or received in the pixel P passes through the transparent material.

[0141] The active zone 5 includes structures such as one or more quantum wells. Its bandgap is adjusted to the desired wavelength of the emitted light. The maximum thickness d

[0142] is selected to prevent all fundamental modes from propagating to the next pixel P along the active zone 5 of the material transition part 9. Under this condition, the maximum thickness d of the active zone 5 of the material transition part 9 c is selected to prevent all fundamental modes from propagating to the next pixel P along the active zone 5 of the material transition part 9. Under this condition, the maximum thickness d of the active zone 5 of the material transition part 9 cIt depends on the refractive index difference between the active zone 5 of the material transition portion 9 corresponding to the waveguide and the cladding layer 7. Generally, this means that it is desirable for the material transition portion to be as thin as possible. Thereby, on the one hand, since waves cannot propagate horizontally, it becomes difficult for optical modes to leak. On the other hand, due to the small maximum thickness d c it becomes difficult for further electrical leakage to occur. The thin cladding layer 7 of the active zone 5 surrounding the active zone generally exhibits a high sheet resistance and can only conduct a small current. If it is made even thinner, the resistance also increases in this case, so electrical leakage decreases.

[0143] Furthermore, the maximum thickness d c depends on the refractive index and the thickness of the active zone 5. Here, the maximum thickness d c is equal to or greater than the thickness of the active zone 5. The maximum thickness d c also depends on the distance between adjacent pixels P. The longer the distance, the larger the maximum thickness d c can be. The recommended range of the maximum thickness d c is 100 nm to 4 μm, particularly 100 nm to 1 μm.

[0144] The thickness of each layer shown in FIG. 8 varies depending on the materials used including the doping material, the doping profile indicating the relationship between concentration and depth, the angle of the sidewalls, the pixel size, the gap between pixels, and the size of the entire array. The lower limit of the total thickness is about 100 nm.

[0145] Material systems suitable for pixel P include, for example, In(Ga,Al)As(Sb,P), SiGe, Zn(Mg,Cd)S(Se,Te), Ga(Al)N, HgCdTe. Materials suitable for contact layer 33 include metals such as Au, Ag, Ti, Pt, Pd, Cr, Rh, Al, Ni, either alone or as alloys with Zn, Ge, Be. Further, by using this material as filling material 15, in addition to the filling function, it can also serve as a bonding material. Moreover, materials with conductivity can also be expected to have properties such as reflectivity. For example, transparent conductive oxides such as ZnO or ITO (InSnO) can also be used as contact layer 33 for contact connection, providing a common contact to either the p-side or n-side of the array.

[0146] As transparent insulators, for example, dielectrics such as fluorides, oxides, and nitrides of Ti, Ta, Hf, Zr, Nb, Al, Si, Mg can be used. This material can be used for passivation layer 13. Further, this material can be used as filling material 15, and in this case, this material can also serve as an electrical insulator in addition to the filling function. The refractive index values of active zone 5 and cladding layer 7 completely depend on the materials used.

[0147] Maximum thickness d c also depends on the refractive index of the dielectric created by passivation layer 13 and / or filling material 15. The smaller the refractive index difference between active zone 5 and the dielectric, the larger the maximum thickness d c can be made to equalize the leakage.

[0148] FIG. 9 shows a second configuration example of the pixel array A in a cross-sectional view. The array A shown in FIG. 9 here is different from the array A shown in FIG. 8 in that a light absorption material 17 having a relatively small bandgap at least partially fills the region of the material from which the layer sequence has been removed. Further, since the passivation layer 13 is not formed in the material transition portion 9, the light absorption material 17 is directly adjacent to the material transition portion 9. Only the exposed surface region 11 of the pixel P is electrically insulated and passivated by the respective passivation layers 13. The material of the passivation layer may have, for example, silicon dioxide so that no electrical short circuit occurs between the materials 3 and 17.

[0149] Alternatively, in FIG. 9 - although not shown there - one side of the material transition portion 9 between two pixels P - only the upper or lower side in FIG. 9 - is filled with the light absorption material 17. On the other hand, for example, a filling material 15 is formed in the material transition portion 9 with the passivation layer 13 interposed therebetween. By using the light absorption material 17, light leakage is further suppressed. The light absorption material 17 between the pixels P absorbs the light emitted from the active zone 5 in the region of the material transition portion 9, thereby reducing the waveguide. Attenuation of the waveguide occurs along the material transition portion 9.

[0150] Suitable as the light absorption material 17 is a metal, alloy, dielectric or semiconductor having a bandgap smaller than the bandgap of the material transition portion 9 that initially functions as a waveguide. Thereby, the energy of the light also becomes larger and will be absorbed by the material 17. For example, a floating eye that absorbs 50% of the red wavelength can be used. The light absorption material 17 grows in the material transition portion 9, for example, by producing an epitaxial layer by CVD (chemical vapour deposition) or PVD (physical vapour deposition). Here, the light absorption material 17 was applied or grown on the cladding layer 7.

[0151] Figure 10A shows a third configuration example of the pixel array A according to the present invention in a cross-sectional view. At the position of the material of the layer sequence of the pixel array removed from the n-type doped side and / or p-type doped side, a material 19 with a refractive index increased compared to the removed material, particularly the doped material or the filling material 15, is formed. It is desirable that this refractive index does not become larger than the refractive index of the cladding layer 7 or the active zone 5. Thereby, the waveguide at the material transition portion 9 is also attenuated. Finally, the layer sequence on the substrate 35 is covered by a protective top layer 37.

[0152] The material 19 with an increased refractive index is epitaxially grown at the material transition portion 9, for example, by chemical or physical vapor deposition. The application or growth is performed after removing the original n-type doped and / or p-type doped layer material between two pixels P, respectively, and after passivating the exposed surface region 11 of the pixel P, particularly the side surface, by applying a passivation layer 13.

[0153] Here, the material 19 with an increased refractive index is applied or grown on the cladding layer 7. The passivation layer 13 is not formed at the material transition portion 9. This represents the region below the material transition portion 9. For example, GaAs may be grown as the material 19 with an increased refractive index on the active zone 5 of the material transition portion 9 having AlGaAs. Alternatively, the material 19 with an increased refractive index is formed by diffusing or injecting a material 21 for increasing the refractive index up to the cladding layer 7 or into the filling material 15 within the cladding layer 7. This is represented by the region above the material transition portion 9 in FIG. 10A. The material 19 with an increased refractive index may be formed above and / or below the material transition portion 9 in FIG. 10A. The region without the material 19 having a large refractive index may be filled with the filling material 15.

[0154] Figure 10B shows a simulation of light propagation in the region of the material transition part of a third configuration example of a pixel array according to the proposed principle. A cross-sectional view of the material transition part 9 filled with the material 19 with increased refractive index, where only the upper side is etched, is shown. The material 19 with increased refractive index has the same refractive index as the quantum well material 5. That is, in this graph, the active zone 5 and the material 19 with increased refractive index are shown in dark gray. The non-etched semiconductor material of the cladding layer 7 or the n-type doped layer 1 and the filling material 15 are shown in white.

[0155] In this simulation, the layer with a thickness of several 0.1 μm is the region of the active zone 5 or the quantum well material. The layer with a thickness of 0.05 μm is still the "residual cladding" or the "residual cladding layer 7". The layer with a thickness of 1 μm is the material 19 with increased refractive index. Depending on the distance between the LED and the selected material, the individual sections can be enlarged or reduced.

[0156] In the region of the material transition part 9 between two pixels P, the active zone 5 with a refractive index of 3.5 and a layer thickness of 0.1 μm is arranged on the non-etched n-type doped layer 1 with a refractive index of 3 on the lower side. On this first inner layer, as the second inner layer of the material transition part 9, a cladding layer 7 with a refractive index of 3 is formed with a layer thickness of 0.05 μm. On the cladding layer 7, a relatively thick third inner layer of the material 19 with a refractive index increased to 3.5 and a layer thickness of 1 μm is formed. The third inner layer is covered with a layer having a filling material 15 with a refractive index of, for example, about 3.

[0157] In the simulation of this layer structure, the wavelength of the vacuum light is assumed to be 0.63 μm. The light generated here may be TM polarized and / or TE polarized. When the direction of the magnetic field is perpendicular to the plane (the "incidence plane") formed by the incident vector and the surface normal, it is called TM polarization (TM = transverse magnetic field), and when the electric field is perpendicular to the incidence plane, it is called TE polarization (TE = transverse electric field).

[0158] In this simulation, FIG. 10B shows the value of the spatial extent x in μm along the x-axis. The y-axis shows the value of the y-component of the electric field strength E. FIG. 10B shows that the fundamental mode TE0 is generated from the active zone 5 and is stopped by an additional optical barrier existing between two pixels P above and / or below the material transition section 9 that functions as a waveguide. The optical barrier is here the interface between layers with different refractive indices according to the layer structure of FIG. 10A described above. The fundamental mode TE0 enters the thick third inner layer of the material 19 with an increased refractive index and does not enter the adjacent pixels P.

[0159] In practice, materials with a large refractive index are often highly absorptive materials, especially because of their small bandgap.

[0160] FIG. 11 shows a cross-sectional view of a fourth configuration example of the pixel array A. In FIG. 11, the same reference numerals as in the other figures denote the same features. In contrast to the structure described in FIG. 8, additional materials 23, 24 are introduced into the active zone 5 of the material transition section 9 between the two filling layers 15 and the two passivation layers 13 here, which effectively reduces the electrical and / or optical conductivity of the material transition section 9 that functions as a waveguide. The additional material is, on the one hand, a material 23 that enhances the light absorption in the active zone 5 of the material transition section 9. The increase in absorption in the active zone 5 between the pixels P is achieved by reducing the bandgap of the material in the active zone 5. For this purpose, an element that reduces the bandgap is implanted or diffused into the active zone 5 of the material transition section 9. In particular, dopants are diffused or implanted into the central region of the active zone 5 between the pixels P. The reduction of the bandgap is performed by so-called bandgap narrowing. The greater the amount of the material 23 introduced along the material transition section 9, the greater the light absorption in the active zone 5.

[0161] Alternatively or additionally, the additional material is, on the other hand, a material 24 that increases the electrical resistance within the active zone 5 of the material transition section 9. For this purpose, an element that increases the electrical resistance is implanted or diffused into the active zone 5 of the material transition section 9. This further increase in electrical resistance serves to further reduce the electrical crosstalk from one pixel P to an adjacent pixel P. For example, in order to increase the electrical resistance, Fe may be introduced into the active zone 5 of the material transition section 9 having InGaAsP. The greater the amount of the material 24 introduced along the material transition section 9, the greater the increase in the electrical resistance of the active zone 5 of the material transition section 9 between the two pixels P.

[0162] Both materials 23 and 24 are diffused or implanted into the active zone 5 of their respective material transition sections 9 prior to the application of the passivation layer 13.

[0163] FIG. 12A shows a further configuration example of the pixel array A in a cross-sectional view. In contrast to the structure of FIG. 8, an optical structure 25 is introduced into the region of the material transition section. The structure 25 is introduced between the two filling layers 15 and the two passivation layers 13 along the active zone 5 of the material transition section 9. Thereby, the optical conductivity of the material transition section 9 that functions as a waveguide between the two pixels P is reduced. The waveguide is reduced. The optical structure 25 may be a dielectric structure such as a photonic crystal or a Bragg mirror. The structure 25 forms a periodic refractive index structure along the material transition section 9 on the upper side, lower side or both sides of the active zone 5, and as a result, an optical bandgap is generated and the propagation of photons along the material transition section is prevented.

[0164] The periodicity of the optical structure depends on the wavelength of light, the size of the optical structure, the length of the patterned material transition section 9, and the refractive index of the material used. In FIG. 12A, only one optical structure 25 is shown below the material transition section 9 that functions as a waveguide. This optical structure 25 may also be formed above the material transition section 9 that functions as a waveguide. The optical structure 25 shown in FIG. 12A is a Bragg mirror. After forming the optical structure 25, the passivation layer 13 is applied.

[0165] What is shown in Fig. 12B is on the extension line of the example of Fig. 12A. The conversion materials 41 or 42 are applied on the surface. Each of the conversion materials 41 and 42 reaches approximately the center between the two LEDs. Since the wall of the LED itself is reflective, the light generated in the active layer of the LED is directed by the wall towards the conversion material. The light incident on the conversion material from the LED is converted there. By providing an optional reflective layer between the conversion materials, crosstalk can be prevented.

[0166] On the surface of the conversion material of each pixel, photonic structures 34 and 37 for guiding light are deposited. Alternatively, a dielectric mirror may be provided as described above.

[0167] Fig. 13 shows a sixth configuration example of the pixel array A according to the present invention in a cross-sectional view. In contrast to the structure described in Fig. 13, here, in the two filling layers 15, along the active zone 5 of the material transition portion 9 that functions as a waveguide, two opposing electrical contacts 27 are further introduced on both main surfaces of the material transition portion 9 that functions as a waveguide, thereby effectively reducing the electrical and / or optical conductivity of the material transition portion 9 that functions as a waveguide between the two pixels P. These opposing electrical contacts 27 apply an electrical bias to both main surfaces of each material transition portion 9 between the two pixels P.

[0168] An electrostatic field is generated by the applied electrical bias, whereby the optical characteristics of the material transition portion 9 that initially functions as a waveguide change such that the waveguide along the material transition portion 9 effectively decreases.

[0169] When an electric bias is applied to the material transition portion 9 between the pixels P that initially function as waveguides, the absorption of light in the waveguide is increased by the so-called "quantum confinement Stark" effect (QCSE), which is used, for example, in an electro-absorption modulator. In an electro-absorption modulator, by applying an electric field, the fundamental absorption of the semiconductor is effectively increased. Accordingly, the optical crosstalk between the pixels P is reduced. As the electrical contact 27, a conventional Schottky contact or a metal-insulator contact is suitable. Furthermore, all those conventionally used for bending the strip piece without passing a current are suitable.

[0170] After forming two mutually opposing electrical contacts 27, a passivation layer 13 is applied to these two mutually opposing electrical contacts 27, particularly to the surface on which the filling material 15 is formed and which is adjacent to the pixel P. The same reference numerals as in FIGS. 8 to 12A indicate the same features in FIG. 13.

[0171] FIG. 14 shows a seventh configuration example of the pixel array A according to the present invention in a cross-sectional view. In contrast to the configuration of FIG. 13, here the electric field is generated intrinsically, that is, by selecting an appropriate material system. For this purpose, at least one layer of the n-type doped material 29 and / or the p-type doped material 31 is arranged on at least one of the two main surfaces of the material transition portion 9 so that an electric field is generated thereby, and as a result, the electric field is introduced into the material transition portion 9 without further means. When only the layer of the doped material is formed on one of the two main surfaces of the material transition portion 9 and the layer on the other main surface of the material transition portion 9 is not doped, a so-called depletion electric field sufficient as an electric field for increasing the light absorption in the material transition portion 9 is supplied. Alternatively, the electric field for increasing the light absorption in the material transition portion 9 is generated by forming a layer 29 of the n-type doped material on one main surface of the material transition portion 9 and forming a layer 31 of the p-type doped material on the opposite main surface of the material transition portion 9.

[0172] The materials used to supply the electric field, particularly the n-type doped material 29, the p-type doped material 31, and optionally the undoped material, are epitaxially grown by CVD (Chemical Vapor Deposition) or PVD (Physical Vapor Deposition), and a built-in bias is supplied between adjacent pixels P on the thin waveguide. For n-type and p-type doping, for example, Si and Zn can be doped into InGaAlP.

[0173] The doped materials 29 and / or 31 supply a bias having the same effect as the configuration shown in FIG. 13. Further, since no passivation layer 13 is required at the material transition portion 9, the material for supplying the electric field is directly adjacent to the material transition portion 9. Only the exposed surface region 11 of the pixel P is electrically insulated and passivated by the respective passivation layer 13. The material of this layer may have, for example, silicon dioxide. The pixel P is electrically connected by the electrical contact layer 33.

[0174] FIG. 15 shows a cross-sectional view of an eighth configuration example of the pixel array A. In this case, the active zone 5 is etched in a controlled manner. In other words, the formation of defects in the active zone 5 or damage to the active zone 5 in the region of the material transition portion is permitted here in a controlled manner. According to FIG. 15, the material transition portion 9 completely interrupts at its center two pixels P in which the material transition portion 9 is formed. The transition portion to the two pixels P has a material transition portion 9 with a maximum thickness d c formed.

[0175] FIG. 16 shows a ninth configuration example of the pixel array A. On the left side, two different configuration examples for suppressing crosstalk between two adjacent pixels P are shown in cross-sectional views. The upper modification V1 shows the first configuration example described in FIG. 8, and the lower modification V2 shows the fourth configuration example described in FIG. 12A. On the right side, a plan view of four adjacent pixels P is shown.

[0176] Each pixel P has four adjacent pixels P assigned to it, and according to the second modification V2, here a material transition portion 9 is formed along the x direction. According to the first modification V1, the material transition portion 9 is formed along the y direction. In principle, especially according to the configuration examples described in the present application, each material transition portion 9 may be configured differently from other material transition portions 9. In principle, the material transition portions 9 may have the same configuration along each spatial direction. The material transition portion 9 may be formed according to a desired pattern. The configuration forms of the material transition portions 9 along each spatial direction may appear alternately.

[0177] In this way, the array A described in the present application includes not only combinations of configuration examples of the material transition portion 9, but also all possible configuration examples or modifications. Based on the plan view of FIG. 16, it can be seen that, for example, all combinations of the modifications V are possible according to the direction. This also applies to all possible shapes of the pixel P, and the pixel P may be rounded or angular, but in this case it is particularly rectangular.

[0178] FIG. 17 shows a configuration example of the method according to the present invention for manufacturing the pixel array A. The method for manufacturing the array A of optoelectronic pixels P has the following steps. In the first step S1, an overall planar layer sequence of the n-type doped layer 1 and the p-type doped layer 3 is fabricated along the array A, and an active zone 5 is formed therebetween. In the present application, various techniques are described and disclosed.

[0179] In the second step S2, between the pixels P to be formed, the material of the layer sequence is removed from the n-type doped side and the p-type doped side, particularly by etching. This is done so that at least the active zone remains as the material transition portion. Similarly, the thin cladding layer 7 can also be left on the upper side, lower side or both sides of the active zone 5 of the material transition portion 9. Therefore, the thickness d c is significantly reduced, and the optical mode cannot propagate in the lateral direction between the pixels. Similarly, since the resistance value is high, the electrical leakage is also reduced. Overall, the electrical and / or optical conductivity of the material transition portion 9 is reduced.

[0180] Thickness d c is a sufficient thickness required according to the specifications of the array A and the specifications of the desired device such as luminance or response sensitivity. The thickness of the region of the material transition portion depends particularly on the material system and the wavelength of the emitted light.

[0181] In one aspect, etching is performed from both sides up to or within the thin cladding layer 7 on each side of the active zone 5, or up to the active zone 5 so as to prevent all the fundamental modes from propagating to the nearest pixel P along the active zone 5. The maximum thickness d of the active zone 5 of the material transition portion 9 under this condition c depends on the refractive index difference between the active zone 5 and the cladding layer 7 of the material transition portion 9 that functions as a waveguide.

[0182] The maximum thickness d c is reduced, more light is emitted from the waveguide, so that optical crosstalk is reduced. Furthermore, reducing the thickness d c means reducing electrical crosstalk. The thin undoped cladding layer 7 of the active zone 5 remaining between the individual pixels P can hardly conduct current. Therefore, electrical crosstalk is reduced.

[0183] In further steps S3 to S5, after etching, the individual pixels P and the waveguide can be covered with other necessary materials to further suppress optical and / or electrical crosstalk outside the waveguide. In step S3, the exposed main surface of the material transition portion 9 and the exposed surface region 11 of the pixel P are electrically insulated and passivated by respective passivation layers 13 having particularly silicon dioxide. Depending on what measures are taken in the fourth step S4 to reduce crosstalk, the electrical insulation and passivation of the exposed main surface of the material transition portion 9 can be omitted.

[0184] In the fourth step S4, the removed material is at least partially replaced, for example, by the filling material 15, from the n-type doped side and / or the p-type doped side. In step S5, a contact layer 33 is formed on the main surface of the pixel P to electrically connect the structure. According to one configuration, steps S1 to S5 are first performed on one main surface of the array, and then on the other main surface of the array after substrate replacement.

[0185] To further reduce optical and / or electrical crosstalk, in addition to forming the material transition portion 9 having the maximum thickness d c further measures can be taken in the fourth step S4. Here, several examples are given, but other examples are described above for various configurations. Thus, the region of the removed material from the n-type doped side and / or the p-type doped side can be alternatively filled with the light-absorbing material 17 and / or the material 19 with an increased refractive index instead of the filling material 15. In this case, the passivation layer 13 is not formed on the material transition portion 9.

[0186] Furthermore, in the fourth step S4, alternatively or additionally, the light absorption and / or the electrical resistance of the active zone 5 can be increased. In this case, it is also desirable to apply the passivation layer 13 to the material transition portion 9.

[0187] By applying these concepts, an array A of optoelectronic pixels P, particularly emitter arrays and detector arrays, can be manufactured without causing optical and electrical crosstalk and without causing performance and reliability problems compared to solutions with etched active zones, without performing etching through the active zone 5.

[0188] High-resolution, particularly monolithic-structured display arrangement structures are of interest in various applications. For displays having light sources of pixel size, so-called matrix-type displays based particularly on GaN or InGaN have been proposed.

[0189] Figure 18 shows, as a first configuration example, a cross-sectional view of a display arrangement structure including an IC substrate component and a monolithic pixelated optochip placed thereon. An IC substrate component 1 is shown, which includes monolithic integrated circuits 2.1, 2.1, 2.3 and IC substrate contacts 3.1, 3.2, 3.3 driven and controlled thereby. The IC substrate component 1 can have a control circuit, a power supply circuit, and further components for signal exchange with peripheral devices, and here, an interface 23 is shown as an example.

[0190] The IC substrate contacts 3.1, 3.2, 3.3 are made of metal and are separated by insulating layers respectively. A monolithic pixelated optochip 4 is placed on the IC substrate component 1 and is electrically and mechanically connected to the contacts 3.1, 3.2, 3.3 of the IC substrate. More precisely, contacts 22.1, 22.2 and 22.3 are introduced onto the surface of the pixelated optochip 4 so as to face the IC substrate contacts 3.1, 3.2, 3.3 when accurately placed on the IC. As shown in the figure, since the contacts are all the same size, even a small offset as shown has no adverse effect and short circuits are avoided. Various techniques for such connections are disclosed in the present application.

[0191] The monolithic pixelated optochip 4 includes a semiconductor layer sequence 5 having a first semiconductor layer 6 doped with p-type and a second semiconductor layer 7 doped with n-type. Here, the first semiconductor layer 6 and the second semiconductor layer 7 are applied over a large area and extend substantially over the entire monolithic pixelated optochip 4 in the lateral direction perpendicular to the stacking direction 8. Although not shown in detail, there are configuration variations of the semiconductor layers 6, 7 having a plurality of individual layers with different doping thicknesses or different semiconductor materials. There is an active layer having quantum wells, not shown in detail, between the first semiconductor layer 6 and the second semiconductor layer 7, and in that region, an active zone 24 is formed that emits electromagnetic radiation when current flows through the semiconductor layer sequence 5 in the stacking direction 8.

[0192] On the front surface 17 above the semiconductor layer sequence 5, a transparent contact layer 16 made of, for example, ITO (indium tin oxide) is two-dimensionally and flatly applied. In this configuration example, in order to obtain an LED 9 with a pixel size P having a diagonal size of 200 μm to 1200 μm, the first light source contacts 10.1, 10.2, 10.3 on the lower side of the first semiconductor layer 6 facing the IC substrate component 1 are much smaller than the pixel size P. In this configuration example, the maximum diagonal MD of the 20-μm first light source contacts 10.1, 10.2, 10.3 is selected so that the characteristic that the projected area 13 of the first light source contacts 10.1, 10.2, 10.3 on the LED back surface 12 is at most half of the area of the LED back surface 12 is satisfied. In this configuration example, the projected area 13 is about 5% of the area of the LED back surface 12 when the diagonal is 20 μm. As a result, a laterally restricted current path 25 is formed in the LED 9 between the first light source contact 10.2 and the second light source contact 11 formed by a part of the transparent contact layer 16, thereby generating a laterally restricted active zone 24. Further, non-radiative recombination is suppressed at the edge of the active zone 24. To improve the lateral restriction of the current path 25, preferably, the dopants of the first semiconductor layer 6 and the second semiconductor layer 7 are selected to have a p-type or n-type conductivity smaller than these are 10 4 Sm -1 smaller than, preferably 3·10 3 Sm -1 smaller than, more preferably 10 3 Sm -1 selected to have a smaller p-type or n-type conductivity. Further, it is advantageous to select a small layer thickness SD of the first semiconductor layer 6. In this case, the layer thickness SD of the first semiconductor layer 6 in the stacking direction 8 is preferably at most 10 times, preferably at most 5 times, the maximum diagonal MD of the first light source contacts 10.1, 10.2, 10.3 in the lateral direction.

[0193] According to the present invention, the first light source contact 10.2 is surrounded in the lateral direction perpendicular to the stacking direction 8 by backside absorbers 15.1, 15.2 having an optical blocking effect, where the backside absorbers 15.1, 15.2 preferably consist of silicon, germanium or gallium arsenide and / or have an intercalation of graphene or carbon black particles. It can be seen from the optical path 26 shown in FIG. 19 of the first configuration example that this measure reduces crosstalk from the driven LED 9 to adjacent pixels.

[0194] In the second configuration example shown in FIG. 20, the same reference numerals are used for the components that coincide with the first configuration example. Shown is a three-dimensional structure on the upper side of the second semiconductor layer 7, which improves the extraction of light to the front surface 17. It can be seen that the degree of total reflection is lower and the extraction cone is larger. In an alternative configuration not shown in detail, a Fresnel lens structure is provided on the front surface 17. In another option, a photonic crystal structure is arranged on the surface.

[0195] In the fourth configuration example shown in FIG. 21, the front-side absorbers 21.1, 21.2, 21.3, 21.4 surrounding the second light source contacts 11.1, 11.2, 11.3 laterally further reduce the light crosstalk between adjacent LEDs 9. If the front-side absorbers 21.1, 21.2, 21.3, 21.4 are formed to be electrically insulating, the lateral restriction of the current path for localizing the active zone 24 can be further improved.

[0196] In the configuration example shown in the figure, optochip contact elements 22.1, 22.2, 22.3 are arranged between the first light source contacts 10.1, 10.2, 10.3 and the respective associated IC substrate contacts 3.1, 3.2, 3.3. Since the cross-sectional area of the optochip contact elements 22.1, 22.2, 22.3 is larger than the cross-sectional area of the first light source contacts 10.1, 10.2, 10.3, it becomes possible to simply make contact and connect the monolithic pixelated optochip 4 onto the IC substrate component 1.

Claims

1. An optoelectronic component, comprising: at least one semiconductor device having an active zone configured to generate light; a dielectric filter disposed on a first main surface of the at least one semiconductor element and configured to transmit light only in a predetermined direction; a reflective material disposed on at least one side of the at least one semiconductor element and at least one side of the dielectric filter; An optoelectronic structural element comprising:

2. 2. An optoelectronic component according to claim 1, wherein at least one side surface of said at least one semiconductor element extends obliquely at the height of said active zone.

3. the at least one semiconductor element having a first terminal and a second terminal; 3. An optoelectronic component according to claim 1, wherein the reflective material is electrically conductive and is coupled to a first terminal of the at least one semiconductor element.

4. 4. An optoelectronic component according to claim 3, wherein the reflective material is made electrically conductive only on two opposite sides of the light source so as to contact the first terminal for supplying electrical current.

5. 5. An optoelectronic component as claimed in claim 4, characterized in that the reflective material is made non-conductive on the other two sides so that it is insulated from the terminals for the current supply.

6. 6. An optoelectronic component as claimed in claim 1, wherein the dielectric filter is at least partially formed in a layer of the semiconductor component adjacent in the radial direction.

7. 7. An optoelectronic component as claimed in claim 1, wherein the dielectric filter comprises first and second regions with different refractive indices, the conversion material forming the first regions.

8. the at least one semiconductor element has a second main surface opposite the first main surface; 8. An optoelectronic component as claimed in claim 1, further comprising a reflecting layer disposed beneath the second main surface of the at least one semiconductor component.

9. 9. An optoelectronic component according to claim 1, wherein the reflective layer is at least partially electrically conductive and is coupled to a second terminal of the at least one semiconductor component.

10. 9. An optoelectronic component according to claim 8, wherein the reflective layer is electrically insulating and one or more conductive layers are arranged above and / or below the reflective layer.

11. 11. The optoelectronic component according to claim 1 , wherein an electrically insulating first material is arranged between the reflective material and the reflective layer, in particular the electrically insulating first material having a lower refractive index than the at least one semiconductor element.

12. 12. An optoelectronic component as claimed in claim 1, further comprising a surface-roughened layer disposed between the at least one semiconductor component and the dielectric filter.

13. The optoelectronic component is a conversion material at the light output surface, the conversion material comprising an inorganic dye or quantum dots; or a conversion material between the dielectric filter and the semiconductor material, the conversion material comprising an inorganic dye or a quantum dot; 13. An optoelectronic component according to claim 1, further comprising:

14. 14. An optoelectronic component as claimed in claim 1, wherein the first main surface of the at least one semiconductor element has a roughened surface.

15. 15. An optoelectronic component as claimed in claim 1, wherein the at least one semiconductor element has a lateral extent of at least 140 μm and / or a height of at least 5 μm.

16. 16. An optoelectronic component according to claim 1, wherein the at least one semiconductor element comprises a plurality of semiconductor elements arranged in an array, adjacent semiconductor elements being separated from each other by a reflective material.

17. 12. An optoelectronic component according to claim 11, wherein the reflective material is electrically conductive and the first terminals of the semiconductor elements are connected to a common external terminal via the reflective material.

18. 18. The optoelectronic component according to claim 1 , wherein the at least one semiconductor element comprises a plurality of semiconductor elements arranged side by side, and an electrically insulating second material is arranged between adjacent semiconductor elements.

19. 19. An optoelectronic component according to claim 1 , wherein the reflective material is electrically conductive and above and / or below and / or within the electrically insulating second material are extending conductor tracks which connect the first terminals of the semiconductor components to a common external terminal.

20. 20. An optoelectronic component as claimed in claim 1, wherein the second terminals of the semiconductor components are individually controllable.

21. 21. The optoelectronic component according to claim 1, further comprising a lens arranged above the dielectric filter.

22. A method for manufacturing an optoelectronic component, comprising the steps of: Providing at least one semiconductor component according to any one of the preceding or following claims, the semiconductor component having an active zone configured to generate light; disposing a dielectric filter over a first major surface of the at least one semiconductor device, the dielectric filter being configured to transmit light only in a predetermined direction; disposing a reflective material on at least one side of the at least one semiconductor element and on at least one side of the dielectric filter; A method comprising:

23. A pixel element comprising an optoelectronic structural element for generating a pixel of a display, the pixel element comprising: said pixel being formed from at least two sub-pixels, in particular two sub-pixels emitting the same colour, in particular each sub-pixel being formed by an optoelectronic component, A subpixel separation element is provided between two adjacent subpixels of the same pixel element; The subpixel separation elements are configured to provide isolation with respect to electrical drive control of respective subpixels and to provide optical coupling with respect to light emitted by each of the subpixels.

24. 24. The pixel of claim 23, wherein said subpixels have a common epitaxial layer, and said subpixel separation elements extend in the epitaxial layer as trenches laterally to a plane of the epitaxial layer in a primary emission direction.

25. 25. The pixel according to claim 23 or 24, wherein the sub-pixels of the pixel are electrically contactable and / or drivable independently of one another.

26. 26. The pixel of any one of claims 23 to 25, wherein at least two of the sub-pixels have a common active layer separated by the sub-pixel separation element.

27. 27. The pixel of any one of claims 23 to 26, wherein the subpixel separation element extends into an active layer of the pixel or extends at least partially through the pixel.

28. 28. The pixel according to any one of claims 23 to 27, wherein the subpixel separation elements are formed by quantum well intermixing caused by diffused dopants, particularly in the region of the active layer.

29. 29. The pixel of any one of claims 23 to 28, wherein the pixel further comprises a lens extending across a surface of the pixel.

30. 30. The pixel of any one of claims 23 to 29, further comprising a transparent conductive layer formed thereon.

31. 31. The pixel according to any one of claims 23 to 30, wherein at least one contact surface for contact-connecting at least one sub-pixel is provided on a surface opposite to the light exit surface.

32. A display arrangement structure having a plurality of pixels according to any one of claims 23 to 31, A display arrangement structure, comprising: a pixel element isolation layer provided between two adjacent pixels; the pixel element isolation layer configured to electrically isolate the adjacent pixels with respect to drive control of each pixel, and to optically isolate the adjacent pixels with respect to light emitted by the pixels.

33. 33. The display arrangement structure of claim 32, wherein the pixel and the associated sub-pixel have a common epitaxial layer, and the pixel element isolation layer extends in a trench shape within the epitaxial layer laterally to the epitaxial layer plane in a primary emission direction.

34. 34. The display arrangement structure of claim 32 or 33, wherein a trench depth d1 of the pixel element isolation layer is greater than a trench depth of the sub-pixel isolation element.

35. 35. A display arrangement structure according to any one of claims 32 to 34, wherein adjacent pixels or sub-pixels comprise active layers separated by a pixel element isolation layer and / or a sub-pixel isolation element.

36. The display arrangement structure further comprises a carrier layer having contact areas corresponding to the contact areas of the pixels, the carrier layer comprising the following elements: A conductive line for supplying a current to the pixel; a current driver or supply circuit; and A control circuit for adjusting the brightness 36. The display arrangement structure according to claim 32, further comprising at least one of:

37. A method for calibrating a pixel, comprising the steps of: - driving a sub-pixel of a pixel according to any one of claims 23 to 31; Detecting sub-pixel defect information; storing said defect information in a storage unit of said control unit; A method comprising:

38. 38. The method of claim 37, wherein the drive control, sensing and storage are performed sequentially for all individual sub-pixels of a pixel.

39. An array having at least two optoelectronic structural elements, each structural element between an n-doped layer and a p-doped layer forming an active zone suitable for emitting light, Between two adjacently formed optoelectronic components, from the n-doped side and the p-doped side to the cladding layer or into the cladding layer, or to the active zone or at least partially into the active zone, a maximum thickness d c material of the layer sequence is interrupted or removed so as to form a material transition of the layer sequence, which reduces electrical and / or optical conductivity at the material transition. An array comprising:

40. 40. The array of claim 39, wherein the material transition comprises the active zone and a residual layer of reduced thickness on at least one side of the active zone.

41. 41. The array of claim 39 or 40, wherein the removed material is at least partially replaced with a filler material.

42. 42. The array of any one of claims 39 to 41, wherein the removed material is at least partially replaced with a material that has a relatively small band gap and thus absorbs light of the active zone.

43. Array according to any one of claims 39 to 42, wherein the removed material is at least partially replaced with a material having a high refractive index, in particular a refractive index higher than that of the doped or filled material.

44. Array according to any one of claims 39 to 43, wherein the light absorbing material and / or the material having a high refractive index is applied to each material transition.

45. Array according to any one of claims 39 to 44, wherein the material having a high refractive index is formed by diffusing or injecting a material that increases the refractive index into the filling material, in particular up to the respective cladding layer.

46. 46. ​​The array of any one of claims 39 to 45, wherein a material that enhances optical absorption and / or a material that enhances electrical resistance is diffused or implanted into the active zone of each material transition.

47. Array according to any one of claims 39 to 46, wherein at least one optical structure, in particular a photonic crystal and / or a Bragg mirror, is fabricated along, on or within the material transition.

48. 48. The array of claim 39, wherein an electrical bias is applied to the two major surfaces of the material transitions by two opposing electrical contacts to generate an electric field through each material transition.

49. 49. The array of claim 39, wherein an electric field is generated through each material transition by n-type doped material and / or p-type doped material applied or grown on at least one of the two major surfaces of the material transition.

50. 50. An array as claimed in any one of claims 39 to 49, wherein the exposed main surfaces of the material transitions and / or the exposed surface areas of the optoelectronic components are electrically insulated and passivated by respective passivation layers, in particular comprising silicon dioxide.

51. 51. The array of any one of claims 39 to 50, wherein the main surfaces of the optoelectronic components are electrically contacted by a contact layer.

52. Array according to any one of claims 39 to 51, characterized in that the materials and / or the material transitions between adjacent optoelectronic components are configured differently from one another, in particular directionally.

53. 53. The array of any one of claims 39 to 52, wherein the array further comprises a conversion material applied to a surface facing the primary direction of radiation.

54. A method for manufacturing an array of optoelectronic pixels, comprising the steps of: providing along the array a generally planar layer sequence of n-type doped layers and p-type doped layers forming therebetween an active zone suitable for emitting light; - removing at least partially the material between adjacent pixels to be formed from the n-doped and p-doped sides, thereby forming a maximum thickness d ｃ leaving a material transition of said pixel area to reduce electrical and / or optical conductivity between adjacent pixels; A method comprising:

55. 55. The method of claim 54, wherein the step of removing material comprises removing a layer sequence from the n-type doped side and the p-type doped side down to or into an undoped cladding layer, or up to or at least partially into the active zone.

56. 55. The method of claim 54, wherein material removed from the n-type doped side and / or the p-type doped side is at least partially replaced with a fill material.

57. 57. The method of any one of claims 54 to 56, wherein the material removed from the n-doped side and / or the p-doped side is at least partially replaced with a material that has a relatively small band gap and thus absorbs light of the active zone.

58. 58. The method according to any one of claims 54 to 57, wherein the material removed from the n-doped side and / or the p-doped side is replaced with a material having a high refractive index, in particular a refractive index higher than the refractive index of the doped material or the filling material.

59. 60. The method according to any one of claims 54 to 58, wherein the light absorbing material and / or the material having a high refractive index is applied to each material transition.

60. 60. The method according to any one of claims 54 to 59, wherein the material having a high refractive index is formed in the filling material by diffusion or injection, in particular up to the respective cladding layer.

61. 61. The method according to any one of claims 54 to 60, wherein a material that increases light absorption and / or a material that increases electrical resistance from the n-type doped side and / or the p-type doped side is diffused or implanted into the active zone.

62. 62. The method according to claim 54, wherein at least one optical structure, in particular a photonic crystal and / or a Bragg mirror, is fabricated along the material transition from the n-doped side and / or the p-doped side, on or within the material transition.

63. 63. The method of any one of claims 54 to 62, wherein two opposing electrical contacts are formed from the n-type doped side and / or the p-type doped side, and an electrical bias is applied to the two major surfaces of the material transition to generate an electric field through each material transition.

64. 64. The method of any one of claims 54 to 63, wherein an electric field is introduced through each material transition by n-type doped material and / or p-type doped material applied or grown on at least one of the two major surfaces of the material transition.

65. 65. The method according to any one of claims 54 to 64, comprising electrically insulating and passivating the exposed main surface of the material transition and / or the exposed surface areas of the pixels by a respective passivation layer, in particular comprising silicon dioxide.

66. 66. A method according to any one of claims 54 to 65, wherein the method comprises electrically contacting a main surface of the pixel by a contact layer.

67. 67. Method according to any of claims 54 to 66, wherein the materials and / or material transitions between the pixel and its neighbouring pixels are made different from each other, in particular depending on the direction.

68. 68. A method according to any one of claims 54 to 67, wherein the steps are first performed on one major surface of the array and then, after a substrate exchange, on the other major surface of the array.

69. A display arrangement structure, comprising: an IC substrate component having a monolithic integrated circuit and IC substrate contacts arranged in a matrix; A monolithic pixelated optochip comprising a semiconductor layer sequence with a first semiconductor layer having a first doping and a second semiconductor layer having a second doping, the polarity of the charge carriers of the first semiconductor layer being different from the polarity of the charge carriers of the second semiconductor layer, the semiconductor layer sequence defining a stacking direction; Including, In the monolithic pixelated optochip, optoelectronic components are arranged in a matrix, A display arrangement structure, in which each optoelectronic component has a back surface facing the IC substrate part and a first light source contact, the first light source contact being adjacent in contact with the first semiconductor layer and electrically connected to a respective one of the IC substrate contacts, The projected area of ​​the first light source contact on the rear surface corresponds to at most half the area of ​​the rear surface; The first light source contact is surrounded by a rear absorber in a lateral direction perpendicular to the stacking direction. A display arrangement structure comprising:

70. The first semiconductor layer and the second semiconductor layer are ４ Sm －１ Less than 3.10 ３ Sm －１ less than 10 ３ Sm －１ 70. The display arrangement structure of claim 69, having a p-type or n-type conductivity of less than 100 .mu.m.

71. 71. A display arrangement structure according to claim 69 or 70, wherein the layer thickness of the first semiconductor layer in the stacking direction is at most 10 times, preferably at most 5 times, the maximum diagonal of the first light source contact in the lateral direction.

72. 72. A display arrangement structure according to any one of claims 69 to 71, wherein the pixel size of the optoelectronic components is greater than 100 μm, in particular greater than 120 μm, in particular in the range from 200 μm to 1000 μm.

73. 73. A display arrangement structure according to any one of claims 69 to 72, wherein the projected area of ​​the first light source contact on the rear surface corresponds to at most 25%, preferably at most 10% of the area of ​​the rear surface.

74. 74. A display arrangement structure according to any one of claims 69 to 73, wherein the rear absorber extends into the semiconductor sequence in a stacking direction.

75. 75. A display arrangement structure as claimed in any one of claims 69 to 74, wherein a second light source contact made of a transparent material is arranged in the stacking direction on the second semiconductor layer of each optoelectronic component, the light source contact being electrically connected to a transparent contact layer on the front side of the monolithic pixelated optochip.

76. 76. The display arrangement structure of claim 75, wherein the second light source contact is formed by the transparent contact layer itself.

77. 77. A display arrangement structure as claimed in any one of claims 69 to 76, wherein the second light source contact is adjacent to a transparent contact layer, and the second light source contacts of adjacently arranged optoelectronic components are separated from each other by a front absorber in a lateral direction pointing perpendicular to the stacking direction.

78. 78. A display arrangement structure according to any one of claims 69 to 77, wherein the front absorber extends against the stacking direction up to, preferably into, the second semiconductor layer.

79. 79. A display arrangement structure as claimed in any one of claims 69 to 78, wherein, in the stacking direction, an optochip contact element having a larger cross-sectional area than the first light source contact is adjacent to the first light source contact below the first light source contact.

80. 80. The display alignment structure of any one of claims 69 to 79, further comprising a light conversion element on a surface of the monolithic pixelated opto-chip.

81. A method of manufacturing a display arrangement structure, comprising the steps of: an IC substrate part having a monolithic integrated circuit and IC substrate contacts arranged in a matrix, the IC substrate part being electrically connected to a monolithic pixelated optochip; In said monolithic pixelated optochip a semiconductor layer sequence is grown comprising a first semiconductor layer with a first doping and a second semiconductor layer with a second doping, the polarity of charge carriers of said first semiconductor layer being different from the polarity of charge carriers of said second semiconductor layer, said semiconductor layer sequence defining a stacking direction, a matrix of optoelectronic components arranged in the monolithic pixelated optochip, each optoelectronic component having a back surface facing the IC substrate part and a first light source contact, the first light source contact being adjacent and in contact with the first semiconductor layer and electrically connected to a respective one of the IC substrate contacts, The first light source contact is disposed so that a projected area perpendicular to the stacking direction occupies at most half of an area of ​​the back surface; The first light source contact is surrounded by a rear absorber in a lateral direction perpendicular to the stacking direction. A method comprising:

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