Printed circuit board
By integrating a magnetic layer within the substrate's through-hole to form an inductor, the printed circuit board achieves improved inductance, integration, and cost reduction, addressing the limitations of existing designs.
Patent Information
- Application Number
- JP2024069772
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-11-20
- Filing Date
- 2024-04-23
- Publication Date
- 2025-05-30
AI Technical Summary
Existing printed circuit boards struggle to enhance inductance while slimming and integrating components, and they face challenges in reducing process costs.
A printed circuit board is designed with a magnetic layer disposed within a through-hole of a substrate containing an inorganic insulating material, forming a through-hole in the magnetic layer to directly create an inductor, such as an MCI (Magnetic Composite Inductor).
This configuration improves inductance, enhances integration and slimming of the printed circuit board, and reduces process costs by eliminating the need for separate insulating materials and embedding processes.
Smart Images
Figure 2025083266000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a printed circuit board.
Background Art
[0002] Recently, in order to slim down semiconductor chips and increase power efficiency, it has been required to incorporate various passive elements such as capacitors and inductors inside package substrates. On the other hand, in the case of inductors, it has been required to improve the inductance through changes in materials and structures compared to existing chip components.
Summary of the Invention
Problems to be Solved by the Invention
[0003] One of several objects of the present invention is to provide a printed circuit board capable of improving inductance.
[0004] Another one of several objects of the present invention is to provide a printed circuit board capable of enhancing slimming and integration and reducing process costs.
Means for Solving the Problems
[0005] One of several solutions provided through the present invention is to dispose a magnetic layer in a through-hole of a substrate containing an inorganic insulating material such as glass, form a through-hole in the magnetic layer, and directly form an inductor such as an MCI (Magnetic Composite Inductor).
[0006] For example, a printed circuit board according to one example includes a substrate having a through-hole, a magnetic layer disposed at least partially within the through-hole and having a first through-hole, a first through-via layer disposed within the first through-hole, a first pattern layer disposed on the upper surface of the magnetic layer and covering at least a part of the upper end portion of the first through-via layer, and a second pattern layer disposed on the lower surface of the magnetic layer and covering at least a part of the lower end portion of the first through-via layer. The first through-via layer is in contact with the wall surface of the first through-hole, at least a part of the first pattern layer is in contact with the upper surface of the magnetic layer, and at least a part of the second pattern layer is in contact with the lower surface of the magnetic layer.
[0007] For example, a printed circuit board according to one example includes a substrate having a through-hole, a magnetic layer disposed at least partially within the through-hole and having a through-hole, a first metal layer disposed on the wall surface of the through-hole and extending on the upper and lower surfaces of the magnetic layer, and a second metal layer disposed on the first metal layer and filling at least a part of the through-hole. The first metal layer may be in contact with the wall surface of the through-hole, the upper surface of the magnetic layer, and the lower surface of the magnetic layer, respectively.
Advantages of the Invention
[0008] Among various effects of the present invention, as one effect, a printed circuit board capable of improving inductance can be provided.
[0009] Among various effects of the present invention, as another effect, a printed circuit board capable of enhancing slimming and integration and reducing process costs can be provided.
Brief Description of the Drawings
[0010]
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Embodiments for Carrying Out the Invention
[0011] The present invention will be described below with reference to the accompanying drawings. The shapes and sizes of elements in the drawings can be exaggerated or reduced for a clearer explanation.
[0012] Electronic device FIG. 1 is a block diagram schematically showing an example of an electronic device system.
[0013] Referring to the drawings, the electronic device 1000 houses a main board 1010. Physically and / or electrically connected to the main board 1010 are chip-related components 1020, network-related components 1030, and other components 1040, etc. These also combine with other electronic components described later to form various signal lines 1090.
[0014] Examples of the chip-related components 1020 include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as a central processor (e.g., CPU), a graphics processor (e.g., GPU), a digital signal processor, an encryption processor, a microprocessor, and a microcontroller; logic chips such as an analog-digital converter and an ASIC (application-specific IC), etc. However, it is not limited to these, and it goes without saying that other different forms of chip-related electronic components may also be included. Also, it is of course possible to combine these chip-related components 1020 with each other. The chip-related components 1020 may be in a package form including the above-described chips and electronic components.
[0015] Examples of the network-related component 1030 include, but are not limited to, Wi-Fi (such as the IEEE 802.11 family), WiMAX (such as the IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and any other wireless and wired protocols specified for those and later generations. In addition to these, any of a number of other different wireless or wired standards and protocols may also be included. Needless to say, the network-related component 1030 may be combined with the chip-related component 1020 and used in combination with each other.
[0016] Examples of the other component 1040 include, but are not limited to, high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low Temperature Co-Firing Ceramics), EMI (Electro Magnetic Interference) filters, MLCC (Multi-Layer Ceramic Condensers), and the like. In addition to these, passive elements in the form of chip components used for various other different applications may also be included. Needless to say, the other component 1040 may be combined with the chip-related component 1020 and / or the network-related component 1030 and used in combination with each other.
[0017] Depending on the type of the electronic device 1000, the electronic device 1000 can include other electronic components that are physically and / or electrically connected or not connected to the main board 1010. Examples of other electronic components include a camera module 1050, an antenna module 1060, a display 1070, a battery 1080, etc. However, it is not limited thereto, and it may be an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a CD (compact disk), a DVD (digital versatile disk), etc. Needless to say, in addition to these, other electronic components used for various purposes according to the type of the electronic device 1000 may also be included.
[0018] The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an Automotive, etc. However, it is not limited thereto, and needless to say, it may be any other electronic device that processes data other than these.
[0019] FIG. 2 is a perspective view schematically showing an example of an electronic device.
[0020] Referring to the drawings, the electronic device may be, for example, a smartphone 1100. Inside the smartphone 1100, a motherboard 1110 is housed, and various components 1120 are physically and / or electrically connected to such a motherboard 1110. Also, other components that are or are not physically and / or electrically connected to the motherboard 1110, such as a camera module 1130 and / or a speaker 1140, are housed inside. Some of the components 1120 may be the chip-related components described above, for example, a component package 1121, but are not limited thereto. The component package 1121 may be in the form of a printed circuit board on which electronic components including active components and / or passive components are surface-mounted. Alternatively, the component package 1121 may be in the form of a printed circuit board with built-in active components and / or passive components. On the other hand, the electronic device is not necessarily limited to the smartphone 1100, and it goes without saying that it may be other electronic devices as described above.
[0021] Printed circuit board Figure 3 is a cross-sectional view schematically showing an example of a printed circuit board.
[0022] Referring to the drawings, a printed circuit board 100A according to an example includes a substrate 111, a through-hole C penetrating between the upper and lower surfaces of the substrate 111, a magnetic layer 140 disposed at least partially within the through-hole C, a first through-hole H1 penetrating between the upper and lower surfaces of the magnetic layer 140, a first through-via layer 151a disposed within the first through-hole H1, a first pattern layer 152a disposed on the upper surface of the magnetic layer 140 and covering at least a part of the upper end portion of the first through-via layer 151a, and a second pattern layer 153a disposed on the lower surface of the magnetic layer 140 and covering at least a part of the lower end portion of the first through-via layer 151a, and may include a first through-via 150A. At this time, the first through-via layer 151a can be in contact with the wall surface of the first through-hole H1. Also, at least a part of the first pattern layer 152a can be in contact with the upper surface of the magnetic layer 140. Also, at least a part of the second pattern layer 153a can be in contact with the lower surface of the magnetic layer 140. For example, the first through-via 150A may be directly formed on the magnetic layer 140.
[0023] For example, in a printed circuit board 100A according to an example, a magnetic layer 140 is disposed in a through-hole C of a substrate 111 corresponding to a core layer, and a first through-via 150A is directly formed in the magnetic layer 140 to form an inductor in a form surrounding the magnetic layer 140. Therefore, the electrical characteristics of the inductor can be improved. For example, the inductance of the inductor can be improved within the printed circuit board 100A. In addition, the slimming and integration of the printed circuit board 100A can be enhanced. Further, since the embedding process can be omitted and there is no need to fix the inductor with a separate insulating material, the process cost can be reduced and the total thickness can be sufficiently reduced. On the other hand, there may be a plurality of through-holes C, a magnetic layer 140 may be disposed in each through-hole C, and each of the magnetic layers 140 may have a first through-hole H1. Therefore, the above-described first through-via 150A can be formed in each of the magnetic layers 140. For example, a plurality of first through-vias 150A may be formed in the printed circuit board 100A. At this time, the plurality of first through-vias 150A are connected to each other via the first and / or second pattern layers 152a, 153a, or are connected to each other via the first and / or second wiring layers 121, 122 and the first and / or second via layers 131, 132 described later to form one or more coil portions. Therefore, the inductance of the inductor can be more effectively improved, and the electrical characteristics can be more effectively improved.
[0024] On the one hand, according to an example, the printed circuit board 100A may further include a second through-hole H2 that penetrates between the upper and lower surfaces of the substrate 111, a second through-via layer 161a disposed in the second through-hole H2, a third pattern layer 162a disposed on the upper surface of the substrate 111 and covering at least a part of the upper end portion of the second through-via layer 161a, and a fourth pattern layer 163a disposed on the lower surface of the substrate 111 and covering at least a part of the lower end portion of the second through-via layer 161a, that is, a second through-via 160. At this time, the second through-via layer 160A can be in contact with the wall surface of the second through-hole H2. Also, at least a part of the third pattern layer 162a can be in contact with the upper surface of the substrate 111. Also, at least a part of the fourth pattern layer 163a can be in contact with the lower surface of the substrate 111. For example, the second through-via 160A may be directly formed on the substrate 111.
[0025] For example, according to an example, the printed circuit board 100A can directly form the second through-via 160A on the substrate 111 corresponding to the core layer. Thereby, an electrical connection path for wiring can be formed on the substrate 111. Therefore, the design freedom of the printed circuit board 100A can be increased. Also, the slimming and integration of the printed circuit board 100A can be enhanced. Also, since it can be formed simultaneously with the first through-via 150A, the process cost can be reduced, and as described above, the total thickness can be sufficiently reduced. On the other hand, if necessary, a plurality of second through-holes H2 may be formed in the substrate 111, and for example, a plurality of second through-vias 160A may be formed. At this time, the plurality of second through-vias 160A can be connected to each other via the third and / or fourth pattern layers 162a, 163a, or can be connected to the first and / or second wiring layers 121, 122 according to the design via the first and / or second via layers 131, 132 described later. Therefore, the electrical connection paths for wiring can be formed in a more diverse manner, and the design freedom can be further improved.
[0026] On one hand, according to an example, the printed circuit board 100A is disposed on the upper surfaces of the substrate 111 and the magnetic layer 140 respectively, and includes a first insulating layer 112 covering at least a part of each of the first and third pattern layers 152a, 162a; a second insulating layer 113 disposed on the lower surfaces of the substrate 111 and the magnetic layer 140 respectively, covering at least a part of each of the second and fourth pattern layers 152b, 162b; a first wiring layer 121 disposed on the upper surface of the first insulating layer 112; a second wiring layer 122 disposed on the lower surface of the second insulating layer 113; a first via layer 131 penetrating at least a part of the first insulating layer 112 and connecting at least one of the first and third pattern layers 152a, 162a to at least a part of the first wiring layer 121; and a second via layer 132 penetrating at least a part of the second insulating layer 113 and connecting at least one of the second and fourth pattern layers 153a, 163a to at least a part of the second wiring layer 122. Optionally, it can further include a first resist layer 171 disposed on the upper surface of the first insulating layer 112 and having a plurality of first openings o1 exposing at least a part of the first wiring layer 121 respectively, and a second resist layer 172 disposed on the lower surface of the second insulating layer 113 and having a plurality of second openings o2 exposing at least a part of the second wiring layer 122 respectively.
[0027] For example, according to an example, the printed circuit board 100A can have the form of a multilayer package substrate realized by a build-up process. Thereby, more diverse wiring designs can be made possible. Also, as described above, a plurality of first through vias 150A can be connected to each other via the first and / or second wiring layers 121, 122 and the first and / or second via layers 131, 132 to form one or more coil portions. Also, as described above, the first and second wiring layers 121, 122 and the first and second via layers 131, 132 may be connected to each other via the second through vias 160A, for example, a plurality of second through vias 160A. Therefore, various electrical connection paths can be provided between the upper configuration and the lower configuration.
[0028] On one hand, the first through-via layer 151a can include a first-1 metal layer m1 disposed on the wall surface of the first through-hole H1, a second metal layer m2 disposed on the first-1 metal layer m1, and a first filling material p that fills at least a part of the space between the first-2 metal layers m2. Also, the first pattern layer 152a can include a first-1 metal layer m1 disposed on the upper surface of the magnetic layer 140, a first-2 metal layer m2 disposed on the first-1 metal layer m1, a first filling material p that fills at least a part of the space between the first-2 metal layers m2, and a first-3 metal layer m3 disposed on the upper surfaces of the first-2 metal layer m2 and the first filling material p respectively. Also, the first-2 pattern layer 153a can include a first-1 metal layer m1 disposed on the lower surface of the magnetic layer 140, a first-2 metal layer m2 disposed on the first-1 metal layer m1, a first filling material p that fills at least a part of the space between the first-2 metal layers m2, and a first-4 metal layer m4 disposed on the lower surfaces of the first-2 metal layer m2 and the first filling material p respectively.
[0029] Also, the second through-via layer 161a can include a second-1 metal layer m1 disposed on the wall surface of the second through-hole H2, a second-2 metal layer m2 disposed on the second-1 metal layer m1, and a second filling material p that fills at least a part of the space between the second-2 metal layers m2. Also, the third pattern layer 162a can include a second-1 metal layer m1 disposed on the upper surface of the substrate 111, a second-2 metal layer m2 disposed on the second-1 metal layer m1, a second filling material p that fills at least a part of the space between the second-2 metal layers m2, and a second-3 metal layer m3 disposed on the upper surfaces of the second-2 metal layer m2 and the second filling material p respectively. Also, the fourth pattern layer 163a can include a second-1 metal layer m1 disposed on the lower surface of the substrate 111, a second-2 metal layer m2 disposed on the second-1 metal layer m1, a second filling material p that fills at least a part of the space between the second-2 metal layers m2, and a second-4 metal layer m4 disposed on the lower surfaces of the second-2 metal layer m2 and the second filling material p respectively.
[0030] Also, the second first metal layer m1 may be a metal layer substantially the same as the first first metal layer m1. For example, each may be the first metal layer m1, and for convenience of explanation, it may be divided into the first first and first second metal layers m1. The second second metal layer m2 may be a metal layer substantially the same as the first second metal layer m2. For example, each may be the second metal layer m2, and for convenience of explanation, it may be divided into the first second and second second metal layers m2. The second third metal layer m3 may be a metal layer substantially the same as the first third metal layer m3. For example, each may be the third metal layer m3, and for convenience of explanation, it may be divided into the first third and second third metal layers m3. The second fourth metal layer m4 may be a metal layer substantially the same as the first fourth metal layer m4. For example, each may be the fourth metal layer m4, and for convenience of explanation, it may be divided into the first fourth and second fourth metal layers m4. Also, the second filler p may be a filler substantially the same as the first filler p. For example, each may be the filler p, and for convenience of explanation, it may be divided into the first and second fillers p.
[0031] For example, the first metal layer m1 may be a seed layer for forming the first and second through-via layers 151a and 161 and the first to fourth pattern layers 152a, 153a, 162a, and 163a, and may be formed substantially conformally with a thin thickness. On the other hand, the first metal layer m1 may be composed of a plurality of layers. For example, it may include a titanium (Ti) layer, a copper (Cu) layer, etc., but is not limited thereto. Also, the second metal layer m2 may be a plating layer for forming the first and second through-via layers 151a and 161 and the first to fourth pattern layers 152a, 153a, 162a, and 163a, and may be formed substantially conformally with a thickness thicker than that of the first metal layer m1. On the other hand, the second metal layer m2 may be composed of one layer. For example, it may include a copper (Cu) layer, but is not limited thereto. Also, the third and fourth metal layers m3 and m4 may be cap plating layers for forming the first to fourth pattern layers 152a, 153a, 162a, and 163a, and may be formed substantially conformally with a thickness thicker than that of the first metal layer m1 respectively. On the other hand, the third and fourth metal layers m3 and m4 may each be composed of one layer. For example, each may include a copper (Cu) layer, but is not limited thereto.
[0032] Also, the wall surface of the first through-hole H1 may be substantially perpendicular with respect to at least one of the upper surface and the lower surface of the magnetic layer 140. Also, the wall surface of the second through-hole H2 may be substantially perpendicular with respect to at least one of the upper surface and the lower surface of the substrate 111.
[0033] For example, the first and second through-holes H1 and H2 may each have a columnar shape with substantially vertical sides in cross-section, and may have various shapes such as circular, elliptical, and square shapes on a plane.
[0034] On the one hand, the magnetic layer 140 can be in contact with the wall surface of the through-hole C of the substrate 111. For example, the magnetic layer 140 can be formed by filling the through-hole C of the substrate 111 with a magnetic resin. After filling the through-hole C of the substrate 111 with the magnetic resin, a planarization process, for example, a polishing process, can be performed.
[0035] For example, the upper and lower surfaces of the magnetic layer 140 can be substantially coplanar with the upper and lower surfaces of the substrate 111, respectively. In this case, the upper and lower surfaces provided by the substrate 111 and the magnetic layer 140 may be flat surfaces. Therefore, a fine circuit pattern can be formed more easily. For example, the first to fourth pattern layers 152a, 153a, 162a, 163a can be formed with a finer pitch. Also, when performing a build-up process thereon, angulation and the like can be minimized to improve process efficiency and the like.
[0036] On the other hand, the substrate 111 may be an organic core layer, a glass core layer, a metal core layer, a silicon core layer, or a ceramic core layer. Preferably, the substrate 111 may be an inorganic core layer such as a glass core layer, a silicon core layer, or a ceramic core layer, and more preferably, it may be a glass core layer, but it is not necessarily limited thereto.
[0037] For example, applying a glass core layer can be more advantageous in terms of cost and performance. For example, since glass itself is an insulator, a separate insulating film is not required. Furthermore, since it can be produced as a panel, the process can proceed at low cost. Also, because glass is a material with low transmission loss due to its smoothness and insulation characteristics, it can be easily used as a material for high-frequency high-speed signal transmission. For example, glass has a dielectric tangent (1 MHz) of about 0.0005 to 0.0008, which is lower than that of organic insulating materials, which is 0.002 to 0.0100. Also, conductor loss may be caused by wiring resistance, skin effect, and surface roughness. The skin effect is a phenomenon in which when an alternating current flows, the current flows only on the surface of the wiring as the frequency increases, and the actual resistance increases. It can have a very thin skin roughness of 0.7 μm at 10 GHz and 0.2 μm at 100 GHz. Furthermore, if there are irregularities on the conductor surface, the current may flow along the irregularities, increasing the distance the current flows and potentially increasing the resistance. However, since glass has almost no surface roughness, the loss can be reduced. Therefore, when an inductor, for example, an MCI (Magnetic Composite Inductor), is directly formed on such a glass core layer, all of the above-described composite effects can be achieved.
[0038] Hereinafter, with reference to the drawings, the components of a printed circuit board 100A according to an example will be described in more detail.
[0039] The substrate 111 may be a core layer. For example, it can include an organic core layer, a glass core layer, a metal core layer, a silicon core layer, or a ceramic core layer. The organic core layer can include an organic insulating material. The organic insulating material can include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material including an inorganic filler, an organic filler, and / or glass fiber (Glass Fiber, Glass Cloth, Glass Fabric) together with the resin. For example, the organic insulating material may be a non-photosensitive insulating material such as CCL (Copper Clad Laminate), ABF (Ajinomoto Build-up Film), PPG (Prepreg), etc., but is not limited thereto, and other polymer materials may be used in addition. The glass core layer can include glass. The glass can be, for example, pure silicon dioxide (about 100% SiO 2) It can include soda-lime glass, borosilicate glass, aluminosilicate glass, etc. However, it is not limited to these, and alternative glass materials, for example, fluorine glass, phosphate glass, chalcogen glass, etc. may also be used as the material of the glass layer. Also, in order to form glass having specific physical properties, other additives can be further included. Such additives can include not only calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), but also magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, and carbonates and / or oxides of such elements, as well as other elements. The glass can be distinguished from the above-mentioned glass fibers. The metal core layer can contain a metal. The metal can include, for example, copper (Cu), Invar, etc., but is not limited thereto. The metal core layer can also include an insulating film formed on the metal. The insulating film can include an organic insulating material or an inorganic insulating material. The silicon core layer can contain pure silicon (Si). If necessary, the silicon core layer can also include an oxide layer formed on silicon (Si). Also, it can include a nitride layer formed on the oxide layer. The oxide layer may include a silicon oxide film, and the nitride layer may include a silicon nitride film, but is not limited thereto. The ceramic core layer can contain a ceramic material. The ceramic material can include, for example, alumina (Al 2 0 3 ), aluminum nitride (AlN), silicon carbide (SiC), silicon nitride (Si 3 N 4 ), etc., but is not limited thereto.
[0040] The first and second insulating layers 112 and 113 can include an organic insulating material. The organic insulating material can include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material containing an inorganic filler, an organic filler, and / or glass fiber (Glass Fiber, Glass Cloth, Glass Fabric) together with the resin. For example, the organic insulating material may be a non-photosensitive insulating material such as CCL (Copper Clad Laminate), ABF (Ajinomoto Build-up Film), PPG (Prepreg), etc., but is not limited thereto, and other polymer materials may also be used. The first and second insulating layers 112 and 113 can include the same or different organic insulating materials from each other. The first and second insulating layers 112 and 113 may each be composed of a plurality of layers as required.
[0041] The first and second wiring layers 121 and 122 can each include a metallic substance. The metallic substance can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof, etc. Preferably, it can include copper (Cu), but is not limited thereto. The first and second wiring layers 121 and 122 can each perform various functions according to the design. For example, it can include a signal pattern, a power pattern, a ground pattern, etc. These patterns can each have various forms such as a line, a plane, a pad, etc. The first and second wiring layers 121 and 122 can include a seed layer and a plating layer formed on the seed layer. The seed layer may be an electroless plating layer (or electroless copper) and / or a sputtering layer, and the plating layer may be an electrolytic plating layer (or electroplated copper), but is not limited thereto.
[0042] The first and second via layers 131 and 132 can each contain a metallic substance. The metallic substance can include, as described above, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof, etc. Preferably, it can include copper (Cu), but is not limited thereto. The first and second via layers 131 and 132 can each include filled vias that fill via holes, but can also include conformal vias arranged along the wall surfaces of the via holes. The first and second via layers 131 and 132 can perform various functions according to the design. For example, it can include ground vias, power vias, signal vias, etc. The first and second via layers 131 and 132 can each include first and second tapered connection vias in opposite directions to each other. The first and second via layers 131 and 132 can each include an electroless plating layer (or electroless copper) and an electroplating layer (or electrolytic copper). Instead of the electroless plating layer (or electroless copper), a sputtering layer may be included, or both may be included.
[0043] The magnetic layer 140 can contain a magnetic substance. The magnetic substance can include, for example, ferrite-based substances, permalloy-based substances, etc. For example, it can include Ni-based ferrites, Ni-Zn-based ferrites, Ni-Zn-Cu-based ferrites, Fe-Si-Al (Sendust), Ni-Mo-Fe (MPP: Molypermalloy Powder Core), Ni-Fe (High Flux Core), etc., but is not limited thereto, and can also include other known ferrite-based substances, permalloy-based substances, etc. In addition, various types of magnetic substances containing other magnetic powders and / or magnetic particles may also be used. Such a magnetic substance can fill the through portion C in the form of a paste or a composition type, and can then be cured to become the magnetic layer 140. Therefore, the magnetic layer 140 can be in contact with the wall surface of the through portion C. For example, the magnetic layer 140 may be in contact with the substrate 111.
[0044] The first through via 150A can include a first through via layer 151a and first and second pattern layers 152a, 153a. As described above, the first through via layer 151a can include first and second metal layers m1, m2 and a filler p. As described above, the first and second pattern layers 152a, 153a can include first to fourth metal layers m1, m2, m3, m4 and a filler p. The first metal layer m1 can include a first layer formed by sputtering and a second layer formed by electroless plating. The first layer can include a titanium (Ti) layer and a copper (Cu) layer, and the second layer can include a copper (Cu) layer, but is not limited thereto. The second to fourth metal layers m2, m3, m4 can be formed by electrolytic plating respectively, and each can include a copper (Cu) layer, but is not limited thereto. The filler p can include a plugging material. The plugging material can include an insulating ink including an insulating resin such as epoxy. However, it is not limited thereto and may include a conductive ink. The first pattern layer 152a and / or the second pattern layer 153a can extend on the substrate 111. For example, the first pattern layer 152a and / or the second pattern layer 153a of each of the plurality of first through vias 150A may be connected to each other. The first and second pattern layers 152a, 153a can include a line pattern, a pad pattern, but are not limited thereto. On the other hand, only the pad may include the filler p, and the line may not include the filler p.
[0045] The second through-via 160A can include a second through-via layer 161a and third and fourth pattern layers 162a, 163a. As described above, the second through-via layer 161a can include the first and second metal layers m1, m2 and the filler p. As described above, the third and fourth pattern layers 162a, 163a can include the first to fourth metal layers m1, m2, m3, m4 and the filler p. The first to fourth metal layers m1, m2, m3, m4 and the filler p can be substantially the same as those described for the first through-via 150A and the like. The third and fourth pattern layers 162a, 163a can perform various functions according to the design. For example, they can include a signal pattern, a power pattern, a ground pattern, and the like. These patterns can each have various forms such as a line, a plane, a pad, and the like. On the other hand, only the pad may include the filler p, and the line, the plane, and the like may not include the filler p.
[0046] The first and second resist layers 171, 172 can include a liquid or film-type solder resist, but are not limited thereto, and can also include other organic insulating materials such as ABF (Ajinomoto Build-up Film). The first and second resist layers 171, 172 can each have first and second openings o1, o2. The first and second openings o1, o2 may each be plural. The first and second openings o1, o2 may each be formed by SMD (Solder Mask Defined) and / or NSMD (Non Solder Mask Defined). The first and second openings o1, o2 can each expose at least a part of the first and second wiring layers 121, 122, and a surface treatment layer can be disposed on the surface of the exposed pattern. The surface treatment layer may be formed by electrolytic gold plating, electroless gold plating, OSP (Organic Solderability Preservative) or electroless tin plating, electroless silver plating, electroless nickel plating / substitution gold plating, DIG (Direct Immersion Gold) plating, HASL (Hot Air Solder Leveling), or the like.
[0047] If necessary, semiconductor chips may be disposed on the first resist layer 171. The semiconductor chips can be electrically connected to the first through vias 150A. The semiconductor chips may be, for example, integrated circuit (IC) dies in which hundreds to millions or more elements are integrated in one chip. The integrated circuit dies may be formed based on active wafers. In this case, as the base material forming each main body, silicon (Si), germanium (Ge), gallium arsenide (GaAs), etc. may be used. Various circuits may be formed in the main body. Connection pads for connecting to external circuits, such as signals, electricity, ground, etc. may be formed on the front surface of the main body, and the connection pads may contain conductive materials such as aluminum (Al) and copper (Cu).
[0048] Figs. 4a to 4l are process cross-sectional views schematically showing an example of the manufacture of the printed circuit board of Fig. 3.
[0049] Referring to Fig. 4a, a substrate 111 can be prepared. The substrate 111 can include an organic core layer, a glass core layer, a metal core layer, a silicon core layer, or a ceramic core layer, and more preferably can include a glass core layer. When the substrate 111 includes a glass core layer, a glass plate or the like may be prepared.
[0050] Referring to Fig. 4b, a plurality of holes h1, h2 can be formed in the substrate 111. The plurality of holes h1, h2 can be used when forming the through portion C and the second through holes H2 described later. The plurality of holes h1, h2 can be formed by laser processing or the like.
[0051] Referring to FIG. 4c, a through-hole C and a second through-hole H2 can be formed in the substrate 111. The through-hole C and the second through-hole H2 can be formed by a method of expanding a plurality of holes h1, h2 previously formed in the substrate 111. For example, the plurality of holes h1, h2 can be expanded by chemical etching to form the through-hole C and the second through-hole H2. If necessary, a plurality of through-holes C may be formed.
[0052] Referring to FIG. 4d, a magnetic layer 140 can be formed in the through-hole C. For example, the through-hole C can be filled with a magnetic paste or a magnetic composition and cured to form the magnetic layer 140. When there are a plurality of through-holes C, the magnetic layer 140 can be formed in each through-hole C.
[0053] Referring to FIG. 4e, the magnetic layer 140 can be planarized. For example, a polishing process can be performed so that the upper surface and the lower surface of the magnetic layer 140 are substantially coplanar with the upper surface and the lower surface of the substrate 111, respectively. When there are a plurality of magnetic layers 140, they can be similarly planarized by the polishing process.
[0054] Referring to FIG. 4f, a first through-hole H1 can be formed in the magnetic layer 140. The first through-hole H1 can be formed by a mechanical drill or the like. When there are a plurality of magnetic layers 140, the first through-hole H1 can be formed in each magnetic layer 140.
[0055] Referring to FIG. 4g, the first and second metal layers m1 and m2 can be formed on the substrate 111, the magnetic layer 140, and the first and second through holes H1 and H2. For example, sputtering can be performed using titanium (Ti), copper (Cu), etc. as materials to form the first metal layer m1. If necessary, electroless plating can be performed after sputtering. For example, the first metal layer m1 can also include electroless copper. Next, electrolytic plating can be performed using copper (Cu), etc. as materials to form the second metal layer m2. The first and second metal layers m1 and m2 can be formed conformally. The second metal layer m2 may be formed thicker than the first metal layer m1.
[0056] Referring to FIG. 4h, the space between the second metal layers m2 in the first and second through holes H1 and H2 can be filled with a filler p. The filler p can protrude so as to be separated from the upper and lower surfaces of the second metal layer m2. The filler p can be formed in a plugging process.
[0057] Referring to FIG. 4i, the filler p can be planarized. For example, a polishing process can be performed so that the upper and lower surfaces of the filler p are substantially coplanar with the upper and lower surfaces of the second metal layer m2, respectively.
[0058] Referring to FIG. 4j, third and fourth metal layers m3 and m4 covering these can be formed on the upper and lower sides of the second metal layer m2 and the filler p, respectively. The third and fourth metal layers m3 and m4 can be formed by electrolytic plating using copper (Cu), etc. as materials, respectively.
[0059] Referring to FIG. 4k, the first and second through vias 150A and 160A can be formed. For example, the first to fourth metal layers m1, m2, m3, and m4 can be patterned by chemical etching to form the first to fourth pattern layers 152a, 153a, 162a, and 163a. Thereby, the above-described first and second through vias 150A and 160A can be formed.
[0060] Referring to FIG. 4l, in a build-up process or the like, the first and second insulating layers 112 and 113, the first and second wiring layers 121 and 122, and the first and second via layers 131 and 132 can be formed in required numbers of layers. Also, the first and second resist layers 171 and 172 can be formed. Further, a plurality of first and second openings o1 and o2 can be formed in the first and second resist layers 171 and 172, respectively. On the other hand, the first and second insulating layers 112 and 113 can be formed in a lamination process or the like, the first and second wiring layers 121 and 122 and the first and second via layers 131 and 132 can be formed in a plating process after via hole processing, and the first and second resist layers 171 and 172 can be formed in a lamination process or a coating process of a liquid material or the like. Also, the plurality of first and second openings o1 and o2 can be formed by a photolithography process, a laser drill, or the like according to the materials of the first and second resist layers 171 and 172.
[0061] Through a series of processes, the printed circuit board 100A according to the above-described example can be manufactured, and since other descriptions can be substantially the same as those described for the printed circuit board 100A according to the above-described example, duplicate descriptions are omitted.
[0062] FIG. 5 is a cross-sectional view schematically showing another example of a printed circuit board.
[0063] Referring to the drawings, a printed circuit board 100B according to another example can have different forms of the first and second through-holes H1, H2 and the first and second through-vias 150B, 160B formed therein compared to the printed circuit board 100A according to the above-described example. For example, each of the wall surfaces of the first and second through-holes H1, H2 may have a plurality of inclined surfaces having an inclination with respect to the upper surface and / or the lower surface of the magnetic layer 140 and the substrate 111, respectively. For example, the first and second through-holes H1, H2 may each have an hourglass shape in cross-section, but are not limited thereto. Also, the first and second through-via layers 151b, 161b of the first and second through-vias 150B, 160B are disposed on the first metal layer m1 disposed on the wall surfaces of the first and second through-holes H1, H2 and on the first metal layer m1, respectively, and can include a second metal layer m2 that fills at least a part of each of the first and second through-holes H1, H2 without a filler. At this time, for convenience of explanation, the first metal layer m1 may be divided into the first-1 and first-2 metal layers m1 as described above, and the second metal layer m2 may be divided into the first-2 and second-2 metal layers m2 as described above for convenience of explanation. Also, the first and second pattern layers 152b, 153b of the first through-via 150B may include the first metal layer m1 disposed on the upper and lower surfaces of the magnetic layer 140 and the second metal layer m2 disposed on the first metal layer m1, respectively, and separate cap plating may be omitted on the second metal layer m2. Also, the third and fourth pattern layers 162b, 163b of the second through-via 160B may include the first metal layer m1 disposed on the upper and lower surfaces of the substrate 111 and the second metal layer m2 disposed on the first metal layer m1, respectively, and separate cap plating may be omitted on the second metal layer m2.
[0064] For example, in the case of the printed circuit board 100B according to another example, although the plating time may be longer compared to the printed circuit board 100A according to one example, the thicknesses of the first to fourth pattern layers 152b, 153b, 162b, and 163b can be made thinner. Therefore, it can be more advantageous for forming fine circuits. Also, since the thickness of the second metal layer m2 in the first and second through-via layers 151b and 161b becomes thicker, functions such as an inductor can be further improved.
[0065] Other explanations can be substantially the same as those described for the printed circuit board 100A according to the above-described example, so duplicate explanations are omitted.
[0066] Figs. 6a to 6j are process cross-sectional views schematically showing an example of the manufacture of the printed circuit board of Fig. 5.
[0067] Referring to Fig. 6a, the substrate 111 can be prepared. The substrate 111 can include an organic core layer, a glass core layer, a metal core layer, a silicon core layer, or a ceramic core layer, and more preferably, can include a glass core layer. When the substrate 111 includes a glass core layer, a glass plate or the like may be prepared.
[0068] Referring to Fig. 6b, a plurality of holes h1, h2 can be formed in the substrate 111. The plurality of holes h1, h2 can be used when forming the through portion C and the second through hole H4 described later. The plurality of holes h1, h2 can be formed by laser processing or the like.
[0069] Referring to Fig. 6c, the through portion C and the second through hole H2 can be formed in the substrate 111. The through portion C and the second through hole H2 can be formed by a method of expanding a plurality of holes h1, h2 previously formed in the substrate 111. For example, the plurality of holes h1, h2 can be expanded by chemical etching to form the through portion C and the second through hole H2. If necessary, a plurality of through portions C may be formed.
[0070] Referring to FIG. 6d, a magnetic layer 140 can be formed in the through-hole C. For example, the through-hole C can be filled with a magnetic paste or a magnetic composition and cured to form the magnetic layer 140. When there are a plurality of through-holes C, the magnetic layer 140 can be formed in each through-hole C.
[0071] Referring to FIG. 6e, the magnetic layer 140 can be planarized. For example, a polishing process can be performed so that the upper and lower surfaces of the magnetic layer 140 are substantially coplanar with the upper and lower surfaces of the substrate 111, respectively. When there are a plurality of magnetic layers 140, they can be similarly planarized by a polishing process.
[0072] Referring to FIG. 6f, a first through-hole H1 can be formed in the magnetic layer 140. The first through-hole H1 can be formed by a mechanical drill or the like. When there are a plurality of magnetic layers 140, the first through-hole H1 can be formed in each magnetic layer 140.
[0073] Referring to FIG. 6g, a first metal layer m1 can be formed on the substrate 111, the magnetic layer 140, and the first and second through-holes H1 and H2. For example, sputtering can be performed using titanium (Ti), copper (Cu), etc. as materials to form the first metal layer m1. If necessary, electroless plating can be performed after sputtering. For example, the first metal layer m1 can also include electroless copper.
[0074] Referring to FIG. 6h, electrolytic plating can be performed using copper (Cu) or the like as a material to form a second metal layer m2. The second metal layer m2 can be formed by filling plating.
[0075] Referring to FIG. 6i, the first and second through-vias 150B and 160B can be formed. For example, the first and second metal layers m1 and m2 can be patterned by chemical etching to form the first to fourth pattern layers 152b, 153b, 162b, and 163b. Thereby, the above-described first and second through-vias 150B and 160B can be formed.
[0076] Referring to FIG. 6j, in a build-up process or the like, the first and second insulating layers 112 and 113, the first and second wiring layers 121 and 122, and the first and second via layers 131 and 132 can be formed in required numbers of layers. Also, the first and second resist layers 171 and 172 can be formed. Further, a plurality of first and second openings o1 and o2 can be formed in the first and second resist layers 171 and 172, respectively. On the other hand, the first and second insulating layers 112 and 113 can be formed in a lamination process or the like, the first and second wiring layers 121 and 122 and the first and second via layers 131 and 132 can be formed in a plating process after via hole processing, and the first and second resist layers 171 and 172 can be formed in a lamination process or a coating process of a liquid material or the like. Also, the plurality of first and second openings o1 and o2 can be formed by a photolithography process, a laser drill, or the like according to the materials of the first and second resist layers 171 and 172.
[0077] Through a series of processes, a printed circuit board 100B according to another example described above can be manufactured, and other descriptions may be substantially the same as those described for the printed circuit board 100A according to one example and the printed circuit board 100B according to another example described above, so duplicate descriptions are omitted.
[0078] FIGS. 7a to 7f are plan views schematically showing various examples of coil portions applicable to the printed circuit board of FIG. 3 and the printed circuit board of FIG. 5.
[0079] Referring to FIG. 7a, the coil portion c can include a plurality of coils c1 and c2 arranged in parallel in a row. The plurality of coils c1 and c2 can be arranged spaced apart from each other. Other wirings may be arranged between the plurality of coils c1 and c2.
[0080] Referring to FIG. 7b, the coil portion c can also include a coil c3 that is arranged in a row and then bent to the right and arranged in a row again.
[0081] Referring to FIG. 7c, the coil portion c can also include coils c4 that are arranged to be repeatedly bent up and down.
[0082] Referring to FIG. 7d, the coil portion c can also include coils c5 that are repeatedly arranged in an inclined form in one direction.
[0083] Referring to FIG. 7e, the coil portion c can also include coils c6 that are repeatedly arranged in an inclined form in one direction, then bent to the right, and then repeatedly arranged in an inclined form in the opposite direction.
[0084] Referring to FIG. 7f, the coil portion c can also include coils c7 that are repeatedly arranged in an X shape.
[0085] For example, in the printed circuit boards 100A and 100B described above, a coil portion c including coils c1, c2, c3, c4, c5, c6, and c7 in various forms may be applied. However, the form of the coil portion c is not limited to the examples described above.
[0086] Since other descriptions can be substantially the same as those described in the printed circuit board 100A according to one example and the printed circuit board 100B according to another example described above, duplicate descriptions are omitted.
[0087] In the present invention, the expression "cover" can include not only the case of covering entirely but also the case of covering at least a part, and further can include not only the case of directly covering but also the case of indirectly covering. Also, the expression "fill" can include not only the case of filling completely but also the case of filling at least a part, and can include the case of generally filling. For example, it can include the case where there are some voids or voids. Also, the expression "surround" can include not only the case of surrounding completely but also the case of surrounding a part and the case of generally surrounding. Further, "expose" can include not only the case of exposing completely but also the case of exposing a part, and "exposure" can mean exposing from embedding the said structure. For example, the opening exposing the pad means exposing the pad from the resist layer, and a surface treatment layer etc. can be further disposed on the exposed pad.
[0088] In the present invention, "being disposed in a through portion or a through hole" can include not only the case where the object is completely disposed in the through portion or the through hole but also the case where a part protrudes upward or downward on the cross section. For example, if it is disposed in a through portion or a through hole on a plane, it can be judged in a broader sense.
[0089] In the present invention, substantially, it can be judged including process errors, position deviations, errors at the time of measurement, etc. generated in the manufacturing process. For example, "substantially perpendicular" can include not only the case of being completely perpendicular but also the case of being almost perpendicular. Also, "substantially coplanar" can include not only the case of existing on exactly the same plane but also the case of existing on almost the same plane.
[0090] In the present invention, "the same insulating material" can mean including not only the case of being exactly the same insulating material but also the case of including the same type of insulating material. Therefore, although the composition of the insulating materials is substantially the same, their specific composition ratios may be slightly different.
[0091] In the present invention, the meaning in the cross-section can mean the cross-sectional shape when the object is cut vertically, or the cross-sectional shape when the object is cut vertically, or the cross-sectional shape when the object is viewed in a side view. Also, the meaning on the plane can mean the planar shape when the object is cut horizontally, or the planar shape when the object is viewed in a top view or a bottom view.
[0092] In the present invention, terms such as "lower side, lower part, lower surface" are used, for the sake of convenience, to mean the downward direction with reference to the cross-section of the drawing, and terms such as "upper side, upper part, upper surface" are used to mean the opposite direction. However, this is only for the convenience of explanation and defines the direction, and it goes without saying that the scope of rights in the claims is not particularly limited by the description of such a direction, and the concept of up / down can be changed at any time.
[0093] In the present invention, "being connected" is a concept that includes not only being directly connected but also being indirectly connected via an adhesive layer or the like. Also, "being electrically connected" is a concept that includes both the case of being physically connected and the case of not being connected. Furthermore, expressions such as "first, second" are used to distinguish one component from another component, and do not limit the order and / or importance of the said component. In some cases, within the scope not departing from the scope of rights, the first component may be named the second component, and similarly, the second component may be named the first component.
[0094] The expression "an example" used in the present invention does not mean the same embodiment as each other, but is provided to emphasize and explain the respective unique features different from each other. However, the above-provided example does not exclude being realized in combination with the features of another example. For example, even if a matter described in a specific example is not described in another example, in another example, it can be understood as an explanation related to another example as long as there is no explanation contrary to or conflicting with that matter.
[0095] The terms used in the present invention are used merely for the purpose of illustration and are not intended to limit the present invention. At this time, the singular expression includes plural expressions unless the context clearly indicates a different meaning.
Explanation of Signs
[0096] 1000 Electronic device 1010 Main board 1020 Chip-related components 1030 Network-related components 1040 Other components 1050 Camera 1060 Antenna 1070 Display 1080 Battery 1090 Signal line 1100 Smartphone 1110 Motherboard 1120 Components 1121 Component package 1130 Camera module 1140 Speaker 100A, 100B Printed circuit board 111 Substrate 112, 113 Insulating layer 121, 122 Wiring layer 131, 132 Via layer 140 Magnetic layer 150A, 150B, 160A, 160B Through via 151a, 151b, 161a, 161b Via part 152a, 152b, 153a, 153b, 162a, 162b, 163a, 163b Pattern layer 171, 172 Resist layer c Coil part c1, c2, c3, c4, c5, c6, c7 Coil C Cavity H1, H2 Through part h1, h2 Hole m1, m2, m3, m4 Metal layer p Filler
Claims
1. A substrate having a through hole; a magnetic layer having a first through hole and at least a portion of the magnetic layer being disposed within the through portion; a first through via layer disposed in the first through hole; a first pattern layer disposed on an upper surface of the magnetic layer and covering at least a portion of an upper end of the first through via layer; a second pattern layer disposed on a lower surface of the magnetic layer and covering at least a portion of a lower end of the first through via layer; Including, the first through-via layer contacts a wall surface of the first through hole; At least a portion of the first pattern layer contacts the top surface of the magnetic layer; At least a portion of the second pattern layer contacts the bottom surface of the magnetic layer.
2. the substrate has a second through hole; a second through via layer disposed in the second through hole; a third pattern layer disposed on the upper surface of the substrate and covering at least a portion of an upper end of the second through-via layer; a fourth pattern layer disposed on the lower surface of the substrate and covering at least a portion of a lower end of the second through-via layer; Further comprising: the second through-via layer contacts a wall surface of the second through hole; at least a portion of the third patterned layer contacts a top surface of the substrate; The printed circuit board of claim 1 , wherein at least a portion of the fourth patterned layer contacts the bottom surface of the substrate.
3. the first through-via layer includes a first-1 metal layer disposed on a wall surface of the first through hole, a first-2 metal layer disposed on the first-1 metal layer, and a first filling material that fills at least a portion of a space between the first-2 metal layers; The printed circuit board of claim 2, wherein the second through via layer includes a second-1 metal layer arranged on a wall surface of the second through hole, a second-2 metal layer arranged on the second-1 metal layer, and a second filler material filling at least a portion of the space between the second-2 metal layers.
4. The printed circuit board according to claim 3 , wherein wall surfaces of the first and second through holes are substantially perpendicular to at least one of the magnetic layer and the upper and lower surfaces of the substrate.
5. the first pattern layer includes the 1-1 metal layer disposed on an upper surface of the magnetic layer, the 1-2 metal layer disposed on the 1-1 metal layer, the first filler material filling at least a part of a space between the 1-2 metal layers, and a 1-3 metal layer disposed on each of the upper surfaces of the 1-2 metal layer and the first filler material; the second pattern layer includes the 1-1 metal layer disposed on the lower surface of the magnetic layer, the 1-2 metal layer disposed on the 1-1 metal layer, the first filler material filling at least a part of the space between the 1-2 metal layers, and a 1-4 metal layer disposed on the lower surfaces of the 1-2 metal layer and the first filler material, the third pattern layer includes the second-1 metal layer disposed on the upper surface of the substrate, the second-2 metal layer disposed on the second-1 metal layer, the second filler material filling at least a portion of a space between the second-2 metal layers, and the second-3 metal layer disposed on the upper surfaces of the second-2 metal layer and the second filler material, 4. The printed circuit board of claim 3, wherein the fourth pattern layer includes the 2-1 metal layer disposed on the lower surface of the substrate, the 2-2 metal layer disposed on the 2-1 metal layer, the second filler material filling at least a portion of the space between the 2-2 metal layer, and the 2-4 metal layer disposed on the lower surfaces of the 2-2 metal layer and the second filler material.
6. the first through via layer includes a first-1 metal layer disposed on a wall surface of the first through hole, and a first-2 metal layer disposed on the first-1 metal layer and filling at least a portion of the first through hole without a filler material; The printed circuit board of claim 2, wherein the second through via layer includes a 2-1 metal layer arranged on a wall surface of the second through hole, and a 2-2 metal layer arranged on the 2-1 metal layer and filling at least a portion of the second through hole without a filler material.
7. 7. The printed circuit board according to claim 6, wherein the wall surfaces of the first and second through holes each have a plurality of inclined surfaces that are inclined with respect to at least one of the upper surface and the lower surface of the magnetic layer and the substrate.
8. the first pattern layer includes the first-1 metal layer disposed on an upper surface of the magnetic layer, and the first-2 metal layer disposed on an upper surface of the first-1 metal layer; the second pattern layer includes the first-1 metal layer disposed on a lower surface of the magnetic layer, and the first-2 metal layer disposed on a lower surface of the first-1 metal layer; the third pattern layer includes the second-1 metal layer disposed on the upper surface of the substrate, and the second-2 metal layer disposed on the upper surface of the second-1 metal layer; 7. The printed circuit board of claim 6, wherein the fourth pattern layer includes the 2-1 metal layer disposed on the lower surface of the substrate, and the 2-2 metal layer disposed on the lower surface of the 2-1 metal layer.
9. a first insulating layer disposed on an upper surface of the substrate and the magnetic layer, the first insulating layer covering at least a portion of each of the first and third pattern layers; a second insulating layer disposed on the lower surface of each of the substrate and the magnetic layer and covering at least a portion of each of the second and fourth pattern layers; a first wiring layer disposed on an upper surface of the first insulating layer; a second wiring layer disposed on a lower surface of the second insulating layer; a first via layer penetrating at least a portion of the first insulating layer and connecting at least a portion of at least one of the first and third pattern layers to at least a portion of the first wiring layer; a second via layer penetrating at least a portion of the second insulating layer and connecting at least a portion of at least one of the second and fourth pattern layers to at least a portion of the second wiring layer; The printed circuit board of claim 2 further comprising:
10. a first resist layer disposed on an upper surface of the first insulating layer and having a plurality of first openings each exposing at least a portion of the first wiring layer; a second resist layer disposed on a lower surface of the second insulating layer and having a plurality of second openings each exposing at least a portion of the second wiring layer; The printed circuit board of claim 9 further comprising:
11. The substrate includes a plurality of the through portions, the magnetic layer is disposed in each of the plurality of through portions, Each of the plurality of magnetic layers has the first through hole, the first through via layer is disposed in each of the plurality of first through holes; The printed circuit board of claim 9 , wherein the first through via layers are connected to each other via at least one of the first and second pattern layers and form one or more coil portions arranged in a form surrounding at least a portion of each of the magnetic layers.
12. The printed circuit board according to claim 1 , wherein the magnetic layer contacts a wall surface of the through portion.
13. an upper surface of the magnetic layer is substantially coplanar with an upper surface of the substrate; The printed circuit board of claim 1 , wherein the bottom surface of the magnetic layer is substantially coplanar with the bottom surface of the substrate.
14. The printed circuit board of claim 1 , wherein the substrate comprises an organic core layer, a glass core layer, a metal core layer, a silicon core layer, or a ceramic core layer.
15. A substrate having a through portion; a magnetic layer having a through hole and at least a portion of the magnetic layer being disposed within the through portion; a first metal layer disposed on a wall surface of the through hole and extending onto an upper surface and a lower surface of the magnetic layer; a second metal layer disposed on the first metal layer and filling at least a portion of the through hole; Including, A printed circuit board, wherein the first metal layer contacts each of a wall surface of the through hole, an upper surface of the magnetic layer, and a lower surface of the magnetic layer.
16. a filler disposed between the second metal layers, filling at least a portion of the through hole, and having a portion protruding onto each of the upper and lower surfaces of the magnetic layer; a third metal layer disposed on an upper surface of each of the second metal layer and the filler; a fourth metal layer disposed on a lower surface of each of the second metal layer and the filler; 16. The printed circuit board of claim 15, further comprising:
17. the second metal layer fills at least a portion of the through hole without a filler material; 16. The printed circuit board of claim 15, wherein at least a portion of each of the upper and lower surfaces of the second metal layer contacts an insulating material.
18. The printed circuit board of claim 15 , further comprising a magnetic composite inductor (MCI) including the magnetic layer, the through hole, and the first and second metal layers.