Quantum circuit information generation program, quantum circuit information generation method, and information processing device

Abstract

To reduce an amount of usage of a memory required when storing quantum circuit information.SOLUTION: An information processing device 100 specifies types of partial circuits appearing two or more times in an object quantum circuit 110. The information processing device 100 stores first circuit information 111 in a storage unit 101, and stores second circuit information 112 in the storage unit 101. The first circuit information 111 makes one partial circuit belonging to the specified type to be possible to be generated. The second circuit information 112 designates the object quantum circuit 110 by expressing at least one partial circuit which belongs to the specified type for each of the specified types while using reference information which makes it possible to refer to the first circuit information 111 stored in the storage unit 101.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a quantum circuit information generation program, a quantum circuit information generation method, and an information processing device. [Background technology]

[0002] Conventionally, quantum computing is used to solve problems such as pricing of financial derivatives. For example, a classical computer generates quantum circuit information that specifies a quantum circuit for solving the target problem, and a quantum computer solves the target problem based on the generated quantum circuit information.

[0003] Prior art techniques include, for example, precompiling each block in a gate circuit representing a quantum program and using it as static to repeatedly execute the quantum program on a quantum processor. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Special Publication No. 2022-547989 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in conventional technology, as the number of quantum bits forming a quantum circuit increases depending on the complexity of the problem, the memory usage required to store the quantum circuit information generated by a classical computer increases exponentially.

[0006] In one aspect, the present invention aims to reduce the amount of memory used when storing quantum circuit information. [Means for solving the problem]

[0007] According to one embodiment, a quantum circuit information generation program, a quantum circuit information generation method, and an information processing device are proposed that, in a target quantum circuit having a plurality of partial circuits, identify the type of partial circuits that appear in the target quantum circuit, store in a memory unit only one piece of first circuit information for each identified type that enables generation of one partial circuit belonging to the identified type, and store in the memory unit second circuit information that defines the target quantum circuit by representing at least one partial circuit belonging to the identified type for each identified type using reference information that enables reference to the first circuit information stored in the memory unit. Effect of the Invention

[0008] According to one aspect, it is possible to reduce the amount of memory used when storing quantum circuit information. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram illustrating an example of an information processing method according to an embodiment. [Diagram 2] FIG. 2 is an explanatory diagram illustrating an example of an information processing system 200. As shown in FIG. [Diagram 3] FIG. 3 is a block diagram showing an example of a hardware configuration of the information processing device 100. As shown in FIG. [Figure 4] FIG. 4 is a block diagram showing an example of the hardware configuration of the quantum computing device 201. [Diagram 5] FIG. 5 is a block diagram showing an example of a functional configuration of the information processing device 100. As shown in FIG. [Figure 6] FIG. 6 is an explanatory diagram showing the flow of operations of the information processing system 200. [Figure 7] FIG. 7 is an explanatory diagram (part 1) showing an example of the operation of the information processing device 100. [Figure 8] FIG. 8 is an explanatory diagram (part 2) showing an example of the operation of the information processing device 100. [Figure 9] FIG. 9 is an explanatory diagram (part 3) showing an example of the operation of the information processing device 100. [Figure 10] FIG. 10 is an explanatory diagram (part 4) showing an example of the operation of the information processing device 100. [Figure 11] FIG. 11 is an explanatory diagram (part 1) showing an example of quantum circuit information. [Figure 12] FIG. 12 is an explanatory diagram (part 2) showing an example of the quantum circuit information. [Figure 13] FIG. 13 is an explanatory diagram (part 1) showing a possible result as an example of the effect of the information processing device 100. [Figure 14] FIG. 14 is an explanatory diagram (part 2) showing a possible result as an example of the effect of the information processing device 100. [Figure 15] FIG. 15 is a flowchart illustrating an example of an overall processing procedure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a quantum circuit information generation program, a quantum circuit information generation method, and an information processing device according to the present invention will be described in detail with reference to the drawings.

[0011] (An example of an information processing method according to an embodiment) 1 is an explanatory diagram showing an example of an information processing method according to an embodiment. The information processing device 100 is a computer for generating quantum circuit information that defines a quantum circuit for solving a problem. The information processing device 100 is, for example, a server or a PC (Personal Computer).

[0012] In addition to problems in the field of chemistry, quantum computing is also being used to solve problems in the field of finance, such as determining the price of financial derivatives. Examples of financial derivatives include derivative options. A derivative option is the right to buy or sell an underlying asset at a pre-set price in the future. The underlying asset may be a stock or the like. For example, the price of the underlying asset for future buying and selling is set by estimating the time evolution of the price of the underlying asset.

[0013] Here, if quantum computing can solve problems in the financial field quickly, it is believed that it will be easier to deal with the increasing complexity of the computational model or the increase in the number of products that can be handled during business hours. Therefore, if quantum computing can solve problems in the financial field quickly, it is believed that financial transactions can be activated and economic effects can be increased. For example, a classical computer generates quantum circuit information that specifies a quantum circuit for solving a target problem, and a quantum computer actually prepares a quantum circuit based on the generated quantum circuit information to solve the target problem.

[0014] However, the processing time required for a classical computer to generate quantum circuit information, or the memory usage required for storing the quantum circuit information generated by the classical computer, may increase. For example, depending on the complexity of the target problem, the number of quantum bits forming the quantum circuit, or the depth of the quantum circuit, may increase, and the quantum circuit may become large-scale. For example, the larger the quantum circuit, the more exponentially the processing time required for a classical computer to generate quantum circuit information, or the memory usage required for storing the quantum circuit information generated by the classical computer, increases. Therefore, there is a problem that the performance of the classical computer becomes a bottleneck in solving the target problem, and it becomes difficult to solve the target problem depending on the complexity of the target problem.

[0015] Here, in order to solve a practically meaningful problem, it is necessary to prepare a relatively large-scale quantum circuit. For example, when solving a practically meaningful problem, the number of quantum bits forming the quantum circuit to be prepared may be several thousand or more. Specifically, when the target problem is a problem of determining the price of a derivative option, quantum circuit information that specifies the quantum circuit to be prepared is generated according to a quantum amplitude estimation algorithm. The quantum amplitude estimation algorithm includes, for example, a first algorithm that uses quantum phase estimation, and a second algorithm that does not use quantum phase estimation, which can reduce the number of quantum bits compared to the first algorithm that uses quantum phase estimation.

[0016] The second algorithm generates quantum circuit information that specifies a quantum circuit corresponding to, for example, Maximum Likelihood Amplitude Estimation. For the second algorithm, for example, the following Reference 1 can be referred to. According to the second algorithm, specifically, the number of quantum bits forming the quantum circuit to be prepared can be 8000 or more. Similarly, according to the second algorithm, specifically, the depth of the quantum circuit to be prepared can be 5.4×10^7 or more. Therefore, there is a problem that it is difficult to solve problems that are practically meaningful. For the difficulty of solving problems that are practically meaningful, for example, the following Reference 2 can be referred to.

[0017] Reference 1: Suzuki, Yohichi, et al. “Amplitude estimation without phase estimation.” Quantum Information Processing 19 (2020): 1-17.

[0018] Reference 2: Chakrabarti, Shouvanik, et al. “A threshold for quantum advantage in derivative pricing.” Quantum 5 (2021): 463.

[0019] Therefore, in this embodiment, an information processing method that can reduce the memory usage required for storing quantum circuit information will be described. Also, according to this information processing method, it is possible to reduce the processing time required for generating quantum circuit information.

[0020] In FIG. 1, the information processing device 100 has a storage unit 101. The information processing device 100 stores a predetermined algorithm for solving a target problem in the storage unit 101. The predetermined algorithm specifies the target problem based on, for example, specified parameters, and specifies processing content for solving the target problem. The predetermined algorithm specifies processing content for solving the target problem by maximum likelihood amplitude estimation based on, for example, specified parameters. The target quantum circuit 110 can be treated as having, for example, multiple partial circuits. In the target quantum circuit 110, the same partial circuit may appear two or more times.

[0021] (1-1) The information processing device 100 identifies the type of a partial circuit that appears in the target quantum circuit 110. For example, the information processing device 100 identifies the type of a partial circuit that appears twice or more in the target quantum circuit 110. Specifically, the information processing device 100 identifies the type of a partial circuit that appears twice or more in the target quantum circuit 110 based on a predetermined algorithm and a specified parameter. The type, for example, identifies a partial circuit that realizes a predetermined function based on a predetermined algorithm. The predetermined function is, for example, a function clearly indicated in the predetermined algorithm. The predetermined function may be, for example, a function that the information processing device 100 separates from the overall function of the predetermined algorithm. In the example of FIG. 1, the information processing device 100 specifically identifies a type Q of a partial circuit that performs a Grover operation and appears twice or more in the target quantum circuit 110 corresponding to the maximum likelihood amplitude estimation.

[0022] (1-2) The information processing device 100 stores the first circuit information 111 in the storage unit 101, and also stores the second circuit information 112 in the storage unit 101. The first circuit information 111 enables generation of one partial circuit belonging to a specified type. The second circuit information 112 specifies the target quantum circuit 110 by expressing at least one partial circuit belonging to the specified type for each specified type using reference information that allows reference to the first circuit information 111 stored in the storage unit 101. The reference information is, for example, a label that identifies the first circuit information 111. The reference information is, for example, an address that indicates the storage location of the first circuit information 111 stored in the storage unit 101. The second circuit information 112 may, for example, express all partial circuits belonging to the specified type for each specified type using reference information that allows reference to the first circuit information 111 stored in the storage unit 101.

[0023] The information processing device 100 generates, for example, only one first circuit information 111 for each specified type that enables generation of one partial circuit belonging to the specified type. The information processing device 100 generates, for example, second circuit information 112. The information processing device 100 stores, for example, only one of the generated first circuit information 111 for each specified type in the storage unit 101, and stores the generated second circuit information 112 in the storage unit 101. In the example of FIG. 1, the information processing device 100 specifically generates the first circuit information 111 that enables generation of one partial circuit belonging to type Q. The information processing device 100 specifically generates the second circuit information 112 that specifies the target quantum circuit 110 by expressing all partial circuits belonging to type Q using reference information that enables reference to the first circuit information 111. Specifically, the information processing device 100 stores the generated first circuit information 111 and the generated second circuit information 112 in the storage unit 101.

[0024] Thereby, the information processing device 100 can generate a combination of the first circuit information 111 and the second circuit information 112, which is quantum circuit information that enables identification of the target quantum circuit 110 to be prepared, and store it in the storage unit 101. The information processing device 100 can transmit the combination of the first circuit information 111 and the second circuit information 112 to the quantum computer. Therefore, the information processing device 100 can make the target quantum circuit 110 available for preparation by the quantum computer. In addition, the information processing device 100 can reduce the memory usage required when storing the quantum circuit information that enables identification of the target quantum circuit 110 to be prepared. In addition, the information processing device 100 can reduce the processing time required when generating quantum circuit information that enables identification of the target quantum circuit 110 to be prepared.

[0025] Here, for example, a conventional method is considered for generating quantum circuit information that describes the relationship between each operation unit, such as a gate, and a quantum bit that constitutes the target quantum circuit 110, for each operation unit. Specifically, this conventional method generates the quantum circuit information according to QASM (Quantum Assembly Language). QASM is an assembly language for quantum circuits.

[0026] In this conventional method, the target quantum circuit 110 is recognized not in units of partial circuits but in units of operation units such as gates, and quantum circuit information is generated. In this conventional method, partial circuits that appear more than once in the target quantum circuit 110 are not taken into consideration. In this conventional method, even if there are partial circuits that appear more than once in the target quantum circuit 110, the relationship between each operation unit such as gates that form the partial circuits and quantum bits is comprehensively described for all partial circuits.

[0027] In response to this, the information processing device 100 can describe a partial circuit that appears two or more times in the target quantum circuit 110 in the first circuit information 111. Furthermore, the information processing device 100 can omit at least one of the partial circuits that appear two or more times in the target quantum circuit 110 by using the first circuit information 111, without describing it in the second circuit information 112. Therefore, the information processing device 100 can reduce the memory usage required to store quantum circuit information that enables identification of the target quantum circuit 110 to be prepared, compared to the conventional method. Furthermore, the information processing device 100 can reduce the processing time required to generate quantum circuit information that enables identification of the target quantum circuit 110 to be prepared.

[0028] Here, a case has been described in which the information processing device 100 identifies a type of a partial circuit that appears two or more times in the target quantum circuit 110, but this is not limiting. For example, there may be a case in which the information processing device 100 identifies a type of a partial circuit that appears N or more times in the target quantum circuit 110. N may be, for example, 1. N may be, for example, 3 or more.

[0029] Here, the case where the functions of the information processing device 100 are realized by a single computer has been described, but the present invention is not limited to this. For example, the functions of the information processing device 100 may be realized by cooperation of multiple computers. Specifically, the functions of the information processing device 100 may be realized on the cloud.

[0030] (An example of the information processing system 200) Next, an example of an information processing system 200 to which the information processing device 100 shown in FIG. 1 is applied will be described with reference to FIG.

[0031] 2 is an explanatory diagram showing an example of an information processing system 200. In FIG. 2, the information processing system 200 includes the information processing device 100, a quantum computing device 201, and a client device 202.

[0032] In the information processing system 200, the information processing device 100 and the quantum computing device 201 are connected via a wired or wireless network 210. The network 210 is, for example, a local area network (LAN), a wide area network (WAN), the Internet, etc. In the information processing system 200, the information processing device 100 and the client device 202 are connected via the wired or wireless network 210.

[0033] The information processing device 100 is a computer for generating quantum circuit information that specifies a quantum circuit for solving a target problem. The information processing device 100 acquires a processing request that requests the generation of quantum circuit information. The processing request may include, for example, parameters related to the target problem. The information processing device 100 acquires the processing request by receiving it from another computer. The other computer is, for example, the client device 202. The information processing device 100 may acquire the processing request by accepting an input of the processing request based on, for example, a user's operation input. The information processing device 100 has a storage unit. The information processing device 100 stores a predetermined algorithm for solving the problem in the storage unit based on parameters related to the problem.

[0034] The information processing device 100 generates quantum circuit information that specifies a target quantum circuit that solves a target problem in response to a processing request. The information processing device 100 acquires parameters related to the target problem, for example, based on the processing request. The information processing device 100 identifies a type of a sub-circuit that appears two or more times in the target quantum circuit based on a predetermined algorithm and the acquired parameters. The information processing device 100 may also identify a type of a sub-circuit that appears at least once in the target quantum circuit based on a predetermined algorithm and the acquired parameters.

[0035] The information processing device 100 stores the first circuit information in the storage unit and also stores the second circuit information in the storage unit. The first circuit information enables generation of one partial circuit belonging to a specified type. The partial circuit is an element forming a target quantum circuit. The second circuit information specifies the target quantum circuit by expressing at least one partial circuit belonging to the specified type for each specified type using reference information that allows reference to the first circuit information stored in the storage unit. The reference information is, for example, a label that identifies the first circuit information. The reference information is, for example, an address that indicates the storage location of the first circuit information stored in the storage unit. The second circuit information may, for example, express all partial circuits belonging to the specified type for each specified type using reference information that allows reference to the first circuit information stored in the storage unit.

[0036] The information processing device 100 generates, for example, only one piece of first circuit information for each specified type that enables generation of one partial circuit belonging to the specified type. The information processing device 100 generates, for example, second circuit information by referring to the generated first circuit information. The information processing device 100 stores, for example, only one piece of generated first circuit information for each specified type in a storage unit, and stores the generated second circuit information in a storage unit. The information processing device 100 transmits quantum circuit information including a combination of the stored first circuit information and the stored second circuit information to the quantum computing device 201.

[0037] The information processing device 100 receives a solution to a target problem from the quantum computing device 201. The information processing device 100 outputs the solution to the target problem. For example, the information processing device 100 transmits the solution to the target problem to the client device 202. For example, the information processing device 100 may output the solution to the target problem so that the user can refer to it. The information processing device 100 is, for example, a server or a PC.

[0038] The quantum computing device 201 is a computer for performing quantum computing. The quantum computing device 201 receives quantum circuit information from the information processing device 100. The quantum computing device 201 identifies a target quantum circuit based on the quantum circuit information, and calculates a solution to a target problem by executing the target quantum circuit. The quantum computing device 201 transmits the calculated solution to the target problem to the information processing device 100. The quantum computing device 201 is, for example, a quantum computer.

[0039] The client device 202 is a computer used by an analyst who sets a target problem. The client device 202 generates a processing request that requests the generation of quantum circuit information. The client device 202 generates the processing request by accepting an input of the processing request based on, for example, an operational input by the analyst. The client device 202 transmits the generated processing request to the information processing device 100.

[0040] As a result of transmitting the processing request, the client device 202 receives a solution to the target problem from the information processing device 100. The client device 202 outputs the solution to the target problem. For example, the client device 202 outputs the solution to the target problem so that the analyst can refer to it. The client device 202 is, for example, a PC, a tablet terminal, or a smartphone.

[0041] Here, the case where the information processing device 100 is a computer different from the quantum computing device 201 has been described, but is not limited thereto. For example, the information processing device 100 may have a function as the quantum computing device 201 and also operate as the quantum computing device 201. In addition, here, the case where the information processing device 100 is a computer different from the client device 202 has been described, but is not limited thereto. For example, the information processing device 100 may have a function as the client device 202 and also operate as the client device 202.

[0042] (Example of hardware configuration of information processing device 100) Next, an example of the hardware configuration of the information processing device 100 will be described with reference to FIG.

[0043] Fig. 3 is a block diagram showing an example of a hardware configuration of the information processing device 100. In Fig. 3, the information processing device 100 has a CPU (Central Processing Unit) 301, a memory 302, a network I / F (Interface) 303, a recording medium I / F 304, and a recording medium 305. In addition, each component is connected to each other via a bus 300.

[0044] Here, the CPU 301 is responsible for the overall control of the information processing device 100. The memory 302 has, for example, a read only memory (ROM), a random access memory (RAM), and a flash ROM. Specifically, for example, the flash ROM and the ROM store various programs, and the RAM is used as a work area for the CPU 301. The programs stored in the memory 302 are loaded into the CPU 301, causing the CPU 301 to execute the coded processes.

[0045] The network I / F 303 is connected to the network 210 through a communication line, and is connected to other computers via the network 210. The network I / F 303 manages an internal interface with the network 210, and controls input and output of data from other computers. The network I / F 303 is, for example, a modem or a LAN adapter.

[0046] The recording medium I / F 304 controls reading / writing data from / to the recording medium 305 under the control of the CPU 301. The recording medium I / F 304 is, for example, a disk drive, a solid state drive (SSD), a universal serial bus (USB) port, etc. The recording medium 305 is a non-volatile memory that stores data written under the control of the recording medium I / F 304. The recording medium 305 is, for example, a disk, a semiconductor memory, a USB memory, etc. The recording medium 305 may be detachable from the information processing device 100.

[0047] In addition to the above-mentioned components, the information processing device 100 may have, for example, a keyboard, a mouse, a display, a printer, a scanner, a microphone, a speaker, etc. Furthermore, the information processing device 100 may have a plurality of recording medium I / Fs 304 and recording media 305. Furthermore, the information processing device 100 may not have the recording medium I / Fs 304 and the recording media 305.

[0048] (Example of hardware configuration of quantum computing device 201) Next, an example of the hardware configuration of the quantum computing device 201 will be described with reference to FIG.

[0049] Fig. 4 is a block diagram showing an example of a hardware configuration of the quantum computing device 201. In Fig. 4, the quantum computing device 201 has a CPU 401, a memory 402, a network I / F 403, a recording medium I / F 404, and a recording medium 405. The quantum computing device 201 further has a calculation device I / F 406 and a calculation device 407. In addition, each component is connected to each other by a bus 400.

[0050] Here, the CPU 401 is responsible for the overall control of the quantum computing device 201. The memory 402 has, for example, a ROM, a RAM, and a flash ROM. Specifically, for example, the flash ROM and the ROM store various programs, and the RAM is used as a work area for the CPU 401. The programs stored in the memory 402 are loaded into the CPU 401, causing the CPU 401 to execute the coded processes.

[0051] The network I / F 403 is connected to the network 210 through a communication line, and is connected to other computers via the network 210. The network I / F 403 manages an internal interface with the network 210, and controls input and output of data from other computers. The network I / F 403 is, for example, a modem or a LAN adapter.

[0052] The recording medium I / F 404 controls reading / writing data from / to the recording medium 405 under the control of the CPU 401. The recording medium I / F 404 is, for example, a disk drive, an SSD, a USB port, etc. The recording medium 405 is a non-volatile memory that stores data written under the control of the recording medium I / F 404. The recording medium 405 is, for example, a disk, a semiconductor memory, a USB memory, etc. The recording medium 405 may be detachable from the quantum computing device 201.

[0053] The arithmetic device I / F 406 controls access to the arithmetic device 407 under the control of the CPU 401. The arithmetic device I / F 406 converts an output signal from the CPU 401 into an input signal for the arithmetic device 407 using a microwave pulse generator, and transmits it to the arithmetic device 407. The arithmetic device I / F 406 converts an output signal from the arithmetic device 407 into an input signal for the CPU 401 using a microwave pulse demodulator, and transmits it to the CPU 401. The arithmetic device 407 is an arithmetic device equipped with one or more quantum bit chips cooled to an extremely low temperature of 10 mK. The quantum bit chip represents, for example, a logical quantum bit. The arithmetic device 407 performs a predetermined operation according to an input signal using one or more quantum bit chips, and outputs an output signal corresponding to the result of performing the predetermined operation.

[0054] The quantum computing device 201 may have, in addition to the above-mentioned components, for example, a keyboard, a mouse, a display, a printer, a scanner, a microphone, a speaker, etc. Also, the quantum computing device 201 may have a plurality of recording medium I / Fs 404 and recording media 405. Also, the quantum computing device 201 may not have the recording medium I / Fs 404 and recording media 405.

[0055] (Example of Hardware Configuration of Client Device 202) Specifically, an example of the hardware configuration of the client device 202 is similar to the example of the hardware configuration of the information processing device 100 shown in FIG. 3, and therefore a description thereof will be omitted.

[0056] (Example of functional configuration of information processing device 100) Next, an example of a functional configuration of the information processing device 100 will be described with reference to FIG.

[0057] 5 is a block diagram showing an example of a functional configuration of the information processing device 100. The information processing device 100 includes a storage unit 510, an acquisition unit 501, a first storage unit 502, a second storage unit 503, and an output unit 504.

[0058] The storage unit 510 is realized by, for example, a storage area such as the memory 302 or the recording medium 305 shown in Fig. 3. In the following, a case where the storage unit 510 is included in the information processing device 100 will be described, but this is not limiting. For example, the storage unit 510 may be included in a device different from the information processing device 100, and the stored contents of the storage unit 510 may be accessible from the information processing device 100.

[0059] The acquiring unit 501 to the output unit 504 function as an example of the control unit 500. Specifically, the acquiring unit 501 to the output unit 504 realize their functions by, for example, causing the CPU 301 to execute a program stored in a storage area such as the memory 302 or the recording medium 305 shown in Fig. 3, or by the network I / F 303. The processing results of each functional unit are stored in, for example, a storage area such as the memory 302 or the recording medium 305 shown in Fig. 3.

[0060] The storage unit 510 stores various information that is referred to or updated in the processing of each functional unit. The storage unit 510 stores, for example, an algorithm for solving a problem. The predetermined algorithm specifies a target problem based on, for example, parameters, and specifies a series of processing parts for solving the target problem. The series of processing parts includes a processing part that repeats the same processing content. The predetermined algorithm is, for example, set in advance by a user. The parameters are, for example, acquired by the acquisition unit 501.

[0061] The storage unit 510 stores quantum circuit information that defines a quantum circuit for solving a problem. The quantum circuit information is, for example, a combination of one or more pieces of first circuit information and second circuit information. The first circuit information is, for example, circuit information that enables one partial circuit to be generated. The second circuit information is, for example, circuit information that defines a quantum circuit by expressing at least one partial circuit using reference information that enables the first circuit information to be referenced. The first circuit information exists in the second circuit information to avoid repeatedly defining the specific contents of the same partial circuit, and contributes to reducing memory usage of the quantum circuit information. The specific contents are, for example, a description of the relationship between each operation unit such as a gate that forms a partial circuit and a quantum bit.

[0062] The acquisition unit 501 acquires various information used for processing by each functional unit. The acquisition unit 501 stores the acquired various information in the storage unit 510 or outputs it to each functional unit. The acquisition unit 501 may also output the various information stored in the storage unit 510 to each functional unit. The acquisition unit 501 acquires various information based on, for example, a user's operation input. The acquisition unit 501 may receive various information from, for example, a device different from the information processing device 100.

[0063] The acquiring unit 501, for example, acquires a processing request. The processing request may include, for example, parameters related to the target problem. Specifically, the acquiring unit 501 acquires the processing request by receiving it from another computer. The other computer is, for example, the client device 202. Specifically, the acquiring unit 501 may acquire the processing request by accepting an input of the processing request based on an operational input by a user.

[0064] The acquiring unit 501 acquires, for example, parameters related to the target problem. Specifically, the acquiring unit 501 acquires the parameters related to the target problem by extracting the parameters related to the target problem from the processing request. Specifically, the acquiring unit 501 may acquire the parameters related to the target problem by accepting input of the parameters related to the target problem based on an operation input by a user. Specifically, the acquiring unit 501 acquires the parameters related to the target problem by receiving them from another computer. The other computer is, for example, the client device 202.

[0065] The acquiring unit 501 may receive a start trigger for starting processing of any of the functional units. The start trigger may be, for example, a predetermined operation input by a user. The start trigger may be, for example, reception of predetermined information from another computer. The start trigger may be, for example, output of predetermined information by any of the functional units. Specifically, the acquiring unit 501 may receive a processing request as a start trigger for starting processing of the first storage unit 502 and the second storage unit 503 in response to acquiring the processing request.

[0066] The first storage unit 502 identifies the type of at least any of the partial circuits appearing in the target quantum circuit. The first storage unit 502, for example, identifies the type of the partial circuit appearing two or more times in the target quantum circuit. The target quantum circuit is, for example, a quantum circuit that realizes quantum amplitude estimation. The type identifies a partial circuit that realizes a predetermined function based on, for example, a predetermined algorithm. Specifically, the type may be predefined on the predetermined algorithm. Specifically, the type may be determined by the first storage unit 502 based on the predetermined algorithm.

[0067] The predetermined function is, for example, a function of a predetermined unit specified in a predetermined algorithm. The predetermined function is, for example, a function of a processing part that performs the same processing content two or more times. The predetermined function may be, for example, a function separated by the information processing device 100 from the overall function of the predetermined algorithm. When the target quantum circuit is a quantum circuit that realizes quantum amplitude estimation, the predetermined function is specifically a function of generating random numbers, a function of calculating the expected value of the payoff, a function of performing a Grover operation, and the like.

[0068] Specifically, the first storage unit 502 identifies processing parts that perform the same processing content two or more times among a plurality of processing parts to be performed when solving the target problem, based on a predetermined algorithm and the parameters acquired by the acquisition unit 501. Specifically, the first storage unit 502 identifies the type of partial circuit that realizes the processing content in the identified processing part. More specifically, when the target quantum circuit realizes quantum amplitude estimation, the first storage unit 502 identifies at least one of the type of partial circuit that generates random numbers, the type of partial circuit that calculates the expected value of the payoff, and the type of partial circuit that performs the Grover operation.

[0069] Thereby, the first storage unit 502 can determine which first circuit information that enables the generation of a partial circuit is to be stored in the memory unit 510 in order to reduce the memory usage of the quantum circuit information. The first storage unit 502 can determine, for example, to store in the memory unit 510 the first circuit information that enables the generation of a partial circuit only if it is of a type that is useful for reducing the memory usage of the quantum circuit information. If it is not necessary to repeatedly specify the specific contents of a partial circuit that appears two or more times in the second circuit information, the type of the partial circuit that appears two or more times is a type that is useful for reducing the memory usage of the quantum circuit information, since it contributes to reducing the memory usage of the quantum circuit information.

[0070] The first storage unit 502 may, for example, identify the types of all partial circuits that appear in the target quantum circuit. Specifically, the first storage unit 502 identifies the types of each of a plurality of processing parts that are executed when solving the target problem as the types of partial circuits based on a predetermined algorithm and the parameters acquired by the acquisition unit 501. More specifically, when the target quantum circuit is a quantum circuit that realizes quantum amplitude estimation, the first storage unit 502 identifies the type of partial circuit that generates random numbers, the type of partial circuit that calculates the expected value of the payoff, and the type of partial circuit that performs the Grover operation.

[0071] Thereby, in order to reduce the memory usage of the quantum circuit information, the first storage unit 502 can determine which of the first circuit information enables generation of a partial circuit to be stored in the memory unit 510. For example, the first storage unit 502 can determine to store in the memory unit 510 the first circuit information that enables generation of a partial circuit for all types.

[0072] The first storage unit 502 stores, for each specified type, the first circuit information enabling generation of one partial circuit belonging to the specified type, in the storage unit 510. For example, the first storage unit 502 generates, for each specified type, the first circuit information that represents the specific contents of one partial circuit belonging to the specified type and enables generation of one partial circuit, and stores the information in the storage unit 510. This allows the first storage unit 502 to store the first circuit information in the storage unit 510 in order to reduce the memory usage of the quantum circuit information.

[0073] The second storage unit 503 generates second circuit information that defines a target quantum circuit by representing at least one partial circuit using reference information that allows the first circuit information stored in the storage unit 510 to be referenced, and stores the second circuit information in the storage unit 510. The reference information is, for example, an address that indicates the storage location of the first circuit information stored in the storage unit 510. The reference information may be, for example, a label assigned to the first circuit information stored in the storage unit 510.

[0074] The second circuit information is information that specifies the target quantum circuit by expressing at least one partial circuit belonging to a specified type by the specified type using reference information that allows reference to the first circuit information stored in the storage unit 510. This allows the second storage unit 503 to avoid including specific contents of at least one partial circuit in the second circuit information. Therefore, the second storage unit 503 can reduce the memory usage of the quantum circuit information compared to the case where specific contents of all partial circuits are included in the quantum circuit information.

[0075] The second circuit information is information that specifies the target quantum circuit by expressing each of the partial circuits belonging to the specified type by the specified type using reference information that allows reference to the first circuit information stored in the storage unit 510. This allows the second storage unit 503 to avoid including specific contents of some partial circuits in the second circuit information. Therefore, the second storage unit 503 can reduce the memory usage of the quantum circuit information compared to the case where the specific contents of all partial circuits are included in the quantum circuit information.

[0076] The output unit 504 outputs the processing result of at least one of the functional units. The output format is, for example, display on a display, printout on a printer, transmission to an external device via the network I / F 303, or storage in a storage area such as the memory 302 or the recording medium 305. In this way, the output unit 504 can notify the user of the processing result of at least one of the functional units, thereby improving the convenience of the information processing device 100.

[0077] The output unit 504 outputs, for example, the first circuit information and the second circuit information stored in the storage unit 510. The output unit 504 transmits, for example, a combination of the first circuit information and the second circuit information stored in the storage unit 510 as quantum circuit information to another computer that performs quantum computation.

[0078] The acquiring unit 501 may receive from the other computer a result of the quantum circuit information being output by the output unit 504, the result of the quantum computation performed by the other computer forming a target quantum circuit based on the first circuit information and the second circuit information. The output unit 504 outputs, for example, the result of the quantum computation. The output unit 504 outputs, for example, the result of the quantum computation so that the user can refer to it.

[0079] (Operation flow of information processing system 200) Next, the flow of operations of the information processing system 200 will be described with reference to FIG.

[0080] Fig. 6 is an explanatory diagram showing the flow of operations of the information processing system 200. In Fig. 6, the information processing device 100 performs parameter setting 601. Specifically, the information processing device 100 accepts parameter settings related to a target problem. This enables the information processing device 100 to specify what multiple processing parts should be performed when solving the target problem.

[0081] The information processing device 100 stores a predetermined algorithm that specifies what kind of multiple processing parts are to be executed when solving a target problem. The information processing device 100 executes quantum circuit information generation 602. Specifically, the information processing device 100 generates quantum circuit information that does not require repeatedly specifying the specific contents of the same partial circuit when specifying a target quantum circuit based on a predetermined algorithm and parameters whose settings have been accepted. A specific example of generating quantum circuit information will be described later with reference to Figs. 7 to 10. The information processing device 100 transmits the generated quantum circuit information to the quantum computing device 201.

[0082] The quantum computing device 201 receives quantum circuit information from the information processing device 100. The quantum computing device 201 performs quantum circuit construction 611. Specifically, the quantum computing device 201 issues a quantum bit manipulation command based on the quantum circuit information, and actually constructs a quantum circuit using the quantum bits. The quantum computing device 201 performs quantum circuit execution 612. Specifically, the quantum computing device 201 executes the constructed quantum circuit. Specifically, the quantum computing device 201 transmits the result of executing the quantum circuit to the information processing device 100. This allows the information processing system 200 to execute the quantum circuit and obtain the result of executing the quantum circuit.

[0083] Here, conventional classical computers recognize the target quantum circuit in units of operation units such as gates, not in units of partial circuits. Therefore, it is considered that conventional classical computers generate quantum circuit information that repeatedly specifies the specific contents of partial circuits, even if the same partial circuits appear repeatedly in the target quantum circuit. Therefore, conventional classical computers have a problem that the memory usage of quantum circuit information is likely to increase. Similarly, conventional classical computers have a problem that the processing time required to generate quantum circuit information is likely to increase.

[0084] Specifically, when solving a practically significant problem related to determining the price of derivative options with complex commercial properties, the depth of the quantum circuit tends to be large, and the number of quantum bits forming the quantum circuit tends to be large. Therefore, when solving a practically significant problem with a conventional classical computer, the memory usage of the quantum circuit information or the processing time required to generate the quantum circuit information increases.

[0085] In a conventional classical computer, the memory usage of the quantum circuit information may become larger than the maximum memory capacity, and the quantum circuit information may become unable to be stored. In a conventional classical computer, the processing time required to generate the quantum circuit information may become larger than the practically allowable time, and the quantum circuit information may become difficult to generate. In this way, there is a problem that the performance of the conventional classical computer becomes a bottleneck, and it becomes difficult to solve the target problem depending on the complexity of the target problem.

[0086] In contrast, if the same partial circuit appears repeatedly in the target quantum circuit, the information processing device 100 can avoid having to repeatedly specify the specific contents of the same partial circuit in the quantum circuit information. Therefore, the information processing device 100 can reduce the memory usage of the quantum circuit information. For example, the information processing device 100 can easily suppress the memory usage of the quantum circuit information to within the maximum capacity of the memory. Similarly, the information processing device 100 can reduce the processing time required to generate the quantum circuit information. For example, the information processing device 100 can easily suppress the processing time required to generate the quantum circuit information to within a practically allowable time. In this way, the information processing device 100 can make it easier to solve the target problem even if the target problem becomes complicated.

[0087] (An example of the operation of the information processing device 100) Next, an example of the operation of the information processing device 100 will be described with reference to FIGS.

[0088] 7 to 10 are explanatory diagrams showing an example of the operation of the information processing device 100. In the examples of Fig. 7 to 10, the target problem is a problem related to price determination of a derivative option. The information processing device 100 stores, for example, a quantum computing algorithm that estimates the time evolution of the price of an underlying asset and determines the price of the derivative option.

[0089] The quantum computing algorithm represents, for example, the sequential implementation of step 1, step 2, step 3, and step 4. Step 1 is a process of generating random numbers that give the time evolution of the price of the underlying asset. The random numbers are defined, for example, by a probability density function. Step 2 is a process of creating a function that calculates the expected value of the payoff when the option is exercised. The function represents, for example, solving a Monte Carlo integral. The payoff is revenue. Step 3 is a process of performing a Grover operation that encodes the expected value of the Monte Carlo integral into the probability that any quantum bit takes the value 1. Step 4 is a process of estimating the "probability of 1" by quantum amplitude estimation.

[0090] Here, the information processing device 100 is required to generate quantum circuit information that specifies a target quantum circuit including partial circuits that realize step 1, step 2, and step 3. Here, the number of quantum bits that form the target quantum circuit may exceed 8000, for example. Also, the depth of the target quantum circuit may exceed 5.4×10^7, for example. Therefore, the information processing device 100 tends to be required to generate quantum circuit information so that the memory usage required for storing the quantum circuit information is reduced. Next, we move on to the explanation of FIG. 7.

[0091] Referring to FIG. 7, an example of a quantum circuit 700 for solving a problem related to pricing of derivative options will be described. As shown in FIG. 7, the quantum circuit 700 realizes maximum likelihood amplitude estimation. The quantum circuit 700 includes a probability density distribution circuit P, a payoff function circuit F, and a Grover arithmetic circuit Q. Specifically, the quantum circuit 700 includes partial circuits 711, 721, 731, etc., each including the probability density distribution circuit P and the payoff function circuit F. In addition, the quantum circuit 700 specifically includes partial circuits 712, 722, 732, etc., each including one or more Grover arithmetic circuits Q. Q n represents that the compound contains n Q's.

[0092] Moreover, the quantum circuit 700 specifically includes arithmetic units 713, 723, 733, etc. The information processing device 100 realizes maximum likelihood amplitude estimation by collectively post-processing the measurement results of the arithmetic units 713, 723, 733. Next, the description will move to FIG.

[0093] 8, an example of a quantum circuit 800 for solving a problem related to pricing of derivative options is described, where the number of quantum bits is 4 and the repetition index k of the Grover operation is 3. The quantum circuit 800 is a specific example of the quantum circuit 700.

[0094] 8, quantum circuit 800 includes quantum circuits 810, 820, 830, and 840. Quantum circuit 810 includes a partial circuit 811 that becomes a probability density distribution circuit P. Quantum circuit 810 includes an arithmetic unit 812. Quantum circuit 810 includes a partial circuit 813 that becomes a payoff function circuit F. Quantum circuit 810 includes an arithmetic unit 814. Quantum circuit 810 includes an arithmetic unit 815.

[0095] The quantum circuit 820 includes a partial circuit 821 that becomes a probability density distribution circuit P. The quantum circuit 820 includes an arithmetic unit 822. The quantum circuit 820 includes a partial circuit 823 that becomes a payoff function circuit F. The quantum circuit 820 includes a partial circuit 824 that becomes a Grover arithmetic circuit Q. The quantum circuit 820 includes an arithmetic unit 825. The quantum circuit 820 includes an arithmetic unit 826.

[0096] The quantum circuit 830 includes a partial circuit 831 that becomes a probability density distribution circuit P. The quantum circuit 830 includes an arithmetic unit 832. The quantum circuit 830 includes a partial circuit 833 that becomes a payoff function circuit F. The quantum circuit 830 includes partial circuits 834 and 835 that become Grover arithmetic circuit Q. The quantum circuit 830 includes an arithmetic unit 836. The quantum circuit 830 includes an arithmetic unit 837.

[0097] The quantum circuit 840 includes a partial circuit 841 that becomes a probability density distribution circuit P. The quantum circuit 840 includes an arithmetic unit 842. The quantum circuit 840 includes a partial circuit 843 that becomes a payoff function circuit F. The quantum circuit 840 includes partial circuits 844 to 847 that become a Grover arithmetic circuit Q. The quantum circuit 840 includes an arithmetic unit 848. The quantum circuit 840 includes an arithmetic unit 849.

[0098] For example, in the quantum circuit 800, the Grover arithmetic circuit Q appears multiple times as partial circuits 824, 834, 835, 844 to 847. Conventionally, the quantum circuit 800 is recognized in units of arithmetic units such as gates, not in units of the Grover arithmetic circuit Q. Conventionally, the specific contents of each of the partial circuits 824, 834, 835, 844 to 847 are all specified in the quantum circuit information, so there is a problem that the memory usage of the quantum circuit information is likely to increase. Therefore, the information processing device 100 generates quantum circuit information so that it is not necessary to specify the specific contents of at least one of the partial circuits 824, 834, 835, 844 to 847.

[0099] Similarly, for example, in the quantum circuit 800, the probability density distribution circuit P appears multiple times as the partial circuits 811, 821, 831, and 841. Similarly, for example, in the quantum circuit 800, the payoff function circuit F appears multiple times as the partial circuits 813, 823, 833, and 843. In addition, the information processing device 100 may recognize the combination of the arithmetic units 814 and 815, the combination of the arithmetic units 825 and 826, the combination of the arithmetic units 836 and 837, and the combination of the arithmetic units 848 and 849 as partial circuits that appear multiple times. Next, we move on to the description of FIG. 9.

[0100] 9, the information processing device 100 generates quantum circuit information that defines a quantum circuit 900. The quantum circuit 900 corresponds to the quantum circuit 800 and the like. The quantum circuit 900 includes a partial circuit 901 that serves as a probability density distribution circuit P, a partial circuit 902 that serves as a payoff function circuit F, and partial circuits 903 and 904 that serve as a Grover arithmetic circuit Q.

[0101] For the sake of simplicity, the parts of the quantum circuit 900 corresponding to the arithmetic units 812, 814, 815, etc. are omitted. For convenience of explanation, the quantum circuit 900 is illustrated in the example of Fig. 9, but the information processing device 100 does not need to specify the quantum circuit 900 itself due to the maximum memory capacity. For example, it is preferable that the information processing device 100 performs the operation described below by analyzing what type of partial circuit appears in the quantum circuit 900 based on a quantum computing algorithm without specifying the quantum circuit 900 itself.

[0102] (9-1) The information processing device 100 identifies the type of each of a plurality of partial circuits in functional units. For example, the information processing device 100 identifies the type of a partial circuit that appears at least once in functional units. In the example of Fig. 9, the information processing device 100 specifically identifies a probability density distribution circuit P, a payoff function circuit F, and a Grover arithmetic circuit Q as types.

[0103] (9-2) For each identified type, the information processing device 100 generates partial circuit information that enables generation of one partial circuit of that type, and stores the information in memory. For example, the information processing device 100 associates the partial circuit information with an index of the partial circuit information, and stores the information in a partial circuit information table 910 prepared in the memory. A specific example of the contents of the partial circuit information table 910 will be described later with reference to FIG.

[0104] The information processing device 100 specifically generates partial circuit information 911 representing one partial circuit that will become a probability density distribution circuit P. The information processing device 100 specifically generates partial circuit information 912 representing one partial circuit that will become a payoff function circuit F. The information processing device 100 specifically generates partial circuit information 913 representing one partial circuit that will become a Grover arithmetic circuit Q. This allows the information processing device 100 to store only one specific content of each type of partial circuit, and makes it possible to avoid specifying the specific content of the partial circuit in the quantum circuit information.

[0105] (9-3) The information processing device 100 generates overall circuit information 920. For example, the information processing device 100 generates overall circuit information 920 that defines the quantum circuit 900 without defining the specific contents of the various partial circuits 901-904 by expressing the various partial circuits 901-904 using reference information that enables reference to the partial circuit information 911-913. The reference information is, for example, an index of the various partial circuits 901-904. The reference information may be, for example, an address that indicates the storage location of the various partial circuits 901-904.

[0106] This allows the information processing device 100 to generate quantum circuit information as a combination of the entire circuit information 920 and the partial circuit information 911 to 913. The information processing device 100 can avoid having to repeatedly specify the specific contents of the partial circuit by specifying them only once in the quantum circuit information, thereby reducing the memory usage of the quantum circuit information.

[0107] Here, the case has been described where the information processing device 100 identifies the type of partial circuit that appears at least once for each function and generates partial circuit information for each identified type, but this is not limiting. For example, the information processing device 100 may identify the type of partial circuit that appears at least N times for each function and generate partial circuit information for each identified type. N is an integer equal to or greater than 2. In this case, the information processing device 100 may not generate partial circuit information for the type of partial circuit that appears less than N times, and may directly specify the specific contents of the partial circuit that appears less than N times in the overall circuit information 920.

[0108] Here, the case where the information processing device 100 specifies the probability density distribution circuit P, the payoff function circuit F, and the Grover arithmetic circuit Q as types has been described, but the present invention is not limited to this. For example, the information processing device 100 may recognize a specific combination of arithmetic units as a partial circuit based on a quantum computing algorithm, and specify the type of the partial circuit. Returning to the example of FIG. 8, the specific combination of arithmetic units corresponds specifically to the combination of arithmetic units 814 and 815, the combination of arithmetic units 825 and 826, the combination of arithmetic units 836 and 837, and the combination of arithmetic units 848 and 849. Next, the description of FIG. 10 will be moved to.

[0109] In Fig. 10, the conventional quantum circuit information 1000 is compared with the quantum circuit information generated by the information processing device 100. As shown in Fig. 10, the conventional quantum circuit information 1000 specifies the specific contents of all partial circuits that appear multiple times. For this reason, the processing time required to generate the quantum circuit information 1000 tends to be long. In addition, the quantum circuit information 1000 tends to use a large amount of memory.

[0110] On the other hand, the information processing device 100 can generate only one piece of partial circuit information that defines a partial circuit for each type of partial circuit and store it in memory. For a partial circuit that appears multiple times, the information processing device 100 only needs to define specific contents once. Therefore, the information processing device 100 can reduce the processing time required to generate quantum circuit information.

[0111] Furthermore, the information processing device 100 can specify how and how many times the partial circuit appears in the entire circuit information 920 by using the addresses 1011-1014 of the partial circuit information. Here, the memory usage of the addresses 1011-1014 of the partial circuit information is smaller than the memory usage of the partial circuit information. Therefore, the information processing device 100 can reduce the memory usage of the quantum circuit information.

[0112] (An example of quantum circuit information) Next, an example of the quantum circuit information will be described with reference to Fig. 11 and Fig. 12. In the example of Fig. 11 and Fig. 12, the quantum circuit information is a combination of a partial circuit information table 1100 and entire circuit information 1200.

[0113] Fig. 11 and Fig. 12 are explanatory diagrams showing an example of quantum circuit information. An example of a partial circuit information table 1100 forming the quantum circuit information will be described with reference to Fig. 11. As shown in Fig. 11, the partial circuit information table 1100 stores a partial circuit information index and partial circuit information content in association with each other in a range of addresses in a memory.

[0114] The "memory address" in Fig. 11 is an address in memory. The "partial circuit information index" in Fig. 11 indicates an index assigned to partial circuit information stored in any range of addresses in memory. The "partial circuit information content" in Fig. 11 indicates the specific content of partial circuit information stored in any range of addresses in memory. Next, we move on to an explanation of Fig. 12.

[0115] An example of overall circuit information 1200 forming quantum circuit information will be described with reference to Fig. 12. As shown in Fig. 12, the overall circuit information 1200 stores a combination of one or more quantum bits in association with a partial circuit information index. "Quantum bits to be coupled" in Fig. 12 indicates a combination of one or more quantum bits to be input to a partial circuit. "Partial circuit information index" in Fig. 12 indicates an index assigned to a partial circuit to which one or more quantum bits are input.

[0116] (One example of the effect of the information processing device 100) Next, possible results as an example of the effects of the information processing device 100 will be described with reference to FIGS.

[0117] 13 and 14 are explanatory diagrams showing possible results as an example of the effect of the information processing device 100. In the examples of FIG. 13 and FIG. 14, the information processing device 100 generates quantum circuit information that specifies a target quantum circuit based on an algorithm that extends the maximum likelihood amplitude estimation of Qiskit. In addition, as a comparative example of the information processing device 100, in a conventional method, the target quantum circuit is classified into minimum unit operation units such as gates, and the relationship between each operation unit and a quantum bit is comprehensively described to generate quantum circuit information that specifies the target quantum circuit. Next, we move on to the description of FIG. 13.

[0118] In FIG. 13, graph 1300 shows, with a solid line, the ratio of the total processing time taken by the information processing device 100 to generate quantum circuit information relative to the total processing time taken to generate quantum circuit information by a conventional method. The total processing time does not include the processing time for performing quantum computation by the quantum computing device 201. Graph 1300 shows, with a dotted line, the ratio of the function processing time taken by the information processing device 100 to generate quantum circuit information relative to the function processing time taken to generate quantum circuit information by a conventional method. The function is a quantum circuit information generation function (construct_circuit). Specifically, graph 1300 shows the ratio for each number of quantum bits when k is constant at 5.

[0119] Graph 1310 also shows, with a solid line, the ratio of the total processing time taken by the information processing device 100 to generate quantum circuit information relative to the total processing time taken to generate quantum circuit information by a conventional method. Graph 1310 also shows, with a dotted line, the ratio of the function processing time taken by the information processing device 100 to generate quantum circuit information relative to the function processing time taken to generate quantum circuit information by a conventional method. The function is a quantum circuit information generation function (construct_circuit). Specifically, graph 1310 shows the ratio for each value of k when the number of quantum bits is constant at 7.

[0120] According to the graph 1300, when k=5, the information processing device 100 can reduce the total processing time or the function processing time by an average of 80% or more, regardless of the number of quantum bits. According to the graph 1300, when the number of quantum bits=7, the information processing device 100 can reduce the total processing time or the function processing time more efficiently as the value of k increases. In other words, the information processing device 100 can reduce the total processing time or the function processing time more efficiently as the number of times the same partial circuit appears increases. In this way, the information processing device 100 can reduce the total processing time or the function processing time when generating quantum circuit information, compared to the conventional method. Next, we move on to the explanation of FIG. 14.

[0121] 14, graph 1400 shows, with a solid line, the ratio of the total memory usage required when the information processing device 100 generates quantum circuit information to the total memory usage required when generating quantum circuit information using a conventional method. Graph 1400 shows, with a dotted line, the ratio of the function memory usage required when the information processing device 100 generates quantum circuit information to the function memory usage required when generating quantum circuit information using a conventional method. The function is a quantum circuit information generation function. Graph 1400 specifically shows the ratio for each number of quantum bits when k is constant at 5.

[0122] Moreover, the graph 1410 shows, with a solid line, the ratio of the total memory usage required when the information processing device 100 generates quantum circuit information to the total memory usage required when generating quantum circuit information by the conventional method. The graph 1410 shows, with a dotted line, the ratio of the function memory usage required when the information processing device 100 generates quantum circuit information to the function memory usage required when generating quantum circuit information by the conventional method. The function is a quantum circuit information generation function. Specifically, the graph 1410 shows the ratio for each value of k when the number of quantum bits is constant at 7.

[0123] According to the graph 1400, when k=5, the information processing device 100 can reduce the total memory usage or the function memory usage by an average of 80% or more, regardless of the number of quantum bits. According to the graph 1400, when the number of quantum bits=7, the information processing device 100 can reduce the total memory usage or the function memory usage more efficiently as the value of k increases. In other words, the information processing device 100 can reduce the total memory usage or the function memory usage more efficiently as the number of times the same partial circuit appears increases. In this way, the information processing device 100 can reduce the total memory usage or the function memory usage when generating quantum circuit information, compared to the conventional method.

[0124] (Overall processing procedure) Next, an example of an overall processing procedure executed by the information processing device 100 will be described with reference to Fig. 15. The overall processing is realized by, for example, the CPU 301, storage areas such as the memory 302 and the recording medium 305, and the network I / F 303 shown in Fig. 3.

[0125] 15 is a flowchart showing an example of an overall processing procedure, in which the information processing device 100 identifies an algorithm for solving a target problem (step S1501).

[0126] Based on the identified algorithm, the information processing device 100 identifies one or more processing parts each representing a different type of processing content for one time from among a plurality of processing parts to be implemented when solving the target problem (step S1502).

[0127] The information processing device 100 selects a processing part that has not been selected yet from the one or more identified processing parts (step S1503). The information processing device 100 generates partial circuit information that defines a partial circuit that represents the processing content of one processing of the selected processing part, and stores the partial circuit information in memory (step S1504).

[0128] The information processing device 100 determines whether or not all of the one or more identified processing parts have been selected (step S1505). If there is a processing part that has not yet been selected (step S1505: No), the information processing device 100 returns to the process of step S1503. On the other hand, if all of the processing parts have been selected (step S1505: Yes), the information processing device 100 proceeds to the process of step S1506.

[0129] In step S1506, the information processing device 100 selects an address of partial circuit information that has not yet been selected from the memory (step S1506). The information processing device 100 adds a command statement for calling the partial circuit information present at the selected address to the quantum circuit information (step S1507).

[0130] The information processing device 100 determines whether or not the command statement for calling the partial circuit information present at the selected address has been added for the number of repetitions of the processing content represented by the partial circuit information present at the selected address (step S1508). If the command statement has not been added for the number of repetitions (step S1508: No), the information processing device 100 returns to the processing of step S1507. On the other hand, if the command statement has been added for the number of repetitions (step S1508: Yes), the information processing device 100 proceeds to the processing of step S1509.

[0131] In step S1509, the information processing device 100 determines whether or not all addresses of partial circuit information have been selected from the memory (step S1509). If there are addresses of partial circuit information that have not yet been selected (step S1509: No), the information processing device 100 returns to the process of step S1506. On the other hand, if all addresses of partial circuit information have been selected (step S1509: Yes), the information processing device 100 proceeds to the process of step S1510.

[0132] In step S1510, the information processing device 100 outputs the quantum circuit information (step S1510). The information processing device 100 transmits the quantum circuit information to the quantum computing device 201, for example. The information processing device 100 ends the entire process. This allows the information processing device 100 to reduce the memory usage of the quantum circuit information. Here, the information processing device 100 may change the order of the processes of some of the steps in FIG. 15 and execute them. Furthermore, the information processing device 100 may omit the processes of some of the steps in FIG. 15.

[0133] As described above, the information processing device 100 can identify the type of a partial circuit that appears two or more times in a target quantum circuit. The information processing device 100 can store in the storage unit 510 only one piece of first circuit information for each specified type that enables generation of one partial circuit belonging to the specified type. The information processing device 100 can store in the storage unit 510 second circuit information that specifies the target quantum circuit by expressing at least one partial circuit belonging to the specified type for each specified type using reference information that enables reference to the first circuit information. This allows the information processing device 100 to reduce the memory usage of the quantum circuit information. The information processing device 100 can reduce the processing time required to generate the quantum circuit information.

[0134] According to the information processing device 100, the second circuit information that specifies the target quantum circuit by expressing each partial circuit belonging to the specified type by the specified type using the reference information can be stored in the storage unit 510. This allows the information processing device 100 to further reduce the memory usage of the quantum circuit information. The information processing device 100 can further reduce the processing time required to generate the quantum circuit information.

[0135] According to the information processing device 100, it is possible to use, as the reference information, an address indicating a storage location of the first circuit information stored in the storage unit 510. This allows the information processing device 100 to realize the second circuit information by using the address.

[0136] The information processing device 100 can be applied to a target quantum circuit that solves a target problem. This allows the information processing device 100 to generate quantum circuit information that specifies a target quantum circuit that solves a target problem. The information processing device 100 can make the target problem solvable.

[0137] According to the information processing device 100, among a plurality of processing parts implemented when solving a target problem, a processing part that implements the same processing content two or more times can be identified, and the type of a partial circuit that realizes the processing content in the identified processing part can be identified. In this way, the information processing device 100 can efficiently identify the type of a partial circuit that appears two or more times in a target quantum circuit. The information processing device 100 can also be applied to a case where the type of a partial circuit that appears two or more times is not known.

[0138] The information processing device 100 can be applied when the target quantum circuit is a quantum circuit that realizes quantum amplitude estimation. The information processing device 100 can specify at least one of the types of partial circuits that generate random numbers, the types of partial circuits that calculate the expected value of the payoff, and the types of partial circuits that perform the Grover operation. This allows the information processing device 100 to easily specify the types of partial circuits, thereby reducing the processing time.

[0139] According to the information processing device 100, the first circuit information and the second circuit information stored in the storage unit 510 can be transmitted to another computer that performs quantum computation. According to the information processing device 100, as a result of the transmission, the other computer forms a target quantum circuit based on the first circuit information and the second circuit information, and the result of performing the quantum computation can be received from the other computer. This allows the information processing device 100 to automatically perform the quantum computation. The information processing device 100 can improve the convenience of the user.

[0140] The information processing method described in this embodiment can be realized by executing a prepared program on a computer such as a PC or a workstation. The information processing program described in this embodiment is recorded on a computer-readable recording medium, and is executed by being read from the recording medium by the computer. The recording medium may be a hard disk, a flexible disk, a CD (Compact Disc)-ROM, an MO (Magneto Optical disc), a DVD (Digital Versatile Disc), or the like. The information processing program described in this embodiment may also be distributed via a network such as the Internet.

[0141] The following supplementary notes are further disclosed regarding the above-described embodiment.

[0142] (Supplementary Note 1) In a target quantum circuit having multiple subcircuits, Identifying a type of subcircuit that appears in the target quantum circuit; storing, in a storage unit, one piece of first circuit information for each of the identified types, which enables generation of one partial circuit belonging to the identified type; and storing, in the storage unit, second circuit information that specifies the target quantum circuit by expressing at least one partial circuit belonging to the identified type for each of the identified types using reference information that enables reference to the first circuit information stored in the storage unit. A quantum circuit information generation program for causing a computer to execute processing.

[0143] (Supplementary Note 2) The quantum circuit information generation program according to Supplementary Note 1, characterized in that the second circuit information is information that defines the target quantum circuit by representing each partial circuit belonging to the identified type by the identified type using the reference information.

[0144] (Supplementary Note 3) The quantum circuit information generation program according to Supplementary Note 1 or 2, characterized in that the reference information is an address indicating a storage location of the first circuit information stored in the memory unit.

[0145] (Supplementary Note 4) The quantum circuit information generation program according to Supplementary Note 1 or 2, characterized in that the target quantum circuit is a quantum circuit that solves a target problem.

[0146] (Appendix 5) The process to be specified is: 5. The quantum circuit information generation program according to claim 4, further comprising: identifying a processing portion that performs the same processing content two or more times among a plurality of processing portions that are performed when solving the target problem; and identifying a type of a partial circuit that realizes the processing content in the identified processing portion.

[0147] (Additional Note 6) The target quantum circuit is a quantum circuit that realizes quantum amplitude estimation, 3. The quantum circuit information generation program according to claim 1, wherein the type is at least one of a type of a partial circuit that generates random numbers and a type of a partial circuit that performs a Grover operation.

[0148] (Supplementary Note 7) The quantum circuit information generation program according to Supplementary Note 6, wherein the types further include a type of a partial circuit for calculating an expected value of a payoff.

[0149] (Appendix 8) The first circuit information and the second circuit information stored in the storage unit are transmitted to another computer that performs quantum computing, and the other computer forms the target quantum circuit based on the first circuit information and the second circuit information, and receives a result of performing the quantum computing from the other computer. 3. The quantum circuit information generation program according to claim 1 or 2, characterized in that the program causes the computer to execute processing.

[0150] (Appendix 9) In a target quantum circuit having a plurality of subcircuits, Identifying a type of subcircuit that appears in the target quantum circuit; storing, in a storage unit, one piece of first circuit information for each of the identified types, which enables generation of one partial circuit belonging to the identified type; and storing, in the storage unit, second circuit information that specifies the target quantum circuit by expressing at least one partial circuit belonging to the identified type for each of the identified types using reference information that enables reference to the first circuit information stored in the storage unit. A quantum circuit information generating method, characterized in that the processing is executed by a computer.

[0151] (Supplementary Note 10) In a target quantum circuit having a plurality of subcircuits, Identifying a type of subcircuit that appears in the target quantum circuit; storing, in a storage unit, one piece of first circuit information for each of the identified types, which enables generation of one partial circuit belonging to the identified type; and storing, in the storage unit, second circuit information that specifies the target quantum circuit by expressing at least one partial circuit belonging to the identified type for each of the identified types using reference information that enables reference to the first circuit information stored in the storage unit. An information processing device comprising a control unit. [Explanation of symbols]

[0152] 100 Information processing device 101,510 storage section 110,700,800,810,820,830,840,900 quantum circuit 111 1st circuit information 112 2nd circuit information 200 Information Processing Systems 201 Quantum computing device 210 Network 202 Client device 300,400 Bus 301,401 CPU 302,402 Memory 303,403 Network I / F 304,404 Recording media I / F 305,405 Recording media 406 Arithmetic unit I / F 407 Arithmetic equipment 500 Control section 501 Acquisition Department 502 First Storage Unit 503 Second Storage Unit 504 Output section 601 Parameter Settings 602 Quantum circuit information generation 611 Quantum Circuit Construction 612 Quantum Circuit Execution 711,712,721,722,731,732,811,813,821,823,824,831,833~835,841,843~847,901~904 Partial circuit 713,723,733,812,814,815,822,825,826,832,836,837,842,848,849 Arithmetic unit 910,1100 Partial circuit information table 911~913 Partial circuit information 920,1200 Overall circuit information 1000 quantum circuit information 1011~1014 Address 1300,1310,1400,1410 Graph

Claims

1. In a target quantum circuit having a plurality of subcircuits, Identifying a type of subcircuit that appears in the target quantum circuit; a storage unit stores, for each of the identified types, first circuit information enabling generation of one partial circuit belonging to the identified type, and stores, in the storage unit, second circuit information defining the target quantum circuit by expressing at least one partial circuit belonging to the identified type for each of the identified types using reference information enabling reference to the first circuit information stored in the storage unit; A quantum circuit information generation program for causing a computer to execute processing.

2. 2. The quantum circuit information generation program according to claim 1, wherein the second circuit information is information that specifies the target quantum circuit by expressing each partial circuit belonging to the identified type by the identified type using the reference information.

3. 3. The quantum circuit information generation program according to claim 1, wherein the reference information is an address indicating a storage location of the first circuit information stored in the storage unit.

4. 3. The quantum circuit information generation program according to claim 1, wherein the target quantum circuit is a quantum circuit that solves a target problem.

5. The process of specifying 5. The quantum circuit information generation program according to claim 4, further comprising: identifying a processing portion that performs the same processing content two or more times among a plurality of processing portions that are performed when solving the target problem; and identifying a type of a partial circuit that realizes the processing content in the identified processing portion.

6. The target quantum circuit is a quantum circuit that realizes quantum amplitude estimation, 3. The quantum circuit information generation program according to claim 1, wherein the type is at least one of a type of a partial circuit that generates random numbers and a type of a partial circuit that performs a Grover operation.

7. In a target quantum circuit having a plurality of subcircuits, Identifying a type of subcircuit that appears in the target quantum circuit; a storage unit stores, for each of the identified types, first circuit information enabling generation of one partial circuit belonging to the identified type, and stores, in the storage unit, second circuit information defining the target quantum circuit by expressing at least one partial circuit belonging to the identified type for each of the identified types using reference information enabling reference to the first circuit information stored in the storage unit; A quantum circuit information generating method, characterized in that the processing is executed by a computer.

8. In a target quantum circuit having a plurality of subcircuits, Identifying a type of subcircuit that appears in the target quantum circuit; a storage unit stores, for each of the identified types, first circuit information enabling generation of one partial circuit belonging to the identified type, and stores, in the storage unit, second circuit information defining the target quantum circuit by expressing at least one partial circuit belonging to the identified type for each of the identified types using reference information enabling reference to the first circuit information stored in the storage unit; An information processing device comprising a control unit.

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