Semiconductor device

Abstract

To make it easy to fix a semiconductor module and a cooling module to improve heat dissipation.SOLUTION: A semiconductor device 1 includes a semiconductor module 2, a cooling module 3 and an adhesive member 4. The semiconductor module 2 includes a metal plate 22, having an underside 22a, on its rear side. The cooling module 3 includes a cooling surface 3a where the underside 22a of the metal plate 22 is arranged. The adhesive member 4 is provided between the underside 22a of the metal plate 22 and the cooling surface 3a, and contains a conductive filler, which connects the underside 22a and cooling surface 3a together.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a semiconductor device.

Background Art

[0002] A semiconductor device is disposed on a cooling module via a bonding member in a semiconductor module to dissipate heat (see, for example, Patent Document 1). The bonding member mainly comprises, for example, an organic resin or solder (see, for example, Patent Documents 2 and 3).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0004] An object of the present invention is to provide a semiconductor device in which a semiconductor module and a cooling module are easily fixed and heat dissipation performance is improved.

Means for Solving the Problems

[0005] According to one aspect of the present invention, there is provided a semiconductor device including: a semiconductor module including a metal plate having a lower surface on a back surface side; a cooling module including a cooling surface on which the lower surface of the metal plate is disposed; and an adhesive member provided between the lower surface of the metal plate and the cooling surface, containing a conductive filler, and connecting the lower surface and the cooling surface.

[0006] Further, the filler may include those made of metal. Further, the metal may be silver, copper, gold, nickel, chromium, aluminum, or an alloy containing at least one of these.

[0007] Further, the filler may be sintered and in contact with the lower surface of the metal plate and the cooling surface. Further, the adhesive member may be composed of an organic resin mainly composed of a thermosetting resin and the filler.

[0008] Further, the thermosetting resin may be an epoxy resin, a phenolic resin, or a polyimide resin. Further, the semiconductor module may include an insulating circuit board including the metal plate, an insulating plate provided on the back surface of the metal plate, and a conductive pattern provided on the front surface of the insulating plate.

[0009] Further, the insulating plate may be composed mainly of an insulating filler and a resin. Further, the coefficient of linear expansion of the insulating plate may be substantially equal to the coefficients of linear expansion of the conductive pattern and the metal plate.

[0010] Further, the semiconductor module may further include a semiconductor chip provided on the conductive pattern and a sealing member for sealing the semiconductor chip and the insulating circuit board, and the lower surface of the metal plate of the insulating circuit board may protrude from the lower surface of the sealing member.

[0011] Further, the adhesive member may be in contact with the entire lower surface of the metal plate protruding from the lower surface of the sealing member. Further, the thickness of the adhesive member may be 50 μm or more and 150 μm or less.

[0012] Further, the thermal conductivity of the adhesive member may be 10 W / mK or more. Further, the adhesive strength of the adhesive member may be 10 MPa or more. Further, the elastic modulus of the adhesive member may be 10 GPa or less.

[0013] Note that the above summary of the invention does not enumerate all the necessary features of the present invention. Also, sub - combinations of these feature groups can also be inventions.

Advantages of the Invention

[0014] According to the disclosed technology, the fixation between the semiconductor module and the cooling module can be facilitated, and the heat dissipation performance can be improved.

Brief Description of the Drawings

[0015]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Embodiments for Carrying Out the Invention

[0016] Hereinafter, embodiments will be described with reference to the drawings. In the following description, "front surface" and "upper surface" refer to the X-Y plane facing upward (+Z direction) in the semiconductor device in the figure. Similarly, "up" refers to the upward (+Z direction) in the semiconductor device in the figure. "Back surface" and "lower surface" refer to the X-Y plane facing downward (-Z direction) in the semiconductor device in the figure. Similarly, "down" refers to the downward (-Z direction) in the semiconductor device in the figure. The same directionality as described above is meant in all the drawings as necessary. "Higher level" and "upper position" refer to the position on the upper side (+Z direction) in the semiconductor device in the figure. Similarly, "lower level" and "lower position" refer to the position on the lower side (-Z direction) in the semiconductor device in the figure. "Front surface", "upper surface", "up" and "back surface", "lower surface", "down" and "side surface" are merely convenient expressions for specifying relative positional relationships and do not limit the technical idea of the present invention. For example, "up" and "down" do not necessarily mean the vertical direction with respect to the ground. That is, the directions of "up" and "down" are not limited to the gravitational direction. In the following description, "main component" means the case where it contains 80 vol% or more. Also, "substantially the same" may be in the range within ±10%. Also, "vertical", "orthogonal", and "parallel" may be in the range within ±10°.

[0017] The semiconductor device 1 of the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a side sectional view of the semiconductor device of the embodiment. FIG. 2 is a side sectional view of the adhesive member of the semiconductor device of the embodiment. Note that FIG. 1 is a cross section parallel to the Z-X plane at the center of the semiconductor device 1 in a plan view and is a view when seen in the +Y direction. FIG. 2 is an enlarged view of region B in the adhesive member 4 of FIG. 1. Region B is an example of the region included in the adhesive member 4. In other regions of the adhesive member 4 as well, a filler 4a is included between the lower surface 22a of the metal plate 22 and the cooling surface 3a of the cooling module 3, similar to region B.

[0018] The semiconductor device 1 includes a semiconductor module 2, a cooling module 3, and an adhesive member 4 that fixes the semiconductor module 2 and the cooling module 3. Note that the semiconductor device 1 may include other necessary components in addition to these.

[0019] The semiconductor module 2 includes semiconductor chips 10a, 10b, 10d, 10e, an insulating circuit board 20, a printed circuit board 30, and a sealing member 35 that seals these components. The semiconductor chips 10a, 10b, 10d, 10e may be power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) composed mainly of silicon carbide. In the power MOSFET, the body diode may function as a FWD (Free Wheeling Diode). Such semiconductor chips 10a, 10b, 10d, 10e each have, for example, an input electrode (drain electrode), which is a main electrode, on the back surface, and an output electrode (source electrode) and a control electrode (gate electrode), which are main electrodes, on the front surface. Note that the control electrode may be provided offset from the center of one side portion of the front surface of the semiconductor chips 10a, 10b, 10d, 10e or along the side portion from the center.

[0020] The semiconductor chips 10a, 10b, 10d, 10e may alternatively include switching elements composed mainly of silicon. The switching element is, for example, an RC (Reverse-Conducting)-IGBT (Insulated Gate Bipolar Transistor). The RC-IGBT is a semiconductor element in which an IGBT and an FWD are configured in a reverse parallel arrangement within one chip.

[0021] Such semiconductor chips 10a, 10b, 10d, 10e each have an input electrode (collector electrode), which is a main electrode, on the back surface, and an output electrode (emitter electrode) and a control electrode (gate electrode), which are main electrodes, on the front surface. Note that the control electrode may be provided offset from the center of one side portion of the front surface of the semiconductor chips 10a, 10b, 10d, 10e or along the side portion from the center, similar to the case of the power MOSFET.

[0022] Also, for example, the semiconductor chips 10a, 10b, 10d, 10e may be semiconductor chips each composed mainly of silicon and including a set of switching elements and diode elements. Specifically, the semiconductor chips 10a, 10d may be switching elements, and the semiconductor chips 10b, 10e may be diode elements. The switching element may be, for example, a power MOSFET or an IGBT. The semiconductor chip including the switching element has, for example, an input electrode as a main electrode on the back surface (drain electrode in the case of a power MOSFET, collector electrode in the case of an IGBT), and a gate electrode as a control electrode and an output electrode as a main electrode (source electrode in the case of a power MOSFET, emitter electrode in the case of an IGBT) on the front surface. Also, for the diode element, for example, an SBD (Schottky Barrier Diode) or a PiN (P-intrinsic-N) diode is used as the FWD. The semiconductor chip including the diode element has an output electrode (cathode electrode) as a main electrode on the back surface and an input electrode (anode electrode) as a main electrode on the front surface, respectively.

[0023] Such semiconductor chips 10a, 10b and semiconductor chips 10d, 10e are respectively joined to conductive patterns 23a, 23b described later by solder 12. The solder 12 is composed of solder components. The solder components are substances that constitute the solder 12 and include lead-free solder with a predetermined alloy as the main component. The predetermined alloy contains tin. Such an alloy is, for example, at least one of an alloy composed of tin-silver, an alloy composed of tin-silver-copper, an alloy composed of tin-zinc-bismuth, an alloy composed of tin-copper, tin-silver-indium-bismuth, and an alloy composed of tin-antimony. Further, such solder components may contain additives. Examples of the additives include nickel, germanium, cobalt, or silicon. Therefore, the solder components include, for example, at least one of silver, zinc, copper, bismuth, indium, and antimony together with tin. Further, the solder components may include at least one of nickel, germanium, cobalt, and silicon. Also, the thickness of the solder 12 is 50 μm or more and 300 μm or less. Note that the solder components of the solder 32 described later are the same as those of the solder 12. Further, instead of the solder 12, a sintered body may be used. The sintering material in the case of joining with a sintered body is, for example, powder of silver, iron, copper, aluminum, titanium, nickel, tungsten, or molybdenum.

[0024] The insulating circuit board 20 includes an insulating plate 21, a metal plate 22, and conductive patterns 23a, 23b. The insulating plate 21 and the metal plate 22 are rectangular in plan view. Also, the insulating plate 21 and the metal plate 22 may have their corners chamfered with an R chamfer or a C chamfer. The size of the metal plate 22 is smaller than the size of the insulating plate 21 in plan view and is formed inside the insulating plate 21.

[0025] The insulating board 21 is made of, for example, resin. The resin may be a material with low thermal resistance and high insulation. Such resin includes, for example, thermosetting resin. The thermosetting resin may further contain a filler. By controlling the material and content of the filler in the insulating board 21, the thermal resistance of the insulating board 21 can be further reduced. Furthermore, according to the filler, the coefficient of linear expansion of the insulating board 21 can be made substantially equal to the coefficients of linear expansion of the metal plate 22 and the conductive patterns 23a and 23b described later. By reducing the difference in the coefficient of linear expansion in this way, the insulating circuit board 20 can reduce the occurrence of warping due to the difference in the coefficient of linear expansion even when a thermal change occurs. In this case, the difference in the coefficient of linear expansion may be within an error range of 10% or more and 50% or less.

[0026] Such thermosetting resins include, for example, at least one of epoxy resin, cyanate resin, polyimide resin, benzoxazine resin, unsaturated polyester resin, phenol resin, melamine resin, silicone resin, maleimide resin, acrylic resin, and polyamide resin. The filler is composed of at least one of an oxide and a nitride. Examples of the oxide include silicon oxide and aluminum oxide. Examples of the nitride include silicon nitride, aluminum nitride, and boron nitride. Furthermore, hexagonal boron nitride may be used as the filler. The thickness of such an insulating board 21 depends on the rated voltage of the semiconductor device 1. That is, the higher the rated voltage of the semiconductor device 1, the more necessary it is to increase the thickness of the insulating board 21. On the other hand, it is necessary to make the insulating board 21 as thin as possible to reduce the thermal resistance.

[0027] Instead of resin, the insulating board 21 may be a ceramic substrate. The ceramic substrate is made of a ceramic with good thermal conductivity. The ceramic is composed of, for example, a material mainly containing aluminum oxide, aluminum nitride, or silicon nitride. For the insulating circuit board 20 including the insulating board 21 having such a configuration, for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazed) substrate can be used.

[0028] In this embodiment, the insulating plate 21 is made of resin, and the difference between the linear expansion coefficient of the insulating plate 21 and the linear expansion coefficients of the metal plate 22 and the conductive patterns 23a and 23b is made small.

[0029] The metal plate 22 is made of a metal having excellent thermal conductivity. As such a material, for example, it is made of copper, aluminum, or an alloy containing at least one of these. Here, it contains copper. Further, in order to improve corrosion resistance, a plating treatment may be performed on the surface of the metal plate 22. In this case, the plating material contains nickel. Such plating materials are, for example, nickel, nickel-phosphorus alloy, and nickel-boron alloy. Note that the lower surface 22a of the metal plate 22 is also the lower surface of the insulating circuit board 20. Also, the lower surface 22a of the metal plate 22 protrudes from the lower surface 35a of a sealing member 35 described later. At this time, the lower surface 22a of the metal plate 22 may protrude outside the lower surface 35a of the sealing member 35, or may be flush with the lower surface 35a of the sealing member 35. In this embodiment, the lower surface 22a of the metal plate 22 is flush with the lower surface 35a of the sealing member 35. Also, the thickness of the metal plate 22 may be 3 times or more and 15 times or less the thickness of the insulating plate 21.

[0030] The conductive patterns 23a and 23b are arranged with the semiconductor chips 10a and 10b and the semiconductor chips 10d and 10e, respectively. The conductive patterns 23a and 23b are formed over the entire surface of the insulating plate 21 excluding the edge portions. Preferably, in a plan view, the end portions of the conductive patterns 23a and 23b facing the outer periphery of the insulating plate 21 overlap the end portions on the outer peripheral side of the metal plate 22. For this reason, the stress balance between the metal plate 22 on the back surface of the insulating plate 21 of the insulating circuit board 20 is maintained. Further damage such as excessive warping or cracking of the insulating plate 21 is suppressed.

[0031] The conductive patterns 23a and 23b are made of a material with excellent conductivity. Such materials include, for example, copper, aluminum, or an alloy containing at least one of these. It is also possible to perform a plating process on the conductive patterns 23a and 23b with a material having excellent corrosion resistance. Such materials are, for example, nickel, nickel-phosphorus alloy, and nickel-boron alloy. The conductive patterns 23a and 23b on the insulating plate 21 are obtained by forming a metal plate on the front surface of the insulating plate 21 and performing a process such as etching on this metal plate. Alternatively, the conductive patterns 23a and 23b cut out from a metal plate in advance may be joined to the front surface of the insulating plate 21. Note that the conductive patterns 23a and 23b included in the semiconductor device 1 of this embodiment are merely examples. The number, shape, size, etc. of the conductive patterns may be appropriately selected as needed.

[0032] The printed circuit board 30 includes an insulating layer and a plurality of upper circuit pattern layers formed on the front surface of the insulating layer. The printed circuit board 30 may also include a plurality of lower circuit pattern layers on the back surface of the insulating layer. Such a printed circuit board 30 faces the front surface of the insulating circuit board 20 in a plan view. Also, such a printed circuit board 30 is electrically connected to the output electrodes, input electrodes, and control electrodes of the semiconductor chips 10a, 10b, 10d, and 10e. Note that the conductive posts 31a, 31b, 31d, and 31e shown in FIG. 1 are merely examples, and may include conductive posts whose description is omitted in FIG. 1. Also, the upper portions of the conductive posts 31a, 31b, 31d, and 31e together with the conductive posts whose description is omitted are electrically connected to the upper circuit pattern layer and the lower circuit pattern layer of the printed circuit board 30, and the lower portions are connected to the output electrodes and control electrodes of the semiconductor chips 10a, 10b, 10d, and 10e by solder 32.

[0033] For example, the printed circuit board 30 is electrically connected to the output electrodes on the front surfaces of the semiconductor chips 10a and 10b through the conductive posts 31a and 31b. It is electrically connected to the output electrodes on the front surfaces of the semiconductor chips 10d and 10e through the conductive posts 31d and 31e.

[0034] The printed circuit board 30 is electrically connected to the input electrodes on the back surfaces of the semiconductor chips 10a and 10b via the conductive posts 31c and the conductive patterns 23a. Also, it is electrically connected to the input electrodes on the back surfaces of the semiconductor chips 10d and 10e via the conductive posts 31f and the conductive patterns 23b.

[0035] The printed circuit board 30 is electrically connected to the control electrodes of the semiconductor chips 10a and 10b via conductive posts (not shown). It is electrically connected to the control electrodes of the semiconductor chips 10d and 10e via conductive posts (not shown).

[0036] The sealing member 35 seals the entire insulating circuit board 20, the semiconductor chips 10a, 10b, 10d, and 10e, and the printed circuit board 30. If necessary, various terminals for input, output, and control, for example, may protrude from the upper surface of the sealing member 35. The sealing member 35 may form, for example, a rectangular parallelepiped and includes a flat lower surface 35a. From the lower surface 35a of the sealing member 35, the lower surface 22a of the metal plate 22 of the insulating circuit board 20 is exposed.

[0037] Such a sealing member 35 may be a thermosetting resin containing a filler. That is, the sealing member 35 is composed mainly of an insulating filler and a resin (thermosetting resin) described later. In this case, the thermosetting resin is, for example, an epoxy resin, a phenol resin, a maleimide resin, or a polyester resin. The filler may be mainly composed of ceramics having insulation and high heat conductivity. Such a filler is, for example, silicon oxide, aluminum oxide, boron nitride, or aluminum nitride. The content of the filler is 10% by volume or more and 70% by volume or less with respect to the entire sealing member 35.

[0038] The semiconductor module 2 having such a configuration is an example. For example, on a heat dissipation base, a DCB substrate and a semiconductor chip are sequentially arranged, the DCB substrate and the semiconductor chip are wired, and a case surrounding them is arranged on the heat dissipation base, and the inside of the case may be sealed with a sealing member. In this case, the lower surface of the heat dissipation base corresponds to the lower surface 22a of the metal plate 22.

[0039] The cooling module 3 has a cooling surface 3a on which the semiconductor module 2 is arranged on its upper surface. The cooling surface 3a is wider than the back surface of the semiconductor module 2 and is flat. The cooling module 3 may be, for example, a heat dissipation base provided with heat dissipation fins and a cooling device in which a refrigerant circulates inside.

[0040] The adhesive member 4 is provided between the lower surface 22a of the metal plate 22 of the semiconductor module 2 and the cooling surface 3a of the cooling module 3, and adheres the lower surface 22a of the metal plate 22 of the semiconductor module 2 and the cooling surface 3a of the cooling module 3. Thereby, the adhesive member 4 fixes the semiconductor module 2 and the cooling module 3 and thermally connects the metal plate 22 and the cooling module 3. The adhesive member 4 only needs to be in contact with at least the entire lower surface 22a of the metal plate 22 of the semiconductor module 2. The adhesive member 4 shown in FIG. 1 is within the back surface of the semiconductor module 2 including the lower surface 22a of the metal plate 22 of the semiconductor module 2 and is in contact with the entire back surface. That is, the adhesive member 4 does not protrude outward from each side surface of the semiconductor module 2. Note that the adhesive member 4 may protrude outward from each side surface of the semiconductor module 2 to the entire cooling surface 3a.

[0041] Such an adhesive member 4 is an adhesive of an organic resin mainly composed of a thermosetting resin and contains a conductive filler 4a (see FIG. 2). Examples of the thermosetting resin include epoxy resin, phenol resin, or polyimide resin. Here, an epoxy resin is used. The adhesive strength of such an adhesive member 4 is, for example, 10 MPa or more. Note that the adhesive strength here is the tensile adhesive strength. Further, the curing temperature of the adhesive member 4 is lower than the melting point of the solder 12, 32, for example, 200° C. or lower, preferably 175° C. or lower, and more preferably 150° C. or lower.

[0042] The filler 4a of the adhesive member 4 may contain a conductive metal. Examples of the metal include silver, copper, gold, nickel, chromium, aluminum, or an alloy containing at least one of these. Further, the filler 4a may be, for example, spherical or flaky. The filling amount of the filler 4a with respect to the adhesive member 4 is 80% by weight or more. Note that the filler 4a only needs to mainly contain such a metal and may also contain an inorganic filler in addition to the metal. Examples of such an inorganic filler include ceramics with high insulation and high thermal conductivity. Examples of the ceramics include at least one of aluminum oxide, aluminum nitride, silicon nitride, and boron nitride.

[0043] As shown in FIG. 2, the filler 4a connects between the lower surface 22a of the metal plate 22 and the cooling surface 3a of the cooling module 3 in the adhesive member 4. That is, the filler 4a constitutes a thermal path between the lower surface 22a of the metal plate 22 and the cooling surface 3a of the cooling module 3. Thereby, the thermal conductivity of the metal plate 22 with respect to the cooling module 3 is improved. Further, the filler 4a may include a portion sintered in the adhesive member 4.

[0044] The thermal conductivity of the adhesive member 4 including such a filler 4a may be 10 W / mK or more. The material and amount of the filler 4a may be selected so as to obtain this thermal conductivity. Further, the elastic modulus of the adhesive member 4 may be smaller than those of the solder 12, 32 and the sintered material, and may be, for example, 10 GPa or less. Further, the thickness of the adhesive member 4 may be 50 μm or more and 150 μm or less. On the other hand, since the adhesive member 4 needs to have a low thermal resistivity (high thermal conductivity), it needs to be as thin as possible. However, if the thickness becomes thinner than 50 μm, the stress of the adhesive member 4 will increase. Also, when the thickness is this thick, the path for the volatile gas generated in the adhesive member 4 to escape decreases, making it difficult for the gas to escape.

[0045] Here, as a reference example, a case where a joining member made of another material is used instead of the adhesive member 4 of the semiconductor device 1 will be described. Here, a thermal interface material (hereinafter referred to as TIM) will be referred to as a joining member, and a case where TIM is used will be described. TIM includes various materials such as, for example, thermally conductive grease, elastomer sheet, RTV (Room Temperature Vulcanization) rubber, gel, and phase change material.

[0046] When the joining member in the reference example is thermally conductive grease, which is a general TIM, the thermal conductivity is less than 5 W / mK. With such a joining member, even if the thickness is further reduced, there is a limit to reducing the thermal resistance.

[0047] Further, in the semiconductor device 1 including the joining member in the reference example, when the cooling surface 3a of the cooling module 3 is deformed, for example, due to a change in temperature, the joining member between the lower surface 22a of the metal plate 22 and the cooling surface 3a is likely to flow outwards from between them. When such a pump-out phenomenon occurs, the thermal conductivity from the semiconductor module 2 to the cooling module 3 decreases, and the performance of the semiconductor module 2 deteriorates.

[0048] In addition, general TIMs have no adhesion. When using such a TIM as a joining member, a separate structure and components are required to fix the semiconductor module 2 and the cooling module 3. As a result, the semiconductor device 1 has a complicated structure and the manufacturing cost increases.

[0049] On the other hand, when using an adhesive as the joining member, general adhesives have insulation properties and a thermal conductivity of about 5 W / mK. Therefore, even if the semiconductor module 2 and the cooling module 3 can be fixed, it is difficult to reduce the thermal resistance, and the heat dissipation performance of the semiconductor device 1 deteriorates.

[0050] Also, it is conceivable to use solder or a sintered material as the joining member. However, solder and sintered materials have a high joining temperature. Therefore, when heating to join the semiconductor module 2 and the cooling module 3 with such a joining member, there is a risk that the solder and sintered material in the semiconductor module 2 will melt. Furthermore, solder and sintered materials have a high elastic modulus. Therefore, in the semiconductor device 1 including the semiconductor module 2 and the cooling module 3 joined with such a joining member, stress is generated in the joining member during the heat cycle, leading to a decrease in reliability.

[0051] The semiconductor device 1 of the above embodiment includes a semiconductor module 2, a cooling module 3, and an adhesive member 4. The semiconductor module 2 includes a metal plate 22 having a lower surface 22a on the back surface side. The cooling module 3 includes a cooling surface 3a on which the lower surface 22a of the metal plate 22 is disposed. The adhesive member 4 is provided between the lower surface 22a of the metal plate 22 and the cooling surface 3a, contains a conductive filler 4a, and the filler 4a connects the lower surface 22a and the cooling surface 3a. In such a semiconductor device 1, the semiconductor module 2 and the cooling module 3 can be easily fixed by only the adhesive member 4 without using a complicated structure. Furthermore, the adhesive member 4 can reduce the thermal resistivity between the semiconductor module 2 and the cooling module 3 and improve the heat dissipation performance of the semiconductor device 1.

[0052] In addition, since the adhesive member 4 has a low elastic modulus, even when a heat cycle occurs in the semiconductor device 1, the stress generated in the adhesive member 4 is relaxed. Further, when the insulating board 21 of the insulating circuit board 20 is made of resin, even when a heat cycle occurs, the warping of the insulating circuit board 20 can be reduced. For this reason, the stress generated in the adhesive member 4 can be further reduced. Therefore, the thickness of the adhesive member 4 can be made thinner, and the reduction of the thermal resistance of the adhesive member 4 can be promoted.

[0053] Next, a method for manufacturing such a semiconductor device 1 will be described with reference to FIG. 3. FIG. 3 is a flowchart showing a method for manufacturing a semiconductor device according to an embodiment. First, a preparation step of preparing the components of the semiconductor device 1 is performed (step S1). The components prepared here include, for example, semiconductor chips 10a, 10b, 10d, 10e constituting the semiconductor module 2, the insulating circuit board 20, the printed circuit board 30 with conductive posts 31a, 31b, 31c, 31d, 31e, 31f, and the sealing member 35. In addition, the cooling module 3 is included. Even components not listed here may be prepared as components necessary for manufacturing the semiconductor device 1. Also, manufacturing equipment used for manufacturing the semiconductor device 1 may be prepared. Examples of the manufacturing equipment include a coating device for applying solder and a molding device for sealing with a sealing member.

[0054] Next, a semiconductor module assembly step of assembling the semiconductor module 2 is performed (step S2). In the semiconductor module assembly step, the following steps are further performed. First, the semiconductor chips 10a, 10b, 10d, 10e are joined to the insulating circuit board 20 (step S2a). This step S2a will be described with reference to FIG. 4. FIG. 4 is a first diagram for explaining the semiconductor module assembly step according to the embodiment.

[0055] The semiconductor chips 10a, 10b, 10d, 10e are joined to the conductive patterns 23a, 23b of the insulating circuit board 20 via solder 12. At this time, conventional soldering is performed for the joining. As a result, as shown in FIG. 4, the semiconductor chips 10a, 10b are joined to the conductive pattern 23a of the insulating circuit board 20 via the solder 12, and the semiconductor chips 10d, 10e are joined to the conductive pattern 23b via the solder 12, thereby obtaining a structure in which the semiconductor chips are joined.

[0056] After that, the conductive posts 31a, 31b, 31c, 31d, 31e, 31f of the printed circuit board 30 are joined to the semiconductor chips 10a, 10b, the conductive pattern 23a of the insulating circuit board 20, the semiconductor chips 10d, 10e, and the conductive pattern 23b of the insulating circuit board 20 (step S2b). This step S2b will be described with reference to FIG. 5. FIG. 5 is a second diagram for explaining the semiconductor module assembly process of the embodiment.

[0057] The printed circuit board 30 is previously provided with the conductive posts 31a, 31b, 31c, 31d, 31e, 31f. Such conductive posts 31a, 31b, 31c, 31d, 31e, 31f are joined by conventional soldering. As a result, as shown in FIG. 5, a structure in which the printed circuit board 30 is attached to the insulating circuit board 20 to which the semiconductor chips 10a, 10b, 10d, 10e are joined is obtained.

[0058] At the end of step S2, sealing is performed with the sealing member 35 (step S2c). This step S2c will be described with reference to FIGS. 6 and 7. FIG. 6 is a side cross-sectional view of the semiconductor module of the embodiment. FIG. 7 is a rear view of the semiconductor module of the embodiment. Note that FIG. 7 is a view of the semiconductor module 2 in the +Z direction and is the rear surface of the semiconductor module 2.

[0059] Set the structure obtained in step S2b, for example, in a predetermined mold. Fill the sealing member 35 into this mold to seal the structure. By detaching the mold, the semiconductor module 2 shown in FIG. 6 is obtained. In the semiconductor module 2, as shown in FIG. 7, the lower surface 22a of the metal plate 22 of the insulating circuit board 20 protrudes from the lower surface 35a of the sealing member 35. The lower surface 35a of the sealing member 35 and the lower surface 22a of the metal plate 22 are on the same plane. The back surface of the semiconductor module 2 is composed of the lower surface 35a of the sealing member 35 and the lower surface 22a of the metal plate 22.

[0060] Next, a coating step of applying the adhesive member 4 is performed (step S3). The adhesive member 4 may be applied to either the back surface of the semiconductor module 2 or the cooling surface 3a of the cooling module 3. Also, the application may be performed, for example, as follows. First, set a mask having a predetermined opening corresponding to the application area on the application surface. Apply the adhesive member 4 into the opening with a squeegee. The mask can be removed to transfer the adhesive member 4 to the application area. In the present embodiment, the adhesive member 4 corresponding to the size of the back surface of the semiconductor module 2 is applied to the arrangement area of the semiconductor module 2 on the cooling surface 3a of the cooling module 3. Note that the application may be performed by a dispenser.

[0061] Next, a setting step of setting the back surface of the semiconductor module 2 on the cooling surface 3a of the cooling module 3 via the adhesive member 4 is performed (step S4). Here, the cooling module 3 is fixed to a predetermined fixing base, and the semiconductor module 2 is set with respect to the adhesive member 4 transferred to the cooling module 3 from the back surface side.

[0062] Next, a heating step of heating the adhesive member 4 is performed (step S5). This heating step will be described with reference to FIGS. 8 and 9. FIG. 8 is a first diagram for explaining the heating step of the embodiment. FIG. 9 is a second diagram for explaining the heating step of the embodiment. A structure including the cooling module 3 and the semiconductor module 2 disposed via the adhesive member 4 on the cooling surface 3a of the cooling module 3 is heated. The heating temperature at this time is 200° C. or lower, preferably 175° C. or lower, more preferably 150° C. or lower. Thereby, the remelting of the solders 12 and 32 in the semiconductor module 2 is suppressed. By being heated in this way, the adhesive member 4 is cured, and the semiconductor module 2 and the cooling module 3 are joined.

[0063] Alternatively, during such heating, as shown in FIG. 8, the back surface of the semiconductor module 2 and the cooling surface 3a of the cooling module 3 may be pressed so as to approach each other. In FIG. 8, the upper surface of the semiconductor module 2 is pressed against the cooling module 3 at about 0.1 MPa, for example.

[0064] In this case, the adhesive member 4 is pressed so that the lower surface 22a of the metal plate 22 approaches the cooling surface 3a while being heated, whereby the fillers 4a contained in the adhesive member 4 are compressed. Then, as shown in FIG. 9, a portion where the filler 4a is sintered may be generated. Thereby, the density of the thermal path between the lower surface 22a of the metal plate 22 and the cooling surface 3a of the cooling module 3 increases as compared with the case where it is not pressed. Thereby, the thermal conductivity of the metal plate 22 with respect to the cooling module 3 is further improved. Through the flowchart of FIG. 3 above, the semiconductor device 1 shown in FIGS. 1 and 2 is obtained.

Explanation of Reference Numerals

[0065] 1 Semiconductor device 2 Semiconductor module 3 Cooling module 3a Cooling surface 4 Adhesive member 4a Filler 10a, 10b, 10d, 10e Semiconductor chips 12 Solder 20 Insulated circuit board 21 Insulating plate 22 Metal plate 22a Bottom surface 23a, 23b Conductive pattern 30 Printed circuit board 31a, 31b, 31c, 31d, 31e, 31f Conductive post 32 Solder 35 Sealing member 35a Bottom surface

Claims

1. a semiconductor module including a metal plate on a back side having a lower surface; a cooling module including a cooling surface on which the lower surface of the metal plate is disposed; an adhesive member provided between the lower surface of the metal plate and the cooling surface, the adhesive member including a conductive filler, the filler connecting the lower surface and the cooling surface; A semiconductor device comprising:

2. The filler includes a filler made of metal. The semiconductor device according to claim 1 .

3. The metal is silver, copper, gold, nickel, chromium, aluminum, or an alloy containing at least one of these metals; The semiconductor device according to claim 2 .

4. the filler is sintered to contact the lower surface of the metal plate and the cooling surface; The semiconductor device according to claim 2 .

5. The adhesive member is composed of an organic resin containing a thermosetting resin as a main component and the filler. The semiconductor device according to claim 1 .

6. The thermosetting resin is an epoxy resin, a phenolic resin, or a polyimide resin. The semiconductor device according to claim 5 .

7. the semiconductor module includes an insulating circuit board including the metal plate, an insulating plate having the metal plate provided on a back surface thereof, and a conductive pattern provided on a front surface of the insulating plate; The semiconductor device according to claim 1 .

8. The insulating plate is composed mainly of an insulating filler and a resin. The semiconductor device according to claim 7.

9. The linear expansion coefficient of the insulating plate is approximately equal to the linear expansion coefficients of the conductive pattern and the metal plate. The semiconductor device according to claim 8.

10. the semiconductor module further includes a semiconductor chip provided on the conductive pattern and a sealing member that seals the semiconductor chip and the insulating circuit board, the lower surface of the metal plate of the insulating circuit board is exposed from the lower surface of the sealing member. The semiconductor device according to claim 7.

11. the adhesive member is in contact with the entire lower surface of the metal plate exposed from the lower surface of the sealing member; The semiconductor device according to claim 10.

12. The thickness of the adhesive member is 50 μm or more and 150 μm or less. The semiconductor device according to claim 1 .

13. The thermal conductivity of the adhesive member is 10 W / mK or more. The semiconductor device according to claim 1 .

14. The adhesive strength of the adhesive member is 10 MPa or more. The semiconductor device according to claim 1 .

15. The elastic modulus of the bonding member is 10 GPa or less. The semiconductor device according to claim 1.

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