Restriction related to difference of motion vector

Abstract

To provide a video processing method and program for performing video encoding or video decoding using a motion vector represented using a prescribed number of bits.SOLUTION: A video processing method includes determining a range of MVD (Motion Vector Difference) components related to a first block for conversion between a video first block and a bit stream representation of the first block. The range of MVD components is [-2M, 2M-1], where M=17. The method also includes suppressing the MVD components within the range of MVD components, and executing conversion based upon the suppressed MVD components.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS Pursuant to the applicable patent laws and / or regulations under the Paris Convention, this application Priority and Claims of International Patent Application No. PCT / CN2019 / 084228, filed April 25, The purpose of this application is to enable timely claim of benefits and to facilitate the filing of patent applications and to ensure that the applicant is provided with the necessary patent protection. The entire disclosure of No. 4228 is incorporated by reference as part of the disclosure of this application.

[0002] This patent specification relates to video coding techniques, devices and systems. [Background technology]

[0003] Despite advances in video compression, digital video is still widely distributed across the Internet and other It is the largest user of bandwidth in the world's digital communications networks. As the number of connected user devices capable of displaying and viewing digital content increases, Bandwidth demands for video usage are predicted to continue to increase. Summary of the Invention

[0004] In this patent specification, a motion vector is represented using a specified number of bits. Various embodiments and techniques for performing image encoding or video decoding are described.

[0005] In one exemplary embodiment, a video decoding method is disclosed. The method includes: The M used for a video region of an image during conversion to and from a bitstream representation of the region. The range of VD (Motion Vector Difference) values ​​is set to the maximum allowable motion. Based on vector resolution, maximum allowable motion vector accuracy, or image area priority performing the conversion by restricting the MVD value to be within a range; including.

[0006] In one exemplary aspect, a video decoding method is disclosed. The method includes determining a range of an MVD (Motion Vector Difference) component associated with a first block of video for conversion between the first block of video and a bitstream representation of the first block, wherein the range of the MVD component is [-2 , 2 -1] and M = 17, suppressing the value of the MVD component to be within the range of the MVD component, and performing the conversion based on the suppressed MVD component. M , 2 M -1], and performing the conversion based on the suppressed MVD component. = 17, suppressing the value of the MVD component to be within the range of the MVD component, and performing the conversion based on the suppressed MVD component. including.

[0007] In one exemplary aspect, a video decoding method is disclosed. The method includes determining a range of an MVD (Motion Vector Difference) component associated with a first block of video for conversion between the first block of video and a bitstream representation of the first block, wherein the range of the MVD component is adapted to a tolerable MVD precision of a codec and / or a tolerable MV (Motion Vector) precision, suppressing the value of the MVD component to be within the range of the MVD component, and performing the conversion based on the suppressed MVD component. including. including. including. including. including. including.

[0008] In one exemplary aspect, a video decoding method is disclosed. The method includes determining a range of an MVD (Motion Vector Difference) component associated with a first block of video for conversion between the first block of video and a bitstream representation of the first block, including. including. Determine the range based on the coded information of the first block, and MVD Suppress the value of the MVD component so that it is within the range of the MVD component, and the suppressed Execute the conversion based on the range of the MVD component, and include.

[0009] In yet another exemplary aspect, a video processing apparatus is disclosed. The apparatus is the method described above Includes a processor configured to execute.

[0010] In yet another exemplary aspect, a computer-readable medium is disclosed. The medium is the above The code for implementing the described method in a processor is stored.

[0011] These and other aspects are described in this patent specification.

Brief Description of the Drawings

[0012]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Modes for Carrying Out the Invention

[0013] In this specification, section headings are used for ease of understanding, and one sec The embodiments disclosed in the present specification are not limited to that section only. Further, certain embodiments are described with reference to VVC (Versatile Video Coding) or other specific video codecs, but the disclosed technology is applicable to other video cod ing technologies as well. Further, although some embodiments describe video coding steps in detail, it will be understood that the corresponding steps of decoding to reverse the coding are performed by the decoder Further, the term video processing includes video cod ing or compression, video decoding or decompression, and transcoding of video from one compression format to another compression format, or video represented at another compression bitrate.

[0014] 1. Overview

[0015] This patent specification relates to video coding technology. Specifically, it relates to the inter-coding process in video coding. It may be applied to existing video coding standards such as HEVC, or may be applied to finalize the Versatile Video Coding (VVC) standard. The present invention is also applicable to future video coding standards or video cod ers.

[0016] 2. Initial Agreement

[0017] Video coding standards have mainly evolved through the development of well-known ITU-T and ISO / IEC standards. ITU-T developed H.261 and H.263, and ISO / IEC developed MP EG-1 and MPEG-4 Visual, and both organizations developed H.262 / MPEG-2 V ideo and H.264 / MPEG-4 AVC (Advanced Video Cod It was jointly developed with the H.265 / HEVC standard. Since H.262, video coding standards are based on a hybrid video coding structure that utilizes temporal prediction and transform coding. To explore future video coding technologies beyond HEVC, in 2015, VCEG and MPEG jointly established JVET (Joint Video Exploration Team). Since then, many new methods have been adopted by JVET and incorporated into the reference software called JEM (Joint Exploration Mode). The JVET meetings are held quarterly, and the new coding standard aims to reduce the bitrate by 50% compared to HEVC. At the JVET meeting in April 2018, the new video coding standard was officially named VVC (Versatile Video Coding), and at that time, the first version of VTM (VVC Test Model) was released. The efforts to contribute to the standardization of VVC continue, and at all JVET meetings, new coding technologies are adopted into the VVC standard. After each meeting, the VVC working draft and the test model VTM are updated. The VVC project is currently aiming for technical completion (FDIS) at the meeting in July 2020.

[0018]

[0019] 2.1 Coding Flow of a Typical Video Codec

[0019] Figure 1 shows an example of the encoder block diagram of VVC, including three in-loop filtering blocks, namely, DF (Deblocking Filter), SAO (Sample Adaptive Offset), and ALF. The predefined filter Unlike DF that uses tags, SAO and ALF utilize the original samples of the current picture, add an offset respectively, and signal the offset and filter coefficient to the side that is to be signaled with information of FIR (Finite Inpulse Response) filter, thereby reducing the mean square error between the original samples and the reconstructed samples. ALF is located at the last processing stage of each picture

[0020] and can be regarded as a tool that tries to capture and determine the artifacts

[0021] generated in the previous stage. on)

[0022] In HEVC, when use_integer_mv_flag in the slice header is equal to 0, MVD (Motion Vector Difference) (the difference between the motion vector of the CU and the predicted motion vector) is signaled in units of 1 / 4 luma samples. In JEM, LAMVR (Locally Adaptive Motion Vector Resolution) is introduced. In VVC, the CU-level AMVR (Adaptive Motion Vector Resolution) scheme is introduced. AMVR enables coding the MVD of the CU with different precisions. Based on the mode for the current CU (the normal AMVP mode or the affine AVMP mode), the MVD of the current CU can be adaptively selected as follows. - Normal AMVP mode: 1 / 4 luminance sample, integer luminance sample, or 4 luminance samples. Pull. - Affine AMVP mode: 1 / 4 luminance sample, integer luminance sample, or 1 / 16 luminance samples.

[0023] If the current CU has at least one non-zero MVD component, the CU-level MVD resolution indication is conditionally signaled. If all MVD components (i.e., both horizontal and vertical MVDs for reference lists L0 and L1) are zero, a 1 / 4 luminance sample MVD resolution is inferred. For a CU having components of at least one non-zero MVD component, a first flag is signaled to indicate whether 1 / 4 luminance sample MVD accuracy is used for the CU. If the first flag is 0, no further signaling is required and 1 / 4 luminance sample MVD accuracy is used for the current CU. Otherwise, a second flag is signaled to indicate whether integer luminance sample or 4 luminance sample MVD accuracy is used for normal AMVP CUs. The same second flag is used to indicate whether integer luminance sample

[0024] or 1 / 16 luminance sample MVD accuracy is used for affine AMVP CUs. To ensure that the reconstructed MV has the intended accuracy (1 / 4 luminance sample, integer luminance sample, or 4 luminance samples), the motion vector predictor of the CU is rounded to the same accuracy as the MVD before being added to the MVD. The motion vector predictor is rounded towards zero (i.e., a negative motion vector predictor is rounded towards positive infinity and a positive motion vector prediction module is rounded towards negative infinity). If the first flag is 0, no further signaling is required and 1 / 4 luminance sample MVD accuracy is used for the current CU. Otherwise, a second flag is signaled to indicate whether integer luminance sample or 4 luminance sample MVD accuracy is used for normal AMVP CUs. The same second flag is used to indicate whether integer luminance sample or 4 luminance sample MVD accuracy is used for normal AMVP CUs. The same second flag is used to indicate whether integer luminance sample or 1 / 16 luminance sample MVD accuracy is used for affine AMVP CUs. To ensure that the reconstructed MV has the intended accuracy (1 / 4 luminance sample, integer luminance sample, or 4 luminance samples), the motion vector predictor of the CU is rounded to the same accuracy as the MVD before being added to the MVD. The motion vector predictor is rounded towards zero (i.e., a negative motion vector predictor is rounded towards positive infinity and a positive motion vector prediction module is rounded towards negative infinity). vector predictor is rounded towards zero (i.e., a negative motion vector predictor is rounded towards positive infinity and a positive motion vector prediction module is rounded towards negative infinity). vector predictor is rounded towards zero (i.e., a negative motion vector predictor is rounded towards positive infinity and a positive motion vector prediction module is rounded towards negative infinity). To ensure that the reconstructed MV has the intended accuracy (1 / 4 luminance sample, integer luminance sample, or 4 luminance samples), the motion vector predictor of the CU is rounded to the same accuracy as the MVD before being added to the MVD. The motion vector predictor is rounded towards zero (i.e., a negative motion vector predictor is rounded towards positive infinity and a positive motion vector prediction module is rounded towards negative infinity). vector predictor is rounded towards zero (i.e., a negative motion vector predictor is rounded towards positive infinity and a positive motion vector prediction module is rounded towards negative infinity). vector predictor is rounded towards zero (i.e., a negative motion vector predictor is rounded towards positive infinity and a positive motion vector prediction module is rounded towards negative infinity). .

[0025] The encoder uses the RD check to determine the resolution of the motion vectors for the current CU. Avoid having to always perform CU-level RD checks three times for each MVD resolution. In order to achieve this, in VTM4, RD checks for MVD accuracy other than 1 / 4 luminance samples are performed under the conditions In normal AVMP mode, first, 1 / 4 luminance sample M The RD cost of the VD precision and the integer luminance sample MV precision is calculated. The RD cost of the sample MVD accuracy is compared with the RD cost of the 1 / 4 luminance sample MVD accuracy. ,It is decided whether it is necessary to further check the RD cost of the 4 luminance sample MVD accuracy. The RD cost of 1 / 4 luminance sample MVD accuracy is set to 1 / 100th of the integer luminance sample MVD accuracy. If it is much smaller than the RD cost, the RD check of the 4-luminance sample MVD accuracy is omitted. In affine AMVP mode, affine merge / skip mode, merge / skip AMVP mode, normal AMVP mode with 1 / 4 luminance sampling MVD accuracy, 1 / 4 luminance sampling Check the rate-distortion cost of affine AMVP mode with sampled MVD accuracy If affine inter mode is not selected after this, 1 / 16 luma sample MV Accuracy and 1 pixel MV accuracy affine inter modes are not checked. In affine inter mode with 16 luma samples and 1 / 4 luma samples MV accuracy As a search starting point, we use the 1 / 4 luminance sample MV accuracy affine inter mode. Fin parameters are used.

[0026] 2.3 Affine AMVP Prediction in VVC

[0027] Affine AMVP mode shall apply to CUs whose width and height are both 16 or greater. A CU-level affine AMVP mode can be used to indicate whether affine AMVP mode is used. The fin flag is signaled in the bitstream, and then the 4-parameter affine or Another flag is signaled to indicate whether the mode is 6-parameter affine. In this step, the difference between the CPMV of the current CU and their predictor CPMVP is The affine AVMP candidate list size is 2, and the following CPV It is generated by using the four types of M candidates in sequence. 1) Inherited affine AMVP candidates extrapolated from the CPMVs of nearby CUs 2) Constructed affine AMVP candidate CPs derived using the translation MVs of nearby CUs MVP 3) Translational MV from nearby CUs 4) Zero MV

[0028] The check order of inherited affine AMVP candidates is the check order of inherited affine merge candidates. The only difference is that for AVMP candidates, the same reference The idea is to only consider affine CUs that have pictures. When inserting a child into the candidate list, no pruning is applied.

[0029] The constructed AMVP candidates are derived from the specified spatial neighborhood. The reference picture index of the current CU is also checked. The first block in the check order that has the same reference picture is used. Only one If the current CU is coded in 4-parameter affine mode, and mv0 and If both mv0 and mv1 are available, add them as one candidate to the affine AMVP list. If the current CU is coded in 6-parameter affine mode and all three CMPVs are available, add them as one candidate to the affine AMVP list. Otherwise, set the constructed AMVP candidates as unavailable.

[0030] After checking the inherited affine AMVP candidates and the constructed AMVP candidates, if the number of candidates in the affine AMVP list is still less than 2, and if available, add all control point MVs of the current CU as translational MVs in the order of mv0, mv1, and mv2 to predict all control point MVs of the current CU. Finally, if the affine AMVP list is not yet full, zero MVs are used to fill the affine AMVP list. mv1, and mv2 to predict all control point MVs of the current CU. Finally, if the affine AMVP list is not yet full, zero MVs are used to fill the affine AMVP list. mv1, and mv2 to predict all control point MVs of the current CU. Finally, if the affine AMVP list is not yet full, zero MVs are used to fill the affine AMVP list. mv1, and mv2 to predict all control point MVs of the current CU. Finally, if the affine AMVP list is not yet full, zero MVs are used to fill the affine AMVP list.

[0031] 2.4 MMVD (Merge mode with MVD) in VVC

[0032] The implicitly derived motion information is directly used for the prediction sample generation of the current CU In addition to the merge mode, MMVD (Merge mode with Motion Vector Differences) is introduced in VVC. Immediately after the skip flag and the merge flag are sent, the MMVD flag is signaled to specify whether the MMVD mode is used for the CU. In MMVD, after a merge candidate is selected, it is further improved by the signaled MVD information. Additional information includes the merge candidate flag and the index for specifying the motion magnitude. In MMVD, after a merge candidate is selected, it is further improved by the signaled MVD information. Additional information includes the merge candidate flag and the index for specifying the motion magnitude.

[0033] In MMVD, after a merge candidate is selected, it is further improved by the signaled MVD information. Additional information includes the merge candidate flag and the index for specifying the motion magnitude. In MMVD, after a merge candidate is selected, it is further improved by the signaled MVD information. Additional information includes the merge candidate flag and the index for specifying the motion magnitude. It includes an index and an index for indicating the movement direction. In the MMVD mode, one of the first two candidates in the merge list is selected to be used as the MV base. The merge candidate flag is signaled to specify which one to use.

[0034] The distance index specifies the magnitude of the movement and indicates a predefined offset set from the starting point. The offset is added to either the horizontal or vertical component of the starting MV. The relationship between the distance index and the predefined offset is defined in Table 1.

[0035] In VVC, the SPS flag sps_fpel_mmvd_enabled_flag for turning on / off the fractional MMVD offset at the spss level, and the tile group flag tile_group_fpel_mmvd_enabled_flag for controlling the on / off of the fractional MMVD offset for "SCC / UHD frames" at the header level of the tile group exist. When the fractional MVD is enabled, the default distance table in Table 1 is used. Otherwise, all offset elements in the default distance in Table 1 are left-shifted by 2.

[0036]

Table 1

[0037] The direction index represents the direction of the MVD with respect to the starting point. The direction index can represent four directions as shown in Table 2. Note that the meaning of the MVD sign is based on the starting MV. ​​​​​​​​​It may vary according to the information. The starting MV is an unpredictable MV or a bi - directional predicted MV, and both lists point to the same side of the current picture (i.e., the POCs of both references are both larger than the POC of the current picture, or both are smaller than the POC of the current picture ), in the case of Table 2, the sign specifies the sign of the MV offset added to the starting MV. When the starting MV is a bi - directional predicted MV and the two MVs point to different sides of the current picture (i.e., the POC of one reference is larger than the POC of the current picture and the POC of the other reference is smaller than the POC of the current picture), the sign in Table 2 defines the sign of the MV offset added to the list0 MV component of the starting MV, and the sign of the list1 MV has the opposite value.

[0038]

Table 2

[0039] 2.5 Intra Block Copy (IBC) in VVC

[0040] IBC (Intra Block Copy) is a tool adopted in the HEVC extension of SCC. Thereby, it is known that the coding efficiency of screen content materials is significantly improved. The IBC mode is implemented as a block - level coding mode , so BM (Block Matching) is performed in the encoder to find the optimal block vector (or motion vector) for each CU. Here , the block vector is used to indicate the replacement from the current block to a reference block that has already been reconstructed within the current picture.

[0041] In VVC, the luminance block vector of an IBC-coded CU has integer precision and is. The chrominance block vector is rounded to integer precision. When combined with AMVR , the IBC mode can switch between 1-pixel and 4-pixel motion vector precisions. IB C-coded CUs are treated as a third prediction mode other than the intra prediction mode or the inter prediction mode. The IBC mode is applicable to CUs where both the width and height are 64 luminance samples or less.

[0042] The IBC mode is also known as the CPR (Current Picture Reference) mode .

[0043] 2.6 Difference of Motion Vectors in the VVC Specification / Working Draft

[0044] The following text is extracted from the VVC working draft

[0045] 7.3.6.8 Motion Vector Difference Syntax

[0046] [Table 3]

[0047] 7.3.6.7 Merge Data Syntax

[0048] [Table 4]

[0049] [Table 5]

[0050] 7.4.3.1 Sequence Parameter Set RBSP Semantics If sps_amvr_enabled_flag is equal to 1, the motion vector code is amvr_enab Specifies that adaptive motion vector difference resolution is used for coding. If led_flag is equal to 0, adaptive motion vector difference is used for motion vector coding. Specifies that no resolution is used. If sps_affine_amvr_enabled_flag is equal to 1, Adaptive motion vector difference resolution is used for motion vector coding in FinInter mode. sps_affine_amvr_enabled_flagg is set to If equal to 0, adaptive motion vector coding is used for affine inter mode motion vector coding. Specifies that torr difference resolution is not used. If sps_fpel_mmvd_enabled_flag is equal to 1, the motion vector sps_ vector difference merge modes use integer sample precision. If fpel_mmvd_enabled_flag is equal to 0, the motion vector difference is Specifies that the merge mode used can use fractional sample precision.

[0051] 7.4.5.1 General Tile Group Header Semantics tile_group_fpel_mmvd_enabled_flag equals 1 If the motion vector difference merge mode is set to integer samples in the current tile group, It specifies that the pull precision is used. tile_group_fpel_mmvd_enabled_flag equals 0 If the motion vector difference merge mode is set to 0, the fractional samples in the current tile group are merged. Specifies that tile_group_fpe can be used. If not present, It is presumed that the value of l_mmvd_enabled_flag is 0.

[0052] 7.4.7.5 Coding Unit Semantics amvr_flag[x0][y0] defines the resolution of the motion vector difference. Array indices x0, y0 define the position (x0, y0) of the top - left luminance sample of the coding block being considered, which is related to the top - left luminance sample of the picture. When amvr_fl ag[x0][y0] is equal to 0, it is defined that the resolution of the motion vector difference is 1 / 4 of the luminance sample. When amvr_flag[x0][y0] is equal to 1, it is defined that the resolution of the motion vector difference is further defined by amvr_precision_flag[x0][y 0]. When amvr_flag[x0][y0] does not exist, it is presumed as follows. - When CuPredMode[x0][y0] is equal to MODE_IBC, amv r_flag[x0][y0] is presumed to be equal to 1. - Otherwise (when CuPredMode[x0][y0] is not equal to MODE_IBC), amvr_flag[x0][y0] is presumed to be 0. When amvr_precision_flag[x0][y0] is equal to 0, the resolution of the motion vector difference is defined as one integer luminance sample when inter_affine_flag[x0][y0] is equal to 0, and 1 / 16 of the luminance sample otherwise. When amvr_precision_flag[x0][y0] is equal to 1, the resolution of the motion vector difference is defined as four luminance samples when inter_affine_flag[x0] y0] is equal to 0, and one integer luminance sample otherwise. ​​​​​ It is defined as a luminance sample. The array indices x0 and y0 are the positions of the top - left luminance samples of the coding block to be considered, which are related to the top - left luminance sample of the picture ( x0, y0).

[0053] If amvr_precision_flag[x0][y0] does not exist, it is presumed to be equal to 0. The motion vector difference is modified as follows. - When inter_affine_flag[x0][y0] is equal to 0, the variable M vShift is derived, and the variables MvdL0[x0][y0][0], MvdL0[x0] [y0][1], MvdL1[x0][y0][0], MvdL1[x0][y0][1 are modified as follows. MvShift=(amvr_flag[x0][y0]+amvr_preci sion_flag[x0][y0])<<1 (7 - 98) MvdL0[x0][y0][0]=MvdL0[x0][y0][0]<<(M vShift + 2) (7 - 99) MvdL0[x0][y0][1]=MvdL0[x0][y0][1]<<(M vShift + 2) (7 - 100) MvdL1[x0][y0][0]=MvdL1[x0][y0][0]<<(M vShift + 2) (7 - 101) MvdL1[x0][y0][1]=MvdL1[x0][y0][1]<<(M vShift + 2) (7 - 102) - Otherwise (when inter_afine_flag[x0][y0] is equal to 1), the variable MvShift is derived, and the variable MvdCpL0[x0][y0][0] ​​​[0], MvdCpL0[x0][y0][0][1], MvdCpL0[x0][y0 [1][0], MvdCpL0[x0][y0][1][1], MvdCpL0[x0 [y0][2][0], and MvdCpL0[x0][y0][2][1] are modified as follows : MvShift = amvr_precision_flag[x0][y0]? ( amvr_precision_flag[x0][y0] << 1) : (-(amvr_ flag[x0][y0] << 1))) (7 - 103) MvdCpL0[x0][y0][0][0] = MvdCpL0[x0][y0] [0][0] << (MvShift + 2) (7 - 104) MvdCpL1[x0][y0][0][1] = MvdCpL1[x0][y0] [0][1] << (MvShift + 2) (7 - 105) MvdCpL0[x0][y0][1][0] = MvdCpL0[x0][y0] [1][0] << (MvShift + 2) (7 - 106) MvdCpL1[x0][y0][1][1] = MvdCpL1[x0][y0] [1][1] << (MvShift + 2) (7 - 107) MvdCpL0[x0][y0][2][0] = MvdCpL0[x0][y0] [2][0] << (MvShift + 2) (7 - 108) MvdCpL1[x0][y0][2][1] = MvdCpL1[x0][y0] [2][1] << (MvShift + 2) (7 - 109)

[0054] 7.4.7.7 Merge Data Semantics merge_flag[x0][y0] is the in Specify whether the inter prediction parameter is inferred from the neighboring inter prediction interval. Array The indexes x0, y0 specify the position (x0, y0) of the luminance sample at the upper left of the coding block related to the luminance sample at the upper left of the picture and to be considered. Specify the position (x0, y0) of the luminance sample at the upper left of the luminance sample at the upper left of the coding block to be considered. If merge_flag[x0][y0] does not exist, it is inferred as follows. - If cu_skip_flag[x0][y0] is equal to 1, merge_fl ag[x0][y0] is inferred to be equal to 1. - Otherwise, merge_flag[x0][y0] is inferred to be equal to 0 . If mmvd_flag[x0][y0] is equal to 1, use the merge mode that uses the motion vector difference to generate the inter prediction parameter of the current coding unit is specified. The array indexes x0, y0 specify the position (x0, y0) of the luminance sample at the upper left of the luminance sample at the upper left of the picture related to the coding block to be considered and to be considered. Specify the position (x0, y0) of the luminance sample at the upper left of the coding block related to the luminance sample at the upper left of the picture and to be considered . If mmvd_flag[x0][y0] does not exist, it is inferred to be equal to 0. mmvd_merge_flag[x0][y0] indicates whether the first (0) candidate or the second (1) candidate in the merge candidate list is used with the motion vector difference derived from mmvd_distance_i dx[x0][y0] and mmvd_direction_idx[x0][y0]. The array indexes x0, y0 specify the position (x0, y0) of the luminance sample at the upper left of the coding block related to the luminance sample at the upper left of the picture and to be considered and to be considered. Specify the position (x0, y0) of the luminance sample at the upper left of the coding block related to the luminance sample at the upper left of the picture and to be considered . mmvd_distance_idx[x0][y0] is defined in Table 7-11 As described above, define the index used to derive MmvdDistance[x0][y0]. The array indices x0 and y0 define the position (x0, y0) of the top-left luminance sample of the coding block under consideration, which is related to the top-left luminance sample of the picture.

[0055]

Table 6

[0056] mmvd_distance_idx[x0][y0] defines the index used to derive MmvdDistance[x0][y0] as defined in Table 7-12. The array indices x0 and y0 define the position (x0, y0) of the top-left luminance sample of the coding block under consideration, which is related to the top-left luminance sample of the picture. As described above, define the index used to derive MmvdDistance[x0][y0].

[0057]

Table 7

[0058] Both components of the merge + MVD offset MmvdOffset[x0][y0] are derived as follows. MmvdOffset[x0][y0][0] = (MmvdDistance[x0 [y0] << 2) * MmvdSign[x0][y0][0] (7-112) MmvdOffset[x0][y0][1] = (MmvdDistance[x0 [y0] << 2) * MmvdSign[x0][y0][1] (7-113) merge_subblock_flag[x0][y0] is for the current coding unit ​​​​​​​Specify whether the sub-block based inter prediction parameter for the knit can be inferred from neighboring blocks. The array indices x0, y0 specify the position (x0, y0) of the top-left luminance sample of the coding block under consideration, which is related to the top-left luminance sample of the picture. If merge_subblock_flag[x0][y0] does not exist, it is inferred to be equal to 0. merge_subblock_idx[x0][y0] specifies the merge candidate index in the sub-block based merge candidate list, where x0, y0 specify the position (x0, y0) of the top-left luminance sample of the coding block under consideration, which is related to the top-left luminance sample of the picture. If merge_subblock_idx[x0][y0] does not exist, it is inferred to be equal to 0.

[0059] ciip_flag[x0][y0] specifies whether combined inter picture merge and intra picture prediction are applied to the current coding unit. The array indices x0, y0 specify the position (x0, y0) of the top-left luminance sample of the coding block under consideration, which is related to the top-left luminance sample of the picture. If ciip_flag[x0][y0] does not exist, it is inferred to be equal to 0. The syntax elements ciip_luma_mpm_flag[x0][y0], and ciip_luma_mpm_idx[x0][y0] specify the intra prediction mode of the luminance samples used for combined inter picture merge and intra picture prediction. The array indices x0, y0 specify the position (x0, y0) of the top-left luminance sample of the coding block under consideration, which is related to the top-left luminance sample of the picture. ​​​​​​​​​​​​​​​​Specify the position (x0, y0) of the luminance sample at the upper left of the coding block. The intra prediction mode is derived according to Section 8.5.6. The prediction mode is derived according to Section 8.5.6. If ciip_luma_mpm_flag[x0][y0] does not exist, it is inferred as follows. It is inferred as follows. - If cbWidth is greater than 2 * cbHeight, or cbHeight is greater than 2 * cbWidth, ciip_luma_mpm_flag[x0 [y0] is inferred to be equal to 1. - Otherwise, ciip_luma_mpm_flag[x0][y0] is inferred to be equal to 0. - Otherwise, ciip_luma_mpm_flag[x0][y0] is inferred to be equal to 0. It is inferred to be equal to 0.

[0060] If merge_triangle_flag[x0][y0] is equal to 1, it is specified that when decoding the B tile group for the current coding unit, motion compensation based on the triangle shape is used to generate the predicted samples of the current coding unit. If merge_triangle_flag[x0][y0] is equal to 0, it is specified that the coding unit is not predicted by motion compensation based on the triangle shape. If merge_triangle_flag[x0][y0] does not exist, it is inferred to be equal to 0. When decoding the B tile group for the current coding unit, motion compensation based on the triangle shape is used to generate the predicted samples of the current coding unit. It is used to generate the predicted samples of the current coding unit. It is specified that it is used to generate the predicted samples of the current coding unit. If merge_triangle_flag[x0][y0] is equal to 0, it is specified that the coding unit is not predicted by motion compensation based on the triangle shape. If merge_triangle_flag[x0][y0] does not exist, it is inferred to be equal to 0. It is specified that the coding unit is not predicted by motion compensation based on the triangle shape. It is specified that the coding unit is not predicted by motion compensation based on the triangle shape. If merge_triangle_flag[x0][y0] does not exist, it is inferred to be equal to 0. It is inferred to be equal to 0.

[0061] merge_triangle_split_dir[x0][y0] specifies the split direction of the merge triangle mode. The array indices x0, y0 specify the position (x0, y0) of the luminance sample at the upper left of the coding block considered, which is related to the luminance sample at the upper left of the picture. The array indices x0, y0 specify the position (x0, y0) of the luminance sample at the upper left of the coding block considered, which is related to the luminance sample at the upper left of the picture. The array indices x0, y0 specify the position (x0, y0) of the luminance sample at the upper left of the coding block considered, which is related to the luminance sample at the upper left of the picture. 0, y0) of the luminance sample at the upper left of the coding block considered, which is related to the luminance sample at the upper left of the picture. If merge_triangle_split_dir[x0][y0] does not exist is presumed to be equal to 0. merge_triangle_idx0[x0][y0] is the motion based on the triangle shape defines the first merge candidate index of the compensation candidate list, where x0, y0 are the positions (x0, y0) of the top-left luminance sample of the coding block related to the top-left luminance sample of the picture and the top-left luminance sample of the coding block to be considered. are defined. If merge_triangle_idx0[x0][y0] does not exist, it is presumed to be equal to 0. is presumed to be equal to 0. merge_triangle_idx1[x0][y0] is the motion based on the triangle shape defines the second merge candidate index of the compensation candidate list, where x0, y0 are the positions (x0, y0) of the top-left luminance sample of the coding block related to the top-left luminance sample of the picture and the top-left luminance sample of the coding block to be considered. are defined. If merge_triangle_idx1[x0][y0] does not exist, it is presumed to be equal to 0. is presumed to be equal to 0. merge_idx[x0][y0] is the merge candidate index of the merge candidate list defines it, where x0, y0 are the positions (x0, y0) of the top-left luminance sample of the coding block related to the top-left luminance sample of the picture and the top-left luminance sample of the coding block to be considered. If merge_idx[x0][y0] does not exist, it is presumed as follows. - If mmvd_flag[x0][y0] is equal to 1, merge_idx[x 0][y0] is presumed to be equal to mmvd_merge_flag[x0][y0]. is presumed to be equal to mmvd_merge_flag[x0][y0]. Otherwise (if mmvd_flag[x0][y0] is equal to 0), me rge_idx[x0][y0] is presumed to be equal to 0.

[0062] 7.4.7.8 Motion Vector Difference Semantics abs_mvd_greater0_flag[compIdx] specifies whether the absolute value of the difference of the motion vector components is greater than 0. abs_mvd_greater1_flag[compIdx] specifies whether the absolute value of the difference of the motion vector components is greater than 1. If abs_mvd_greater1_flag[compIdx] does not exist, it is assumed to be equal to 0. abs_mvd_minus2[compIdx] + 2 specifies the absolute value of the difference of the motion vector components. If abs_mvd_minus2[compIdx] does not exist, it is assumed to be equal to -1. mvd_sign_flag[compIdx] specifies the sign of the difference of the motion vector components as follows. If -mvd_sign_flag[compIdx] is equal to 0, the difference of the corresponding motion vector component has a positive value. Otherwise (when mvd_sign_flag[compIdx] is equal to 1), the difference of the corresponding motion vector component has a negative value. If mvd_sign_flag[compIdx] does not exist, it is assumed to be equal to 0. For compIdx = 0..1, the motion vector difference lMvd[compIdx] is derived as follows.

[0063]

Equation

[0064] Based on the value of MotionModelIdc[x][y], the difference of the motion vectors is as follows. It is derived as follows. - When MotionModelIdc[x][y] is equal to 0, the variable MvdLX x0][y0][compIdx] (where X is 0 or 1) defines the difference between the list X vector component to be used and its prediction. The array indices x0, y0 define the position (x0, y0) of the top-left luminance sample of the coding block being considered, which is related to the top-left luminance sample of the picture. For the difference of the horizontal motion vector component, compIdx = 0 is assigned, and for the vertical motion vector component, compIdx = 1 is assigned. - When refList is equal to 0, MvdL0[x0][y0][compId x] is set equal to lMvd[compIdx] for compIdx = 0..1 is set. - Otherwise (when refList is equal to 1), MvdL1[x0][y 0][compIdx] is set equal to lMvd[compI dx] for compIdx = 0..1. - Otherwise (when MotionModelIdc[x][y] is not equal to 0 case), the variable MvdCpLX[x0][y0][cpIdx][compIdx] (where X is 0 or 1) defines the difference between the list X vector component to be used and its prediction. The array indices x0, y0 define the position (x0, y0) of the top-left luminance sample of the coding block being considered, which is related to the top-left luminance sample of the picture, and the array index cpIdx defines the control point index. For the difference of the horizontal motion vector component, compIdx = 0 is assigned, and for the vertical motion vector component, compIdx = 1 is assigned. - When -refList is equal to 0, for compIdx = 0..1, Mvd CpL0[x0][y0][cpIdx][compIdx] is set equal to lMvd[compI dx]. - Otherwise (when -refList is equal to 1), for compIdx = 0.. 1, MvdCpL1[x0][y0][cpIdx][compIdx] is set equal to l Mvd[compIdx].

[0065] 3. Examples of problems to be solved by the embodiments described in this patent specification In some coding standards such as VVC, MVD (Motion Vec tor Difference) is not necessarily at a resolution of 1 / 4 pixel (e.g., 1 / 4 luminance sample ). However, in existing VVC working drafts, there is a bitstream constraint that always clips the MVD component to a range of -2 15 ~2 15 -1. As a result, especially when an MVD resolution that is not 1 / 4 pixel is used (e.g., the MVD resolution of 1 / 16 luminance samples when affine AMVP is used), the MVD value may become inaccurate.

[0066] 4. Exemplary embodiments and techniques The embodiments listed below should be considered examples for explaining general concepts and should not be interpreted in a narrow sense. Furthermore, these inventions can be combined in any way. In the following description, "MVD (Motion Vector Difference ) component" refers to the motion vector difference in the horizontal direction (e.g., along the x-axis) or the vertical direction (e.g ​, y-axis) of the motion vector difference. In the case of sub-pixel MV (Motion Vector) representation, the motion vector is usually , consisting of a fractional part and an integer part. The range of MV is [-2 M ,2 M -1], where M is a positive integer. value, M=K+L, where K represents the range of the integer part of MV and L represents the range of the decimal part of MV. represents the range of minutes, and MV is (1 / 2 L ) luminance sample precision. For example, In HEVC, K=13 and L=2, so M=K+L=15. Meanwhile, In VVC, K=13, L=4, and M=K+L=17.

[0067] 1. The range of MVD components depends on the acceptable MVD resolution / precision of the codec. It is suggested that a) In one example, the same range may be applied to all MVD components. i. In one example, the range of the MVD components is [-2 M , 2 M -1], M=17, etc. This is the same as the MV range of b) In one example, all decoded MVD components are first Degree (1 / 2 L ) luminance samples (e.g., L=4) and then scaled to the predefined The range [-2 M ,2 M −1] (e.g., M=17). c) In one embodiment, the range of MVD components is determined based on the MVD / MV solution allowable by the codec. It may depend on the image resolution. In one example, the acceptable resolution of the MVD is 1 / 16 luminance samples, 1 / 4 luminance samples, If we have 1 degree sample, 1 luma sample, or 4 luma samples, the values ​​of the MVD components are , according to the top resolution (e.g., 1 / 16 luminance samples among these possible resolutions) It may be clipped / suppressed. That is, the value of MVD is, for example, K = 13, L = 4 and [-2 K+L , 2 K+L -1].

[0068] 2. It is proposed that the range of the MVD component may depend on the coded information of the block. a) In one example, multiple sets of ranges of the MVD component may be defined. b) In one example, the range may depend on the MV predictor / MVD / MV precision. i. In one example, the MVD precision of the MVD component is (1 / 2 L ) luminance samples (e.g., L = 4, 3, 2, 1, 0, -1, -2, -3, -4, etc.), the value of MVD is, for example, K = 13, L = 4, 3, 2, 1, 0, -1, -2, -3, -4, and [-2 K+ L , 2 K+L -1] may be suppressed or / and clipped. ii. In one example, the range of the MVD component may depend on the variable MvShift , where MvShift may be derived from the affine_inter_flag, amvr _flag, and amvr_precision_flag of VVC. 1. In one example, MvShift is the affine_inter_flag , amvr_flag, and / or amvr_precision_flag, and / or sps_fpel_mmvd_enabled_flag, and / or tile_group_fpel_mmvd_enabled_flag, and / or mmvd_distance_idx, and / or CuPredMode, etc. code​ It may be derived from the dinged information. c) In one example, the MVD range may depend on the coding mode, motion model etc. of the block. i. In one example, the range of the MVD component depends on the motion model of the current block (e.g. MotionModelIdc in the specification), and / or the prediction mode, and / or may depend on the affine_inter_flag. ii. In one example, when the prediction mode of the current block is MODE_IBC (e.g., when the current block is coded in IBC mode), the value of the MVD may be in the range of [-2 K+L , 2 K+L -1] with, for example, K = 13, L = 0. and may be good. iii. In one example, when the motion model index of the current block (e.g., MotionModelIdc in the specification) is equal to 0 (e.g., when the current block is predicted using a translational motion model), the value of the MVD may be in the range of [-2 , 2 K+L , 2 K+L -1] with, for example, K = 13, L = 2. 1. Alternatively, when the prediction mode of the current block is MODE_INTER and the affine_inter_flag is false (e.g., when the current block is predicted using a translational motion model), the value of the MVD may be in the range of [-2 , 2 K+L , 2 K+L -1] with, for example, K = 13, L = 2. iv. In one example, when the motion model index of the current block (e.g., MotionModelIdc in the specification) is not equal to 0 (e.g., when the current block is an When predicted using the fin motion model), the value of MVD is, for example, K = 13, L = 4, and may be in the range of [-2 K+L , 2 K+L -1]. 1. Alternatively, if the prediction mode of the current block is MODE_INTER and the affine_inter_flag is true (for example, when the current block is predicted using the affine motion model), the value of MVD is, for example, K = 13, L = 4 and may be in the range of [-2 , 2 K+L -1]. K+L d) Instead of applying constraints to the decoded MVD components, it is proposed to apply constraints to the rounded MVD values. i. In one example, the compliant bitstream is assumed to satisfy that the rounded integer MVD value is within a given range. 1. In one example, the integer MVD (rounding is required if the decoded MVD is of fractional precision) is, for example, with K = 13, in the range of [-2 , 2 K -1].[[]END]] K

[0069] 3. The value of the decoded MVD component may be explicitly clipped to a range (e.g., the above MVD range) during semantic interpretation, in addition to using bitstream constraints.

[0070] 5. Embodiments

[0071] 5.1 Embodiment #1 The following embodiments relate to the method of Section 4 Item 1 . The newly added parts are in italic bold, and the parts deleted from the VVC working draft are highlighted with a strikethrough.​​​​​​

[0072] 7.4.7.8 Motion Vector Difference Semantics When compIdx = 0..1, the motion vector difference lMvd[compIdx] is derived as follows as follows.

[0073]

Number

[0074] 5.2 Embodiment #2 The following embodiments relate to the method of Section 4 Item 2 as follows. Newly added parts are in italic bold, and parts deleted from the VVC working draft are highlighted with a strikethrough.

[0075] 7.4.7.9 Motion Vector Difference Semantics When compIdx = 0..1, the motion vector difference lMvd[compIdx] is derived as fol lows as follows.

[0076]

Number

[0077] 5.3 Embodiment #3 The following embodiments relate to the method of Section 4 Item 2 as follows. Newly added parts are in italic bold, and parts deleted from the VVC working draft are highlighted with a green strikethrough.

[0078] 7.4.7.10 Motion Vector Difference Semantics When compIdx = 0..1, the motion vector difference lMvd[compIdx] is derived as fol lows as follows.

[0079] [Number]

[0080] 5.4 Embodiment #4 The following embodiments relate to the method of Section 4 Item 2 . Newly added parts are in italic bold, and parts deleted from the VVC working draft are highlighted with a green strikethrough.

[0081] 7.4.7.11 Motion Vector Difference Semantics When compIdx = 0..1, the motion vector difference lMvd[compIdx] is derived as follows .

[0082] [Number]

[0083] 5.5 Embodiment #5 The following embodiments relate to the method of Section 4 Item 3 and Item 1 . Newly added parts are in italic bold, and parts deleted from the VVC working draft are highlighted with a green strikethrough.

[0084] 7.4.7.12 Motion Vector Difference Semantics When compIdx = 0..1, the motion vector difference lMvd[compIdx] is derived as follows .

[0085] [Number]

[0086] 5.6 Embodiment #6 The following embodiments relate to the method of Section 4. New Item 3 and Item 2 ​The added parts are in bold italic, and the parts deleted from the VVC working draft are emphasized with a green strikethrough.

[0087] 7.4.7.13 Motion Vector Difference Semantics When compIdx = 0..1, the motion vector difference lMvd[compIdx] is derived as follows. As follows.

[0088]

Number

[0089] Based on the value of MotionModelIdc[x][y], the motion vector difference is derived as follows. As follows. - When MotionModelIdc[x][y] is equal to 0, the variable MvdLX[x 0][y0][compIdx] (where X is 0 or 1) defines the difference between the list X vector component to be used and its prediction. The array indices x0, y0 define the position (x0, y0) of the top-left luminance sample of the coding block under consideration, which is related to the top-left luminance sample of the picture. For the difference of the horizontal motion vector component, compIdx = 0 is assigned, and for the vertical motion vector component, compIdx = 1 is assigned.

[0090]

Number

[0091] - Otherwise (when MotionModelIdc[x][y] is not equal to 0) ), the variable MvdCpLX[x0][y0][cpIdx][compIdx] (where X is 0 That is, (1) defines the difference between the list X vector components to be used and their prediction. The arrangement indexes x0, y0 define the position (x0, y0) of the luminance sample at the upper left of the coding block related to the luminance sample at the upper left of the picture, and the array indexes cpIdx define the control point index. For the difference of the horizontal motion vector component, compIdx = 0 is assigned, and for the vertical motion vector component, compIdx = 1 is assigned.

[0092]

Number

[0093] FIG. 2 is a block diagram of the video processing apparatus 1000. The apparatus 1000 may be used to implement one or more of the methods described herein. The apparatus 1000 may be implemented by a smartphone, tablet, computer, IoT (Internet of Things) receiver, etc. The apparatus 1000 may include one or more processors 1002, one or more memories 1004, and video processing hardware 1006. One or more processors 1002 may be configured to implement one or more of the methods described in this patent specification. One or more memories 1004 may be used to store data and code used to implement the methods and techniques described herein. The video processing hardware 1006 may be used to implement the techniques described in this patent specification in hardware circuits.

[0094] FIG. 3 is a flowchart showing an example of a video processing method. The method 300 has a maximum allowable Based on the motion vector resolution, the maximum allowable motion vector accuracy, or the attributes of the video region, during the conversion between the video region and the bitstream representation of the video region, for the video region of the video including determining (302) the range of values of the MVD (Motion Vector Difference) used for the video region. The method 300 includes performing the conversion (304) by restricting the MVD value to fall within the range.

[0095] The following list of solutions provides embodiments that can address the technical problems described in this patent specification, among other problems.

[0096] 1. A video processing method, comprising determining the range of values of the MVD (Motion Vector Difference) used for the video region of the video during the conversion between the video region and the bitstream representation of the video region based on the maximum allowable motion vector resolution, the maximum allowable motion vector accuracy, or the characteristics of the video region, and performing the conversion by restricting the MVD value to be within this range.

[0097] 2. The method according to solution 1, wherein the range is applied during the conversion of all video regions of the video.

[0098] 3. The method according to any one of solutions 1 to 2, wherein the range is equal to the range of motion vectors for the video region.

[0099] 4. The method according to any one of solutions 1 to 3, wherein the restricting includes scaling the MVD components to the accuracy and clipping the out-of-scale to the range.

[0100] ​​​​​​​​​​5. The characteristics of the video region include the coded information of the video region, and are the methods described in any of Solutions 1 to 4. Any of the methods described in any of them.

[0101] 6. The range is selected from a set of multiple possible ranges of the video, and is the method described in any of Solutions 1 to 5. Any of the methods described in any of them.

[0102] 7. The characteristics of the video region include the accuracy of the motion vector predictor used for the video region, and are the methods described in any of Solutions 1 to 4. Any of the methods described in any of them.

[0103] 8. The characteristics of the video region correspond to the value of MVShift, where MVShift is a variable associated with the video region, and MVShift depends on the affine_inter_flag, or amvr_flag, or amvr_precision_flag associated with the video region, and are the methods described in any of Solutions 1 to 4. Any of the methods described in any of them. e_inter_flag, or amvr_flag, or amvr_precision_flag associated with the video region, and are the methods described in any of Solutions 1 to 4. Any of the methods described in any of them.

[0104] 9. The characteristics of the video region correspond to the coding mode used for transformation, and are the methods described in Solution 1. Any of the methods described in any of them.

[0105] 10. The coding mode is the intra block copy mode, and the range corresponds to [- 2 K+L , 2 K+L -1], where K and L are integers representing the range of the integer part of the MV (Motion Vector) and the range of the fractional part of the MV, respectively, and are the methods described in Solution 9. Any of the methods described in any of them. Any of the methods described in any of them.

[0106] 11. K = 13 and L = 0, and are the methods described in Solution 10.

[0107] 12. The characteristics of the video region correspond to the motion model used for transformation, and are the methods described in Solution 1. Any of the methods described in any of them.

[0108] 13. The characteristics of the video region are such that the motion of the video region is modeled using a translational model, and as a result, the range is [-2 , 2 K+L , 2 K+L -1], where , K and L are integers representing the range of the integer part of the MV (Motion Vector) and the range of the fractional part of the MV, respectively, as described in Solution 1.

[0109] 14. The method described in Solution 13, where K = 13 and L = 2.

[0110] 15. The characteristics of the video region are such that the motion of the video region is modeled using a non-translational model, and as a result, the range is [-2 , 2 K+L , 2 K+L -1], where , K and L are integers representing the range of the integer part of the MV and the range of the fractional part of the MV, respectively, as described in Solution 1.

[0111] 16. The method described in Solution 15, where K = 13 and L = 4.

[0112] 17. The method described in Solution 1, where restricting includes restricting the rounded value of the MVD to the range.

[0113] 18. A video processing method having, during the conversion between a video region and a bitstream representation of the video region, determining the range of MVD (Motion Vector Difference) values used for the video region of the video, and performing a clipping operation on the MVD values so as to fall within the range during the semantic interpretation performed by the conversion.

[0114] 19. The image area corresponds to the image block and is the method described in any one of Solutions 1 to 18. Method.

[0115] 20. The conversion includes generating pixel values of the image area from the bitstream representation, and is the method described in any one of Solutions 1 to 19. Method.

[0116] 21. The conversion includes generating a bitstream representation from the pixel values of the image area, and is the method described in any one of Solutions 1 to 20. Method.

[0117] 22. An image processing apparatus comprising a processor configured to implement one or more of Examples 1 to 21. Image processing apparatus.

[0118] 23. A computer-readable medium storing code, wherein when the code is executed by a processor, the processor is caused to implement the method described in one or more of Examples 1 to 21. Computer-readable medium. The items listed in Section 4 provide further variations of the above solutions.

[0119] Figure 4 is a flowchart showing an example of a method 400 for image processing. Method 400 is for conversion between a first block of an image and the bitstream representation of the first block, and includes determining (402) the range of the MVD (Motion Vector Difference) component associated with the first block, where the range of the MVD component is [-2

[0120] , 2 -1], M = 17, and suppressing (404) the value of the MVD component to be within the range of the MVD component, and performing conversion based on the suppressed range of the MVD component. The range of the MVD (Motion Vector Difference) component associated with the first block is determined (402), where the range of the MVD component is [-2 , 2 M -1], M = 17, and the value of the MVD component is suppressed (404) to be within the range of the MVD component, and the conversion is performed based on the suppressed range of the MVD component. M -1], M = 17, and suppressing the value of the MVD component to be within the range of the MVD component (404), and performing conversion based on the suppressed range of the MVD component. And suppressing the value of the MVD component to be within the range of the MVD component (404), and performing conversion based on the suppressed range of the MVD component. performing (406), and has

[0121] In some examples, the range is adapted to the acceptable MVD accuracy and / or acceptable MV (Motion Vector) accuracy of the codec.

[0122] In some examples, the acceptable MVD accuracy and / or acceptable MV (Motion Vector) accuracy is 1 / 16 luminance sample accuracy.

[0123] In some examples, if there are multiple acceptable MVD accuracies and / or MV accuracies in the codec, the range of the MVD components is adapted to the highest accuracy of the multiple acceptable MVD accuracies and / or MV accuracies.

[0124] In some examples, if the multiple acceptable MVD accuracies and / or MV accuracies include 1 / 16 luminance samples, 1 / 4 luminance samples, 1 luminance sample, and 4 luminance samples, the range of the MVD components is adapted to the accuracy of 1 / 16 luminance samples.

[0125] In some examples, the range of the MVD components is determined to be [-2 M , 2 M -1], M = K + L, where K indicates the number of bits used to represent the integer part of the MVD component, L indicates the number of bits used to represent the fractional part of the MVD component, the MVD component is represented in 1 L / 2 luminance sample accuracy, and / or the range of the MV component associated with the first block is determined to be [-2 M , 2 M -1], M = K + L, where K indicates the number of bits used to represent the integer part of the MV component, and L is the fractional part of the MV component indicates the number of bits used for representation, and the MV component is 1 / 2 L - represented with luminance sample precision where M, K, and L are positive integers.

[0126] In some examples, K = 13, L = 4, and M = 17.

[0127] In some examples, the MVD component is the decoded / signaled MVD component coded in the bitstream, or the transformed MVD component associated with a particular precision via an internal shift operation of the decoding process.

[0128] In some examples, the MVD component includes a horizontal MVD component and a vertical MVD component, and the horizontal MVD component and the vertical MVD component have the same range.

[0129] In some examples, the MVD component is represented by integer bits, fractional bits, and sign bits.

[0130] In some examples, the range of the MV associated with the first block is the same as the range of the MVD component.

[0131] FIG. 5 is a flowchart illustrating an example of a video processing method 500. The method 500 determines (502) a range of MVD (Motion Vector Difference) components associated with a first block for conversion between the first block of video and a bitstream representation of the first block, where the range of the MVD components is adapted to an acceptable MVD precision of the codec and / or an acceptable MV (Motion Vector) precision, and clips the value of the MVD component within the range of the MVD components (5 ​​​​​​​​​​performing conversion based on the suppressed range of the MVD component (506); including.

[0132] In some examples, the MVD component is the decoded / signal notified MVD component coded in the bitstream, or the converted MVD component associated with a specific accuracy through the internal shift operation of the decoding process.

[0133] In some examples, the decoded / signal notified MVD component is required to be in the range of [-2 M , 2 M -1], and M = 17.

[0134] In some examples, the MVD component is represented by an integer bit, a fractional bit, and a sign bit.

[0135] In some examples, the range of the MVD component is determined to be [-2 M , 2 M -1], M = K + L, where K indicates the number of bits used to represent the integer part of the MVD component, L indicates the number of bits used to represent the fractional part of the MVD component, the MVD component is represented with 1 / 2 L luminance sample accuracy, and / or the range of the MVD component associated with the first block is determined to be [-2 , 2 M , 2 M -1], M = K + L, where K indicates the number of bits used to represent the integer part of the MV component, L indicates the number of bits used to represent the fractional part of the MV component, the MV component is represented with 1 / 2 luminance sample accuracy, L M, K, and L are positive integers.

[0136] ​​​​​In some examples, the values of all decoded MVD components are first scaled to 1 / 2 L luminance samples precision and then clipped to the range [-2 M , 2 M -1] of the MVD components .

[0137] In some examples, if the codec has multiple acceptable MVD precisions and / or MV precisions , the range of the MVD components is adapted to the highest precision of the multiple acceptable MVD precisions and / or MV precisions.

[0138] In some examples, if the multiple acceptable MVD precisions and / or MV precisions include 1 / 16 luminance sample precision, 1 / 4 luminance sample precision, 1 luminance sample precision, and 4 luminance sample precision, the range of the MVD components is adapted to 1 / 16 luminance sample precision, and the values of the MVD components are clamped and / or clipped to the range.

[0139] In some examples, K = 13, L = 4, and M = 17.

[0140] In some examples, the MVD components include a horizontal MVD component and a vertical MVD component, and the horizontal MVD component and the vertical MVD component have the same range.

[0141] In some examples, the range of the MV is the same as the range of the MVD components.

[0142] FIG. 6 is a flowchart illustrating an example of a video processing method 600. The method 600 is for conversion between a first block of video and a bitstream representation of the first block, and for the MVD (Motion Vector Differe associated with the first block Determine the range of the (nce) component based on the coded information of the first block and (602), suppress the value of the MVD component so that it is within the range of the MVD component (60 4), and execute a conversion based on the suppressed MVD component (606).

[0143] In some examples, the range of the MVD component includes a plurality of sets of the range of the MVD component.

[0144] In some examples, the coded information includes at least one of the accuracy of the MV (Motion Vector) predictor, the accuracy of the MVD component, and the accuracy of the MV.

[0145] In some examples, when the MVD accuracy of the MVD component is 1 / 2 L and it is a luminance sample, the MV range of the D component is determined to be in the range of [-2 K+L , 2 K+L -1], the value of the MVP component is suppressed and / or clipped to be within the range, and K indicates the number of bits used to represent the integer part of the MVD component , L indicates the number of bits used to represent the fractional part of the MVD component , and K and L are positive integers.

[0146] In some examples, K is 13 and L is one of 4, 3, 2, 1, 0, -1, -2, -3, and -4.

[0147] In some examples, the coded information includes the variable MvSh ift associated with the MVD, and the derivation of the variable MvShift depends on whether AFFINE is used and / or whether AMVR (Adaptive Motion Vector Resolut ion) is used, and / or the accuracy of AMVR, and / or the MV The accuracy of D, and / or MMVD (MMerge mode with Motion Vector Difference) information, and / or depends on the prediction mode of the first block. n Vector Difference) information, and / or depends on the prediction mode of the first block. depends on the prediction mode of the first block.

[0148] In some examples, the variable MvShift is derived from one or more syntax elements including inter_affine_flag, amvr_flag, and amvr_precision_idx in the coded information. r_affine_flag, amvr_flag, and amvr_precision n_idx in the coded information.

[0149] In some examples, the variable MvShift is derived from one or more syntax elements including inter_affine_flag, amvr_flag, amvr_precision_i dx, sps_fpel_mmvd_enabled_flag, ph_fpel_mm vd_enabled_flag, mmvd_distance_idx, and CuP vd_enabled_flag, mmvd_distance_idx, and CuP redMode in the coded information.

[0150] In some examples, the coded information includes the coding mode, motion mode, and prediction mode of the first block, and one or more variables and / or syntax elements indicating whether AFFIN / AMVR is used in the coding information. The coding mode, motion mode, and prediction mode of the first block, and one or more variables and / or syntax elements indicating whether AFFIN / AMVR is used in the coding information. is used in the coding information.

[0151] In some examples, when the prediction mode of the first block is MODE_IBC indicating that the first block is coded in IBC mode, the range of the MVD components is determined to be in the range of [-2 [-2 K+L ,2 K+L -1], and the value of the MVP component is within the range. Suppressed and / or clipped as appropriate, where K represents the integer part of the MVD component indicates the number of bits used, and L indicates the number of bits used to represent the fractional part of the MVD component and K and L are positive integers.

[0152] In some examples, K = 13 and L = 0.

[0153] In some examples, when the index of the motion model of the first block is equal to 0, the range of the MVD component is determined to be in the range of [-2 K+L , 2 K+L - 1], and the value of the MVP component is suppressed and / or clipped to be within the range, where K indicates the number of bits used to represent the integer part of the MVD component, and L indicates the number of bits used to represent the fractional part of the MVD component and K and L are positive integers. In some examples, K = 13 and L = 2.

[0154] In some examples, K = 13 and L = 2.

[0155] In some examples, when the prediction mode of the first block is such that the first block is MODE_IN TER and the variable affine_inter_flag is false, the range of the MV D component is determined to be in the range of [-2 K+L , 2 K+L - 1], and the value of the MVP component is suppressed and / or clipped to be within the range, where K indicates the number of bits used to represent the integer part of the MVD component, and L indicates the number of bits used to represent the fractional part of the MVD component and K and L are positive integers. In some examples, K = 13 and L = 2.

[0156] In some examples, K = 13 and L = 2.

[0157] In some examples, when the index of the motion model of the first block is not equal to 0 , the range of the MVD component is [-2 K+L , 2 K+L -1], and it is determined that the value of the MVP component is clamped and / or clipped to be within the range, K indicates the number of bits used to represent the integer part of the MVD component, L indicates the number of bits used to represent the fractional part of the MVD component, and K and L are positive integers. In some examples, K = 13 and L = 4. In some examples, when the prediction mode of the first block is such that the first block is MODE_IN

[0158] TER and the variable affine_inter_flag is true, the range of the MVD component is [-2

[0159] TER and the variable affine_inter_flag is true, the range of the MVD component is [-2 TER and the variable affine_inter_flag is true, the range of the MVD component is [-2 , 2 K+L , 2 K+L -1], and it is determined that the value of the MVP component is clamped and / or clipped to be within the range, K indicates the number of bits used to represent the integer part of the MVD component, L indicates the number of bits used to represent the fractional part of the MVD component, and K and L are positive integers. In some examples, K = 13 and L = 4. In some examples, when the decoded MVD component is in fractional precision, the decoded MVD component is rounded to the integer MVD component.

[0160] In some examples, the rounded integer MVD component is in the range [-2

[0161] In some examples, when the decoded MVD component is in fractional precision, the decoded MVD component is rounded to the integer MVD component.

[0162] , 2 K , 2 K -1], and K = 13. In some examples, the rounded integer MVD component is in the range [-2

[0163] In some examples, the values of all MVD components that are decoded are explicitly clipped to the range of the MVD components during semantic interpretation other than using the bitstream constraints.

[0164] In some examples, the conversion generates the first block of the video from the bitstream representation .

[0165] In some examples, the conversion generates the bitstream representation from the first block of the video .

[0166] In the list of examples in this patent specification, the term conversion may refer to the generation of the bitstream representation of the current video block, or the generation of the current video block from the bitstream representation. The bitstream representation need not represent a group of consecutive bits and may be split into bits included in a header field or a code name representing coded pixel value information .. In the above examples, the rules of applicability are predefined and may be recognized by the encoder and decoder .. It can be understood that, as described in this patent specification, the disclosed technology can be implemented in a video encoder or decoder and uses various implementation rules of considerations regarding the use of differential coding modes in intra coding to improve compression efficiency

[0167] As described in this patent specification, the disclosed and other solutions, examples, embodiments, modules, and implementation forms of functional operations use the technology including various implementation rules of considerations regarding the use of differential coding modes in intra coding to improve compression efficiency ..

[0168] As described in this patent specification, the disclosed technology can be implemented in a video encoder or decoder and uses the technology including various implementation rules of considerations regarding the use of differential coding modes in intra coding to improve compression efficiency .. It can be understood that the disclosed and other solutions, examples, embodiments, modules, and implementation forms of functional operations described in this patent specification use the technology including various implementation rules of considerations regarding the use of differential coding modes in intra coding to improve compression efficiency ..

[0169] The disclosed and other solutions, examples, embodiments, modules, and implementation forms of functional operations described in this patent specification use the structures disclosed in this patent specification and their structures .. including equivalents thereof, digital electronic circuits, or computer software, firmware , or may be implemented in hardware, or in one or more combinations thereof . The disclosed and other embodiments can be implemented as one or more computer program products, i.e., as one or more modules of computer program instructions encoded on a computer-readable medium for being implemented by, or to control the operation of, a data processing apparatus. The computer-readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter that provides a machine-readable propagated signal, or one or more combinations thereof. The term "data processing apparatus" includes, for example, a programmable processor, a computer, or multiple processors or computers, and all apparatus, devices, and machines for processing data. This apparatus can include, in addition to hardware, code that creates an execution environment for the computer program, e.g., processor firmware, a protocol stack, a database management system, an operating system, or code that constitutes one or more combinations thereof. The propagated signal is an artificially generated signal, e.g., an electrical, optical, or electromagnetic signal generated mechanically and generated for encoding information for transmission to an

[0170] A computer program (also called a program, software, software application , script, or code) can be in a compiled language or an interpreted It can be described in any form of programming language including languages, and it can also be deployed as a stand-alone program or in any form including as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. The program may be recorded in a part of a file that holds other programs or data (for example, one or more scripts stored in a markup language document), or stored in a single file dedicated to the program, or stored in multiple adjustment files (for example, files that store one or more modules, subprograms, or parts of code). It is also possible to deploy one computer program to be executed on one computer located at one site or on multiple computers interconnected by a communication network and distributed across multiple sites. The processes and logic flows described in this patent specification can be performed by one or more programmable processors that execute one or more computer programs for performing functions by operating on input data and generating output. The processes and logic flows can also be performed by specific-purpose logic circuits, for example, an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit), and the apparatus can also be implemented as a special-purpose logic circuit.

[0171] rogrammable Gate Array) or an ASIC (Applicati on Specific Integrated Circuit), and the apparatus can also be implemented as a special-purpose logic circuit.

[0172] Processors suitable for the execution of a computer program include, for example, both general and special micro processors, as well as any one or more of any kind of digital computer's processors. In general, a processor receives instructions and data from a read-only memory or a random access memory or both. The essential elements of a computer are a processor for executing instructions and one or more memory devices for storing instructions and data. In general, a computer may include one or more mass storage devices for storing data, such as magnetic, magneto-optical disks, or optical disks, or may be operatively coupled to receive data from or transfer data to such mass storage devices. However, a computer need not have such devices. Computer-readable media suitable for storing computer program instructions and data include any form of non-volatile memory, media, and memory devices, including, for example, EPROM, EEPROM, flash memory devices, magnetic disks, such as internal hard disks or removable disks, magneto-optical disks, and semiconductor memory devices such as CD-ROM and DVD-ROM disks. The processor and memory may be supplemented by, or incorporated in, specific application logic circuitry.

[0173] Although this patent specification contains many details, these should not be construed as limiting the scope of any subject matter or the scope of the claims, but rather as specific embodiments of particular techniques specific to the particular technology. ​Features that may be present should be described and interpreted. In this patent specification, separate embodiments The specific features described in the context of may be implemented in combination in one example Conversely, the various features described in the context of one example may be implemented separately or in any suitable sub - combination in multiple embodiments. Furthermore, features are described and initially claimed above as acting in a particular combination, but one or more features from the claimed combination may, in some cases, be extracted from the combination, and the claimed combination may be directed to a sub - combination or a variation of the sub - combination. removed from the combination, and the claimed combination may be directed to a sub - combination or a variation of the sub - combination. removed from the combination, and the claimed combination may be directed to a sub - combination or a variation of the sub - combination. For example, features described in the context of one example may be implemented in combination in another example.

[0174] Similarly, operations are shown in a particular order in the drawings, but this should not be understood as requiring that such operations be performed in the particular order shown or in a sequential order shown or that all the operations shown be performed in order to achieve the desired result. Also, the separation of the various system components in the examples described in this patent specification should not be understood as requiring such separation in all embodiments. should not be understood as requiring such separation in all embodiments. should not be understood as requiring such separation in all embodiments.

[0175] Only some implementations and examples are described, and based on the content described and illustrated in this patent document other embodiments, extensions, and variations are possible.

Claims

1. 1. A method for processing video, comprising: For converting between a first block of a video and a bitstream representation of said first block. To this end, a motion vector diagram (MVD) associated with the first block is determining a range of a MVD component, the range being [- 2 Ｍ , 2 Ｍ −1], M=17, and constraining the value of the MVD component to be within the range of the MVD component; performing said transformation based on said suppressed MVD components; The method according to claim 1,

2. The range may be determined based on the acceptable MVD accuracy and / or acceptable MV(Mo The method of claim 1 , wherein the accuracy is adapted to a 3D vector (3D vector) accuracy.

3. The acceptable MVD accuracy and / or the acceptable MV (Motion Vector The method of claim 2 , wherein r) the precision is 1 / 16 luminance sample precision.

4. If there are multiple allowable MVD and / or MV precisions in the codec, M The range of VD components is selected from the plurality of allowable MVD and / or MV accuracies. The method according to any one of claims 1 to 3, adapted to the highest accuracy of

5. The multiple MVD and / or MV precisions are 1 / 16 luminance samples, 1 / 4 luminance samples, a sample, one luma sample, and four luma samples; The MVD components are adapted to 1 / 16 luma sample precision. The method according to claim 4.

6. The range of the MVD component is [-2 Ｍ , 2 Ｍ −1], M=K+L, K denotes the number of bits used to represent the integer portion of the MVD component; L denotes the number of bits used to represent the fractional part of the MVD component; The MVD component is 1 / 2 Ｌ It is expressed in luminance sample precision, and / or The range of the MV components associated with the first block is [-2 Ｍ , 2 Ｍ −1] It was determined that M=K+L, K denotes the number of bits used to represent the integer part of the MV component; L denotes the number of bits used to represent the fractional part of the MV component; The MV component is 1 / 2 Ｌ It is expressed in luminance sample precision, M, K, and L are positive integers; The method according to any one of claims 1 to 5.

7. 7. The method of claim 6, wherein K=13, L=4, and M=17.

8. The MVD component is the decoded / signaling coded in the bitstream. The MVD components are known or are generated by internal shifting operations in the decoding process. According to any one of claims 1 to 7, the converted MVD components are associated with the accuracy. How to.

9. the MVD components include a horizontal MVD component and a vertical MVD component; the horizontal MVD component and the vertical MVD component have the same range; The method according to any one of claims 1 to 8.

10. The MVD components are represented by integer bits, fractional bits, and a sign bit.

10. The method according to any one of 1 to 9.

11. The range of MV associated with the first block is the same as the range of MVD components. The method according to any one of claims 1 to 10, wherein

12. 1. A method for processing video, comprising: between a first block of the image and a bitstream representation of the first block. For the conversion, the MVD (Motion Vector Diagram) associated with the first block is r Difference) component ranges, is the acceptable MVD component accuracy of the codec and / or the acceptable MV(Motion n Vector) precision; and constraining the value of the MVD component to be within the range of the MVD component; performing the transformation based on the suppressed MVD components; The method according to claim 1,

13. The MVD component is the decoded / signaling coded in the bitstream. The MVD components are known or are generated by internal shifting operations in the decoding process. The method of claim 12, wherein the transformed MVD components are associated with precision.

14. The coded / signaled MVD component is [-2 Ｍ , 2 Ｍ -1] range 14. The method of claim 13, wherein M=17.

15. The MVD components are represented by integer bits, fractional bits, and a sign bit.

15. The method according to any one of claims 12 to 14.

16. The range of the MVD component is [-2 Ｍ , 2 Ｍ −1], M=K+L, K denotes the number of bits used to represent the integer portion of the MVD component; L denotes the number of bits used to represent the fractional part of the MVD component; The MVD component is 1 / 2 Ｌ It is expressed in luminance sample precision, and / or The range of the MV components associated with the first block is [-2 Ｍ , 2 Ｍ −1] It was determined that M=K+L, K denotes the number of bits used to represent the integer part of the MV component; L denotes the number of bits used to represent the fractional part of the MV component; The MV component is 1 / 2 Ｌ It is expressed in luminance sample precision, M, K, and L are positive integers; The method according to any one of claims 12 to 15.

17. The values ​​of all decoded MVD components are first multiplied by 1 / 2 Ｌ Scale to Luminance Sample Precision Then, the MVD tax portion is divided into [-2 Ｍ , 2 Ｍ -1] The method according to claim 16.

18. If there are multiple allowable MVD and / or MV precisions in the codec, M The range of VD components is selected from the plurality of allowable MVD and / or MV accuracies. The method according to any one of claims 12 to 17, adapted to the highest accuracy of

19. The multiple MVD and / or MV precisions are 1 / 16 luminance samples, 1 / 4 luminance samples, a sample, one luma sample, and four luma samples; said range of MVD components is adapted to 1 / 16 luminance sample precision; the values ​​of the MVD components are constrained and / or clipped in the ranges; 20. The method of claim 18.

20. According to any one of claims 16 to 19, K=13, L=4, and M=17. How to.

21. the MVD components include a horizontal MVD component and a vertical MVD component; the horizontal MVD component and the vertical MVD component have the same range; The method according to any one of claims 12 to 20.

22. Any of claims 12 to 21, wherein the range of the MV is the same as the range of the MVD component. The method according to any one of claims 1 to 5.

23. 1. A method for processing video, comprising: between a first block of the image and a bitstream representation of the first block. For the conversion, the first block is coded based on the coded information of the first block. The MVD (Motion Vector Difference) associated with the lock Determining the range of ingredients; constraining the value of the MVD component to be within the range of the MVD component; performing said transformation based on a suppressed range of MVD components; The method according to claim 1,

24. 24. The method of claim 23, wherein the ranges of MVD components include a plurality of sets of ranges of MVD components. How to.

25. The coded information is MV (Motion Vector) predictor accuracy, M 25. The method according to claim 23 or 24, further comprising at least one of a VD component precision and a MV precision. The method described.

26. The MVD accuracy of the MVD component is 1 / 2 Ｌ are the luminance samples, The range of the MVD component is [-2 Ｋ＋Ｌ , 2 Ｋ＋Ｌ −1], the values ​​of the MVP components are constrained and / or clipped in the range; K denotes the number of bits used to represent the integer portion of the MVD component; L denotes the number of bits used to represent the fractional part of the MVD component; K and L are positive integers.

26. The method of claim 25.

27. K is 13, L is one of 4, 3, 2, 1, 0, -1, -2, -3, and -4; 27. The method of claim 26.

28. The coded information includes a variable MvShift associated with the MVD; The derivation of the variable MvShift depends on whether AFFINE is used and / or Or AMVR (Adaptive Motion Vector Resolution) n) is used and / or AMVR accuracy and / or MVD accuracy degree, and / or MMVD (Merge mode with Motion Ve Detector Difference information and / or a prediction model of the first block. Based on the code, 25. The method of claim 23 or 24.

29. The variable MvShift is the inter_aff in the coded information. ine_flag, amvr_flag, and amvr_precision_idx 30. The method of claim 28, wherein the metric is derived from one or more syntax elements including:

30. The variable MvShift is the inter_aff in the coded information. ine_flag, amvr_flag, amvr_precision_idx, sp s_fpel_mmvd_enabled_flag, ph_fpel_mmvd_en enabled_flag, mmvd_distance_idx, CuPredMode 30. The method of claim 28, wherein the one or more syntax elements include

31. The coded information includes a coding mode, a motion mode, and a coding mode of the first block. The coded information includes the prediction mode, AFFINE / AMVR, and A claim including one or more variables and / or syntax elements that indicate whether the claim is used in The method according to claim 23 or 24.

32. The prediction mode of the first block is such that the first block is coded in an IBC mode. In the case of MODE_IBC, which indicates that the MVD component is assigned to the 2 Ｋ＋Ｌ , 2 Ｋ＋Ｌ −1], the values ​​of the MVP components are constrained and / or clipped in the range; K denotes the number of bits used to represent the integer portion of the MVD component; L denotes the number of bits used to represent the fractional part of the MVD component; K and L are positive integers.

32. The method of claim 31 .

33. 33. The method of claim 32, wherein K=13 and L=0.

34. If the motion model index of the first block is equal to 0, then the MVD component The range is [-2 Ｋ＋Ｌ , 2 Ｋ＋Ｌ −1], the values ​​of the MVP components are constrained and / or clipped in the range; K denotes the number of bits used to represent the integer portion of the MVD component; L denotes the number of bits used to represent the fractional part of the MVD component; K and L are positive integers. The method of claim 30.

35. 35. The method of claim 34, wherein K=13 and L=2.

36. The prediction mode of the first block is MODE_INTER, and affine If the variable _inter_flag is false, the range of MVD components is [-2 Ｋ ＋Ｌ , 2 Ｋ＋Ｌ −1], the values ​​of the MVP components are constrained and / or clipped in the range; K denotes the number of bits used to represent the integer portion of the MVD component; L denotes the number of bits used to represent the fractional part of the MVD component; K and L are positive integers.

32. The method of claim 31 .

37. 37. The method of claim 36, wherein K=13 and L=2.

38. If the motion model index of the first block is not equal to 0, then MVD The range of components is [-2 Ｋ＋Ｌ , 2 Ｋ＋Ｌ −1], the values ​​of the MVP components are constrained and / or clipped in the range; K denotes the number of bits used to represent the integer portion of the MVD component; L denotes the number of bits used to represent the fractional part of the MVD component; K and L are positive integers.

32. The method of claim 31 .

39. 39. The method of claim 38, wherein K=13 and L=4.

40. The prediction mode of the first block is MODE_INTER, and affine If the variable _inter_flag is true, the range of MVD components is [-2 Ｋ ＋Ｌ , 2 Ｋ＋Ｌ −1], the values ​​of the MVP components are constrained and / or clipped in the range; K denotes the number of bits used to represent the integer portion of the MVD component; L denotes the number of bits used to represent the fractional part of the MVD component; K and L are positive integers.

32. The method of claim 31 .

41. 41. The method of claim 40, wherein K=13 and L=4.

42. If the decoded MVD components are in fractional precision, the decoded MVD components are in integer precision.

42. The method of any one of claims 1 to 41, wherein the MVD component is rounded.

43. The rounded integer MVD components are [-2 Ｋ , 2 Ｋ −1], and K=13.

43. The method of claim 42.

44. The above values ​​of all decoded MVD components have no other meaning than that used for bitstream restrictions. Any of claims 1 to 43, wherein during interpretation, MVD components are explicitly clipped to said range.

13. The method according to claim 1.

45. said transforming generates said first block of video from said bitstream representation. The method according to any one of claims 1 to 44.

46. said transforming generates said bitstream representation from said first block of video; The method according to any one of claims 1 to 44.

47. An apparatus in a video system having a processor and a non-transitory memory having instructions. Thus, the instructions are executed by the processor to cause the processor to Item 47. An apparatus for carrying out the method according to any one of items 1 to 46.

48. A computer program product stored on a non-transitory computer readable medium. and a program code for carrying out the method according to any one of claims 1 to 46. Computer program products.

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