Control method and power conversion device

By precharging switching elements in power conversion devices during dead times, the device effectively suppresses noise caused by parasitic capacitance, enhancing operational stability and reducing electromagnetic interference.

JP2025104576APending Publication Date: 2025-07-10KK TOSHIBA +1
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Patent Information

Application Number
JP2023222474
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-12-28
Publication Date
2025-07-10

AI Technical Summary

Technical Problem

Existing power conversion devices struggle to effectively suppress noise in AC voltage inputs, particularly due to steep potential fluctuations caused by parasitic capacitance in switching elements, leading to excessive electromagnetic noise.

Method used

The implementation of precharge circuits for switching elements in a power conversion device to precharge one end of the switching elements during dead times, reducing the amount of charge flowing into parasitic capacitance and minimizing potential fluctuations.

Benefits of technology

This approach significantly suppresses spike noise and electromagnetic noise by controlling the charge flow into parasitic capacitance, thereby improving the operational stability and reducing noise emissions.

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Abstract

To provide a control method and a power conversion device that can suppress a noise in an AC voltage input.SOLUTION: A control method comprises pre-charging one end of a first switching element in a first state where both of the first switching element and a second switching element are turned off in a power conversion device that converts an AC voltage into a DC voltage by performing a synchronous rectification operation by the first switching element and the second switching element that are connected to a half bridge between an input node and an output node. The control method further comprises turning on the second switching element after completion of the pre-charging of the one end of the first switching element.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] This embodiment relates to a control method and a power conversion device.

Background Art

[0002] A power conversion device may receive an AC voltage, rectify a current corresponding to the received AC voltage, and generate a DC voltage corresponding to the rectified current. In a power conversion device, it is desirable to suppress noise in the AC voltage input.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] One embodiment aims to provide a control method and a power conversion device capable of suppressing noise in an AC voltage input.

Means for Solving the Problems

[0005] According to one embodiment, a control method is provided. The control method includes precharging one end of a first switching element in a first state in which both the first switching element and a second switching element connected in a half-bridge between an input node and an output node are off, and converting an AC voltage into a DC voltage by performing synchronous rectification operation. The control method includes turning on the second switching element after completion of precharging one end of the first switching element.

Brief Description of the Drawings

[0006]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

MODE FOR CARRYING OUT THE INVENTION

[0007] The power conversion device according to the embodiment will be described in detail below with reference to the accompanying drawings. Note that the present invention is not limited by this embodiment.

[0008] (Embodiment) The power conversion measure according to the embodiment receives an AC voltage, rectifies the current corresponding to the received AC voltage, and generates a DC voltage corresponding to the rectified current, and a device for suppressing noise in the AC voltage input is provided.

[0009] As shown in FIG. 1, the power conversion device 1 is connected between an AC power supply PS and a load circuit LD. The power conversion device 1 receives an AC voltage from the AC power supply PS. The AC voltage is converted into a DC voltage, and the DC voltage is supplied to the load circuit LD. The AC power supply PS may be a utility power supply. The load circuit LD may be a DC motor.

[0010] The power conversion device 1 has input nodes N IN1 , N IN2 , output nodes N OUT1 , N OUT2 . The input node N IN1 is connected to one end of the AC power supply PS, and the input node N IN2is connected to the other end of the AC power supply PS. Output node N OUT1 is connected to one end of the load circuit LD, and input node N OUT2 is connected to the other end of the load circuit LD.

[0011] The power conversion device 1 includes a switching element SW1, a switching element SW2, and a controller CTR. The switching element SW1 and the switching element SW2 are half-bridge connected between the input node N IN1 and the output node N OUT1 , N OUT2 The node N between the switching element SW1 and the switching element SW2 M1 is connected to the input node N IN1 .

[0012] One end of the switching element SW1 is connected to the output node N OUT1 , and the other end is connected to the input node N through the node N M1 , and the control terminal is connected to the controller CTR. The switching element SW1 is, for example, an NMOS transistor, the source is connected to the input node N through the node N IN1 , the drain is connected to the output node N M1 , and the gate is connected to the controller CTR. IN1 OUT1 OUT1 The switching element SW1 receives the control signal φSW1 from the controller CTR at the control terminal (for example, the gate). The switching element SW1 turns on and off according to the control signal φSW1. The switching element SW1 turns on when the control signal φSW1 is at the active level (for example, high level). The switching element SW1 turns off when the control signal φSW1 is at the non-active level (for example, low level).

[0013] One end of the switching element SW2 is connected to the input node N through the node N

[0014] M1 M1 IN1 IN1 and the other end is connected to the output node N OUT1is connected, and its control terminal is connected to the controller CTR. The switching element SW2 is, for example, an NMOS transistor, and its source is connected to the output node N OUT1 is connected, and its drain is connected to the node N M1 via which it is connected to the input node N IN1 and its gate is connected to the controller CTR.

[0015] The switching element SW2 receives the control signal φSW2 from the controller CTR at its control terminal (e.g., gate). The switching element SW2 turns on and off according to the control signal φSW2. The switching element SW2 turns on when the control signal φSW2 is at the active level (e.g., high level). The switching element SW2 turns off when the control signal φSW2 is at the non-active level (e.g., low level).

[0016] The switching element SW1 and the switching element SW2 perform a synchronous rectification operation under the control of the controller CTR. For example, for the AC voltage V IN from the AC power supply PS, taking the potential of the input node N IN1 as a reference, if the amplitude when the potential of the input node N IN2 is high is positive and the amplitude when it is low is negative, the AC voltage V IN can change in a sine wave shape as shown by the solid line in FIG. 2. FIG. 2 is a waveform diagram showing the operation of the power conversion device 1. In FIG. 2, for reference, the AC current I IN is shown by a dotted line. The AC current I IN can change in a sine wave shape.

[0017] During the periods TP1 and TP3 when the amplitude of the AC voltage V IN is positive, the control signal φSW1 is at the non-active level (e.g., low level), and the control signal φSW2 is at the active level (e.g., high level). Accordingly, the switching element SW1 is maintained in the off state, and the switching element SW2 is maintained in the on state. Thereby, switching element SW2 → node N M1 → input node N IN1 → AC power supply PS → input node N IN2A current flows through a path including the path of

[0018] AC voltage V IN During periods TP2 and TP4 when the amplitude of is negative, control signal φSW1 is at an active level (e.g., high level), and control signal φSW2 is at a non-active level (e.g., low level). Accordingly, switching element SW1 is maintained in the on state, and switching element SW2 is maintained in the off state. Thereby, input node N IN2 → AC power supply PS → input node N IN1 → node N M1 → A current flows through a path including the path of switching element SW1.

[0019] AC voltage V IN Near each zero-crossing point of , dead times DT1, DT2, DT3, DT4 are provided where both switching element SW1 and switching element SW2 are maintained in the off state. During dead times DT1, DT2, DT3, DT4, the parasitic capacitance C SW1 of switching element SW1 and the parasitic capacitance C SW2 of switching element SW2 may each be in a substantially discharged state. Parasitic capacitance C SW1 is the output capacitance of switching element SW1. Parasitic capacitance C SW2 is the output capacitance of switching element SW2.

[0020] For example, dead times DT1, DT3 start at the timing when switching element SW2 turns off, and thereafter, the parasitic capacitance C SW2 of switching element SW2 may become substantially discharged. At the timing when dead times DT1, DT3 end, when switching element SW1 turns on, charge rapidly flows into the parasitic capacitance C SW2 of switching element SW2 that is in a substantially discharged state, and a steep potential fluctuation may occur in the voltage V OUT1 , N OUT2 between. A steep potential fluctuation in voltage V OUT may cause a steep potential fluctuation in the voltage V OUT between output nodes N OUT1 , N OUT2The current I flowing therein OUT may cause spike noise, thereby radiating electromagnetic noise exceeding the allowable amount.

[0021] Similarly, the dead times DT2 and DT4 start at the timing when the switching element SW1 turns off. After that, the parasitic capacitance C of the switching element SW1 SW1 can be almost discharged. At the timing when the dead times DT2 and DT4 end, when the switching element SW2 turns on, charge suddenly flows into the parasitic capacitance C of the switching element SW1 that is almost discharged SW1 , causing a sharp potential fluctuation in the voltage V OUT1 , N OUT2 between. The sharp potential fluctuation of the voltage V OUT may cause spike noise in the current I OUT flowing through the output nodes N OUT1 , N OUT2 , thereby radiating electromagnetic noise exceeding the allowable amount. OUT

[0022] The parasitic capacitance C of the switching element SW1 SW1 can change its capacitance value according to the voltage it holds, as shown in FIG. 3. FIG. 3 is a diagram showing the characteristics of the parasitic capacitance C SW1 of the switching element SW1. The parasitic capacitance C SW1 tends to have a smaller capacitance value as the holding voltage increases. For example, at the holding voltage V1 that is almost discharged, C1 has a relatively large capacitance value. When the switching element SW2 turns on, charge easily flows into the parasitic capacitance C SW1 , and a sharp potential fluctuation of the parasitic capacitance C SW1 is likely to occur. On the other hand, at the holding voltage V2 that is almost fully charged, C2 has a relatively small capacitance value. When the switching element SW2 turns on, it is difficult for charge to flow into the parasitic capacitance C SW1 , and a sharp potential fluctuation of the parasitic capacitance C SW1 is unlikely to occur. The same applies to the parasitic capacitance C SW2 of the switching element SW2. ​

[0023] Therefore, in the power conversion device 1, the switching element SW1 and the switching element SW2 are each configured to be pre-chargeable. The power conversion device 1 further includes a pre-charge circuit PC1 and a pre-charge circuit PC2.

[0024] The pre-charge circuit PC1 corresponds to the switching element SW1. At least one end of the pre-charge circuit PC1 is connected to one end of the switching element SW1. The other end of the pre-charge circuit PC1 may be connected to the other end of the switching element SW1. Thereby, the pre-charge circuit PC1 can pre-charge one end of the switching element SW1.

[0025] The pre-charge circuit PC1 can be configured as shown in FIG. 4. FIG. 4 is a diagram showing the configuration of the pre-charge circuit PC1.

[0026] The pre-charge circuit PC1 includes a voltage source E1, a switch SW11, and a rectifying element D1. One end of the voltage source E1 is connected to the switch SW11, and the other end is connected to the other end of the switching element SW1. One end of the voltage source E1 may be the high-voltage side terminal, and the other end may be the low-voltage side terminal. The voltage generated by the voltage source E1 can be determined experimentally in advance according to the amount of charge to be pre-charged at one end of the switching element SW1. One end of the switch SW11 is connected to the voltage source E1, the other end is connected to the rectifying element D1, and the control terminal is connected to the controller CTR (see FIG. 1). The switch SW11 is, for example, an NMOS transistor, the source is connected to the rectifying element D1, the drain is connected to the voltage source E1, and the gate is connected to the controller CTR. One end of the rectifying element D1 is connected to the switch SW11, and the other end is connected to one end of the switching element SW1. The rectifying element D1 is, for example, a diode, the anode is connected to the switch SW11, and the cathode is connected to one end of the switching element SW1.

[0027] The precharge circuit PC2 shown in FIG. 1 corresponds to the switching element SW2. At least one end of the precharge circuit PC2 is connected to one end of the switching element SW2. The other end of the precharge circuit PC2 may be connected to the other end of the switching element SW2. This allows the precharge circuit PC2 to precharge one end of the switching element SW2. The configuration of the precharge circuit PC2 is similar to the configuration of the precharge circuit PC1 (see FIG. 4).

[0028] For example, at the start of each of the dead times DT1 and DT3 shown in FIG. 2, the switching element SW2 is turned off while the switching element SW1 is off. After the switching element SW2 is turned off, the control signal φPC2 goes to an active level. In response to this, the precharge circuit PC2 starts supplying charge to one end of the switching element SW2, and starts precharging one end of the switching element SW2. That is, the parasitic capacitance C SW2 starts to be charged. In response to the lapse of the time PT1, PT3 from the start of the supply of charge, the control signal φPC2 becomes the non-active level. The time PT1, PT3 is shorter than the dead time DT1, DT3. The time PT1, PT3 is experimentally determined in advance as the time required for precharging. In response to this, the supply of charge to one end of the switching element SW2 ends, and the precharging of one end of the switching element SW2 ends. That is, the parasitic capacitance C SW2 charging is finished.

[0029] As a result, when the switching element SW1 is turned on at the end of the dead times DT1 and DT3, the parasitic capacitance C SW2 This reduces the amount of charge flowing into the parasitic capacitance C SW2 As a result, the potential fluctuation of the output node N OUT1 ,N OUT2 Current I OUT This makes it possible to suppress spike noise, thereby suppressing electromagnetic noise.

[0030] Similarly, at the start of each of the dead times DT2 and DT4, the switching element SW1 is turned off while the switching element SW2 is turned off. After the switching element SW1 is turned off, the control signal φPC1 goes to an active level. In response to this, the precharge circuit PC1 starts to supply charge to one end of the switching element SW1, and starts precharging one end of the switching element SW1. That is, the parasitic capacitance C SW1 starts to be charged. In response to the lapse of times PT2, PT4 from the start of the supply of charge, the control signal φPC1 becomes the non-active level. The times PT2, PT4 are shorter than the dead times DT1, DT3. The times PT2, PT4 are experimentally determined in advance as the time required for precharging. In response to this, the supply of charge to one end of the switching element SW1 ends, and the precharging of one end of the switching element SW1 ends. That is, the parasitic capacitance C SW1 charging is finished.

[0031] As a result, when the switching element SW2 is turned on at the end of the dead times DT2 and DT4, the parasitic capacitance C SW1 This reduces the amount of charge flowing into the parasitic capacitance C SW1 As a result, the potential fluctuation of the output node N OUT1 ,N OUT2 Current I OUT This makes it possible to suppress spike noise, thereby suppressing electromagnetic noise.

[0032] The power conversion device 1 may be configured to perform power factor correction. The power conversion device 1 may have an inductive element L1, a switching element SW3, and a switching element SW4 as components for power factor correction.

[0033] The switching element SW3 and the switching element SW4 are connected to the input node N IN2 and output node N OUT1 ,N OUT2 A node N between the switching element SW3 and the switching element SW4 is connected in a half bridge manner. M2is connected to the input node N via the inductor L1 IN2 is connected thereto.

[0034] One end of the switching element SW3 is connected to the output node N OUT1 and the other end is connected to the input node N via the node N M2 and the control terminal is connected to the controller CTR. The switching element SW3 is, for example, an NMOS transistor, and the source is connected to the input node N via the node N IN2 and the drain is connected to the output node N M2 and the gate is connected to the controller CTR via the node N IN2 and the drain is connected to the output node N OUT1 and the gate is connected to the controller CTR.

[0035] The switching element SW3 receives the control signal φSW3 from the controller CTR at the control terminal (e.g., the gate). The switching element SW3 turns on and off according to the control signal φSW3. The switching element SW3 turns on when the control signal φSW3 is at the active level (e.g., high level). The switching element SW3 turns off when the control signal φSW3 is at the non-active level (e.g., low level).

[0036] One end of the switching element SW4 is connected to the input node N via the node N M2 and the other end is connected to the output node N IN2 and the control terminal is connected to the controller CTR. The switching element SW4 is, for example, an NMOS transistor, and the source is connected to the output node N OUT2 and the drain is connected to the input node N via the node N OUT2 and the gate is connected to the controller CTR via the node N M2 and the gate is connected to the controller CTR via the node N IN2 and the gate is connected to the controller CTR.

[0037] The switching element SW4 receives a control signal φSW4 from the controller CTR at a control terminal (e.g., the gate). The switching element SW4 turns on and off according to the control signal φSW4. The switching element SW4 turns on when the control signal φSW4 is at an active level (e.g., a high level). The switching element SW4 turns off when the control signal φSW4 is at a non-active level (e.g., a low level).

[0038] The switching element SW3 and the switching element SW4 perform a power factor improvement operation under the control of the controller CTR. For example, the switching element SW3 and the switching element SW4 perform a switching operation at a period faster than that of the switching element SW1 and the switching element SW2, respectively, and alternately repeat the accumulation of electrical energy from the AC power supply PS to the inductor L1 and the accumulation of electrical energy from the inductor L1 to the capacitor C0. Thereby, the phase of the DC voltage and the phase of the DC current are brought closer to each other to improve the power factor.

[0039] AC voltage V IN During periods TP1 and TP3 when the amplitude of the AC voltage V is positive, the operations shown in Fig. 5(a) and the operations shown in Fig. 5(b) are alternately repeated. In Fig. 5(a), the switching elements SW1 and SW3 are maintained in the off state, and the switching elements SW2 and SW4 are maintained in the on state. Switching element SW2 → node N M1 → input node N IN1 → AC power supply PS → input node N IN2 → inductor L1 → node N M2 → switching element SW4 → switching element SW2, and current flows through this path, and electrical energy is accumulated in the inductor L1.

[0040] In Fig. 5(b), the switching elements SW1 and SW4 are maintained in the off state, and the switching elements SW2 and SW3 are maintained in the on state. Switching element SW2 → node N M1 → input node N IN1 → AC power supply PS → input node N IN2 → inductor L1 → node N M2→Switching element SW3 → Output node N OUT1 →Capacitor element C0 → Output node N OUT2 →Current flows through the path of switching element SW2, and electrical energy is transferred from inductor L1 to capacitor C0 and stored in capacitor C0.

[0041] During the subsequent dead times DT1 and DT3, the operations shown in Fig. 5(c) and the operations shown in Fig. 5(d) are sequentially performed. In Fig. 5(c), all of the switching elements SW1 to SW4 are maintained in the off state, and the amplitude of the alternating voltage V IN becomes near the zero-crossing point, and almost no current flows including the reflux current. At this time, as indicated by the dotted arrow, the precharge circuit PC2 supplies charge to one end of the switching element SW2 and precharges one end of the switching element SW2. As a result, the parasitic capacitance C SW2 of the switching element SW2 is charged with charge and the holding voltage increases. In Fig. 5(d), the precharge circuit PC2 terminates the supply of charge to one end of the switching element SW2 and terminates the precharge of one end of the switching element SW2. As a result, the parasitic capacitance C SW2 of the switching element SW2 holds the charge and maintains the holding voltage.

[0042] During the periods TP2 and TP4 when the amplitude of the alternating voltage V IN is negative, the operations shown in Fig. 6(a) and the operations shown in Fig. 6(b) are alternately repeated. In Fig. 6(a), the switching elements SW2 and SW4 are maintained in the off state, and the switching elements SW1 and SW3 are maintained in the on state. Switching element SW1 → Switching element SW3 → Node N M2 → Inductor L1 → Input node N IN2 → AC power supply PS → Input node N IN1 → Node N M1 → Current flows through the path of the switching element SW1, and electrical energy is stored in the inductor L1.

[0043] In Fig. 6(b), the switching elements SW2 and SW3 are maintained in the off state, and the switching elements SW1 and SW4 are maintained in the on state. Current flows through the path of the switching element SW1 → output node N OUT1 → capacitor C0 → output node N OUT2 → switching element SW4 → node N M2 → inductive element L1 → input node N IN2 → AC power supply PS → input node N IN1 → node N M1 → switching element SW1, and electrical energy is transferred from the inductive element L1 to the capacitor C0 and stored in the capacitor C0.

[0044] In the subsequent dead times DT2 and DT4, the operations shown in Fig. 6(c) and the operation shown in Fig. 6(d) are sequentially performed. In Fig. 6(c), all of the switching elements SW1 to SW4 are maintained in the off state, and the amplitude of the AC voltage V IN becomes near the zero-crossing point, and almost no current flows including the reflux current. At this time, the precharge circuit PC1 supplies charge to one end of the switching element SW1 as indicated by the dotted arrow and precharges one end of the switching element SW1. As a result, the parasitic capacitance C SW1 of the switching element SW1 is charged with charge, and the holding voltage increases. In Fig. 6(d), the precharge circuit PC1 terminates the supply of charge to one end of the switching element SW1 and finishes the precharge of one end of the switching element SW1. As a result, the parasitic capacitance C SW1 of the switching element SW1 holds the charge and maintains the holding voltage.

[0045] Next, the detailed operation of the power conversion device will be described with reference to Fig. 7. Fig. 7 is a waveform diagram showing the operation of the power conversion device 1 and mainly exemplifies the operation in the dead time DT2. In Fig. 7, the capacitance value of the parasitic capacitance C SW1 of the switching element SW1, the voltage across the switching element SW1, the precharge current supplied from the precharge circuit PC1, the parasitic capacitance C SW1The currents flowing in, the reflux current flowing through the parasitic diode of the switching element SW1, the current flowing through both ends of the switching element SW1, the current flowing through both ends of the switching element SW2, the control signal φSW1 from the controller CTR to the switching element SW1, and the control signal φSW2 from the controller CTR to the switching element SW2 are each shown with temporal changes.

[0046] Immediately before the timing t1, the control signal φSW2 is maintained at the non-active level, and the switching element SW2 is maintained in the off state.

[0047] At the timing t1, the control signal φSW1 transitions from the active level to the non-active level, and the switching element SW1 turns off. Accordingly, the dead time DT2 starts. Thereafter, the switching element SW1 is maintained in the off state.

[0048] At the timing t2, a control signal φPC1 (not shown) transitions from the non-active level to the active level, and the precharge circuit PC1 starts to supply a precharge current. At this time, since the amplitude of the AC voltage V IN is near the almost zero-crossing point (see Figure 2), almost no reflux current flows, and a current corresponding to the precharge current efficiently flows from the precharge circuit PC1 to the parasitic capacitance C of the switching element SW1 SW1 . Accordingly, the parasitic capacitance C SW1 starts to be charged, and as its holding voltage starts to increase, its capacitance value starts to decrease.

[0049] At the timing t3, when the parasitic capacitance C SW1 becomes almost fully charged, its holding voltage starts to maintain a substantially constant value, and its capacitance value starts to maintain a substantially constant value.

[0050] When it reaches the timing t4 after the time PT2 has elapsed from the timing t2, a control signal φPC1 (not shown) transitions from the active level to the non-active level, and the precharge circuit PC1 finishes supplying the precharge current. At this time, the parasitic capacitance CSW1 is in a substantially fully charged state, its holding voltage maintains a substantially constant value, and its capacitance value maintains a substantially constant value.

[0051] At timing t5, the control signal φSW2 transitions from the non-active level to the active level, and the switching element SW2 turns on. At this time, due to the parasitic capacitance C of the switching element SW1 SW1 being in a substantially fully charged state, the amount of charge flowing into the parasitic capacitance C of the switching element SW1 SW1 can be suppressed, and the potential fluctuation of the parasitic capacitance C SW1 can be suppressed. As a result, the spike noise of the current I OUT1 , N OUT2 flowing into the output nodes N OUT can be suppressed, thereby suppressing electromagnetic noise.

[0052] For comparison, the case where no pre-charge is performed on the parasitic capacitance C of the switching element SW1 is shown by a dotted line. For example, when comparing the waveform of the current flowing into the parasitic capacitance C of the switching element SW1 with the waveform of the solid line and the waveform of the dotted line, it is confirmed that the amount of charge flowing into the parasitic capacitance C SW1 can be suppressed by performing pre-charge. SW1 to the parasitic capacitance C SW1 can be suppressed.

[0053] As described above, in the embodiment, in the power conversion device 1, for example, when both the switching element SW1 and the switching element SW2 are off, the pre-charge circuit PC1 pre-charges one end of the switching element SW1, and after the completion of the pre-charge by the pre-charge circuit PC1, the switching element SW2 is turned on. Thereby, the amount of charge flowing into the parasitic capacitance C SW1 of the switching element SW1 can be suppressed, and the potential fluctuation of the parasitic capacitance C SW1 can be suppressed. As a result, the spike noise of the current I OUT1 , N OUT2 flowing into the output nodes N OUT can be suppressed, thereby suppressing electromagnetic noise.

[0054] Although some embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalent scope thereof.

Explanation of Reference Numerals

[0055] 1 Power conversion device, PC1, PC2 Precharge circuit, SW1~SW4 Switching element.

Claims

1. In a power conversion device that converts an AC voltage into a DC voltage by having a first switching element and a second switching element, which are half-bridge connected between an input node and an output node, perform a synchronous rectification operation, while both the first switching element and the second switching element are in an off state, charging one end of the first switching element; after completion of charging one end of the first switching element, turning on the second switching element; A control method including the above.

2. In a second state where both the first switching element and the second switching element are off, charging one end of the second switching element; after completion of charging one end of the second switching element, turning on the first switching element; Further including the above The control method according to Claim 1.

3. Charging one end of the first switching element includes: turning off the first switching element while the second switching element is off; after the first switching element is turned off, starting to supply charge to one end of the first switching element; ending the supply of charge to one end of the first switching element in response to the elapse of a first time from the start of charge supply; Including the above The control method according to Claim 1.

4. Charging one end of the first switching element includes: turning off the first switching element while the second switching element is off; after the first switching element is turned off, starting to supply charge to one end of the first switching element; ending the supply of charge to one end of the first switching element in response to the elapse of a first time from the start of charge supply; Including the above, Charging one end of the second switching element includes: turning off the second switching element while the first switching element is off; after the second switching element is turned off, starting to supply charge to one end of the second switching element; ending the supply of charge to one end of the second switching element in response to the elapse of a second time from the start of charge supply; Including the above The control method according to Claim 2.

5. The power conversion device is In parallel with the synchronous rectification operation, a third switching element and a fourth switching element, which are connected in parallel with the first switching element and the second switching element between the input node and the output node, perform a power factor improvement operation. The control method according to claim 1.

6. A first switching element connected between a first input node and a first output node to which an AC voltage is input, A second switching element connected between the first input node and a second output node and performing a synchronous rectification operation together with the first switching element, A first precharge circuit capable of precharging one end of the first switching element, A second precharge circuit capable of precharging one end of the second switching element, Comprising, With the first switching element and the second switching element both off, the first precharge circuit precharges one end of the first switching element, and after completion of the precharging by the first precharge circuit, turns on the second switching element Power conversion device.

7. The power conversion device, In a second state where both the first switching element and the second switching element are off, precharges one end of the second switching element, After completion of the precharging of one end of the second switching element, turns on the first switching element The power conversion device according to claim 6.

8. The power conversion device, At a first timing, with the second switching element off, the first switching element is off, and at a second timing after the first timing, starts supplying charge to one end of the first switching element, and according to a third timing when a first time has elapsed from the second timing, ends the supply of charge to one end of the first switching element The power conversion device according to claim 6.

9. The power conversion device, At a first timing, with the second switching element off, the first switching element is off, and at a second timing after the first timing, starts supplying charge to one end of the first switching element, and according to a third timing when a first time has elapsed from the second timing, ends the supply of charge to one end of the first switching element, At the fourth timing, the second switching element is turned off while the first switching element is turned off. At a fifth timing after the fourth timing, the supply of charge to one end of the second switching element is started, and in response to a sixth timing at which a second time has elapsed from the fifth timing, the supply of charge to one end of the second switching element is terminated. The power conversion device according to claim 7.

10. A third switching element connected between a second input node to which an AC voltage is input and the first output node; A fourth switching element connected between the second input node and the second output node and performing a power factor improvement operation together with the third switching element; further comprising: performing the power factor improvement operation in parallel with the synchronous rectification operation The power conversion device according to claim 6.

Citation Information

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