Systems and methods for configuring display device and display system

Abstract

To provide displays of varying sizes.SOLUTION: Tiled or Tile-able displays and methods, in accordance with the present invention, provide displays of varying sizes, and as such, a Tiled or Tile-able display is configured to accommodate the display size needed for various wearable and mobile devices that require or incorporate displays. Displays, systems, and methods may be utilized in applications including, but not limited to, projectors, head-up displays, and augmented reality (AR), mixed reality (MR), and virtual reality (VR) systems or devices, such as headsets or other near-eye devices or systems.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] This application claims the benefit of U.S. Patent Application No. 63 / 229,642, filed on August 5, 2021, the content of which is incorporated herein by reference.

[0002] The present disclosure relates to displays, for example, light-emitting diode (LED) displays (LED displays, organic electroluminescence (OLED) displays, etc.), and microdisplays thereof or micro versions thereof (such as micro-LED and micro-organic EL displays). In particular, the present disclosure relates to configurable LED displays.

Background Art

[0003] Generally, medium-sized displays for portable or wearable or mobile or handheld devices (i.e., devices that are not microdisplays and not monitors, TVs, etc.) for direct-viewing applications are often made of transmissive liquid crystal displays (LCDs) with TFT backplanes or organic EL technology. Organic EL displays have the disadvantages of short lifespan and limited brightness, while LCD displays require a backlight, so power is consumed for each pixel regardless of its on / off state. Although TFTs are inexpensive, they have excessive resistance (wasting power) and are too large to create advanced circuit elements under each pixel. Therefore, TFTs are limited to a driving scheme that drives each row of the display in sequence by making the duty cycle of each pixel very short, and a high current density is required to obtain appropriate brightness with TFTs. In contrast, micro-LED displays have a long lifespan, but when a micro-LED array is coupled to a silicon backplane to form a micro-LED display, a display with random defects is often manufactured.

[0004] For applications where the physical size is large (i.e., not for microdisplays, but for direct-view displays such as, for example, VR headsets, wearable devices such as watches, smartphones, or monitors / TVs), when constructing a micro-LED display having a silicon backplane, in order to construct those of various shapes and sizes, usually, it is necessary to redesign the display and the manufacturing process for each new application. As the size of the display increases, the yield continues to decrease, so depending on the application, the cost becomes extremely high or at least uncompetitive.

Summary of the Invention

Problems to be Solved by the Invention

[0005] The displays in the embodiments of the present disclosure can be used in applications including, but not limited to, projectors, head-up displays, and systems / devices for augmented reality (AR), mixed reality (MR), and virtual reality (VR) such as headsets and other near-eye devices / systems. The tile-type or tilable displays and methods in the embodiments of the present disclosure provide displays of various sizes. Therefore, the tile-type or tilable displays are configured to adapt to the display sizes required by various wearable devices and mobile devices that require or incorporate a display.

Brief Description of the Drawings

[0006]

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DETAILED DESCRIPTION OF THE INVENTION

[0007] Detailed embodiments are disclosed herein as needed. It should be understood that the disclosed embodiments are merely illustrative of various and alternative forms. The term "exemplary" as used herein is used broadly to refer to embodiments that serve as illustrations, specimens, models, or patterns. The drawings are not necessarily to scale, and some features may be exaggerated or minimized to show details of particular elements. In other cases, well-known elements, systems, materials, and methods known to those skilled in the art are not described in detail to avoid obscuring the present disclosure. Accordingly, the specific configurations and functional details disclosed herein should not be construed as limitations, but rather as a representative basis for the claims and for teaching those skilled in the art.

[0008] In the present disclosure, a display composed of each "tile" manufactured and tested individually and independently of each other is used (each tile is smaller and tested in the manufacturing process, and can be repaired before the manufacturing process is completed, thus improving the yield and eliminating the yield limit). Furthermore, manufacturers of various wearable devices and mobile devices are differentiating themselves with industrial designs that offer a wide range of display sizes and shapes. For this reason, a new design is required for each customer. However, by using the tile-type or tileable display and method in the embodiments of the present disclosure, it becomes possible to design or configure a new display by arranging tiles on a printed circuit board (PCB) (compared to creating new silicon dies and micro-LED arrays, rapid design and manufacturing are possible).

[0009] FIG. 1 shows a pseudo-circular array of tiles for a display. In an embodiment of the present disclosure, the tile or the array of tiles for the display is substantially circular and can be used as a display device (such as an LED display device or an LED panel) for a circular device. In an embodiment of the present disclosure, any number of tiles can be arranged in any shape. In an embodiment of the present disclosure, the light-emitting device (such as a tile) has a light-emitting die (such as an LED die) and an operating die (such as a backplane die).

[0010] In an embodiment of the present disclosure, the light-emitting die (such as an LED die) has a light-emitting element coupled or integrated to a light-emitting substrate (such as a GaN substrate). In an embodiment of the present disclosure, a plurality of light-emitting elements, for example, an array of light-emitting elements (such as LEDs of any type or size), are formed on the light-emitting substrate. The plurality of light-emitting elements (such as LEDs) or the light-emitting array (such as an array of light-emitting elements) and the light-emitting substrate (such as an LED substrate) form the light-emitting die (such as an LED die) by being integrated with each other, coupled to each other, or both.

[0011] In certain embodiments of the present disclosure, pixels are formed by coupling (e.g., electrically coupling) each light-emitting element of a light-emitting die to a circuit element (having at least pixel circuit elements), and this circuit element is one that is in charge of control or utilized for operation (e.g., including driving each of one or more light-emitting elements). In certain embodiments of the present disclosure, the pixel circuit elements include at least driving circuit elements. In certain embodiments of the present disclosure, the driving circuit elements have at least a pixel logic circuit element that determines the on / off state of a pixel as a function of time and an input / output circuit element that supplies current to an LED. In certain embodiments of the present disclosure, a set of pixel circuit elements is provided for each light-emitting element (such as an LED).

[0012] In certain embodiments of the present disclosure, each light-emitting die (such as an LED die) is coupled (such as electrically coupled) to an operation die (such as a backplane die). The operation die (such as a backplane die) includes a backplane substrate and pixel circuit elements or pixel-related circuit elements or both of them.

[0013] In certain embodiments of the present disclosure, this die is formed from silicon and is called a silicon operation die (such as a backplane die). In certain embodiments of the present disclosure, the operation die (such as a backplane die) has circuit elements (such as pixel circuit elements), and these circuit elements are arranged, coupled, integrated, formed, deposited, or embedded in the backplane substrate.

[0014] In certain embodiments of the present disclosure, the circuit elements (such as pixel circuit elements) or the driving circuit elements are separated into at least a pixel logic circuit element and an input / output circuit element. In certain embodiments of the present disclosure, the pixel logic circuit element operates or is arranged in one or more regions of the backplane substrate, and these one or more regions are different from the one or more regions of the backplane substrate where the input / output circuit element operates or is arranged.

[0015] In certain embodiments of the present disclosure, the pixel logic circuit elements operate or are disposed in one or more strips or strip-shaped regions of the backplane substrate, and these one or more regions are different from the one or more strips or strip-shaped regions of the backplane substrate where the input / output circuit elements operate or are disposed.

[0016] In certain embodiments of the present disclosure, each light-emitting element is respectively associated with a pixel circuit element (i.e., associated with a driving circuit or driving circuit element that drives the light-emitting element (e.g., determines a gray-level output for the light-emitting element)). In certain embodiments of the present disclosure, each light-emitting element is respectively associated with the pixel circuit element it has (i.e., associated with a driving circuit or driving circuit element that drives the light-emitting element (e.g., determines a gray-level output for the light-emitting element)). In certain embodiments of the present disclosure, each light-emitting element is respectively associated with a pixel logic circuit element or a pixel logic circuit and an input / output circuit element or an input / output circuit. In certain embodiments of the present disclosure, a combination of each light-emitting element (such as an LED) and its circuit element forms a pixel of the tile, and the circuit element of each light-emitting element (such as an LED) includes but is not limited to a driving circuit element. In certain embodiments of the present disclosure, since the LED and the pixel circuit element are on different wafers before bonding, there is an electrical contact element between the LED and the pixel circuit element. In certain embodiments of the present disclosure, the electrical contact element exists on the wafer where each LED is disposed, or on the wafer where the pixel circuit element is disposed.

[0017] In certain embodiments of the present disclosure, a combination of each light-emitting element (such as an LED) and its circuit element forms a pixel of the tile. For example, a combination of each light-emitting element (such as an LED) and its circuit element (such as the pixel logic circuit element of the light-emitting element and the input / output circuit element of the light-emitting element, etc.) forms a pixel of the tile.

[0018] In certain embodiments of the present disclosure, the light-emitting element is a master light-emitting element. In certain embodiments of the present disclosure, the master light-emitting element has two or more light-emitting elements (such as LEDs). In certain embodiments of the present disclosure, the master light-emitting element has at least three light-emitting elements, for example, having one set of three light-emitting elements (such as LEDs).

[0019] In certain embodiments of the present disclosure, pixels are formed by coupling (for example, electrically coupling) light-emitting elements (such as LEDs) to circuit elements (such as pixel circuit elements), and these circuit elements drive each of the light-emitting elements (such as LEDs). In certain embodiments of the present disclosure, master pixels are formed by coupling (for example, electrically coupling) a master light-emitting element (a collection or set of multiple, for example, three LEDs, etc.) to a circuit element (such as a pixel circuit element), and these circuit elements drive each of the light-emitting elements (such as LEDs) of the master light-emitting element. In certain embodiments of the present disclosure, each light-emitting element (such as an LED) is a collection of the three primary colors. When the LEDs are grouped as a collection, although there is a gap between them, a seamless abutment is perceptually realized. In certain embodiments of the present disclosure, one tile has two or more master pixels, for example, having an array of multiple master pixels. In certain embodiments of the present disclosure, the pixel circuit element has at least a driving circuit element. In certain embodiments of the present disclosure, the driving circuit element has at least a pixel logic circuit element and an input / output circuit element.

[0020] In certain embodiments of the present disclosure, each tile may be arranged, for example, on a printed circuit board, in any pattern, for example. In certain embodiments of the present disclosure, a display may be formed by arranging each tile, for example, on a printed circuit board, in any pattern, for example. To illustrate the use of each tile in embodiments of the present disclosure, a pseudo-circular array of tiles is shown in FIG. 1. For example, as shown in FIG. 1, a pseudo-circular array of each display tile is arranged on a printed circuit board (PCB) (not shown) and is used for the dial display of watches. In the illustrated example, for example, according to an embodiment of the present disclosure, 88 tiles of 3.6 mm × 3.6 mm each including 60 × 60 pixels per tile are arranged to form a watch dial having a diameter of 36 mm. However, those skilled in the art will understand that the number of tiles, the number of pixels per tile or the number of master pixels or both, the shape of the tiles or the shape of the tile array or both may be different. In certain embodiments of the present disclosure, the pattern or arrangement of the tiles on the printed circuit board may be different.

[0021] In certain embodiments of the present disclosure, as shown in FIG. 2, adjacent tiles are arranged on a printed circuit board with a space, gap, or joint therebetween. As shown in FIG. 2, in certain embodiments of the present disclosure, there is a space, gap, or joint between the sides or edges of two adjacent tiles (each tile may have one or more master pixels, or one or more aggregates consisting of three light-emitting elements (such as each LED and the pixel circuit elements associated therewith)). It will be understood by those skilled in the art that when referring to LEDs, it includes all kinds of LEDs (such as LEDs, organic ELs, micro LEDs, or micro organic ELs, etc.). As shown in FIG. 2, in certain embodiments of the present disclosure, there is a space, gap, or joint between adjacent tiles. It will be understood by those skilled in the art that the number and color of LEDs in a master light-emitting element or master pixel (such as a set of LEDs or a set of circuit elements electrically coupled to each LED or both) may be different.

[0022] In certain embodiments of the present disclosure, the pitch (i.e., the center-to-center distance between each light-emitting element in an aggregate of light-emitting elements (such as LEDs), each master pixel, or each master light-emitting element, etc.) needs to be such that the space between each light-emitting element in an aggregate of light-emitting elements (such as LEDs), each master pixel, each master light-emitting element, or each pixel, etc., allows a space, gap, or joint that does not interfere with the pixel pitch (the pixel pitch is, that is, the distance between the center of one light-emitting element, which is a master pixel or a master light-emitting element, etc., and the center of another light-emitting element, which is a master pixel or a master light-emitting element, etc.). At the same time, it is necessary to allow a space, gap, or joint that maintains the same or substantially / almost the same pixel pitch for all or at least some of each light-emitting element of adjacent (each master light-emitting element or each master pixel, etc.). In certain embodiments of the present disclosure, when the tile is a single-color tile, the master pixel and the pixel are the same.

[0023] Figure 3 shows the difference between a conventional backplane die and a tile-type or tileable active die (such as a backplane die). For example, in an embodiment of the present disclosure, an active die (such as a backplane die such as a silicon backplane die) has a form in which the pitch between each master light-emitting element or each master pixel is the same, so that the tiles appear to abut seamlessly. The planar layout of a conventional die has or is provided with an I / O and a logic circuit element region (whereby an I / O buffer is provided in the input region, and these buffers are used for conversion between an externally used logic level and an internal logic level. The logic region has a register, a state machine, and a pixel drive circuit element, and is used to receive image data from the outside and distribute it to the pixels in the active region).

[0024] In the conventional die arrangement, the input area and the logic area are arranged or positioned around the active area of the display (i.e., the area including the pixels that generate an image or the like). In certain embodiments of the active die, the active die (such as a tilable backplane die or a backplane die such as a silicon backplane die) in the embodiments of the present disclosure has a strip in which pixel logic circuit elements and I / O circuit elements are alternately arranged. In certain embodiments of the present disclosure, the I / O circuit elements have I / O buffers, and these buffers are used for conversion between the logic levels used externally and the internal logic levels. In certain embodiments of the present disclosure, the logic area has registers, state machines, and pixel drive circuit elements, and is used to receive image data from the outside and distribute it to the pixels in the active area. The wiring is arranged in a matrix so that the connection to the LED pixels in the array is maintained. In certain embodiments of the present disclosure, each light-emitting element, for example, an LED, is arranged on the pixel logic circuit element or strip, on the I / O circuit element or strip, or on both the pixel logic circuit element or strip and the I / O circuit element or strip. In certain embodiments of the present disclosure, the circuit element strip is embedded in the active die backplane substrate.

[0025] Conventional backplanes typically include peripheral bonding pads on a silicon die or bump / pillar connections on a silicon die to connect I / O buffers to a circuit element substrate or package. According to embodiments of the present disclosure, a tile-type or tileable backplane has through-silicon vias (TSVs), and in this regard, the tile-type or tileable backplane is different from conventional backplanes. Through-silicon vias are used to connect or electrically couple one side or the front surface of an operating die (such as a backplane die like a silicon backplane die) to the second surface or the back surface of the same operating die or to circuit elements of a printed circuit board or both. The operating die is disposed with a light-emitting die (including an aggregate of LEDs connected or electrically coupled to pixel circuit elements to form a master pixel, a light-emitting element (such as an LED), or a master light-emitting element).

[0026] FIG. 4 shows a cross-sectional view of a tile on a printed circuit board. In certain embodiments of the present disclosure, the tile comprises an operating die (such as a backplane die or wafer like a silicon backplane) coupled (e.g., bonded and / or electrically coupled) to a light-emitting die (such as an LED wafer or die) using known bonding and connection methods in the prior art.

[0027] In certain embodiments of the light-emitting die, according to embodiments of the present disclosure, each LED is formed, integrated, or manufactured on a substrate such as a GaN substrate. However, it will be understood by those skilled in the art that the substrate material may be different, for example, the substrate may be composed of any semiconductor material capable of forming a light-emitting structure. In certain embodiments of the present disclosure, metal contacts for electrically coupling a light-emitting die (such as an LED die) to an operating die (such as a backplane die like a silicon die or a silicon operating die) are coupled or integrated with the light-emitting die.

[0028] According to embodiments of the present disclosure, a light-emitting device (such as a tile) has vias (such as substrate-through vias or silicon-through vias). These vias are used to form connections, power supplies, and interfaces between a first surface or back surface and a second surface or front surface of an operating die (such as a silicon die). Further, the formation of such connections, etc. is made to supply power to tile circuit elements (I / O logic circuit elements, I / O logic strips, pixel circuit element logic circuit elements, pixel circuit element logic strips), or conductive circuit element portions (such as copper deposition or other conductive elements), or both. This conductive circuit element portion is deposited on, bonded to, or integrated with a printed circuit board. In certain embodiments of the present disclosure, vias (such as substrate-through vias or silicon-through vias (TSVs)) receive data voltage inputs at I / O buffers and are used to connect devices or components or sources or combinations thereof for power and ground to a light-emitting die (such as an LED die) or an operating die (such as a backplane die) or both.

[0029] In certain embodiments of the present disclosure, each opening of a substrate-through via, for example, the opening of a silicon-through via (TSV), opens to the back surface of an operating die (such as a silicon die), and solder or other conductive material for soldering to the underlying printed circuit board or to circuit elements of the underlying printed circuit board is applied to these openings.

[0030] In certain embodiments of the present disclosure, tile circuit elements (such as I / O logic circuits or I / O circuit element strips and pixel circuit element logic strips or drive circuit element logic strips, etc.) are deposited, formed, embedded, or integrated on an operating die (such as a backplane substrate, a silicon operating die, or a backplane die or a silicon die, etc.). In certain embodiments of the present disclosure, a light-emitting die (such as an LED die, etc.) is composed of at least one of being at least electrically connected, coupled, or joined to the operating die, and the silicon die is composed of at least one of being connected, coupled, or electrically coupled, connected, or joined to a PC. In certain embodiments of the present disclosure, connections between tiles or connections within a tile array are configured via a printed circuit board (i.e., a board that houses each tile or on which each tile is arranged, coupled, joined, or positioned).

[0031] In certain embodiments of the present disclosure, circuit elements or one or more conductive elements are deposited, fabricated, or integrated on a printed circuit board (such as one or more surfaces of the printed circuit board). Also, the circuit elements or one or more conductive elements are used, for example, (1) to electrically connect a light-emitting die (such as an LED die, etc.) or an operating die (such as a backplane die, etc.) or both to a power source, power, data source, voltage source, current source, or a combination thereof, or (2) to receive data, voltage, or other inputs, or both. In certain embodiments of the present disclosure, circuit elements, conductive elements, or deposits on the printed circuit board are composed of a copper material and are also referred to as copper traces or copper wirings. However, it is understandable to those skilled in the art that the conductive material may be composed of a conductive material other than copper. The printed circuit board also functions as a structure that provides support, rigidity, or a rigid surface to the tile array. In certain embodiments of the present disclosure, the printed circuit board may include one layer or two or more layers of circuit elements (such as any tile-related circuit elements, etc.).

[0032] FIG. 5 shows the back side of the tile. In certain embodiments of the present disclosure, as shown in FIG. 5, the tile back surface or bottom surface has an array of silicon through via openings, which are utilized, for example, to receive input data, voltage, output data, voltage, or signals. In certain embodiments of the present disclosure, the silicon through via openings may be used to electrically connect a light emitting die (such as an LED die) to a circuit element of a printed circuit board (for example, for this circuit element, (1) a circuit element for electrically connecting an LED die to a power source or power or data source or voltage source or current source or a combination thereof, or (2) a circuit element for receiving data, voltage, other inputs, or both of these may be mentioned). In certain embodiments of the present disclosure, the silicon through vias may be used to output data from the tile.

[0033] As shown in FIG. 5, for example, each via exists in an active die (such as a silicon die), and these vias are used to establish a power connection between a printed circuit board (which may be connected to a voltage source or other power source) and a light-emitting die (such as an LED die). Further, FIG. 5 shows an embodiment of the present disclosure, which is an example of an exemplary I-layer wiring pattern of a printed circuit board, and has, for example, wiring or conductive elements deposited on or embedded in the printed circuit board. In certain embodiments of the present disclosure, the silicon through-via labeled D1 is utilized to connect the serial data input from the controller to the tile (this controller is shown in FIG. 6 and is also referred to as a tile array controller, an array controller, a master controller, etc.). In certain embodiments of the present disclosure, the controller shown in FIG. 6 is external to the tile or the tile array or both. In certain embodiments of the present disclosure, the controller (such as a tile array controller or a master controller) is disposed or connected to a substrate such as a printed circuit board, and this substrate is where the tile is connected or disposed. In certain embodiments of the present disclosure, this controller controls the operation of each tile that is a tile within the tile array, or controls the operation of the tile array as one unit, or both. In certain embodiments of the present disclosure, the controller (such as a tile array controller or a master controller) distributes data to the tiles and controls the tiles when displaying new data. In certain embodiments of the present disclosure, the arrows between the controller in FIG. 6 and the arrows between the tiles in FIG. 6 represent the clock-tapped transmission lines (i.e., conductive elements (such as wire elements like copper wire elements)) of the serial data and clock shown in FIG. 5 with respect to the printed circuit board.

[0034] The silicon through vias labeled CK connect the clock voltage output from the controller to each tile to sample serial data and are used to provide a clock to the logic circuit elements of the tile. As will be described with reference to FIG. 6, the tile receives serial data (DI) and a clock output (CK) from the controller.

[0035] In certain embodiments of the present disclosure, at least one via is used to connect or supply power to a tile or a light emitting die (such as an LED die) or both. At this time, for example, power is connected or supplied via a power rail coupled or electrically connected to an operating die (such as a backplane die or a silicon operating die). This power rail is, for example, a conductive element, a grounding element or a grounding component, a wire, or other components, or a combination thereof, which are either coupled to, deposited on, embedded in, integrated with, or a combination of a printed circuit board. As a result, according to the embodiments of the present disclosure, power is supplied to the light emitting device (such as a tile or a light emitting die (such as an LED die)).

[0036] In certain embodiments of the present disclosure, the light emitting die (such as an LED die) is coupled to an operating die (such as a silicon operating die or a backplane die). In certain embodiments of the present disclosure, silicon through vias (such as four TSVs) are used to connect the printed circuit board to the power rails (i.e., VDD) of the light emitting die (such as an LED die) or the tile or both, providing sufficient current capacity and low resistance. It will be understood by those skilled in the art that the number of vias used to connect the components of the operating die (such as a backplane die) may vary for a power source, or other components of the display system, or a printed circuit board, or other components of the printed circuit board (or components electrically connected to the printed circuit board), or a combination thereof.

[0037] In certain embodiments of the present disclosure, a controller (such as a tile array controller, an array controller, a master controller, a master controller chip, etc.) is used to broadcast or transmit data to all tiles, or to broadcast or transmit data to all tiles or at least a part of each tile. Each tile (or at least some of each tile) recognizes which part of the data it should hold based on its (i.e., the tile's) address, or for example, based on how the address pins of the tile are connected. In certain embodiments of the present disclosure, the controller (such as an array controller) transmits data to the first tile, and then the data is streamed or transmitted to the next tile in the tile array. In certain embodiments of the present disclosure, as shown in FIG. 6, each tile identifies and extracts the data addressed to the tile according to the information in the header associated with the data transmitted from the controller (such as an array controller, a master controller, a master controller chip, etc.). In certain embodiments of the present disclosure, each tile may receive data (such as data represented by a voltage waveform or a pulse) according to the address of the tile identified in the address bits of the data received in the array from the controller (such as an array controller, a master controller or a master controller chip, etc.). For example, in certain embodiments of the present disclosure, each of the silicon vias labeled A0 to A5 identifies a position within the LED array or the master pixel array, and is electrically connected to a pixel or a master pixel or an LED within the LED array or the master light-emitting element array or the master pixel array.

[0038] In certain embodiments of the present disclosure, as shown in FIG. 6, each tile is incorporated within a tile array and is electrically interconnected (e.g., by wire) via a serial bus composed of, for example, a data signal and optionally a clock signal. In certain embodiments of the present disclosure, as shown in FIG. 6, a controller (such as an array controller, a master controller, or a master controller chip, etc.) converts an input image or video data in a certain format, for example, a standard format (such as MIPI DSI), into a custom serial format that the tiles can process.

[0039] The first side or the left side of FIG. 6 shows the tile array, and the second side or the right side of the tile (the side pointed by the arrow) shows that the array is composed of a plurality of tiles. These plurality of tiles are connected in series and are controlled by a controller (such as an array controller, a master controller, or a master controller chip, etc.). This controller is coupled to at least one of each tile of a series of tiles or each tile of a plurality of tiles.

[0040] In certain embodiments of the present disclosure, the custom format is determined according to an embodiment capable of distributing data to all tiles and enabling each tile to easily obtain the corresponding part of the data itself. In certain embodiments of the present disclosure, as described with reference to FIG. 5, each tile has a predetermined position within the array and stores or displays or both the data identified for that tile. At this time, the tile recognizes or knows its own address and knows how the data on the serial data input is arranged when moving along a bus associated with its own address or associated with its geographical location or a part of the array (i.e., the whole array or at least a part of the array) within the array. In certain embodiments of the present disclosure, the tile ignores the data on the serial bus that is not associated with the address of that tile.

[0041] In certain embodiments of the present disclosure, a tapped transmission line having terminations at its ends has a plurality of transmission line segments, and each transmission line segment (i.e., the transmission line segment between two tiles connected in series) is adjusted by adjusting its width according to an embodiment of a transmission line matching method (this transmission line matching method is a method for providing a transmission path without obstacles such as reflection, and is a method for matching the impedance between each tile to which the transmission line is electrically connected and at least one of other components (such as electrical components) and the transmission line, and when combined with the input capacitance of the data input or data input pin connection of each tile, a controlled transmission line impedance is provided).

[0042] In certain embodiments of the present disclosure, for example, while new data is arriving at a tile from a source of image or video data, the data of the previous image or video frame is being displayed, and the new data or the data of the next frame can be transmitted over the entire period of a video frame (i.e., the frame being displayed), thereby reducing the required data rate. For example, as shown in FIG. 1, an array (such as an array of master pixels or master light-emitting elements) in an embodiment of the present disclosure provides 220,000 pixels each having 660,000 sub-light-emitting elements (such as sub-pixels such as red, green, and blue LEDs), each of which requires 8-bit data, and defines their luminance. In certain embodiments of the present disclosure, the serial data rate required to correspond to the embodiment shown in FIG. 1 is 158.4 Mb / s at a refresh rate of 60 Hz.

[0043] FIG. 7 shows an embodiment of a backplane circuit element in an embodiment of the present disclosure, and shows, by way of example, an operational die (such as a silicon die or a tile backplane, etc.) circuit element. In certain embodiments of the present disclosure, (1) the operational die (such as a backplane or backplane die, etc.) circuit element of the tile has or is connected to a receiver for DIN (i.e., data input / signal) and CLK input / signal (such as serial data and clock voltage input), a logic circuit element, an algorithm or a software algorithm, or a module, and the serial data received by the receiving logic circuit or circuit element or block is decoded; (2) the operational die (such as a backplane or backplane die, etc.) circuit element of the tile determines when to load such serial data into an array of pixel circuit elements and when to update the pixels that display the loaded data. In certain embodiments of the present disclosure, each pixel circuit (as shown in FIG. 7) is included in the operational die (such as a backplane, backplane die or silicon die, etc.) circuit element, and each pixel circuit includes both a receiving storage device and an active storage device (such as a memory device). It will be understood by those skilled in the art that each pixel circuit can use any modulation method to drive the pixel circuit. The pixel structure in the embodiments of the present disclosure will be further described in FIG. 8.

[0044] The logic circuit element or the tile controller device or both of the tile controller extracts data from a serial data stream addressed to the tile (for example, represented by a voltage waveform) transmitted via a serial bus, places the data on a DATA bus for a column of the pixel array to which the data is to be written, and then loads the data into the master pixel using a ROW-WRITE strobe.

[0045] The tile controller, as will be described in detail in FIG. 8, also generates a LOAD output control voltage for all master pixels or master light-emitting elements within a tile (or at least a subset of the tiles), and outputs a time-varying value (TVV: Time Varying Value) to the TVV bus. This LOAD output control voltage controls the transfer data from the receiving memory to the active memory.

[0046] The logic / circuit elements / software / devices for tile control further include a time-varying value (TVV) generator, which creates a changing digital pattern for use in pixels. In certain embodiments of the present disclosure, the circuit / software / device for bias control includes a luminance control register that supplies a digital value to a DAC, and a current DAC that converts the register value into a current. Next, the current is converted into a voltage, which is a voltage suitable for biasing a current source electrically coupled to an individual pixel or a pixel circuit element electrically coupled to the pixel.

[0047] In certain embodiments of the present disclosure, the configuration (Config) register can be written to and from data extracted from the input serial data received by the deserialization, and can be used to control the bias current set by the circuit elements and devices for bias control. In certain embodiments of the present disclosure, the Config register may store or can store information about the number of X pixels and Y pixels of the tile-type display (i.e., the number of pixels in each row and each column) and the activity state of the tile (such as sleep or wake).

[0048] As shown in FIG. 8, in certain embodiments of the present disclosure, each subpixel (one subpixel out of a set of three subpixels for each master pixel or master light-emitting element) includes a light-emitting element (e.g., an LED, a micro-LED, an organic EL, or a micro-LED device or component). This light-emitting element is electrically connected to a memory element (e.g., two sets of memory elements), a logic function circuit element, a final latch, and a current driver. This logic function circuit element has an output that controls a latch (such as the final latch) electrically coupled to itself. This current driver supplies a modulated current to the LED. It should be understood by those skilled in the art that the number of memory elements, latches, and current drivers may be different.

[0049] In certain embodiments of the present disclosure, image data or video data (such as grayscale data of an image or video) is loaded from a tile controller into a receiving memory device (such as a memory device or a receiving pixel memory device). This tile controller arranges or transmits data to be written to a tile, which is extracted from a serial data stream by a deserialization and a decoder, onto a data bus of a column including the pixel or master pixel to be written. Thereafter, the tile controller outputs a ROW-WRITE signal for the row of pixels to be written. It should be understood by those skilled in the art that other row-column scanning methods can be used to control the ROW-WRITE operation.

[0050] And, in certain embodiments of the present disclosure, the tile controller outputs a LOAD output voltage or signal. This LOAD output voltage or signal initiates the transfer of data from a receiving storage device (such as a memory device or a receiving storage memory device) to an active storage device (such as a memory or an active pixel memory device). In certain embodiments of the present disclosure, thereafter, a display cycle is initiated. During this cycle, the tile controller supplies a changing value or voltage to a Time-Varying Value (TVV) bus. This changing value or voltage is combined with, for example, a single-bit voltage, a voltage pulse, or a signal used for modulating current, and is generated by pixel logic hardware and software, or pixel logic hardware devices or means and software functions, algorithms, or modules, as a value (in the case of software) or a value represented by a voltage in an active storage device such as a memory. In certain embodiments of the present disclosure, each time the time-varying value bus is changed by the tile controller, a COMPUTE signal or output generated by a counter within the tile controller is asserted or output to a logic function circuit element or a latch or both, causing an operation of a single-bit output or signal and latching it into a final latch. The output of the final latch directly controls the on / off state of a current source. Modulation by pixel logic hardware and software is, for example, any of various resulting digital patterns, such as patterns like PWM or binary weighted pulse width, and is used to vary the luminance of each pixel according to the data loaded into a storage device (such as a memory).

[0051] In certain embodiments of the present disclosure, the serial data stream from the tile array controller or master controller to the tile is formatted into frames that correspond to the refresh rate of the display in terms of duration and frequency. In certain embodiments of the present disclosure, as shown in FIG. 9, each frame has a frame start (SOF: Start-Of-Frame) marker, and this frame start marker contains a unique pattern that can be used by the decoding logic element of the tile controller to reliably detect the start of the frame (i.e., in the data received by the tile). After the frame start marker, header information describing the content of the video data follows. The content of the video data is information regarding the number of pixels per row in the configured display, such as the number of words expected in the data stream and the number of bits per word. Also included is information including global (i.e., for the entire pixel array or a predetermined portion thereof) register updates such as brightness control and sleep / wake status.

[0052] In certain embodiments of the present disclosure, the serial stream of data transmitted from the tile controller or display controller to the tile may be encoded, for example, in 8b / 10b or 8b / 9b encoding to provide robust transmission and reception, error detection, and unique symbols for frame start and other control purposes (such as tile power state control). Each tile indexes the received pixel data using its own address and stores its individual data by identifying the start and end of the data destined for that tile.

[0053] According to some embodiments of the present disclosure, a display device includes a light-emitting die and a backplane device coupled to the light-emitting die. The light-emitting die includes at least one light-emitting element configured as at least one of being coupled to, formed on, or integrated with a light-emitting element substrate. The backplane device includes a backplane substrate and pixel circuit elements. The pixel circuit elements are configured as at least one of being embedded in, integrated with, formed on, or coupled to the backplane substrate. The pixel circuit elements include pixel logic circuit elements and input / output logic circuit elements.

[0054] According to some embodiments, the pixel circuit elements include driving circuit elements. According to some embodiments, the at least one light-emitting element includes three light-emitting elements. The light-emitting element is an LED in some embodiments and a micro-LED in other embodiments. According to some embodiments, the pixel circuit elements are electrically coupled to the at least one light-emitting element and drive the at least one light-emitting element. According to some embodiments, the pixel circuit elements are electrically coupled to the at least one light-emitting element by conductive elements and drive the at least one light-emitting element.

[0055] According to some embodiments, the backplane device is manufactured from a material including silicon or other semiconductors in which transistors can be formed therein. According to some embodiments, the light-emitting element has a conductive portion, and the pixel circuit element includes a conductive portion for electrically coupling the light-emitting element to each pixel circuit. The backplane device in some embodiments has silicon through vias (TSVs), and the upper side of the backplane device is connected to the back side of the backplane device by a conductive material or device at the end of the TSV. According to some embodiments, the printed circuit board is electrically coupled to the backplane device via a conductive element that couples the printed circuit board (PCB) and the backplane device using the TSV. According to some embodiments, at least three light-emitting elements form a first master pixel. In some embodiments, the display device further includes a second master pixel, and the second master pixel is electrically coupled to the first master pixel via an electrically conductive component or wire. According to some embodiments, the first master pixel and the second master pixel form a tile.

[0056] According to some embodiments, the display device includes a plurality of tiles, and one tile includes a light-emitting die. The light-emitting die includes at least one light-emitting element configured by at least one of being coupled to, formed on, or integrated with a light-emitting element substrate. The backplane device is coupled to the light-emitting die. The backplane device includes a backplane substrate and pixel circuit elements, and the pixel circuit elements are configured by at least one of being embedded in, integrated with, formed on, or coupled to the backplane substrate. The pixel circuit elements include pixel logic circuit elements, input / output logic circuit elements, and a printed circuit board (PCB). The plurality of tiles are electrically coupled through circuit elements configured by at least one of being embedded in, integrated with, formed on, or coupled to the backplane substrate and through circuit elements configured by at least one of being embedded in, integrated with, formed on, or coupled to the printed circuit board.

[0057] According to some embodiments, the pixel logic circuit elements are configured by at least one of being disposed in, embedded in, integrated with, formed on, or coupled to a first strip region of the backplane substrate. The input / output logic circuit elements are configured by at least one of being disposed in, embedded in, integrated with, formed on, or coupled to a second strip region of the backplane substrate in some embodiments.

[0058] According to some embodiments, the display system includes a tile controller that controls the operation of each tile in the array or the operation of a plurality of tiles, and is provided in or integrated with each operation die of the plurality of tiles. Each of the plurality of tiles has a tile address. The master controller is coupled to at least one tile of the plurality of tiles or the tile array. The master controller transmits data to the tile to which it is coupled. The tile controller identifies the tile data among the data received from the master controller. The tile data is a subset of the data transmitted from the master controller and is associated with the tile address. The tile controller associated with the tile address stores the tile data in a memory component within the tile or a memory component associated with the tile.

[0059] According to some embodiments, the data transmitted from the master controller includes the tile address in the header of the data transmitted from the master controller. According to some embodiments, the master controller receives data from a first device of a first format, and the master controller converts the data into a second format that is suitable for or readable or processable by the tile or the tile controller associated with the tile.

[0060] According to some embodiments, the first device is a device that generates or outputs an image or image data. According to some embodiments, the tiles among the plurality of tiles or the tile array are electrically connected in series. According to some embodiments, the image or video data is transmitted to the tile for display in the next frame while the image or video data for the current frame is being displayed on the tile. According to some embodiments, each tile includes a light-emitting element, and each light-emitting element is coupled to a first storage device and a second storage device.

[0061] According to some embodiments, the display system further comprises a logic function circuit element electrically coupled to a latch, the logic function circuit element executing an operation such as an equivalence function or a comparison function or a Boolean logic function, generating an output received by the latch to which the logic function circuit element is coupled, the latch storing the output of the logic function circuit element, and a current driving circuit or component electrically coupled to the light emitting element, the current driving circuit or component supplying a modulated current to the light emitting element, and the current driving circuit or component may supply a modulated current to the light emitting element according to the output generated by the logic function circuit element.

[0062] According to some embodiments, the display system comprises a pixel array of pixel elements, each light emitting element of the pixels of the pixel array or each light emitting element of the master pixels being electrically coupled to a pixel circuit element, the pixel circuit element comprising a first storage device or a receiving pixel memory device and a second storage device or an active pixel memory device electrically coupled to the receiving pixel memory device. The logic function circuit element is coupled to the active pixel memory device. The latch is coupled to the logic function circuit element, the current driving device is coupled to the latch, and the current driving device drives the operation of each pixel of the pixel array or each master pixel of the pixel array. The tile controller comprises a deserialiser that receives input data from the receiving storage device. The decoder is electrically coupled to the deserialiser, and the deserialiser extracts image or video data from the data stream received by the deserialiser of the tile controller according to or if there is an address of a tile in the data stream, and the deserialiser controls the writing of the extracted data to the first storage device or the receiving pixel memory device.

[0063] According to some embodiments, the decoder decodes the extracted data after extracting it from the data stream, and the tile controller instructs the control logic block to write the extracted and then decoded data to be placed on the data bus, and the data bus corresponds to or is associated with a column comprising or including a light-emitting element, a pixel, a master pixel, an LED, or an aggregate of each LED, and the light-emitting element, pixel, master pixel, LED, or aggregate of each LED is identified as the destination for writing the extracted and then decoded data. According to some embodiments, the tile controller outputs a ROW / WRITE output or signal to a row of a light-emitting element, a pixel, a master pixel, an LED, or an aggregate of each LED, and the light-emitting element, pixel, master pixel, LED, or aggregate of each LED is identified as the one to receive the extracted and then decoded data.

[0064] According to some embodiments, the display system further comprises a control logic circuit element of the tile controller, and the control logic circuit element of the tile controller outputs a LOAD output voltage or signal to initiate a data transfer from the receiving storage device to the second or active storage device. According to some embodiments, the display system further comprises a Time-Varying Value (TVV) generator, and after data is transferred to the second or active storage device, a display cycle starts, and during the display cycle, the TVV generator supplies a changing value or voltage, combined with the value or voltage of the second or active storage device by a pixel logic circuit or a pixel logic device, to the Time-Varying Value (TVV) bus, and generates a time-varying voltage used to modulate a current drive circuit or device electrically coupled to a master pixel or a master light-emitting element.

[0065] According to some embodiments, the COMPUTE signal or output generated by a counter within a time change value generator of a tile controller is transmitted to a logic function circuit element or a latch or both of a pixel array each time the time change value bus by the time change value generator changes, the logic function circuit element computes or executes a Boolean logic function, generates a single-bit output or signal, outputs it to the latch, and the output of the latch directly controls the on / off state of a current source, whereby the on / off state of a pixel, a master pixel, an LED, or an aggregate of each LED is controlled.

[0066] The above embodiments are merely exemplary descriptions of implementations described for a clear understanding of the principle. It is possible to make variations, modifications, and combinations of the above embodiments without departing from the scope of the claims. All such variations, modifications, and combinations are hereby included in this specification by the scope of the present disclosure and the claims.

Claims

1. A display device, comprising a plurality of tiles and circuit elements configured to electrically couple the plurality of tiles, wherein one tile comprises a light-emitting die including at least one light-emitting element, a backplane device coupled to the light-emitting die, the backplane device comprising a backplane substrate having a first region and a second region, a pixel logic circuit element configured to be disposed in, embedded in, integrated with, formed in, or coupled to the first region, and an input / output logic circuit element configured to be disposed in, embedded in, integrated with, formed in, or coupled to the second region, and a display device.

2. The display device according to claim 1, wherein the first region has a first strip region, and the second region has a second strip region. A display device.

3. The display device according to claim 1, wherein the first region has a plurality of first strip regions, and the second region has a plurality of second strip regions alternately arranged with the plurality of first strip regions. A display device.

4. The display device according to claim 1, wherein the circuit element configured to electrically couple the plurality of tiles has a printed circuit board (PCB). A display device.

5. The display device according to claim 4, wherein the PCB electrically couples the plurality of tiles in series. A display device.

6. The display device according to claim 1, wherein image or video data is transmitted to the input / output logic circuit element of the tile for display in the next frame while the image or video data for the current frame is being displayed on the light-emitting die of the tile. A display device.

7. The display device according to claim 1, wherein each of the plurality of tiles has a corresponding tile address, the circuit element configured to electrically couple the plurality of tiles has a master controller coupled to at least one of the plurality of tiles, and the master controller transmits data having a header including a tile address identifier to the tile to which it is coupled. The backplane device of the tile identifies tile data among the data received from the master controller, where the tile data is a subset of the data transmitted from the master controller, and the backplane device of the tile associated with the tile address identifier stores the tile data in a memory component within the tile or a memory component associated with the tile. Display device. **Claim 8** A display device according to claim 7, wherein the master controller receives data from a first device of a first format, the master controller converts the data into a second format, and the second format is readable or processable by the backplane device of the tile. Display device. **Claim 9** A display device according to claim 8, wherein the first device is a device that outputs image data. Display device. **Claim 10** A display device according to claim 8, wherein each light-emitting element of the light-emitting die is coupled to a first storage device and a second storage device. Display device. **Claim 11** A display system, comprising a pixel array of pixels, and a tile controller , where each pixel has at least one light-emitting element, and each light-emitting element of the pixel is electrically coupled to a pixel circuit element, the pixel circuit element comprises a receiving pixel memory device, an active pixel memory device electrically coupled to the receiving pixel memory device, a logic function circuit element coupled to the active pixel memory device, a latch coupled to the logic function circuit element, and a current driving device coupled to the latch, the current driving device driving the operation of each pixel of the pixel array, and the tile controller comprises a deserialiser that receives a data stream, and a decoder electrically coupled to the deserialiser , where the deserialiser extracts image data or video data from the data stream according to the presence of an address of a tile in the data stream, and is configured to control the writing of the image or video data to the receiving pixel memory device. The decoder is configured to decode the extracted image or video data after extracting the same from the data stream. The tile controller is configured to instruct a control logic block to write the extracted and then decoded image data or video data to a data bus. The data bus corresponds to or is associated with one or more pixels of the pixel array in a column that comprises or includes the same. The column is identified as a write destination for the image data or video data. The control logic block has circuit elements on a first region of the backplane device. The deserialiser has circuit elements on a second region of the backplane device that is different from the first region. A display system. **Claim 12** A display system according to claim 11, wherein the first region has a first strip region, and the second region has a second strip region. A display system. **Claim 13** A display system according to claim 11, wherein the control logic block writes respective multiple parts of the extracted and then decoded image data or video data to respective ones of a plurality of data buses, the plurality of data buses corresponding to or being associated with a plurality of columns each comprising or including one or more pixels of the pixel array, each column being identified as a write destination for one respective part of the plurality of parts of the image data or video data, the first region having a plurality of first strip regions, and the second region having a plurality of second strip regions arranged alternately with the plurality of first strip regions. A display system. **Claim 14** A display system according to claim 11, wherein the tile controller outputs a ROW / WRITE output to a row of the pixels, the pixels being identified as those to receive the extracted and then decoded data. A display system. **Claim 15** A display system according to claim 14, wherein the tile controller further comprises a control logic circuit element, the control logic circuit element outputting a LOAD output voltage or signal that initiates data transfer from the received pixel memory device to the active pixel memory device. A display system. **Claim 16** The display system according to claim 15, comprising: further comprising a time-varying value (TVV: Time-Varying Value) generator; after data is transferred to the active pixel memory device, a display cycle is started; during the display cycle, the time-varying value generator supplies a changing value or voltage, combined with the value or voltage of the active pixel memory device by the pixel circuit element, to a time-varying value (TVV) bus; generates a time-varying voltage used to modulate a current driving device electrically coupled to a master pixel of the pixel array; display system. **Claim 17** The display system according to claim 11, comprising: the at least one light-emitting element of the pixel includes three light-emitting elements that generate three colors of light; display system. **Claim 18** The display system according to claim 11, comprising: the at least one light-emitting element of the pixel is at least one LED; display system. **Claim 19** The display system according to claim 18, comprising: the at least one LED is at least one micro-LED; display system. **Claim 20** A method, comprising: transmitting data from a master controller to one or more tiles among a plurality of tiles, the data having a header including a tile address, the tile address being associated with a first tile among the plurality of tiles; receiving the data in a tile controller of the first tile, the tile controller including a first region having a plurality of first strip regions, a second region having a plurality of second strip regions alternately arranged with the plurality of first strip regions, a pixel logic circuit element constituted by at least one of being arranged, embedded, integrated, formed, or coupled in the first region, and an input / output logic circuit element constituted by at least one of being arranged, embedded, integrated, formed, or coupled in the second region; In the tile controller of the first tile, recognize the tile address in the header of the data, identify the tile data as a subset of the data received from the master controller, and store the tile data in a memory component within the first tile or a memory component associated with the first tile. Having a method.

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