Display device

Abstract

To provide a high-definition display device with fewer steps in the lithography process.SOLUTION: A display device includes a pixel portion and a driving circuit that drives the pixel portion. The pixel portion includes a first transistor and a pixel electrode electrically connected to the first transistor. The driving circuit includes a second transistor and a connection portion. The second transistor includes a metal oxide film, a first gate electrode and a second gate electrode disposed facing each other through the metal oxide film, a source electrode and a drain electrode on and in contact with the metal oxide film, and a first wire connecting between the first gate electrode and the second gate electrode. The connection portion includes a second wire formed on the same surface as the first gate electrode, a third wire formed on the same surface as the source electrode and the drain electrode, and a fourth wire connecting between the second wire and the third wire. The pixel electrode is provided in the same layer as the first wire and the fourth wire.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] One aspect of the present invention relates to a display device and an electronic device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. The invention disclosed in this specification and the like The technical field of one aspect relates to an object, a method, or a manufacturing method. Or, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter -). In particular, one aspect of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, a driving method thereof, or a manufacturing method thereof.

[0003] Note that in this specification and the like, the semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and storage devices are one aspect of semiconductor devices. An imaging device, a display device, a liquid crystal display device, a light-emitting device, an electro-optical device, a power generation device (including thin-film solar cells, organic thin-film solar cells, etc.), and an electronic device may have a semiconductor device.

Background Art

[0004] As a semiconductor material applicable to transistors, oxide semiconductors have attracted attention. For example, a plurality of oxide semiconductor layers are stacked, and among the plurality of oxide semiconductor layers, an oxide semiconductor layer serving as a channel contains indium and gallium, and the ratio of indium is made larger than the ratio of gallium. By doing so, a semiconductor device with enhanced field-effect mobility (sometimes simply referred to as mobility or μFE) is disclosed (see Patent Document 1).

[0005] In addition, technologies for using oxide semiconductor transistors in display devices such as liquid crystal displays and organic EL (electroluminescence) displays have attracted attention. The off-current of oxide semiconductor transistors is extremely small. Utilizing this fact, technologies for reducing the refresh frequency when displaying a still image and reducing the power consumption of liquid crystal displays and organic EL displays have been disclosed (see Patent Document 2 and Patent Document 3). In this specification, the driving method for reducing the power consumption of the above-described display device is referred to as IDS (idling stop) driving. In recent years, the display devices have been increasing in size and resolution, and at the same time, miniaturization of transistors has been demanded.

Prior Art Documents

Patent Documents

Patent Document 1

Patent Document 2

[0006]

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0007]

[0008] ​​​​​​​​​​ The mask has a fine shape and is very expensive because high precision of the shape is required. Also as the display device has a larger screen size, problems occur in that the resistance of wirings such as gate wirings and source wirings increases due to their increased lengths, resulting in increased power consumption.

[0009] In view of the above, one aspect of the present invention aims to provide a high-definition display device. Also or, one aspect of the present invention aims to provide a display device with excellent display quality as one of the problems. Or, one aspect of the present invention aims to provide a display device with reduced power consumption as one of the problems. Or, one aspect of the present invention aims to provide a novel display device as one of the problems. Or, one aspect of the present invention aims to provide a novel electronic device as one of the problems.

[0010] Note that the description of the above problems does not prevent the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Other problems will be naturally clarified from the description in the specification etc., and it is possible to extract other problems from the description in the specification etc.

Means for Solving the Problems

[0011] One aspect of the present invention has a pixel portion and a driving circuit for driving the pixel portion. The pixel portion has a first transistor and a pixel electrode electrically connected to the first transistor. The driving circuit has a second transistor and a connection portion. The second transistor has a metal oxide film, a first gate electrode and a second gate electrode disposed opposite each other via the metal oxide film, a source electrode and a drain electrode in contact with the metal oxide film, and connects the first gate electrode and the second gate electrode. and a subsequent first wiring, and the connection portion includes a second wiring formed on the same surface as the first gate electrode. The connection portion includes a third wiring formed on the same surface as the source electrode and the drain electrode, and a fourth wiring connecting the second wiring and the third wiring. The display device is provided in the same layer as the pixel electrode, the first wiring, and the fourth wiring. Further, in one aspect of the present invention, in the above-described display device, between the first transistor and the pixel electrode, there is a first insulating film including a flat upper surface. Between the second transistor and the first wiring, there is a second insulating film including a flat upper surface. Between the second wiring and the third wiring and the fourth wiring, it is preferable to have a third insulating film including a flat upper surface. Further, one aspect of the present invention has a pixel portion and a driving circuit for driving the pixel portion. The pixel portion has a first transistor and a pixel electrode electrically connected to the first transistor. The driving circuit has a second transistor and a connection portion. The second transistor has a gate electrode disposed in a region overlapping the metal oxide film, a source electrode and a drain electrode in contact with the metal oxide film. The connection portion has a first wiring formed on the same surface as the gate electrode, a second wiring formed on the same surface as the source electrode and the drain electrode, and a third wiring connecting the first wiring and the second wiring. The display device is provided in the same layer as the pixel electrode and the third wiring.

[0012] Further, in one aspect of the present invention, in the above-described display device, between the first transistor and the pixel electrode, there is a first insulating film including a flat upper surface. Between the first wiring and the second wiring and the third wiring, there is... (The text seems incomplete here. It should be something like 'it is preferably provided with a certain structure' etc. based on the context, but as it is, this is the best translation possible for what's given.) (Same as above, the text seems to be cut off. Continuing with the translation based on what's available.) ...a third insulating film including a flat upper surface.

[0013] Also, one aspect of the present invention has a pixel portion and a driving circuit for driving the pixel portion. The pixel portion has a first transistor and a pixel electrode electrically connected to the first transistor. The driving circuit has a second transistor and a connection portion. The second transistor has a gate electrode disposed in a region overlapping the metal oxide film, a source electrode and a drain electrode in contact with the metal oxide film. The connection portion has a first wiring formed on the same surface as the gate electrode, a second wiring formed on the same surface as the source electrode and the drain electrode, and a third wiring connecting the first wiring and the second wiring. The display device is provided in the same layer as the pixel electrode and the third wiring. Further, in one aspect of the present invention, in the above-described display device, between the first transistor and the pixel electrode, there is a first insulating film including a flat upper surface. Between the first wiring and the second wiring and the third wiring, there is... (Same as above, text seems cut off. Continuing translation.) ...a third insulating film including a flat upper surface. The connection portion has a first wiring formed on the same surface as the gate electrode, a second wiring formed on the same surface as the source electrode and the drain electrode, and a third wiring connecting the first wiring and the second wiring. The display device is provided in the same layer as the pixel electrode and the third wiring. (Same as above, seems to be cut off. Continuing.) ...a third insulating film including a flat upper surface.

[0014] Further, in one aspect of the present invention, in the above-described display device, between the first transistor and the pixel electrode, there is a first insulating film including a flat upper surface. Between the first wiring and the second wiring and the third wiring, there is... ...a third insulating film including a flat upper surface. Preferably, a third insulating film having a flat upper surface is provided between the lines.

[0015] One aspect of the present invention has a pixel portion and a driving circuit for driving the pixel portion. The pixel portion has a first transistor and a pixel electrode electrically connected to the first transistor. The driving circuit has a second transistor and a connection portion. The second transistor has a metal oxide film, a first gate electrode and a second gate electrode disposed opposite each other via the metal oxide film, and a source electrode and a drain electrode in contact with the metal oxide film. The connection portion has a first wiring and a second wiring formed on the first wiring. The first gate electrode and the second gate electrode are electrically connected. The first wiring is formed on the same surface as the first gate electrode, and the second wiring is formed on the same surface as the source electrode and the drain electrode. The pixel electrode and the second gate electrode are provided in the same layer.

[0016] Also, in one aspect of the present invention, in the above-described display device, a first insulating film having a flat upper surface is provided between the first transistor and the pixel electrode, and a second insulating film having a flat upper surface is preferably provided between the metal oxide film and the second gate electrode.

[0017] Also, one aspect of the present invention has a pixel portion and a driving circuit for driving the pixel portion. The pixel portion has a first transistor and a pixel electrode electrically connected to the first transistor. The driving circuit has a second transistor and a connection portion. The second transistor has a metal oxide film, a gate electrode disposed in a region overlapping the metal oxide film, and a source electrode and a drain electrode in contact with the metal oxide film. The connection portion has a first wiring and a second wiring formed on the first wiring. It has a second wiring, the first wiring is formed on the same surface as the gate electrode, and the second wiring is a display device formed on the same surface as the source electrode and the drain electrode.

[0018] Also, in one aspect of the present invention, in the above-described display device, it is preferable to have a first insulating film including a flat upper surface between the first transistor and the pixel electrode.

[0019] Also, in one aspect of the present invention, the ends of the source electrode and the drain electrode may be located inside the ends of the metal oxide film.

[0020] Also, in one aspect of the present invention, the metal oxide film may have indium, zinc, and oxygen.

[0021] Also, in one aspect of the present invention, in the above-described metal oxide film, further, any one selected from gallium, aluminum , silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, or may have a plurality of elements M.

[0022] Also, in one aspect of the present invention, in the above-described metal oxide film, with respect to the total number of atoms of indium, element M, and zinc, the indium content is in a region of 40% or more and 50% or less, and the element M content may have a region of 5% or more and 30% or less.

[0023] Also, in one aspect of the present invention, in the above-described metal oxide film, when the atomic ratio of indium, element M, and zinc is In:M:Zn = 4:x:y, x is 1.5 or more and 2.5 or less, and ​​​​​​y may also be 2 or more and 4 or less.

[0024] Moreover, one aspect of the present invention is an electronic device having any one of the above-described display devices and a receiving device.

Advantages of the Invention

[0025] By reducing the lithography process, the margin of pattern placement can be reduced, and miniaturization of transistors and high definition of the display device can be achieved. Further, by reducing the lithography process, simplification of the process and improvement of the yield can be achieved. Also, by reducing the lithography process, the cost of the mask can be reduced. Further, in the connection portion, by directly connecting the wirings, good contact can be obtained and the contact resistance can be reduced.

[0026] According to one aspect of the present invention, a high-definition display device can be provided. Alternatively, according to one aspect of the present invention, a display device with excellent display quality can be provided. Alternatively, according to one aspect of the present invention, a display device with reduced power consumption can be provided. Alternatively, according to one aspect of the present invention, a novel display device can be provided. Alternatively, according to one aspect of the present invention, a novel electronic device can be provided.

[0027] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have all of these effects. Note that other effects will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other effects from the description in the specification, drawings, claims, etc.

Brief Description of the Drawings

[0028]

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Embodiments for Carrying Out the Invention

[0029] Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different ways, and it is easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and its scope. Therefore, the present invention is not construed as being limited to the description of the following embodiments.

[0030] Also, in the drawings, there are cases where the size, layer thickness, or area is exaggerated for clarity. Therefore, it is not necessarily limited to that scale. Note that the drawings are shown in an idealized example and are not limited to the shapes or values shown in the drawings.

[0031] Also, the ordinal numbers "first", "second", "third", etc. used in this specification are added to avoid confusion of components, and it is supplemented that they do not limit numerically.

[0032] Also, in this specification, terms indicating arrangements such as "above" and "below" are used for convenience in explaining the positional relationship between components with reference to the drawings. Also, the positional relationship between components It varies as appropriate according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification and can be appropriately rephrased according to the situation.

[0033] Also, in this specification and the like, a transistor includes a gate, a drain, and a source and is an element having at least three terminals. And there is a channel region between the drain (drain terminal, drain region or drain electrode) and the source (source terminal, source region or source electrode), and a current can flow between the source and the drain through the channel region . Note that in this specification and the like, the channel region refers to the region through which current mainly flows.

[0034] Also, the functions of the source and drain may be interchanged when transistors of different polarities are employed or when the direction of current changes during circuit operation . Therefore, in this specification and the like, the terms source and drain are assumed to be interchangeable .

[0035] Also, in this specification and the like, "electrically connected" includes cases where it is connected through "something having some electrical action" . Here, "something having some electrical action" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets . For example, "something having some electrical action" includes electrodes, wiring, switching elements such as transistors , resistance elements, inductors, capacitors, and other elements having various functions .

[0036] Also, in this specification and the like, "parallel" means that the angle between two straight lines is -10° or more and 10° or less It refers to the state of being arranged. Therefore, it also includes the case where it is -5° or more and 5° or less. Also ,"vertical" refers to the state where two straight lines are arranged at an angle of 80° or more and 100° or less said. Therefore, the case where it is 85° or more and 95° or less is also included.

[0037] Also, in this specification and the like, the term "film" and the term "layer" can be interchanged with each other. For example, the term "conductive layer" may be changed to the term "conductive film". Or, for example, the term "insulating film" may be changed to the term "insulating layer".

[0038] Also, in this specification and the like, unless otherwise specified, the off-current refers to the drain current when the transistor is in the off state (also referred to as a non-conducting state or a cutoff state). The off state means , unless otherwise specified, in an n-channel transistor, the voltage Vg between the gate and the source is lower than the threshold voltage Vth, and in a p-channel transistor, the voltage Vgs between the gate and the source is higher than the threshold voltage Vth. For example, the off-current of an n-channel transistor may refer to the drain current when the voltage Vgs between the gate and the source is lower than the threshold voltage Vth.

[0039] The off-current of the transistor may depend on Vgs. Therefore, when the off-current of the transistor is I or less, it may mean that there exists a value of Vgs for which the off-current of the transistor becomes I or less. The off-current of the transistor is the off state at a predetermined Vgs, the off state at Vgs within a predetermined range, or an off-current that is sufficiently reduced can be obtained ​​​It may refer to the off - current in the off - state at Vgs, etc.

[0040] As an example, the threshold voltage Vth is 0.5V, and the drain current at Vgs = 0.5V is 1×10 -9 A, the drain current at Vgs = 0.1V is 1×10 -13 A, the drain current at Vgs = - 0.5V is 1×10 -19 A, and when Vgs is - 0.8V, the drain current is 1×10 -22 A. Assume an n - channel transistor. The drain current of the transistor is, when Vgs is - 0.5V, or when Vgs is in the range of - 0.5V to - 0.8V, 1×10 A or less. -19 Therefore, it may be said that the off - current of the transistor is 1×10 A or less. Since there exists a Vgs at which the drain current of the transistor becomes 1×10 -19 A or less, it may be said that the off - current of the transistor is 1×10 A or less. -22 In addition, in this specification, etc., the off - current of a transistor having a channel width W may be represented by the current value flowing per channel width W. -22 Or it may be represented by the current value flowing per a predetermined channel width (for example, 1μm). In the latter case, the unit of the off - current may be represented by a unit having the dimension of current / length

[0041] (for example, A / μm). The off - current of a transistor may depend on temperature. In this specification, unless otherwise specified, the off - current is at room temperature, 60°C, 85°C, 95°C, or 125°C.

[0042] may represent a current. Alternatively, the reliability of a semiconductor device including the transistor is guaranteed at a temperature, or the temperature at which a semiconductor device including the transistor is used (for example, any one temperature between 5°C and 35°C), may represent the off-current. When it is said that the off-current of a transistor is I or less, it means that at room temperature, 60°C, 85°C, 95°C, 125°C, the temperature at which the reliability of the semiconductor device including the transistor is guaranteed, or the temperature at which the semiconductor device including the transistor is used (for example, any one temperature between 5°C and 35°C), there exists a value of Vgs at which the off-current of the transistor is I or less.

[0043] The off-current of a transistor may depend on the voltage Vds between the drain and the source. In this specification, unless otherwise specified, the off-current represents the off-current at Vds of 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or 20V. Alternatively, it may represent the off-current at Vds at which the reliability of a semiconductor device including the transistor is guaranteed, or the off-current at Vds used in a semiconductor device including the transistor. When it is said that the off-current of a transistor is I or less, it means that at Vds of 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, the Vds at which the reliability of the semiconductor device including the transistor is guaranteed, or the Vds used in a semiconductor device including the transistor, there exists a value of Vgs at which the off-current of the transistor is I or less.

[0044] ​​​​​​​​​​​​​​ In the description of the off-current above, the drain and the source may be read as each other. That is, the off-current may also refer to the current flowing through the source when the transistor is in the off state.

[0045] Also, in this specification and the like, in the same meaning as the off-current, it may be described as the leakage current. Also in this specification and the like, the off-current refers to, for example, when the transistor is in the off state, it may refer to the current flowing between the source and the drain.

[0046] Also, in this specification and the like, the threshold voltage of the transistor refers to the gate voltage (Vg) when a channel is formed in the transistor. Specifically, the threshold voltage of the transistor refers to the gate voltage (Vg) on the horizontal axis and the square root of the drain current (Id) on the vertical axis, plotted in a curve (Vg-√Id characteristic), the gate voltage (Vg) at the intersection of the straight line obtained by extrapolating the tangent line with the maximum slope and the square root of the drain current (Id) being 0 (Id being 0 A). Alternatively, the threshold voltage of the transistor refers to the gate voltage (Vg) when the channel length is L, the channel width is W, and the value of Id [A] × L [μm] / W [μm] is 1 × 10 -9 [A]. It may refer to the gate voltage (Vg).

[0047] Also, in this specification and the like, even when it is described as "semiconductor", for example, when the conductivity is extremely low, it may have the characteristics of an "insulator". Also, the boundary between "semiconductor" and "insulator" is ambiguous and may not be strictly distinguishable. Therefore, the "semiconductor" described in this specification and the like may be paraphrased as "insulator". Similarly, in this specification The "insulator" described in the detailed description and the like may be replaced with a "semiconductor" in some cases. Or in some cases, the "insulator" described in this specification and the like may be replaced with a "semi-insulator".

[0048] Also, even when the term "semiconductor" is used in this specification and the like, for example, when the conductivity is very high, it may have the characteristics of a "conductor". In addition, the boundary between "semiconductor" and "conductor" may be ambiguous and it may not be possible to strictly distinguish them. Therefore, the "semiconductor" described in this specification and the like may be replaced with a "conductor" in some cases. Similarly, the "conductor" described in this specification and the like may be replaced with a "semiconductor" in some cases.

[0049] Also, in this specification and the like, the impurities in a semiconductor refer to components other than the main component that constitutes the semiconductor film. For example, an element with a concentration of less than 0.1 atomic% is an impurity. When impurities are included, DOS (Density of States) may be formed in the semiconductor, the carrier mobility may decrease, and the crystallinity may decrease, etc. When the semiconductor has an oxide semiconductor, the impurities that change the characteristics of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, transition metals other than the main component, etc., and in particular, hydrogen (also contained in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen, etc. In the case of an oxide semiconductor, for example, the incorporation of impurities such as hydrogen may form oxygen vacancies. When the semiconductor has silicon, the impurities that change the characteristics of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 15 elements excluding oxygen and hydrogen, etc.

[0050] In this specification and the like, a metal oxide refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS). For example, when a metal oxide is used in the active layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when a metal oxide has at least one of an amplification action, a rectification action, and a switching action, the metal oxide can be abbreviated as a metal oxide semiconductor and simply called OS. Also, when described as an OSFET, it can be paraphrased as a transistor having a metal oxide or an oxide semiconductor.

[0051] In this specification and the like, a metal oxide having nitrogen may also be generically referred to as a metal oxide (metal oxi de). Further, a metal oxide having nitrogen may be referred to as a metal oxynitride.

[0052] (Embodiment 1) In this embodiment, a display device and a manufacturing method thereof according to an aspect of the present invention will be described with reference to FIGS. 1 to 4 6.

[0053] <Configuration Example 1 of Display Device> Cross-sectional views of transistors included in a pixel portion and a driving circuit of a display device according to an aspect of the present invention are shown in FIGS. 1(A), 1(B), and 1(C), and top views are shown in FIGS. 2(A) and 2(B). .

[0054] A display device according to an aspect of the present invention includes a transistor 100A, a transistor 200A, a capacitive element It has 250A and a connection part 150A.

[0055] FIG. 1(A) is a cross-sectional view of the transistor 200A and the capacitor element 250A included in the pixel portion, which corresponds to a cross-sectional view of a cut surface between the dashed-dotted line X1-X2 in FIG. 2(A). FIG. 1(B ) is a cross-sectional view of the transistor 100A and the connection part 150A included in the drive circuit, and FIG. corresponds to a cross-sectional view of a cut surface between the dashed-dotted line X3-X4 in FIG. 2(B). FIG. 1(C) is a cross-sectional view of the transistor 100A included in the drive circuit, which corresponds to a cross-sectional view of a cut surface between the dashed-dotted line Y1-Y 2 in FIG. 2(B). In FIGS. 2(A) and 2(B), in order to avoid complication, a part of the components of the transistor 100A, the transistor 200A, and the capacitor element 250A (such as an insulating film having a function as a gate insulating film) is omitted in the figure shown. Also, in each transistor, the direction of the dashed-dotted line X1-X2 may be referred to as the channel length direction , and the direction of the dashed-dotted line Y1-Y2 may be referred to as the channel width direction. In the top view of the transistor , as in FIGS. 2(A) and 2(B) in the following drawings, a part of the components may be omitted in the figure for illustration. As shown in FIG. 1(A), the pixel portion has a transistor 200A, a conductive film 220 having a function as a pixel electrode, and a capacitor element 250A. Note that the conductive film 220 functioning as a pixel electrode is electrically connected to the transistor 200A.

[0056] The transistor 200A includes a conductive film 204 on the substrate 102, an insulating film 106 on the substrate 102 and the conductive film 204, a metal oxide film 208 on the insulating film 106, and a film on the metal oxide film 208. The conductive film 220 that functions as a pixel electrode is electrically connected to the transistor 200A.

[0057] The transistor 200A includes a conductive film 204 on the substrate 102, an insulating film 106 on the substrate 102 and the conductive film 204, a metal oxide film 208 on the insulating film 106, and a film on the metal oxide film 208. The insulating film 106 on the substrate 102 and the conductive film 204, the metal oxide film 208 on the insulating film 106, and the film on the metal oxide film 208. It has a conductive film 212a and a conductive film 212b on the metal oxide film 208.

[0058] In the transistor 200A, the insulating film 106 functions as a gate insulating film. Also, in the transistor 200A, the conductive film 204 functions as a gate electrode, the conductive film 212a functions as a source electrode, and the conductive film 212b functions as a drain electrode.

[0059] In the transistor 200A, the ends of the conductive film 212a and the conductive film 212b are located inside the ends of the metal oxide film 208.

[0060] On the transistor 200A, specifically, an insulating film 114, an insulating film 116 on the insulating film 114, an insulating film 118 on the insulating film 116, and an insulating film 119 on the insulating film 118 are formed on the metal oxide film 208, the conductive film 212a, and the conductive film 212b. In the transistor 200A, the insulating film 114, the insulating film 116, and the insulating film 118 function as protective insulating films of the transistor 200A. Also, the insulating film 119 functions as a planarization film.

[0061] The insulating film 114, the insulating film 116, the insulating film 118, and the insulating film 119 have an opening 242a in a region overlapping the conductive film 212b. A conductive film 220 having a function as a pixel electrode is electrically connected to the conductive film 212b through the opening 242a.

[0062] Note that the transistor 200A is a so-called channel etch type transistor and has a single gate structure.

[0063] The capacitive element is formed by the conductive film 213, the insulating film 106, the metal oxide film 228, and the conductive film 215a. The conductive film 213 having a function as a capacitive wiring is formed in the same process on the same plane as the conductive films 204, 104, and 113. The conductive film 215a is formed in the same process on the same plane as the conductive films 212 a, 212b, 112a, 112b, and 115a.

[0064] In the capacitive element 250A, the end of the conductive film 215a is located inside the end of the metal oxide film 228.

[0065] Also, a conductive film 220 having a function as a pixel electrode is formed on the insulating film 119. The conductive film 220 provided on the insulating film 119 having a function as a planarization film also has high flatness and becomes flat. Since the conductive film 220 has high flatness, when the display device is a liquid crystal display device, the alignment defects of the liquid crystal layer can be reduced. Also, the distance between the conductive film 204 having a function as a gate wiring and the conductive film 220, and the distance between the conductive film 212a having a function as a signal wiring and the conductive film 220 can be widened by the insulating film 119, and the wiring delay can be reduced and is possible. As shown in FIGS. 1(B) and 1(C), the drive circuit has the transistor 100A and the connection portion 1 50A.

[0066] The transistor 100A includes the conductive film 104 on the substrate 102, the insulating film 106 on the substrate 102 and the conductive film 104 , the metal oxide film 108 on the insulating film 106, the conductive film 112a on the metal oxide film 108, the conductive film 112b on the metal oxide film 108, the insulating film 114 on the metal oxide film 108, the conductive film 112a, and the conductive film 112b, and the insulating film 116 on the insulating film 114

[0067] and the conductive film 112a and the conductive film 112b on the insulating film 114 and the insulating film 116 on the insulating film 114. On the insulating film 106, the metal oxide film 108, the conductive film 112a, and the conductive film 112b, and the insulating film 114 on the metal oxide film 108, the conductive film 112a, and the conductive film 112b, and the insulating film 116 on the insulating film 114. On the metal oxide film 108, the conductive film 112a and the conductive film 112b, and the insulating film 114 on the metal oxide film 108, the conductive film 112a, and the conductive film 112b, and the insulating film 116 on the insulating film 114. On the insulating film 114, the insulating film 116 on the insulating film 114. An insulating film 118 on the insulating film 116 and a conductive film 130a on the insulating film 118 are formed. .

[0068] In the transistor 100A, the insulating film 106 functions as a first gate insulating film, and the insulating films 114, 116, and 118 function as a second gate insulating film. Also, in the transistor 100A, the conductive film 104 functions as a first gate electrode, and the conductive film 130a functions as a second gate electrode. Further, in the transistor 100A, the conductive film 112a functions as a source electrode, and the conductive film 112 b functions as a drain electrode.

[0069] In the transistor 100A, the ends of the conductive films 112a and 112b are located inside the ends of the metal oxide film 108.

[0070] On the transistor 100A, specifically, an insulating film 119 is formed on the insulating film 118 and the conductive film 130a. In the transistor 100A, the insulating film 119 functions as a planarization film.

[0071] In the transistor 100A, the insulating films 106, 114, 116, 118, and 119 have an opening 146a in a region overlapping the conductive film 104. Also, the insulating film 119 has an opening 148a in a region overlapping the conductive film 130a. A conductive film 120b having a function as a first wiring is electrically connected to the conductive film 130a and the conductive film 104 through the opening 146a and the opening 148a. By providing the conductive film 120b, the conductive film 104 having a function as a first gate electrode of the transistor 100A and a second gate electrode of the transistor 100A can be electrically connected. The conductive film 130a having the function as the gate electrode is electrically connected.

[0072] Note that the transistor 100A is a so-called channel etch type transistor and has a dual gate structure.

[0073] Also, as shown in FIG. 1(B), the metal oxide film 108 of the transistor 100A is positioned to face the conductive film 104 and the conductive film 130a, and is sandwiched between the conductive films having the functions of two gate electrodes. The length of the conductive film 130a in the channel length direction and the length of the conductive film 130a in the channel width direction are respectively longer than the length of the metal oxide film 108 in the channel length direction and the length of the metal oxide film 108 in the channel width direction, and the entire metal oxide film 108 is covered by the conductive film 130a via the insulating films 114, 116, and 118. In other words, the conductive film 104 and the conductive film 130a are connected at the openings provided in the insulating films 106, 114, 116, 118, and 119, and have a region located outside the side end portions of the metal oxide film 108. By having such a configuration, the metal oxide film 108 included in the transistor 100A can be electrically surrounded by the electric fields of the conductive film 104 and the conductive film 130a. A device structure of a transistor that electrically surrounds a metal oxide film in which a channel region is formed by the electric fields of a first gate electrode and a second gate electrode, like the transistor 100A, can be called a Surrounded channel (S-channel) structure.

[0074]

[0075]

[0076] ​​​​​​​​Since the transistor 100A has an S-channel structure, an electric field for inducing a channel can be effectively applied to the metal oxide film 108 by the conductive film 104 having the function of the first gate electrode. As a result, the current driving ability of the transistor 100A is improved, and high on-current characteristics can be obtained. Also, since the on-current can be increased, the transistor 100A can be miniaturized. In addition, since the transistor 100A has a structure in which the metal oxide film 108 is surrounded by the conductive film 104 having the function of the first gate electrode and the conductive film 130a having the function of the second gate electrode, the mechanical strength of the transistor 100A can be increased. Moreover, in the transistor 100A, the metal oxide film 108 has a metal oxide film 108_1 on the insulating film 106 and a metal oxide film 108_2 on the metal oxide film 108_1. In the transistor 200A, the metal oxide film 208 has a metal oxide film 208_1 on the insulating film 106 and a metal oxide film 208_2 on the metal oxide film 208_1. Note that the metal oxide films 108_1, 108_2, 208_1, and 208_2 each have the same elements. For example, the metal oxide films 108_1, 108_2, 208_1, and 208_2 preferably each independently have In and M (where M is gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium) and Zn.

[0077]

[0078] Further, the metal oxide films 108_1, 108_2, 208_1, and 208_2 are each independent preferably has a region where the atomic ratio of In is higher than the atomic ratio of M. As an example, gold For the atomic ratios of In, M, and Zn in the metal oxide films 108_1, 108_2, 208_1, and 208_2, it is preferable to set the ratio to be around In:M:Zn = 4:2:3. Here, the term "around" means that when In is 4, M is 1.5 or more and 2.5 or less, and Zn is 2 or more and 4 or less. Also it is preferable to set the atomic ratio of In, M, and Zn in the metal oxide films 108_1, 108_2, 208_1, and 208_2 to be around In:M:Zn = 5:1:6. In this way, since the metal oxide films 108_1, 108_2, 208_1, and 208_2 can be made to have substantially the same composition and can be formed using the same sputtering target, the manufacturing cost can be suppressed Moreover, when using the same sputtering target, the metal oxide films 108_1, 108_2, 208_1, and 208_2 can be continuously formed in a vacuum in the same chamber Therefore, it is possible to suppress the incorporation of impurities at the interfaces between the metal oxide film 108_1 and the metal oxide film 108_2, and between the metal oxide film 208_1 and the metal oxide film 208_2 respectively

[0079] It is preferable that the metal oxide films 108_1, 108_2, 208_1, and 208_2 are each a metal oxide having a CAC (Cloud - Aligned Composite) structure. The metal oxide will be described with reference to FIG. 47

[0079]

[0080]

[0080] A conceptual diagram of a metal oxide having a CAC structure is shown in FIG. 47. In this specification, the present invention When the metal oxide, which is one of the embodiments, has a semiconductor function, it is called CAC-MO (Metal Acetate-Cavity Molecular Oxide). Oxide Semiconductor) or CAC-OS(Oxide Sem Define the term "electronic conductor."

[0081] CAC-MO or CAC-OS is, for example, a compound that constitutes a metal oxide as shown in FIG. The uneven distribution of the elements forms regions 001 and 002, each of which is the main component of the element. The individual regions are mixed and formed or dispersed in a mosaic pattern. The element is 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or This is a structure of a material that is unevenly distributed in the vicinity of the size. One or more metal elements are unevenly distributed, and the region having the metal element is 0.5 nm or less. The size of the particles is preferably in the range of 1 nm to 2 nm, or in the range of about 1 nm to 10 nm. This state is also called a mosaic or patch pattern.

[0082] In addition, CAC-MO or CAC-OS is a material that has a conductive function in some parts and a conductive function in other parts. The CA has insulating properties at certain points, and the entire material has a semiconductor function. When C-MO or CAC-OS is used for the channel of a transistor, the conductive function is The function of the insulating property is to allow the flow of electrons (or holes) that act as carriers. The function of preventing the flow of electrons is to prevent the flow of conductive and insulating functions. By using this function, the switching function (on / off function) is realized by CAC-M. In CAC-MO or CAC-OS, By separating the functions of each, the functions of both can be maximized.

[0083] In the present specification and the like, CAC-MO or CAC-OS refers to a conductive region and an insulating region. For example, one of the regions 001 and 002 shown in FIG. 47 is a conductive region. The conductive region may have the above-mentioned conductive function and may be an insulating region. The conductive region has the insulating function described above. Conductive regions and insulating regions may be separated at the nanoparticle level. The conductive regions may be unevenly distributed in the material. They may be observed connected in a woody form.

[0084] In addition, CAC-MO and CAC-OS are composed of components with different band gaps. For example, CAC-MO or CAC-OS may be formed by using a wire that is formed by insulating regions. The component has a wide gap and the component has a narrow gap due to the conductive region. In this structure, when carriers are flowed, they are attracted to components having a narrow gap. In addition, the narrow gap component is divided into wide gap It acts complementarily to the component having a narrow gap, and acts in conjunction with the component having a wide gap. Carriers also flow to the components having the above CAC-MO or CAC-OS. When used in the channel region of a transistor, it provides high current drive when the transistor is in the on state. It is possible to obtain a large on-state current and a high field effect mobility.

[0085] In addition, CAC-MO and CAC-OS are matrix composites. posite), or a metal matrix composite (metal matrix comp osite). Details of CAC-MO or CAC-OS will be described in detail in Embodiment 2.

[0086] The metal oxide films 108_1, 108_2, 208_1, and 208_2 each independently have a region where the atomic ratio of In is larger than the atomic ratio of M and have a CAC structure, thereby increasing the field-effect mobility of the transistors 100A and 200A. Specifically, the field-effect mobility of the transistors 100A and 200A can exceed 40 cm / Vs, preferably exceeds 50 cm / Vs, and more preferably can exceed 100 cm 2 / Vs. 2 2

[0087] In addition, the transistor 100A having an S-channel structure has a high field-effect mobility and high driving ability. Therefore, by using the transistor 100A in a driving circuit, typically a gate driver that generates a gate signal, a display device with a narrow border width (also referred to as a narrow border) can be provided. Also, by using the transistor 100A in a source driver that supplies a signal from a signal line of a display device (particularly, a demultiplexer connected to an output terminal of a shift register included in the source driver), a display device with a small number of wirings connected to the display device can be provided.

[0088] In addition, since the transistors 100A and 200A are each a transistor having a channel etch structure, the number of manufacturing steps is smaller than that of a transistor having a top gate structure. No. In addition, since the transistors 100A and 200A use a metal oxide film for the channel layer, unlike transistors using low-temperature polysilicon, a laser crystallization process is unnecessary. For these reasons, even in a display device using a large-area substrate, it is possible to reduce the manufacturing cost. Furthermore, in a high-resolution display device such as ultra high vision ("4K resolution", "4K2K", "4K") or super high vision ("8K resolution", "8K4K", "8K") and in a large display device, by using transistors such as the transistors 100A and 200A with high field-effect mobility in the driving circuit and the display section, writing can be performed in a short time, and it is

[0089] preferable that display defects can be reduced. The connection section 150A includes a conductive film 113 having a function as a second wiring on the substrate 102, insulating films 106, 114, 116, 118, and 119 on the conductive film 113 having a function as a second wiring, an opening 142a provided in the insulating films 106, 114, 116, 118, and 119, a conductive film 115a having a function as a third wiring on the metal oxide film 128, insulating films 114, 116, 118, and 119 on the conductive film 115a having a function as a third wiring, an opening 144a provided in the insulating films 114, 116, 118, and 119, and a conductive film 120a having a function as a fourth wiring formed to cover the openings 142a and 144a and connecting the conductive film 113 having a function

[0090] In the connection part 150A, the end of the conductive film 115a is inside the end of the metal oxide film 128. It is located.

[0091] The conductive film 113 having a function as the second wiring is formed in the same process on the same plane as the conductive film 104 having a function as the first gate electrode of the transistor 100A. The third wiring The conductive film 115a having a function as a line is formed in the same process on the same plane as the conductive film 112a having a function as the source electrode of the transistor 100A and the conductive film 112b having a function as the drain electrode. The conductive film 120a having a function as the fourth wiring is formed in the same process on the same plane as the conductive film 220 having a function as the pixel electrode. In other words, the conductive film 113 having a function as the second wiring is formed in the same layer as the conductive film 104 having a function as the first gate electrode of the transistor 100A. The third wiring The conductive film 115a having a function as a line is formed in the same layer as the conductive film 112a having a function as the source electrode of the transistor 100A and the conductive film 112b having a function as the drain electrode. The conductive film 120a having a function as the fourth wiring is formed in the same layer as the conductive film 220 having a function as the pixel electrode.

[0092] In other words, the conductive film 220 having a function as the pixel electrode, the conductive film 1 20b having a function as the first wiring and the conductive film 120a having a function as the fourth wiring are formed in the same process. In other words, the conductive film 220 having a function as the pixel electrode, the conductive film 1 having a function as the first wiring 20b and the conductive film 120a having a function as the fourth wiring are formed in the same layer. The conductive film 220 having a function as the pixel electrode, the conductive film 120b having a function as the first wiring and the conductive film 120a having a function as the fourth wiring are formed in the same process. In other words, the conductive film 220 having a function as the pixel electrode, the conductive film 120b having a function as the first wiring and the conductive film 120a having a function as the fourth wiring are formed in the same layer.

[0093] The conductive film 220 having a function as the pixel electrode, the conductive film 1 20b having a function as the first wiring and the conductive film 120a having a function as the fourth wiring are formed in the same process. In other words, the conductive film 220 having a function as the pixel electrode, the conductive film 1 having a function as the first wiring 20b and the conductive film 120a having a function as the fourth wiring are formed in the same layer. is formed. Further, the conductive film 220 having the function as a pixel electrode, the conductive film 120b having the function as a first wiring, and the conductive film 120a having the function as a fourth wiring are in contact with the upper surface of the insulating film 119 having the function as a planarization film. The conductive film 120b having the function as a first wiring and the conductive film 120a having the function as a fourth wiring are in contact with the upper surface of the insulating film 119 having the function as a planarization film.

[0094] <Components of the display device> Next, the components included in the display device of the present embodiment will be described in detail.

[0095] [Substrate] There are no major restrictions on the material of the substrate 102, etc., but at least it needs to have heat resistance enough to withstand subsequent heat treatment. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, etc. may be used as the substrate 102. Also, a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, etc. made of silicon or silicon carbide can be applied, and those with semiconductor elements provided thereon may be used as the substrate 102. When using a glass substrate as the substrate 102, large-sized display devices can be manufactured by using large-area substrates such as the 6th generation (1500 mm × 1850 mm), 7th generation (1870 mm × 2200 mm), 8th generation (2200 mm × 2400 mm), 9th generation (2400 mm × 2800 mm), 10th generation (2950 mm × 3400 mm), etc. When using a glass substrate as the substrate 102, large-sized display devices can be manufactured by using large-area substrates such as the 6th generation (1500 mm × 1850 mm), 7th generation (1870 mm × 2200 mm), 8th generation (2200 mm × 2400 mm), 9th generation (2400 mm × 2800 mm), 10th generation (2950 mm × 3400 mm), etc. mm), 8th generation (2200 mm × 2400 mm), 9th generation (2400 mm × 2800 mm), 10th generation (2950 mm × 3400 mm), etc.

[0096] Also, a flexible substrate may be used as the substrate 102, and transistors 100A and 200A may be directly formed on the flexible substrate. Or, a release layer may be provided between the substrate 102 and the transistors 100A and 200A. The release layer is a layer on which a semiconductor device is partially or completely completed. ​​​​​​​​​​After separation from the substrate 102, it can be used for transfer to another substrate. At that time, The transistors 100A and 200A can be transferred to a substrate with poor heat resistance or a flexible substrate.

[0097] [Conductive film] As the conductive films 104 and 204 having the function of the gate electrode, the conductive films 11 2a and 212a, and the conductive films 112b and 212b having the function of the drain electrode, chromium (Cr), copper (Cu), aluminum (Al), gold (Au), silver (Ag), zinc (Zn ), molybdenum (Mo), tantalum (Ta), titanium (Ti), tungsten (W), m anganese (Mn), nickel (Ni), iron (Fe), cobalt (Co) selected metal ele ments, or alloys containing the above-mentioned metal elements as components, or alloys combining the above-mentioned metal elements can be used to form them respectively.

[0098] In addition, for the conductive films 104, 112a, 112b, 204, 212a, and 212b, oxides having indium and tin (In-Sn oxide), oxides having indium and tungsten (In-W oxide), oxides having indium, tungsten, and zinc (In-W-Zn oxide), oxides having indium and titanium (In-Ti oxide), oxides having indium, titanium, and tin (In-Ti-Sn oxide), oxides having indium and zinc (In-Zn oxide), oxides having indium, tin, and silicon (In-Sn-Si oxide), oxides having indium, gallium, and zinc (In-Ga-Zn oxide), etc., oxide conductors or oxide semiconductors can also be applied. oxide), etc., oxide conductors or oxide semiconductors can also be applied. oxide), etc., oxide conductors or oxide semiconductors can also be applied.

[0099] ​Here, the oxide conductor will be described. In this specification and the like, the oxide conductor may be referred to as OC( Oxide Conductor). As the oxide conductor, for example, When oxygen deficiency is formed in the oxide semiconductor and hydrogen is added to the oxygen deficiency, donor levels are formed in the vicinity of the conduction band. As a result, the oxide semiconductor becomes highly conductive and turns into a conductor. The oxide semiconductor that has become conductive can be called an oxide conductor. Generally, an oxide semiconductor has a large energy gap and thus has translucency to visible light. On the other hand, an oxide conductor is an oxide semiconductor having donor levels in the vicinity of the conduction band. Therefore, an oxide conductor is less affected by absorption due to donor levels and has a translucency similar to that of an oxide semiconductor to visible light .

[0100] The oxide conductor has a function as a channel and is a metal oxide, and as an example, it has a higher hydrogen concentration than an oxide semiconductor , typically 8×10 19 atoms / cm 3 or more, preferably 1× 10 20 atoms / cm 3 or more, preferably 5×10 20 atoms / cm 3 or more. .

[0101] The oxide conductor has conductivity by having defects and containing impurities. The resistivity of the conductive film having the oxide conductor is 1×10 -3 Ωcm or more and less than 1×10 4 Ωcm, and more preferably, the resistivity is 1×10 Ωcm or more and less than 1×10 -3 Ωcm. -1 .

[0102] In addition, the conductivity of the conductive film having an oxide conductor is typically 1×10 -2 S / m or more and 1× 10 5 S / m or less, or 1×10 3 S / m or more and 1×10 5 S / m or less.

[0103] In addition, the oxide conductor contains defects together with impurities. Typically, the conductive film having an oxide conductor is a film in which defects are generated by adding a rare gas. Or, it is a film in which defects are generated by being exposed to plasma.

[0104] In addition, a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied to the conductive films 104, 112a, 112b, 204, 212a, and 212b. By using a Cu-X alloy film, it can be processed in a wet etching process, so that the manufacturing cost can be suppressed. Since the resistance of the Cu-X alloy film is low, by forming the conductive films 10 4, 112a, 112b, 204, 212a, and 212b using a Cu-X alloy film, it is possible to reduce wiring delay. Therefore, it is preferable to use a Cu-X alloy film as a wiring in manufacturing a large display device.

[0105] In addition, among the above-described metal elements, the conductive films 112a, 112b, 212a, and 212b preferably have any one or more selected particularly from copper, titanium, tungsten, tantalum, and molybdenum. In particular, it is preferable to use a tantalum nitride film as the conductive films 112a, 112b, 212a, and 21 2b. The tantalum nitride film has conductivity and also has high barrier properties against copper or hydrogen. In addition, the tantalum nitride film has high barrier properties against copper or hydrogen. Also, the tantalum nitride film Furthermore, since the hydrogen release from itself is small, it can be most preferably used as the conductive film in contact with the metal oxide films 108 and 208 , or as the conductive film in the vicinity of the metal oxide films 108 and 208. Also, when a copper film is used as the conductive films 112a, 112b, 212a, and 212b, it is preferable because the resistance of the conductive films 112a, 112b, 212a, and 212b can be lowered.

[0106] In addition, the conductive films 112a, 112b, 212a, and 212b can be formed by electroless plating. As the material that can be formed by the electroless plating method, for example, any one or more selected from Cu, Ni, Al, Au, Sn, Co, Ag, and Pd can be used. In particular, when Cu or Ag is used, it is preferable because the resistance of the conductive film can be lowered.

[0107] [Insulating film having a function as a gate insulating film] As the insulating film 106 having a function as a gate insulating film of the transistors 100A and 200A, by plasma enhanced chemical vapor deposition (PECVD), sputtering method, etc., a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, a hafnium oxide film, a yttrium oxide film, a zirconium oxide film, a gallium oxide film, a tantalum oxide film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, and a neodymium oxide film including one or more kinds of insulating layers can be used. Note that the insulating film 106 may have a laminated structure of two layers or three or more layers.

[0108] Also, a metal oxide having a function as a channel region of transistors 100A and 200A The insulating film 106 in contact with the films 108 and 208 is preferably an oxide insulating film, and more preferably has a region containing oxygen in excess of the stoichiometric composition (excess oxygen region). That is, the insulating film 106 is an insulating film capable of releasing oxygen. In order to provide an excess oxygen region in the insulating film 106, for example, the insulating film 106 may be formed in an oxygen atmosphere or the formed insulating film 106 may be heat-treated in an oxygen atmosphere.

[0109] When hafnium oxide is used as the insulating film 106, the following effects are achieved. Hafnium oxide has a higher relative dielectric constant than silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used, the film thickness of the insulating film 106 can be increased, so that the leakage current due to tunneling current can be reduced. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystal structure has a higher relative dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with a small off-current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited thereto.

[0110] However, the present invention is not limited to the above configuration, and a nitride insulating film may be used for the insulating film in contact with the metal oxide films 108 and 208. As an example of such a configuration, a silicon nitride film is formed, and the surface of the silicon nitride film is subjected to oxygen plasma treatment or the like, so that the surface of the silicon nitride film ​​​​​​​​​​​​Configurations for oxidation and the like can be mentioned. When oxygen plasma treatment or the like is performed on the surface of the silicon nitride film, the surface of the silicon nitride film may be oxidized at the atomic level. Therefore, even when observing the cross-section of the transistor, an oxide film may not be observed. That is, when observing the cross-section of the transistor, the silicon nitride film and the metal oxide may be observed to be in contact. When oxygen plasma treatment or the like is performed on the surface of the silicon nitride film, the surface of the silicon nitride film may be oxidized at the atomic level. Therefore, even when observing the cross-section of the transistor, an oxide film may not be observed. That is, when observing the cross-section of the transistor, an oxide film may not be observed. That is, when observing the cross-section of the transistor, the silicon nitride film and the metal oxide may be observed to be in contact. That is, when observing the cross-section of the transistor, the silicon nitride film and the metal oxide may be observed to be in contact.

[0111] Note that the silicon nitride film has a higher relative permittivity compared to the silicon oxide film, and since the film thickness required to obtain the same capacitance is large, including the silicon nitride film as the gate insulating film of the transistor can thicken the insulating film. Therefore, it is possible to suppress a decrease in the breakdown voltage of the transistor and further improve the breakdown voltage to suppress electrostatic breakdown of the transistor. Note that the silicon nitride film has a higher relative permittivity compared to the silicon oxide film, and since the film thickness required to obtain the same capacitance is large, including the silicon nitride film as the gate insulating film of the transistor can thicken the insulating film. Therefore, it is possible to suppress a decrease in the breakdown voltage of the transistor and further improve the breakdown voltage to suppress electrostatic breakdown of the transistor. Therefore, it is possible to suppress a decrease in the breakdown voltage of the transistor and further improve the breakdown voltage to suppress electrostatic breakdown of the transistor. Therefore, it is possible to suppress a decrease in the breakdown voltage of the transistor and further improve the breakdown voltage to suppress electrostatic breakdown of the transistor.

[0112] Note that in this embodiment, a laminated film of a silicon nitride film and a silicon oxide film is formed as the insulating film 106. Note that in this embodiment, a laminated film of a silicon nitride film and a silicon oxide film is formed as the insulating film 106.

[0113] [Metal Oxide Film] As the metal oxide films 108 and 208, the materials shown above can be used.

[0114] When the metal oxide films 108 and 208 are In-M-Zn oxides, the atomic ratio of the metal elements of the sputtering target used for forming the In-M-Zn oxide film preferably satisfies In>M. When the metal oxide films 108 and 208 are In-M-Zn oxides, the atomic ratio of the metal elements of the sputtering target used for forming the In-M-Zn oxide film preferably satisfies In>M. For such an atomic ratio of the metal elements of the sputtering target, In:M:Zn = 2:1:3, In:M:Zn = 3:1:2, In:M:Zn = 4:2: 4.1, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = Examples include 5:1:8, In:M:Zn = 6:1:6, In:M:Zn = 5:2:5, etc. .

[0115] Also, when the metal oxide films 108 and 208 are formed of an In-M-Zn oxide, it is preferable to use a target containing polycrystalline In-M-Zn oxide as a sputtering target. By using a target containing polycrystalline In-M-Zn oxide, it becomes easier to form the metal oxide films 108 and 208 having crystallinity. Note that the atomic ratio of the metal oxide films 108 and 208 to be formed includes a variation of plus or minus 40% of the atomic ratio of the metal elements contained in the above sputtering target. For example, when the composition of the sputtering target used for the metal oxide films 108 and 208 is In:Ga:Zn = 4:2:4.1 [atomic ratio], the composition of the metal oxide films 108 and 208 to be formed may be

[0116] near In:Ga:Zn = 4:2:3 [atomic ratio]. Also, the metal oxide films 108 and 208 preferably have an energy gap of 2 eV or more, preferably 2.5 eV or more. By using an oxide semiconductor having a wide

[0117] energy gap in this way, the off-current of the transistors 100A and 200A can be reduced. Also, the metal oxide films 108 and 208 preferably have a non-single crystal structure. The non-single crystal structure includes, for example, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), polycrystalline structure,

[0118] Also, even if the metal oxide films 108_1, 108_2, 208_1, and 208_2 each independently have a region where the atomic ratio of In is higher than the atomic ratio of M, if the crystallinity of each of the metal oxide films 108_ 1, 108_2, 208_1, and 208_2 is high, the field-effect mobility may decrease.

[0119] Therefore, the metal oxide film 108_1 may have a region with lower crystallinity than the metal oxide film 108_2. Also, the metal oxide film 208_1 may have a region with lower crystallinity than the metal oxide film 208_2. Note that the crystallinity of the metal oxide films 108_1, 108_2, 208_1, 208_2 can be analyzed, for example, by using X-ray diffraction (XRD: X-Ray Diffrac tion) or by using a transmission electron microscope (TEM: Transmis sion Electron Microscope).

[0120] When the metal oxide films 108_1 and 208_1 have regions with low crystallinity, they have the following excellent effects.

[0121] First, the oxygen vacancies that can be formed in the metal oxide film 108 will be described.

[0122] The oxygen vacancies formed in the metal oxide film 108 are a problem because they affect the transistor characteristics. For example, when oxygen vacancies are formed in the metal oxide film 108, hydrogen binds to the oxygen vacancies and becomes a carrier supply source. When a carrier supply source is generated in the metal oxide film 108 the electrical characteristics of the transistor 100A having the metal oxide film 108 fluctuate, typically the threshold ​​​A shift in the threshold voltage occurs. Therefore, in the metal oxide film 108, it is preferable that the oxygen deficiency is less. The less, the better.

[0123] Therefore, in one aspect of the present invention, the insulating films near the metal oxide film 108, specifically, the insulating films 114 and 116 formed above the metal oxide film 108, are configured to contain excess oxygen. By moving oxygen or excess oxygen from the insulating films 114 and 116 to the metal oxide film 108, it becomes possible to reduce the oxygen deficiency in the metal oxide film.

[0124] Here, with reference to FIGS. 45(A) and 45(B), the path of oxygen or excess oxygen diffusing into the metal oxide film 108 will be described. FIGS. 45(A) and 45(B) are conceptual diagrams showing the diffusion paths of oxygen or excess oxygen diffusing into the metal oxide film 108. FIG. 45(A) is a conceptual diagram in the channel length direction, and FIG. 45(B) is a conceptual diagram in the channel width direction. Here, although the metal oxide film 108 is used for explanation, in the metal oxide film 208 as well, oxygen diffuses in the same manner as in the metal oxide film 108.

[0125] The oxygen or excess oxygen contained in the insulating films 114 and 116 diffuses from the upper side, that is, through the metal oxide film 108_2, into the metal oxide film 108_1 (Route 1 shown in FIGS. 45(A) and 45(B)). (B)).

[0126] Alternatively, the oxygen or excess oxygen contained in the insulating films 114 and 116 diffuses into the metal oxide film 108 from the side surfaces of the metal oxide film 108_1 and the metal oxide film 108_2 respectively (Route 2 shown in FIG. 45(B)).

[0127] ​​​​​​​​​​For example, in the case of Route1 shown in FIGS. 45(A) and 45(B), when the crystallinity of the metal oxide film 108 _2 is high, it may inhibit the diffusion of oxygen or excess oxygen. On the other hand, in the case of Route2 shown in FIG 45(B), oxygen or excess oxygen can be diffused into the metal oxide film 108_1 and the metal oxide film 10 8_2 from the side surfaces of the metal oxide film 108_1 and the metal oxide film 108_2 respectively. It becomes possible.

[0128] Also, in the case of Route2 shown in FIG. 45(B), when the metal oxide film 108_1 has a region with lower crystallinity than the metal oxide film 108_2, this region serves as a diffusion path for excess oxygen, and excess oxygen can also be diffused into the metal oxide film 108_2 with higher crystallinity than the metal oxide film 108_1. Although not shown in FIGS. 45(A) and 45(B), when the insulating film 106 contains oxygen or excess oxygen, oxygen or excess oxygen can also diffuse from the insulating film 106 into the metal oxide film 108. By adopting a laminated structure of metal oxide films with different crystallinities and using the region with lower crystallinity as the diffusion path for excess oxygen, a highly reliable transistor can be provided.

[0129] When the metal oxide film 108 is composed only of metal oxide films with low crystallinity, impurities (for example, hydrogen or moisture, etc.) may adhere to the back channel side, that is, the region corresponding to the metal oxide film 108_2, or impurities may be mixed in, resulting in poor reliability.

[0130] Impurities such as hydrogen or moisture mixed into the metal oxide film 108 affect the transistor characteristics.

[0131] ​​​​​This poses a problem in order to provide. Therefore, in the metal oxide film 108, hydrogen or moisture The fewer impurities such as are, the more preferable.

[0132] Therefore, by enhancing the crystallinity of the metal oxide film on the upper layer of the metal oxide film 108, impurities that can be mixed into the metal oxide film 108 can be suppressed. In particular, by enhancing the crystallinity of the metal oxide film 108_2, damage during processing of the conductive films 112a and 112b can be suppressed in this way. The surface of the metal oxide film 108, that is, the surface of the metal oxide film 108_2, is exposed to the etchant or etching gas during processing of the conductive films 112a and 112b. However, when the metal oxide film 108_2 has a region with high crystallinity, it has better etching resistance compared to the metal oxide film 108_1 with low crystallinity. Therefore, the metal oxide film 108_2 functions as an etch stopper.

[0133] In addition, as the metal oxide film 108, by using a metal oxide film with a low impurity concentration and a low defect level density, a transistor having excellent electrical characteristics can be preferably fabricated . Here, having a low impurity concentration and a low defect level density (few oxygen deficiencies) is called high-purity genuine or substantially high-purity genuine. In addition, typical examples of impurities in the metal oxide film include water, hydrogen, etc. In this specification and the like, reducing or removing water and hydrogen from the metal oxide film may be expressed as dehydration or dehydrogenation. Also, adding oxygen to the metal oxide film, or the oxide insulating film may be expressed as oxygen addition, and a state having oxygen addition and more oxygen than the stoichiometric composition may be expressed as a peroxide state.

[0134] A metal oxide film that is highly pure and truly or substantially highly pure and truly has few carrier generation sources, so that the carrier density can be lowered. Therefore, a transistor in which a channel region is formed in the metal oxide film seldom has electrical characteristics (also referred to as normally on) in which the threshold voltage becomes negative. Also, a metal oxide film that is highly pure and truly or substantially highly pure and truly may have a low trap level density because the density of defect levels is low. Also, a metal oxide film that is highly pure and truly or substantially highly pure and truly has an extremely small off-current, and even in an element with a channel width of 1 × 10 μm and a channel length L of 10 μm, the off-current can be below the measurement limit of a semiconductor parameter analyzer, that is, 1 × 10 6 A or less, in the range where the voltage (drain voltage) between the source electrode and the drain electrode is from 1 V to 10 V. That is, the following characteristics can be -13 obtained.

[0135] Also, the metal oxide film 108_1 may have a region with lower crystallinity than the metal oxide film 108_2, resulting in a higher carrier density.

[0136] Also, when the carrier density of the metal oxide film 108_1 increases, the Fermi level may become relatively higher with respect to the conduction band of the metal oxide film 108_1. As a result, the lower end of the conduction band of the metal oxide film 108_1 becomes lower, and the energy difference between the lower end of the conduction band of the metal oxide film 108_1 and trap levels that can be formed in the gate insulating film (here, the insulating film 106) may become large. When this energy difference becomes large, the amount of charge trapped in the gate insulating film decreases, and the fluctuation of the threshold voltage of the transistor may be reduced. ​​​This is also the case when the carrier density of the metal oxide film 108_1 increases, the field effect mobility of the metal oxide film 108 can be increased.

[0137] [Insulating film 1 having a function as a protective insulating film] The insulating films 114 and 116 function as protective insulating films for the transistors 100A and 200A. In addition, the insulating films 114 and 116 have a function of supplying oxygen to the metal oxide films 108 and 208. That is, the insulating films 114 and 116 contain oxygen. Also, the insulating film 114 is an insulating film that can permeate oxygen. Note that the insulating film 114 also functions as a damage relaxation film for the metal oxide films 108 and 208 when forming the subsequent insulating film 116.

[0138] As the insulating film 114, a silicon oxide film, a silicon oxynitride film, etc. with a thickness of 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less can be used.

[0139] In addition, the insulating film 114 preferably has a small amount of defects. Typically, by ESR measurement, the spin density of the signal appearing at g = 2.001 derived from silicon dangling bonds is 3×10 17 spins / cm 3 or less. If the defect density in the insulating film 114 is high, oxygen binds to the defects, and the oxygen permeability in the insulating film 114 decreases.

[0140] In the insulating film 114, all the oxygen that enters the insulating film 114 from the outside does not move outside the insulating film 114 and some oxygen remains in the insulating film 114. Also, oxygen enters the insulating film 114 ​​​​At the same time, oxygen contained in the insulating film 114 moves to the outside of the insulating film 114, so oxygen migration may occur in the insulating film 114. When an oxide insulating film that can permeate oxygen is formed as the insulating film 114, oxygen that separates from the insulating film 116 provided on the insulating film 114 can be moved to the metal oxide films 108 and 208 through the insulating film 114.

[0141] In addition, the insulating film 114 can be formed using an oxide insulating film with a low level density caused by nitrogen oxides. The level density caused by the nitrogen oxides may be formed between the energy (Ev_os) at the upper end of the valence electron band of the metal oxide film and the energy (Ec _os) at the lower end of the conduction band of the metal oxide film. As the oxide insulating film, a silicon oxynitride film with a low nitrogen oxide emission amount or an aluminum oxynitride film with a low nitrogen oxide emission amount can be used.

[0142] A silicon oxynitride film with a low nitrogen oxide emission amount is a film in which the ammonia emission amount is larger than the nitrogen oxide emission amount in thermal desorption spectroscopy (TDS : Thermal Desorption Spectroscopy). Typically, the ammonia emission amount is a film in which the ammonia emission amount is more than the nitrogen oxide emission amount, and typically the ammonia emission amount is 1×10 18 / cm 3 or more and 5×10 19 / cm 3 or less. The ammonia emission amount is the emission amount by heat treatment when the surface temperature of the film is 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower.

[0143] Nitrogen oxides (NO x , where x is greater than 0 and less than or equal to 2, preferably 1 or more and 2 or less), typically ​​​​​​​​NO2 or NO forms levels in the insulating film 114 or the like. These levels are located within the energy gaps of the metal oxide films 108 and 208. Therefore, when nitrogen oxides diffuse to the interface between the insulating film 1 14 and the metal oxide films 108 and 208, these levels may trap electrons on the insulating film 114 side. As a result, since the trapped electrons remain near the interface between the insulating film 114 and the metal oxide films 108 and 208, the threshold voltage of the transistor is shifted in the positive direction.

[0144] In addition, nitrogen oxides react with ammonia and oxygen during heat treatment. The nitrogen oxides contained in the insulating film 114 react with the ammonia contained in the insulating film 116 during heat treatment, so the nitrogen oxides contained in the insulating film 114 are reduced. For this reason, it is difficult for electrons to be trapped at the interface between the insulating film 114 and the metal oxide films 108 and 208.

[0145] By using the oxide insulating film as the insulating film 114, it is possible to reduce the shift of the threshold voltage of the transistor and reduce the variation in the electrical characteristics of the transistor. It can be done.

[0146] In addition, the nitrogen concentration measured by SIMS in the oxide insulating film is 6×10 20 atoms / cm 3 or less.

[0147] When the substrate temperature is 220°C or higher and 350°C or lower, and the oxide insulating film is formed by using the PECVD D method using silane and nitrous oxide, a dense and high-hardness film can be formed.

[0148] ​​The insulating film 116 is an oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition. Some of the oxygen is desorbed from the above oxide insulating film by heating. In TDS, the above oxide insulating film has an oxygen release amount of 1.0×10 19 atoms / cm 3 or more, preferably 3.0×10 20 atoms / cm 3 or more. Also, the above oxygen release amount is the total amount in the range where the heat treatment temperature in TDS is 50°C or more and 650°C or less, or 50°C or more and 5 50°C or less. Also, the above oxygen release amount is the total amount in terms of oxygen atoms in TDS.

[0149] As the insulating film 116, a silicon oxide film, a silicon oxynitride film, etc. with a thickness of 30 nm or more and 500 nm or less, preferably 50 nm or more and 4 00 nm or less can be used.

[0150] Also, the insulating film 116 preferably has a small amount of defects. Typically, by ESR measurement, the spin density of the signal appearing at g = 2.001 derived from the dangling bonds of silicon is 1.5×10 18 spins / cm 3 less than, and more preferably 1×10 18 spins / cm 3 or less. Note that since the insulating film 116 is separated from the metal oxide films 108 and 208 compared to the insulating film 114, the defect density may be higher than that of the insulating film 114.

[0151] Also, since the insulating films 114 and 116 can use insulating films of the same material, the interface between the insulating film 114 and the insulating film 116 may not be clearly confirmed. Therefore, in this embodiment In this state, the interface between the insulating film 114 and the insulating film 116 is illustrated by a dashed line. In this embodiment, the two-layer structure of the insulating film 114 and the insulating film 116 has been described, but this is not limited thereto. For example, it may be a single-layer structure of the insulating film 114 or a stacked structure of three or more layers. That's fine.

[0152] [Insulating film 2 having a function as a protective insulating film] The insulating film 118 functions as a protective insulating film for the transistors 100A and 200A.

[0153] The insulating film 118 has either or both of hydrogen and nitrogen. Or, the insulating film 11 8 has nitrogen and silicon. Also, the insulating film 118 has a function of being able to block oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. By providing the insulating film 118, the external diffusion of oxygen from the metal oxide films 108 and 208, the external diffusion of oxygen contained in the insulating films 114 and 116, and the entry of hydrogen, water, etc. from the outside into the metal oxide films 108 and 208 can be prevented.

[0154] As the insulating film 118, for example, a nitride insulating film can be used. Examples of the nitride insulating film include a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxynitride film, etc.

[0155] Note that as various films such as the conductive film, insulating film, metal oxide film, and metal film described above, they can be formed by a sputtering method or a PECVD method, but other methods, for example, a thermal C VD (Chemical Vapor Deposition) method may also be used to form them. As an example of the thermal CVD method, MOCVD (Metal Organic Chemical . As an example of the thermal CVD method, MOCVD (Metal Organic Chemical ​​​Chemical Vapor Deposition) method, or ALD (Atomic Layer D eposition) method, etc. can be mentioned.

[0156] Since the thermal CVD method is a film formation method that does not use plasma, it has the advantage that defects are not generated due to plasma damage. Also, as the thermal CVD method, a source gas is sent into the chamber , the inside of the chamber is set to atmospheric pressure or reduced pressure, and a film may be deposited on the substrate.

[0157] Also, as the ALD method, a source gas is sent into the chamber, the inside of the chamber is set to atmospheric pressure or reduced pressure, and a film may be deposited on the substrate.

[0158] <Configuration Example 2 of Display Device> Cross-sectional views of the transistors included in the pixel portion and the driving circuit of the display device according to one aspect of the present invention are shown in FIGS. 3(A), 3(B), and 3(C). The display devices shown in FIGS. 3(A), 3(B), and 3(C ) have a different structure from the transistors of the display devices shown in FIGS. 1(A), 1(B), and 1(C). Since the top view is the same as the configuration shown in FIG. 2, FIG. 2 is incorporated by reference.

[0159] The display device according to one aspect of the present invention includes a transistor 100B, a transistor 200B, a capacitive element 250B, and a connection portion 150B.

[0160] FIG. 3(A) is a cross-sectional view of the transistor 200B and the capacitive element 250B included in the pixel portion and corresponds to a cross-sectional view of the cut surface between the dashed-dotted line X1-X2 in FIG. 2(A). FIG. 3(B ) is a cross-sectional view of the transistor 100B and the connection portion 150B included in the driving circuit and corresponds to a cross-sectional view of the cut surface between the dashed-dotted line X3-X4 in FIG. 2(B). FIG. 3(C) is a cross-sectional view of the driving It is a cross-sectional view of the transistor 100B included in the driving circuit, corresponding to the cross-sectional view of the cut surface between the dashed-dotted line Y1-Y in Fig. 2(B). It corresponds to the cross-sectional view of the cut surface between the dashed-dotted line Y1-Y in Fig. 2(B).

[0161] As shown in Fig. 3(A), the pixel portion has a transistor 200B, a conductive film 220 having a function as a pixel electrode, and a capacitor element 250B. Note that the conductive film 220 functioning as a pixel electrode is electrically connected to the transistor 200B. Since the transistor 200B and the capacitor element 250B can be referred to the transistor 200A and the capacitor element 250A shown in Fig. 1(A), detailed description thereof will be omitted. It has a conductive film 220 functioning as a pixel electrode, and a capacitor element 250B. Note that the conductive film 220 functioning as a pixel electrode is electrically connected to the transistor 200B. Since the transistor 200B and the capacitor element 250B can be referred to the transistor 200A and the capacitor element 250A shown in Fig. 1(A), detailed description thereof will be omitted. 220 is electrically connected to the transistor 200B. The transistor 200B and the capacitor element 250B can be referred to the transistor 200A and the capacitor element 250A shown in Fig. 1(A), so detailed description thereof will be omitted. The transistor 200B and the capacitor element 250B can be referred to the transistor 200A and the capacitor element 250A shown in Fig. 1(A), so detailed description thereof will be omitted. Since the transistor 200B and the capacitor element 250B can be referred to the transistor 200A and the capacitor element 250A shown in Fig. 1(A), detailed description thereof will be omitted.

[0162] As shown in Fig. 3(B) and Fig. 3(C), the driving circuit has a transistor 100B and a connection portion 150B. It has a transistor 100B and a connection portion 150B.

[0163] The transistor 100B has a conductive film 104 on the substrate 102, an insulating film 106 on the substrate 102 and the conductive film 104, a metal oxide film 108 on the insulating film 106, a conductive film 112a on the metal oxide film 108, a conductive film 112b on the metal oxide film 108, an insulating film 114 on the metal oxide film 108, the conductive film 112a and the conductive film 112b, an insulating film 116 on the insulating film 114, and a conductive film 132a on the insulating film 116. The insulating film 106 functions as a first gate insulating film, and the insulating film 114 and the insulating film 116 function as a second gate insulating film. Also, in the transistor 100B, the conductive film 104 functions as a first gate electrode, and the conductive film 132a functions as a second gate electrode. Also, in the transistor 100B, The insulating film 106 functions as a first gate insulating film, and the insulating film 114 and the insulating film 116 function as a second gate insulating film. Also, in the transistor 100B, the conductive film 104 functions as a first gate electrode, and the conductive film 132a functions as a second gate electrode. Also, in the transistor 100B, The insulating film 106 functions as a first gate insulating film, and the insulating film 114 and the insulating film 116 function as a second gate insulating film. Also, in the transistor 100B, the conductive film 104 functions as a first gate electrode, and the conductive film 132a functions as a second gate electrode. Also, in the transistor 100B, The insulating film 106 functions as a first gate insulating film, and the insulating film 114 and the insulating film 116 function as a second gate insulating film. Also, in the transistor 100B, the conductive film 104 functions as a first gate electrode, and the conductive film 132a functions as a second gate electrode. Also, in the transistor 100B,

[0164] In the transistor 100B, the insulating film 106 functions as a first gate insulating film, and the insulating film 114 and the insulating film 116 function as a second gate insulating film. Also, in the transistor 100B, the conductive film 104 functions as a first gate electrode, and the conductive film 132a functions as a second gate electrode. Also, in the transistor 100B, The insulating film 106 functions as a first gate insulating film, and the insulating film 114 and the insulating film 116 function as a second gate insulating film. Also, in the transistor 100B, the conductive film 104 functions as a first gate electrode, and the conductive film 132a functions as a second gate electrode. Also, in the transistor 100B, The insulating film 106 functions as a first gate insulating film, and the insulating film 114 and the insulating film 116 function as a second gate insulating film. Also, in the transistor 100B, the conductive film 104 functions as a first gate electrode, and the conductive film 132a functions as a second gate electrode. Also, in the transistor 100B, The insulating film 106 functions as a first gate insulating film, and the insulating film 114 and the insulating film 116 function as a second gate insulating film. Also, in the transistor 100B, the conductive film 104 functions as a first gate electrode, and the conductive film 132a functions as a second gate electrode. Also, in the transistor 100B, In this case, the conductive film 112a has a function as a source electrode, and the conductive film 112b has a function as a drain electrode.

[0165] In the transistor 100B, the ends of the conductive film 112a and the conductive film 112b are located inside the ends of the metal oxide film 108.

[0166] On the transistor 100B, specifically, an insulating film 11 8 and an insulating film 119 on the insulating film 118 are formed. In the transistor 100B, the insulating film 118 has a function as a protective insulating film of the transistor 100B. Also, the insulating film 119 has a function as a planarizing film.

[0167] In the transistor 100B, the insulating films 106, 114, 116, 1 18, and 119 have openings 146b in a region overlapping with the conductive film 104. Also, the insulating film 119 has an opening 148b in a region overlapping with the conductive film 132a. The conductive film 120b having a function as a first wiring is electrically connected to the conductive film 132a and the conductive film 104 through the opening 146b and the opening 148b. By providing the conductive film 120b, the conductive film 104 having a function as a first gate electrode of the transistor 100B and the conductive film 132a having a function as a second gate electrode are electrically connected.

[0168] Note that the transistor 100B is a so-called channel etch type transistor and has a dual gate structure.

[0169] Also, as the conductive film 132a, the aforementioned oxide conductor (OC) is preferable. The conductive film 13 ​By using an oxide conductor for 2a, oxygen can be added to the insulating films 114 and 116. The oxygen added to the insulating films 114 and 116 can move to the metal oxide films 108 and 208 and can fill the oxygen vacancies in the metal oxide films 108 and 208. As a result, it is possible to improve the reliability of the transistors 100B and 200B.

[0170] Also, as shown in FIG. 3(B), the metal oxide film 108 of the transistor 100B is positioned to face the conductive film 104 and the conductive film 132a and is sandwiched between the conductive films having the functions of two gate electrodes. The length of the conductive film 132a in the channel length direction and the length of the conductive film 132a in the channel width direction are each longer than the length of the metal oxide film 108 in the channel length direction and the length of the metal oxide film 108 in the channel width direction, and the entire metal oxide film 108 is covered by the conductive film 132a via the insulating films 114 and 116.

[0171] In other words, the conductive film 104 and the conductive film 132a are connected at the openings provided in the insulating films 106, insulating film 114, insulating film 116, insulating film 118, and insulating film 119, and have regions located outside the side ends of the metal oxide film 108.

[0172] By having such a configuration, the metal oxide film 108 included in the transistor 100B can be electrically surrounded by the electric fields of the conductive film 104 and the conductive film 132a, resulting in an S-channel structure. For the S-channel structure, reference can be made to the above description.

[0173] The connection portion 150B has a conductive film 113 having a function as a second wiring on the substrate 102 and a first The insulating film 106, the insulating film 114, and the insulating film 112 on the conductive film 113 having the function of the wiring 16, an opening 142b provided in the insulating film 118 and the insulating film 119, and a metal oxide film 12 A conductive film 115a having a function as a third wiring on the substrate 8 and a conductive film 115b having a function as a third wiring on the substrate 8 are The insulating films 114, 116, 118, and 119 on the conductive film 115a are The opening 144b is formed so as to cover the opening 142b and the opening 144b. The conductive film 113 having a function as a second wiring and the conductive film 114 having a function as a third wiring are A conductive film 120a having a function as a fourth wiring that connects the conductive film 115a. In FIG. 3B, the shape of the openings 142b and 144b is changed by one step. However, it may have a plurality of shapes, such as two stages.

[0174] In the connection portion 150B, the end of the conductive film 115a is located inside the end of the metal oxide film 128. Located in.

[0175] The conductive film 113 functioning as a second wiring is connected to the first gate of the transistor 100B. The third wiring is formed on the same plane as the conductive film 104 having the function as an electrode in the same process. The conductive film 115a having the function of a line serves as the source electrode of the transistor 100B. The conductive film 112a having a function as a drain electrode and the conductive film 112b having a function as a drain electrode are the same. The conductive film 120a having the function of the fourth wiring is formed on one plane in the same process. It is formed on the same plane and in the same process as the conductive film 220 having the function as a pixel electrode.

[0176] In other words, the conductive film 113 functioning as the second wiring is It is formed in the same layer as the conductive film 104 having the function as the first gate electrode. The third wiring The conductive film 115a having the function as the third wiring has the same function as the conductive film 112a having the function as the source electrode of the transistor 100B and the conductive film 112b having the function as the drain electrode and is formed in the same layer. The conductive film 120a having the function as the fourth wiring is formed in the same layer as the conductive film 220 having the function as the pixel electrode .

[0177] The conductive film 220 having the function as the pixel electrode, the conductive film 120b having the function as the first wiring, and the conductive film 120a having the function as the fourth wiring are formed in the same process . In other words, the conductive film 220 having the function as the pixel electrode, the conductive film 120b having the function as the first wiring, and the conductive film 120a having the function as the fourth wiring are formed in the same layer . Further, the conductive film 220 having the function as the pixel electrode, the conductive film 120b having the function as the first wiring, and the conductive film 120a having the function as the fourth wiring are in contact with the upper surface of the insulating film 119 having the function as the planarization film .

[0178] <Configuration Example 3 of Display Device> Cross-sectional views of transistors included in the pixel portion and the drive circuit of the display device according to one aspect of the present invention are shown in FIGS. 4(A), 4(B), and 4(C), and top views are shown in FIGS. 5(A) and 5(B) . The display device shown in FIGS. 4 and 5 has a different structure from the transistors of the display device shown in FIGS. 1(A), 1(B), and 1(C) .

[0179] The display device according to one aspect of the present invention includes a transistor 100C, a transistor 200C, a capacitor element 250C, and a connection portion 150C .

[0180] FIG. 4(A) is a cross-sectional view of the transistor 200C and the capacitor element 250C included in the pixel portion, which corresponds to the cross-sectional view of the cut surface between the dashed-dotted line X1-X2 in FIG. 5(A). FIG. 4(B ) is a cross-sectional view of the transistor 100C and the connection portion 150C included in the drive circuit, and FIG. corresponds to the cross-sectional view of the cut surface between the dashed-dotted line X3-X4 in FIG. 5(B). FIG. 4(C) is a cross-sectional view of the transistor 100C included in the drive circuit, and corresponds to the cross-sectional view of the cut surface between the dashed-dotted line Y1-Y 2 in FIG. 5(B).

[0181] As shown in FIG. 4(A), the pixel portion has a transistor 200C, a conductive film 220 having a function as a pixel electrode, and a capacitor element 250C. Note that the conductive film 220 functioning as a pixel electrode is electrically connected to the transistor 200C. Since the transistor 200C and the capacitor element 250C can be referred to the transistor 200A and the capacitor element 250A shown in FIG. 1(A), detailed description thereof is omitted.

[0182] As shown in FIGS. 4(B) and 4(C), the drive circuit has a transistor 100C and a connection portion 1 50C.

[0183] The transistor 100C has a conductive film 104 on the substrate 102, an insulating film 106 on the substrate 102 and the conductive film 104, a metal oxide film 108 on the insulating film 106, a conductive film 112a on the metal oxide film 108, and a conductive film 112b on the metal oxide film 108.

[0184] In the transistor 100C, the insulating film 106 functions as a gate insulating film. Also, in the transistor 100C, the conductive film 104 functions as a gate electrode, and the conductive ​The conductive film 112a functions as a source electrode, and the conductive film 112b functions as a drain electrode. It has functions.

[0185] In the transistor 100C, the ends of the conductive films 112a and 112b are formed of a metal oxide. It is located inside the end of the membrane 108 .

[0186] Specifically, the metal oxide film 108, the conductive film 112a, and the conductive film 112b are formed on the transistor 100C. An insulating film 114 is formed on the insulating film 112b, an insulating film 116 is formed on the insulating film 114, and an insulating film 116 is formed on the insulating film 116. An insulating film 118 and an insulating film 119 on the insulating film 118 are formed. In the transistor 100C, the insulating film 114, the insulating film 116, and the insulating film 118 are The insulating film 119 functions as a protective insulating film. .

[0187] The insulating film 114, the insulating film 116, the insulating film 118, and the insulating film 119 overlap the conductive film 212b. The conductive film 220 having a function as a pixel electrode has an opening 242c. The portion 242c is electrically connected to the conductive film 212b.

[0188] The transistor 100C is a so-called channel-etched type transistor, and is a single It is a gate structure.

[0189] The connection portion 150C is formed by connecting a conductive film 113 having a function as a second wiring on the substrate 102 and a first The insulating film 106, the insulating film 114, and the insulating film 112 on the conductive film 113 having the function of the wiring 16, an opening 142c provided in the insulating film 118 and the insulating film 119, and a metal oxide film 12 A conductive film 115a having a function as a third wiring on the substrate 8 and a conductive film 115b having a function as a third wiring on the substrate 8 are On the conductive film 115a, there are the insulating films 114, 116, 118, and 119 An opening 144c is provided, and it is formed so as to cover the opening 142c and the opening 144c And a conductive film 120a having a function as a fourth wiring for connecting the conductive film 113 having a function as a second wiring and the conductive film 115a having a function as a third wiring is provided. In addition, in FIG. 4(B), the opening shapes of the opening 142c and the opening 144c are shown in one step , but they may be in a plurality of shapes such as two steps.

[0190] At the connection portion 150C, the end of the conductive film 115a is located inside the end of the metal oxide film 128 .

[0191] The conductive film 113 having a function as a second wiring is formed in the same plane and in the same process as the conductive film 104 having a function as the first gate electrode of the transistor 100C. The conductive film 115a having a function as a third wiring is formed in the same plane and in the same process as the conductive film 112a having a function as the source electrode of the transistor 100C and the conductive film 112b having a function as the drain electrode. The conductive film 120a having a function as a fourth wiring is formed in the same plane and in the same process as the conductive film 220 having a function as a pixel electrode. In other words, the conductive film 113 having a function as a second wiring is formed in the same layer as the conductive film 104 having a function as the first gate electrode of the transistor 100C. The conductive film 115a having a function as a third wiring is formed in the same layer as the conductive film 112a having a function as the source electrode of the transistor 100C and the conductive film 112b having a function as the drain electrode.

[0192] In other words, the conductive film 113 having a function as a second wiring is formed in the same layer as the conductive film 104 having a function as the first gate electrode of the transistor 100C. The third wiring The conductive film 115a having a function as such is formed in the same layer as the conductive film 112a having a function as the source electrode of the transistor 100C and the conductive film 112b having a function as the drain electrode. The conductive film 115a having a function as a third wiring is formed in the same layer as the conductive film 112a having a function as the source electrode of the transistor 100C and the conductive film 112b having a function as the drain electrode. It is formed of layers. The conductive film 120a having the function as the fourth wiring is formed in the same layer as the conductive film 220 having the function as the pixel electrode. It is formed in the same layer as the conductive film 220 having the function as the pixel electrode.

[0193] The conductive film 220 having the function as the pixel electrode, the conductive film 120b having the function as the first wiring, and the conductive film 120a having the function as the fourth wiring are formed in the same process. In other words, the conductive film 220 having the function as the pixel electrode, the conductive film 120b having the function as the first wiring, and the conductive film 120a having the function as the fourth wiring are formed in the same layer. In other words, the conductive film 220 having the function as the pixel electrode, the conductive film 120b having the function as the first wiring, and the conductive film 120a having the function as the fourth wiring are formed in the same layer. In other words, the conductive film 220 having the function as the pixel electrode, the conductive film 120b having the function as the first wiring, and the conductive film 120a having the function as the fourth wiring are formed in the same layer. Further, the conductive film 220 having the function as the pixel electrode, the conductive film 120b having the function as the first wiring, and the conductive film 120a having the function as the fourth wiring are in contact with the upper surface of the insulating film 119 having the function as the planarization film. Further, the conductive film 220 having the function as the pixel electrode, the conductive film 120b having the function as the first wiring, and the conductive film 120a having the function as the fourth wiring are in contact with the upper surface of the insulating film 119 having the function as the planarization film. Further, the conductive film 220 having the function as the pixel electrode, the conductive film 120b having the function as the first wiring, and the conductive film 120a having the function as the fourth wiring are in contact with the upper surface of the insulating film 119 having the function as the planarization film.

[0194] <Configuration Example 4 of Display Device> Cross-sectional views of transistors included in the pixel portion and the drive circuit of the display device according to one aspect of the present invention are shown in FIGS. 6(A), 6(B), and 6(C), and top views are shown in FIGS. 7(A) and 7(B). .

[0195] The display device according to one aspect of the present invention includes a transistor 100D, a transistor 200D, a capacitor element 250D, and a connection portion 150D. It has a capacitor element 250D and a connection portion 150D.

[0196] FIG. 6(A) is a cross-sectional view of the transistor 200D and the capacitor element 250D included in the pixel portion, and corresponds to a cross-sectional view of a cut surface between the dashed-dotted line X1-X2 in FIG. 7(A). FIG. 6(B) is a cross-sectional view of the transistor 100D and the connection portion 150D included in the drive circuit, and corresponds to a cross-sectional view of a cut surface between the dashed-dotted line X3-X4 in FIG. 7(B). FIG. 6(C) is a cross-sectional view of the drive is a cross-sectional view of the transistor 100D and the connection portion 150D included in the drive circuit, and corresponds to a cross-sectional view of a cut surface between the dashed-dotted line X3-X4 in FIG. 7(B). FIG. 6(C) is a cross-sectional view of the drive is a cross-sectional view of the transistor 100D and the connection portion 150D included in the drive circuit, and corresponds to a cross-sectional view of a cut surface between the dashed-dotted line X3-X4 in FIG. 7(B). FIG. 6(C) is a cross-sectional view of the drive It is a cross-sectional view of the transistor 100D included in the dynamic circuit, corresponding to the cross-sectional view of the cut surface between the dashed-dotted line Y1-Y in Fig. 7(B). In Figs. 7(A) and 7(B), for the sake of avoiding complication, some of the components of the transistor 100D, the transistor 200D, and the capacitor element 250D (such as the insulating film having a function as a gate insulating film) are omitted and shown in the figure. Also, in each transistor, the direction of the dashed-dotted line X1-X2 may be referred to as the channel length direction, and the direction of the dashed-dotted line Y1-Y2 may be referred to as the channel width direction. In the top view of the transistor, as in Figs. 7(A) and 7(B) in the subsequent drawings, some of the components may be omitted and shown in the figure. It corresponds to the cross-sectional view of the cut surface between the two. In Figs. 7(A) and 7(B), for the sake of avoiding complication, some of the components of the transistor 100D, the transistor 200D, and the capacitor element 250D (such as the insulating film having a function as a gate insulating film) are omitted and shown in the figure. Also, in each transistor, the direction of the dashed-dotted line X1-X2 may be referred to as the channel length direction, and the direction of the dashed-dotted line Y1-Y2 may be referred to as the channel width direction. In the top view of the transistor, as in Figs. 7(A) and 7(B) in the subsequent drawings, some of the components may be omitted and shown in the figure. For the sake of avoiding complication, some of the components of the transistor 100D, the transistor 200D, and the capacitor element 250D (such as the insulating film having a function as a gate insulating film) are omitted and shown in the figure. It corresponds to the cross-sectional view of the cut surface between the two. In Figs. 7(A) and 7(B), for the sake of avoiding complication, some of the components of the transistor 100D, the transistor 200D, and the capacitor element 250D (such as the insulating film having a function as a gate insulating film) are omitted and shown in the figure. Also, in each transistor, the direction of the dashed-dotted line X1-X2 may be referred to as the channel length direction, and the direction of the dashed-dotted line Y1-Y2 may be referred to as the channel width direction. In the top view of the transistor, as in Figs. 7(A) and 7(B) in the subsequent drawings, some of the components may be omitted and shown in the figure. As shown in Fig. 6(A), the pixel portion has the transistor 200D, the conductive film 220 having a function as a pixel electrode, and the capacitor element 250D. The conductive film 220 functioning as a pixel electrode is electrically connected to the transistor 200D. In each transistor, the direction of the dashed-dotted line X1-X2 may be referred to as the channel length direction, and the direction of the dashed-dotted line Y1-Y2 may be referred to as the channel width direction. In the top view of the transistor, as in Figs. 7(A) and 7(B) in the subsequent drawings, some of the components may be omitted and shown in the figure. In the top view of the transistor, as in Figs. 7(A) and 7(B) in the subsequent drawings, some of the components may be omitted and shown in the figure. For the sake of avoiding complication, some of the components of the transistor 100D, the transistor 200D, and the capacitor element 250D (such as the insulating film having a function as a gate insulating film) are omitted and shown in the figure.

[0197] As shown in Fig. 6(A), the pixel portion has the transistor 200D, the conductive film 220 having a function as a pixel electrode, and the capacitor element 250D. The conductive film 220 functioning as a pixel electrode is electrically connected to the transistor 200D. The conductive film 220 functioning as a pixel electrode is electrically connected to the transistor 200D. As shown in Fig. 6(A), the pixel portion has the transistor 200D, the conductive film 220 having a function as a pixel electrode, and the capacitor element 250D. The conductive film 220 functioning as a pixel electrode is electrically connected to the transistor 200D.

[0198] The transistor 200D has the conductive film 204 on the substrate 102, the insulating film 106 on the substrate 102 and the conductive film 204, the metal oxide film 208 on the insulating film 106, the conductive film 212a on the metal oxide film 208, and the conductive film 212b on the metal oxide film 208. The transistor 200D has the conductive film 204 on the substrate 102, the insulating film 106 on the substrate 102 and the conductive film 204, the metal oxide film 208 on the insulating film 106, the conductive film 212a on the metal oxide film 208, and the conductive film 212b on the metal oxide film 208. In the transistor 200D, the insulating film 106 has a function as a gate insulating film. Also, in the transistor 200D, the conductive film 204 has a function as a gate electrode, the conductive film 212a has a function as a source electrode, and the conductive film 212b has a function as a drain electrode.

[0199] In the transistor 200D, the insulating film 106 has a function as a gate insulating film. Also, in the transistor 200D, the conductive film 204 has a function as a gate electrode, the conductive film 212a has a function as a source electrode, and the conductive film 212b has a function as a drain electrode. In the transistor 200D, the insulating film 106 has a function as a gate insulating film. Also, in the transistor 200D, the conductive film 204 has a function as a gate electrode, the conductive film 212a has a function as a source electrode, and the conductive film 212b has a function as a drain electrode. In the transistor 200D, the insulating film 106 has a function as a gate insulating film. Also, in the transistor 200D, the conductive film 204 has a function as a gate electrode, the conductive film 212a has a function as a source electrode, and the conductive film 212b has a function as a drain electrode.

[0200] In transistor 200D, the ends of conductive film 212a and conductive film 212b are located inside the ends of metal oxide film 208.

[0201] On transistor 200D, specifically, an insulating film 114, an insulating film 116 on the insulating film 114, an insulating film 118 on the insulating film 116, and an insulating film 119 on the insulating film 118 are formed. In transistor 200D, the insulating film 114, the insulating film 116, and the insulating film 118 function as protective insulating films of transistor 200D. Also, the insulating film 119 functions as a planarizing film.

[0202] The insulating film 114, the insulating film 116, the insulating film 118, and the insulating film 119 have an opening 242d in a region overlapping with the conductive film 212b. A conductive film 220 having a function as a pixel electrode is electrically connected to the conductive film 212b through the opening 242d.

[0203] Note that transistor 200D is a so-called channel etch type transistor and has a single gate structure.

[0204] A capacitor element 250D is formed by a conductive film 213, an insulating film 106, a metal oxide film 228, and a conductive film 215a. The conductive film 213 having a function as a capacitor wiring is formed in the same process on the same plane as the conductive films 204, 104, and 113. The conductive film 215a is formed in the same process on the same plane as the conductive films 212a, 212b, 112a, 112b, and 115d.

[0205] In capacitor element 250D, the end of the conductive film 215a is located inside the end of the metal oxide film 228. ​​​​​​​​​​​​​

[0206] Further, a conductive film 220 having a function as a pixel electrode is formed on the insulating film 119. The conductive film 220 provided on the insulating film 119 having a function as a planarization film is also highly flat. Since the conductive film 220 is highly flat, when the display device is a liquid crystal display device, the alignment failure of the liquid crystal layer can be reduced. Also, the distance between the conductive film 204 having a function as a gate wiring and the conductive film 220, and the distance between the conductive film 212a having a function as a signal line and the conductive film 220 can be widened by the insulating film 119, and the wiring delay can be reduced. Since the conductive film 220 is highly flat, when the display device is a liquid crystal display device, the alignment failure of the liquid crystal layer can be reduced. Also, the distance between the conductive film 204 having a function as a gate wiring and the conductive film 220, and the distance between the conductive film 212a having a function as a signal line and the conductive film 220 can be widened by the insulating film 119, and the wiring delay can be reduced. Further, as shown in FIGS. 6(B) and 6(C), the drive circuit has a transistor 100D and a connection portion 150D. The transistor 100D includes a conductive film 104 on the substrate 102, an insulating film 106 on the substrate 102 and the conductive film 104, a metal oxide film 108 on the insulating film 106, a conductive film 112a on the metal oxide film 108, a conductive film 112b on the metal oxide film 108, an insulating film 114 on the metal oxide film 108, the conductive film 112a and the conductive film 112b, an insulating film 116 on the insulating film 114, an insulating film 118 on the insulating film 116, and an insulating film 119 and a conductive film 130d on the insulating film 118. In the transistor 100D, the insulating film 119 has an opening 142d in a region where the conductive film 104 and the metal oxide film 108 overlap. Also, the insulating films 106, 114, 116, 118 and 119 have openings 146d in a region that overlaps the conductive film 104 and does not overlap the metal oxide film 108, the conductive film 112a and the conductive film 112b.

[0207] As shown in FIGS. 6(B) and 6(C), the drive circuit has a transistor 100D and a connection portion 150D.

[0208] The transistor 100D includes a conductive film 104 on the substrate 102, an insulating film 106 on the substrate 102 and the conductive film 104, a metal oxide film 108 on the insulating film 106, a conductive film 112a on the metal oxide film 108, a conductive film 112b on the metal oxide film 108, an insulating film 114 on the metal oxide film 108, the conductive film 112a and the conductive film 112b, an insulating film 116 on the insulating film 114, an insulating film 118 on the insulating film 116, and an insulating film 119 and a conductive film 130d on the insulating film 118. The transistor 100D includes a conductive film 104 on the substrate 102, an insulating film 106 on the substrate 102 and the conductive film 104, a metal oxide film 108 on the insulating film 106, a conductive film 112a on the metal oxide film 108, a conductive film 112b on the metal oxide film 108, an insulating film 114 on the metal oxide film 108, the conductive film 112a and the conductive film 112b, an insulating film 116 on the insulating film 114, an insulating film 118 on the insulating film 116, and an insulating film 119 and a conductive film 130d on the insulating film 118. The transistor 100D includes a conductive film 104 on the substrate 102, an insulating film 106 on the substrate 102 and the conductive film 104, a metal oxide film 108 on the insulating film 106, a conductive film 112a on the metal oxide film 108, a conductive film 112b on the metal oxide film 108, an insulating film 114 on the metal oxide film 108, the conductive film 112a and the conductive film 112b, an insulating film 116 on the insulating film 114, an insulating film 118 on the insulating film 116, and an insulating film 119 and a conductive film 130d on the insulating film 118. The transistor 100D includes a conductive film 104 on the substrate 102, an insulating film 106 on the substrate 102 and the conductive film 104, a metal oxide film 108 on the insulating film 106, a conductive film 112a on the metal oxide film 108, a conductive film 112b on the metal oxide film 108, an insulating film 114 on the metal oxide film 108, the conductive film 112a and the conductive film 112b, an insulating film 116 on the insulating film 114, an insulating film 118 on the insulating film 116, and an insulating film 119 and a conductive film 130d on the insulating film 118. The transistor 100D includes a conductive film 104 on the substrate 102, an insulating film 106 on the substrate 102 and the conductive film 104, a metal oxide film 108 on the insulating film 106, a conductive film 112a on the metal oxide film 108, a conductive film 112b on the metal oxide film 108, an insulating film 114 on the metal oxide film 108, the conductive film 112a and the conductive film 112b, an insulating film 116 on the insulating film 114, an insulating film 118 on the insulating film 116, and an insulating film 119 and a conductive film 130d on the insulating film 118.

[0209] In the transistor 100D, the insulating film 119 has an opening 142d in a region where the conductive film 104 and the metal oxide film 108 overlap. Also, the insulating films 106, 114, 116, 118 and 119 have openings 146d in a region that overlaps the conductive film 104 and does not overlap the metal oxide film 108, the conductive film 112a and the conductive film 112b. In the transistor 100D, the insulating film 119 has an opening 142d in a region where the conductive film 104 and the metal oxide film 108 overlap. Also, the insulating films 106, 114, 116, 118 and 119 have openings 146d in a region that overlaps the conductive film 104 and does not overlap the metal oxide film 108, the conductive film 112a and the conductive film 112b. In the transistor 100D, the insulating film 119 has an opening 142d in a region where the conductive film 104 and the metal oxide film 108 overlap. Also, the insulating films 106, 114, 116, 118 and 119 have openings 146d in a region that overlaps the conductive film 104 and does not overlap the metal oxide film 108, the conductive film 112a and the conductive film 112b. In the transistor 100D, the insulating film 119 has an opening 142d in a region where the conductive film 104 and the metal oxide film 108 overlap. Also, the insulating films 106, 114, 116, 118 and 119 have openings 146d in a region that overlaps the conductive film 104 and does not overlap the metal oxide film 108, the conductive film 112a and the conductive film 112b. It exists.

[0210] The conductive film 130d having a function as a second gate electrode is provided so as to cover the opening 146d and the opening 1 42d. In the opening 142d, the conductive film 130d having a function as a second gate electrode is on the conductive film 104 having a function as a first gate electrode provided. That is, the conductive film 130d having a function as a second gate electrode and the conductive film 104 having a function as a first gate electrode are electrically connected. Also, in the opening 14 2d, the conductive film 130d having a function as a second gate electrode is provided on the insulating film 118 having a function as a second gate insulative film. That is, in the region overlapping with the conductive film 104 and the metal oxide film 108 having a function as a first gate electrode, the conductive film 130d having a function as a second gate electrode is arranged. In the transistor 100D, the insulating film 106 has a function as a first gate insulating film, and the insulating films 114, 116, and 118 have a function as a second gate insulating film

[0211] having. Also, in the transistor 100D, the conductive film 104 has a function as a first gate electrode, and the conductive film 130d has a function as a second gate electrode. Also, in the transistor 100D, the conductive film 112a has a function as a source electrode, and the conductive film 112 b has a function as a drain electrode.

[0212]

[0212] In the transistor 100D, the insulating film 119 has a function as a planarization film.

[0213] In the transistor 100D, the ends of the conductive film 112a and the conductive film 112b are metal oxides It is located inside the end of the physical film 108.

[0214] Note that the transistor 100D is a so-called channel etch type transistor and has a dual gate structure.

[0215] Also, as shown in FIG. 6(B), the metal oxide film 108 of the transistor 100D is positioned to face the conductive film 104 and the conductive film 130d, and is sandwiched between conductive films having the functions of two gate electrodes. The length of the conductive film 130d in the channel length direction and the length of the conductive film 130d in the channel width direction are each longer than the length of the metal oxide film 108 in the channel length direction and the length of the metal oxide film 108 in the channel width direction, and the entire metal oxide film 108 is covered by the conductive film 130d via the insulating films 114, 116, 118, and 119. 108 in the channel width direction, and the entire metal oxide film 108 is covered by the conductive film 130d via the insulating films 114, 116, 118, and 119. 108 in the channel width direction, and the entire metal oxide film 108 is covered by the conductive film 130d via the insulating films 114, 116, 118, and 119. 114, insulating film 116, insulating film 118, and insulating film 119. It is covered.

[0216] In other words, the conductive film 104 and the conductive film 130d are connected at the openings provided in the insulating films 106, 114, insulating films 116, insulating film 118, and insulating film 119, and have a region located outside the side end portion of the metal oxide film 108.

[0217] By having such a configuration, the metal oxide film 108 included in the transistor 100D can be electrically surrounded by the electric fields of the conductive film 104 and the conductive film 130d, resulting in an S-channel structure. For the S-channel structure, refer to the above description. structure. For the S-channel structure, refer to the above description.

[0218] Since the transistor 100D has an S-channel structure, an electric field for inducing a channel by the conductive film 104 having the function of the first gate electrode effectively acts on the metal oxide film. Since it can be applied to the film 108, the current driving ability of the transistor 100D is improved, and it becomes possible to obtain high on-current characteristics. Also, it is possible to increase the on-current Therefore, it becomes possible to miniaturize the transistor 100D. Also, the transistor 100 D has a structure surrounded by the conductive film 104 having the function of the first gate electrode and the conductive film 130d having the function of the second gate electrode, so the mechanical strength of the transistor 100D can be increased.

[0219] The connection portion 150D includes a conductive film 113 having the function of the first wiring on the substrate 102, an opening 160 provided in the insulating film 106 on the conductive film 113 having the function of the first wiring, and a conductive film 115d having the function of the second wiring provided so as to cover the opening 160. In the opening 160, the conductive film 115d having the function of the second wiring is provided on the conductive film 113 having the function of the first wiring, and the conductive film 113 having the function of the first wiring and the conductive film 115d having the function of the second wiring are electrically connected. In the opening 160, the conductive film 113 having the function of the first wiring and the conductive film 115d having the function of the second wiring are directly connected. Therefore, the opening 160 can be said to be a contact hole. By directly connecting the conductive film 113 having the function of the first wiring and the conductive film 115d having the function of the second wiring, good contact can be obtained and the contact resistance can be reduced.

[0220] In the opening 160, the conductive film 113 having the function of the first wiring and the conductive film 115d having the function of the second wiring are directly connected. Therefore, the opening 160 can be said to be a contact hole. The conductive film 113 having the function of the first wiring and the conductive film 115d having the function of the second wiring are directly connected, so that good contact can be obtained and the contact resistance can be reduced.

[0221] The conductive film 113 having the function of the first wiring is the first gate of the transistor 100D​​​​​​ It is formed in the same process on the same plane as the conductive film 104 having the function as an electrode. The second wir ing conductive film 115d having the function as a line is formed in the same process on the same plane as the conductive film 112a having the function as the source electrode of the transistor 100D and the conductive film 112b having the function as the drain electrode. That is, the conductive film 113 having the function as the first wiring is formed in the same layer as the conductive film 104 having the function as the first gate electrode of the transistor 100D. The conductive film 115d having the function as the second wiring is formed in the same layer as the conductive film 112a having the function as the source electrode of the transistor 100D and the conductive film 112b having the function as the drain electrode. That is, the conductive film 113 having the function as the first wiring is formed in the same layer as the conductive film 104 having the function as the first gate electrode of the transistor 100D. The conductive film 115d having the function as the second wiring is formed in the same layer as the conductive film 112a having the function as the source electrode of the transistor 100D and the conductive film 112b having the function as the drain electrode.

[0222] In other words, the conductive film 113 having the function as the first wiring is formed in the same layer as the conductive film 104 having the function as the first gate electrode of the transistor 100D. The conductive film 115d having the function as the second wiring is formed in the same layer as the conductive film 112a having the function as the source electrode of the transistor 100D and the conductive film 112b having the function as the drain electrode. That is, the conductive film 113 having the function as the first wiring is formed in the same layer as the conductive film 104 having the function as the first gate electrode of the transistor 100D. The conductive film 115d having the function as the second wiring is formed in the same layer as the conductive film 112a having the function as the source electrode of the transistor 100D and the conductive film 112b having the function as the drain electrode. That is, the conductive film 113 having the function as the first wiring is formed in the same layer as the conductive film 104 having the function as the first gate electrode of the transistor 100D. The conductive film 115d having the function as the second wiring is formed in the same layer as the conductive film 112a having the function as the source electrode of the transistor 100D and the conductive film 112b having the function as the drain electrode. That is, the conductive film 113 having the function as the first wiring is formed in the same layer as the conductive film 104 having the function as the first gate electrode of the transistor 100D. The conductive film 115d having the function as the second wiring is formed in the same layer as the conductive film 112a having the function as the source electrode of the transistor 100D and the conductive film 112b having the function as the drain electrode. That is, the conductive film 113 having the function as the first wiring is formed in the same layer as the conductive film 104 having the function as the first gate electrode of the transistor 100D. The conductive film 115d having the function as the second wiring is formed in the same layer as the conductive film 112a having the function as the source electrode of the transistor 100D and the conductive film 112b having the function as the drain electrode.

[0223] The conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same process. In other words, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same layer. Also, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are in contact with the upper surface of the insulating film 119 having the function as a planarization film. That is, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same process. In other words, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same layer. Also, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are in contact with the upper surface of the insulating film 119 having the function as a planarization film. That is, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same process. In other words, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same layer. Also, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are in contact with the upper surface of the insulating film 119 having the function as a planarization film. That is, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same process. In other words, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same layer. Also, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are in contact with the upper surface of the insulating film 119 having the function as a planarization film. That is, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same process. In other words, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same layer. Also, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are in contact with the upper surface of the insulating film 119 having the function as a planarization film. That is, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same process. In other words, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same layer. Also, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are in contact with the upper surface of the insulating film 119 having the function as a planarization film.

[0224] <Configuration Example 5 of Display Device> Cross-sectional views of the transistors included in the pixel portion and the drive circuit of the display device according to one embodiment of the present invention are shown in FIGS. 8(A), 8(B), and 8(C), and top views are shown in FIGS. 9(A) and 9(B). The display device shown in FIGS. 8 and 9 has a different structure from the transistors of the display device shown in FIGS. 6(A), 6(B), and 6(C). That is, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same process. In other words, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same layer. Also, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are in contact with the upper surface of the insulating film 119 having the function as a planarization film. That is, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same process. In other words, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same layer. Also, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are in contact with the upper surface of the insulating film 119 having the function as a planarization film. That is, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same process. In other words, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are formed in the same layer. Also, the conductive film 220 having the function as a pixel electrode and the conductive film 130d having the function as a second gate electrode are in contact with the upper surface of the insulating film 119 having the function as a planarization film.

[0225] A display device according to an aspect of the present invention includes a transistor 100E, a transistor 200E, a capacitor element 250E, and a connection portion 150E.

[0226] FIG. 8(A) is a cross-sectional view of the transistor 200E and the capacitor element 250E included in the pixel portion, which corresponds to a cross-sectional view of a cut surface between the dashed-dotted line X1-X2 in FIG. 9(A). FIG. 8(B ) is a cross-sectional view of the transistor 100E and the connection portion 150E included in the drive circuit, and FIG. corresponds to a cross-sectional view of a cut surface between the dashed-dotted line X3-X4 in FIG. 9(B). FIG. 8(C) is a cross-sectional view of the transistor 100E included in the drive circuit, which corresponds to a cross-sectional view of a cut surface between the dashed-dotted line Y1-Y 2 in FIG. 9(B).

[0227] As shown in FIG. 8(A), the pixel portion includes a transistor 200E, a conductive film 220 having a function as a pixel electrode, and a capacitor element 250E. Note that the conductive film 220 functioning as a pixel electrode is electrically connected to the transistor 200E. The transistor 200E and the capacitor element 250E can be referred to the transistor 200D and the capacitor element 250D shown in FIG. 6(A), so detailed description thereof is omitted.

[0228] As shown in FIGS. 8(B) and 8(C), the drive circuit includes a transistor 100E and a connection portion 1 50E.

[0229] The transistor 100E includes a conductive film 104 on a substrate 102, an insulating film 106 on the substrate 102 and the conductive film 104, a metal oxide film 108 on the insulating film 106, a conductive film 112a on the metal oxide film 108, and a conductive film 112b on the metal oxide film 108.

[0230] In transistor 100E, the insulating film 106 functions as a gate insulating film. Also, in transistor 100E, the conductive film 104 functions as a gate electrode, and the conductive film 112a functions as a source electrode, and the conductive film 112b functions as a drain electrode.

[0231] In transistor 100E, the ends of the conductive film 112a and the conductive film 112b are located inside the ends of the metal oxide film 108.

[0232] On transistor 100E, specifically, an insulating film 114, an insulating film 116 on the insulating film 114, an insulating film 118 on the insulating film 116, and an insulating film 119 on the insulating film 118 are formed. In transistor 100E, the insulating films 114, 116, and 118 function as protective insulating films of transistor 100E. Also, the insulating film 119 functions as a planarizing film.

[0233] Note that transistor 100E is a so-called channel etch type transistor and has a single gate structure.

[0234] Since the connection part 150E can refer to the connection part 150D shown in Fig. 6(B), a detailed description thereof is omitted.

[0235] <Fabrication method of display device 1> The fabrication methods of the transistor 100A, the transistor 200A, the capacitor element 250A, and the connection part 150A included in the display device according to one aspect of the present invention shown in Figs. 1(A), 1(B), and

[0236] Note that FIGS. 10 to 22 are cross-sectional views for explaining a method of manufacturing a display device. In FIGS. 10 to 22, the direction of the dashed-dotted line X1-X2 is a cross-sectional view in the channel length direction of the transistor 200A and the direction of the dashed-dotted line X3-X4 is a cross-sectional view in the channel length direction of the transistor 100A . The direction of the dashed-dotted line Y1-Y2 is a cross-sectional view in the channel width direction of the transistor 100A .

[0237] First, a conductive film is formed on the substrate 102, and the conductive film is processed by a lithography process and an etching process to form a conductive film 1 04 having a function as a first gate electrode of the transistor 100A, a conductive film 113 having a function as a wiring, a conductive film 204 having a function as a gate electrode of the transistor 200A and a conductive film 213 having a function as a capacitance wiring. Next, an insulating film 106 having a function as a first gate insulating film is formed on the conductive film 104, the conductive film 113, the conductive film 213, the conductive film 204 and the substrate 102 . (See FIGS. 10(A), FIG. 10(B) and FIG. 10(C)). The process of forming the conductive film 104, the conductive film 113, the conductive film 213 and the conductive film 204 becomes the first lithography process.

[0238] In this specification etc., the lithography process refers to a process of forming a pattern using an exposure mask .

[0239] In this embodiment, a glass substrate is used as the substrate 102. As the conductive film 104, the conductive film 113 , the conductive film 204 and the conductive film 213, a titanium film with a thickness of 50 nm and a copper film with a thickness of 200 nm are respectively formed by a sputtering method.

[0240] In this embodiment, a silicon nitride film with a thickness of 400 nm and a silicon oxynitride film with a thickness of 50 n m are formed by PECVD method.

[0241] The silicon nitride film has a three-layer stacked structure including a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. As an example of the three-layer stacked structure, it can be formed as follows. It can be formed as follows.

[0242] As the first silicon nitride film, for example, silane with a flow rate of 200 sccm, nitrogen with a flow rate of 2000 s ccm, and ammonia gas with a flow rate of 100 sccm are supplied as source gases to the reaction chamber of a PECVD apparatus, the pressure in the reaction chamber is controlled to 100 Pa, and 2000 W of power is supplied using a 27.12 MHz high-frequency power supply so that the thickness becomes 50 nm. .

[0243] As the second silicon nitride film, silane with a flow rate of 200 sccm, nitrogen with a flow rate of 2000 sccm, and ammonia gas with a flow rate of 2000 sccm are supplied as source gases to the reaction chamber of a PECVD apparatus, the pressure in the reaction chamber is controlled to 100 Pa, and 2000 W of power is supplied using a 27.12 MHz high-frequency power supply so that the thickness becomes 300 nm.

[0244] As the third silicon nitride film, for example, silane with a flow rate of 200 sccm, nitrogen with a flow rate of 2000 s ccm, and ammonia gas with a flow rate of 100 sccm are supplied as source gases to the reaction chamber of a PECVD apparatus, the pressure in the reaction chamber is controlled to 100 Pa, and 2000 W of power is supplied using a 27.12 MHz high-frequency power supply so that the thickness becomes 50 nm. .

[0245] In addition, the substrate temperature during the formation of the first silicon nitride film, the second silicon nitride film, and the third silicon nitride film can be 350°C or lower.

[0246] By forming the silicon nitride film into the above-described three-layer laminated structure, for example, when using a conductive film containing copper in any one or more of the conductive film 104, the conductive film 113, the conductive film 204, and the conductive film 213, the following effects can be achieved.

[0247] The first silicon nitride film can suppress the diffusion of copper elements from the conductive film 104, the conductive film 113, the conductive film 204, and the conductive film 213. The second silicon nitride film has a function of releasing hydrogen and can improve the breakdown voltage of the insulating film having a function as a gate insulating film. The third silicon nitride film can suppress the release of hydrogen from the third silicon nitride film and the diffusion of hydrogen released from the second silicon nitride film.

[0248] Next, a metal oxide film 108a and a metal oxide film 108b are formed on the insulating film 106 (see FIGS. 12(A), 12(B), and 12(C)).

[0249] Note that FIGS. 11(A), 11(B), and 11(C) are schematic cross-sectional views of the inside of a film-forming apparatus when forming the metal oxide film 108a and the metal oxide film 108b on the insulating film 106. In FIGS. 11(A), 11(B), and 11(C), a sputtering apparatus is used as the film-forming apparatus, and a target 191 installed inside the sputtering apparatus and a plasma 192 formed below the target 191 are schematically shown.

[0250] In FIGS. 11(A), 11(B), and 11(C), oxygen or excess oxygen added to the insulating film 106 is schematically represented by dashed arrows. For example, when forming the metal oxide film 108a using oxygen gas, oxygen can be suitably added into the insulating film 106. First, a metal oxide film 108a is formed on the insulating film 106. The thickness of the metal oxide film 108a may be 1 nm or more and 25 nm or less, preferably 5 nm or more and 20 nm or less.

[0251] Also, the metal oxide film 108a is formed using either one or both of an inert gas (typically Ar gas) and oxygen gas. When forming the metal oxide film 108a, the ratio of oxygen gas in the entire film-forming gas (hereinafter also referred to as the oxygen flow rate ratio) is 0% or more and less than 30%, preferably 5% or more and 15% or less. By forming the metal oxide film 108a with the oxygen flow rate ratio within the above range, the crystallinity of the metal oxide film 108a can be lowered.

[0252]

[0253] Subsequently, a metal oxide film 108b is formed on the metal oxide film 108a. When forming the metal oxide film 108b, plasma is discharged in an atmosphere containing oxygen gas. At this time, oxygen is added into the metal oxide film 108a which becomes the surface to be formed of the metal oxide film 108b. When forming the metal oxide film 108b, the oxygen flow rate ratio is 30% or more and 100% or less, preferably 50% or more and 100% or less, more preferably 70% or more and 100% or less.

[0254] Also, the thickness of the metal oxide film 108b is 20 nm or more and 100 nm or less, preferably ​​​​​​​​​​​​It may be set to be not less than 20 nm and not more than 50 nm.

[0255] In addition, as the formation conditions of the metal oxide film 108b, as described above, for the metal oxide film 108a it is preferable to increase the oxygen flow rate ratio. In other words, it is preferable that the metal oxide film 108a is formed at a lower oxygen partial pressure than the metal oxide film 108b.

[0256] In addition, as the substrate temperature during the formation of the metal oxide film 108a and the metal oxide film 108b, it may be set to be not less than room temperature (25 °C) and not more than 200 °C, preferably not less than room temperature and not more than 130 °C. By setting the substrate temperature within the above range, it is suitable for using a large-area glass substrate (for example, the 8th generation or the 10th generation glass substrate described above). In particular, by setting the substrate temperature to room temperature during the film formation of the metal oxide film 108a and the metal oxide film 108b, warping or distortion of the substrate can be suppressed. In addition, when it is desired to increase the crystallinity of the metal oxide film 108b, it is preferable to increase the substrate temperature during the formation of the metal oxide film 108b.

[0257] In addition, it is more preferable to continuously form the metal oxide film 108a and the metal oxide film 108b in a vacuum so that impurities are not incorporated into each interface.

[0258] In addition, it is also necessary to increase the purity of the sputtering gas. For example, the oxygen gas and argon gas used as the sputtering gas should have a dew point of -40 °C or lower, preferably -80 °C or lower, more preferably -100 °C or lower, and even more preferably -120 °C or lower. By using a highly purified gas, it is possible to prevent moisture and the like from being incorporated into the metal oxide film as much as possible.

[0259] In addition, when forming a metal oxide film by sputtering, the thickness of the metal oxide film in the sputtering device is The chamber is equipped with a cryostat to remove water and other impurities that may be harmful to the metal oxide film. A high vacuum (5×10 -7 Pa to 1×10 -4 It is preferable to evacuate the gas to a pressure of about 10 Pa. The gas molecules equivalent to H2O (gas molecules equivalent to m / z = 18) in the chamber Voltage division is 1×10 -4 Pa or less, preferably 5×10 -5 It is preferable to set the pressure to 0.1 Pa or less.

[0260] In the present embodiment, the conditions for forming the metal oxide film 108a are In-Ga-Zn metal oxide. Sputtering was performed using a Zn oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]). The metal oxide film 108a is formed by a ring method. The substrate temperature during the formation of the metal oxide film 108a is set to room temperature. The deposition gas used was argon gas with a flow rate of 180 sccm and oxygen gas with a flow rate of 20 sccm. (oxygen flow ratio 10%).

[0261] The metal oxide film 108b was formed under the following conditions: The In:Ga:Zn atomic ratio was 4:2:4.1 and the Zn was deposited by sputtering. The substrate temperature during the formation of the metal oxide film 108b is set to room temperature, and the film forming gas is An oxygen gas with a flow rate of 200 sccm is used (oxygen flow rate ratio 100%).

[0262] In addition, the oxygen flow rate ratio during the deposition of the metal oxide film 108a and the metal oxide film 108b is changed. This makes it possible to form a laminated film having different crystallinity.

[0263] Note that, although the manufacturing method by sputtering has been described here, it is not limited thereto , a pulse laser deposition (PLD) method, a plasma enhanced chemical vapor deposition (PECVD) method, thermal CVD (Chemical Vapor Deposition) method, an ALD (Atomic Layer Deposition) method, a vacuum evaporation method, etc. may also be used. As an example of the thermal CVD method , an MOCVD (Metal Organic Chemical Vapor Deposition) method can be mentioned.

[0264] Note that, after forming the metal oxide film 108a and the metal oxide film 108b, the metal oxide films 10 8a and the metal oxide film 108b may be exposed to a plasma containing oxygen. As a result, it is possible to add oxygen to the surfaces of the metal oxide film 108a and the metal oxide film 108b, and it is possible to reduce the oxygen deficiency of the metal oxide film 108a and the metal oxide film 108b . In particular, reducing the oxygen deficiency on the side surfaces of the metal oxide film 108a and the metal oxide film 108b is preferable because it is possible to suppress the generation of leakage current in the transistor.

[0265] Also, after forming the metal oxide film 108a and the metal oxide film 108b, it is preferable to perform a heat treatment (hereinafter , referred to as the first heat treatment). By the first heat treatment, hydrogen, water, etc. contained in the metal oxide film 1 08a and the metal oxide film 108b can be reduced. Note that , the heat treatment for the purpose of reducing hydrogen, water, etc. may be performed after processing the metal oxide films 108a, 108b into an island shape . Note that the first heat treatment is one of the purification processes of the metal oxide film .

[0266] As the first heat treatment, for example, it is set to be 150°C or higher and lower than the strain point of the substrate, preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 350°C or lower.

[0267] Also, for the first heat treatment, an electric furnace, an RTA apparatus, etc. can be used. By using an RTA apparatus, heat treatment can be performed at a temperature equal to or higher than the strain point of the substrate in a short time. Therefore, it becomes possible to shorten the heating time. Also, the first heat treatment may be performed in an atmosphere of nitrogen, oxygen, ultra-dry air (air with a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less), or a noble gas (argon, helium, etc.). Note that it is preferable that the above nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, etc. Also, after heat treatment in a nitrogen or noble gas atmosphere, it may be heated in an oxygen or ultra-dry air atmosphere. As a result, hydrogen, water, etc. contained in the metal oxide film can be desorbed, and oxygen can be supplied to the metal oxide film. As a result, oxygen vacancies contained in the metal oxide film can be reduced.

[0268] Next, a conductive film 112 is formed on the metal oxide film 108a and the metal oxide film 108b. Next, as the second lithography process, a resist mask 251, a resist mask 253, a resist mask 151, and a resist mask 153 are formed on the conductive film 112 (see FIGS. 13(A), 13(B), and 13(C)). The process of forming the resist mask 251, the resist mask 253, the resist mask 151, and the resist mask 153 becomes the second lithography process.

[0269] ​​​​In this embodiment, as the conductive film 112, a titanium film with a thickness of 30 nm, a copper film with a thickness of 200 nm, and a titanium film with a thickness of 10 nm are formed in sequence by sputtering method.

[0270] The resist mask 253 has a region 255 where the thickness of the resist film is thin in the region overlapping with the conductive film 204. The region 255 can also be said to be a concave portion. The resist mask 151 has a region 155 where the thickness of the resist film is thin in the region overlapping with the conductive film 104. The region 155 can also be said to be a concave portion. In this embodiment, for the formation of the resist mask, exposure using a multi-tone (high-tone) mask is used.

[0271] The exposure using a multi-tone (high-tone) mask will be described.

[0272] First, a resist is formed to form a resist mask. As the resist, a positive resist or a negative resist can be used. Here, a positive resist is used for illustration. The resist may be formed by spin coating or selectively formed by inkjet method. When the resist is selectively formed by inkjet method, the formation of the resist in unnecessary portions can be reduced, so that the waste of materials can be reduced.

[0273] Next, using a multi-tone mask as an exposure mask, the resist is irradiated with light to expose the resist.

[0274] A multi-tone mask is a mask capable of performing three exposure levels on the exposed portion, the intermediate exposed portion, and the unexposed portion, and is an It is possible to form a resist mask having regions of a plurality of thicknesses by a light and development process. Therefore, by using a multi-tone mask, the number of lithography processes can be reduced and the process can be simplified.

[0275] Typical examples of multi-tone masks include a grayscale mask 10a as shown in Fig. 46(A), and a halftone mask 10b as shown in Fig. 46(C).

[0276] As shown in Fig. 46(A), the grayscale mask 10a includes a light-transmissive substrate 13 and a light-shielding film 15 formed on the light-transmissive substrate 13. The grayscale mask 10a also has a light-shielded portion 17 where the light-shielding film is provided, a diffraction grating portion 18 provided by the pattern of the light-shielding film, and a transmission portion 19 where the light-shielding film is not provided. The light-transmissive substrate 13 can be a light-transmissive substrate such as quartz. The light-shielding film 15 can be formed using a light-absorbing light-shielding material such as chromium or chromium oxide.

[0277] When exposure light is irradiated on the grayscale mask 10a, the light transmittance TR is shown in Fig. 46(B). As shown in Fig. 46(B), in the light-shielded portion 17, the light transmittance 21 is 0%. In the transmission portion 19, the light transmittance 21 is approximately 100%.

[0278] In the diffraction grating portion 18, the light transmittance 21 can be adjusted in the range of 10% or more and 70% or less. In the diffraction grating portion 18, the interval between the light-transmissive portions such as slits, dots, and meshes is set to be less than the resolution limit of the light used for exposure. And the diffraction grating portion 18 can control the light transmittance by adjusting the interval and pitch of the slits, dots, or meshes. Note that the diffraction grating portion 18 has a periodic slit, dot, mesh, etc. By adjusting the interval and pitch of the slit, dot, or mesh, the light transmittance can be controlled. Either dots, meshes, or aperiodic slits, dots, or meshes can be used. It is possible.

[0279] As shown in FIG. 46(C), the halftone mask 10b includes a light-transmissive substrate 13 and a light-shielding film 25 and a semi-transmissive film 23 formed on the light-transmissive substrate 13. Further, the halftone mask 10b includes a light-shielding portion 27 provided with the light-shielding film 25 and the semi-transmissive film 23, a semi-transmissive portion 28 provided without the light-shielding film 25 and with the semi-transmissive film 23, and a transmissive portion 29 provided without the light-shielding film 25 and the semi-transmissive film 23. It has. When the halftone mask 10b is irradiated with exposure light, the light transmittance is shown in FIG. 46(D). As shown in FIG. 46(D), in the light-shielding portion 27, the light transmittance 31 is 0%, and in the transmissive portion 29, the light transmittance 31 is approximately 100%. Further, in the semi-transmissive portion 28, the light transmittance 31 can be adjusted in the range of 10% or more and 70% or less. In the semi-transmissive portion 28, the light transmittance can be controlled by the material of the semi-transmissive film 23. The semi-transmissive film 23 can use MoSiN, MoSi, MoSiO, MoSiON, CrSi, etc. The light-shielding film 25 can use a light-shielding material that absorbs light, such as chromium or chromium oxide. After exposure using a multi-tone mask and then development, a resist mask having regions with different film thicknesses can be formed as shown in FIGS. 13(A), 13(B), and 13(C).

[0280] Note that, as an example of a multi-tone mask, two types of resist film thicknesses are shown, but the embodiments of the present invention are not limited to this. The light transmittance 31 is 0% in the light-shielding portion 27, and the light transmittance 31 is approximately 100% in the transmissive portion 29. In the semi-transmissive portion 28, the light transmittance 31 is adjustable in the range of 10% or more and 70% or less. In the semi-transmissive portion 28, the light transmittance can be controlled by the material of the semi-transmissive film 23. The light transmittance can be controlled by the material of the semi-transmissive film 23.

[0281] The semi-transmissive film 23 can use MoSiN, MoSi, MoSiO, MoSiON, CrSi, etc. The light-shielding film 25 can use a light-shielding material that absorbs light, such as chromium or chromium oxide. It can be used.

[0282] After exposure using a multi-tone mask and then development, a resist mask having regions with different film thicknesses can be formed as shown in FIGS. 13(A), 13(B), and 13(C). It is possible to form a resist mask having regions with different film thicknesses. It can be formed.

[0283] Note that, as an example of a multi-tone mask, two types of resist film thicknesses are shown, but the embodiments of the present invention are not limited to this. is not limited thereto. By using the diffraction grating section 18 or the semi-transmissive film 23 having the transmittances of a plurality of lights, a resist having three or more film thicknesses can be formed.

[0284] Next, using the resist masks 251, 253, 151, and 153 as masks, a part of the conductive film 112, the metal oxide film 108a, and the metal oxide film 10 8b is removed, and the conductive film 215, the conductive film 212A, the conductive film 112A, the conductive film 115, the metal oxide film 228, the metal oxide film 208, the metal oxide film 108, and the metal oxide film 128 are respectively formed (see FIGS. 14(A), 14(B), and 14(C)).

[0285] For the processing of the conductive film 112, wet etching can be used. However, the processing method is not limited thereto, and for example, dry etching may be used. For the processing of the metal oxide film 1 08b, wet etching can be used. However, the processing method is not limited thereto, and for example, dry etching may be used.

[0286] For the processing of the conductive film 112, the metal oxide film 108a, and the metal oxide film 108b, different etchings may be used. For example, dry etching may be used for the processing of the conductive film 112, and wet etching may be used for the processing of the metal oxide film 108a and the metal oxide film 108b.

[0287] Next, a part of the resist masks 251, 253, 151, and 153 is removed to reduce the area of the resist masks. By reducing the area of the resist masks, the resist masks 251a, 253a, the resist masks 151a, and the resist masks Cu 253b, resist masks 151a, 151b, and 151a are each formed (see FIGS. 15(A), 15(B), and 15(C)). 3a are each formed (see FIGS. 15(A), 15(B), and 15(C)).

[0288] An ashing device can be used to remove part of the resist mask. By ashing, the area of the resist mask decreases, and in some cases, the thickness of the resist mask also becomes thinner. There is a case.

[0289] For example, ashing may use photoexcitation ashing in which light such as ultraviolet light is irradiated onto gases such as oxygen and ozone to cause a chemical reaction between the gas and the organic matter to remove the organic matter. As ashing, plasma ashing may be used in which gases such as oxygen and ozone are turned into plasma by high frequency or the like and the plasma is used to remove the organic matter. and the plasma is used to remove the organic matter. organic matter may be removed.

[0290] In the thin regions 255 of the resist mask of resist mask 253 and the thin regions 155 of the resist mask of resist mask 151, the resist is removed by the ashing, and the resist mask separates as shown in FIGS. 15(A), 15(B), and 15(C). By removing part of the resist mask, the resist mask in the region 255a overlapping the conductive film 204 is removed, and the conductive film 212A in the region 255a is exposed. Also, the resist mask in the region 155a overlapping the conductive film 104 is removed, and the conductive film 112A in the region 155a is exposed. removed, and the conductive film 212A in the region 255a is exposed. Also, the resist mask in the region 155a overlapping the conductive film 104 is removed, and the conductive film 112A in the region 155a is exposed.

[0291] Also, the end of the resist mask 251a is located inside the end of the conductive film 215. The ends of the resist masks 253a and 253b are located inside the end of the conductive film 212A. The ends of the resist masks 151a and 151b are located inside the end of the conductive film 1 It is located inside from the end of 12A. The end of the resist mask 153a is inside from the end of the conductive film 115 and is located inside from the end of the conductive film 115.

[0292] Next, using the resist masks 251a, 253a, 253b, 151a, 151b, and 153a as masks, a part of the conductive films 215, 212A, 112A, and 115 is removed to form conductive films 215a, 212a, 212b, 112a, 112b, and 115a respectively (see FIGS. 16(A), 16(B), and 16(C)).

[0293] The end of the conductive film 215a is located inside from the end of the metal oxide film 228. The ends of the conductive films 212a and 212b are located inside from the end of the metal oxide film 208. The ends of the conductive films 112a and 112b are located inside from the end of the metal oxide film 108. The end of the conductive film 115a is located inside from the end of the metal oxide film 128.

[0294] Next, the resist masks 251a, 253a, 253b, 151a, 151b, and 153a are removed.

[0295] After removing the resist masks, the surfaces (back side) of the metal oxide films 108, 128, 208, and 228 (more specifically, metal oxide films 108_2, 128_2, 208_2, and 228_2) may be cleaned. As the cleaning method, for example, a chemical solution such as phosphoric acid may be used for cleaning. Cleaning can be performed. By performing cleaning using a chemical solution such as phosphoric acid, on the surfaces of the metal oxide film 108_2, the metal oxide film 128_2, the metal oxide film 208_2, and the metal oxide film 228_2 the attached impurities (for example, elements contained in the conductive film 112a, the conductive film 112b, the conductive film 212a, and the conductive film 212b, etc.) can be removed. Note that it is not always necessary to perform such cleaning, and in some cases, cleaning may not be required.

[0296] In addition, in either one or both of the process of forming the conductive film 112a, the conductive film 112b, the conductive film 212a, and the conductive film 212b, and the above-described cleaning process, in the regions where the metal oxide films 108 and 208 are exposed from the conductive film 112a, the conductive film 1 12b, the conductive film 212a, and the conductive film 212b, there are cases where the film thicknesses of the metal oxide films 108 and 208 become thin.

[0297] Note that the regions where the metal oxide films 108 and 208 are exposed, that is, the metal oxide film 108_2 and the metal oxide film 208_2 are preferably highly crystalline metal oxide films. A highly crystalline metal oxide film has a structure in which impurities, particularly the constituent elements used in the conductive film 112a, the conductive film 11 2b, the conductive film 212a, and the conductive film 212b, are less likely to diffuse into the film. Therefore, a highly reliable transistor can be fabricated.

[0298] Also, in FIGS. 16(A), 16(B), and 16(C), the metal oxide films 108, 128, 208, and 2 exposed from the conductive film 112a, the conductive film 112b, the conductive film 115a, the conductive film 212a, the conductive film 212b, and the conductive film 215a The surface of 28, that is, the surfaces of the metal oxide film 108_2, the metal oxide film 128_2, the metal oxide film 208_2, and the metal oxide film 228_2 where recesses are formed have been exemplified. However, it is not limited thereto. The surfaces of the metal oxide films 108, the metal oxide film 128, the metal oxide film 208, and the metal oxide film 228 exposed from the conductive films 112a, the conductive films 112b, the conductive films 115a, the conductive films 212 a, the conductive films 212b, and the conductive films 215a do not necessarily have recesses. Yes.

[0299] Next, an insulating film 106, a metal oxide film 108, a metal oxide film 128, a metal oxide film 208, a metal oxide film 228, a conductive film 215a, a conductive film 212a, a conductive film 212b, a conductive film 112 a, a conductive film 112b, and a conductive film 115a, an insulating film 114, an insulating film 116, and an insulating film 1 18 are formed thereon (see FIGS. 17(A), 17(B), and 17(C)).

[0300] Note that after forming the insulating film 114, it is preferable to continuously form the insulating film 116 without exposing it to the atmosphere. After forming the insulating film 114, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas, and continuously forming the insulating film 116, it is possible to reduce the impurity concentration derived from atmospheric components at the interface between the insulating film 114 and the insulating film 116. For example, as the insulating film 114, a silicon oxynitride film can be formed using the PECVD method. In this case, as the source gas, it is preferable to use a depositable gas containing silicon and an oxidizing gas. Typical examples of the depositable gas containing silicon include silane, disilane, trisilane, silane fluoride, etc. As the oxidizing gas, nitrous oxide, nitrogen dioxide

[0301] For example, as the insulating film 114, a silicon oxynitride film can be formed using the PECVD method. In this case, as the source gas, it is preferable to use a depositable gas containing silicon and an oxidizing gas. Typical examples of the depositable gas containing silicon include silane, disilane, trisilane, silane fluoride, etc. As the oxidizing gas, nitrous oxide, nitrogen dioxide There are etc. Further, with respect to the flow rate of the deposition gas, the flow rate of the oxidizing gas is set to 20 times or more and 500 times or less, preferably 40 times or more and 100 times or less.

[0302] In this embodiment, as the insulating film 114, the temperature for holding the substrate 102 is 220 °C and silane with a flow rate of 50 sccm and dinitrogen monoxide with a flow rate of 2000 sccm are used as source gases , the pressure in the processing chamber is set to 20 Pa, and the high-frequency power supplied to the parallel-plate electrode is 13.56 MH z, 100 W (the power density is 1.6×10 -2 W / cm 2 ), and a PECVD method is used to form a silicon oxynitride film.

[0303] As the insulating film 116, the substrate placed in the evacuated processing chamber of the PECVD apparatus is maintained at 1 80 °C or more and 350 °C or less, source gas is introduced into the processing chamber, and the pressure in the processing chamber is 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less, and high-frequency power of 0.17 W / cm 2 or more and 0.5 W / cm 2 or less, more preferably 0.25 W / cm 2 or more and 0.35 W / cm 2 or less is supplied to form a silicon oxide film or a silicon oxynitride film. By supplying the high-frequency power with the above power density in the reaction chamber with the above pressure, the decomposition efficiency of the source gas in the plasma increases, oxygen radicals increase,

[0304] As the film formation conditions of the insulating film 116, by supplying the high-frequency power with the above power density in the reaction chamber with the above pressure, the decomposition efficiency of the source gas in the plasma increases, oxygen radicals increase, and the oxidation of the source gas proceeds, so the oxygen content in the insulating film 116 becomes higher than the stoichiometric composition. On the other hand, for the film formed at the above temperature, the bonding force between silicon and oxygen is stronger in the film formed at the above temperature, and Because it is weak, part of the oxygen in the film desorbs due to the heat treatment in the subsequent process. As a result, it contains more oxygen than the oxygen that satisfies the stoichiometric composition, and an oxide insulating film in which part of the oxygen desorbs by heating can be formed.

[0305] In addition, in the process of forming the insulating film 116, the insulating film 114 becomes a protective film of the metal oxide film 108. Therefore, the insulating film 116 can be formed using high-frequency power with a high power density while reducing the damage to the metal oxide film 108.

[0306] In addition, under the film formation conditions of the insulating film 116, by increasing the flow rate of the depositable gas containing silicon with respect to the oxidizing gas, it is possible to reduce the amount of defects in the insulating film 116. Typically by ESR measurement, the spin density of the signal appearing at g = 2.001 derived from the dangling bond of silicon is 6 × 10 spins / cm 17 3 less than, preferably 3 × 10 17 s pins / cm 3 or less, preferably 1.5 × 10 17 spins / cm 3 or less, an oxide insulating film with a small amount of defects can be formed. As a result, the reliability of the transistors 100A and 2 00A can be improved.

[0307] In addition, it is preferable to perform a heat treatment (hereinafter referred to as the second heat treatment) after forming the insulating films 114 and 116. By the second heat treatment, the nitrogen oxides contained in the insulating films 114 and 116 can be reduced. Or, by the second heat treatment, part of the oxygen contained in the insulating films 114 and 116 is moved to the metal oxide film 108, and the oxygen deficiency contained in the metal oxide film 108 can be reduced. ​​​​​​​​

[0308] The temperature of the second heat treatment is typically less than 400 °C, preferably less than 375 °C, and more preferably is preferably in the range of 150 °C to 350 °C. The second heat treatment is carried out in an atmosphere of nitrogen, oxygen, ultra-dry air (water content is 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less of air), or a noble gas (argon, helium, etc.). It should be noted that it is preferable that the above-mentioned nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, etc. For this heat treatment, an electric furnace, RTA, etc. can be used.

[0309] The insulating film 118 has either or both of hydrogen and nitrogen. As the insulating film 118, for example, a silicon nitride film is preferably used. Also, as the insulating film 118, for example, it can be formed using a sputtering method or a PECVD method. For example, when forming the insulating film 118 by the PECVD method, the substrate temperature is less than 400 °C, preferably less than 375 °C and more preferably in the range of 180 °C to 350 °C. By setting the substrate temperature when forming the insulating film 118 within the above-mentioned range, a dense film can be formed, which is preferable. Also, by setting the substrate temperature when forming the insulating film 118 within the above-mentioned range, it becomes possible to move oxygen or excess oxygen in the insulating films 114, 11 6 to the metal oxide film 108.

[0310] Also, when forming a silicon nitride film as the insulating film 118 by the PECVD method, it is preferable to use a deposition gas containing silicon, nitrogen, and ammonia as raw material gases. By using a small amount of ammonia compared to nitrogen, ammonia dissociates in the plasma, and active species are generated. occurs. The active species breaks the bonds between silicon and hydrogen contained in the depositable gas containing silicon, and the triple bond of nitrogen. As a result, the bond between silicon and nitrogen is promoted, and the bond between silicon and hydrogen is less, the defects are less, and a dense silicon nitride film can be formed. On the other hand, when the amount of ammonia relative to nitrogen is large, the decomposition of the depositable gas containing silicon and nitrogen does not proceed, the silicon and hydrogen bonds remain, the defects increase, and a rough silicon nitride film is formed. For these reasons, in the source gas, it is preferable that the flow rate ratio of nitrogen to ammonia is 5 times or more and 50 times or less, and 10 times or more and 50 times or less.

[0311] In this embodiment, as the insulating film 118, a silicon nitride film with a thickness of 50 nm is formed using a PECVD apparatus with silane, nitrogen and ammonia as source gases. The flow rates are 50 sccm for silane, 5000 sccm for nitrogen, and 100 s ccm for ammonia. The pressure in the processing chamber is 100 Pa, the substrate temperature is 350 °C, and 1000 W of high-frequency power is supplied to the parallel plate electrode using a high-frequency power supply of 27.12 MHz The PECVD apparatus is a parallel plate type PECVD apparatus with an electrode area of 6000 cm 2 When the supplied power is converted to the power per unit area (power density), it is 1.7×10 W / cm -1 2

[0312] Note that after forming the insulating film 116, the insulating film 118 may be continuously formed without exposing it to the atmosphere. After forming the insulating film 116, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas and continuously forming the insulating film 118, the insulating film 116 ​​​​​Therefore, the concentration of impurities derived from atmospheric components can be reduced at the interface between the insulating film 118 and the insulating film 118.

[0313] After the insulating film 118 is formed, the insulating film 118 is heated by the same processes as the first and second heat treatments described above. A heat treatment (hereinafter referred to as a third heat treatment) may be performed.

[0314] By performing the third heat treatment, oxygen in the insulating film 116 is removed from the metal oxide films 108 and 20 8 and compensates for the oxygen vacancies in the metal oxide films 108 and 208 .

[0315] Next, a conductive film 130 is formed on the insulating film 118 (FIGS. 18A, 18B, and 1 8(C)).

[0316] A light-transmitting conductive film can be used for the conductive film 130. Examples of indium oxide include indium tin oxide, indium zinc oxide, and tungsten oxide. Indium oxide, indium zinc oxide with tungsten oxide, indium zinc oxide with titanium oxide Indium tin oxide, indium tin oxide with titanium oxide, indium tin oxide with silicon oxide The insulating layer 11 can be formed using a conductive material such as aluminum.

[0317] The conductive film 130 was formed by using an In-Ga-Zn metal oxide target (In:Ga:Zn When the conductive film is formed using the atomic ratio of 4:2:4.1, the insulating film 118 is formed. As a result, one or both of hydrogen and nitrogen contained in the insulating film 118 are converted into the conductive film 1 In this case, oxygen vacancies in the conductive film 130 and hydrogen and nitrogen By bonding one or both of them, the resistance of the conductive film 130 is reduced. The conductive film 130 having a reduced resistance can be formed by using an oxide. It is a conductor film.

[0318] A sputtering apparatus can be used to form the conductive film 130. When forming the conductive film 130 , plasma is discharged in an atmosphere containing oxygen gas. At this time, oxygen is added to the insulating film 118 that becomes the surface to be formed of the conductive film 130 . Also, when forming the conductive film 130, in addition to oxygen gas, an inert gas (for example, helium gas, argon gas, xenon gas, etc.) may be mixed.

[0319] As the oxygen gas, it is sufficient that it is included at least when forming the conductive film 130. As the ratio of oxygen gas in the entire film-forming gas when forming the conductive film 130, it is greater than 0% and 1 00% or less, preferably 10% or more and 100% or less, more preferably 30% or more and 100% or less.

[0320] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn = 4:2 :4.1 [atomic ratio]) is used to form the conductive film 130 by sputtering. Also or, the conductive film 130 may be formed by a sputtering method using an ITO target and 100% oxygen gas as the film-forming gas.

[0321] Note that, in this embodiment, although an example of a method of adding oxygen to the insulating film 116 when forming the conductive film 130 is illustrated, it is not limited thereto. For example, after forming the conductive film 130, further oxygen may be added to the insulating film 116.

[0322] As a method of adding oxygen to the insulating film 116, for example, an oxide (also referred to as In-Sn-Si oxide, ITSO) target having indium, tin, and silicon (In2O3 ) :An ITSO film with a thickness of 5 nm is formed using SnO2:SiO2 = 85:10:5 [wt%]). This can be achieved. In this case, the thickness of the ITSO film is preferably 1 nm or more and 20 nm or less, or more preferably 2 nm or more and 10 nm or less, as it can preferably permeate oxygen and suppress the release of oxygen. Thereafter, oxygen is added to the insulating film 116 by passing it through the ITSO film. As a method of adding oxygen, ion doping method, ion implantation method, plasma treatment method, etc. can be mentioned. In addition, when adding oxygen, oxygen can be effectively added to the insulating film 116 by applying a bias voltage to the substrate side. As the above bias voltage, for example, using an ashing device, the power density of the bias voltage applied to the substrate side of the ashing device is 1 W / cm 2 or more and 5 W / cm 2 or less. Also, as the substrate temperature when adding oxygen, room temperature or more and 300 °C or less, preferably 100 °C or more and 250 °C or less, can efficiently add oxygen to the insulating film 11 6.

[0323] Next, the conductive film 130 is processed into a desired shape to form the conductive film 130a (see FIGS. 19 (A), 19(B), and 19(C)). The process of forming the conductive film 130a becomes the third lithography process.

[0324] In this embodiment, wet etching is used to form the conductive film 130a. Dry etching may be used to form the conductive film 130a.

[0325] Next, an insulating film 119 is formed on the insulating film 118 and the conductive film 130a (see FIGS. 20(A), FIGS. 20(B), and 20(C)). The insulating film 119 overlaps with the conductive film 212b in the region where it overlaps, It has an opening 242. The insulating film 119 has an opening 142 in a region overlapping with the conductive film 113. The insulating film 119 has an opening 144 in a region overlapping with the conductive film 115a. The insulating film 119 does not overlap with the conductive film 130a and has an opening 14 6 in a region overlapping with the conductive film 104. The insulating film 119 has an opening 148 in a region overlapping with the conductive film 130a.

[0326] After applying a photosensitive resin on the insulating film 118 and the conductive film 130a, exposure and development are performed to form the insulating film 119. Alternatively, after applying a non - photosensitive resin on the insulating film 118 and the conductive film 130a, firing is performed. Next, a resist mask is formed, and by etching the fired non - photosensitive resin using the resist mask, the insulating film 119 can be formed . The process of forming the insulating film 119 becomes the fourth lithography process.

[0327] Next, using the insulating film 119 as a mask, a part of the insulating film 106, the insulating film 114, the insulating film 116, and the insulating film 118 is removed (see FIGS. 21(A), 21(B), and 21(C)). The insulating films 114, 116, and 118 in the region overlapping with the opening 242 are removed to expose the conductive film 212b and form an opening 242a. The insulating films 106, 114, 116, and 118 in the region overlapping with the opening 142 are removed to expose the conductive film 113 and form an opening 142a. The insulating films 114, 11 6, and 118 in the region overlapping with the opening 144 are removed to expose the conductive film 115a and form an opening 144a. The insulating films 106, 114, 116, and 118 in the region overlapping with the opening 146 are removed to expose the conductive film 104 and form an opening 146a. The insulating films 106, 114, 116, and 11 8 in the region overlapping with the opening 148 are removed to expose the conductive film 104 and form an opening 146a. The insulating films 106, 114, 116, and 11 8 in the region overlapping with the opening 148 are removed to expose the conductive film 104 and form an opening 146a. The conductive film 130a in the area to be retained is not removed, and the opening 148a is formed.

[0328] The openings 242a, 142a, 144a, 146a, and 148a can be formed using dry etching. Wet etching may also be used. Dry etching and wet etching may be used in combination.

[0329] The openings 242a, 142a, 144a, 146a, and 148a In the formation thereof, the etching rates of the insulating films 106, 114, 116, and 118 are preferably high, and the etching rates of the conductive films 212b, 113, 115a, and 130a are preferably low. Also, the etching rate of the insulating film 119 is preferably low. The etching rates of the insulating films 106, 114, 116, and 118 are fast, and the etching rates of the conductive films 212b, 113, 115a, and 130a are slow. In the formation of the openings 242a, 142a, 144a, 146a, and 148a, the film thickness of the insulating film 119 may become thin. The reduced film thickness can be adjusted by increasing the film thickness during the formation of the insulating film 119. is preferred.

[0330] The openings 242a, 142a, 144a, 146a, and 148a In the formation thereof, the film thickness of the insulating film 119 may become thin. The reduced film thickness can be adjusted by increasing the film thickness during the formation of the insulating film 119. is preferred.

[0331] Next, a conductive film that becomes the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring is formed on the insulating film 119, the openings 242a, 142a, 144a, 146a, and 148a. The conductive film is processed through a lithography process and an etching process to form the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring. 0a and the conductive film 12

[0332] The conductive film is processed through a lithography process and an etching process to form the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring. The conductive film is processed through a lithography process and an etching process to form the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring. Form 0b (see FIGS. 22(A), 22(B), and 22(C)). The conductive film 120a is provided, whereby the conductive film 113 and the conductive film 115a are electrically connected. The conductive film 120 is provided, whereby the conductive film 130a and the conductive film 104 are electrically connected.

[0333] The step of forming the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring becomes the fifth lithography step.

[0334] As described above, the display device shown in FIGS. 1(A), 1(B), and 1(C) can be manufactured by five lithography steps. can be manufactured.

[0335] In one aspect of the present invention, a display device can be manufactured with a small number of five lithography steps. By reducing the number of lithography steps, the margin of pattern placement can be reduced, and miniaturization of transistors and high definition of the display device can be achieved. Also, by reducing the lithography steps, simplification of the process and improvement of the yield can be achieved. Further, by reducing the lithography steps, the cost of the mask can be reduced. Also, by reducing the lithography steps, the margin of pattern placement can be reduced, and miniaturization of transistors and high definition of the display device can be achieved. Also, by reducing the lithography steps, simplification of the process and improvement of the yield can be achieved. Further, by reducing the lithography steps, the cost of the mask can be reduced. Also, by reducing the lithography steps, the margin of pattern placement can be reduced, and miniaturization of transistors and high definition of the display device can be achieved. Also, by reducing the lithography steps, simplification of the process and improvement of the yield can be achieved. Further, by reducing the lithography steps, the cost of the mask can be reduced. Also, by reducing the lithography steps, the margin of pattern placement can be reduced, and miniaturization of transistors and high definition of the display device can be achieved. Also, by reducing the lithography steps, simplification of the process and improvement of the yield can be achieved. Further, by reducing the lithography steps, the cost of the mask can be reduced. Also, by reducing the lithography steps, the margin of pattern placement can be reduced, and miniaturization of transistors and high definition of the display device can be achieved. Also, by reducing the lithography steps, simplification of the process and improvement of the yield can be achieved. Further, by reducing the lithography steps, the cost of the mask can be reduced.

[0336] <Manufacturing Method 2 of Display Device> The manufacturing method of the transistors 100B, transistors 200B, capacitive elements 250B, and connection parts 150B included in the display device according to one aspect of the present invention shown in FIGS. 3(A), 3(B), and 3(C) will be described with reference to FIGS. 23 to 29. The manufacturing method of the transistors 100B, transistors 200B, capacitive elements 250B, and connection parts 150B included in the display device according to one aspect of the present invention shown in FIGS. 3(A), 3(B), and 3(C) will be described with reference to FIGS. 23 to 29. The manufacturing method of the transistors 100B, transistors 200B, capacitive elements 250B, and connection parts 150B included in the display device according to one aspect of the present invention shown in FIGS. 3(A), 3(B), and 3(C) will be described with reference to FIGS. 23 to 29.

[0337] Note that FIGS. 23 to 29 are cross-sectional views for explaining the manufacturing method of the display device. In FIGS. 23 to 29, the one-dot chain line X1-X2 direction is a cross-section in the channel length direction of the transistor 200B. In FIGS. 23 to 29, the one-dot chain line X1-X2 direction is a cross-section in the channel length direction of the transistor 200B. It is a figure, and the cross-sectional view in the direction of the dash-dotted line X3-X4 is the cross-sectional view in the channel length direction of the transistor 100B. The cross-sectional view in the direction of the dash-dotted line Y1-Y2 is the cross-sectional view in the channel width direction of the transistor 100B. .

[0338] The display devices shown in FIGS. 3(A), 3(B), and 3(C) are the same as the display devices shown in FIGS. 1(A), 1(B), and 1(C), and are formed up to the conductive film 215, the conductive film 212a, the conductive film 212b, the conductive film 112a, the conductive film 112b, and the conductive film 115a.

[0339] Next, an insulating film 114 and an insulating film 116 are formed on the conductive film 215a, the conductive film 212a, the conductive film 212b, the conductive film 112a, the conductive film 11 2b, and the conductive film 115a (see FIGS. 23(A), 23(B), and 23(C)).

[0340] Next, a conductive film 132 is formed on the insulating film 116 (see FIGS. 25(A), 25(B), and FIG. 2 5(C)).

[0341] As the conductive film 132, a conductive film using an In-Ga-Zn metal oxide target (In:Ga:Zn = 4: 2:4.1 [atomic ratio]) can be formed. When the insulating film 118 is formed on the conductive film 132 , either one or both of hydrogen and nitrogen contained in the insulating film 118 may enter the conductive film 132. In this case, the resistance of the conductive film 132 is reduced by the combination of oxygen vacancies in the conductive film 132 and either one or both of hydrogen and nitrogen. A conductive film 132 with reduced resistance can be formed. Note that the conductive film with reduced resistance is an oxide conductor film.

[0342] Note that FIGS. 24(A), 24(B), and 24(C) show that on the insulating film 116, the conductive film 13 It is a schematic cross-sectional view inside a film-forming apparatus when forming 2. In FIGS. 24(A), 24(B), and 24(C), a sputtering apparatus is used as the film-forming apparatus, and the target 193 installed in the interior of the sputtering apparatus and the plasma 194 formed below the target 193 are schematically

[0343] First, when forming the conductive film 132, plasma is discharged in an atmosphere containing oxygen gas. At that time, oxygen is added to the insulating film 116 that becomes the surface to be formed of the conductive film 132. Also, when forming the conductive film 132, in addition to oxygen gas, an inert gas (for example, helium gas, ar gon gas, xenon gas, etc.) may be mixed.

[0344] As the oxygen gas, it is sufficient if it is contained at least when forming the conductive film 132. As the ratio of oxygen gas in the entire film-forming gas when forming the conductive film 132, it is greater than 0% and 1 00% or less, preferably 10% or more and 100% or less, and more preferably 30% or more and 100% or less.

[0345] In FIGS. 24(A), 24(B), and 24(C), the oxygen or excess oxygen added to the insulating film 116 is schematically represented by a dashed arrow.

[0346] In this embodiment, a conductive film 132 is formed by sputtering using an In-Ga-Zn metal oxide target (In:Ga:Zn = 4:2 :4.1 [atomic ratio]). Or, a conductive film 132 may be formed by a sputtering method using an ITO target and 100% oxygen gas as the film-forming gas.

[0347] ​​​​In addition, in this embodiment, when forming the conductive film 132, oxygen is added to the insulating film 116. Although the method has been exemplified, it is not limited thereto. For example, after forming the conductive film 132, oxygen may be further added to the insulating film 116.

[0348] As a method of adding oxygen to the insulating film 116, for example, an oxide (also referred to as In-Sn-Si oxide, ITSO) target having indium, tin, and silicon (In2O3 :SnO2:SiO2 = 85:10:5 [wt%]) may be used to form an ITSO film with a thickness of 5 nm. In this case, the thickness of the ITSO film is preferably 1 nm or more and 20 nm or less, or 2 nm or more and 10 nm or less, so that oxygen can permeate suitably and the release of oxygen can be suppressed. Thereafter, the ITSO film is passed through to add oxygen to the insulating film 116. As a method of adding oxygen, an ion doping method, an ion implantation method, a plasma treatment method, etc. may be mentioned. In addition, when adding oxygen, oxygen can be effectively added to the insulating film 116 by applying a bias voltage to the substrate side. As the above bias voltage, for example, using an ashing device, the power density of the bias voltage applied to the substrate side of the ashing device is 1 W / cm 2 or more and 5 W / cm 2 or less. In addition, the substrate temperature when adding oxygen is room temperature or more and 300 °C or less, preferably 100 °C or more and 250 °C or less, so that oxygen can be efficiently added to the insulating film 11 6.

[0349] Next, the conductive film 132a is formed by processing the conductive film 132 into a desired shape (see FIGS. 26 (A), 26(B), and 26(C)). The step of forming the conductive film 132a becomes the third lithography step.

[0350] In this embodiment, wet etching is used to form the conductive film 132a. Dry etching may be used to form the conductive film 132a.

[0351] Next, an insulating film 118 is formed on the insulating film 116 and the conductive film 132a.

[0352] Next, an insulating film 119 is formed on the insulating film 118 (see FIGS. 27(A), 27(B), and FIG. 27(C)). The insulating film 119 has an opening 242 in a region overlapping with the conductive film 212b. The insulating film 119 has an opening 142 in a region overlapping with the conductive film 113. The insulating film 11 9 has an opening 144 in a region overlapping with the conductive film 115a. The insulating film 119 has an opening 146 in a region that does not overlap with the conductive film 132a and overlaps with the conductive film 104. The insulating film 119 has an opening 148 in a region overlapping with the conductive film 132a.

[0353] After applying a photosensitive resin on the insulating film 118 and the conductive film 132a, exposure and development are performed to form the insulating film 119. Alternatively, after applying a non-photosensitive resin on the insulating film 118 and the conductive film 132a, firing is performed. Next, a resist mask is formed, and the non-photosensitive resin fired using the resist mask is etched to form the insulating film 119 . The step of forming the insulating film 119 becomes the fourth lithography step.

[0354] Next, using the insulating film 119 as a mask, a part of the insulating film 106, the insulating film 114, the insulating film 116, and the insulating film 118 is removed (see FIGS. 28(A), 28(B), and FIG. 28(C)). The insulating film 114, the insulating film 116, and the insulating film 118 in the region overlapping with the opening 242 are removed to expose the conductive ​Expose the film 212b to form the opening 242b. The insulating film in the region overlapping with the opening 142 Remove the insulating films 106, 114, 116, and 118 to expose the conductive film 113 and form the opening 142b. Remove the insulating films 114, 11 6, and 118 in the region overlapping with the opening 144 to expose the conductive film 115a and form the opening 144b. Remove the insulating films 106, 114, 116, and 11 8 in the region overlapping with the opening 146 to expose the conductive film 104 and form the opening 146b. Remove the insulating film 118 in the region overlapping with the opening 148 to expose the conductive film 132a and form the opening 148b .

[0355] For the formation of the openings 242b, 142b, 144b, 146b, and 148b , dry etching can be used. Wet etching may also be used . Dry etching and wet etching may be used in combination.

[0356] For the formation of the openings 242b, 142b, 144b, 146b, and 148b , it is preferable that the etching rate of the insulating films 106, 114, 116, and 118 is fast and the etching rate of the conductive films 212b, 113, 115a, and 132a is slow. Also, it is preferable that the etching rate of the insulating film 119 is slow .

[0357] For the formation of the openings 242b, 142b, 144b, 146b, and 148b , the thickness of the insulating film 119 may become thin. This reduction in thickness can be adjusted by increasing the thickness of the insulating film 119 during its formation .

[0358] ​​​ Next, on the insulating film 119, the opening 242b, the opening 142b, the opening 144b, the opening 146 b, and the opening 148b, a conductive film 220, a conductive film 12 0a having a function as a fourth wiring and a conductive film 120b having a function as a first wiring are formed.

[0359] The conductive film is processed through a lithography process and an etching process to form a conductive film 220, a conductive film 12 0a having a function as a fourth wiring and a conductive film 120b having a function as a first wiring (see FIGS. 29(A), 29(B), and 29(C)). By forming the conductive film 120a, the conductive film 113 and the conductive film 115a are electrically connected. By forming the conductive film 12 0b, the conductive film 132a and the conductive film 104 are electrically connected.

[0360] The step of forming the conductive film 220, the conductive film 120a having a function as a fourth wiring, and the conductive film 120b having a function as a first wiring becomes the fifth lithography process.

[0361] As described above, the display device shown in FIGS. 3(A), 3(B), and 3(C) can be manufactured through five lithography processes.

[0362] In one aspect of the present invention, a display device can be manufactured with as few as five lithography processes. By reducing the number of lithography processes, the margin of pattern placement can be reduced, and further, miniaturization of transistors and high definition of the display device can be achieved. Also, by reducing the lithography processes, simplification of the process and improvement of the yield can be achieved. Further, by reducing the lithography processes, the cost of the mask can be reduced.

[0363] <Manufacturing Method 3 of Display Device> The fabrication method of the transistor 100C, transistor 200C, capacitive element 250C, and connection part 150C included in the display device according to one aspect of the present invention shown in FIGS. 4(A), 4(B), and 4(C) will be described with reference to FIGS. 30 to 32. The display device shown in FIGS. 4(A), 4(B), and 4(C) is formed up to the insulating film 118 in the same manner as the display device shown in FIGS. 1(A), 1(B), and 1(C).

[0364] Next, an insulating film 119 is formed on the insulating film 118 (see FIGS. 30(A), 30(B), and 30(C)). The insulating film 119 has an opening 242 in a region overlapping the conductive film 212b. The insulating film 119 has an opening 142 in a region overlapping the conductive film 113. The insulating film 119 has an opening 144 in a region overlapping the conductive film 115a.

[0365] The insulating film 119 can be formed by applying a photosensitive resin on the insulating film 118 and then performing exposure and development. Alternatively, a non-photosensitive resin is applied on the insulating film 118 and then fired. Next, a resist mask is formed, and the non-photosensitive resin fired using the resist mask is etched to form the insulating film 119. The step of forming the insulating film 119 becomes the third lithography step.

[0366] Next, using the insulating film 119 as a mask, a part of the insulating film 106, insulating film 114, insulating film 116, and insulating film 118 is removed (see FIGS. 31(A), 31(B), and 31(C)). The insulating film 114, insulating film 116, and insulating film 118 in the region overlapping the opening 242 are removed to expose the conductive film 212b, and an opening 242c is formed. The insulating film Remove the insulating films 106, 114, 116, and 118 to expose the conductive film 113, and form the opening 142c. Remove the insulating films 114, 116, and 118 in the region overlapping the opening 144 to expose the conductive film 115a, and form the opening 144c. For the formation of the openings 242c, 142c, and 144c, dry etching can be used. Also, wet etching may be used. A combination of dry etching and wet etching may be used. In the formation of the openings 242c, 142c, and 144c, it is preferable that the etching rates of the insulating films 106, 114, 116, and 118 are fast, and the etching rates of the conductive films 212b, 113, 115a, and 132a are slow. Also, it is preferable that the etching rate of the insulating film 119 is slow.

[0367] In the formation of the openings 242c, 142c, and 144c, the film thickness of the insulating film 119 may become thinner. This reduction in film thickness can be adjusted by increasing the film thickness during the formation of the insulating film 119. Next, form a conductive film that becomes the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring on the insulating film 119, the openings 242c, 142c, and 144c. Process the conductive film through a lithography process and an etching process to obtain the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring.

[0368] Remove the insulating films 106, 114, 116, and 118 to expose the conductive film 113, and form the opening 142c. Remove the insulating films 114, 116, and 118 in the region overlapping the opening 144 to expose the conductive film 115a, and form the opening 144c. For the formation of the openings 242c, 142c, and 144c, dry etching can be used. Also, wet etching may be used. A combination of dry etching and wet etching may be used. In the formation of the openings 242c, 142c, and 144c, it is preferable that the etching rates of the insulating films 106, 114, 116, and 118 are fast, and the etching rates of the conductive films 212b, 113, 115a, and 132a are slow. Also, it is preferable that the etching rate of the insulating film 119 is slow. In the formation of the openings 242c, 142c, and 144c, the film thickness of the insulating film 119 may become thinner. This reduction in film thickness can be adjusted by increasing the film thickness during the formation of the insulating film 119.

[0369] Next, form a conductive film that becomes the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring on the insulating film 119, the openings 242c, 142c, and 144c. Process the conductive film through a lithography process and an etching process to obtain the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring. Remove the insulating films 106, 114, 116, and 118 to expose the conductive film 113, and form the opening 142c. Remove the insulating films 114, 116, and 118 in the region overlapping the opening 144 to expose the conductive film 115a, and form the opening 144c.

[0370] For the formation of the openings 242c, 142c, and 144c, dry etching can be used. Also, wet etching may be used. A combination of dry etching and wet etching may be used. In the formation of the openings 242c, 142c, and 144c, it is preferable that the etching rates of the insulating films 106, 114, 116, and 118 are fast, and the etching rates of the conductive films 212b, 113, 115a, and 132a are slow. Also, it is preferable that the etching rate of the insulating film 119 is slow. In the formation of the openings 242c, 142c, and 144c, the film thickness of the insulating film 119 may become thinner. This reduction in film thickness can be adjusted by increasing the film thickness during the formation of the insulating film 119.

[0371] Next, form a conductive film that becomes the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring on the insulating film 119, the openings 242c, 142c, and 144c. Process the conductive film through a lithography process and an etching process to obtain the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring. Form 0b (see FIGS. 32(A), 32(B), and 32(C)). The conductive film 120a By forming, the conductive film 113 and the conductive film 115a are electrically connected.

[0372] The step of forming the conductive film 220, the conductive film 120a having the function of the fourth wiring, and the conductive film 120b having the function of the first wiring Becomes the fourth lithography process.

[0373] As described above, the display device shown in FIGS. 4(A), 4(B), and 4(C) can be manufactured by four lithography processes. Can be manufactured.

[0374] In this embodiment, in one lithography process, the metal oxide film 228, the metal oxide Film 208, metal oxide film 108, metal oxide film 128, conductive film 215a, conductive film 212a , Conductive film 212b, conductive film 112a, conductive film 112b, and conductive film 115a were formed. Gold The formation of the metal oxide film 228, the metal oxide film 208, the metal oxide film 108, and the metal oxide film 128 And the formation of the conductive film 215a, the conductive film 212a, the conductive film 212b, the conductive film 112a, the conductive film 1 112b and the conductive film 115a may be performed in separate lithography processes. Separate When performing in a lithography process, the display device shown in FIGS. 4(A), 4(B), and FIG. 4(C) can be manufactured.

[0375] In one aspect of the present invention, a display device can be manufactured with a small number of four or five lithography processes. By reducing the lithography process, the margin of pattern arrangement can be reduced, and In addition, miniaturization of transistors and high definition of display devices become possible. Also, the lithography process By reducing, simplification of the process and improvement of the yield become possible. Also, by reducing the lithography process By subtracting, the cost of the mask can be reduced.

[0376] <Fabrication method 4 of display device> The transistors 100D, transistors 200D, capacitive elements 250D, and connection part 150D included in the display device according to one aspect of the present invention shown in FIGS. 6(A), 6(B), and 6(C) The fabrication method will be described with reference to FIGS. 33 to 41.

[0377] Note that FIGS. 33 to 41 are cross-sectional views for explaining the fabrication method of the display device. In FIGS. 33 to 41, the direction of the dashed-dotted line X1-X2 is a cross-sectional view in the channel length direction of the transistor 200D and the direction of the dashed-dotted line X3-X4 is a cross-sectional view in the channel length direction of the transistor 100D. The direction of the dashed-dotted line Y1-Y2 is a cross-sectional view in the channel width direction of the transistor 100D.

[0378] The display device shown in FIGS. 6(A), 6(B), and 6(C) is formed of a metal oxide film 108a and a metal oxide film 108b, similarly to the display device shown in FIGS. 1(A), 1(B), and 1(C).

[0379] Next, a lithography process and an etching process are performed on the metal oxide film 108 and the insulating film 106 to form an opening 160 in a region overlapping with the conductive film 113 (see FIGS. 33(A), 33 (B), and 33(C)). In the opening 160, the conductive film 113 is exposed. The process of forming the opening 160 becomes the second lithography process.

[0380] Next, a conductive film 112 is formed on the metal oxide film 108. Next, as the third lithography process resist masks 251, resist masks 253, resist masks Form the resist mask 151 and the resist mask 153 (see FIGS. 34(A), 34(B), and 34 (C)). The steps of forming the resist mask 251, the resist mask 253, the resist mask 151, and the resist mask 153 constitute the third lithography process.

[0381] In this embodiment, as the conductive film 112, a titanium film with a thickness of 30 nm, a copper film with a thickness of 200 nm, and a titanium film with a thickness of 10 nm are formed in sequence by sputtering.

[0382] The resist mask 253 has a region 255 where the resist film thickness is thin in the region overlapping the conductive film 204. The region 255 can also be said to be a concave portion. The resist mask 151 has a region 155 where the resist film thickness is thin in the region overlapping the conductive film 104. The region 155 can also be said to be a concave portion. In this embodiment, exposure using a multi-tone (high-tone) mask is used for forming the resist mask.

[0383] After exposure using the multi-tone mask and development, as shown in FIGS. 34(A), 34(B), and 34(C), a resist mask having regions with different film thicknesses can be formed.

[0384] Note that although an example with two types of resist film thicknesses is shown as the multi-tone mask, the embodiments of the present invention are not limited to this. By using the diffraction grating portion 18 or the semi-transmissive film 23 having a plurality

[0385] of light transmittance rates, a resist having three or more types of film thicknesses can Mask the mask 153, remove a part of the conductive film 112 and the metal oxide film 108, and conduct film 215, conductive film 212A, conductive film 112A, conductive film 115, metal oxide film 228, metal oxide film 208, metal oxide film 108, and metal oxide film 128 are respectively formed (see FIGS. 3 5(A), 35(B), and 35(C)).

[0386] Wet etching can be used for processing the conductive film 112. However, the processing method is not limited to this. For example, dry etching may be used. Wet etching can be used for processing the metal oxide film 1 08b. However, the processing method is not limited to this. For example, dry etching may be used.

[0387] Different etching may be used for processing the conductive film 112, the metal oxide film 108a, and the metal oxide film 108b. For example, dry etching may be used for processing the conductive film 112, and wet etching may be used for processing the metal oxide films 108a and 108b.

[0388] Next, remove a part of the resist mask 251, the resist mask 253, the resist mask 151, and the resist mask 153 to reduce the area of the resist mask. By reducing the area of the resist mask, the resist mask 251a, the resist mask 253a, the resist mask 253b, the resist mask 151a, the resist mask 151b, and the resist mask 15 3a are respectively formed (see FIGS. 36(A), 36(B), and 36(C)).

[0389] An ashing device can be used to remove a part of the resist mask. By ashing As the area of the resist mask decreases, the thickness of the resist mask may also decrease. There is such a case.

[0390] For example, ashing may use photoexcitation ashing in which light such as ultraviolet light is irradiated onto gases such as oxygen and ozone to cause a chemical reaction between the gas and the organic matter to remove the organic matter. As ashing, a plasma ashing that plasmas gases such as oxygen and ozone with high frequency or the like and uses the plasma to remove organic matter may also be used. As for ashing, plasma ashing that plasmas gases such as oxygen and ozone with high frequency or the like and uses the plasma to remove organic matter may also be used.

[0391] In the thin regions 255 of the resist mask 253 and the thin regions 155 of the resist mask 151, the resist is removed by the ashing, and the resist masks are separated as shown in FIGS. 36(A), 36(B), and 36(C). By removing a part of the resist mask, the resist mask in the region 255a overlapping the conductive film 204 is removed, and the conductive film 212A in the region 255a is exposed. Also, the resist mask in the region 155a overlapping the conductive film 104 is removed, and the conductive film 112A in the region 155a is exposed.

[0392] Also, the end of the resist mask 251a is located inside the end of the conductive film 215. The ends of the resist masks 253a and 253b are located inside the ends of the conductive film 212A. The ends of the resist masks 151a and 151b are located inside the ends of the conductive film 1 112A. The end of the resist mask 153a is located inside the end of the conductive film 115.

[0393] Next, the resist masks 251a, 253a, 253b, and the resist Using the distomask 151a, the resist mask 151b, and the resist mask 153a as masks , a part of the conductive film 215, the conductive film 212A, the conductive film 112A, and the conductive film 115 is removed, and the conductive films 215a, 212a, 212b, 112a, 112b, and 115a are respectively formed (see FIGS. 37(A), 37(B), and 37(C)). .

[0394] The end of the conductive film 215a is located inside the end of the metal oxide film 228. The ends of the conductive films 212 a and 212b are located inside the end of the metal oxide film 208. The ends of the conductive films 112a and 112b are located inside the end of the metal oxide film 108. The end of the conductive film 115a is located inside the end of the metal oxide film 128.

[0395] Next, the resist masks 251a, 253a, 253b, 151a, 151b, and 153a are removed.

[0396] After removing the resist masks, the surfaces (backside) of the metal oxide films 108, 128, 208, and 228 (more specifically, the metal oxide films 108_2, 128_2, 208_2, and 228_2) may be cleaned. Examples of the cleaning method include cleaning using a chemical solution such as phosphoric acid. By cleaning using a chemical solution such as phosphoric acid, impurities (for example, the conductive films 112a, 112b, 212a, and the conductive film It is possible to remove elements contained in 212b. However, it is not always necessary to carry out such cleaning. It is not necessary, and in some cases, cleaning may not be performed.

[0397] In addition, the conductive film 112a, the conductive film 112b, the conductive film 212a, and the conductive film 212b are formed. In either or both of the above-mentioned cleaning step and the above-mentioned cleaning step, the conductive film 112a and the conductive film 1 12b, the conductive film 212a and the conductive film 212b to the metal oxide film 108 and the metal oxide film 2 In the region where 08 is exposed, the thickness of the metal oxide film 108 and the metal oxide film 208 becomes thin. There is a match.

[0398] In addition, the regions where the metal oxide film 108 and the metal oxide film 208 are exposed, i.e., the metal oxide The metal oxide film 108_2 and the metal oxide film 208_2 are metal oxide films with enhanced crystallinity. It is preferable that the metal oxide film having high crystallinity is free of impurities, particularly the conductive film 112a and the conductive film 11 2b, the conductive film 212a and the conductive film 212b are configured such that the constituent elements thereof are unlikely to diffuse into the film. Therefore, a highly reliable transistor can be manufactured.

[0399] In addition, in FIG. 37(A), FIG. 37(B), and FIG. 37(C), the conductive film 112a, the conductive film 112b, conductive film 115a, conductive film 212a, conductive film 212b, and conductive film 215a. The metal oxide film 108, the metal oxide film 128, the metal oxide film 208, and the metal oxide film 2 28, i.e., the metal oxide film 108_2, the metal oxide film 128_2, the metal oxide film Although the case where recesses are formed on the surfaces of the metal oxide film 208_2 and the metal oxide film 228_2 has been illustrated, , but is not limited to this, the conductive film 112a, the conductive film 112b, the conductive film 115a, the conductive film 212 a, the metal oxide film 108 exposed from the conductive film 212b and the conductive film 215a, the metal oxide film 128, the surface of the metal oxide film 208 and the metal oxide film 228 may not have recesses .

[0400] Next, an insulating film 114, an insulating film 116, and an insulating film 1 18 are formed on the metal oxide film 108, the metal oxide film 128, the metal oxide film 208, the metal oxide film 228, the conductive film 215a, the conductive film 212a, the conductive film 212b, and the conductive film 112 a, the conductive film 112b, and the conductive film 115a (see FIGS. 38(A), 38(B), and 38(C)).

[0401] For the method of forming the insulating film 114, the insulating film 116, and the insulating film 118, refer to the foregoing description and detailed description is omitted.

[0402] Note that after forming the insulating film 114, it is preferable to continuously form the insulating film 116 without exposing to the atmosphere . After forming the insulating film 114, without opening to the atmosphere, adjust one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas, and continuously form the insulating film 116, so as to reduce the impurity concentration derived from the atmospheric components at the interface between the insulating film 114 and the insulating film 116 .

[0403] Note that after forming the insulating film 116, it may be possible to continuously form the insulating film 118 without exposing to the atmosphere . After forming the insulating film 116, without opening to the atmosphere, adjust one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas, and continuously form the insulating film 118, so as to reduce the impurity concentration derived from the atmospheric components at the interface between the insulating film 116 and the insulating film 118

[0404] After the insulating film 118 is formed, the insulating film 118 is heated by the same processes as the first and second heat treatments described above. A heat treatment (hereinafter referred to as a third heat treatment) may be performed.

[0405] By performing the third heat treatment, oxygen in the insulating film 116 is removed from the metal oxide films 108 and 20 8 and compensates for the oxygen vacancies in the metal oxide films 108 and 208 .

[0406] Next, in a fourth lithography process, an insulating film 119 is formed on the insulating film 118 (FIG. 3). 9(A), 39(B), and 39(C). The insulating film 119 overlaps the conductive film 212b. The insulating film 119 has an opening 242 in a region where the conductive film 104 and the metal oxide film 10 The insulating film 119 has a thin region 157 in the region overlapping with the recess 8. The insulating film 119 overlaps with the conductive film 104 but does not overlap with the metal oxide film 108. In this embodiment, the insulating film 119 is formed in a multi-tone (high-level) pattern. By using a multi-tone (high-gradation) mask, the thickness of the film can be varied. In this way, the insulating film 119 having a region can be formed.

[0407] After applying a photosensitive resin onto the insulating film 118, the resin is exposed to light and developed to form an insulating film 119. Alternatively, a non-photosensitive resin is applied onto the insulating film 118 and then baked. A resist mask is formed, and the baked non-photosensitive resin is etched using the resist mask. In this way, the insulating film 119 can be formed.

[0408] Next, the insulating film 119 is used as a mask to mask the insulating films 106, 114, 116 and A portion of the membrane 118 is removed (see Figures 40(A), 40(B) and 40(C)). Remove the insulating films 114, 116, and 118 in the region overlapping with the mouth portion 242 to expose the conductive film 212b and form the opening 242d. Remove the insulating films 106, 114, 116, and 118 in the region overlapping with the opening 146 to expose the conductive film 104 and form the opening 146d. Remove part of these insulating films 106, 114, 116, and 118, and also remove part of the insulating film 119. Remove the insulating film 119 in the region 15 7 to expose the insulating film 118 and form the opening 142d.

[0409] Dry etching can be used to form the openings 242d, 142d, and 146d. Also, wet etching may be used. Dry etching and wet etching may be used in combination.

[0410] In forming the openings 242d, 142d, and 146d, it is preferable that the etching rates of the insulating films 106, 114, 116, and 118 are fast, and the etching rates of the conductive films 212b, 113, and 115a are slow.

[0411] In forming the openings 242d, 142d, and 146d, the film thickness of the insulating film 119 may become thin. The reduced film thickness can be adjusted by increasing the film thickness when forming the insulating film 119.

[0412] Ashing may be used to remove the insulating film 119 in the region 157. By ashing, the area of the insulating film 119 may be reduced, and the thickness of the insulating film 119 may become thin. The reduced film thickness can be adjusted by increasing the film thickness when forming the insulating film 119. ​​

[0413] Next, a conductive film is formed on the insulating film 119, the opening 242a, the opening 142d, and the opening 146d. The conductive film is processed into a desired shape to form the conductive film 220 and the conductive film 130d. (See FIGS. 41(A), 41(B), and 41(C)). The formation of the conductive film 220 and the conductive film 130d is the fifth lithography process.

[0414] For the conductive film 220 and the conductive film 130d, a conductive film having light transmissivity can be used. As the light-transmissive conductive film, for example, indium tin oxide, indium zinc oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide containing silicon oxide, or other conductive materials can be used for formation. When forming the conductive film 220 and the conductive film 130d using an In-Ga-Zn metal oxide target (In:Ga:Zn = 4:2:4.1 [atomic ratio]), when the insulating film 118 is formed, either one or both of hydrogen and nitrogen contained in the insulating film 118 may enter the conductive film 220 and the conductive film 130d. In this case, due to the combination of oxygen vacancies in the conductive film 220 and the conductive film 130d and either one or both of hydrogen and nitrogen, the resistance of the conductive film 220 and the conductive film 130d becomes lower. The conductive film 220 and the conductive film 130d with reduced resistance can be formed. Note that the conductive film with reduced resistance is an oxide conductor film.

[0415] Note that when forming the conductive film 220 and the conductive film 130d using an In-Ga-Zn metal oxide target (In:Ga:Zn = 4:2:4.1 [atomic ratio]), when the insulating film 118 is formed, either one or both of hydrogen and nitrogen contained in the insulating film 118 may enter the conductive film 220 and the conductive film 130d. In this case, due to the combination of oxygen vacancies in the conductive film 220 and the conductive film 130d and either one or both of hydrogen and nitrogen, the resistance of the conductive film 220 and the conductive film 130d becomes lower. The conductive film 220 and the conductive film 130d with reduced resistance can be formed. Note that the conductive film with reduced resistance is an oxide conductor film. (In:Ga:Zn = 4:2:4.1 [atomic ratio]), when the insulating film 118 is formed, either one or both of hydrogen and nitrogen contained in the insulating film 118 may enter the conductive film 220 and the conductive film 130d. In this case, due to the combination of oxygen vacancies in the conductive film 220 and the conductive film 130d and either one or both of hydrogen and nitrogen, the resistance of the conductive film 220 and the conductive film 130d becomes lower. The conductive film 220 and the conductive film 130d with reduced resistance can be formed. Note that the conductive film with reduced resistance is an oxide conductor film. When the insulating film 118 is formed, either one or both of hydrogen and nitrogen contained in the insulating film 118 may enter the conductive film 220 and the conductive film 130d. In this case, due to the combination of oxygen vacancies in the conductive film 220 and the conductive film 130d and either one or both of hydrogen and nitrogen, the resistance of the conductive film 220 and the conductive film 130d becomes lower. The conductive film 220 and the conductive film 130d with reduced resistance can be formed. Note that the conductive film with reduced resistance is an oxide conductor film.

[0416] A sputtering apparatus can be used for the formation of the conductive film 220 and the conductive film 130d. The conductive film 2 ​​​​​When forming the conductive film 130d, plasma is discharged in an atmosphere containing oxygen gas. At that time, the insulating film 118, which is the surface on which the conductive film 220 and the conductive film 130d are to be formed, contains an acid. In addition, when the conductive film 220 and the conductive film 130d are formed, oxygen gas is added. Mix inert gas (e.g., helium gas, argon gas, xenon gas, etc.) This is also fine.

[0417] The oxygen gas is contained at least when the conductive film 220 and the conductive film 130d are formed. It is sufficient that the oxygen content of the entire deposition gas when forming the conductive film 220 and the conductive film 130d is The proportion of gas is greater than 0% and less than 100%, preferably greater than 10% and less than 100%. , and more preferably 30% or more and 100% or less.

[0418] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4:2 4.1 [atomic ratio]) by sputtering the conductive film 220 and the conductive film 13 Alternatively, an ITO target is used and 100% oxygen gas is used as the deposition gas. The conductive film 220 and the conductive film 130d may be formed by a sputtering method using a gas such as nitrogen.

[0419] In this embodiment, when the conductive film 220 and the conductive film 130d are formed, the insulating film 11 However, the present invention is not limited to the above-mentioned method. For example, After the conductive film 130d is formed, oxygen may be further added to the insulating film 116.

[0420] The method of adding oxygen to the insulating film 116 may be, for example, a method of adding indium, tin, silicon, and The oxide (In-Sn-Si oxide, also called ITSO) target (In2O3 :Use ITSO film with a film thickness of 5 nm using SnO2:SiO2 = 85:10:5 [wt%]). It may be formed. In this case, the film thickness of the ITSO film is preferably 1 nm or more and 20 nm or less, or 2 nm or more and 10 nm or less, so that oxygen can permeate preferably and oxygen release can be suppressed. Thereafter, oxygen is added to the insulating film 116 by passing the ITSO film. As a method of adding oxygen, an ion doping method, an ion implantation method, a plasma treatment method, etc. can be mentioned. In addition, when adding oxygen, oxygen can be effectively added to the insulating film 116 by applying a bias voltage to the substrate side. As the above bias voltage, for example, using an ashing device, the power density of the bias voltage applied to the substrate side of the ashing device is 1 W / cm 2 or more and 5 W / cm 2 or less. In addition, the substrate temperature when adding oxygen is room temperature or more and 300 °C or less, preferably 100 °C or more and 250 °C or less, so that oxygen can be efficiently added to the insulating film 11 6.

[0421] In the present embodiment, wet etching is used to form the conductive film 220 and the conductive film 130d. Dry etching may be used to form the conductive film 220 and the conductive film 130d. .

[0422] As described above, the display device shown in FIGS. 6(A), 6(B) and 6(C) can be manufactured by 5 lithography processes.

[0423] In one aspect of the present invention, a display device can be manufactured with a small number of 5 lithography processes. By reducing the number of lithography processes, the margin of pattern arrangement can be reduced, and also the tra ​​Miniaturization of transistors and high definition of display devices become possible. Also, reduction of the lithography process makes it possible to simplify the process and improve the yield. Also, by reducing the lithography process the cost of the mask can be reduced. Also, in the connection part, the conductive film 113 having the function of the first wiring and the conductive film 115d having the function of the second wiring are directly connected to obtain good contact and reduce the contact resistance.

[0424] <Fabrication method 5 of display device> The manufacturing method of the transistor 100E, transistor 200E, capacitive element 250E, and connection part 150E included in the display device of one aspect of the present invention shown in FIGS. 8(A), 8(B), and 8(C) will be described with reference to FIGS. 42 to 44. The display device shown in FIGS. 8(A), 8(B), and 8(C) is formed up to the insulating film 118 in the same manner as the display device shown in FIGS. 6(A), 6(B), and 6(C). Next, as the fourth lithography process, an insulating film 119 is formed on the insulating film 118 (see FIGS. 42(A), 42(B), and 42(C)). The insulating film 119 has an opening 242 in a region overlapping with the conductive film 212b.

[0425] After applying a photosensitive resin on the insulating film 118, exposure and development are performed to form the insulating film 119. Or, after applying a non-photosensitive resin on the insulating film 118, baking is performed. Next, a resist mask is formed, and the non-photosensitive resin baked using the resist mask is etched to form the insulating film 119.

[0426] After applying a photosensitive resin on the insulating film 118, exposure and development are carried out to form the insulating film 119. Or, after applying a non-photosensitive resin on the insulating film 118, baking is performed. Next, a resist mask is formed, and the non-photosensitive resin baked using the resist mask is etched to form the insulating film 119. Next, using the insulating film 119 as a mask, one of the insulating film 114, insulating film 116, and insulating film 118

[0427] ​​ Remove the portion (see FIGS. 43(A), 43(B), and 43(C)). Remove the insulating films 114, 116, and 118 in the region overlapping with the opening 242 to expose the conductive film 212b and form the opening 242e.

[0428] For forming the opening 242e, dry etching can be used. Wet etching may also be used. A combination of dry etching and wet etching may be used.

[0429] In forming the opening 242e, it is preferable that the etching rate of the insulating films 114, 116, and 118 is fast and the etching rate of the conductive film 212b is slow. It is preferable that the etching rate of the insulating film 119 is slow.

[0430] In forming the opening 242e, the thickness of the insulating film 119 may become thin. The reduced thickness portion can be adjusted by increasing the thickness of the insulating film 119 during its formation.

[0431] Next, a conductive film is formed on the insulating film 119 and the opening 242e. The conductive film is processed into a desired shape to form the conductive film 220 (see FIGS. 44(A), 44(B), and 44(C)). The formation of the conductive film 220 is the fifth lithography process.

[0432] For the conductive film 220, a conductive film having light transmissivity can be used. Examples of the conductive film having light transmissivity include indium tin oxide, indium zinc oxide, indium oxide containing tungsten, indium zinc oxide containing tungsten, indium oxide containing titanium, indium tin oxide containing titanium, indium tin oxide containing silicon oxide. ​​​​​​​​​​​​It can be formed using a conductive material such as an object.

[0433] In this embodiment, wet etching is used to form the conductive film 220. For the formation of the conductive film 220, dry etching may be used.

[0434] As shown above, the display device shown in FIGS. 8(A), 8(B), and 8(C) can be manufactured in five lithography processes. can be manufactured.

[0435] In one aspect of the present invention, a display device can be manufactured with a small number of five lithography processes. By reducing the lithography process, the margin of pattern placement can be reduced, and the miniaturization of transistors and the high definition of the display device can be achieved. Also, by reducing the lithography process, the process can be simplified and the yield can be improved. Further, by reducing the lithography process, the cost of the mask can be reduced. Also, in the connection portion, the conductive film 113 having the function of the first wiring and the conductive film 115a having the function of the second wiring are directly connected, so that good contact can be obtained and the contact resistance can be reduced. can reduce the margin of pattern placement, and can miniaturize transistors and increase the definition of the display device. Also, by reducing the lithography process, the process can be simplified and the yield can be improved. Further, by reducing the lithography process, the cost of the mask can be reduced. Also, in the connection portion, the conductive film 113 having the function of the first wiring and the conductive film 115a having the function of the second wiring are directly connected, so that good contact can be obtained and the contact resistance can be reduced. and the miniaturization of transistors and the high definition of the display device become possible. Also, by reducing the lithography process, the simplification of the process and the improvement of the yield become possible. Further, by reducing the lithography process, the cost of the mask can be reduced. Also, in the connection portion, the conductive film 113 having the function of the first wiring and the conductive film 115a having the function of the second wiring are directly connected, so that good contact can be obtained and the contact resistance can be reduced. and the simplification of the process and the improvement of the yield become possible. Further, by reducing the lithography process, the cost of the mask can be reduced. Also, in the connection portion, the conductive film 113 having the function of the first wiring and the conductive film 115a having the function of the second wiring are directly connected, so that good contact can be obtained and the contact resistance can be reduced. and the cost of the mask can be reduced. Also, in the connection portion, the conductive film 113 having the function of the first wiring and the conductive film 115a having the function of the second wiring are directly connected, so that good contact can be obtained and the contact resistance can be reduced. and the conductive film 115a having the function of the second wiring are directly connected, so that good contact can be obtained and the contact resistance can be reduced. can obtain good contact and reduce the contact resistance.

[0436] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification. can be implemented.

[0437] (Embodiment 2) In this embodiment, a metal oxide film of one aspect of the present invention will be described with reference to FIGS. 47 to 50. will be described.

[0438] <Configuration of CAC-OS> Hereinafter, the CAC configuration that can be used for the transistor disclosed in one aspect of the present invention will be The details of the metal oxide will be described. Here, the metal oxide having a CAC structure will be described using CAC-OS as a representative example.

[0439] That is, as shown in FIG. 47, for example, in CAC-OS, the elements constituting the metal oxide are non-uniformly distributed to form regions 001 and 002 mainly composed of each element, and each region is mixed and formed or dispersed in a mosaic pattern. That is, the elements constituting the metal oxide are non-uniformly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 0.5 nm or more and 3 nm or less, or in the vicinity thereof, which is a configuration of the material. The region where specific elements are non-uniformly distributed has physical properties determined by the properties of the elements. For example,

[0440] the region where elements that tend to be insulators among the elements constituting the metal oxide are non-uniformly distributed becomes a dielectric region. On the other hand, the region where elements that tend to be conductors among the elements constituting the metal oxide are non-uniformly distributed becomes a conductor region. Further, by mixing the conductor region and the dielectric region in a mosaic pattern, the material functions as a semiconductor. That is, the metal oxide in one aspect of the present invention is a matrix composite or a metal matrix composite in which materials having different physical properties are mixed.

[0441]

[0442] rix composite (matrix composite), or a metal matrix composite (metal matrix composite).

[0442] Note that the oxide semiconductor preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition to these, element M (M is gallium, aluminum, uminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron , one or more selected from nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium , hafnium, tantalum, tungsten, or magnesium, etc. may be included.

[0443] For example, in In-Ga-Zn oxide, CAC-OS (among CAC-OS, In-G a-Zn oxide may be particularly referred to as CAC-IGZO.) refers to indium oxide (hereinafter, InO X1 (where X1 is a real number greater than 0).), or indium zinc oxide (hereinafter, In X2 Zn Y2 O Z2 (where X2, Y2, and Z2 are real numbers greater than 0) is used.), or gallium oxide (hereinafter, GaO X3 (where X3 is a real number greater than 0) is used .), or gallium zinc oxide (hereinafter, Ga X4 Zn Y4 O Z4 (where X4, Y4, and Z4 are real numbers greater than 0) is used.). When the materials are separated, it becomes a mosaic shape , and the mosaic-shaped InO X1 , or In X2 Zn Y2 O Z2 is uniformly distributed in the film structure (hereinafter, also referred to as cloud-like).

[0444] That is, CAC-OS is a composite oxide semiconductor having a structure in which a region mainly composed of GaO X3 and a region mainly composed of In X2 Zn Y2 O Z2 , or a region mainly composed of InO X1 are mixed. In this specification, for example, the atomic ratio of In to the element M in the first region is is greater than the atomic ratio of In to the element M in the second region. Assume that the In concentration is higher than in region 2.

[0445] IGZO is a common name and refers to a compound made of In, Ga, Zn, and O. A typical example is InGaO3(ZnO). m1 (m1 is a natural number), or In ( 1+x0) Ga (1-x0) O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of the crystalline compounds include those which are

[0446] The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a structure in which multiple IGZO nanocrystals have a c-axis orientation and are aligned in the ab plane. is a non-oriented connected crystal structure.

[0447] On the other hand, CAC-OS refers to the material composition of oxide semiconductors. A nanoparticle-like region mainly composed of Ga in a material composition containing a, Zn, and O. In some areas, nanoparticle regions mainly composed of In were observed, and mosaic-like regions were observed. Therefore, in CAC-OS, the crystal structure is It is an element of this.

[0448] It should be noted that the CAC-OS does not include a laminated structure of two or more films having different compositions. For example, a structure consisting of two layers, a film mainly made of In and a film mainly made of Ga, is not included. do not have.

[0449] In addition, GaO X3 The region where In is the main component and X2 ZincY2 O Z2 or InO X1 is There may be cases where no clear boundary can be observed for the region where it is the main component.

[0450] In addition, instead of gallium, one or more selected from aluminum, silicon, boron, yttrium, copper, van adium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum , lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium etc. are included, and in the CAC-OS, nano-particle regions with some of these elements as the main component are observed, and nano-particle regions with In as the main component are observed in part, and they are randomly dispersed mosaically. This refers to a configuration where they are randomly dispersed mosaically.

[0451] <Analysis of CAC-OS> Subsequently, the results of measurements of the oxide semiconductor formed on the substrate using various measurement methods will be described below.

[0452] ≪Composition and Fabrication Method of Samples≫ Hereinafter, nine samples according to one aspect of the present invention will be described. Each sample is fabricated under different conditions of the substrate temperature and the oxygen gas flow ratio when forming the oxide semiconductor. Fur thermore, the sample has a structure including a substrate and an oxide semiconductor on the substrate.

[0453] The fabrication method of each sample will be described.

[0454] First, a glass substrate is used as the substrate. Subsequently, using a sputtering apparatus, a 100 nm thick In-Ga-Zn oxide is formed as the oxide semiconductor on the glass substrate. The film formation conditions are such that the pressure in the chamber is 0.6 Pa, and the target is an oxide target ( ​​ Use In:Ga:Zn = 4:2:4.1 (atomic ratio). Also, for the sputtering apparatus supply 2500 W of AC power to the oxide target installed inside.

[0455] Note that as the conditions for forming the oxide film, the substrate temperature is set to a temperature that is not intentionally heated (hereinafter also referred to as room temperature or R.T.), 130 °C, or 170 °C. Also, the flow rate ratio of oxygen gas to the mixed gas of Ar and oxygen (hereinafter also referred to as the oxygen gas flow rate ratio) is set to 10%, 30%, or 100% to produce 9 samples.

[0456] ≪Analysis by X-ray diffraction≫ In this section, the results of X-ray diffraction (XRD: X-ray diffractio n) measurements on 9 samples will be described. As the XRD apparatus, D 8 ADVANCE manufactured by Bruker was used. Also, the conditions were θ / 2 θ scan by the Out-of-plane method, with a scanning range of 15 deg. to 50 deg., a step width of 0.02 de g., and a scanning speed of 3.0 deg. / min.

[0457] Fig. 48 shows the results of measuring the XRD spectrum using the Out-of-plane method. Note that in Fig. 48, the upper row shows the measurement results for the sample with a substrate temperature condition of 170 °C during film formation the middle row shows the measurement results for the sample with a substrate temperature condition of 130 °C during film formation, and the lower row shows the measurement results for the sample with a substrate temperature condition of R.T. during film formation Also, the left column shows the measurement results for the sample with an oxygen gas flow rate ratio condition of 10%, the middle column shows the measurement results for the sample with an oxygen gas flow rate ratio condition of 3 0%, and the right column shows the measurement results for the sample with an oxygen gas flow rate ratio condition of 100%. ​​

[0458] The XRD spectrum shown in FIG. 48 shows that the increase in the substrate temperature during film formation or the increase in the amount of oxygen during film formation By increasing the gas flow rate ratio, the peak intensity around 2θ=31° increases. The peak at 2θ=31° is aligned along the c-axis in a direction substantially perpendicular to the surface on which the film is formed or the upper surface. Crystalline IGZO compound (CAAC(c-axis aligned crystallization) It is also called ine)-IGZO.

[0459] In addition, the XRD spectrum shown in FIG. 48 shows that the substrate temperature during film formation was low or the oxygen gas flow was low. The smaller the ratio, the less clear the peak. In the case of samples with a small oxygen gas flow rate, the orientation of the ab plane and the c axis direction of the measurement area was It is clear that it cannot be seen.

[0460] Analysis by electron microscope In this section, the samples were prepared at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. ,HAADF(High-Angle Annular Dark Field)-ST EM(Scanning Transmission Electron Micros) The results of the observation and analysis using HAADF-S cope will be described below (hereafter, HAADF-S Images obtained by TEM are also called TEM images.

[0461] Planar images obtained by HAADF-STEM (hereinafter also referred to as planar TEM images), and The results of image analysis of the cross-sectional images (hereinafter also referred to as cross-sectional TEM images) will be described. The TEM images were observed using a spherical aberration correction function. The image was taken using an atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd. The electron beam was irradiated at an acceleration voltage of 200 kV with a beam diameter of approximately 0.1 nm.

[0462] FIG. 49(A) shows a sample prepared at a substrate temperature of RT during film formation and an oxygen gas flow rate of 10%. FIG. 49(B) shows the substrate temperature RT and oxygen gas during film formation. This is a cross-sectional TEM image of a sample prepared at a flow rate ratio of 10%.

[0463] <Analysis of electron diffraction patterns> In this section, the samples were prepared at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. By irradiating the probe with an electron beam with a diameter of 1 nm (also called a nanobeam electron beam), The results of obtaining electron beam diffraction patterns will now be described.

[0464] As shown in FIG. 49(A), the substrate temperature during film formation was RT, and the oxygen gas flow rate was 10%. In the planar TEM image of the sample, black spots a1, a2, a3, a4, and Observe the electron beam diffraction pattern shown in a5. Note that the observation of the electron beam diffraction pattern is performed using an electron beam While irradiating the light, move the light from the 0 second position to the 35 second position at a constant speed. The results of a1 are shown in Figure 49(C), the results of a2 are shown in Figure 49(D), and the results of a3 are shown in Figure 49( The results for black point a4 are shown in FIG. 49(F), and the results for black point a5 are shown in FIG. 49(G).

[0465] From Figure 49(C), Figure 49(D), Figure 49(E), Figure 49(F) and Figure 49(G), the circle A bright area can be observed that appears as a ring. In addition, there are multiple The spot can be observed.

[0466] Also, in the cross-sectional TEM image of the sample fabricated at the substrate temperature R.T. during film formation and with an oxygen gas flow ratio of 10% as shown in Fig. 49(B), observe the electron diffraction patterns indicated by black dots b1, b2, b3, b4, and also black dot b5. The result of black dot b1 is shown in Fig. 49(H), the result of black dot b2 is shown in Fig. 49(I), the result of black dot b3 is shown in Fig. 49(J), the result of black dot b4 is shown in Fig. 49( K), and the result of black dot b5 is shown in Fig. 49(L).

[0467] From Fig. 49(H), Fig. 49(I), Fig. 49(J), Fig. 49(K), and Fig. 49(L), regions with high luminance can be observed in a grid-like pattern. Also, a plurality of spots can be observed in the ring-like region.

[0468] Here, for example, when an electron beam with a probe diameter of 300 nm is incident parallel to the sample surface on a CAAC-OS having InGaZnO4 crystals, a diffraction pattern including spots caused by the (0 09) plane of the InGaZnO4 crystals can be seen. That is, it can be understood that CAAC-O S has c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the formed surface or the upper surface. On the other hand, when an electron beam with a probe diameter of 300 nm is incident perpendicular to the sample surface on the same sample, a ring-like diffraction pattern is confirmed. That is, it can be understood that CAAC-OS has no orientation in the a-axis and b-axis.

[0469] Also, for an oxide semiconductor having microcrystals (nano crystalline oxide semiconductor. Hereinafter referred to as nc-OS.), when electron diffraction is performed using an electron beam with a large probe diameter (for example, 50 nm or more), a diffraction pattern like a halo pattern is observed. Also, for nc-OS, when the probe diameter is small (for example ​​​​​​​ When performing nano-beam electron diffraction using an electron beam with a diameter of less than 50 nm (e.g., 50 nm), bright spots (spots) are observed. When performing nano-beam electron diffraction on nc-OS, there are cases where regions with high brightness are observed in a circular (ring-shaped) pattern. Furthermore, there are cases where multiple bright spots are observed in the ring-shaped region.

[0470] The electron diffraction pattern of a sample prepared at a substrate temperature of R.T. during film formation and an oxygen gas flow ratio of 10% has a region with high brightness in a ring shape and multiple bright spots in the ring region. Therefore, the sample prepared at a substrate temperature of R.T. during film formation and an oxygen gas flow ratio of 10% has an electron diffraction pattern that becomes nc-OS and has no orientation in the planar direction and the cross-sectional direction.

[0471] From the above, it can be estimated that oxide semiconductors with a low substrate temperature during film formation or a small oxygen gas flow ratio have properties clearly different from both amorphous oxide semiconductor films and single-crystalline oxide semiconductor films.

[0472] ≪Elemental analysis≫ In this section, energy-dispersive X-ray spectroscopy (EDX: Energy Dispersive X-ray spectroscopy) is used to obtain EDX mapping and evaluate the results of elemental analysis of a sample prepared at a substrate temperature of R.T. during film formation and an oxygen gas flow ratio of 10%. For EDX measurement, an energy-dispersive X-ray analyzer JED-2300T manufactured by JEOL Ltd. is used as the elemental analysis device. In addition, an Si drift detector is used to detect X-rays emitted from the sample.

[0473] In EDX measurement, an electron beam is irradiated onto each point in the analysis target region of the sample, and the energy and the number of generated characteristic X-rays of the sample are measured to obtain an EDX spectrum corresponding to each point. In this embodiment, the peaks of the EDX spectra of each point are attributed to the electron transition from the L shell to the In atom, the electron transition from the K shell to the Ga atom, the electron transition from the K shell to the Zn atom, and the electron transition from the K shell to the O atom, and the ratio of each atom at each point is calculated. By performing this for the analysis target region of the sample, an EDX mapping showing the distribution of the ratio of each atom can be obtained.

[0474]

[0475] In the EDX mapping shown in FIGS. 50(A), 50(B), and 50(C), a relative brightness and darkness distribution can be seen in the image. In the sample manufactured at the substrate temperature R.T. during film formation and an oxygen gas flow ratio of 10%, it can be confirmed that each atom exists with a distribution. Here, attention is paid to the ranges enclosed by solid

[0476] lines and dashed lines in FIGS. 50(A), 50(B), and 50(C). In FIG. 50(A), the range enclosed by the solid line contains many relatively dark regions, and the range enclosed by the dashed line contains

[0477] many relatively bright regions. Also, in FIG. 50(B), the range enclosed by the solid line contains many relatively bright regions, and the range enclosed by the dashed line contains many relatively dark regions. That is, the range enclosed by the solid line is a region where In atoms X2 Zn Y2 O Z2 are relatively abundant, and the range enclosed by the dashed line is a X1 region where In atoms are relatively scarce. Here, in FIG. 50(C), in the

[0478] range enclosed by the solid line, the right side is a relatively bright region, and the left side is a relatively dark region. Therefore, the range enclosed by the solid line is a region where In Zn X3 O X4 Zn Y4 O Z4 or InO or the like is the main component.

[0479] Also, from FIGS. 50(A), 50(B), and 50(C), the distribution of In atoms is relatively uniform compared to Ga atoms and the regions where InO X1 is the main component are connected to each other through regions where In X2 Zn Y2 O Z2 is the main component, appearing to be formed in a connected manner Thus, regions where In X2 Zn Y2 O Z2 or InO X1 is the main component are formed in a cloud -like shape and spread out

[0480] Thus, regions where GaO X3 etc. are the main component and regions where In X2 Zn Y2 O Z2 or I nO X1 is the main component are unevenly distributed and mixed, and the In-Ga-Zn oxide having such a structure can be referred to as CAC-OS

[0481] Also, the crystal structure in CAC-OS has an nc structure. The nc structure in CAC-OS has several bright spots (spots) in the electron diffraction image in addition to those caused by single crystal, polycrystal, or CAAC structure-containing IGZO or, in addition to several bright spots (spots), regions with high brightness appear in a ring shape, and the crystal structure is defined as such

[0482] Also, from FIGS. 50(A), 50(B), and 50(C), regions where GaO X3 etc. are the main component and regions where In X2 Zn Y2 O Z2 or InOX1 The size of the region where X1 is the main component is observed to be 0.5 nm or more and 10 nm or less, or 1 nm or more and 3 nm or less. Preferably, in EDX mapping, the diameter of the region where each element is the main component is 1 nm or more and 2 nm or less.

[0483] From the above, CAC-OS has a structure different from that of the IGZO compound in which metal elements are uniformly distributed and has properties different from those of the IGZO compound. That is, CAC-OS is composed of a region where GaO X3 etc. is the main component, and a region where In X2 Zn Y2 O Z2 or InO X1 is the main component and is mutually phase-separated, and has a structure in which the regions with each element as the main component are mosaic-shaped.

[0484] Here, the region where In X2 Zn Y2 O Z2 or InO X1 is the main component is a region with higher conductivity compared to the region where GaO X3 etc. is the main component. That is, when carriers flow through the region where In X2 Zn Y 2O Z2 or InO X1 is the main component, the conductivity as an oxide semiconductor is exhibited. Therefore, when the region where In Zn X2 Zn Y2 O Z2 or InO X 1 is the main component is distributed in a cloud-like manner in the oxide semiconductor, high field-effect mobility (μ) can be realized.

[0485] On the other hand, the region where GaO X3 etc. is the main component is In X2 ZnY2 O Z2 、 or InO X Compared with the region where 1 is the main component, it is a region with high insulation. That is, GaO X3 etc. are By distributing the region where it is the main component in the oxide semiconductor, the leakage current can be suppressed, and good etching operation can be realized.

[0486] Therefore, when CAC-OS is used in a semiconductor device, the insulation caused by GaO X3 etc., and In X2 Zn Y2 O Z2 、 or InO X1 The conductivity caused by it acts complementarily, and As a result, a high on-current (I on ) and a high field-effect mobility (μ) can be realized. can be achieved.

[0487] In addition, the semiconductor device using CAC-OS has high reliability. Therefore, CAC-OS is most suitable for various semiconductor devices including displays.

[0488] This embodiment can be implemented in appropriate combination with at least some of the other embodiments described in this specification. It can be implemented in combination.

[0489] <Transistor having a metal oxide film> Next, the case of using a metal oxide film in a transistor will be described.

[0490] By using the metal oxide film in the transistor, a transistor with high carrier mobility and high switching characteristics can be realized. In addition, a highly reliable transistor can be realized. transistor can be realized.

[0491] In addition, it is preferable to use a metal oxide film with a low carrier density for the transistor. For example for example, the metal oxide film has a carrier density of 8 × 10 11 / cm 3 less than, preferably 1 × 10 11 / cm 3 less than, more preferably 1 × 10 10 / cm 3 less than, and 1 × 10 -9 / cm 3 or more is sufficient.

[0492] When reducing the carrier density of the metal oxide film, the impurity concentration in the metal oxide film may be lowered, and the density of defect levels may be lowered. In this specification and the like, a low impurity concentration and a low density of defect levels are referred to as high-purity intrinsic or substantially high-purity intrinsic. A metal oxide film that is high-purity intrinsic or substantially high-purity intrinsic has few carrier generation sources, so the carrier density can be lowered. In addition, a metal oxide film that is high-purity intrinsic or substantially high-purity intrinsic has a low density of defect levels, so the trap level density may also be low. Moreover, the charge trapped in the trap levels of the metal oxide film takes a long time to disappear and may behave like a fixed charge. Therefore, a transistor in which a channel region is formed in an oxide semiconductor with a high trap level density may have unstable electrical characteristics in some cases.

[0493] In addition, the charge trapped in the trap levels of the metal oxide film takes a long time to disappear and may behave like a fixed charge. Therefore, a transistor in which a channel region is formed in an oxide semiconductor with a high trap level density may have unstable electrical characteristics in some cases. Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the metal oxide film. In addition, in order to reduce the impurity concentration in the metal oxide film, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen, and aluminum in some cases.

[0494] Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the metal oxide film. In addition, in order to reduce the impurity concentration in the metal oxide film, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen, and aluminum in some cases. in the adjacent film. Examples of impurities include hydrogen, nitrogen, and aluminum There are alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0495] Here, the influence of each impurity in the metal oxide film will be described.

[0496] In the metal oxide film, when silicon or carbon, which is one of the Group 14 elements, is contained, defects levels are formed in the oxide semiconductor. For this reason, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (the concentration obtained by secondary ion mass spectrometry ( SIMS:Secondary Ion Mass Spectrometry)) are set to be 2×10 atoms / cm 18 atoms / cm 3 or less, preferably 2×10 17 at oms / cm 3 or less.

[0497] Also, when the metal oxide film contains an alkali metal or an alkaline earth metal, defect levels may be formed and carriers may be generated. Therefore, a transistor using a metal oxide film containing an alkali metal or an alkaline earth metal tends to have normally-on characteristics. For this reason, it is preferable to reduce the concentration of the alkali metal or the alkaline earth metal in the metal oxide film. Specifically, the concentration of the alkali metal or the alkaline earth metal in the metal oxide film obtained by SIMS is set to be 1×10 atoms / cm or less, preferably 2×10 18 atoms / cmatoms / cm 3 or less, preferably 2×10 1 6 atoms / cm 3 or less.

[0498] Also, when nitrogen is contained in the metal oxide film, carriers, i.e., electrons, are generated, and carriers The density increases and it is easy to be n-type. As a result, an oxide semiconductor containing nitrogen is used as a semiconductor. The transistor using it tends to have normally-on characteristics. Therefore, in the oxide semiconductor, it is preferable that nitrogen is reduced as much as possible. For example, the nitrogen concentration in the oxide semiconductor is less than 5×10 19 atoms / cm 3 in SIMS, preferably less than 5×10 1 8 atoms / cm 3 hereinafter, more preferably less than 1×10 18 atoms / cm 3 hereinafter, even more preferably less than 5×10 17 atoms / cm 3 hereinafter.

[0499] In addition, since hydrogen contained in the metal oxide film reacts with oxygen bonded to metal atoms to form water, oxygen vacancies (V o ) may be formed. When hydrogen enters the oxygen vacancies (V o ), carriers, electrons, may be generated. Also, a part of hydrogen may bond with oxygen bonded to metal atoms to generate carriers, electrons. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have normally-on characteristics. For this reason, it is preferable that hydrogen in the oxide semiconductor is reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SIMS is less than 1×10 20 atoms / cm 3 less than, 20 3 preferably less than 1×10 19 atoms / cm 3 3 less than, more preferably less than 5×10 18 atom s / cm 3 less than, even more preferably less than 1×10 18 atoms / cm3 be less than.

[0500] In addition, the oxygen vacancies (V o ) in the metal oxide film can be reduced by introducing oxygen into the metal oxide film. That is, the oxygen vacancies (V ) in the metal oxide film are filled with oxygen o , and the oxygen vacancies (V ) disappear. Therefore, by diffusing oxygen into the metal oxide film, the oxygen vacancies (V o ) of the transistor can be reduced, and the reliability can be improved. o ) of the transistor can be reduced, and the reliability can be improved.

[0501] As a method of introducing oxygen into the metal oxide film, for example, an oxide containing more oxygen than oxygen satisfying the stoichiometric composition can be provided in contact with the oxide semiconductor. That is, in the oxide, a region where oxygen is present in excess of the stoichiometric composition (hereinafter also referred to as the excess oxygen region) is preferably formed. In particular, when a metal oxide film is used for a transistor, by providing an oxide having an excess oxygen region in the underlying film or the interlayer film near the transistor, the oxygen vacancies of the transistor can be reduced, and the reliability can be improved.

[0502]

[0503] Using a metal oxide film with sufficiently reduced impurities in the channel formation region of the transistor can impart stable electrical characteristics.

[0504] This embodiment can be implemented in appropriate combination with at least some of the other embodiments described herein.

[0504] (Embodiment 3) In this embodiment, a display device having the transistor exemplified in the previous embodiment An example will be described below with reference to FIGS. 51 to 63.

[0505] FIG. 51 is a top view showing an example of a display device. The display device 700 shown in FIG. 51 includes a pixel portion 702 provided on a first substrate 701, a source driver circuit portion 704 and a gate driver circuit portion 706 provided on the first substrate 701, a sealing material 712 disposed so as to surround the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706, a second substrate 705 provided so as to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed by the sealing material 712. That is, the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 are sealed by the first substrate 701, the sealing material 712, and the second substrate 705. Although not shown in FIG. 51, a display element is provided between the first substrate 701 and the second substrate 705.

[0506] Further, the display device 700 has a pixel portion 702, a source driver circuit portion 704, and a gate driver circuit portion 706, and FPC terminal portions 708 (FPC: Flexible printed circuit) respectively electrically connected thereto, in a region different from the region surrounded by the sealing material 712 on the first substrate 701. Further, an FPC 716 is connected to the FPC terminal portions 708, and various signals and the like are supplied to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 by the FPC 716. Further, signal lines 710 are respectively connected to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portions 7 08. The various signals supplied by the FPC 716 ​ et al. are supplied to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708 via the signal line 710.

[0507] Also, a plurality of gate driver circuit portions 706 may be provided in the display device 700. Further, as the display device 700, an example in which the source driver circuit portion 704 and the gate driver circuit portion 706 are formed on the same first substrate 701 as the pixel portion 702 is shown, but the present invention is not limited to this configuration. For example, only the gate driver circuit portion 706 may be formed on the first substrate 701, or only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, a substrate (for example, a driving circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) on which a source driver circuit or a gate driver circuit or the like is formed may be formed on the first substrate 701. Note that the connection method of the separately formed driving circuit substrate is not particularly limited, and a COG (Chip On Glass) method, a wire bonding method, or the like can be used.

[0508] Further, the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 included in the display device 700 each have a plurality of transistors, and the transistors which are one aspect of the semiconductor device of the present invention can be applied.

[0509] Also, the display device 700 can have various elements. As an example of the element, for example, an electroluminescence (EL) element (an EL element including an organic and an inorganic substance, an organic EL element, an inorganic EL element, an LED, etc.), a light-emitting transistor element (a transistor that emits transistor), electron-emitting element, liquid crystal element, electronic ink element, electrophoretic element, electro wetting element, plasma display panel (PDP), MEMS (micro-electro mechanical system) display (e.g., grating light valve (GLV), digital micromirror device (DMD), digital microshutter (DMS) element), piezoelectric ceramic display, etc.

[0510] Also, as an example of a display device using an EL element, there is an EL display, etc. As an example of a display device using an electron-emitting element, there is a field emission display (FED ) or an SED-type flat panel display (SED: Surface-conduction Electron-emitter Display), etc. As an example of a display device using a liquid crystal element, there is a liquid crystal display (transmissive liquid crystal display, transflective liquid crystal display , reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display ), etc. As an example of a display device using an electronic ink element or an electrophoretic element, there is electronic paper, etc. When realizing a transflective liquid crystal display or a reflective liquid crystal display, a part or all of the pixel electrodes may have the function of a reflective electrode . For example, a part or all of the pixel electrodes may have aluminum, silver, etc. . Further, in that case, a memory circuit such as an SRAM can be provided under the reflective electrode . Thereby, further power consumption can be reduced.

[0511]

[0511] Note that the display method in the display device 700 is a progressive method, an interlace method, etc. can be used. Also, as color elements for controlling pixels during color display, they are not limited to the three colors of RG B (where R represents red, G represents green, and B represents blue). For example, it may be composed of four pixels: an R pixel, a G pixel, a B pixel, and a W (white) pixel. Or, like a pentile array , one color element may be composed of two of the RGB colors, and different two colors may be selected and configured by the color elements. Or, one or more colors such as yellow, cyan, and magenta may be added to RGB . Note that the size of the display area may be different for each dot of the color element . However, the disclosed invention is not limited to a color display device, and can also be applied to a monochrome display device.

[0512] Also, in order to perform full-color display of a display device using a backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) with white light emission( W), a coloring layer (also referred to as a color filter .) may be used. The coloring layer can be used by appropriately combining, for example, red (R), green (G), blue (B) , yellow (Y), etc. By using the coloring layer, the color reproducibility can be improved compared to the case where no coloring layer is used. At this time, by arranging the area having the coloring layer and the area not having the coloring layer, the white light in the area not having the coloring layer can be directly used for display. By arranging an area that does not have a coloring layer in part , when displaying brightly, the reduction in luminance due to the coloring layer can be reduced, and the power consumption can be reduced by about 20% to 30%. However, when performing full-color display using a self-luminous element such as an organic EL element or an inorganic EL element, R, G, B, Y, W may be caused to emit light from elements having their respective emission colors . By using a self-luminous element, compared to the case of using a coloring layer ​​ There may also be a case where the power consumption can be further reduced.

[0513] In addition, as a color conversion method, in addition to the method of converting a part of the light emitted from the above-mentioned white light through a color filter to convert it into red, green, and blue (color filter method), a method using the light emission of red, green, and blue respectively (three-color method), or a method of converting a part of the blue light emission into red or green (color conversion method, quantum dot method) may also be applied.

[0514] In the present embodiment, a configuration using a liquid crystal element and an EL element as display elements will be described with reference to FIGS. 52 to 57. FIGS. 52 to 55 are cross-sectional views taken along the dashed-dotted line Q-R shown in FIG. 51, and are configurations using a liquid crystal element as a display element. FIGS. 56 and FIG. 57 are cross-sectional views taken along the dashed-dotted line Q-R shown in FIG. 51, and are configurations using an EL element as a display element. as a display element. as a display element.

[0515] First, the common parts shown in FIGS. 52 to 57 will be described first, and then the different parts will be described below.

[0516] <Explanation of the common parts of the display device> The display device 700 shown in FIGS. 52 to 57 includes a routing wiring portion 711, a pixel portion 702, a source driver circuit portion 704, and an FPC terminal portion 708. The routing wiring portion 711 includes signal lines 710. The pixel portion 702 includes a transistor 750 and a capacitor element (not shown). The source driver circuit portion 704 includes a transistor 7 52.

[0517] The transistor 750 has the same configuration as the transistor 200A shown above. The transistor The transistor 752 has the same configuration as the transistor 100A shown above. Note that for the configurations of the transistor 7 50 and the transistor 752, other transistors shown in the previous embodiment may be used.

[0518] The transistor used in this embodiment has a metal oxide film with high purity and suppressed formation of oxygen vacancies. This transistor can lower the off-current. Therefore, the holding time of electrical signals such as image signals can be lengthened, and the writing interval can also be set longer in the power-on state. Therefore, the frequency of the refresh operation can be reduced, resulting in an effect of suppressing power consumption.

[0519] Also, since the transistor used in this embodiment can obtain a relatively high field-effect mobility, it can be driven at high speed. For example, by using such a transistor capable of high-speed driving in a liquid crystal display device, the switching transistor in the pixel portion and the driver transistor used in the driving circuit can be formed on the same substrate. That is, since there is no need to use a semiconductor device formed by a silicon wafer or the like as a separate driving circuit, the number of parts of the semiconductor device can be reduced. Also, in the pixel portion, by using a transistor capable of high-speed driving, a high-quality image can be provided.

[0520] Also, in FIGS. 52 to 57, an example of a configuration in which the transistor 750 included in the pixel portion 702 and the transistor 752 included in the source driver circuit portion 704 are transistors of the same structure is illustrated, but the present invention is not limited thereto. For example, different transistors may be used for the pixel portion 702 and the source driver circuit portion 704. Specifically, for the pixel portion 70 ​ Use a staggered transistor for 2, and the source driver circuit section 704 is the same as that shown in Embodiment 1 a configuration using an inverse staggered transistor, or an inverse as shown in Embodiment 1 in the pixel section 702 Use a staggered transistor, and use a staggered transistor for the source driver circuit section 704 and the like. Note that the above source driver circuit section 704 may be read as a gate driver circuit section.

[0521] Also, the signal line 710 is formed through the same process as the conductive film having the functions of the source electrodes and drain electrodes of the transistors 750 and 752 As the signal line 710, for example, when a material containing a copper element is used, signal delay and the like due to wiring resistance are small, and display on a large screen is possible.

[0522] Also, the FPC terminal section 708 has a connection electrode 760, an anisotropic conductive film 780, and an FPC 716 Note that the connection electrode 760 is formed through the same process as the conductive film having the functions of the source electrodes and drain electrodes of the transistors 750 and 752. Also, the connection electrode 76 0 is electrically connected to the terminal of the FPC 716 via the anisotropic conductive film 780.

[0523] Also, as the first substrate 701 and the second substrate 705, for example, a glass substrate can be used Also, as the first substrate 701 and the second substrate 705, a flexible substrate can be used. Examples of the flexible substrate include a plastic substrate and the like .

[0524] Also, a structure 778 is provided between the first substrate 701 and the second substrate 705. Structure The body 778 is a columnar spacer obtained by selectively etching an insulating film, and is provided to control the distance (cell gap) between the first substrate 701 and the second substrate 705. Note that a spherical spacer may be used as the structure 778.

[0525] On the second substrate 705 side, a light-shielding film 738 having a function as a black matrix, a colored film 736 having a function as a color filter, and an insulating film 734 in contact with the light-shielding film 738 and the colored film 73 6 are provided.

[0526] <Configuration example of a display device using a liquid crystal element> The display device 700 shown in FIGS. 52 and 53 has a liquid crystal element 775. The liquid crystal element 775 has a conductive film 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is provided on the second substrate 705 side and has a function as a counter electrode. The display device 700 shown in FIGS. 52 and 53 controls the transmission and non-transmission of light by changing the alignment state of the liquid crystal layer 776 according to the voltage applied to the conductive film 772 and the conductive film 774, and can display an image.

[0527] In addition, the conductive film 772 is electrically connected to a conductive film having functions as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is formed on the gate insulating film of the transistor 750 and functions as a pixel electrode, that is, one electrode of the display element. In addition, the conductive film 772 has a function as a reflective electrode. The display device 700 shown in FIGS. 52 and 53 is a so-called reflective color liquid crystal display device that uses external light, reflects light with the conductive film 772, and displays through the colored film 736.

[0528] As the conductive film 772, a conductive film that is transparent to visible light or a conductive film that is reflective to visible light can be used. As the conductive film that is transparent to visible light, for example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) may be used. As the conductive film that is reflective to visible light, for example, a material containing aluminum or silver may be used. In the present embodiment, as the conductive film 772, a conductive film that is reflective to visible light is used. As shown in FIGS. 52 and 53, the insulating film 770 has a function as a planarizing film. Further, the conductive film 772 is formed on the insulating film 770. Moreover, the display device 700 illustrated in FIGS. 52 and 53 is an example of a reflective color liquid crystal display device, but is not limited thereto. For example, by using a conductive film 772 that is transparent to visible light, a transmissive color liquid crystal display device may be formed. Alternatively, a so-called transflective color liquid crystal display device that combines a reflective color liquid crystal display device and a transmissive color liquid crystal display device may be used. Here, an example of a transmissive color liquid crystal display device is shown in FIGS. 54 and 55. FIGS. 54 and 55 are cross-sectional views taken along the dashed-dotted line Q-R shown in FIG. 51, and illustrate a configuration in which a liquid crystal element is used as a display element. Also, the display device 700 shown in FIGS. 54 and 55 is an example of a configuration in which an in-plane switching (IPS) mode (for example, FFS mode) is used as a driving method of the liquid crystal element. In the case of the configuration shown in FIGS. 54 and 55, an insulating film 773 is provided on the conductive film 772 having a function as a pixel electrode. For the conductive film 772, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) may be used as the conductive film that is transparent to visible light. For the conductive film 772, a material containing aluminum or silver may be used as the conductive film that is reflective to visible light. In the present embodiment, as the conductive film 772, a conductive film that is reflective to visible light is used. As shown in FIGS. 52 and 53, the insulating film 770 has a function as a planarizing film. Also, the conductive film 772 is formed on the insulating film 770.

[0529] As shown in FIGS. 52 and 53, the insulating film 770 has a function as a planarizing film. Also, the conductive film 772 is formed on the insulating film 770. As shown in FIGS. 52 and 53, the insulating film 770 has a function as a planarizing film. Also, the conductive film 772 is formed on the insulating film 770.

[0530] Moreover, the display device 700 illustrated in FIGS. 52 and 53 is an example of a reflective color liquid crystal display device, but is not limited thereto. For example, by using a conductive film 772 that is transparent to visible light, a transmissive color liquid crystal display device may be formed. Alternatively, a so-called transflective color liquid crystal display device that combines a reflective color liquid crystal display device and a transmissive color liquid crystal display device may be used. For the conductive film 772, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) may be used as the conductive film that is transparent to visible light. For the conductive film 772, a material containing aluminum or silver may be used as the conductive film that is reflective to visible light. In the present embodiment, as the conductive film 772, a conductive film that is reflective to visible light is used. As shown in FIGS. 52 and 53, the insulating film 770 has a function as a planarizing film. Also, the conductive film 772 is formed on the insulating film 770. Moreover, the display device 700 illustrated in FIGS. 52 and 53 is an example of a reflective color liquid crystal display device, but is not limited thereto. For example, by using a conductive film 772 that is transparent to visible light, a transmissive color liquid crystal display device may be formed. Alternatively, a so-called transflective color liquid crystal display device that combines a reflective color liquid crystal display device and a transmissive color liquid crystal display device may be used. Moreover, the display device 700 illustrated in FIGS. 52 and 53 is an example of a reflective color liquid crystal display device, but is not limited thereto. For example, by using a conductive film 772 that is transparent to visible light, a transmissive color liquid crystal display device may be formed. Alternatively, a so-called transflective color liquid crystal display device that combines a reflective color liquid crystal display device and a transmissive color liquid crystal display device...

Claims

1. A display device including a pixel portion and a driving circuit portion for driving the pixel portion, wherein the pixel portion includes a first transistor and a pixel electrode, the driving circuit portion includes a second transistor and a connection portion, the first transistor has a first gate electrode, the second transistor has a second gate electrode, the connection portion has a first conductive layer, and a first insulating film covering the first gate electrode, the second gate electrode, and the first conductive layer, wherein on the first insulating film, the first transistor has a first metal oxide layer and a second metal oxide layer on the first metal oxide layer, on the first insulating film, the second transistor has a third metal oxide layer and a fourth metal oxide layer on the third metal oxide layer, on the first insulating film, the connection portion has a fifth metal oxide layer and a sixth metal oxide layer on the fifth metal oxide layer, the first transistor has a first source electrode and a first drain electrode on the second metal oxide layer, the second transistor has a second source electrode and a second drain electrode on the fourth metal oxide layer, the connection portion has a second conductive layer on the sixth metal oxide layer, and a second insulating film covering the first source electrode, the first drain electrode, the second source electrode, the second drain electrode, and the second conductive layer, the second transistor has a third conductive layer on the second insulating film, and a third insulating film on the third conductive layer, the pixel portion has a pixel electrode electrically connected to either one of the first source electrode and the first drain electrode, the driving circuit portion has a fourth conductive layer electrically connected to the first conductive layer and electrically connected to the second conductive layer, the pixel electrode has a region overlapping with a first opening of the second insulating film and the third insulating film, and a region overlapping with the third insulating film, the fourth conductive layer has a region overlapping with a second opening of the first insulating film to the third insulating film, a region overlapping with a third opening of the second insulating film and the third insulating film, and a region overlapping with the third insulating film, the display device.

2. In claim 1, in the cross-section of the first transistor, one end of the second metal oxide layer has a region extending from the first source electrode, and the other end of the second metal oxide layer has a region extending from the first drain electrode, a display device.

3. In claim 1 or claim 2, in the cross-section of the second transistor, one end of the fourth metal oxide layer has a region extending from the second source electrode, and the other end of the fourth metal oxide layer has a region extending from the second drain electrode, a display device.

4. In any one of claims 1 to 3, in the cross-section of the connection portion, one end of the sixth metal oxide layer has a region extending from the second conductive layer, and the other end of the sixth metal oxide layer has a region extending from the second conductive layer, a display device.

Images