Interface circuit for photodiodes, interface unit with the same, and laser processing device

Abstract

To provide an interface circuit for photodiodes capable of making a circuit specification common when performing signal processing upon signals outputted from a plurality of photodiodes.SOLUTION: An interface circuit IFCP comprises a first operational amplifier OA1, a changeover switch SW, a first processor CPU1, and first and second potentiometers DP1 and DP2. A variable resistance region of the first potentiometer DP1 is larger than that of the second potentiometer DP2. The first and second potentiometers DP1 and DP2 are connected to the changeover switch SW. The first processor CPU1 operates the changeover switch SW so as to cause any one of the first and second potentiometers DP1 and DP2 to connect a first input terminal IN1 and a first output terminal OUT1 of the first operational amplifier OA1 according to a current signal I of a photodiode PD.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to a photodiode interface circuit, a control circuit including the same, and a laser processing apparatus. [Background technology]

[0002] Conventionally, in a laser processing device, various sensors are attached to components arranged on the optical path of the laser light, such as a laser oscillator and a laser head, and the operation of the laser processing device is controlled based on signals detected by these sensors. Also, based on the signals, it is detected whether or not an abnormality occurs in each unit of the laser processing device.

[0003] For example, Patent Document 1 discloses an optical receiver that receives laser light emitted from an optical fiber. The optical receiver includes an avalanche photodiode, which is a light receiving element, and a control unit that maintains the avalanche multiplication factor of the avalanche photodiode.

[0004] Furthermore, when controlling the operation of a laser processing device or detecting abnormalities based on signals detected by various sensors, signal amplifiers and signal shapers are often used to amplify and shape the signals detected by the various sensors, and various circuit innovations have been implemented for this purpose.

[0005] For example, Patent Document 2 discloses an automatic output value adjustment circuit for a circuit device that can adjust the gain of an amplifier device, etc. Furthermore, Patent Document 3 discloses details of a physical quantity detector that can accurately detect a physical quantity even when the ambient temperature changes. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2005-183538 A [Patent Document 2] JP 2010-107269 A

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0007] By the way, if the distance from various sensors to the overall control unit that controls the operation of the laser processing apparatus is greater than a predetermined value, there is a risk of false detection due to noise or the like. In order to prevent such false detection, in many cases, an interface unit is provided in the signal path from various sensors to the overall control unit.

[0008] However, even for sensors of the same type attached to a laser processing apparatus, the output range and the like differ depending on the use of the signal. In particular, in a photoelectric conversion element such as a photodiode that receives laser light and outputs a current signal, the output range may differ by several digits depending on the use of the signal. For this reason, conventionally, this interface unit has been designed with different specifications for each component to which a photodiode is attached, and the components used in the interface unit also differ depending on the specifications.

[0009] However, when preparing an interface unit individually for each component to which a photodiode is attached, the design cost increases due to an increase in the design man-hours. In addition, since a plurality of types of interface units are stocked, the inventory management cost increases. Further, when a change in the type of photodiode or the adoption of a new model occurs, each time, a change in the circuit design within the interface unit corresponding to the change or the like occurs, and the design cost increases.

[0010] The present disclosure has been made in view of such a point, and an object thereof is to provide a photodiode interface circuit capable of standardizing circuit specifications, an interface unit including the same, and a laser processing apparatus when signal-processing signals output from a plurality of photodiodes having different output ranges and the like.

Means for Solving the Problems

[0011] To achieve the above object, an interface circuit for a photodiode according to the present disclosure includes at least a first operational amplifier, a switching switch, a first processor that controls the operation of the switching switch, a first potentiometer and a second potentiometer connected to the switching switch. The first operational amplifier has at least a first input terminal, a second input terminal, and a first output terminal, converts a current signal output from a photodiode into a voltage signal, and outputs the voltage signal. The variable resistance range of the first potentiometer is larger than the variable resistance range of the second potentiometer. The first processor operates the switching switch so that only one of the first potentiometer and the second potentiometer electrically connects the first input terminal and the first output terminal according to the magnitude of the current signal.

[0012] An interface unit according to the present disclosure is an interface unit having a plurality of interface circuits, and at least one of the plurality of interface circuits is the interface circuit for a photodiode.

[0013] A laser processing apparatus according to the present disclosure includes at least one or more laser modules, a power supply that supplies power to the laser modules, an optical fiber that guides laser light emitted from the laser modules, a condensing optical unit that is connected to one end of the optical fiber and makes the laser light incident on the optical fiber, a laser head that is connected to the other end of the optical fiber, receives the laser light guided by the optical fiber, and irradiates a workpiece, and a control unit that controls at least the operation of the power supply. The interface unit is attached to the laser module, the condensing optical unit, and the laser head. The control unit controls the operation of the power supply based on the voltage signal output from the interface unit.

Advantages of the Invention

[0014] According to the present disclosure, circuit specifications can be made common when processing signals output from a plurality of photodiodes.

Brief Description of the Drawings

[0015] [Figure 1] It is a schematic configuration diagram of a laser processing apparatus according to Embodiment 1. [Diagram 2] It is a schematic diagram showing the connection relationship between a control unit and an interface unit. [Figure 3] It is a circuit diagram of an interface circuit for a photodiode. [Figure 4] It is a circuit diagram of an offset adjustment circuit. [Figure 5] It is a circuit diagram of a noise filter. [Figure 6] It is a diagram showing an example of a setting parameter table. [Figure 7] It is a circuit diagram of an interface circuit for a photodiode according to Embodiment 2. [Figure 8] It is a circuit diagram of an interface circuit for a photodiode according to Embodiment 3. [Figure 9] It is a circuit diagram of an interface circuit for a photodiode according to Embodiment 4.

Modes for Carrying Out the Invention

[0016] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that the following description of the preferred embodiments is merely exemplary in nature and is not intended to limit the present disclosure, its applications, or its uses.

[0017] (Embodiment 1) FIG. 1 is a schematic configuration diagram of a laser processing apparatus according to Embodiment 1. In the present specification, "the same" means the same including the assembly tolerance and processing tolerance of the laser processing apparatus 100 and its component parts, and does not mean that the comparison targets are exactly the same in a strict sense.

[0018] The laser processing apparatus 100 includes a plurality of laser modules 11 to 14, a beam combiner 20, a condensing optical unit 30, a housing 40, a control unit 50, a power supply 60, an optical fiber 70, and a laser head 80. The laser modules 11 to 14, the beam combiner 20, and the condensing optical unit 30 are housed inside the housing 40. Also, a part of the optical fiber 70 is housed inside the housing 40. In the present specification, when the laser modules 11 to 14 are not particularly distinguished and described, each of them is referred to as a laser module 10.

[0019] The laser processing apparatus 100 shown in FIG. 1 is equipped with four laser modules 10. By using a plurality of laser modules 10 as laser light sources in this way, a high-output laser processing apparatus 100 with an output of the laser light LB irradiated on the workpiece W exceeding several kW can be obtained. However, it is not particularly limited to this. For example, the number of mounted laser modules 10 may be one. The number of mounted laser modules 10 can be appropriately changed according to the output specifications required for the laser processing apparatus 100 and the output specifications of each individual laser module 10.

[0020] In the present embodiment, the laser module 10 is a laser light source configured by housing a plurality of semiconductor laser elements having a single emitter or one or more laser diode arrays having a plurality of emitters inside a housing. The plurality of emitters each emit laser light LB E and the plurality of laser lights LB E are combined inside the housing, and laser light LB M is emitted from each of the four laser modules 10.

[0021] The beam combiner 20 has a plurality of optical components inside the housing, and combines the laser beams LB respectively emitted from the plurality of laser modules 10 into a single laser beam LB. When the number of laser modules 10 mounted on the laser processing apparatus 100 is one, the beam combiner 20 is omitted. M The condensing optical unit 30 has a condensing lens (not shown) inside the housing, receives the laser beam LB emitted from the beam combiner 20, and condenses it toward the incident end of the optical fiber 70.

[0022] The control unit 50 controls the laser oscillation of the plurality of laser modules 10 respectively. Specifically, by supplying a control signal such as output voltage / output current or on-time to the power supply 60, the laser oscillation of each laser module 10 is controlled. It is also possible to perform individual laser oscillation control for each laser module 10. For example, the laser oscillation output, on-time, etc. may be made different for each laser module 10.

[0023] [[ID=I0]]The control unit 50 is composed of a plurality of processors (not shown) and a storage unit (not shown). As the processor, for example, a CPU (Central Processing Unit) is used. One or more processors provided in the control unit 50 control the laser oscillation of the plurality of laser modules 10 respectively based on the laser processing conditions and operation programs for processing stored in the storage unit. Also, one or more processors provided in the control unit 50, based on the signals output from the interface units IFU11 to 14, IFU20, IFU30, IFU40, IFU80 described later, the laser beam LB

[0024] M ​Alternatively, the output of the laser beam LB is adjusted, or the power supply 60 is stopped. Also, one or more processors provided in the control unit 50 set the operation parameters of each of the interface units IFU11 to 14, IFU20, IFU30, IFU40, and IFU80, which will be described later, based on the set parameter table (see FIG. 6) stored in the storage unit. The control unit 50 may control the operation of a robot (not shown) to which the laser head 80 is attached.

[0025] The storage unit is composed of a semiconductor memory such as a RAM (Random Access Memory) or a ROM (Read Only Memory). Note that the storage unit may be composed of an HDD (Hard Disk Drive), an SSD (Solid State Drive), or the like.

[0026] The display unit 51 is configured to simultaneously display, for example, the processing parameters during laser processing. The display unit 51 usually includes a display device such as a liquid crystal display or an organic EL display.

[0027] As described above, the power supply 60 supplies power for laser oscillation to each of the plurality of laser modules 10. The power supplied to each laser module 10 may be made different according to a command from the control unit 50. Also, the power supply 60 may supply power to the movable parts of the laser processing apparatus 100, for example, the aforementioned robot. Note that power may be supplied to the movable parts of the laser processing apparatus 100 from another power supply (not shown).

[0028] The optical fiber 70 has at least a core and a cladding (not shown). The core is provided on the axis of the optical fiber 70 and functions as an optical waveguide that guides the laser beam LB incident from the condensing optical unit 30 to the laser head 80. The cladding is provided so as to surround the outer periphery of the core and functions as an optical confinement layer that confines the laser beam LB inside the core.

[0029] The laser head 80 irradiates the laser light LB guided by the optical fiber 70 outward. For example, in the laser processing apparatus 100 shown in FIG. 1, the laser light LB is emitted toward the workpiece W, which is an object to be processed, disposed at a predetermined position. By doing so, the workpiece W is laser processed.

[0030] Further, the laser modules 11 to 14, the beam combiner 20, the condensing optical unit 30, and the laser head 80 each have one or a plurality of photodiodes inside the housing (see FIGS. 2 and 3). Among these photodiodes, some photodiodes directly receive the laser light LB M or a part of the laser light LB. Further, another photodiode receives the laser light LB M or the light scattered by the optical components disposed inside each unit by the laser light LB, that is, the scattered light. The current signal I output from the photodiode varies in its intended use according to the type of light received. These will be described in detail later.

[0031] [Configuration of Interface Unit] FIG. 2 is a schematic diagram showing the connection relationship between the control unit and the interface units. For convenience of explanation, the illustration of the interface units IFU12 to IFU14 in FIG. 2 is omitted. The internal configuration of the interface units IFU12 to IFU14 and the configuration of various sensors connected thereto are the same as those of the interface unit IFU11.

[0032] As shown in FIG. 2, a plurality of interface units IFU11 to IFU14, IFU20, IFU30, IFU40, and IFU80 are respectively connected to the control unit 50. The interface units IFU11 to IFU14, IFU20, IFU30, IFU40, and IFU80 each have a photodiode interface circuit IFCP1 to IFCP4 and an interface circuit IFCT, IFCH.

[0033] In the present specification, when the interface units IFU11 to IFU14, IFU20, IFU30, IFU40, and IFU80 are not particularly distinguished and described, each of them is referred to as an interface unit IFU. Also, when the interface circuits IFCP1 to IFCP4 for photodiodes are not particularly distinguished and described, each of them is referred to as an interface circuit IFCP for photodiodes. Further, in the present specification, when the photodiodes attached to each unit of the laser processing apparatus 100 are not particularly distinguished and described, each of them is referred to as a photodiode PD.

[0034] The interface circuit IFCP for photodiodes is a circuit for converting a current signal output from a photodiode attached to the laser processing apparatus 100 into a voltage signal and sending it to the control unit 50. The interface circuit IFCT is a circuit for sending a signal output from a temperature sensor attached to the laser processing apparatus 100 to the control unit 50. The interface circuit IFCH is a circuit for sending a signal output from a humidity sensor attached to the laser processing apparatus 100 to the control unit 50.

[0035] In the example shown in FIG. 2, one photodiode PD is connected to one interface unit IFU, but it is not particularly limited thereto. The number of interface circuits IFCP for photodiodes mounted on one interface unit IFU corresponds to the maximum number of photodiodes PD attached to each unit of the laser processing apparatus 100. For example, when the number N of photodiodes PD attached to the laser head 80 is larger than the number of photodiodes PD attached to other units, the number of interface circuits IFCP for photodiodes mounted on one interface unit IFU is N.

[0036] Note that the types of sensors connected to the interface unit IFU are not particularly limited to those shown in FIG. 2, and other types of sensors may be connected. The types of sensors connected to each interface unit IFU may be different. For example, the interface unit IFU80 attached to the laser head 80 is not provided with an interface circuit IFCH. This is because the emission port of the laser light LB is open in the laser head 80, and there is little need to perform humidity management inside the laser head 80.

[0037] Note that regardless of the type of unit to which the interface unit IFU is attached, and even when the types of sensors attached to the unit are different, the interface unit IFU is configured such that the types and the respective numbers of the interface circuits to be arranged are the same. The type of interface circuit corresponds to the type of sensor, and the number of one type of interface circuit corresponds to the maximum number of connections of the sensor of that type when one sensor corresponding to that type is connected to one interface unit IFU. Also, when a plurality of interface circuits of the same type are mounted on the interface unit IFU, the specifications of each interface circuit are also made common.

[0038] By configuring the interface unit IFU in this way, the specifications of the interface unit IFU can be made common regardless of the type of unit to which the interface unit IFU is attached, and even when the types of sensors attached to the unit are different. Also, interface units IFU with the same specifications are attached to each unit.

[0039] When a plurality of interface circuits IFCP for photodiodes are provided in one interface unit IFU, they are mounted on a common circuit board. However, each of the plurality of interface circuits IFCP for photodiodes may be provided on an individual circuit board. Also, another type of interface circuit may be mounted on the same circuit board as the interface circuit IFCP for photodiodes, or may be mounted on a different circuit board.

[0040] [Configuration of Interface Circuit for Photodiode] FIG. 3 is a circuit diagram of the interface circuit for photodiodes. FIG. 4 is a circuit diagram of the offset adjustment circuit. FIG. 5 is a circuit diagram of the noise filter.

[0041] As shown in FIG. 3, the interface circuit IFCP for photodiodes includes a connector CNT, a first external output terminal EOUT1, a second external output terminal EOUT2, a first operational amplifier OA1, and a voltage follower VF. Also, the interface circuit IFCP for photodiodes includes a first potentiometer DP1, a second potentiometer DP2, a switch SW, a first offset adjustment circuit OAC1, a first noise filter NF1, and a second noise filter NF2. Also, the interface circuit IFCP for photodiodes includes a first processor CPU1.

[0042] The connector CNT serves as the input terminal of the interface circuit IFCP for photodiodes, and the photodiode PD is connected thereto. When light is incident on the photodiode PD, the photodiode PD generates a current signal I corresponding to the amount of light. The current signal I is input to the interface circuit IFCP for photodiodes via the connector CNT.

[0043] The first operational amplifier OA1 has a first input terminal IN1, a second input terminal IN2, and a first output terminal OUT1, and converts the current signal I input to the first input terminal IN1 into a voltage signal V and outputs it from the first output terminal OUT1.

[0044] Also, the first input terminal IN1 is connected to the cathode of the photodiode PD via the connector CNT. Also, the first input terminal IN1 is connected to the first output terminal OUT1 via the changeover switch SW and the first potentiometer DP1 or the second potentiometer DP2.

[0045] The changeover switch SW is a three-pole switch having first to third terminals T1 to T3. The first terminal T1 is connected to the first input terminal IN1 of the first operational amplifier OA1, the second terminal T2 is connected to the first potentiometer DP1, and the third terminal T3 is connected to the second potentiometer DP2.

[0046] Also, a first processor CPU1 is connected to the changeover switch SW. The first processor CPU1 operates the changeover switch SW so that only one of the first potentiometer DP1 and the second potentiometer DP2 electrically connects the first input terminal IN1 and the first output terminal OUT1 according to the magnitude of the current signal I.

[0047] Note that the photodiode that receives scattered light is used to evaluate the degree of contamination or damage of the optical components arranged in its vicinity. Therefore, when the current signal I output from the photodiode PD, and thus the voltage signal V, exceeds a predetermined threshold value, an alert signal or an error signal is output to the control unit 50. Also, the laser beam LB M or the photodiode that directly receives a part of the laser beam LB is used to monitor the power of the laser beam LB M or the laser beam LB. Therefore, the power of the laser beam LB M or the laser beam LB is controlled according to the magnitude of the current signal I output from the photodiode PD, and thus the voltage signal V. Also, when the voltage signal V exceeds another predetermined value, an error signal is output to the control unit 50.

[0048] The first potentiometer DP1 and the second potentiometer DP2 are variable resistors whose resistance values change according to digital signals from the outside. Note that the third to seventh potentiometers DP3 to DP7, which will be described later, are also variable resistors whose resistance values change according to digital signals from the outside.

[0049] The first potentiometer DP1 and the second potentiometer DP2 are respectively connected to the first processor CPU1. The first processor CPU1 controls the respective resistance values of the first potentiometer DP1 and the second potentiometer DP2.

[0050] The variable resistance range of the first potentiometer DP1 is set to a value larger than the variable resistance range of the second potentiometer DP2. In this embodiment, the variable resistance range of the first potentiometer DP1 is set to 0 Ω or more and 1 MΩ or less, and the variable resistance range of the second potentiometer DP2 is set to 0 Ω or more and 10 kΩ or less. However, it is not particularly limited thereto, and the respective variable resistance ranges can be appropriately changed within a range that maintains the magnitude relationship of the respective variable resistance ranges.

[0051] Note that the first potentiometer DP1 and the second potentiometer DP2 can be adjusted so that their resistance values become zero. However, the substantially adjustable range is 10 kΩ or more and 1 MΩ or less for the first potentiometer DP1, and 100 Ω or more and 10 kΩ or less for the second potentiometer DP2. Also, a resistance value of zero means that the resistance value is 0 kΩ.

[0052] By connecting the first input terminal IN1 and the first output terminal OUT1 with the first potentiometer DP1 or the second potentiometer DP2, the first operational amplifier OA1 functions as an inverting amplifier circuit. The first input terminal IN1 corresponds to the inverting input terminal, and the second input terminal IN2 corresponds to the non-inverting input terminal.

[0053] In this case, the magnitude of the voltage signal V satisfies the relationship shown in Equation (1) or Equation (2).

[0054] V = I × Z1 ···(1) V = I × Z2 ···(2) Here, Z1 is the resistance value of the first potentiometer DP1, and Z2 is the resistance value of the second potentiometer DP2.

[0055] Considering adjusting the magnitude of the voltage signal V in the range from 100 mV to about 1 V, the magnitude of the current signal I flowing through the first potentiometer DP1 is set in the range of 10 nA or more and 10 μA or less. Also, the magnitude of the current signal I flowing through the second potentiometer DP2 is set in the range of 10 μA or more and 10 mA or less.

[0056] The former setting is suitable when the photodiode PD receives light with a low light amount such as scattered light. That is, when a photodiode PD that receives light with a low light amount such as scattered light is connected, it is preferable to operate the switching switch SW by the first processor CPU1 to connect the first input terminal IN1 and the first output terminal OUT1 with the first potentiometer DP1.

[0057] On the other hand, the latter setting is suitable when monitoring the laser beam LB M or the power of the laser beam LB. When a photodiode PD that receives light with a high light amount for power monitoring is connected, it is preferable to operate the switching switch SW by the first processor CPU1 to connect the first input terminal IN1 and the first output terminal OUT1 with the second potentiometer DP2. In other words, when the magnitude of the current signal I exceeds a first predetermined value, for example, 10 μA in the above example, it is preferable for the first processor CPU1 to operate the switching switch SW so that the second potentiometer DP2 electrically connects the first input terminal IN1 and the first output terminal OUT1.

[0058] Also, a first offset adjustment circuit OAC1 is connected to a second input terminal IN2, which is a non-inverting input terminal of the first operational amplifier OA1. As shown in FIG. 4, the first offset adjustment circuit OAC1 is composed of a third potentiometer DP3 and the aforementioned first processor CPU1. The third potentiometer DP3 is connected to a first reference voltage terminal +V CC and a second reference voltage terminal -V CC and the second input terminal IN2. The voltage of the first reference voltage terminal +V CC is a positive fixed voltage, and the voltage of the second reference voltage terminal -V CC is a negative fixed voltage. The absolute value of the voltage of the first reference voltage terminal +V CC is the same as the absolute value of the voltage of the second reference voltage terminal -V CC . The first processor CPU1 adjusts the voltage input to the second input terminal IN2 by controlling the resistance value of the third potentiometer DP3.

[0059] Normally, dark current is generated in the photodiode PD, but its magnitude is sufficiently smaller than the generated current signal I. However, depending on the specifications and size of the photodiode PD, the magnitude of the dark current superimposed on the current signal I may become non-negligible. In this case, the offset voltage superimposed on the voltage signal V may increase, and the current signal I, which is the output signal of the photodiode PD, may not be correctly detected.

[0060] In such a case, in the first offset adjustment circuit OAC1, the first processor CPU1 adjusts the resistance value of the third potentiometer DP3 to cancel the offset voltage caused by the dark current and correctly detect the current signal I of the photodiode PD.

[0061] Also, in each unit of the laser processing apparatus 100 to which the interface unit IFU is attached, laser light LB M or stray light of the laser light LB may be generated inside the housing. Even when the amount of stray light is large, the magnitude of the stray light superimposed on the current signal I may become non-negligible.

[0062] Even in such a case, the first offset adjustment circuit OAC1 can be operated to cancel the offset voltage caused by stray light, and the current signal I of the photodiode PD can be correctly detected.

[0063] The voltage signal V output from the first operational amplifier OA1 is input to the voltage follower VF. The voltage follower VF is configured by directly connecting the non-inverting input terminal (- terminal) and the output terminal of the third operational amplifier OA3 to which the voltage signal V is input. By providing the voltage follower VF, it is possible to prevent the current signal I output from the photodiode PD from being directly input to the second processor CPU2 due to some cause. This can protect the second processor CPU2.

[0064] The transmission path of the voltage signal V output from the voltage follower VF is branched into two. One is connected to the first external output terminal EOUT1 via the first noise filter NF1. The other is connected to the second external output terminal EOUT2 via the second noise filter NF2.

[0065] As shown in FIG. 5, the first noise filter NF1 is composed of a fourth potentiometer DP4, a first capacitor C1 connected in parallel with the fourth potentiometer DP4, and the aforementioned first processor CPU1. The first processor CPU1 controls the cut-off frequency of the first noise filter NF1 by controlling the resistance value of the fourth potentiometer DP4.

[0066] Also, the second noise filter NF2 is composed of a fifth potentiometer DP5, a second capacitor C2 connected in parallel with the fifth potentiometer DP5, and the aforementioned first processor CPU1. The first processor CPU1 controls the cut-off frequency of the second noise filter NF2 by controlling the resistance value of the fifth potentiometer DP5.

[0067] In addition, assuming that the first capacitor C1 and the second capacitor C2 each have the same capacitance value C, the cut-off frequencies f co1 , f co2 of the first noise filter NF1 and the second noise filter NF2 respectively satisfy the relationships shown in equations (3) and (4).

[0068] f co1 = 1 / (2πCZ4) ···(3) f co2 = 1 / (2πCZ5) ···(4) Here, Z4 is the resistance value of the fourth potentiometer DP4, and Z5 is the resistance value of the fifth potentiometer DP5.

[0069] By making the cut-off frequencies f co1 , f co2 of the first noise filter NF1 and the second noise filter NF2 variable, the response speed of the voltage signal V and the frequency band of the noise to be cut can be appropriately adjusted.

[0070] The voltage signal V output from the first external output terminal EOUT1 is sent to the control unit 50 as an external output for feedback to control the laser beam LB M or the power of the laser beam LB.

[0071] On the other hand, a second processor CPU2 is connected to the second external output terminal EOUT2. When the magnitude of the voltage signal V output from the second external output terminal EOUT2 exceeds a predetermined threshold value, the second processor CPU2 outputs an error signal. Based on the error signal output from the second processor CPU2, the control unit 50 stops the laser beam LB M from being emitted from the laser module 10.

[0072] The second processor CPU2 is provided outside the interface circuit IFCP for the photodiode. However, it is not particularly limited thereto, and the second processor CPU2 may be arranged inside the interface circuit IFCP for the photodiode, and a signal output from the second processor CPU2, for example, an error signal, may be sent to the control unit 50 via the second external output terminal EOUT2.

[0073] In addition, when the voltage signal V output from the first operational amplifier OA1 or the second external output terminal EOUT2 exceeds the above-mentioned threshold value, this is detected, and the first processor CPU1 may control the resistance values of the first potentiometer DP1 and the second potentiometer DP2 to be zero, respectively.

[0074] As shown in FIG. 3, in the interface circuit IFCP for the photodiode, a Zener diode ZD is connected in parallel with the second external output terminal EOUT2, and the anode of the Zener diode ZD is connected to the GND (ground) potential. The Zener diode ZD functions as an input protection circuit for the second processor CPU2. It also functions as an internal protection circuit for the interface circuit IFCP for the photodiode.

[0075] However, if the light incident on the photodiode PD exceeds the allowable range and a large current signal I is generated, a current equal to or greater than a predetermined value will flow through the Zener diode ZD. If a large current flows through the Zener diode ZD for a long time, the Zener diode ZD will generate heat, which may affect the circuit operation of the second processor CPU2 and the interface circuit IFCP for the photodiode. In an extreme case, the Zener diode ZD itself may be damaged and lose its function as a protection circuit.

[0076] In this case, based on the error signal output from the second processor CPU2, the control unit 50 controls the power supply 60 to control the laser light LB MStop it. However, by using the processor inside the interface circuit IFCP for the photodiode, the protection of the Zener diode ZD itself can be achieved with a faster response time.

[0077] Specifically, as described above, by setting the resistance values of the first potentiometer DP1 and the second potentiometer DP2 to zero, as is clear from equations (1) and (2), the magnitude of the voltage signal V output from the first operational amplifier OA1 becomes zero. As a result, the flow of a large current through the Zener diode ZD can be suppressed.

[0078] Note that parameters set in the interface circuit IFCP for the photodiode and interface circuits IFCT, IFCH, etc., for example, the threshold value of the voltage signal V when the second processor CPU2 outputs an error signal, do not need to be held by the first processor CPU1.

[0079] The control unit 50 may be directly able to set parameters for each interface unit IFU, the interface circuit IFCP for the photodiode, and the interface circuits IFCT, IFCH. For example, as shown in FIG. 6, a set parameter table for the interface unit IFU may be provided.

[0080] FIG. 6 shows an example in which four photodiodes PD1 to PD4, a temperature sensor TS1, and a humidity sensor HS1 are connected to one interface unit IFU. For example, seven parameters are set for one photodiode PD1, and each is assigned a number. The seven parameters include a setting (parameter ID: 1) for connecting either the first potentiometer DP1 or the second potentiometer DP2 to the first operational amplifier OA1 by the changeover switch SW. The seven parameters also include resistance setting values (parameter IDs: 2 to 6) for each of the first to fifth potentiometers DP1 to DP5, and a threshold value (parameter ID: 7) for the voltage signal V output from the second external output terminal EOUT2 when an error occurs. Similarly, threshold values (parameter IDs: 11 and 12) for the signals output from the temperature sensor TS1 and humidity sensor HS1 when an error occurs are set for each sensor.

[0081] Note that the table shown in FIG. 6 is merely an example. In reality, the contents of the setting parameter table set in the interface unit IFU will differ depending on the type of unit to which the interface unit IFU is attached. For this reason, the control unit 50 associates the corresponding setting parameter table with each type of unit and assigns a number to each table, and manages each setting parameter table by the table number. In this way, the settings of each interface unit IFU can be changed and managed on software for each type of unit to which the interface unit IFU is attached. Also, as described above, the specifications of each interface unit IFU are common regardless of the type of unit to which the interface unit IFU is attached. Therefore, the software for changing and managing the settings of the interface unit IFU can also be common regardless of the type of unit to which the interface unit IFU is attached.

[0082] Specifically, an identification number is set according to the model of the laser processing apparatus 100 and the type of the unit to which the interface unit IFU is attached. Further, a setting parameter table for each identification number is prepared in advance. By having the processing operator input it or setting the identification number in the processing program, the control unit 50 can set desired parameters for each interface unit IFU only by switching the identification number.

[0083] Note that the photodiode PD may receive the reflected light from the workpiece W generated during laser processing, the light emission of the plasma (laser-induced plume) excited by the laser light LB, etc. These light intensities vary depending on the wavelength of the laser light LB and the material of the workpiece W. Also, in laser welding or the like, these light intensities also vary depending on welding conditions such as whether keyhole welding or heat conduction welding is being performed. For this reason, it is preferable that the setting parameter table is also prepared according to the laser processing conditions and the material of the workpiece W. That is, the above-mentioned identification number is set including the laser processing conditions and the material of the workpiece W, and it is preferable that a setting parameter table for each identification number is prepared in advance. By doing so, the control unit 50 can set desired parameters for each interface unit IFU only by switching the identification number.

[0084] In this embodiment, an example in which the first processor CPU1 is mounted on the interface circuit IFCP for the photodiode is shown, but it is not particularly limited thereto. For miniaturization and cost reduction of the interface circuit IFCP for the photodiode, and thus the interface unit IFU, another processor may be mounted on the control unit 50 or a relay device (not shown) up to the control unit 50.

[0085] For example, the first processor CPU1 that controls the resistance values of the first to fifth potentiometers DP1 to DP5 may be provided outside the interface unit IFU, for example, in the control unit 50. In this case, however, the response speed of changing the resistance values of the first to fifth potentiometers DP1 to DP5 is slightly lower than when the first processor CPU1 is mounted on the photodiode interface circuit IFCP. Therefore, based on the error signal output from the second processor CPU2, the resistance values of the first potentiometer DP1 and the second potentiometer DP2 are each set to zero until the laser beam LB M is stopped, and the response time becomes longer. However, for other controls, there is no significant difference whether the first processor CPU1 is mounted on the photodiode interface circuit IFCP or arranged outside.

[0086] [Effects, etc.] As described above, the photodiode interface circuit IFCP according to the present embodiment includes at least a first operational amplifier OA1, a switching switch SW, a first processor CPU1, a first potentiometer DP1, and a second potentiometer DP2.

[0087] The first operational amplifier OA1 has at least a first input terminal IN1, a second input terminal IN2, and a first output terminal OUT1, converts the current signal I output from the photodiode PD into a voltage signal V, and outputs the voltage signal V from the first output terminal OUT1.

[0088] The variable resistance range of the first potentiometer DP1 is larger than that of the second potentiometer DP2, and the first potentiometer DP1 and the second potentiometer DP2 are connected to the switching switch SW. The first processor CPU1 controls the operation of the switching switch SW.

[0089] The first processor CPU1 operates the changeover switch SW so that only one of the first potentiometer DP1 and the second potentiometer DP2 electrically connects the first input terminal IN1 and the first output terminal OUT1 in accordance with the magnitude of the current signal I. The magnitude of the current signal I is determined by the unit in which the photodiode interface circuit IFCP is attached and the laser light LB. M Alternatively, it can be estimated in advance depending on the power of the laser light LB.

[0090] According to this embodiment, the circuit specifications of the photodiode interface circuit IFCP can be standardized regardless of the unit to which the photodiode interface circuit IFCP is attached or the type of light received by the photodiode PD. In other words, the hardware configuration of the photodiode interface circuit IFCP and the software configuration for operating the photodiode interface circuit IFCP can be standardized. This eliminates the need to design the photodiode interface circuit IFCP individually depending on the unit to which the photodiode interface circuit IFCP is attached or the type of light received by the photodiode PD, thereby reducing design costs.

[0091] Also, according to this embodiment, the first potentiometer DP1 or the second potentiometer DP2, which is a feedback resistor constituting the inverting amplifier circuit, is changed by operating the changeover switch SW. In this way, the magnitude of the voltage signal V output from the first operational amplifier OA1 can be made variable, and even if the interface unit IFU or the unit to which it is attached is replaced or the model is changed, the photodiode interface circuit IFCP of the same specifications can be used. Also, by making the magnitude of the voltage signal V output from the first operational amplifier OA1 variable within a predetermined range, the detection accuracy of the light received by the photodiode PD can be improved compared to a conventional configuration, for example, a case in which a light amount-logarithmic voltage conversion circuit is used. As a result, for example, the photodiode PD can be connected to the laser light LB MMoreover, when used as a power monitor for the laser beam LB, the responsiveness of power control can be enhanced. Further, when the photodiode PD is used for detecting weak light such as scattered light, the change in the amount of scattered light can be accurately detected, and abnormalities in the unit of the laser processing apparatus 100, particularly in its internal components, can be reliably detected.

[0092] The first potentiometer DP1 and the second potentiometer DP2 are respectively connected to the first processor CPU1. The first processor CPU1 controls the respective resistance values of the first potentiometer DP1 and the second potentiometer DP2.

[0093] By doing so, the resistance values of the first potentiometer DP1 or the second potentiometer DP2, which are the feedback resistors of the inverting amplifier circuit, can be changed simply and with high precision. As a result, even when the magnitude of the output current signal I varies greatly depending on the type of unit to which the photodiode PD is attached or the specifications of the photodiode PD, etc., the range of the voltage signal V output from the first operational amplifier OA1 can be kept within a predetermined range. Consequently, even when the magnitude of the current signal I varies greatly, the magnitude of the feedback signal to the control unit 50 and the threshold value of the voltage signal V that generates an alert signal or an error signal can be made constant. This simplifies the control of each unit of the laser processing apparatus 100 by the control unit 50. Also, when newly designing each unit of the laser processing apparatus 100 or changing the mounting position of the photodiode PD, etc., it may not be possible to appropriately predict the magnitude of the current signal I output from the photodiode PD. In such a case, first, it is connected to the first input terminal IN1 and the first output terminal OUT1, and the resistance value of the second potentiometer DP2 with a small variable resistance range is set to the actually adjustable minimum value, for example, 100 Ω. In this state, light is made to enter the photodiode PD, and while monitoring the magnitude of the voltage signal V, the resistance value of the second potentiometer DP2 is adjusted so that the magnitude of the voltage signal V falls within a predetermined range. If the magnitude of the voltage signal V is below the predetermined range even when the resistance value of the second potentiometer DP2 is increased to the maximum value, the switching switch SW is operated by the first processor CPU1 so that the first potentiometer DP1 is connected to the first input terminal IN1 and the first output terminal OUT1, and the resistance value of the first potentiometer DP1 is adjusted.

[0094] The variable resistance range of the first potentiometer DP1 is 0 kΩ or more and 10 MΩ or less, and the variable resistance range of the second potentiometer DP2 is 0 kΩ or more and 10 kΩ or less.

[0095] Whether the light received by the photodiode PD is scattered light by the optical components inside the laser processing apparatus or the laser beam LB MDepending on whether the laser beam LB or a part of it is the branched beam, the amount of light received by the photodiode PD varies greatly. In some cases, the light quantity ratio can be as large as about three to four digits at most. Therefore, the magnitude of the current signal I output from the photodiode PD also varies by about three to four digits at most depending on the type of light received by the photodiode PD.

[0096] When the magnitude of the current signal I varies so greatly, in order to output a voltage signal V within a predetermined output range from the first operational amplifier OA1 with the same specifications, it is necessary to greatly change the resistance value of the feedback resistor. That is, as is clear from equations (1) and (2), it is necessary to greatly change the variable resistance range of the first potentiometer DP1 and the variable resistance range of the second potentiometer DP2.

[0097] In this embodiment, the maximum resistance values of the first potentiometer DP1 and the second potentiometer DP2 are made to differ by three digits. Even when the magnitude of the current signal I varies within the aforementioned range, the magnitude of the voltage signal V output from the first operational amplifier OA1 can be kept within a predetermined range.

[0098] Note that except when the resistance values of the aforementioned first potentiometer DP1 and second potentiometer DP2 are set to zero, the feedback resistor needs to have a finite value. In this embodiment, the variable resistance range of the first potentiometer DP1 that can actually be adjusted is 10 kΩ or more and 10 MΩ or less, and the variable resistance range of the second potentiometer DP2 is 100 Ω or more and 10 kΩ or less.

[0099] Also, when the magnitude of the current signal I exceeds a first predetermined value, it is preferable that the first processor CPU1 operates the switching switch SW so that the second potentiometer DP2 electrically connects the first input terminal IN1 and the first output terminal OUT1.

[0100] By doing so, even when a photodiode PD that receives a high amount of light is connected to the interface circuit IFCP for the photodiode and the current signal I becomes a very large value, the magnitude of the voltage signal V output from the first operational amplifier OA1 can be kept within a predetermined range. As a result, even when the current signal I becomes a very large value, the magnitude of the feedback signal to the control unit 50 and the threshold value of the voltage signal V that generates an alert signal or an error signal can be made constant.

[0101] When the magnitude of the voltage signal V exceeds a predetermined threshold value, it is preferable that the first processor CPU1 controls the resistance values of the first potentiometer DP1 and the second potentiometer DP2 to be zero (0 kΩ).

[0102] By doing so, the voltage signal V can be reduced to zero, and the laser beam LB M or the emission of the laser beam LB can be stopped. Also, a large current flowing through the Zener diode ZD can be suppressed, and a failure of the Zener diode ZD can be suppressed. Also, the laser beam LB M or the occurrence of processing defects of the workpiece W due to abnormal power of the laser beam LB and failures of the laser processing apparatus 100 can be suppressed.

[0103] Also, in the interface circuit IFCP for the photodiode of the present embodiment, a first offset adjustment circuit OAC1 is connected to the second input terminal IN2. The first offset adjustment circuit OAC1 includes a third potentiometer DP3 and the first processor CPU1. The third potentiometer DP3 is connected to the first reference voltage terminal +V CC and the second reference voltage terminal -V CC and the second input terminal IN2. The first processor CPU1 adjusts the voltage input to the second input terminal IN2 by controlling the resistance value of the third potentiometer DP3.

[0104] By doing so, the input voltage to the second input terminal IN2, which is the non-inverting input terminal of the inverting amplifier circuit, can be adjusted, and the offset voltage caused by the dark current generated by the photodiode PD and the stray light generated in the arrangement space of the photodiode PD can be canceled. As a result, the current signal I of the photodiode PD can be correctly detected. Also, the magnitude of the voltage signal V output from the first operational amplifier OA1 can be kept within a predetermined range.

[0105] The transmission path of the voltage signal V output from the first output terminal branches into two paths. One of the branched transmission paths is connected to the first external output terminal EOUT1, and the other transmission path is connected to the second external output terminal EOUT2.

[0106] In this way, by branching the transmission path of the voltage signal V into two paths, the input destinations and applications of the voltage signal V output from each transmission path can be made different. For example, as shown in this embodiment, the voltage signal V output from one transmission path is used for the laser beam LB M or the power monitor of the laser beam LB. Also, the voltage signal V output from the other transmission path is used for the laser beam LB M or for detecting abnormal power of the laser beam LB or detecting abnormalities in the unit to which the interface circuit IFCP for the photodiode is attached. It can also be used for detecting internal defects in the interface circuit IFCP for the photodiode.

[0107] Also, the voltage signal V transmitted through one transmission path is output to the first external output terminal EOUT1 via the first noise filter NF1 inserted in series in one transmission path. The voltage signal V transmitted through the other transmission path is output to the second external output terminal EOUT2 via the second noise filter NF2 inserted in series in the other transmission path.

[0108] The first noise filter NF1 is composed of a fourth potentiometer DP4, a first capacitor C1 connected in parallel to the fourth potentiometer DP4, and a first processor CPU1. The first processor CPU1 controls the cut-off frequency f co1 of the first noise filter NF1 by controlling the resistance value of the fourth potentiometer DP4.

[0109] The second noise filter is composed of a fifth potentiometer DP5, a second capacitor C2 connected in parallel to the fifth potentiometer DP5, and a first processor CPU1. The first processor CPU1 controls the cut-off frequency f co2 of the second noise filter NF2 by controlling the resistance value of the fifth potentiometer DP5.

[0110] Laser beam LB M Also, for feedback signals in the power control of the laser beam LB or signals for issuing error signals to the control unit 50, high-speed responsiveness is required. On the other hand, in each unit of the laser processing apparatus 100, due to the mounting position of the photodiode PD, the state within the unit, and the installation environment of the laser processing apparatus 100, etc., the frequency band of the noise to be cut may be different.

[0111] The interface unit IFU according to the present embodiment has a plurality of interface circuits, and at least one of the plurality of interface circuits is an interface circuit IFCP for a photodiode.

[0112] According to the present embodiment, since at least one of the plurality of interface circuits is used as the interface circuit IFCP for the photodiode, the interface circuit IFCP with the common circuit specifications is mounted in each interface unit IFU. Therefore, it is not necessary to individually design the interface circuit IFCP for the photodiode according to the unit to which the interface unit IFU is attached or the type of light received by the photodiode PD. As a result, the design cost of the interface circuit IFCP for the photodiode, and thus the interface unit IFU, can be reduced.

[0113] When there are a plurality of interface circuits IFCP for the photodiode, at least one of the plurality of interface circuits IFCP for the photodiode has one photodiode PD electrically connected thereto. Note that different photodiodes PD may be electrically connected to each of the plurality of interface circuits IFCP for the photodiode.

[0114] As described above, assuming that the maximum number of photodiodes PD attached to each unit of the laser processing apparatus 100 is four, there is an interface unit IFU to which four photodiodes PD are attached, while there may also be another interface unit IFU to which one photodiode PD is attached. That is, even if the interface unit IFU has a plurality of interface circuits IFCP for the photodiode, the number of interface circuits IFCP for the photodiode to which the photodiode PD is attached may be one.

[0115] Further, in the interface unit IFU, it is preferable to standardize the circuit specifications of the interface circuit to which one type of sensor is connected. More preferably, the number of the interface circuits is set to the maximum number of one type of sensor attached to each unit of the laser processing apparatus 100.

[0116] By configuring the interface unit IFU in this way, regardless of the type of unit to which the interface unit IFU is attached, and even when the types of sensors attached to the unit are different, the specifications of the interface unit IFU can be standardized. Also, interface units IFU with the same specifications can be attached to each unit.

[0117] Note that the circuit mounted on the interface unit IFU is not particularly limited to that shown in FIG. 2. For example, when an acceleration sensor or a vibration sensor is mounted on the laser head 80, an interface circuit for the acceleration sensor or the mounted sensor is mounted on the interface unit IFU. Also, when the laser processing apparatus 100 emits guide light for the laser beam LB, a control circuit for the guide light is mounted on the interface unit IFU. Further, when the laser processing apparatus 100 has a camera or an inspection apparatus using optical coherence tomography (hereinafter referred to as OCT), a control circuit for illumination light for the camera or wavelength sweep light for OCT is mounted on the interface unit IFU.

[0118] Also, a safety relay circuit that operates when an abnormality is detected by various sensors may be mounted on the interface unit IFU. Further, an abnormality detection circuit when an abnormality is detected by a sensor other than the photodiode PD, the temperature sensor TS, and the humidity sensor HS1 may be mounted on the interface unit IFU.

[0119] Also, a communication circuit between each interface circuit of the interface unit IFU and the control unit 50 or a communication circuit between each interface circuit may be mounted on the interface unit IFU.

[0120] The laser processing apparatus 100 according to the present embodiment includes at least one or a plurality of laser modules 10, a condensing optical unit 30, a control unit 50, a power supply 60, an optical fiber 70, and a laser head 80.

[0121] The power supply 60 supplies power to the laser module 10. The control unit 50 controls at least the operation of the power supply 60. The optical fiber 70 guides the laser beam LB emitted from the laser module 10. The condensing optical unit 30 is connected to one end of the optical fiber 70 and causes the laser beam LB to enter the optical fiber 70. The laser head 80 is connected to the other end of the optical fiber 70, receives the laser beam LB guided by the optical fiber 70, and irradiates the workpiece W.

[0122] An interface unit IFU is attached to the laser module 10, the condensing optical unit 30, and the laser head 80.

[0123] The control unit 50 controls the operation of the power supply 60 based on the voltage signal V output from the first external output terminal EOUT1 of the interface circuit IFCP for the photodiode. More specifically, the control unit 50 controls the output of the laser beam LB M and the output of the laser beam LB. Further, the control unit 50 stops the emission of the laser beam LB from the laser module 10 based on the voltage signal V output from the second external output terminal EOUT2 of the interface circuit IFCP for the photodiode. M

[0124] According to this embodiment, an interface unit IFU having an interface circuit IFCP for a photodiode with a common circuit specification is attached to a plurality of units of the laser processing apparatus 100.

[0125] By configuring the laser processing apparatus 100 in this way, it is not necessary to individually design the interface circuit IFCP for the photodiode, and thus the interface unit IFU, according to the unit to which the interface unit IFU is attached and the type of light received by the photodiode PD. As a result, the design cost of the interface unit IFU can be reduced, and thus the cost of the laser processing apparatus 100 can be reduced.

[0126] ​Further, voltage signals V corresponding to the amount of light of the photodiode PD are output from the first external output terminal EOUT1 and the second external output terminal EOUT2 of the interface circuit IFCP for the photodiode, respectively. By doing so, from one interface circuit IFCP for the photodiode, the laser beam LB M or the power control signal of the laser beam LB and the error signal at the time of abnormality detection can be output simultaneously.

[0127] The second external output terminal EOUT2 is connected to the second processor CPU2. When the magnitude of the voltage signal V output from the second external output terminal EOUT2 exceeds a predetermined threshold value, the second processor CPU2 outputs an error signal. The control unit 50 stops the laser beam LB M from being emitted from the laser module 10 based on this error signal.

[0128] In each unit of the laser processing apparatus 100, when an abnormality such as an abnormal power of the laser beam LB M or the laser beam LB or an abnormality of internal components occurs, the amount of light detected by the photodiode PD increases significantly. According to the present embodiment, the increase in the received light amount of the photodiode PD accompanying the occurrence of the abnormality can be transmitted as an error signal to the control unit 50 by the photodiode PD and the interface circuit IFCP for the photodiode. Further, the control unit 50 stops the laser beam LB M from being emitted from the laser module 10 based on this error signal, thereby preventing damage to each unit of the laser processing apparatus 100 including the laser module 10 from expanding. Further, depending on the mounting position of the photodiode PD, the unit in which a failure or damage has occurred can be specified, and the maintenance of the laser processing apparatus 100 can be performed accurately and quickly.

[0129] (Embodiment 2) FIG. 7 is a circuit diagram of the interface circuit for a photodiode according to Embodiment 2. For convenience of explanation, in FIG. 7 and the drawings shown hereinafter, the same parts as those in Embodiment 1 are denoted by the same reference numerals, and detailed description thereof is omitted.

[0130] The interface circuit IFCP for a photodiode of the present embodiment shown in FIG. 7 is different from the interface circuit IFCP for a photodiode of Embodiment 1 shown in FIG. 3 in the following points.

[0131] First, the current-voltage conversion circuit composed of the first operational amplifier OA1 and the first potentiometer DP1 or the second potentiometer DP2 is a non-inverting amplifier circuit. That is, the current signal I output from the photodiode PD is input to the second input terminal IN2 which is the non-inverting input terminal of the first operational amplifier OA1.

[0132] Also, the cathode of the photodiode PD is connected to the first reference voltage terminal +V CC via the connector CNT. In other words, the cathode of the photodiode PD is fixed at a positive voltage. Also, the anode of the photodiode PD is connected to the second input terminal IN2 via the connector CNT and is connected to the GND potential via the first resistor R1 (resistance value: R1).

[0133] Also, the first potentiometer DP1 and the second potentiometer DP2 are connected to the first input terminal IN1 which is the inverting input terminal of the first operational amplifier OA1 via the switching switch SW. Similar to that shown in Embodiment 1, the first processor CPU1 operates the switching switch SW so that only one of the first potentiometer DP1 and the second potentiometer DP2 electrically connects the first input terminal IN1 and the first output terminal OUT1 according to the magnitude of the current signal I. Also, the first terminal T1 of the switching switch SW is connected to the GND potential via the second resistor R2 (resistance value: R2).

[0134] When the first potentiometer DP1 is connected to the first input terminal IN1 and the first output terminal OUT1, the voltage signal V1 output from the first output terminal OUT1 satisfies the relationship shown in Equation (5). When the second potentiometer DP2 is connected to the first input terminal IN1 and the first output terminal OUT1, the voltage signal V1 satisfies the relationship shown in Equation (6).

[0135] V1 = I × R1 × (1 + Z1 / R2) ···(5) V1 = I × R1 × (1 + Z2 / R2) ···(6) Also, in the photodiode interface circuit IFCP of the present embodiment shown in FIG. 7, the voltage follower VF shown in FIG. 3 is omitted.

[0136] According to the present embodiment, the same effects as those achieved by the configuration shown in Embodiment 1 can be achieved. That is, the circuit specifications of the photodiode interface circuit IFCP can be made common. As a result, there is no need to individually design the photodiode interface circuit IFCP according to the unit to which the photodiode interface circuit IFCP is attached or the type of light received by the photodiode PD, and the design cost can be reduced.

[0137] Also, according to the present embodiment, the magnitude of the voltage signal V1 output from the first operational amplifier OA1 can be made variable, and the same specification of the photodiode interface circuit IFCP can be used even when the interface unit IFU or the unit to which it is attached is replaced or the model is changed. Also, by making the magnitude of the voltage signal V1 output from the first operational amplifier OA1 variable within a predetermined range, the detection accuracy of the light received by the photodiode PD can be improved.

[0138] Also, according to the present embodiment, the photodiode PD is in a depleted state, and light is made to be incident on the photodiode PD in this state. By doing so, the capacitance of the photodiode PD can be reduced, and the response speed of the photodiode PD when the incident light amount changes, that is, the response speed of the current signal I, and thus the voltage signal V1 can be increased. As a result, the M responsiveness of the power control of the laser light LB

[0139] (Embodiment 3) FIG. 8 is a circuit diagram of the interface circuit for a photodiode according to Embodiment 3, and is different from the interface circuit IFCP for a photodiode of Embodiment 1 shown in FIG. 3 in the following points.

[0140] First, the cathode of the photodiode PD is connected to the first reference voltage terminal +V CC via the connector CNT and the first resistor R1. The point that the cathode of the photodiode PD is fixed at a positive voltage is the same as that of the interface circuit IFCP for a photodiode shown in Embodiment 2.

[0141] Also, the anode of the photodiode PD is connected to the second input terminal IN2 via the connector CNT.

[0142] Also, in the interface circuit IFCP shown in FIG. 8, a second operational amplifier OA2 is provided at the subsequent stage of the first operational amplifier OA1. The second operational amplifier OA2 has a third input terminal IN3, a fourth input terminal IN4, and a second output terminal OUT2.

[0143] The first output terminal OUT1 of the first operational amplifier OA1 is connected to the third input terminal IN3 of the second operational amplifier OA2 via a third resistor R3 (resistance value: R3). In other words, the voltage signal V1 output from the first output terminal OUT1 is input to the third input terminal IN3, which is the non-inverting input terminal of the second operational amplifier OA2, via the third resistor R3. The second operational amplifier OA2 converts the amplitude of the voltage signal V1 and outputs a voltage signal V2 (hereinafter sometimes referred to as the second voltage signal V2).

[0144] The transmission path of the second voltage signal V2 output from the second output terminal OUT2 of the second operational amplifier OA2 branches into two paths. One path is connected to the first external output terminal EOUT1, and the other path is connected to the second external output terminal EOUT2. The second voltage signal V2 output from the first external output terminal EOUT1 is used to monitor the power of the laser beam LBM or the laser beam LB. The second voltage signal V2 output from the second external output terminal EOUT2 is used to detect the power abnormality of the laser beam LB M or to detect the abnormality of the unit to which the photodiode interface circuit IFCP is attached. It is also used to detect internal defects of the photodiode interface circuit IFCP.

[0145] Also, the photodiode interface circuit IFCP shown in FIG. 8 includes a third noise filter NF3, and the third noise filter NF3 electrically connects the third input terminal IN3 and the second output terminal OUT2 of the second operational amplifier OA2.

[0146] The third noise filter NF3 is composed of a sixth potentiometer DP6, a third capacitor C3 connected in parallel with the sixth potentiometer DP6, and a first processor CPU1. The first processor CPU1 controls the cut-off frequency of the third noise filter NF3 by controlling the resistance value of the sixth potentiometer DP6.

[0147] If the capacitance value of the third capacitor C3 is C as described above, the cutoff frequency f co3 satisfies the relationship shown in equation (7).

[0148] f co3 =1 / (2πCZ6) (7) Here, Z6 is the resistance value of the sixth potentiometer DP6.

[0149] The cutoff frequency f of the third noise filter NF3 co3 By making is variable, it is possible to appropriately adjust the response speed of the second voltage signal V2 and the frequency band of noise to be cut.

[0150] A second offset adjustment circuit OAC2 is connected to a fourth input terminal IN4 of the second operational amplifier OA2. The second offset adjustment circuit OAC2 is composed of a seventh potentiometer DP7 and a first processor CPU1.

[0151] The seventh potentiometer DP7 is connected to the first reference voltage terminal +V CC and the second reference voltage terminal -V CC and a fourth input terminal IN4. The first processor CPU1 adjusts the voltage input to the fourth input terminal IN4, which is a non-inverting input terminal, by controlling the resistance value of the seventh potentiometer DP7.

[0152] In the second offset adjustment circuit OAC2, the first processor CPU1 adjusts the resistance value of the seventh potentiometer DP7, thereby canceling the offset voltage caused by the dark current of the photodiode PD and enabling the current signal I of the photodiode PD to be correctly detected. Also, the offset voltage caused by the above-mentioned stray light can be canceled and the current signal I of the photodiode PD can be correctly detected.

[0153] In addition, in the photodiode interface circuit IFCP of this embodiment shown in FIG. 8, the voltage follower VF shown in FIG. 3 is omitted.

[0154] In addition, in this embodiment, unlike the first embodiment, the anode of the photodiode PD is electrically connected to the first input terminal IN1 of the first operational amplifier OA1. Therefore, the voltage signal V1 output from the first output terminal OUT1 has a different polarity from the voltage signal V in the first embodiment. In other words, when the first potentiometer DP1 is connected to the first input terminal IN1 and the first output terminal OUT1, the voltage signal V1 output from the first output terminal OUT1 satisfies the relationship shown in formula (8). When the second potentiometer DP2 is connected to the first input terminal IN1 and the first output terminal OUT1, the voltage signal V1 satisfies the relationship shown in formula (9).

[0155] V1=-I×Z1 (8) V1=-I×Z2 (9) Moreover, the second voltage signal V2 output from the second output terminal OUT2 of the second operational amplifier OA2 satisfies the relationship shown in equation (10).

[0156] V2 = V1 × (Z6 / R3) (10) In the second operational amplifier OA2, the polarity of the output signal is inverted from the polarity of the input signal. Therefore, the polarity of the second voltage signal V2 is inverted from the polarity of the voltage signal V1. In other words, the second voltage signal V2, which has the same polarity as the voltage signal V in the first embodiment, is output to the first external output terminal EOUT1 and the second external output terminal EOUT2.

[0157] According to this embodiment, a second operational amplifier OA2 is provided at the subsequent stage of the first operational amplifier OA1. In other words, when converting the current signal I output from the photodiode PD into the second voltage signal V2, a two-stage non-inverting amplifier circuit is used. By doing so, the amplification factor of the second voltage signal V2 with respect to the current signal I can be finely adjusted. For example, in the first operational amplifier OA1 or the second operational amplifier OA2, if the input bias current is large, the accuracy of the output signal will decrease. In such a case, the amplification factor of the operational amplifier with a large input bias current is decreased, and the amplification factor of the remaining operational amplifier is increased. Also, when the resistance value of the resistor connected in parallel to the photodiode PD is low, the accuracy of the output signal will decrease. In such a case, the amplification factor of the first operational amplifier OA1 is decreased, and the amplification factor of the second operational amplifier OA2 is increased.

[0158] Also, when converting the current signal I into the second voltage signal V2, if a single-stage amplifier circuit is used, not only the voltage signal V1 but also the noise component superimposed on the current signal I will be amplified at the same amplification factor. In such a case, the amplification factor of the first operational amplifier OA1 is decreased, and the amplification factor of the second operational amplifier OA2 connected in parallel with the third noise filter NF3 is increased. By doing so, it is possible to obtain the second voltage signal V2 with a sufficient amplitude while suppressing the noise component included in the second voltage signal V2.

[0159] Also, according to this embodiment, the same effects as those achieved by the configuration shown in Embodiment 1 can be achieved. That is, the circuit specifications of the photodiode interface circuit IFCP can be made common. As a result, there is no need to individually design the photodiode interface circuit IFCP according to the unit to which the photodiode interface circuit IFCP is attached or the type of light received by the photodiode PD, and the design cost can be reduced.

[0160] In addition, the magnitude of the voltage signal V1 output from the first operational amplifier OA1 can be made variable, and the same specification photo diode interface circuit IFCP can be used even when the interface unit IFU or the unit to which it is attached is replaced or the model is changed. Further, by making the magnitude of the voltage signal V1 output from the first operational amplifier OA1 variable within a predetermined range, the detection accuracy of the light received by the photo diode PD can be improved.

[0161] Also, according to the present embodiment, the same effects as those achieved by the configuration shown in Embodiment 2 can be achieved. That is, the photo diode PD is brought into a depleted state, and light is made to be incident on the photo diode PD in this state. By doing so, the capacitance of the photo diode PD can be reduced, and the response speed of the photo diode PD when the incident light amount changes, that is, the response speed of the current signal I, and thus the second voltage signal V2, can be increased. As a result, M the responsiveness of the power control of the laser beam LB or the laser beam LB can be enhanced. Also, abnormalities in the units and internal components of the laser processing apparatus 100 can be reliably detected.

[0162] (Embodiment 4) FIG. 9 is a circuit diagram of the photo diode interface circuit according to Embodiment 4, and is different from the photo diode interface circuit IFCP of Embodiment 1 shown in FIG. 3 in the following points.

[0163] First, the second potentiometer DP2 is connected in series to the first potentiometer DP1. Also, the first potentiometer DP1 and the second potentiometer DP2 are electrically connected to the first input terminal IN1 and the first output terminal OUT1 of the first operational amplifier OA1.

[0164] Also, the switching switch SW is omitted. The first processor CPU1 controls so that the resistance value of either one of the first potentiometer DP1 and the second potentiometer DP2 becomes zero according to the magnitude of the current signal I.

[0165] According to this embodiment, the same effects as those achieved by the configuration shown in Embodiment 1 can be achieved. That is, the combined resistance value of the first potentiometer DP1 and the second potentiometer DP2, which are the feedback resistors of the inverting amplifier circuit, can be changed simply and with high precision. As a result, even when the magnitude of the current signal I varies greatly, the magnitude of the feedback signal to the control unit 50 and the threshold value of the voltage signal V that generates an alert signal or an error signal can be made constant. This simplifies the control of each unit of the laser processing apparatus 100 by the control unit 50.

[0166] In addition, the circuit specifications of the photodiode interface circuit IFCP can be made common. As a result, there is no need to individually design the photodiode interface circuit IFCP according to the unit to which the photodiode interface circuit IFCP is attached or the type of light received by the photodiode PD, and the design cost can be reduced.

[0167] Moreover, since the switching switch SW can be omitted, the number of components mounted on the photodiode interface circuit IFCP can be reduced. As a result, the photodiode interface circuit IFCP can be miniaturized and its cost can be reduced.

[0168] (Other Embodiments) It is also possible to combine the components shown in Embodiments 1 to 4 as appropriate to form a new embodiment. For example, the connection relationship between the first potentiometer DP1, the second potentiometer DP2, and the first operational amplifier OA1 shown in Embodiment 4 may be applied to the photodiode interface circuit IFCP shown in Embodiments 2 and 3. In this case, the switching switch SW is omitted. Further, the first processor CPU1 controls either the first potentiometer DP1 or the second potentiometer DP2 so that the resistance value of one of them becomes zero according to the magnitude of the current signal I.

[0169] Note that since the first to seventh potentiometers DP1 to DP7 are directly or indirectly controlled by the first processor CPU1, they are also referred to as the first to seventh digital potentiometers DP1 to DP7.

[0170] In addition, a processor other than the first processor CPU1 may be provided in the photodiode interface circuit IFCP.

[0171] Also, in Embodiments 1 to 3, the switching switch SW may be an n-pole switch (n is an integer of 3 or more). In this case, (n - 1) digital potentiometers are arranged in parallel between the first input terminal IN1 and the first output terminal OUT1 of the first operational amplifier OA1. The first processor CPU1 is connected to each of the (n - 1) digital potentiometers. Also, the variable resistance ranges of the (n - 1) digital potentiometers are different from each other.

[0172] By doing so, the resistance value of the feedback resistor that determines the gain of the first operational amplifier OA1 can be changed simply, with high precision, and in multiple steps.

[0173] Similarly, in Embodiment 4, m digital potentiometers may be connected in series (m is an integer of 2 or more), and these may be connected to the first input terminal IN1 and the first output terminal OUT1 of the first operational amplifier OA1. In this case, the variable resistance ranges of the m digital potentiometers are different from each other. Also, the first processor CPU1 is connected to each of the m digital potentiometers. The first processor CPU1 controls the resistance values of the (m - 1) digital potentiometers other than the desired digital potentiometer among the m digital potentiometers to be zero according to the magnitude of the current signal I.

[0174] By doing so, the resistance value of the feedback resistor that determines the gain of the first operational amplifier OA1 can be changed simply, with high precision, and in multiple steps.

[0175] Also, the interface circuit IFCP for the photodiode may have one or more processors other than the first processor CPU1.

[0176] For example, a processor that controls the operation of the switching switch SW may be provided separately from the first processor CPU1. Also, in order to control the resistance values of the first to seventh digital potentiometers DP1 to DP7, a plurality of processors may be provided in the interface circuit IFCP for the photodiode.

[0177] When a plurality of processors are provided in the interface circuit IFCP for the photodiode in this way, in the setting parameter table shown in FIG. 6, the number of the corresponding processor etc. may be associated with the parameter ID.

[0178] Also, the interface circuit IFCP for the photodiode is not particularly limited to the configurations shown in Embodiments 1 to 4. For example, a capacitor may be connected in parallel to each of the first potentiometer DP1 and the second potentiometer DP2 shown in FIG. 3. By doing so, a noise filter is configured by the first potentiometer DP1 and the capacitor, and the second potentiometer DP2 and the capacitor. Also, since the resistance values of the first potentiometer DP1 and the second potentiometer DP2 are variable respectively, the cut-off frequency of the noise filter including these can also be made variable. Thereby, the response speed of the voltage signal V and the frequency band of the noise to be cut can be appropriately adjusted. In this case, the first noise filter NF1 and the second noise filter NF2 may be omitted.

[0179] Similarly, a capacitor may be connected in parallel to each of the first potentiometer DP1 and the second potentiometer DP2 shown in FIGS. 7 and 8. By doing so, the cut-off frequency of the noise filter including these can be made variable, and the response speed of the voltage signal V1 and the frequency band of the noise to be cut can be appropriately adjusted.

[0180] Similarly, a capacitor may be connected in parallel to the series connection of the first potentiometer DP1 and the second potentiometer DP2 shown in Fig. 9. In this way, the cutoff frequency of the noise filter including these can be made variable, and the response speed of the voltage signal V1 and the frequency band of noise to be cut can be appropriately adjusted. [Industrial Applicability]

[0181] The photodiode interface circuit of the present disclosure can standardize circuit specifications when processing signals output from multiple photodiodes, and is useful when applied to, for example, laser processing devices. [Explanation of symbols]

[0182] 10, 11-14 Laser module 20 Beam combiner 30 Condenser optical unit 40 cabinets 50 Control Unit 60 power supply 70 Optical Fiber 80 laser head 100 Laser processing equipment C1~C3 1st to 3rd capacitors CNT Connector CPU1 First processor CPU2 Second processor DP1~DP7 1st to 7th potentiometers (1st to 7th digital potentiometers) EOUT1 First external output terminal EOUT2 Second external output terminal IFCH, IFCT interface circuit IFCP Photodiode Interface Circuit IFCP1 to IFCP4 Photodiode interface circuits IFU Interface Unit NF1~NF3 1st~3rd noise filters OA1 First operational amplifier IN1 First input terminal IN2 Second input terminal OUT1 First output terminal OA2 Second operational amplifier IN3 Third input terminal IN4 Fourth input terminal OUT2 Second output terminal OA3 Third operational amplifier OAC1 First offset adjustment circuit OAC2 Second offset adjustment circuit PD Photodiode R1~R3 First to third resistors SW Switch W Workpiece

Claims

1. a first operational amplifier; a switching switch; a first processor for controlling the operation of the switching switch; at least a first potentiometer and a second potentiometer connected to the switching switch; the first operational amplifier has at least a first input terminal, a second input terminal, and a first output terminal, converts a current signal output from a photodiode into a voltage signal, and outputs the voltage signal; the variable resistance range of the first potentiometer is larger than the variable resistance range of the second potentiometer; the first processor operates the switching switch so that only one of the first potentiometer and the second potentiometer electrically connects the first input terminal and the first output terminal according to the magnitude of the current signal, and is characterized by a photodiode interface circuit.

2. In the photodiode interface circuit according to Claim 1, the first potentiometer and the second potentiometer are respectively connected to the first processor, the first processor controls the respective resistance values of the first potentiometer and the second potentiometer, and is characterized by a photodiode interface circuit.

3. In the photodiode interface circuit according to Claim 1, when the magnitude of the current signal exceeds a first predetermined value, the first processor operates the switching switch so that the second potentiometer electrically connects the first input terminal and the first output terminal, and is characterized by a photodiode interface circuit.

4. In the photodiode interface circuit according to Claim 1, a first offset adjustment circuit is connected to the second input terminal, the first offset adjustment circuit is composed of a third potentiometer and the first processor, the third potentiometer is connected to a first reference voltage terminal, a second reference voltage terminal, and the second input terminal, the first processor adjusts the voltage input to the second input terminal by controlling the resistance value of the third potentiometer, and is characterized by a photodiode interface circuit.

5. In the photodiode interface circuit according to Claim 1, The transmission path of the voltage signal output from the first output terminal is branched into two paths. One of the branched transmission paths is connected to a first external output terminal. The other transmission path is connected to a second external output terminal, and a photodiode interface circuit is characterized in that.

6. In the photodiode interface circuit according to claim 5. The voltage signal transmitted through one of the transmission paths is output to the first external output terminal through a first noise filter inserted in series with one of the transmission paths. The voltage signal transmitted through the other transmission path is output to the second external output terminal through a second noise filter inserted in series with the other transmission path. The first noise filter is composed of a fourth potentiometer, a first capacitor connected in parallel with the fourth potentiometer, and the first processor. The first processor controls the cut-off frequency of the first noise filter by controlling the resistance value of the fourth potentiometer. The second noise filter is composed of a fifth potentiometer, a second capacitor connected in parallel with the fifth potentiometer, and the first processor. The first processor controls the cut-off frequency of the second noise filter by controlling the resistance value of the fifth potentiometer, and a photodiode interface circuit is characterized in that.

7. In the photodiode interface circuit according to claim 1. The current signal output from the photodiode with its cathode fixed at a certain voltage is input to the first operational amplifier, and a photodiode interface circuit is characterized in that.

8. In the photodiode interface circuit according to claim 7. The anode of the photodiode is electrically connected to the second input terminal, and a photodiode interface circuit is characterized in that.

9. In the photodiode interface circuit according to claim 7. It further includes a second operational amplifier. The second operational amplifier has a third input terminal, a fourth input terminal, and a second output terminal, and converts the amplitude of the voltage signal input from the first output terminal to output a second voltage signal, and a photodiode interface circuit is characterized in that.

10. In the photodiode interface circuit according to claim 9. The transmission path of the voltage signal output from the second output terminal is branched into two paths. One of the branched transmission paths is connected to the first external output terminal. The other transmission path is connected to the second external output terminal. A photodiode interface circuit characterized by this.

11. In the photodiode interface circuit according to claim 9, It further includes a third noise filter that electrically connects the third input terminal and the second output terminal. The third noise filter is composed of a sixth potentiometer, a third capacitor connected in parallel to the sixth potentiometer, and the first processor. The first processor controls the cut-off frequency of the third noise filter by controlling the resistance value of the sixth potentiometer. A photodiode interface circuit characterized by this.

12. In the photodiode interface circuit according to claim 9, A second offset adjustment circuit is connected to the fourth input terminal. The second offset adjustment circuit is composed of a seventh potentiometer and the first processor. The seventh potentiometer is connected to the first reference voltage terminal, the second reference voltage terminal, and the fourth input terminal. The first processor controls the voltage input to the fourth input terminal by controlling the resistance value of the seventh potentiometer. A photodiode interface circuit characterized by this.

13. In the photodiode interface circuit according to claim 1, The variable resistance range of the first potentiometer is 0 kΩ or more and 10 MΩ or less. The variable resistance range of the second potentiometer is 0 kΩ or more and 10 kΩ or less. A photodiode interface circuit characterized by this.

14. In the photodiode interface circuit according to claim 13, The variable resistance range of the first potentiometer is 10 kΩ or more and 10 MΩ or less. The variable resistance range of the second potentiometer is 100 Ω or more and 10 kΩ or less. A photodiode interface circuit characterized by this.

15. In the photodiode interface circuit according to claim 2, When the magnitude of the voltage signal exceeds a predetermined threshold value, The first processor controls so that the resistance values of the first potentiometer and the second potentiometer each become zero, and is a photodiode interface circuit.

16. An interface unit having a plurality of interface circuits, wherein at least one of the plurality of interface circuits is a photodiode interface circuit according to any one of Claims 1 to 4, 7 to 9, and 11 to 15.

17. An interface unit having a plurality of interface circuits, wherein at least one of the plurality of interface circuits is a photodiode interface circuit according to any one of Claims 5, 6, and 10.

18. One or more laser modules, a power supply that supplies power to the laser module, an optical fiber that guides the laser light emitted from the laser module, a condensing optical unit that is connected to one end of the optical fiber and makes the laser light enter the optical fiber, a laser head that is connected to the other end of the optical fiber, receives the laser light guided by the optical fiber, and irradiates the workpiece, and at least a control unit that controls the operation of at least the power supply, wherein the interface unit according to Claim 16 is attached to the laser module, the condensing optical unit, and the laser head, and the control unit controls the operation of the power supply based on the voltage signal output from the interface unit.

19. One or more laser modules, a power supply that supplies power to the laser module, an optical fiber that guides the laser light emitted from the laser module, a condensing optical unit that is connected to one end of the optical fiber and makes the laser light enter the optical fiber, a laser head that is connected to the other end of the optical fiber, receives the laser light guided by the optical fiber, and irradiates the workpiece, and at least a control unit that controls the operation of at least the power supply, wherein the interface unit according to Claim 17 is attached to the laser module, the condensing optical unit, and the laser head, Based on the voltage signal output from the first external output terminal, the control unit controls the output of the laser light, and based on the voltage signal output from the second external output terminal, stops the emission of the laser light from the laser module. A laser processing apparatus characterized by this.

20. In the laser processing apparatus according to claim 19, the second external output terminal is connected to a second processor, when the magnitude of the voltage signal output from the second external output terminal exceeds a predetermined threshold value, the second processor outputs an error signal, and based on the error signal, the control unit stops the emission of the laser light from the laser module. A laser processing apparatus characterized by this.

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