Liquid crystal panel and display device

Abstract

To provide: a liquid crystal panel in which signal delays are suppressed; and a display device equipped with the liquid crystal panel.SOLUTION: Provided is a liquid crystal panel comprising: a display region; and a frame region disposed in a surrounding of the display region. The liquid crystal panel further includes: a first substrate; a second substrate disposed facing the first substrate; and a liquid crystal layer and a plurality of spacers both located between the first and the second substrates and disposed in the display region. The first substrate or the second substrate has frame wiring disposed in the frame region. The first substrate includes: a transparent conductive layer; and metal wiring provided extending from the frame wiring toward the display region and electrically connected to the transparent conductive layer in a region not overlapping the plurality of spacers in a plan view.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The following disclosure relates to a liquid crystal panel and a display device.

Background Art

[0002] Conventionally, as an example of a liquid crystal panel, an image display panel described in Patent Document 1 below is known. The image display panel described in Patent Document 1 is an image display panel in which a large number of pixels are arranged, and the partitioning pattern for partitioning the pixels is composed of a large number of boundary line segments that extend between two branch points and define the pixels. The average value N of the number of boundary line segments extending from one branch point satisfies 3.0 ≤ N < 4.0, and it has a configuration that includes a region where there is no direction having a repetition period in the pixel arrangement.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In one of the three-dimensional display methods, in a display device in which two liquid crystal panels are stacked, left-eye and right-eye images are alternately displayed on the back-side liquid crystal panel (image display panel), the polarization state of each image is controlled by the liquid crystal panel on the observation surface side, and a method of separating and visually recognizing the left-eye and right-eye images using polarized glasses has been proposed. Since the liquid crystal panel on the observation surface side functions as a so-called active retarder, it is also called an active retarder panel. In this way, a display device that gives a sense of depth by delivering different images to the left eye and the right eye in a time-division manner is also referred to as an active retarder type three-dimensional display device.

[0005] FIG. 12 is a schematic plan view showing the configuration of a conventional active retarder panel. The active retarder panel includes, for example, a liquid crystal layer and a pair of electrodes (pixel electrodes and common electrodes) for applying a voltage to the liquid crystal layer. The pixel electrodes and the common electrodes are formed of transparent electrodes having relatively high resistance. The pixel electrodes (segment electrodes) or the common electrodes (COM electrodes) included in the active retarder panel 11R shown in FIG. 12 are divided into sizes that depend on the number of divisions, for example, one fraction of the number of display areas 1AA. Specifically, as shown in FIG. 12, the pixel electrodes or the common electrodes are divided into a first segment 1S, a second segment 2S, a third segment 3S, and a fourth segment 4S.

[0006] It is possible to arrange a frame wiring 100NL, which is a low-resistance metal wiring, in the frame region 1NA of the active retarder panel 11R. Therefore, in the region located near the outer periphery within the display area 1AA, signals are quickly supplied from the frame wiring 100NL to the transparent electrodes (pixel electrodes and common electrodes). However, in a place far from the frame wiring 100NL (near the center of the display area 1AA), signals can only be input via the transparent electrodes (pixel electrodes, common electrodes) with high resistance as described above, and delays are likely to occur.

[0007] Furthermore, when the number of pixel divisions is 3 or more, there will inevitably be pixels where the contacts with the outer peripheral frame wiring 100NL are limited to two sides. In such cases, delays occur more significantly. For example, when the number of pixel divisions is 4 (4-segment division), as shown in FIG. 12, the first segment 1S and the fourth segment 4S are supplied with signals from three sides, but the second segment 2S and the third segment 3S are only supplied with signals from two sides. In the first segment 1S and the fourth segment 4S, the frame wiring 100NL is close even in the central part, so the delay is small, but in the central part of the second segment 2S and the third segment 3S, the frame wiring 100NL is far away and signal input delays are likely to occur.

[0008] Thus, in the active retarder panel 11R, signal delay may occur, such as the signal input to the pixel electrode being delayed, or the potential fluctuated by the noise generated in the common electrode taking time to return to the original potential.

[0009] The above Patent Document 1 does not disclose a liquid crystal panel with suppressed signal delay.

[0010] The present invention has been made in view of the above situation, and an object thereof is to provide a liquid crystal panel with suppressed signal delay and a display device including the liquid crystal panel.

Means for Solving the Problems

[0011] (1) One embodiment of the present invention includes a display area and a frame area provided around the display area, and includes a first substrate, a second substrate disposed to face the first substrate, a liquid crystal layer and a plurality of spacers disposed between the first substrate and the second substrate and provided in the display area. The first substrate or the second substrate has a frame wiring disposed in the frame area. The first substrate has a transparent conductive layer and a metal wiring extending from the frame wiring toward the display area and electrically connected to the transparent conductive layer in an area that does not overlap with the plurality of spacers in a plan view.

[0012] (2) Further, in an embodiment of the present invention, in addition to the configuration of (1) above, the first substrate or the second substrate includes a plurality of light-shielding portions disposed on the observation surface side of the metal wiring. The plurality of light-shielding portions include a plurality of light-shielding portions for connection portions disposed at positions overlapping a connection portion where the metal wiring is electrically connected to the transparent conductive layer in a plan view, and a plurality of light-shielding portions for spacers disposed at positions overlapping the plurality of spacers.

[0013] (3) Further, in a certain embodiment of the present invention, in addition to the configuration of (2) above, the metal wiring is provided in a mesh shape with at least a part of the region overlapping the plurality of light-shielding portions as an end point in a plan view, a liquid crystal panel.

[0014] (4) Further, in a certain embodiment of the present invention, in addition to the configuration of (2) above, the metal wiring is provided in a mesh shape with all of the regions overlapping the plurality of light-shielding portions as end points in a plan view, a liquid crystal panel.

[0015] (5) Further, in a certain embodiment of the present invention, in addition to the configuration of (2) above, the metal wiring is provided in a mesh shape with all of the regions overlapping the plurality of light-shielding portions for connection portions and a part of the regions overlapping the plurality of light-shielding portions for spacers as end points in a plan view, a liquid crystal panel.

[0016] (6) Further, in a certain embodiment of the present invention, in addition to the configuration of (2) above, the metal wiring is extended only in one direction with the region overlapping the plurality of light-shielding portions as an end point in a plan view, a liquid crystal panel.

[0017] (7) Further, in a certain embodiment of the present invention, in addition to the configuration of (2) or (6) above, the transparent conductive layer is divided into three or more segments along a first direction of the liquid crystal panel, and the metal wiring is extended along a second direction orthogonal to the first direction with the region overlapping the plurality of light-shielding portions as an end point in a plan view and is not extended in the first direction, a liquid crystal panel.

[0018] (8) Further, in a certain embodiment of the present invention, in addition to the configuration of (7) above, an angle θ formed between the metal wiring and the second direction is 45° or less, a liquid crystal panel.

[0019] (9) Further, in a certain embodiment of the present invention, in addition to the configuration of (2), (3), (4), (5), (6), (7) or (8) above, the plurality of light-shielding portions are randomly arranged, a liquid crystal panel.

[0020] (10) Further, in a certain embodiment of the present invention, in addition to the configuration of (1) above, in order from the back side toward the observation surface side, the second substrate, the liquid crystal layer and the plurality of spacers, and the first substrate are provided, and the metal wiring includes a plurality of connection metal portions that contact the transparent conductive layer, a plurality of spacer metal portions disposed at positions overlapping the plurality of spacers in plan view, and a wiring portion that connects the plurality of connection metal portions and the plurality of spacer metal portions to each other. A liquid crystal panel.

[0021] (11) Further, in a certain embodiment of the present invention, in addition to the configuration of (10) above, the wiring portion is provided in a mesh shape with at least a part of the plurality of connection metal portions and the plurality of spacer metal portions as endpoints. A liquid crystal panel.

[0022] (12) Further, in a certain embodiment of the present invention, in addition to the configuration of (10) or (11) above, the plurality of connection metal portions are randomly arranged. A liquid crystal panel.

[0023] (13) Further, in a certain embodiment of the present invention, in addition to the configuration of (10), (11) or (12) above, the plurality of spacer metal portions are randomly arranged. A liquid crystal panel.

[0024] (14) Further, in a certain embodiment of the present invention, in addition to the configuration of (1), (2), (3), (4), (5), (6), (7), (8), (9), (10), (11), (12) or (13) above, the transparent conductive layer is divided into three or more segments along one direction of the liquid crystal panel. A liquid crystal panel.

[0025] (15) Further, another embodiment of the present invention includes a liquid crystal panel according to any one of (1), (2), (3), (4), (5), (6), (7), (8), (9), (10), (11), (12), (13), and (14) above, an image display panel disposed on the back side of the liquid crystal panel, and a backlight disposed on the back side of the image display panel.

Effect of the Invention

[0026] According to the present invention, it is possible to provide a liquid crystal panel with suppressed signal delay and a display device including the liquid crystal panel.

Brief Description of the Drawings

[0027]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Embodiments for Carrying Out the Invention

[0028] Hereinafter, embodiments of the present invention will be described. The present invention is not limited to the content described in the following embodiments, and design changes can be appropriately made within the scope that satisfies the configuration of the present invention. In the following description, the same parts or parts having the same functions are commonly and appropriately used with the same reference numerals among different drawings, and the repeated description thereof is appropriately omitted. Each aspect of the present invention may be appropriately combined within the scope not departing from the gist of the present invention.

[0029] In this specification, the "observation surface side" refers to the side closer to the observer when the observer observes the liquid crystal panel (or display device), and is also referred to as the "front side". The "back side" refers to the side opposite to the observation surface side.

[0030] (Embodiment 1) FIG. 1 is a schematic cross-sectional view of a display device according to Embodiment 1. Embodiment 1 will be described with reference to FIGS. 1 to 7. In this embodiment, the display device 10 will be exemplified. Note that the X-axis, Y-axis, and Z-axis are shown in part of each drawing, and are drawn so that the directions of the respective axes are the directions shown in each drawing.

[0031] The display device 10 according to this embodiment is a type of 3D image display device that allows a user to visually recognize a 3D image (stereoscopic image), and an active retarder method is adopted. As shown in FIG. 1, the display device 10 includes a liquid crystal panel 11, an image display panel 12 disposed on the back side of the liquid crystal panel 11, and a backlight 13 disposed on the back side of the image display panel 12.

[0032] The image display panel 12 has a function of displaying an image.

[0033] The backlight 13 is an external light source that irradiates light for display to the image display panel 12. The backlight 13 includes a light source (such as an LED) that emits white light (white light), and an optical member that converts the light from the light source into planar light by imparting an optical effect to the light.

[0034] The liquid crystal panel 11 functions as a modulator for converting linearly polarized light emitted from the image display panel 12 into circularly polarized light. Specifically, the liquid crystal panel 11 can switch between right circularly polarized light and left circularly polarized light in synchronization with the image display panel 12 in which the right-eye image and the left-eye image are alternately displayed. That is, the liquid crystal panel 11 functions as an active retarder panel.

[0035] In the display device 10 of the present embodiment, circularly polarized glasses provided with a circularly polarized film whose rotation directions are reversed on the left and right are used in combination. The user can view a 3D image by viewing the display device 10 while wearing the above-described circularly polarized glasses. Thus, since the liquid crystal panel 11 is driven at high speed in synchronization with the display of the image display panel 12, it is required to suppress signal delay in the liquid crystal panel 11.

[0036] FIG. 2 is a schematic plan view of a liquid crystal panel according to Embodiment 1. FIG. 3 is an equivalent circuit diagram of the liquid crystal panel according to Embodiment 1. FIG. 4 is an enlarged schematic plan view of the region surrounded by a broken line in FIG. 2. FIG. 5 is an enlarged schematic plan view of the region surrounded by a one-dot chain line in FIG. 2. FIG. 6 is a schematic cross-sectional view taken along line A1-A2 in FIG. 5. FIG. 7 is a schematic cross-sectional view taken along line B1-B2 in FIG. 5.

[0037] As shown in FIGS. 2 to 7, the liquid crystal panel 11 of the present embodiment includes a display area 1AA and a frame area 1NA provided around the display area 1AA, and includes a first substrate 100, a second substrate 200 disposed opposite to the first substrate 100, and a liquid crystal layer 300 and a plurality of spacers 400 disposed between the first substrate 100 and the second substrate 200 and provided in the display area 1AA. The first substrate 100 or the second substrate 200 has a frame wiring 100NL disposed in the frame area 1NA. The first substrate 100 has a first transparent conductive layer 130 as the transparent conductive layer, and a metal wiring 100M that extends from the frame wiring 100NL toward the display area 1AA and is electrically connected to the first transparent conductive layer 130 in an area that does not overlap with the plurality of spacers 400 in plan view. In this way, by providing the metal wiring 100M that is electrically connected to the first transparent conductive layer 130 and the frame wiring 100NL, the effective surface resistance of the first transparent conductive layer 130 can be reduced, and signal delay can be suppressed. The metal wiring 100M can function as an auxiliary wiring.

[0038] Here, when the metal wiring is electrically connected to the first transparent conductive layer in an area that overlaps with the plurality of spacers in plan view, a part of the spacer for defining the cell thickness may enter the contact hole between the metal wiring and the first transparent conductive layer. As a result, the cell thickness in the display area may not be constant, and the display quality may deteriorate.

[0039] On the other hand, in the present embodiment, as described above, since the metal wiring 100M is electrically connected to the first transparent conductive layer 130 in an area that does not overlap with the plurality of spacers 400 in plan view, it is possible to suppress a change in the cell thickness in the display area 1AA, and it is possible to suppress a deterioration in the display quality.

[0040] Based on FIG. 3, the liquid crystal panel 11 of the present embodiment will be described in detail. When the metal wiring 100M is not arranged, there is a low-resistance frame wiring 100NL in the frame region 1NA, but only the first transparent conductive layer 130, which is a high-resistance transparent electrode, exists in the display region 1AA. In the case of the first segment 1S and the fourth segment 4S shown in FIG. 3, since there are low-resistance frame wirings 100NL on the upper and lower sides, it is easy to supply signals to the vicinity of the center on the left and right. However, in the second segment 2S and the third segment 3S, since there are no upper and lower sides, the signal input path has only a high-resistance path (the first transparent conductive layer 130), and signals are likely to be delayed. Therefore, in the liquid crystal panel 11 of the present embodiment, as shown by the broken line in FIG. 3, by providing the metal wiring 100M, which is a low-resistance signal propagation path, in parallel, it is possible to reduce the combined resistance. Hereinafter, the display device 10 of the present embodiment will be described in detail.

[0041] As shown in FIG. 2, the liquid crystal panel 11 of the present embodiment includes a display region 1AA and a frame region 1NA provided around the display region 1AA. The display region 1AA may be any region where the retardation can be controlled. The display region 1AA is a region where pixel electrodes to be described later are arranged. In the display region 1AA, the retardation of the liquid crystal layer 300 is controlled by changing the alignment state of the liquid crystal molecules according to the magnitude of the voltage applied to the liquid crystal layer 300.

[0042] As shown in FIGS. 6 and 7, the liquid crystal panel 11 of the present embodiment includes a first substrate 100, a second substrate 200 arranged to face the first substrate 100, a liquid crystal layer 300 and a plurality of spacers 400 sandwiched between the first substrate 100 and the second substrate 200 and provided in the display region 1AA. In the present embodiment, an example will be described in which the first substrate 100, the liquid crystal layer 300 and the plurality of spacers 400, and the second substrate 200 are arranged in this order from the back side toward the observation surface side. However, the second substrate 200, the liquid crystal layer 300 and the plurality of spacers 400, and the first substrate 100 may be arranged in this order from the back side toward the observation surface side.

[0043] As shown in FIGS. 2 to 4, the first substrate 100 or the second substrate 200 has a frame wiring 100NL disposed in a frame region 1NA. The frame wiring 100NL only needs to have conductivity. The frame wiring 100NL is electrically connected to the metal wiring 100M in the frame region 1NA. The frame wiring 100NL is the main wiring of the metal wiring 100M. The frame wiring 100NL is, for example, a source line, a gate line, a segment signal line, or a common signal line. The segment signal line is, for example, a wiring that is electrically connected to a pixel electrode and supplies a segment signal to the pixel electrode. The common signal line is, for example, a wiring that is electrically connected to a common electrode and supplies a common signal to the common electrode.

[0044] The frame wiring 100NL is preferably disposed on the first substrate 100. By adopting such an aspect, the frame wiring 100NL and the metal wiring 100M can be easily connected.

[0045] The frame wiring 100NL includes, for example, metals such as copper, titanium, aluminum, molybdenum, tungsten, or alloys thereof. The metal wiring 100M can be formed by depositing a metal such as copper, titanium, aluminum, molybdenum, tungsten, or an alloy thereof in a single layer or multiple layers by a sputtering method or the like, and then performing patterning by a photolithography method or the like.

[0046] The resistivity of the frame wiring 100NL is preferably -6 1.0×10 -4 Ω·cm or more and 3.0×10 -6 Ω·cm or less, more preferably 1.0×10 -5 Ω·cm or more and 3.0×10 -6 Ω·cm or less, and even more preferably 1.0×10 -6 Ω·cm or more and 3.0×10

[0047] The frame wiring 100NL preferably has a higher resistance than the metal wiring 100M. By adopting such an aspect, signal delay can be effectively reduced.

[0048] The first substrate 100 or the second substrate 200 includes a plurality of light-shielding portions 200S disposed on the observation surface side rather than the metal wiring 100M. The plurality of light-shielding portions 200S include a plurality of light-shielding portions 200S1 for connection portions disposed at positions overlapping the connection portion 100T where the metal wiring 100M is electrically connected to the first transparent conductive layer 130 in a plan view, and a plurality of light-shielding portions 200S2 disposed at positions overlapping the plurality of spacers 400. By adopting such an aspect, it becomes possible to shield regions where the liquid crystal alignment is likely to be disturbed (specifically, the connection portion between the metal wiring 100M and the first transparent conductive layer 130, and the periphery of the spacer 400), so that the display performance can be improved.

[0049] In the present embodiment, an aspect will be described in which the liquid crystal panel 11 includes, in order from the back side toward the observation surface side, a first substrate 100, a liquid crystal layer 300 and a plurality of spacers 400, and a second substrate 200, and the second substrate 200 includes a plurality of light-shielding portions 200S.

[0050] As shown in FIGS. 6 and 7, the first substrate 100 includes, in order toward the liquid crystal layer 300 side, a first support substrate 110, a metal wiring 100M, a first insulating layer 120, and a first transparent conductive layer 130. The second substrate 200 includes, in order toward the liquid crystal layer 300 side, a second support substrate 210, a plurality of light-shielding portions 200S, a second insulating layer 220, and a second transparent conductive layer 230. In the present specification, "transparent" means that the total light transmittance is 90% or more and 100% or less. In the present specification, "transparent" preferably means that the total light transmittance is 95% or more and 100% or less, and more preferably, the total light transmittance is 98% or more and 100% or less. The total light transmittance is determined according to JIS K7361-1.

[0051] One of the first transparent conductive layer 130 and the second transparent conductive layer 230 is a pixel electrode, and the other is a common electrode. In the liquid crystal panel 11 of this embodiment, one of the first substrate 100 and the second substrate 200 has a pixel electrode, and the other has a common electrode. A vertical electric field is applied to the liquid crystal layer 300 sandwiched between the pixel electrode and the common electrode to perform display. It is a vertical electric field type liquid crystal panel. As the vertical electric field type, there is a vertical alignment (VA) mode in which liquid crystal molecules in the liquid crystal layer are aligned perpendicular to the substrate surface when no voltage is applied.

[0052] In this embodiment, the mode in which the second transparent conductive layer 230 is disposed on the second substrate 200 will be described. However, the second transparent conductive layer 230 may be disposed on the first substrate 100. In this case, the liquid crystal panel 11 is a horizontal electric field type liquid crystal panel that performs display by applying a horizontal electric field to the liquid crystal layer 300. As the horizontal electric field type, there are a fringe field switching (FFS) mode and an in-plane switching (IPS) mode in which liquid crystal molecules in the liquid crystal layer are aligned parallel to the substrate surface when no voltage is applied.

[0053] The first substrate 100 or the second substrate 200 includes, in the display region 1AA, a plurality of gate lines extending in parallel with each other, for example, on a support substrate (the first support substrate 110 or the second support substrate 210), and a plurality of source lines extending in parallel with each other in a direction intersecting each gate line via an insulating film. The plurality of gate lines and the plurality of source lines are formed in a grid pattern as a whole so as to partition each pixel. For example, a thin film transistor (TFT) as a switching element is disposed at the intersection of each source line and each gate line.

[0054] The pixel electrode is, for example, an electrode disposed in each region surrounded by two source lines adjacent to each other and two gate lines adjacent to each other. For example, the pixel electrode is set to a potential corresponding to a data signal supplied through a corresponding TFT. The common electrode is an electrode formed substantially on one surface except for specific portions such as the connection portion between the pixel electrode and the drain electrode, regardless of the boundaries of the pixels. A common signal maintained at a constant value is supplied to the common electrode, and the common electrode is maintained at a constant potential.

[0055] An alignment film having a function of controlling the alignment of liquid crystal molecules included in the liquid crystal layer 300 is disposed between the first substrate 100 and the liquid crystal layer 300 and between the second substrate 200 and the liquid crystal layer 300, respectively. In a voltage non-applied state where no voltage is applied between the pixel electrode and the common electrode, the liquid crystal molecules included in the liquid crystal layer 300 are aligned substantially perpendicular to the main surfaces of each of the pair of substrates.

[0056] For example, the liquid crystal panel 11 further includes a source driver electrically connected to the source line, a gate driver electrically connected to the gate line, and a controller. The gate driver sequentially supplies a scanning signal to the gate line based on the control by the controller. The source driver supplies a data signal to the source line based on the control by the controller at a timing when the TFT is in a voltage-applied state by the scanning signal. Each pixel electrode is set to a potential corresponding to a data signal supplied through a corresponding TFT, and a vertical electric field is generated between the pixel electrode and the common electrode, and the alignment of the liquid crystal molecules in the liquid crystal layer is controlled. Then, in the liquid crystal panel 11, in each pixel (the first segment 1S, the second segment 2S, the third segment 3S, and the fourth segment 4S), the light transmittance in the liquid crystal layer 300 is adjusted by changing the alignment state of the liquid crystal molecules according to the magnitude of the voltage applied to the liquid crystal layer 300.

[0057] Note that the liquid crystal panel 11 according to the present embodiment does not include gate lines, source lines, TFTs as switching elements, source drivers, gate drivers, and controllers, and instead may include segment signal lines and common signal lines. In this case, a segment signal is supplied to the pixel electrode from a driving circuit outside the panel through the segment signal line, and the pixel electrode is set to a potential corresponding to the segment signal. Similarly, a common signal is supplied from a driving circuit outside the panel to the common electrode through the common signal line, and the common electrode is set to a potential corresponding to the common signal. Thereby, a vertical electric field is generated between the pixel electrode and the common electrode, and the alignment of liquid crystal molecules in the liquid crystal layer is controlled. In the liquid crystal panel 11, in each pixel (the first segment 1S, the second segment 2S, the third segment 3S, and the fourth segment 4S), the polarization state of light passing through the liquid crystal layer 300 is adjusted by changing the alignment state of the liquid crystal molecules according to the magnitude of the voltage applied to the liquid crystal layer 300.

[0058] Examples of the first support substrate 110 and the second support substrate 210 include insulating substrates such as glass substrates and plastic substrates. Examples of the material of the glass substrate include glass such as float glass and soda glass. Examples of the material of the plastic substrate include plastics such as polyethylene terephthalate, polybutylene terephthalate, polyethersulfone, polycarbonate, and alicyclic polyolefin.

[0059] The metal wiring 100M extends from the frame wiring 100NL toward the display area 1AA and is electrically connected to the first transparent conductive layer 130 in a region that does not overlap with the plurality of spacers 400 in plan view. By adopting such a mode, in addition to the frame wiring 100NL, the metal wiring 100M can be additionally used as a wiring for inputting a signal to the first transparent conductive layer 130. Therefore, the effective surface resistance of the first transparent conductive layer 130 can be reduced, and signal delay can be suppressed. The metal wiring 100M is electrically connected to the frame wiring 100NL.

[0060] In addition, since the metal wiring 100M is electrically connected to the first transparent conductive layer 130 in a region that does not overlap with the plurality of spacers 400 in plan view, compared with the case where the metal wiring 100M is electrically connected to the first transparent conductive layer 130 in a region that overlaps with the plurality of spacers 400, it is possible to suppress a change in cell thickness within the display region 1AA, and it is possible to suppress a deterioration in display quality.

[0061] The liquid crystal panel 11 of the present embodiment has, for example, a low-resistance metal wiring 100M that sandwiches the first insulating layer 120 and contacts the first transparent conductive layer 130 via the contact hole 120CH. Thereby, the effective resistance value of the first transparent conductive layer 130 can be lowered, and signal delay can be reduced.

[0062] The first transparent conductive layer 130 preferably has a higher resistance than the metal wiring 100M. By adopting such an aspect, signal delay can be effectively reduced.

[0063] The resistivity of the metal wiring 100M is preferably 1.0×10 -6 Ω·cm or more and 3.0×10 -4 Ω·cm or less, more preferably 1.0×10 -6 Ω·cm or more and 3.0×10 -5 Ω·cm or less, and even more preferably 1.0×10 -6 Ω·cm or more and 3.0×10 -6 Ω·cm or less. By adopting such an aspect, signal delay can be effectively reduced.

[0064] In plan view, the metal wiring 100M is preferably provided in a mesh shape with at least a part of the region overlapping with the light-shielding portion 200S as an end point 100MS. By adopting such an aspect, signal delay can be effectively suppressed. The mesh shape means, for example, a structure in which the metal wiring 100M branches in three or more directions from each end point 100MS. The metal wiring 100M preferably has a structure that branches in three or more directions and seven or less directions from each end point 100MS, and more preferably has a structure that branches in four or more directions and six or less directions.

[0065] It is more preferable that the metal wiring 100M is provided in a mesh pattern with all regions overlapping a plurality of light-shielding portions 200S in plan view as end points 100MS. By adopting such a mode, signal delay can be suppressed more effectively. Note that the number of branches can be set independently at each end point 100MS. The number of branches may be the same at all end points 100MS, or the number of branches at at least some end points 100MS may be different from the number of branches at other end points.

[0066] When the first transparent conductive layer 130 is a pixel electrode, the metal wiring 100M has a function of supplying an image signal to the first transparent conductive layer 130. When the first transparent conductive layer 130 is a common electrode, the metal wiring 100M has a function of supplying a common signal to the first transparent conductive layer 130.

[0067] The metal wiring 100M contains, for example, metals such as copper, titanium, aluminum, molybdenum, tungsten, or alloys thereof. The metal wiring 100M can be formed by depositing a metal such as copper, titanium, aluminum, molybdenum, tungsten, or an alloy thereof in a single layer or multiple layers by a sputtering method or the like, and then performing patterning by a photolithography method or the like.

[0068] The width of the metal wiring 100M depends on the required values of the image size and driving speed, but is preferably, for example, 2 μm or more and 10 μm or less.

[0069] As the first insulating layer 120 and the second insulating layer 220, an inorganic insulating film, an organic insulating film, or a laminate of the organic insulating film and the inorganic insulating film can be used. As the inorganic insulating film, for example, an inorganic film such as silicon nitride (SiNx), silicon oxide (SiO2) (relative dielectric constant ε = 5 to 7), or a laminated film thereof can be used. As the organic insulating film, for example, an organic film with a small relative dielectric constant such as a photosensitive acrylic resin (relative dielectric constant ε = 2 to 5), or a laminated film thereof can be used.

[0070] The first insulating layer 120 is disposed on the liquid crystal layer 300 side of the metal wiring 100M. By adopting such an aspect, it becomes possible to flatten the surface of the first substrate 100 on the liquid crystal layer 300 side. When arranging a wiring (for example, the metal wiring 100M of the present embodiment) within the display region 1AA, the thickness of the wiring may affect the cell thickness. In the present embodiment, the metal wiring 100M is covered with the first insulating layer 120 having a planarizing effect, and the first transparent conductive layer 130 is provided on the first insulating layer 120, whereby the surface of the first substrate 100 on the liquid crystal layer 300 side can be flattened.

[0071] In the first insulating layer 120, contact holes 120CH are provided in a region that overlaps with a plurality of light-shielding portions 200S1 for connection portions in a plan view. By adopting such an aspect, the first transparent conductive layer 130 and the metal wiring 100M can be electrically connected in a region that overlaps with the light-shielding portion 200S1 for connection portions. The contact holes 120CH do not overlap with the spacers 400 in a plan view.

[0072] Here, since the hole structure of the contact hole 120CH where the first transparent conductive layer 130 and the metal wiring 100M are connected causes disturbance of the liquid crystal alignment, it is preferable to perform light shielding. As in the present embodiment, since the contact holes 120CH of the present embodiment are arranged in a region that overlaps with a plurality of light-shielding portions 200S1 for connection portions, the disturbance of the liquid crystal alignment caused by the contact holes 120CH becomes difficult to be visually recognized, and the display performance can be improved.

[0073] At least one of the first transparent conductive layer 130 and the second transparent conductive layer 230 is a transparent electrode. The first transparent conductive layer 130 and the second transparent conductive layer 230 include, for example, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), tin oxide (SnO), etc. The first transparent conductive layer 130 and the second transparent conductive layer 230 can be formed by depositing a transparent conductive material such as ITO, IZO, ZnO, SnO, or an alloy thereof in a single layer or multiple layers by a sputtering method or the like, and then performing patterning using a photolithography method.

[0074] The plurality of light-shielding portions 200S are formed of a material having a higher absorption rate than a reflectance with respect to external light L incident from the observation surface side. For example, it is preferable that the absorption rate with respect to external light L is 80% or more. Examples of the light-shielding portion 200S include a metal oxide film, a resin film, etc. Examples of the metal oxide film include a two-layer film of chromium (Cr) and chromium oxide (CrOx). Examples of the resin film include a black resist. As the black resist, a black photosensitive resin is preferable, and for example, a black photosensitive acrylic resin can be mentioned.

[0075] The plurality of light-shielding portions 200S are arranged, for example, in an island shape. The planar shape of the plurality of light-shielding portions 200S may be, for example, a polygonal shape, a circular shape, or an elliptical shape. The shapes of the plurality of light-shielding portions 200S may be the same or different from each other.

[0076] The plurality of light-shielding portions 200S are preferably arranged at positions where it is difficult to cause moiré with the light-shielding pattern of the image display panel 12 arranged on the back side. By adopting such a mode, it is possible to reduce the moiré generated by arranging the metal wiring 100M. If the plurality of light-shielding portions 200S are configured such that it is difficult to cause moiré with the light-shielding pattern of the image display panel 12, it is considered that the metal wiring 100M, which is the wiring connecting between the patterns of the plurality of light-shielding portions 200S, can also obtain an effect of hardly generating moiré. Note that the light-shielding pattern of the image display panel 12 is a light-shielding member that overlaps with a plurality of spacers included in the image display panel 12 in a plan view and is arranged on the observation surface side of the plurality of spacers included in the image display panel 12.

[0077] The plurality of light-shielding portions 200S are preferably arranged randomly, for example. By adopting such a mode, moiré can be suppressed. Here, when a plurality of members (for example, the plurality of light-shielding portions 200S) are arranged randomly, it means that in a plan view, in at least a part of the region of the liquid crystal panel 11, the plurality of members are arranged without periodicity. The plurality of members may be arranged randomly within the repetition period while having a repetition period, for example.

[0078] For convenience of manufacturing and work, it is difficult to realize that the plurality of members are arranged randomly (without any periodicity) in the entire region of the liquid crystal panel 11 in a plan view. For example, when using stepper exposure, periodicity may occur. In the present embodiment, a certain degree of periodicity is allowed, and if the plurality of members are arranged randomly within the period, it is considered to correspond to random arrangement.

[0079] Note that in the present embodiment, the random arrangement of the plurality of light-shielding portions 200S is taken as an example, but other arrangements may be used as long as moiré can be avoided.

[0080] The plurality of light-shielding portions 200S includes a plurality of light-shielding portions 200S1 for connection portions and a plurality of light-shielding portions 200S2 for spacers. The plurality of light-shielding portions 200S1 for connection portions and the plurality of light-shielding portions 200S2 for spacers are arranged in a mixed manner. The light-shielding portion 200S1 for connection portions and the light-shielding portion 200S2 for spacers each shield the contact hole 120CH and the spacer 400. Since the sizes of the contact hole 120CH and the spacer 400 and the widths of the light-shielding portions required for shielding them are different, it is preferable that the shapes of the light-shielding portion 200S1 for connection portions and the light-shielding portion 200S2 for spacers are different from each other.

[0081] When the shapes of the plurality of light-shielding portions 200S1 for connection portions and the shapes of the plurality of light-shielding portions 200S2 for spacers are different from each other, the plurality of light-shielding portions 200S1 for connection portions are arranged in a manner that can avoid moire or in a manner where the coarseness or fineness of the pattern arrangement is not visually recognized, and it is preferable that the plurality of light-shielding portions 200S2 for spacers are also arranged in a manner that can avoid moire or in a manner where the coarseness or fineness of the pattern arrangement is not visually recognized.

[0082] Each light-shielding portion 200S1 for connection portions preferably includes the corresponding contact hole 120CH in a plan view. By adopting such a mode, it is possible to effectively shield the region where the liquid crystal alignment is likely to be disturbed, so that the display performance can be further improved.

[0083] Each light-shielding portion 200S1 for connection portions preferably includes the corresponding contact hole 120CH in a plan view and has an area that is 1.1 times or more and 3 times or less the area of the contact hole 120CH, and more preferably has an area that is 1.5 times or more and 2.5 times or less the area of the contact hole 120CH. By adopting such a mode, it is possible to more effectively shield the region where the liquid crystal alignment is likely to be disturbed, so that the display performance can be further improved.

[0084] In plan view, it is preferable that each light-shielding portion 200S2 for a spacer includes the corresponding spacer 400. By adopting such an aspect, it becomes possible to effectively shield the region where the liquid crystal alignment is likely to be disturbed, so that the display performance can be further improved.

[0085] In plan view, it is preferable that each light-shielding portion 200S2 for a spacer includes the corresponding spacer 400 and has an area that is 1.1 times or more and 5 times or less the area of the spacer 400. More preferably, it includes the corresponding spacer 400 and has an area that is 1.2 times or more and 2 times or less the area of the spacer 400. By adopting such an aspect, it becomes possible to more effectively shield the region where the liquid crystal alignment is likely to be disturbed, so that the display performance can be further improved.

[0086] The liquid crystal layer 300 is disposed between the first substrate 100 and the second substrate 200 and is provided in the display region 1AA. The liquid crystal layer 300 contains a liquid crystal material, and by applying a voltage to the liquid crystal layer 300 and changing the alignment state of the liquid crystal molecules in the liquid crystal material according to the applied voltage, the light transmittance is controlled.

[0087] The liquid crystal molecules may have a positive value or a negative value for the dielectric anisotropy (Δε) defined by the following formula (L). The liquid crystal molecules of the present embodiment preferably have a negative dielectric anisotropy. Note that liquid crystal molecules having a positive dielectric anisotropy are also referred to as positive-type liquid crystals, and liquid crystal molecules having a negative dielectric anisotropy are also referred to as negative-type liquid crystals. Note that the long axis direction of the liquid crystal molecules is the direction of the slow axis. Further, the liquid crystal molecules are homogeneously aligned in a state where no voltage is applied (voltage-off state), and the direction of the long axis of the liquid crystal molecules in the voltage-off state is also referred to as the direction of the initial alignment of the liquid crystal molecules. Δε = (dielectric constant in the long axis direction of the liquid crystal molecules) - (dielectric constant in the short axis direction of the liquid crystal molecules) (L)

[0088] The plurality of spacers 400 are disposed between the first substrate 100 and the second substrate 200 and provided in the display area 1AA. The plurality of spacers 400 have a function of securing a gap in the space where the liquid crystal layer 300 is formed. That is, the plurality of spacers 400 have a function of maintaining the cell thickness (the thickness of the liquid crystal layer 300). Each spacer 400 has, for example, a columnar shape. The planar shape of each spacer 400 may be, for example, polygonal, circular, or elliptical. Note that the spacer is also referred to as a photo spacer, PS.

[0089] Each spacer 400 preferably contains, for example, a cured product of a photosensitive resin. Examples of the photosensitive resin include resins having an ultraviolet-reactive functional group.

[0090] The plurality of spacers 400 are preferably disposed at positions where it is difficult to cause moire with the light-shielding pattern of the image display panel 12 disposed on the back side.

[0091] The plurality of spacers 400 are preferably arranged randomly, for example. Note that although random arrangement is taken as an example in this embodiment, other arrangements may be used as long as moire can be avoided.

[0092] In FIGS. 6 and 7, the liquid crystal panel 11 includes, in order from the back side to the observation surface side, the first substrate 100, the liquid crystal layer 300 and the plurality of spacers 400, and the second substrate 200, and the second substrate 200 includes a plurality of light-shielding portions 200S. However, the arrangement of the plurality of light-shielding portions 200S is not limited to this. When the liquid crystal panel 11 includes, in order from the back side to the observation surface side, the second substrate 200, the liquid crystal layer 300 and the plurality of spacers 400, and the first substrate 100, for example, the first substrate 100 includes a plurality of light-shielding portions 200S. Specifically, the plurality of light-shielding portions 200S are disposed on the observation surface side of the metal wiring 100M in the first substrate 100.

[0093] The first transparent conductive layer 130 is divided into three or more segments along one direction of the liquid crystal panel 11 (or the first substrate 100). By adopting such an aspect, in the first transparent conductive layer 130, segments (the second segment 2S and the third segment 3S in FIG. 2) with fewer connection sides to the frame region 1NA than other segments are generated. When a signal is input from a signal line (frame wiring 100NL) disposed in the frame region 1NA to the first transparent conductive layer 130, signal delay may occur in segments with fewer connection sides to the frame region 1NA. However, since the liquid crystal panel 11 of the present embodiment includes the metal wiring 100M, it is possible to input a signal to segments with fewer connection sides to the frame region 1NA via the metal wiring 100M, and the signal delay can be effectively suppressed. Thus, the liquid crystal panel 11 of the present embodiment is particularly suitable when there are pixels in which the connection side between the signal line in the frame region 1NA and the first transparent conductive layer 130 becomes small due to the division of the first transparent conductive layer 130.

[0094] Next, the image display panel 12 will be described. The image display panel 12 preferably includes a plurality of pixels. The above-mentioned pixels are display units for performing image display, and when performing color display, for example, include pixels of red, blue, and green.

[0095] The image display panel 12 may have a TFT substrate on which a plurality of TFTs are disposed. The above-mentioned TFT substrate may include, on a support substrate, a plurality of gate lines extending parallel to each other and a plurality of source lines extending parallel to each other in a direction intersecting each gate line via a gate insulating film. The plurality of gate lines and the plurality of source lines may be formed in a grid pattern in a plan view, and each region partitioned by the plurality of gate lines and the plurality of source lines corresponds to a pixel.

[0096] The support substrate is preferably a transparent substrate, and examples thereof include a glass substrate and a plastic substrate.

[0097] At the intersection of each gate line and each source line, a TFT as a switching element may be arranged for each pixel. The gate terminal of the TFT may be connected to the gate line, the source terminal may be connected to the source line, and the drain terminal may be connected to the pixel electrode. The image display panel 12 may have a common electrode to which a common electrode voltage is applied, in addition to the pixel electrode described above.

[0098] The image display panel 12 may be a liquid crystal display panel, an OLED panel including an organic light emitting diode (OLED), or a QD-LED panel including a quantum dot light emitting diode (QD-LED). In this specification, when OLED and QD-LED are not particularly distinguished, it is also referred to as a light emitting diode (LED).

[0099] When the image display panel 12 is a liquid crystal display panel, the image display panel 12 includes a TFT substrate, a counter substrate arranged to face the TFT substrate, and a liquid crystal layer positioned between the TFT substrate and the counter substrate. A color filter layer is arranged on the TFT substrate or the counter substrate.

[0100] When the image display panel 12 is an OLED panel or a QD-LED panel, the configuration of the light emitting diode is not particularly limited. For example, a structure in which a cathode, an electron transport layer, a light emitting layer, a hole transport layer, and an anode are laminated in this order can be mentioned.

[0101] The materials of the cathode and the anode are not particularly limited. For example, transparent conductive materials such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), In3O3, SnO2, ZnO, aluminum, silver, or alloys thereof can be mentioned.

[0102] In the case of a top emission type LED, the pixel electrode of the TFT substrate may be used as the anode, and the common electrode may be used as the cathode. A reflective electrode such as aluminum, silver, or an alloy thereof may be used as the anode, or the above transparent conductive material may be used as the cathode.

[0103] The hole transport layer is a layer that transports holes injected from the anode to the light-emitting layer. The material of the hole transport layer is not particularly limited, and examples thereof include amine compounds such as N,N,N’,N’-tetraphenylbenzidine and its derivatives.

[0104] The electron transport layer is a layer that transports electrons injected from the cathode to the light-emitting layer. The material of the electron transport layer is not particularly limited, and examples thereof include phenanthroline derivatives such as 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP), quinoline derivatives such as tris(8-hydroxyquinolinato)aluminum (Alq3), azaindolizine derivatives, oxadiazole derivatives, perylene derivatives, pyridine derivatives, pyrimidine derivatives, quinoxaline derivatives, diphenylquinone derivatives, nitro-substituted fluorene derivatives, and the like.

[0105] An electron injection layer may be provided between the cathode and the electron transport layer. Also, a hole injection layer may be provided between the anode and the hole transport layer. As the material of the electron injection layer, an inorganic insulating material can be used, and examples thereof include oxides or halides of alkali metals, and oxides or halides of alkaline earth metals.

[0106] When the image display panel 12 is an OLED, the light-emitting layer may contain a fluorescent material, a phosphorescent material, etc. as the light-emitting material.

[0107] When the image display panel 12 is a QD-LED panel, the light-emitting layer may contain quantum dots as the light-emitting material. Quantum dots are semiconductor crystals with optical properties following quantum mechanics on the nanoscale (for example, the average particle diameter is 2 to 10 nm), and examples thereof include colloidal particles composed of about 10 to 50 atoms.

[0108] (Modification Example 1 of Embodiment 1) FIG. 8 is an enlarged plan schematic view of a liquid crystal panel according to Modification 1 of Embodiment 1. FIG. 8 is an enlarged plan schematic view of the display region 1AA. In the above Embodiment 1, the mode in which the metal wiring 100M is provided in a mesh shape with all regions overlapping a plurality of light shielding portions 200S in plan view as the end points 100MS has been described. However, the metal wiring 100M included in the liquid crystal panel 11 of this modification is provided in a mesh shape with a part of the regions overlapping a plurality of light shielding portions 200S in plan view as the end points 100MS, as shown in FIG. 8. By adopting such a mode, even when the density of the plurality of light shielding portions 200S is high, it is possible to suppress a decrease in transmittance while suppressing signal delay.

[0109] This embodiment is useful when the number of arrangements of the plurality of light shielding portions 200S is large, and the metal wiring 100M is arranged so as to pass through only some of the plurality of light shielding portions 200S.

[0110] The metal wiring 100M is preferably provided in a mesh shape with 1% or more and 50% or less of the total number of regions overlapping a plurality of light shielding portions 200S as the end points 100MS, more preferably provided in a mesh shape with 1% or more and 30% or less as the end points 100MS, and still more preferably provided in a mesh shape with 1% or more and 10% or less as the end points 100MS. The liquid crystal panel 11 of this modification is preferably used when the density of the plurality of light shielding portions 200S is high. In this specification, the regions overlapping a plurality of members (such as the light shielding portions 200S) are provided corresponding to each member (such as the light shielding portions 200S), and there is a one-to-one correspondence relationship between the plurality of members (such as the light shielding portions 200S) and the regions overlapping the plurality of members (such as the light shielding portions 200S). That is, the number of regions overlapping a plurality of members (such as the light shielding portions 200S) is equal to the number of the plurality of members (the light shielding portions 200S).

[0111] In the liquid crystal panel 11 of this modification, in plan view, the metal wiring 100M is arranged so as to overlap a part of a plurality of light shielding portions 200S (also referred to as a light shielding pattern of the liquid crystal panel 11). Among the light shielding patterns of the liquid crystal panel 11, which light shielding pattern is used as the end point 100MS to arrange the metal wiring 100M is determined by, for example, the following procedure.

[0112] 1. Determine the number of each of the contact holes 120CH and spacers 400 per unit area based on information such as the degree of aperture ratio reduction allowed by the specifications of the liquid crystal panel 11, the density of wirings and contact holes necessary to obtain a desired pixel charging speed, and the density of spacers necessary to obtain a desired cell thickness. 2. Arrange a plurality of light-shielding portions 200S1 for connection portions and a plurality of light-shielding portions 200S2 for spacers so that moire is less likely to occur between the liquid crystal panel 11 and the rear display (image display panel 12). Examples of this include random arrangement. 3. Arrange the metal wiring 100M so as to overlap all of the plurality of light-shielding portions 200S1 for connection portions and a part of the plurality of light-shielding portions 200S2 for spacers in a plan view so that the effective resistance value of the first transparent conductive layer 130 is reduced to a desired value. More specifically, the metal wiring 100M is provided in a mesh shape with all of the regions overlapping the plurality of light-shielding portions 200S1 for connection portions and a part of the regions overlapping the plurality of light-shielding portions 200S2 for spacers as end points 100MS in a plan view. The plurality of light-shielding portions 200S2 for spacers include light-shielding portions 200S2 for spacers that overlap the metal wiring 100M and light-shielding portions 200S2 for spacers that do not overlap the metal wiring 100M in a plan view.

[0113] In this way, in this modified example, the metal wiring 100M is arranged with a part of the light-shielding pattern of the liquid crystal panel 11 as the end point 100MS. Since the metal wiring 100M arranged in the display area 1AA becomes a factor in reducing the transmittance, it is desirable that the number of the metal wirings 100M is minimized.

[0114] In the liquid crystal panel 11 of the above-described Embodiment 1, when the density of the plurality of spacers 400 is high, the transmittance may be greatly reduced, and the effective resistance value of the first transparent conductive layer 130 may be excessively small. However, in the liquid crystal panel 11 of this modified example, even when the density of the plurality of spacers 400 is high, a decrease in the transmittance can be suppressed.

[0115] (Modified Example 2 of Embodiment 1) FIG. 9 is an enlarged plan schematic view of a liquid crystal panel according to Modification 2 of Embodiment 1. FIG. 9 is an enlarged plan schematic view of the display region 1AA. In the liquid crystal panel 11 according to Embodiment 1 and Modification 1 of Embodiment 1, the metal wiring 100M is provided in a mesh shape with the region overlapping with the plurality of light-shielding portions 200S as the end points 100MS. However, the metal wiring 100M included in the liquid crystal panel 11 of this modification is, as shown in FIG. 9, in a plan view, with the region overlapping with the plurality of light-shielding portions 200S (more specifically, all of the plurality of light-shielding portions 200S1 for connection portions and a part of the plurality of light-shielding portions 200S2 for spacers) as the end points 100MS, extending only in one direction. By adopting such a mode, it is possible to suppress signal delay while suppressing the reduction of transmittance.

[0116] More specifically, the first transparent conductive layer 130 of this modification is divided into three or more segments along the y-axis direction (vertical direction), which is the first direction of the liquid crystal panel 11. The metal wiring 100M is, in a plan view, with the region overlapping with the plurality of light-shielding portions 200S (more specifically, all of the plurality of light-shielding portions 200S1 for connection portions and a part of the plurality of light-shielding portions 200S2 for spacers) as the end points 100MS, extending along the x-axis direction (horizontal direction), which is the second direction orthogonal to the first direction, and preferably not extending in the first direction. By adding the metal wiring 100M, the transmittance may decrease. However, in this modification, since the metal wiring 100M is arranged only in the horizontal direction, it is possible to effectively reduce the effective resistance value of the first transparent conductive layer 130 while suppressing the reduction of transmittance.

[0117] Here, the fact that the metal wiring 100M extends along the second direction (x-axis direction, the horizontal direction of the liquid crystal panel 11) means that the angle formed by the metal wiring 100M and the second direction is 50° or less. The angle θ formed by the metal wiring 100M and the second direction (x-axis direction, the horizontal direction of the liquid crystal panel 11) is preferably 45° or less. Note that when the metal wiring 100M cannot be arranged at an appropriate angle due to the random arrangement of the plurality of spacers 400, the angle θ is not limited to the above range.

[0118] In this modified example, the metal wiring 100M is arranged in consideration of the shape of the first transparent conductive layer 130 and how the signal delay is distributed according to the shape of the first transparent conductive layer 130. For example, the second segment 2S of the first transparent conductive layer 130 is connected to the frame wiring 100NL on the left and right sides of the liquid crystal panel 11, and signals are input from this location. Since the signal delay inside the second segment 2S is considered to have a distribution in the left - right direction, if the resistance of the first transparent conductive layer 130 can be reduced only in the left - right (i.e., horizontal) direction, the effect of reducing the signal delay can be fully exerted. On the other hand, even if the metal wiring 100M is arranged in the up - down (i.e., vertical) direction, the contribution to improving the point where the signal is most delayed within the plane of the second segment 2S is small.

[0119] In this modified example, for example, the metal wiring 100M is arranged in the left - right direction, and the light - shielding portion 200S1 for connection parts is arranged only in the region overlapping with the metal wiring 100M. Therefore, in this modified example, when a plurality of light - shielding portions 200S1 for connection parts and a plurality of light - shielding portions 200S2 for spacers are arranged in a mixed manner, a tendency (regularity) occurs in the arrangement of the plurality of light - shielding portions 200S1 for connection parts. In such a case, by making the shapes of the plurality of light - shielding portions 200S1 for connection parts and the plurality of light - shielding portions 200S2 for spacers the same, the light - shielding portions can be made difficult to be visually recognized.

[0120] (Embodiment 2) In this embodiment, the features specific to this embodiment will be mainly described, and the description of the content overlapping with the above - mentioned Embodiment 1 will be omitted. This embodiment is substantially the same as Embodiment 1 except that the metal wiring 100M also serves as a light - shielding portion.

[0121] FIG. 10 is an enlarged plan schematic view of a display region of a liquid crystal panel according to Embodiment 2. FIG. 11 is a cross-sectional schematic view taken along line C1-C2 in FIG. 10. As shown in FIGS. 10 and 11, the liquid crystal panel 11 of the present embodiment includes, in order from the back side toward the observation surface side, a second substrate 200, a liquid crystal layer 300 and a plurality of spacers 400, and a first substrate 100. The metal wiring 100M includes a plurality of connection metal portions 100M1 in contact with the first transparent conductive layer 130, a plurality of spacer metal portions 100M2 disposed at positions overlapping the plurality of spacers 400 in plan view, and a wiring portion 100ML connecting the plurality of connection metal portions 100M1 and the plurality of spacer metal portions 100M2 to each other.

[0122] Even in such a manner, similar to Embodiment 1, signal delay and deterioration of display quality can be suppressed. Further, by adopting such a manner, since it becomes possible to make the plurality of connection metal portions 100M1 and the plurality of spacer metal portions 100M2 function as light-shielding portions, it becomes possible to shield a region where liquid crystal alignment is likely to be disturbed (specifically, a contact hole 120CH where the first transparent conductive layer 130 and the metal wiring 100M are connected, and a region where the spacers 400 are provided), and the display performance can be further improved.

[0123] This embodiment is particularly effective when it is desired to reduce the resistance of the first transparent conductive layer 130 provided on the substrate on the same side as the light-shielding portion. The light-shielding portion itself is constituted by the metal wiring 100M, and the light-shielding portion is given the function of auxiliary wiring. For example, when the metal wiring 100M subjected to a low-resistance treatment is used as the light-shielding portion, the light-shielding portion itself becomes a conductor. When it is desired to reduce the resistance of the first transparent conductive layer 130 provided on the substrate on the same side as the light-shielding portion, auxiliary wiring can be formed by the light-shielding portion. In this way, by forming auxiliary wiring with the light-shielding portion, it is possible to reduce the resistance of the first transparent conductive layer 130 without arranging an additional layer.

[0124] The first insulating layer 120 preferably has a planarizing effect. The surface of the first insulating layer 120 on the liquid crystal layer 300 side preferably has a ten-point average roughness (Rzjis) conforming to JIS B0601 of 0.2 μm or less. The lower limit of the ten-point average roughness (Rzjis) of the surface of the first insulating layer 120 on the liquid crystal layer 300 side is not particularly limited, and is, for example, 0 μm or more. By adopting such an aspect, it is possible to suppress the occurrence of steps in the display region 1AA by forming auxiliary wirings with the metal wiring 100M functioning as a light-shielding portion, and to suppress the disturbance of liquid crystal alignment. As a result, the display performance can be improved.

[0125] As shown in FIGS. 10 and 11, the first substrate 100 of the present embodiment includes, in order from the side toward the liquid crystal layer 300, a first support substrate 110, a metal wiring 100M functioning as a light-shielding portion, a first insulating layer 120, and a first transparent conductive layer 130. The second substrate 200 includes, in order from the side toward the liquid crystal layer 300, a second support substrate 210, a second insulating layer 220, and a second transparent conductive layer 230.

[0126] The metal wiring 100M of the present embodiment functions as a light-shielding portion. The metal wiring 100M is formed of a material having a higher absorption rate than a reflectance with respect to external light L incident from the observation surface side, and for example, preferably has an absorption rate with respect to external light L of 80% or more. Examples of the metal wiring 100M include a metal oxide film and a resin film. Examples of the metal oxide film include a two-layer film of chromium (Cr) and chromium oxide (CrOx). Examples of the resin film include a black resist. As the black resist, a black photosensitive resin is preferable, and for example, a black photosensitive acrylic resin can be mentioned.

[0127] The wiring portion 100ML connects a plurality of connection metal portions 100M1 and a plurality of spacer metal portions 100M2 to each other. The wiring portion 100ML may connect the connection metal portions 100M1 to each other, may connect the spacer metal portions 100M2 to each other, or may connect the connection metal portion 100M1 and the spacer metal portion 100M2 to each other.

[0128] The wiring part 100ML is preferably provided in a mesh shape with at least a part of a plurality of connection metal parts 100M1 and a plurality of spacer metal parts 100M2 as end points 100MS. By adopting such a mode, signal delay can be effectively suppressed.

[0129] More preferably, the wiring part 100ML is provided in a mesh shape with all of a plurality of connection metal parts 100M1 and a plurality of spacer metal parts 100M2 as end points 100MS. By adopting such a mode, signal delay can be more effectively suppressed.

[0130] In the first insulating layer 120, contact holes 120CH are provided in a region overlapping with a plurality of connection metal parts 100M1 in a plan view. By adopting such a mode, the first transparent conductive layer 130 and the metal wiring 100M can be electrically connected by the connection metal part 100M1.

[0131] The plurality of connection metal parts 100M1 are arranged at positions where it is difficult to generate moiré with the light-shielding pattern of the image display panel 12 arranged on the back side, and the plurality of spacer metal parts 100M2 are preferably arranged at positions where it is difficult to generate moiré with the light-shielding pattern of the image display panel 12 arranged on the back side. By adopting such a mode, moiré generated by arranging the metal wiring 100M can be reduced. If the plurality of connection metal parts 100M1 and the plurality of spacer metal parts 100M2 are configured such that it is difficult to generate moiré with the light-shielding pattern of the image display panel 12, it is considered that the wiring part 100ML, which is the wiring connecting between the patterns of the plurality of connection metal parts 100M1 and the plurality of spacer metal parts 100M2, can also obtain the effect of being difficult to generate moiré.

[0132] The plurality of connection metal parts 100M1 are preferably arranged randomly, for example. By adopting such a mode, moiré can be suppressed. Similarly, the plurality of spacer metal parts 100M2 are preferably arranged randomly, for example. By adopting such a mode, moiré can be suppressed.

[0133] In this embodiment, the case where the plurality of connection metal parts 100M1 and the plurality of spacer metal parts 100M2 are arranged randomly is taken as an example, but other arrangements may also be used, and an arrangement that can avoid moiré is preferably used.

[0134] The plurality of connection metal parts 100M1 and the plurality of spacer metal parts 100M2 are arranged in a mixed manner. The plurality of connection metal parts 100M1 and the plurality of spacer metal parts 100M2 each block light from the contact hole 120CH and the spacer 400. Since the sizes of the contact hole 120CH and the spacer 400 and the widths of the light-blocking parts required for their light blocking are different, the shapes of the connection metal part 100M1 and the spacer metal part 100M2 are preferably different from each other.

[0135] When the shapes of the plurality of connection metal parts 100M1 and the shapes of the plurality of spacer metal parts 100M2 are different from each other, the plurality of connection metal parts 100M1 are arranged in a manner that can avoid moiré, or an arrangement in which the density of the pattern arrangement is not visible, and the plurality of spacer metal parts 100M2 are also preferably arranged in a manner that can avoid moiré, or an arrangement in which the density of the pattern arrangement is not visible.

[0136] Each connection metal part 100M1 preferably includes the corresponding contact hole 120CH in a plan view. By adopting such a mode, it is possible to effectively block light from the region where the liquid crystal alignment is likely to be disturbed, so that the display performance can be further improved.

[0137] Each connection metal part 100M1 preferably includes the corresponding contact hole 120CH in a plan view and has an area that is 1.1 times or more and 3 times or less the area of the contact hole 120CH, more preferably includes the corresponding contact hole 120CH and has an area that is 1.5 times or more and 2.5 times or less the area of the contact hole 120CH. By adopting such a mode, it is possible to more effectively shield the region where the liquid crystal alignment is likely to be disturbed, so that the display performance can be further improved.

[0138] Each spacer metal part 100M2 preferably includes the corresponding spacer 400 in a plan view. By adopting such a mode, it is possible to effectively shield the region where the liquid crystal alignment is likely to be disturbed, so that the display performance can be further improved.

[0139] Each spacer metal part 100M2 preferably includes the corresponding spacer 400 in a plan view and has an area that is 1.1 times or more and 5 times or less the area of the spacer 400, more preferably includes the corresponding spacer 400 and has an area that is 1.2 times or more and 2 times or less the area of the spacer 400. By adopting such a mode, it is possible to more effectively shield the region where the liquid crystal alignment is likely to be disturbed, so that the display performance can be further improved.

[0140] Hereinafter, the effects of the present invention will be described with reference to examples, but the present invention is not limited to these examples.

[0141] (Example 1) The liquid crystal panel of this example corresponds to the liquid crystal panel of Embodiment 1 above. The liquid crystal panel of this example can suppress signal delay and deterioration of display quality.

[0142] (Example 2) The liquid crystal panel of this example corresponds to the liquid crystal panel of Modification 1 of Embodiment 1 above. The liquid crystal panel of this example can suppress signal delay and deterioration of display quality, and can also suppress a decrease in transmittance.

[0143] (Example 3) The liquid crystal panel of this example corresponds to the liquid crystal panel of Modification Example 2 of the above Embodiment 1. The liquid crystal panel of this example can suppress signal delay and deterioration of display quality, and can also suppress a decrease in transmittance.

[0144] (Example 4) The liquid crystal panel of this example corresponds to the liquid crystal panel of the above Embodiment 2. The liquid crystal panel of this example can suppress signal delay and deterioration of display quality while suppressing the number of layers as compared with Examples 1 to 3.

[0145] The respective aspects of the present invention shown above may be appropriately combined within the scope not departing from the gist of the present invention.

Explanation of Reference Numerals

[0146] 1AA: Display area 1NA: Frame area 1S, 2S, 3S, 4S: Segment 10: Display device 11: Liquid crystal panel 11R: Active retarder panel 12: Image display panel 13: Backlight 100, 200: Substrate 100M: Metal wiring 100M1: Connecting metal part 100M2: Spacer metal part 100ML: Wiring part 100MS: End point 100NL: Frame wiring 100T: Connecting part 110, 210: Support substrate 120, 220: Insulating layer 120CH: Contact hole 130, 230: Transparent conductive layer 200S: Light-shielding part 200S1: Light-shielding part for connecting part 200S2: Light-shielding part for spacer 300: Liquid crystal layer 400: Spacer

Claims

1. A display area and a frame area provided around the display area, including a first substrate, a second substrate disposed opposite to the first substrate, and a liquid crystal layer and a plurality of spacers disposed between the first substrate and the second substrate and provided in the display area, wherein the first substrate or the second substrate has a frame wiring disposed in the frame area, and the first substrate has a transparent conductive layer and a metal wiring that extends from the frame wiring toward the display area and is electrically connected to the transparent conductive layer in an area that does not overlap with the plurality of spacers in a plan view, a liquid crystal panel.

2. The first substrate or the second substrate includes a plurality of light-shielding portions disposed on the observation surface side of the metal wiring, wherein the plurality of light-shielding portions include a plurality of light-shielding portions for connection portions disposed at positions overlapping a connection portion where the metal wiring is electrically connected to the transparent conductive layer in a plan view, and a plurality of light-shielding portions for spacers disposed at positions overlapping the plurality of spacers, the liquid crystal panel according to claim 1.

3. The liquid crystal panel according to claim 2, wherein the metal wiring is provided in a mesh shape with at least a part of an area overlapping the plurality of light-shielding portions as an end point in a plan view.

4. The liquid crystal panel according to claim 2, wherein the metal wiring is provided in a mesh shape with all of an area overlapping the plurality of light-shielding portions as an end point in a plan view.

5. The liquid crystal panel according to claim 2, wherein the metal wiring is provided in a mesh shape with all of an area overlapping the plurality of light-shielding portions for connection portions and a part of an area overlapping the plurality of light-shielding portions for spacers as an end point in a plan view.

6. The liquid crystal panel according to claim 2, wherein the metal wiring extends only in one direction with an area overlapping the plurality of light-shielding portions as an end point in a plan view.

7. The transparent conductive layer is divided into three or more segments along a first direction of the liquid crystal panel, and the metal wiring extends along a second direction orthogonal to the first direction with an area overlapping the plurality of light-shielding portions as an end point in a plan view and does not extend in the first direction, the liquid crystal panel according to claim 2.

8. The liquid crystal panel according to claim 7, wherein an angle θ formed between the metal wiring and the second direction is 45° or less.

9. The liquid crystal panel according to claim 2, wherein the plurality of light-shielding portions are randomly arranged.

10. Comprising, in order from the back side toward the observation surface side, the second substrate, the liquid crystal layer and the plurality of spacers, and the first substrate. The metal wiring includes a plurality of connection metal portions in contact with the transparent conductive layer, a plurality of spacer metal portions arranged at positions overlapping the plurality of spacers in plan view, and a wiring portion connecting the plurality of connection metal portions and the plurality of spacer metal portions to each other. The liquid crystal panel according to claim 1.

11. The liquid crystal panel according to claim 10, wherein the wiring portion is provided in a mesh shape with at least a part of the plurality of connection metal portions and the plurality of spacer metal portions as endpoints.

12. The liquid crystal panel according to claim 10, wherein the plurality of connection metal portions are randomly arranged.

13. The liquid crystal panel according to claim 10, wherein the plurality of spacer metal portions are randomly arranged.

14. The liquid crystal panel according to claim 1, wherein the transparent conductive layer is divided into three or more segments along one direction of the liquid crystal panel.

15. A liquid crystal panel according to any one of claims 1 to 14, An image display panel arranged on the back side of the liquid crystal panel, A display device comprising a backlight arranged on the back side of the image display panel.

Images