Radiation detector and radiation imaging system

Abstract

To provide a radiation detector capable of reducing image quality degradation.SOLUTION: A radiation detector includes: a pixel region in which a plurality of pixels are arranged; a first output line connected to a first pixel; a second output line connected to a second pixel; a first signal processing circuit connected to the first output line; and a second signal processing circuit connected to the second output line. The first signal processing circuit includes: a first driving circuit connected to the first output line; a first AD conversion circuit; a first holding circuit; and a first horizontal scanning circuit, and includes a second driving circuit connected to the second output line; a second AD conversion circuit; and a second holding circuit. The first signal processing circuit is disposed between the pixel region and the second signal processing circuit in plan view, and the first horizontal scanning circuit is disposed between the pixel region and the second AD conversion circuit in plan view.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a radiation detector and a radiation imaging system.

Background Art

[0002] As one means for rapidly reading out a plurality of pixels, in an imaging device in which a plurality of pixels are two-dimensionally arranged, there is a method of simultaneously reading signals from a plurality of rows of pixels. Patent Document 1 discloses arranging a plurality of AD conversion units including a current source, an AD conversion circuit, and a holding circuit in a column direction as one ADC array. And it is disclosed that a shift register for supplying a control signal for controlling the transfer of a signal output from each AD conversion unit is arranged at a position separated from the ADC array. The ADC array is arranged between a pixel region where a plurality of pixels are arranged and the shift register.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the imaging device described in Patent Document 1, it is necessary to share a control signal from the shift register with each of the AD conversion units, and it is necessary to arrange wiring for supplying the control signal across each AD conversion unit. When the wiring for supplying the control signal is arranged across each AD conversion unit, crosstalk deteriorates, and there is a possibility of causing image quality degradation. An object of the present invention is to reduce image quality degradation.

Means for Solving the Problems

[0005] One aspect of the present invention is a pixel region in which a plurality of pixels that directly convert radiation into electric charges are arranged side by side in a first direction and a second direction intersecting the first direction, a first output line connected to a first pixel of the plurality of pixels, a second output line connected to a second pixel arranged side by side with the first pixel in the first direction, a first signal processing circuit connected to the first output line, and a second signal processing circuit connected to the second output line, wherein the first signal processing circuit includes a first drive circuit connected to the first output line, a first AD conversion circuit that compares signals from the first output line, and a second AD conversion circuit that converts signals from the first AD conversion circuit. a first hold circuit that holds a signal from a first AD conversion circuit, and a first horizontal scanning circuit that controls transfer of the signal from the first hold circuit; a second drive circuit connected to the second output line; a second AD conversion circuit that compares the signals from the second output line; and a second hold circuit that holds a signal from the second AD conversion circuit, wherein the first signal processing circuit is disposed between the pixel region and the second signal processing circuit in a plan view seen from a third direction orthogonal to the first direction and the second direction, and the first horizontal scanning circuit is disposed between the pixel region and the second AD conversion circuit in the plan view. [Effects of the Invention]

[0006] An object of the present invention is to provide a radiation detector capable of reducing image quality degradation. [Brief explanation of the drawings]

[0007]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

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Figure 8

Figure 9

Figure 10

Mode for Carrying Out the Invention

[0008] Hereinafter, each embodiment will be described with reference to the drawings. The following embodiments are for embodying the technical idea of the present invention and do not limit the present invention. The sizes and positional relationships of the members shown in each drawing may be exaggerated for clarity of explanation. In the following description, the same components may be denoted by the same numbers and the description thereof may be omitted. Also, for components having the same configuration, "alphabets" such as a, b, c, etc. may be added to the end of the reference numerals and the description thereof may be omitted. In the following description, terms indicating a specific direction or position (for example, "up", "down", "right", "left", and other terms including those terms) are used as necessary. The use of those terms is for facilitating the understanding of the embodiments with reference to the drawings, and the technical scope of the present invention is not limited by the meanings of those terms.

[0009] In this specification, the plane refers to the plane viewed from a direction orthogonal to the direction in which a plurality of pixels are arranged. For example, when a plurality of pixels are arranged in a matrix, it refers to the plane viewed from a third direction orthogonal to the first direction (for example, the row direction) and the second direction (the column direction). Further, the plane may be the plane viewed from a direction perpendicular to the surface of the semiconductor layer on which radiation is incident, and the cross section may be the plane in the direction perpendicular to the surface of the semiconductor layer on which radiation is incident. When the surface of the semiconductor layer on which radiation is incident is a rough surface when viewed microscopically, the plane and the cross section are defined based on the surface when viewed macroscopically. Planar view refers to the case of viewing the aforementioned plane.

[0010] In each of the embodiments described below, as an example of a radiation detector, an image sensor as an imaging device will be used for explanation. Specifically, below, a direct conversion type radiation detector including a conversion element that directly converts incident radiation into electric charge will be described. However, each embodiment is not limited to an imaging device and is applicable to other examples. For example, there are a distance measuring device (a device for distance measurement using focus detection or TOF (Time Of Flight)), a photometric device (a device for measuring the amount of incident light), and the like.

[0011] In the following description, "radiation" is a concept including non-ionizing radiation (infrared rays, visible light, ultraviolet rays, etc.), electromagnetic radiation (X-rays, gamma rays), and ionizing radiation (electromagnetic radiation and particle radiation). Electromagnetic wave radiation includes, for example, X-rays and gamma rays, and particle radiation includes, for example, electron beams, proton beams, neutron beams, alpha rays, and the like. A "radiation imaging system" generally refers to a system that uses radiation to acquire an image of an imaging target (a subject, a patient in the case of a medical imaging system, etc.) as electronic data. The "image" may be a still image or a moving image.

[0012] Also, in the following embodiments, the connection between elements of a circuit may be described. In this case, even if another element is interposed between the elements of interest, unless otherwise specified, the elements of interest are treated as being connected. For example, assume that element A is connected to one node of a capacitive element C having a plurality of nodes, and element B is connected to the other node. Even in such a case, unless otherwise specified, element A and element B are treated as being connected.

[0013] (Embodiment 1) Hereinafter, the radiation detector 300 according to Embodiment 1 of the present invention will be described with reference to the drawings. In the following, the vertical direction of the drawing may be referred to as the first direction, and the direction orthogonal to the first direction may be referred to as the second direction. Also, the first direction may be referred to as the row direction, and the left-right direction may be referred to as the column direction. Note that the first direction and the second direction are not limited to this, and for example, the first direction may be the column direction and the second direction may be the row direction. Also, the first direction and the second direction only need to intersect, and it is not essential that they are orthogonal.

[0014] FIG. 1 is a diagram showing a block configuration of the radiation detector 300. The radiation detector 300 includes a pixel region 100, a signal readout line (output line) 101, a signal processing circuit 110, a vertical scanning circuit 120, a reference signal generation circuit 130, and a digital signal processing circuit 140.

[0015] In the pixel region 100, a plurality of pixels 10 are arranged in a two-dimensional array. The pixel 10 includes at least a photodiode, a floating diffusion (FD), a reset transistor, and an amplification transistor. The pixel 10 may further include a selection transistor. Hereinafter, a configuration in which the photodiode and the FD are directly connected will be described, but the pixel 10 may include a transfer transistor connected between the cathode of the photodiode and the gate of the amplification transistor.

[0016] The photodiode is a conversion element that directly converts incident radiation into charge. The anode of the photodiode is connected to the reference voltage node, and the cathode is connected to the source of the reset transistor and the gate of the amplification transistor. The connection node of the cathode of the photodiode, the source of the reset transistor, and the gate of the amplification transistor is the FD. The FD has a function as a charge holding unit. The photodiode is preferably an element that detects electromagnetic radiation (X-rays, gamma rays) and particle radiation (electron beams, proton beams, neutron beams, alpha rays, etc.).

[0017] The drain of the reset transistor is connected to a power supply voltage node to which a power supply voltage is supplied. The drain of the selection transistor is connected to the amplification transistor, and the source is connected to the output line 101. The output line 101 is connected to a current source.

[0018] Signal lines for transmitting control signals from the vertical scanning circuit 120 are connected to the gates of the reset transistor and the selection transistor, respectively. Each signal line is a signal line common to the row to which the pixel 10 belongs.

[0019] When radiation is incident on the pixel 10, the radiation is converted into charges (signal charges) by the photodiode and accumulated. The charges converted by the photodiode are transferred to the FD. The amplification transistor amplifies the pixel signal based on the charges held by the FD and outputs it to the selection transistor. The selection transistor outputs the pixel signal to the output line 101 based on a control signal from the vertical scanning circuit 120. The reset transistor resets the FD to a voltage corresponding to the power supply voltage based on a control signal from the vertical scanning circuit 120.

[0020] The frame rate of shooting is, for example, several tens to several hundreds of fps. The irradiation rate of radiation is preferably 0.5 / pix / frm or less as a standard. In other words, imaging is performed at a low irradiation rate such that the probability of radiation incident on one pixel at a certain time is less than 1 / 2. Here, the unit [ / pix / frm] is the average value (expected value) of the number of radiation particles or photons incident per frame and per pixel. For example, the standard of the irradiation rate when using X-rays is 0.5 or less as the average value of the number of photons incident per frame and per pixel. The standard of the irradiation rate when using an electron beam is 0.5 or less as the average value of the number of electrons incident per frame and per pixel.

[0021] Note that the irradiation rate of radiation is more preferably lower than 0.5 / pix / frm, and can be, for example, 0.1 / pix / frm or less, and further 0.05 / pix / frm or less.

[0022] The number of rows and columns of the pixels 10 arranged in the pixel region 100 is not particularly limited. In the pixel region 100, in addition to the effective pixels that output pixel signals according to the amount of incident radiation, there may be arranged light-shielding pixels in which photodiodes are shielded, dummy pixels that do not output signals, and NULL pixels. Different from the effective pixels and the light-shielding pixels, the NULL pixel is a pixel that does not include a photodiode and an FD.

[0023] The signal processing circuit 110 includes a driving circuit 102, an AD conversion circuit 103, a holding circuit 104, and a horizontal scanning circuit 105. In the present embodiment, a plurality of signal processing circuits 110 are arranged side by side in the first direction. In FIG. 1, two signal processing circuits 110a (the first signal processing circuit) and the signal processing circuit 110b (the second signal processing circuit) are arranged side by side in the first direction. In other words, the signal processing circuit 110a is arranged between the pixel region 100 and the signal processing circuit 110b in a plan view. The configurations included in the signal processing circuits 110a and 110b are the same as the configurations described for the signal processing circuit 110.

[0024] The output line 101 connects the driving circuit 102 and the pixel region 100. The analog signal generated by the photodiode for each row selected by the vertical scanning circuit 120 is read out via the output line 101. The driving circuit 102 is arranged between the pixel region 100 and the AD conversion circuit 103 in a plan view and is connected to the pixel region 100 and the AD conversion circuit 103.

[0025] The drive circuit 102 has a function of controlling the potential of the output line 101, and a plurality of drive circuit units 11 each having a current source flowing through each output line are arranged. In the present embodiment, two output lines 101 are arranged for each column of photodiodes. One output line 101 is connected to the drive circuit 102a of the signal processing circuit 110a, and the other output line 101 is connected to the drive circuit 102b of the signal processing circuit 110b. In other words, the photodiode of the pixel 10 (the first pixel) in a certain row is connected to the drive circuit 102a (the first drive circuit) of the signal processing circuit 110a via the first output line. Then, the photodiode of the pixel 10 (the second pixel) in a different row in the same column as the first pixel is connected to the drive circuit 102b (the second drive circuit) of the signal processing circuit 110b via the second output line.

[0026] The AD conversion circuit 103 is connected to the drive circuit 102 and the reference signal line 12, and a plurality of AD conversion circuit units 13 for performing A / D (analog / digital) conversion are arranged. The AD conversion circuit unit 13 converts the analog signal input from the drive circuit 102 into a digital signal based on the reference signal input from the reference signal generation circuit 130 via the reference signal line 12 and outputs it. The reference signal is, for example, a ramp signal or the like whose signal level increases or decreases with the passage of time.

[0027] The drive circuit 102a is connected to the AD conversion circuit 103a (the first AD conversion circuit), and the drive circuit 102b is connected to the AD conversion circuit 103b (the second AD conversion circuit).

[0028] The reference signal generation circuit 130 is arranged only on the left side of the signal processing circuits 110a and 110b in a plan view. Also, a counter connected to a plurality of holding circuit units 14 included in the holding circuit 104 is arranged only on the left side of the signal processing circuits 110a and 110b. The reference signal generation circuit 130 is arranged at a position equidistant from the signal processing circuit closest to the pixel region 100 and the signal processing circuit farthest from the pixel region 100 among a plurality of signal processing circuits arranged downward of the pixel region 100. In other words, it is arranged on the extension line of the center line of the plurality of signal processing circuits. For example, when there are two signal processing circuits 110, it is arranged on the extension line of a line passing between the two signal processing circuits. By arranging in this way, it becomes easier to reduce the variation of the signals supplied from the reference signal generation circuit 130. On the other hand, the digital signal processing circuit 140 is arranged on the left and right sides of the signal processing circuits 110a and 110b in a plan view.

[0029] The holding circuit 104 is connected to the AD conversion circuit 103, and a plurality of holding circuit units 14 for holding the pixel signals processed by the AD conversion circuit 103 are arranged. The holding circuit unit 14 has a function as a memory. The holding circuit 104a is connected to the AD conversion circuit 103a, and the holding circuit 104b is connected to the AD conversion circuit 103b.

[0030] The horizontal scanning circuit 105 includes at least a shift register, and may further include a decoder. The horizontal scanning circuit 105 is connected to the holding circuit 104 and sequentially scans the holding circuit units 14. The pixel signals held in each holding circuit unit 14 are sequentially transferred to a digital signal processing circuit 140 that processes digital signals such as a digital front end. At this time, it is preferable that the digital signal processing circuit 140 is not arranged on the extension line in the direction in which the signal processing circuits 110a and 110b are arranged side by side. In FIG. 1, the digital signal processing circuit 140 is arranged in a second direction with respect to the signal processing circuit 110a. By arranging in this way, the wiring through which the signals output from the horizontal scanning circuit pass does not overlap with the signal processing circuit 110b in a plan view, and it becomes easier to suppress the occurrence of crosstalk.

[0031] The detailed configurations of the signal processing circuits 110a and 110b of the present embodiment will be described with reference to FIG. 2.

[0032] The connection method of the pixels 10, output lines 101, and drive circuit unit 11 in the present embodiment is as follows. Among the pixels of 4 rows and 2 columns among the plurality of pixels included in the pixel region 100, two output lines 101 are connected to the pixels of one column, and one drive circuit unit 11, one AD conversion circuit unit 13, and one holding circuit unit 14 are arranged for each output line. Specifically, the output line 101a is connected to the pixels 10a and 10c, and the drive circuit unit 11a, the AD conversion circuit unit 13a, and the holding circuit unit 14a of the signal processing circuit 110a are arranged with respect to the output line 101a. Then, the output line 101b is connected to the pixels 10b and 10d, and the drive circuit unit 11b, the AD conversion circuit unit 13b, and the holding circuit unit 14b of the signal processing circuit 110b are arranged with respect to the output line 101b. The output line 101a is connected to the drive circuit unit 11a, and the output line 101b is connected to the drive circuit unit 11b. The signal output from the drive circuit unit 11a is input to the AD conversion circuit unit 13a, and the signal output from the AD conversion circuit unit 13a is input to the holding circuit unit 14a.

[0033] Also, the signal processing circuit 110a includes a horizontal scanning circuit 105a (first horizontal scanning circuit), and the signal processing circuit 110b includes a horizontal scanning circuit 105b (second horizontal scanning circuit). The horizontal scanning circuit 105a is connected to a holding circuit 104a (first holding circuit) and controls the transfer of the signal from the holding circuit 104a. The horizontal scanning circuit 105b is connected to a holding circuit 104b (second holding circuit) and controls the transfer of the signal from the holding circuit 104b. In a plan view, the horizontal scanning circuit 105a is arranged between the pixel region 100 and the horizontal scanning circuit 105b.

[0034] In the present embodiment, the drive circuit 102a, the AD conversion circuit 103a, the holding circuit 104a, the horizontal scanning circuit 105a, the drive circuit 102b, the AD conversion circuit 103b, the holding circuit 104b, and the horizontal scanning circuit 105b are arranged in this order in the first direction.

[0035] Regarding the connection of pixels 10e to 10h arranged in the adjacent column and the pixels in the row behind pixel 10d, the same connection method is repeated.

[0036] In the present embodiment, all the output lines 101 connected to each drive circuit extend to the drive circuit of the signal processing circuit 110b and have substantially uniform wiring lengths. Substantially uniform means that, for example, the difference between the wiring length of the output line 101a and the wiring length of the output line 101b is 50 nm or less. By arranging in this way, the wiring loads of the respective output lines are arranged to be substantially uniform.

[0037] In FIG. 2, the case where two output lines 101 are arranged for each pixel column is shown, but a plurality of output lines 101 may be arranged. In that case, the drive circuit unit 11, the AD conversion circuit unit 13, and the holding circuit unit 14 are provided for each output line.

[0038] According to the present embodiment, a plurality of signal processing circuits 110a and 110b are arranged, and in a plan view, the horizontal scanning circuit 105a is arranged between the pixel region 100 and the AD conversion circuit 103b. As a result, the wiring through which the control signal supplied from the horizontal scanning circuit passes does not cross other signal processing circuits. Therefore, it becomes easy to reduce the deterioration of crosstalk caused by the arrangement of the wiring through which the control signal passes, and the deterioration of the image quality can be reduced.

[0039] FIG. 3 is a diagram showing a modified example of the present embodiment. In the modified example, pixels of 4 rows and 2 columns are arranged, and four output lines 101 are arranged in each pixel column. In the present embodiment, two output lines 101 are respectively connected to the signal processing circuits 110a and 110b, and each signal processing circuit 110a, 110b includes drive circuit units 11, AD conversion circuit units 13, and holding circuit units 14 for two columns. That is, for one pixel, drive circuit units 11, AD conversion circuit units 13, and holding circuit units 14 for two columns are arranged.

[0040] The pixel 10a is connected to the output line 101a and is connected to the driving circuit 102a of the signal processing circuit 110a. The output line 101a is connected to the driving circuit section 11a of the driving circuit 102a. The pixel 10b is connected to the output line 101b and is connected to the driving circuit 102b of the signal processing circuit 110b. The output line 101b is connected to the driving circuit section 11b of the driving circuit 102b. The pixel 10c is connected to the output line 101c and is connected to the driving circuit 102a of the signal processing circuit 110a. The output line 101c is connected to the driving circuit section 11c of the driving circuit 102a. The pixel 10d is connected to the output line 101d and is connected to the driving circuit 102b of the signal processing circuit 110b. The output line 101d is connected to the driving circuit section 11d of the driving circuit 102b. Regarding the subsequent connections of 10e to h in the next column and the connections in the next row, the above connection method is repeated.

[0041] The holding circuit section 14 that holds the pixel signals of the pixels 10a, 10b, 10c, and 10d transfers the signals to the digital signal processing circuit 140 arranged in the left direction. The holding circuit section 14 that holds the pixel signals of the pixels 10e, 10f, 10g, and 10h transfers the signals to the digital signal processing circuit arranged in the right direction. Thereby, it becomes possible to read out the signals at a higher speed compared to the case where the digital signal processing circuit 140 is arranged on one side and the signals are processed. Not limited to this, the digital signal processing circuit 140 may be arranged in either the left direction or the right direction, and the pixel signals of the pixels 10a to 10d may be transferred.

[0042] According to this embodiment, by arranging a plurality of signal processing circuits, a large number of output lines output from the holding circuit unit 14 can be arranged, and the transfer time can be shortened. Further, by arranging a plurality of signal processing circuits configured as one block side by side, the layout can be facilitated. Furthermore, since the wiring through which the control signal from a certain horizontal scanning circuit passes is connected without crossing other signal processing circuits, crosstalk can be reduced. Also, according to this embodiment, the output from each signal processing circuit 110 does not cross other signal processing circuits. For example, the signal processing circuit 110a in FIG. 1 can output a signal without crossing the signal processing circuit 110b. As a result, the overlapping wiring in the signal processing circuit 110b can be reduced, and crosstalk can be reduced.

[0043] (Embodiment 2) FIG. 4 shows the radiation detector of Embodiment 2. The radiation detector of Embodiment 2 is different from that of Embodiment 1 in that a plurality of signal processing circuits 110 are arranged vertically with respect to the pixel region 100. Since it is substantially the same as Embodiment 1 except for this point and the points described below, the description may be omitted.

[0044] The radiation detector of this embodiment is composed of a circuit region 401 and a pixel region 100 arranged on a semiconductor substrate 400. The pixel region 100 is arranged on the semiconductor substrate 400, the circuit region 401a is arranged downward of the pixel region 100, and the circuit region 401b is arranged upward of the pixel region 100. A plurality of signal processing circuits 110 are arranged in each of the circuit regions 401a and 401b.

[0045] The circuit region 401a includes signal processing circuits 110a and 110b. The circuit region 401b includes a signal processing circuit 110c (the fifth signal processing circuit) and a signal processing circuit 110d (the sixth signal processing circuit).

[0046] The signal processing circuit 110c is connected to an output line 101 (the fifth output line) connected to the fifth pixel. The signal processing circuits 110c and 110d include the same configuration as the signal processing circuits 110a and 110b. That is, the signal processing circuit 110c has a drive circuit (the fifth drive circuit), an AD conversion circuit (the fifth AD conversion circuit), a holding circuit (the fifth holding circuit), and a horizontal scanning circuit (the fifth horizontal scanning circuit). Further, the signal processing circuit 110d is connected to an output line 101 (the sixth output line) connected to the sixth pixel. The signal processing circuit 110d has a drive circuit (the sixth drive circuit), an AD conversion circuit (the sixth AD conversion circuit), a holding circuit (the sixth holding circuit), and a horizontal scanning circuit (the sixth horizontal scanning circuit). The signal processing circuit 110c and the signal processing circuit 110d are arranged in mirror symmetry with respect to the signal processing circuits 110a and 110b with the pixel region 100 interposed therebetween.

[0047] The horizontal center line 41 indicates the central position in the row direction of the pixel region 100. With the horizontal center line 41 as a boundary, the pixels in the pixel region 100a below the horizontal center line 41 are connected to the signal processing circuits 110a and 110b in the circuit region 401a. On the other hand, the pixels in the pixel region 100b above the horizontal center line 41 are connected to the signal processing circuits 110c and 110d in the circuit region 401b. The pixel region 100b and the circuit region 401b are arranged by vertically inverting the pixel region 100a and the circuit region 401a.

[0048] Also, the vertical center line 42 indicates the central position in the column direction of the pixel region 100. With the vertical center line 42 as a boundary, the holding circuit unit 14 to the left of the vertical center line 42 transfers the pixel signal to a digital signal processing circuit arranged to the left. The holding circuit unit 14 to the right of the vertical center line 42 transfers the pixel signal to a digital signal processing circuit arranged to the right. In FIG. 4, two signal processing circuits are arranged side by side with respect to the pixel region 100, but two or more signal processing circuits may be arranged side by side.

[0049] Further, a temperature detection sensor 150 for observing the temperature within the pixel region may be placed near the pixel region 100. The temperature detection sensor is composed of an element formed by a PN junction such as a diode, for example.

[0050] Although the readout directions of the pixel signals are different with respect to the horizontal center line 41 and the vertical center line 42, the synchronization method of transferring the pixel signals to each circuit block may be configured by the following method. Signals from the main clock that drives each block are divided and multiplied by a PLL (Phase Locked Loop), and the signal lines are made of equal-length wiring and the loads are adjusted to be combined for synchronization. Also, the power supplies of each circuit block are to be supplied from a common power supply wiring respectively.

[0051] (Embodiment 3) FIG. 5 shows the radiation detector of Embodiment 3. The radiation detector of Embodiment 3 is different from Embodiment 1 in that the arrangement order of the configurations included in the signal processing circuit 110b is different. Except for this point and the points described below, since it is substantially the same as Embodiment 1, the description may be omitted in some cases.

[0052] The signal processing circuit 110b is upside down with respect to the signal processing circuit 110a. In other words, the signal processing circuit 110a and the signal processing circuit 110b are arranged in mirror symmetry with respect to the line passing between the respective signal processing circuits. In a plan view, the drive circuit 102a, the AD conversion circuit 103a, the holding circuit 104a, the horizontal scanning circuit 105a, the horizontal scanning circuit 105b, the holding circuit 104b, the AD conversion circuit 103b, and the drive circuit 102b are arranged in this order in the first direction.

[0053] The reference signal generation circuit 130 is commonly connected to the reference signal line 12 of the signal processing circuit 110a and the reference signal line 12 of the signal processing circuit 110b. The signal processing circuit 110b is arranged in the order of the horizontal scanning circuit 105b, the holding circuit 104b, the AD conversion circuit 103b, and the drive circuit 102b from the side closer to the pixel region 100. The reference signal generation circuit 130 is arranged near the boundary line between the signal processing circuit 110a and the signal processing circuit 110b.

[0054] According to this embodiment, by arranging the signal processing circuit 110b upside down, it becomes easy to match the signal loads of the reference signal lines 12 input to the signal processing circuit 110a and the signal processing circuit 110b. Also, it becomes possible to share the power supply at the boundary between the signal processing circuit 110a and the signal processing circuit 110b.

[0055] In FIG. 5, the signal processing circuit 110b is arranged upside down, but this is not the only case. The signal processing circuit 110a may be arranged upside down and the signal processing circuit 110b may be arranged non-inverted.

[0056] (Embodiment 4) FIG. 6 shows the radiation detector of Embodiment 4. The radiation detector of Embodiment 4 includes four signal processing circuits 110, and is different from Embodiment 1 in that a plurality of signal processing circuits are arranged upside down. Except for this point and the points described below, since it is substantially the same as Embodiment 1, the description may be omitted.

[0057] In FIG. 6, the signal processing circuit 110a, the signal processing circuit 110b, the signal processing circuit 110e (third signal processing circuit), and the signal processing circuit 110f (fourth signal processing circuit) are arranged in order in a first direction with respect to the pixel region 100. The signal processing circuits 110e and 110f include the same configuration as the configuration described for the signal processing circuits 110a and 110b. That is, the signal processing circuit 110e is connected to an output line 101 (third output line) connected to the third pixel. The signal processing circuit 110e has a drive circuit (third drive circuit), an AD conversion circuit (third AD conversion circuit), a holding circuit (third holding circuit), and a horizontal scanning circuit (third horizontal scanning circuit). Also, the signal processing circuit 110f is connected to an output line 101 (fourth output line) connected to the fourth pixel. The signal processing circuit 110f has a drive circuit (fourth drive circuit), an AD conversion circuit (fourth AD conversion circuit), a holding circuit (fourth holding circuit), and a horizontal scanning circuit (fourth horizontal scanning circuit). In plan view, the horizontal scanning circuit of the signal processing circuit 110b is arranged between the horizontal scanning circuit of the signal processing circuit 110a and the horizontal scanning circuit of the signal processing circuit 110e.

[0058] The signal processing circuits 110e and 110f are arranged in an upside-down manner, while the signal processing circuits 110a and 110b are arranged without being upside-down. In other words, the signal processing circuits 110a and 110b are arranged as objects to be translated, the signal processing circuits 110e and 110f are arranged as objects to be translated, and the signal processing circuits 110b and 110e are arranged in mirror symmetry.

[0059] The reference signal generation circuit 130 is arranged on the extension line of the boundary between the signal processing circuits 110b and 110e. The reference signal generation circuit 130 is commonly connected to the signal processing circuits 110a, 110b, 110e, and 110f via the respective reference signal lines 12.

[0060] The signal processing circuits are arranged in an upside-down manner with the boundary between the signal processing circuits 110b and 110e as the boundary. That is, the signal processing circuits 110e and 110f are arranged in an upside-down manner with respect to the signal processing circuits 110a and 110b. For example, half of the plurality of signal processing circuits 110 are arranged in an upside-down manner.

[0061] In FIG. 6, four signal processing circuits are arranged, but the number of signal processing circuits can be changed according to the number of pixels. For example, it is also possible to arrange six signal processing circuits or eight signal processing circuits.

[0062] According to the present embodiment, since a plurality of signal processing circuits are arranged as compared with Embodiment 1 and Embodiment 2, it becomes possible to read signals at high speed.

[0063] (Embodiment 5) FIG. 7 shows the radiation detector of Embodiment 5. The radiation detector of Embodiment 5 is different from Embodiment 4 in that the signal processing circuits that do not turn upside down and the signal processing circuits that turn upside down are arranged in order. Except for this point and the points described below, since it is substantially the same as Embodiment 4, the description may be omitted.

[0064] In FIG. 7, adjacent signal processing circuits are arranged in an upside-down manner. When the signal processing circuit 110a is arranged non-inverted, the signal processing circuit 110b arranged adjacent to the signal processing circuit 110a is arranged in an upside-down manner, the signal processing circuit 110e is arranged non-inverted, and the signal processing circuit 110f is arranged in an upside-down manner. In other words, the signal processing circuit 110a and the signal processing circuit 110e are arranged as objects to be translated, and the signal processing circuit 110b and the signal processing circuit 110f are arranged as objects to be translated.

[0065] According to this embodiment, the power supply lines can be shared by the signal processing circuit 110a and the signal processing circuit 110b, and the signal processing circuit 110e and the signal processing circuit 110f, respectively, and the circuit board area can be reduced compared to Embodiment 4.

[0066] (Embodiment 6) FIG. 8 shows the radiation detector of Embodiment 6. The radiation detector of Embodiment 6 is different from Embodiment 1 in that the horizontal scanning circuit 105 of the signal processing circuit 110a also functions as the horizontal scanning circuit of the signal processing circuit 110b. Except for this point and the points described below, since it is substantially the same as Embodiment 1, the description may be omitted.

[0067] In this embodiment, one horizontal scanning circuit is shared in adjacent signal processing circuits. In this embodiment, the signal processing circuit 110b is arranged upside-down with respect to the signal processing circuit 110a. The horizontal scanning circuit 105 of the signal processing circuit 110a and the horizontal scanning circuit 105 of the signal processing circuit 110b are shared, and one horizontal scanning circuit 105 controls the transfer of signals between the holding circuit 104 of the signal processing circuit 110a and the holding circuit 104 of the signal processing circuit 110b.

[0068] According to this embodiment, compared with Embodiment 1, the number of horizontal scanning circuits can be reduced, so that the corresponding area can be reduced. Also, since the horizontal scanning circuits are shared, the variation in the transfer of pixel signals to the digital signal processing circuit is reduced.

[0069] In FIG. 8, the horizontal scanning circuit 105 is shared and arranged between the signal processing circuit 110a and the signal processing circuit 110b, but this is not the only case.

[0070] (Embodiment 7) As Embodiment 7, a radiation imaging system incorporating a radiation detector will be described with reference to FIG. 9.

[0071] The radiation imaging system 1100 shown in FIG. 9 includes a radiation imaging device 1101, an exposure control unit 1102, a radiation source 1103, and a computer 1104. As the radiation imaging device 1101, the radiation detectors described in Embodiments 1 to 6 can be used.

[0072] The radiation source 1103 starts radiation irradiation in accordance with an exposure command from the exposure control unit 1102. The radiation emitted from the radiation source 1103 passes through the imaging object (subject) and enters the imaging element 1001 of the radiation imaging device 1101. The radiation source 1103 stops radiation emission in accordance with a stop command from the exposure control unit 1102.

[0073] The radiation imaging device 1101 is, for example, a flat panel detector used for radiation imaging in medical image diagnosis, non-destructive inspection, etc. The radiation imaging device 1101 includes an imaging panel 1001P including a direct conversion type imaging element. The imaging panel 1001P of the radiation imaging device 1101 can be in the shape of a plate having a size corresponding to the size of the imaging object. For example, for a substrate of 550 mm × 445 mm, 3300 × 2800 pixels are arranged for the imaging element 1001.

[0074] The radiation imaging apparatus 1101 includes the above-described imaging panel 1001P, a control unit 1105 for controlling the imaging panel 1001P, and a signal processing unit 1106 for processing a signal output from the imaging panel 1001P. The signal processing unit 1106 may obtain a background component of the pixel signal output from the imaging panel 1001P and perform a process of subtracting the background component from the pixel signal. Further, the signal processing unit 1106 may, for example, A / D convert the signal output from the imaging panel 1001P and output it as digital image data to the computer 1104. Further, the signal processing unit 1106 may, for example, generate a stop signal for stopping the irradiation of radiation from the radiation source 1103 based on the signal output from the imaging panel 100P. The stop signal is supplied to the exposure control unit 1102 via the computer 1104, and the exposure control unit 1102 sends a stop command to the radiation source 1103 in response to the stop signal.

[0075] The control unit 1105 may be configured by, for example, a PLD (abbreviation for Programmable Logic Device) such as an FPGA (abbreviation for Field Programmable Gate Array), or an ASIC (abbreviation for Application Specific Integrated Circuit), or a general-purpose computer in which a program is incorporated, or a combination of all or part of these.

[0076] In the present embodiment, the signal processing unit 1106 is shown as being arranged in the control unit 1105 or being a part of the functions of the control unit 1105, but is not limited thereto. The control unit 1105 and the signal processing unit 1106 may be separate configurations. Further, the signal processing unit 1106 may be arranged separately from the radiation imaging apparatus 1101. For example, the computer 1104 may have the functions of the signal processing unit 1106. Therefore, the signal processing unit 1106 may be included in the radiation imaging system 1100 as a signal processing device that processes a signal output from the radiation imaging apparatus 1101.

[0077] The computer 1104 can control the radiation imaging device 1101 and the exposure control unit 1102, receive radiation image data from the radiation imaging device 1101, and perform processing for displaying it as a radiation image. Further, the computer 1104 can function as an input unit for a user to input conditions for capturing a radiation image.

[0078] As an example, the exposure control unit 1102 has an exposure switch. When the exposure switch is turned on by the user, in addition to sending an exposure command to the radiation source 1103, it sends a start notification indicating the start of radiation emission to the computer 1104. The computer 1104 that has received the start notification notifies the control unit 1105 of the radiation imaging device 1101 of the start of radiation irradiation in response to the start notification. In response to this, the control unit 1105 causes the imaging panel 1001P to generate a signal corresponding to the incident radiation.

[0079] (Embodiment 8) As Embodiment 8, another example of a radiation imaging system incorporating a radiation detector will be described with reference to FIGS. 10(a) and 10(b).

[0080] FIG. 10(a) shows an equipment EQP as a radiation imaging system including a radiation detector 1. The radiation detector 1 includes, in addition to an imaging element 1001 that is a semiconductor device, a package PKG for mounting the imaging element 1001.

[0081] The package PKG can include a substrate to which the imaging element 1001 is fixed, a lid such as glass facing the imaging element 1001, and connection members such as bonding wires and bumps that connect terminals provided on the substrate and terminals provided on the imaging element 1001. The imaging element 1001 has a pixel region 100 in which pixels are arranged in a matrix and a peripheral region PR around it. Vertical scanning circuits, signal processing circuits, etc. of Embodiments 1 to 6 can be provided in the peripheral region PR.

[0082] The equipment EQP may further include at least one of an optical system OPT, a control device CTRL, a processing device PRCS, a display device DSPL, a memory device MMRY, and a mechanical device MCHN. The optical system OPT forms an image of radiation on the radiation detector 1 and includes, for example, lenses, shutters, and mirrors. The optical system OPT may form an image of particle beams such as electron beams or proton beams on the radiation detector 1 according to the type of radiation to be handled. The control device CTRL controls the radiation detector 1 and is, for example, an ASIC. The processing device PRCS processes the signal output from the radiation detector 1 and is a device such as a CPU or an ASIC for constituting an AFE (analog front end) or a DFE (digital front end). The display device DSPL is an EL display device or a liquid crystal display device that displays the information obtained by the radiation detector 1 in a form such as a visible image. The memory device MMRY is a magnetic device or a semiconductor device that stores the information obtained by the radiation detector 1. The memory device MMRY is a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive. The mechanical device MCHN has a movable part or a propulsion part such as a motor or an engine.

[0083] The equipment EQP displays the signal output from the radiation detector 1 on the display device DSPL or transmits it externally by a communication device (not shown) provided in the equipment EQP. For this purpose, it is preferable that the equipment EQP further includes a memory device MMRY and a processing device PRCS separately from the memory circuit and the arithmetic circuit included in the radiation detector 1. The mechanical device MCHN may be controlled based on the signal output from the radiation detector 1.

[0084] The equipment EQP shown in FIG. 10(a) may be a medical device such as an endoscope or a radiation diagnostic device, a measuring device such as a distance measuring sensor, or an analytical device such as an electron microscope.

[0085] FIG. 10(b) is a schematic diagram showing the configuration of a transmission electron microscope (TEM) as an example of the equipment EQP. The equipment EQP as an electron microscope includes an electron beam source 1202 (electron gun), an irradiation lens 1204, a vacuum chamber 1201 (column), an objective lens 1206, a magnifying lens system 1207, and a camera 1209 as a radiation detector 1.

[0086] The electron beam 1203, which is an energy ray emitted from the electron beam source 1202, is focused by the irradiation lens 1204 and irradiated onto a sample S as an analysis target held by a sample holder. The space through which the electron beam 1203 passes is formed by the vacuum chamber 1201 (column), and this space is maintained in a vacuum. The radiation detector 1 is arranged so as to face the vacuum space through which the electron beam 1203 passes. The electron beam 1203 that has passed through the sample S is magnified by the objective lens 1206 and the magnifying lens system 1207 and projected onto the radiation detector 1. The electron optical system for irradiating the sample S with an electron beam is called an irradiation optical system, and the electron optical system for forming an image of the electron beam that has passed through the sample S on the radiation detector 1 is called an imaging optical system.

[0087] The electron beam source 1202 is controlled by an electron beam source control device 1211. The irradiation lens 1204 is controlled by an irradiation lens control device 1212. The objective lens 1206 is controlled by an objective lens control device 1213. The magnifying lens system 1207 is controlled by a magnifying lens system control device 1214. The control mechanism 1205 of the sample holder is controlled by a holder control device 1215 that controls the drive mechanism of the sample holder.

[0088] The electron beam 1203 that has passed through the sample S is detected by a direct detector 1200 of the camera 1209. The output signal from the direct detector 1200 is processed by a signal processing device 1216 and an image processing device 1218 as a processing device PRCS, and an image signal is generated. The generated image signal (transmission electron image) is displayed on an image display monitor 1220 and an analysis monitor 1221 corresponding to the display device DSPL.

[0089] Camera 1209 is provided at the lower part of the equipment EQP. Camera 1209 has a direct detector 1200 (Direct Electron Detector). The direct detector 1200 corresponds to the imaging device 100. At least a part of Camera 1209 is provided in Camera 1209 so as to be exposed to the vacuum space formed by the vacuum chamber 1201.

[0090] Each of the electron beam source control device 1211, the irradiation lens control device 1212, the objective lens control device 1213, the magnifying lens system control device 1214, and the holder control device 1215 is connected to the image processing device 1218. Thereby, data can be exchanged with each other in order to set the shooting conditions of the electron microscope. For example, the irradiation rate of the electron beam can be set to be 0.5 electron / pix / frm or less. In this case, the electron beam source control device 1211 and the image processing device 1218 function as control means for controlling the irradiation rate of the radiation. The drive control of the sample holder and the setting of the observation conditions of each lens can be performed according to the signal from the image processing device 1218.

[0091] The operator prepares the sample S to be imaged and sets the imaging conditions using the input device 1219 connected to the image processing device 1218. Predetermined data is input to the electron beam source control device 1211, the irradiation lens control device 1212, the objective lens control device 1213, and the magnifying lens system control device 1214, respectively, so as to obtain a desired acceleration voltage, magnification, and observation mode. In addition, the operator inputs conditions such as the number of consecutive field images, the imaging start position, and the moving speed of the sample holder to the image processing device 1218 using the input device 1219 such as a mouse, keyboard, or touch panel. It is also possible to adopt a specification in which the image processing device 1218 automatically sets the conditions without depending on the operator's input.

[0092] The radiation imaging systems described in Embodiment 7 and Embodiment 8 above are merely examples, and the radiation detectors described in Embodiments 1 to 6 may be applied to other systems.

[0093] (Other Embodiments) The present invention can also be realized by supplying a program that implements one or more functions of the above-described embodiments to a system or apparatus via a network or a storage medium, and causing one or more processors in a computer of the system or apparatus to read and execute the program. It can also be realized by a circuit (for example, an ASIC) that implements one or more functions.

[0094] The disclosure of this specification includes the complement of the concepts described in this specification. That is, for example, if this specification describes that "A is B" (A = B), even if the description that "A is not B" (A ≠ B) is omitted, this specification is considered to disclose or imply that "A is not B". This is because when the description that "A is B" is given, it is premised that the case where "A is not B" is considered.

[0095] The embodiments described above can be appropriately modified without departing from the technical idea. That is, the present invention can be implemented in various forms without departing from its technical idea or its main features. It is also possible to combine the respective embodiments. For example, in Embodiment 4, it is also possible to combine Embodiment 2 and arrange a plurality of signal processing circuits above and below the pixel region. Note that the disclosure of this specification includes not only what is described in this specification, but also all matters that can be grasped from this specification and the drawings attached to this specification. Also, the disclosure of this specification includes the complement of the concepts described in this specification. That is, for example, if this specification describes that "A is larger than B", even if the description that "A is not larger than B" is omitted, it can be said that this specification discloses that "A is not larger than B". This is because when the description that "A is larger than B" is given, it is premised that the case where "A is not larger than B" is considered.

[0096] The disclosure of this embodiment includes the following configurations.

[0097] (Configuration 1) A pixel region in which a plurality of pixels that directly convert radiation into charge are arranged side by side in a first direction and a second direction intersecting the first direction, A first output line connected to a first pixel among the plurality of pixels, A second output line connected to a second pixel arranged in the first direction side by side with the first pixel, A first signal processing circuit connected to the first output line, A second signal processing circuit connected to the second output line, and having, The first signal processing circuit includes a first drive circuit connected to the first output line, a first AD conversion circuit that compares a signal from the first output line, a first holding circuit that holds a signal from the first AD conversion circuit, and a first horizontal scanning circuit that controls transfer of a signal from the first holding circuit, A second drive circuit connected to the second output line, a second AD conversion circuit that compares a signal from the second output line, and a second holding circuit that holds a signal from the second AD conversion circuit, In a plan view seen from a third direction orthogonal to the first direction and the second direction, the first signal processing circuit is arranged between the pixel region and the second signal processing circuit, In the plan view, the first horizontal scanning circuit is arranged between the pixel region and the second AD conversion circuit, and a radiation detector characterized by this.

[0098] (Configuration 2) The second signal processing circuit includes a second horizontal scanning circuit that controls transfer of a signal from the second holding circuit, In the plan view, the first horizontal scanning circuit is arranged between the pixel region and the second horizontal scanning circuit, and the radiation detector according to Configuration 1, characterized by this.

[0099] (Configuration 3) In the plan view, the first horizontal scanning circuit is arranged between the first AD conversion circuit and the second AD conversion circuit, The radiation detector according to Configuration 1, wherein the first horizontal scanning circuit controls the transfer of signals from the second holding circuit.

[0100] (Configuration 4) The radiation detector according to Configuration 2, wherein in a plan view, the first drive circuit, the first AD conversion circuit, the first holding circuit, the first horizontal scanning circuit, the second drive circuit, the second AD conversion circuit, the second holding circuit, and the second horizontal scanning circuit are arranged in this order in the first direction.

[0101] (Configuration 5) The radiation detector according to Configuration 2 or 4, wherein in a plan view, the first drive circuit, the first AD conversion circuit, the first holding circuit, the first horizontal scanning circuit, the second horizontal scanning circuit, the second holding circuit, the second AD conversion circuit, and the second drive circuit are arranged in this order in the first direction.

[0102] (Configuration 6) A third output line connected to a third pixel arranged in the first direction alongside the first pixel and the second pixel among the plurality of pixels, and a third signal processing circuit connected to the third output line. The third signal processing circuit includes a third drive circuit connected to the third output line, a third AD conversion circuit that compares signals from the third output line, a third holding circuit that holds signals from the third AD conversion circuit, and a third horizontal scanning circuit that controls the transfer of signals from the third holding circuit. The radiation detector according to Configuration 2, 4, or 5, wherein in a plan view, the second horizontal scanning circuit is arranged between the first horizontal scanning circuit and the third horizontal scanning circuit.

[0103] (Configuration 7) A third output line connected to a third pixel arranged in the first direction alongside the first pixel and the second pixel among the plurality of pixels, a third signal processing circuit connected to the third output line The third signal processing circuit includes a third driving circuit connected to the third output line, a third AD conversion circuit that compares a signal from the third output line, a third holding circuit that holds a signal from the third AD conversion circuit, and a third horizontal scanning circuit that controls transfer of a signal from the third holding circuit. a fourth output line connected to a fourth pixel arranged in the first direction alongside the first pixel, the second pixel, and the third pixel among the plurality of pixels a fourth signal processing circuit connected to the fourth output line The fourth signal processing circuit includes a fourth driving circuit connected to the fourth output line, a fourth AD conversion circuit that compares a signal from the fourth output line, a fourth holding circuit that holds a signal from the fourth AD conversion circuit, and a fourth horizontal scanning circuit that controls transfer of a signal from the fourth holding circuit. In the plan view, the second driving circuit, the second AD conversion circuit, the second holding circuit, the second horizontal scanning circuit, the third horizontal scanning circuit, the third holding circuit, the third AD conversion circuit, and the third driving circuit are arranged in this order in the first direction. The first signal processing circuit and the second signal processing circuit are arranged as objects to be translated. The radiation detector according to Configuration 2, wherein the third signal processing circuit and the fourth signal processing circuit are arranged as objects to be translated.

[0104] (Configuration 8) a third output line connected to a third pixel arranged in the first direction alongside the first pixel and the second pixel among the plurality of pixels a third signal processing circuit connected to the third output line The third signal processing circuit includes a third driving circuit connected to the third output line, a third AD conversion circuit that compares a signal from the third output line, a third holding circuit that holds a signal from the third AD conversion circuit, and a third horizontal scanning circuit that controls transfer of a signal from the third holding circuit. A fourth output line connected to a fourth pixel arranged in the first direction alongside the first pixel, the second pixel, and the third pixel among the plurality of pixels, a fourth signal processing circuit connected to the fourth output line, and the fourth signal processing circuit includes a fourth driving circuit connected to the fourth output line, a fourth AD conversion circuit that compares a signal from the fourth output line, a fourth holding circuit that holds a signal from the fourth AD conversion circuit, and a fourth horizontal scanning circuit that controls transfer of a signal from the fourth holding circuit, in the plan view, the first driving circuit, the first AD conversion circuit, the first holding circuit, the first horizontal scanning circuit, the second horizontal scanning circuit, the second holding circuit, the second AD conversion circuit, and the second driving circuit are arranged in this order in the first direction, the first signal processing circuit and the third signal processing circuit are arranged as objects to be translated, The radiation detector according to Configuration 2, wherein the second signal processing circuit and the fourth signal processing circuit are arranged as objects to be translated.

[0105] (Configuration 9) The radiation detector according to any one of Configurations 1 to 8, wherein the first output line and the second output line are arranged so as to have a substantially uniform wiring length in the first direction.

[0106] (Configuration 10) A plurality of signal processing circuits including the first signal processing circuit and the second signal processing circuit are arranged in the first direction with respect to the pixel region, a reference signal generation circuit that inputs a reference signal common to the plurality of signal processing circuits, and The radiation detector according to any one of Configurations 1 to 9, wherein the reference signal generation circuit is arranged at a position equidistant from the signal processing circuit closest to the pixel region and the signal processing circuit farthest from the pixel region among the plurality of signal processing circuits.

[0107] (Configuration 11) The fifth pixel and the sixth pixel among the plurality of pixels, A fifth output line connected to the fifth pixel, A sixth output line connected to the sixth pixel, A fifth signal processing circuit connected to the fifth output line, A sixth signal processing circuit connected to the sixth output line, and having, The sixth pixel, the fifth pixel, the first pixel, and the second pixel are arranged in this order in the first direction, The fifth signal processing circuit includes a fifth driving circuit connected to the fifth output line, a fifth AD conversion circuit that compares a signal from the fifth output line, a fifth holding circuit that holds a signal from the fifth AD conversion circuit, and a fifth horizontal scanning circuit that controls transfer of a signal from the fifth holding circuit. The sixth signal processing circuit includes a sixth driving circuit connected to the sixth output line, a sixth AD conversion circuit that compares a signal from the sixth output line, a sixth holding circuit that holds a signal from the sixth AD conversion circuit, and a sixth horizontal scanning circuit that controls transfer of a signal from the sixth holding circuit. In the plan view, the fifth horizontal scanning circuit is arranged between the pixel region and the sixth horizontal scanning circuit, In the plan view, the pixel region is arranged between the sixth horizontal scanning circuit and the first horizontal scanning circuit, The radiation detector according to any one of Configurations 1 to 10.

[0108] (Configuration 12) A radiation source that irradiates a radiation imaging target, The radiation detector according to any one of Configurations 1 to 11, Control means for controlling a radiation irradiation rate so that an average value of the number of photons or particles of radiation incident per frame and per pixel of the radiation detector is 0.5 or less. A radiation imaging system, characterized by comprising.

Explanation of Signs

[0109] 100 Pixel area 101 Output line 102 Driving circuit 103 AD conversion circuit 104 Holding circuit 105 Horizontal scanning circuit 110 Signal processing circuit 120 Vertical scanning circuit 10 Pixels

Claims

1. A pixel region in which a plurality of pixels that directly convert radiation into charge are arranged side by side in a first direction and a second direction intersecting the first direction, A first output line connected to a first pixel among the plurality of pixels, A second output line connected to a second pixel arranged in the first direction side by side with the first pixel, A first signal processing circuit connected to the first output line, A second signal processing circuit connected to the second output line, and having, The first signal processing circuit includes a first drive circuit connected to the first output line, a first AD conversion circuit that compares signals from the first output line, a first holding circuit that holds signals from the first AD conversion circuit, and a first horizontal scanning circuit that controls transfer of signals from the first holding circuit, A second drive circuit connected to the second output line, a second AD conversion circuit that compares signals from the second output line, and a second holding circuit that holds signals from the second AD conversion circuit, In a plan view seen from a third direction orthogonal to the first direction and the second direction, the first signal processing circuit is arranged between the pixel region and the second signal processing circuit, In the plan view, the first horizontal scanning circuit is arranged between the pixel region and the second AD conversion circuit. A radiation detector characterized by this.

2. The second signal processing circuit includes a second horizontal scanning circuit that controls transfer of signals from the second holding circuit, In the plan view, the first horizontal scanning circuit is arranged between the pixel region and the second horizontal scanning circuit. The radiation detector according to claim 1, characterized by this.

3. In the plan view, the first horizontal scanning circuit is arranged between the first AD conversion circuit and the second AD conversion circuit, The first horizontal scanning circuit controls transfer of signals from the second holding circuit. The radiation detector according to claim 1, characterized by this.

4. In the plan view, the first drive circuit, the first AD conversion circuit, the first holding circuit, the first horizontal scanning circuit, the second drive circuit, the second AD conversion circuit, the second holding circuit, and the second horizontal scanning circuit are arranged in this order in the first direction. The radiation detector according to claim 2, characterized by this.

5. The radiation detector according to claim 2, wherein in a plan view, the first drive circuit, the first AD conversion circuit, the first holding circuit, the first horizontal scanning circuit, the second horizontal scanning circuit, the second holding circuit, the second AD conversion circuit, and the second drive circuit are arranged in this order in the first direction.

6. A third output line connected to a third pixel arranged in the first direction side by side with the first pixel and the second pixel among the plurality of pixels, A third signal processing circuit connected to the third output line, and The third signal processing circuit includes a third drive circuit connected to the third output line, a third AD conversion circuit that compares a signal from the third output line, a third holding circuit that holds a signal from the third AD conversion circuit, and a third horizontal scanning circuit that controls transfer of a signal from the third holding circuit. The radiation detector according to claim 2, wherein in a plan view, the second horizontal scanning circuit is arranged between the first horizontal scanning circuit and the third horizontal scanning circuit.

7. A third output line connected to a third pixel arranged in the first direction side by side with the first pixel and the second pixel among the plurality of pixels, A third signal processing circuit connected to the third output line, and The third signal processing circuit includes a third drive circuit connected to the third output line, a third AD conversion circuit that compares a signal from the third output line, a third holding circuit that holds a signal from the third AD conversion circuit, and a third horizontal scanning circuit that controls transfer of a signal from the third holding circuit. A fourth output line connected to a fourth pixel arranged in the first direction side by side with the first pixel, the second pixel, and the third pixel among the plurality of pixels, A fourth signal processing circuit connected to the fourth output line, and The fourth signal processing circuit includes a fourth drive circuit connected to the fourth output line, a fourth AD conversion circuit that compares a signal from the fourth output line, a fourth holding circuit that holds a signal from the fourth AD conversion circuit, and a fourth horizontal scanning circuit that controls transfer of a signal from the fourth holding circuit. In the plan view, the second drive circuit, the second AD conversion circuit, the second holding circuit, the second horizontal scanning circuit, the third horizontal scanning circuit, the third holding circuit, the third AD conversion circuit, and the third drive circuit are arranged in this order in the first direction. The first signal processing circuit and the second signal processing circuit are arranged as objects to be translated. The radiation detector according to claim 2, wherein the third signal processing circuit and the fourth signal processing circuit are arranged as objects to be translated.

8. A third output line connected to a third pixel arranged in the first direction beside the first pixel and the second pixel among the plurality of pixels, A third signal processing circuit connected to the third output line. The third signal processing circuit includes a third drive circuit connected to the third output line, a third AD conversion circuit that compares a signal from the third output line, a third holding circuit that holds a signal from the third AD conversion circuit, and a third horizontal scanning circuit that controls transfer of a signal from the third holding circuit. A fourth output line connected to a fourth pixel arranged in the first direction beside the first pixel, the second pixel, and the third pixel among the plurality of pixels, A fourth signal processing circuit connected to the fourth output line. The fourth signal processing circuit includes a fourth drive circuit connected to the fourth output line, a fourth AD conversion circuit that compares a signal from the fourth output line, a fourth holding circuit that holds a signal from the fourth AD conversion circuit, and a fourth horizontal scanning circuit that controls transfer of a signal from the fourth holding circuit. In the plan view, the first drive circuit, the first AD conversion circuit, the first holding circuit, the first horizontal scanning circuit, the second horizontal scanning circuit, the second holding circuit, the second AD conversion circuit, and the second drive circuit are arranged in this order in the first direction. The first signal processing circuit and the third signal processing circuit are arranged as objects to be translated. The radiation detector according to claim 2, wherein the second signal processing circuit and the fourth signal processing circuit are arranged as objects to be translated.

9. The radiation detector according to claim 1, wherein the first output line and the second output line are arranged so as to have a substantially uniform wiring length in the first direction.

10. A plurality of signal processing circuits including the first signal processing circuit and the second signal processing circuit are arranged in the first direction with respect to the pixel region. It has a reference signal generation circuit that inputs a reference signal common to the plurality of signal processing circuits. The radiation detector according to claim 1, wherein the reference signal generation circuit is arranged at a position equidistant from the signal processing circuit closest to the pixel region and the signal processing circuit farthest from the pixel region among the plurality of signal processing circuits.

11. The fifth pixel and the sixth pixel among the plurality of pixels, A fifth output line connected to the fifth pixel, A sixth output line connected to the sixth pixel, A fifth signal processing circuit connected to the fifth output line, A sixth signal processing circuit connected to the sixth output line, and has, The sixth pixel, the fifth pixel, the first pixel, and the second pixel are arranged in this order in the first direction. The fifth signal processing circuit includes a fifth driving circuit connected to the fifth output line, a fifth AD conversion circuit that compares a signal from the fifth output line, a fifth holding circuit that holds a signal from the fifth AD conversion circuit, and a fifth horizontal scanning circuit that controls the transfer of a signal from the fifth holding circuit. The sixth signal processing circuit includes a sixth driving circuit connected to the sixth output line, a sixth AD conversion circuit that compares a signal from the sixth output line, a sixth holding circuit that holds a signal from the sixth AD conversion circuit, and a sixth horizontal scanning circuit that controls the transfer of a signal from the sixth holding circuit. In plan view, the fifth horizontal scanning circuit is arranged between the pixel region and the sixth horizontal scanning circuit. The radiation detector according to claim 1, wherein in plan view, the pixel region is arranged between the sixth horizontal scanning circuit and the first horizontal scanning circuit.

12. A radiation source that irradiates a radiation imaging target, The radiation detector according to any one of claims 1 to 11, Control means for controlling the irradiation rate of radiation so that the average value of the number of photons or particles of radiation incident per frame and per pixel of the radiation detector is 0.5 or less. A radiation imaging system characterized by comprising.

Images