Control device, burn-in device, and program

Abstract

To obtain a control device capable of shortening the test time of a burn-in test.SOLUTION: A control device is configured to execute a burn-in test on a plurality of semiconductor elements as test targets connected to a plurality of sockets arranged on a burn-in board. The control device includes a setting unit for setting a cycle of a pulse signal indicating at least one of a read signal and a write signal of each semiconductor element, on the basis of the arrangement position of each socket on the burn-in board and a control unit for executing at least one of a read operation and a write operation of data on the plurality of semiconductor elements, on the basis of the cycle set by the setting unit.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to a control device, a burn-in device, and a program. [Background technology]

[0002] Burn-in testing is a type of pre-shipment testing for electronic devices. In this test, multiple electronic devices connected to multiple sockets on a burn-in board are subjected to electrical stress under a high temperature environment to screen for initial defects.

[0003] Patent Document 1 discloses a burn-in apparatus comprising a heating bath, a burn-in board, a relay board, and a driver board as a control device. The burn-in board is housed in the heating bath with multiple electronic devices to be tested attached to multiple sockets. The relay board is arranged to penetrate the side wall of the heating bath. The connection terminals on the bath side of the relay board are connected to the connection terminals on the board side of the burn-in board. The driver board is arranged in a rear chamber adjacent to the heating bath and is connected to the relay board on the side opposite the burn-in board. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2022-138609 Summary of the Invention [Problem to be solved by the invention]

[0005] The wiring length connecting the connector and socket of the burn-in board varies greatly between sockets close to the connector and sockets far from the connector, and this difference in wiring length becomes particularly noticeable on larger burn-in boards.

[0006] When the test subject of a burn-in test is a semiconductor device such as a flash memory, the burn-in equipment repeatedly writes data to the semiconductor device and reads data from the semiconductor device. In a data read operation, the control device inputs a read signal to the semiconductor device via a relay board. In response to the input read signal, the semiconductor device reads data corresponding to the read signal and inputs the read data to the control device via the relay board. For example, when reading data from a semiconductor device that stores data in 8 bits, the control device inputs pulse signals indicating a semiconductor device selection signal and a read signal to the semiconductor device. The semiconductor device reads eight pieces of data indicating a binary logic "0" or "1" in response to the input pulse signal. In addition, a write signal is used in a data write operation.

[0007] The response speed of a semiconductor element in a data read operation and a data write operation is faster for a semiconductor element connected to a socket with a shorter wiring length, and is slower for a semiconductor element connected to a socket with a longer wiring length.

[0008] In the burn-in equipment according to the related art, the period of the pulse signal is set to correspond to the slowest response speed in order to prevent data errors during read and write operations. The set period is then applied to all semiconductor devices on the burn-in board. Therefore, for semiconductor devices connected to sockets with short wiring lengths, the period of the pulse signal is set excessively long, lengthening the overall burn-in test time.

[0009] An object of the present invention is to provide a control device, a burn-in device, and a program that can shorten the test time of a burn-in test. [Means for solving the problem]

[0010] A control device according to a first aspect of the present invention is a control device that performs a burn-in test on a plurality of semiconductor elements connected to a plurality of sockets arranged on a burn-in board, and includes a setting unit that sets the period of a pulse signal indicating at least one of a read signal and a write signal of each semiconductor element according to the position of each socket on the burn-in board, and a control unit that causes the plurality of semiconductor elements to perform at least one of a data read operation and a data write operation based on the period set by the setting unit.

[0011] According to the first aspect, the period of the pulse signal indicating at least one of the read signal and the write signal of each semiconductor element can be set to an appropriate value according to the arrangement position of each socket on the burn-in board, thereby shortening the test time of the burn-in test.

[0012] A control device according to a second aspect of the present invention is a control device according to the first aspect, wherein the burn-in board used in the burn-in test is provided with a connection terminal having a plurality of terminals for inputting and outputting signals to and from the control device, and the setting unit classifies the plurality of sockets into a plurality of groups according to the wiring length of the wiring connecting the connection terminal to each socket, and sets the period for each group of the plurality of groups.

[0013] According to the second aspect, the period of the pulse signal can be set to an optimum value for each group classified according to the wiring length.

[0014] A third aspect of the present invention provides the control device of the second aspect, wherein the setting unit sets the period shorter for a group having a shorter wiring length and sets the period longer for a group having a longer wiring length.

[0015] According to the third aspect, an optimum period can be set depending on the wiring length.

[0016] A fourth aspect of the present invention relates to a control device according to any one of the first to third aspects, wherein the setting unit sets the period according to the placement position of each socket by performing calibration before the burn-in test is performed.

[0017] According to the fourth aspect, the optimum period can be automatically set by performing calibration in advance.

[0018] A burn-in apparatus according to a fifth aspect of the present invention comprises a test chamber capable of accommodating a burn-in board having a plurality of sockets to which a plurality of semiconductor elements to be tested are connected, and a control device according to any one of the first to fourth aspects.

[0019] According to the fifth aspect, the period of the pulse signal indicating at least one of the read signal and the write signal of each semiconductor element can be set to an appropriate value according to the arrangement position of each socket on the burn-in board, thereby shortening the test time of the burn-in test.

[0020] A sixth aspect of the present invention provides a program for causing an information processing device to execute processing on an information processing device mounted on a control device that performs a burn-in test on a plurality of semiconductor elements connected to a plurality of sockets arranged on a burn-in board, the processing including setting a period of a pulse signal indicating at least one of a read signal and a write signal of each semiconductor element according to the arrangement position of each socket on the burn-in board, and causing the plurality of semiconductor elements to execute at least one of a data read operation and a data write operation based on the set period.

[0021] According to the sixth aspect, the period of the pulse signal indicating at least one of the read signal and the write signal of each semiconductor element can be set to an appropriate value according to the arrangement position of each socket on the burn-in board, thereby shortening the test time of the burn-in test. [Effects of the Invention]

[0022] According to the present invention, the test time for the burn-in test can be reduced. [Brief explanation of the drawings]

[0023] [Figure 1] 1 is a diagram showing a simplified configuration of a burn-in device according to an embodiment of the present invention; [Figure 2] FIG. 1 is a diagram showing a simplified configuration of a burn-in board. [Figure 3] FIG. 2 is a top view showing a simplified configuration of a burn-in board. [Figure 4] FIG. 2 is a diagram showing a simplified configuration of a test board. [Figure 5] FIG. 2 is a top view showing a simplified configuration of a burn-in board. [Figure 6] FIG. 2 is a diagram illustrating a plurality of pulse signals. DETAILED DESCRIPTION OF THE INVENTION

[0024] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Elements with the same reference numerals in different drawings indicate the same or corresponding elements.

[0025] 1 is a diagram showing a simplified configuration of a burn-in system 100 according to an embodiment of the present invention. The burn-in system 100 includes a burn-in board 1, a relay board 2, a test board 3, and a test chamber 4.

[0026] The burn-in board 1 has a plurality of sockets 31 arranged in a matrix. Each socket 31 accommodates and electrically connects a semiconductor device to be tested in the burn-in test. For example, the semiconductor device is a memory IC such as a packaged flash memory, and the socket 31 is an IC socket. In this embodiment, an example of a burn-in board 1 having a total of 64 sockets 31 arranged in 8 rows and 8 columns will be described, but the present invention is not limited to this example. The burn-in board 1 may also have a greater number of sockets 31, such as 16 rows and 16 columns.

[0027] In the burn-in test, the burn-in board 1 is housed in a test chamber 4. The test chamber 4 is, for example, a thermostatic chamber, and the temperature of the internal space can be set to a desired value. This allows thermal stress to be applied to the semiconductor elements in the burn-in test.

[0028] Relay board 2 is disposed so as to penetrate the side wall of test chamber 4. Relay board 2 has a female connection terminal 13 on the inside side of test chamber 4 and a male connection terminal 14 on the outside side of test chamber 4. Burn-in board 1 and relay board 2 are connected by connecting male connection terminal 12 of burn-in board 1 to connection terminal 13. Furthermore, test board 3 and relay board 2 are connected by connecting female connection terminal 15 of test board 3 to connection terminal 14.

[0029] The test board 3 functions as a control device that executes a burn-in test on a plurality of semiconductor devices connected to a plurality of sockets 31 arranged on the burn-in board 1 as test objects.

[0030] When the test subject of the burn-in test is a semiconductor device such as a flash memory, the test board 3 repeatedly writes data to the semiconductor device and reads data from the semiconductor device, and determines whether the written data matches the read data.

[0031] In a data write operation, the test board 3 inputs a write signal to the semiconductor element via the relay board 2. The semiconductor element writes the data in response to the input write signal. For example, when writing data to a semiconductor element whose data storage unit is 8 bits, the test board 3 inputs a semiconductor element selection signal and a write signal, which are pulse signals, to the semiconductor element via the relay board 2. The semiconductor element selection signal includes, for example, a chip enable signal. The write signal includes, for example, a write enable signal. In response to the input pulse signal, the semiconductor element writes eight pieces of data representing binary logic "0" or "1" to a specified address.

[0032] In a data read operation, the test board 3 inputs a read signal to the semiconductor element via the relay board 2. In response to the input read signal, the semiconductor element reads data corresponding to the read signal and inputs the read data to the test board 3 via the relay board 2. For example, when reading data from a semiconductor element whose data storage unit is 8 bits, the test board 3 inputs a semiconductor element selection signal and a read signal, which are pulse signals, to the semiconductor element via the relay board 2. The semiconductor element selection signal includes, for example, a chip enable signal. The read signal includes, for example, a read enable signal. In response to the input pulse signal, the semiconductor element reads eight pieces of data representing binary logic "0" or "1" from a specified address. The semiconductor element inputs the read data to the test board 3 via the relay board 2.

[0033] FIG. 2 is a simplified diagram showing the configuration of the burn-in board 1. The burn-in board 1 includes a printed circuit board 21. A plurality of sockets 31 are mounted on the surface of the printed circuit board 21. A plurality of wirings 32 (not shown in FIG. 2) are formed on the printed circuit board 21, connecting the connection terminals 12 to the plurality of sockets 31. The connection terminals 12 are arranged on the side of the printed circuit board 21. The connection terminals 12 have a plurality of terminals for inputting and outputting signals between the burn-in board 1 and the test board 3 via the relay board 2. The signals input from the test board 3 to the burn-in board 1 include a write signal that instructs writing data to the semiconductor element and a read signal that instructs reading data from the semiconductor element. The signals input from the burn-in board 1 to the test board 3 include data read from the semiconductor element in response to the read signal.

[0034] 3 is a top view showing a simplified configuration of the printed circuit board 21. On the surface of the printed circuit board 21, a total of 64 sockets 31 are arranged in 8 rows and 8 columns. 11 ~31 18 ,31 21 ~31 28 ,31 31~31 38 ,31 41 ~31 48 ,31 51 ~31 58 ,31 61 ~31 68 ,31 71 ~31 78 ,31 81 ~31 88 are mounted on the printed circuit board 21. Furthermore, a plurality of wirings 32 are formed on the surface of the printed circuit board 21, connecting the connection terminals 12 and the plurality of sockets 31. If the printed circuit board 21 has a laminated structure including a plurality of wiring layers, the wirings 32 may be formed on any of the wiring layers, not just on the surface of the printed circuit board 21.

[0035] FIG. 3 shows the connection terminal 12 and the socket 31 41 ~31 48 Wiring 32 connecting 41 ~32 48 3, only one wiring 32 is shown, but similar wiring 32 is formed for the other sockets 31. Also, although each wiring 32 is shown as a single line in Fig. 3, each wiring 32 includes multiple wirings, such as a wiring for transmitting write signals and read signals input from the test board 3 to the semiconductor element, and a wiring for transmitting data input from the semiconductor element to the test board 3.

[0036] The length of the wiring 32 is shorter for the socket 31 closer to the connection terminal 12 and longer for the socket 31 farther from the connection terminal 12. 41 ~32 48 Regarding the socket 31 closest to the connection terminal 12, 41 Wiring connected to 32 41 The wiring length of the socket 31 is the shortest and the socket 31 is the furthest from the connection terminal 12. 48 Wiring connected to 32 48 The wiring length is the longest.

[0037] 4 is a simplified diagram showing the configuration of the test board 3. The test board 3 includes a processing unit 41 and a storage unit 42. The processing unit 41 includes a processor such as a CPU. The storage unit 42 includes a storage medium such as a semiconductor memory. The storage unit 42 stores a program 61 and setting information 62.

[0038] The processing unit 41 has a setting unit 51 and a control unit 52 as functions realized by the processor executing a program 61 read from a non-volatile storage medium.

[0039] The setting unit 51 sets the period of the pulse signals indicating the read signal and write signal of each semiconductor element in accordance with the arrangement position of each socket 31 on the burn-in board 1. The setting unit 51 stores setting information 62 indicating the set period in the storage unit 42. Note that the function of the setting unit 51 may be provided by a computer externally connected to the test board 3 instead of a processor mounted on the test board 3.

[0040] FIG. 5 is a top view showing a simplified configuration of the burn-in board 1. In this embodiment, the connection terminals 15 of the test board 3 have 128 data input / output terminals, and each socket 31 has 8 data input / output terminals. In this case, the number of semiconductor devices that can be simultaneously measured in the burn-in test (referred to as the "number of simultaneous measurements") is 128 / 8=16. The setting unit 51 classifies the sockets 31 into groups based on the length of the wiring 32 connecting the connection terminals 12 to each socket 31. In this embodiment, the number of sockets 31 is 64, and the number of simultaneous measurements is 16. Therefore, the setting unit 51 classifies the 64 sockets 31 into four groups Ga to Gd (64 / 16=4 groups). Each group corresponds to a unit in which the test board 3 can simultaneously write data to and read data from a semiconductor device.

[0041] Each of the groups Ga to Gd includes 16 sockets 31. For example, the group Ga closest to the connection terminal 12 includes the sockets 31 belonging to the first and second rows. 11 ,3112 ,31 21 ,31 22 ,31 31 ,31 32 ,31 41 ,31 42 ,31 51 ,31 52 ,31 61 ,31 62 ,31 71 ,31 72 ,31 81 ,31 82 The group Gd farthest from the connection terminal 12 includes the sockets 31 belonging to the seventh and eighth rows. 17 ,31 18 ,31 27 ,31 28 ,31 37 ,31 38 ,31 47 ,31 48 ,31 57 ,31 58 ,31 67 ,31 68 ,31 77 ,31 78 ,31 87 ,31 88 Includes:

[0042] 6 is a diagram showing a plurality of pulse signals Ra to Rd. The pulse signals Ra to Rd correspond to read signals of the semiconductor elements belonging to groups Ga to Gd, respectively. When the data storage unit of the semiconductor elements is 8 bits, 8-bit data D1 to D8 indicating binary logic "0" or "1" are read out from the eight input / output terminals of each semiconductor element in response to the read signal.

[0043] The setting unit 51 sets the period of the pulse signal Ra to 250 ns, the period of the pulse signal Rb to 300 ns, the period of the pulse signal Rc to 350 ns, and the period of the pulse signal Rd to 400 ns. Note that the set values of the periods are not limited to this example. Alternatively, a user may set multiple candidate values for the set value of the period in advance, and the setting unit 51 may select a set value from the multiple candidate values.

[0044] The setting unit 51 stores setting information 62 indicating the set period in the storage unit 42. The setting information 62 includes identification information of the sockets 31 belonging to each of the groups Ga to Gd and a set value of the period for each of the groups Ga to Gd.

[0045] The control unit 52 controls the execution of the burn-in test. In the burn-in test, the control unit 52 repeatedly writes data to the semiconductor elements and reads data from the semiconductor elements, and determines whether the written data matches the read data.

[0046] In a data read operation, the control unit 52 inputs a read signal to the semiconductor elements via the relay board 2. In addition, in a data read operation, the control unit 52 refers to the setting information 62 to cause the plurality of semiconductor elements to execute a data read operation at the period of the pulse signal set according to the arrangement position of the socket 31.

[0047] For example, the control unit 52 sequentially selects eight bit lines connected to eight adjacent cell transistors that share a word line in the flash memory using a pulse signal Ra with a period of 250 ns, thereby causing the semiconductor elements to read 8 bits of data at a period of 250 ns. As a result, the semiconductor elements belonging to group Ga output data D1 to D8 read using the pulse signal Ra (read signal) with a period of 250 ns. The semiconductor elements belonging to group Gb output data D1 to D8 read using a pulse signal Rb (read signal) with a period of 300 ns. The semiconductor elements belonging to group Gc output data D1 to D8 read using a pulse signal Rc (read signal) with a period of 350 ns. The semiconductor elements belonging to group Gd output data D1 to D8 read using a pulse signal Rd (read signal) with a period of 400 ns. In a data write operation, data is written to the semiconductor elements belonging to group Ga using a pulse signal Ra (write signal) with a period of 250 ns. Data is written to semiconductor elements belonging to group Gb by a pulse signal Rb (write signal) with a period of 300 ns. Data is written to semiconductor elements belonging to group Gc by a pulse signal Rc (write signal) with a period of 350 ns. Data is written to semiconductor elements belonging to group Gd by a pulse signal Rd (write signal) with a period of 400 ns. Note that the periods of the read signal and write signal set for the same group may be different.

[0048] According to this embodiment, the period of the pulse signals Ra to Rd, which indicate at least one of the read signal and the write signal of each semiconductor device, can be set to an appropriate value depending on the arrangement position of each socket 31 on the burn-in board 1. As a result, the test time of the burn-in test can be shortened. In particular, when a large burn-in board with a large number of sockets is used, or when a semiconductor device with multiple memory chips mounted in a single package is to be tested, the effect of shortening the test time according to the present invention is significant.

[0049] Furthermore, according to this embodiment, the setting unit 51 classifies the sockets 31 into groups Ga to Gd according to the lengths of the wires 32 connecting the connection terminals 12 and the sockets 31, and sets the periods of the pulse signals Ra to Rd for each group. This allows the periods of the pulse signals Ra to Rd to be set to optimal values for each group classified according to the wire lengths.

[0050] Furthermore, according to this embodiment, the setting unit 51 sets a shorter period for a group with a shorter wiring length, and sets a longer period for a group with a longer wiring length, thereby making it possible to set an optimum period depending on the wiring length.

[0051] (Variation) The setting unit 51 may perform calibration before the burn-in test, thereby setting the cycle according to the arrangement position of each socket 31. For example, after the burn-in board 1 on which a plurality of semiconductor elements are mounted is placed in the test chamber 4, calibration is performed before the temperature of the internal space of the test chamber 4 is increased.

[0052] In the calibration, the setting unit 51 first sets initial values of the periods by referring to past performance values for semiconductor devices of the same type. For example, the setting unit 51 sets initial values of 250 ns for group Ga, 300 ns for group Gb, 350 ns for group Gc, and 400 ns for group Gd.

[0053] Next, the setting unit 51 writes data of a predetermined value to a plurality of semiconductor elements belonging to each group at an initial value cycle, and then reads the data from the plurality of semiconductor elements at an initial value cycle.

[0054] Next, the setting unit 51 calculates, for each group, the ratio of semiconductor elements in which the written data matches the read data, among the plurality of semiconductor elements.

[0055] The setting unit 51 resets the period to a shorter value than the initial value for groups whose ratio is equal to or greater than the threshold value, and resets the period to a longer value than the initial value for groups whose ratio is less than the threshold value.

[0056] Next, the setting unit 51 writes data of a predetermined value to the plurality of semiconductor elements at the reset cycle, and then reads the data from the plurality of semiconductor elements at the reset cycle.

[0057] The setting unit 51 repeats the above process multiple times to search for the optimum period for each group.

[0058] According to this modification, an optimal cycle can be automatically set for each group by performing a calibration before the start of the burn-in test.

[0059] However, instead of automatically setting the optimum cycle, the optimum cycle may be presented to the user by displaying it on a screen or the like, and the user may decide whether or not to adopt it.

[0060] In order to shorten the time required for calibration, the optimum period may be searched only for the group Ga closest to the connection terminal 12 and the group Gd farthest from the connection terminal 12, and the periods for the intermediate groups Gb and Gc may be set by evenly allocating the optimum periods from the groups Ga and Gd at both ends. [Explanation of symbols]

[0061] 1 Burn-in Board 3 Test Board 4 Test Tank 12 Connection terminal 31,31 11 ~31 88 socket 32,32 41 ~32 48 wiring 41 Processing section 51 Setting section 52 Control section 61 Programs 62 Setting information 100 Burn-in Equipment

Claims

1. A control device that performs a burn-in test on a plurality of semiconductor devices connected to a plurality of sockets arranged on a burn-in board, a setting unit that sets a period of a pulse signal indicating at least one of a read signal and a write signal of each semiconductor element in accordance with the arrangement position of each socket on the burn-in board; a control unit that causes the plurality of semiconductor elements to execute at least one of a data read operation and a data write operation based on the cycle set by the setting unit; A control device comprising:

2. the burn-in board used in the burn-in test includes a connection terminal having a plurality of terminals for inputting and outputting signals to and from the control device, The setting unit classifying the sockets into a plurality of groups according to the lengths of the wires connecting the connection terminals to the sockets; The period is set for each of the plurality of groups. The control device according to claim 1 .

3. the setting unit sets the period to be shorter for a group having a shorter wiring length, and sets the period to be longer for a group having a longer wiring length; The control device according to claim 2 .

4. the setting unit sets the period in accordance with the arrangement position of each socket by performing calibration before the burn-in test is performed. The control device according to claim 1 .

5. a test chamber capable of accommodating a burn-in board having a plurality of sockets arranged thereon to which a plurality of semiconductor elements to be tested are connected; A control device according to any one of claims 1 to 4; A burn-in device comprising:

6. A program for causing an information processing device to execute processing, the information processing device being mounted on a control device that executes a burn-in test on a plurality of semiconductor devices connected to a plurality of sockets arranged on a burn-in board as test subjects, the program comprising: The process comprises: setting a period of a pulse signal indicating at least one of a read signal and a write signal for each semiconductor element in accordance with the arrangement position of each socket on the burn-in board; causing the plurality of semiconductor elements to execute at least one of a data read operation and a data write operation based on the set cycle; program.

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