Imaging device

The imaging device uses two capacitors and OS transistors to capture images across a wide dynamic range, enhancing image quality and miniaturization by controlling charge storage and reducing leakage current.

JP2025122235AInactive Publication Date: 2025-08-20SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2025094090
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2019-10-11
Filing Date
2025-06-05
Publication Date
2025-08-20
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

There is a demand for an imaging device that can capture images in a range of light levels equivalent to or greater than human vision, from dark to bright environments, while maintaining high image quality and requiring miniaturization.

Method used

The imaging device incorporates two capacitors per pixel, a large and a small one, with transistors made of oxide semiconductors (OS transistors) to control charge overflow and reset, allowing charge storage across a wide illuminance range without saturation, and is integrated with silicon transistors on a silicon substrate.

Benefits of technology

This configuration enables the imaging device to capture images across a wide dynamic range with improved signal-to-noise ratio and reduced image degradation, achieving high image quality and miniaturization.

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Abstract

To provide an imaging device that can capture with a luminous quantity range more than or equal to the human vision from a dark to bright environment, by which the dynamic range is expanded and the higher quality is achieved.SOLUTION: In order to obtain an image with an expanded dynamic range, two capacitors including a large capacitor and a small capacitor are provided in one pixel. The large capacitor is formed to be held between a transistor that controls the amount of charges overflowing from the small capacitor and a transistor that resets the accumulated charges. These two transistors are OS transistors. Since the OS transistor has an extremely low off-state current characteristic, the dynamic range of the capture can be expanded.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] One embodiment of the present invention relates to an imaging device including an oxide semiconductor and a manufacturing method thereof.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. One embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. One embodiment of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, more specific examples of the technical field of one embodiment of the present invention disclosed in this specification and the like include semiconductor devices, imaging devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices, input / output devices, driving methods thereof, and manufacturing methods thereof.

[0003] In this specification, the term "semiconductor device" refers to any device that can function by utilizing semiconductor characteristics, and imaging devices, electro-optical devices, semiconductor circuits, and electronic equipment are all included in the category of semiconductor devices. [Background technology]

[0004] Image sensors are widely used as imaging components in digital cameras, video cameras, and other security equipment. Security cameras must capture accurate images not only in bright daylight but also at night and in poorly lit areas, requiring image sensors with a wide dynamic range.

[0005] Furthermore, Patent Document 1 discloses an imaging device in which a transistor including an oxide semiconductor is used in part of a pixel circuit.

[0006] Furthermore, Patent Document 2 discloses a solid-state imaging device and an optical sensor that can achieve a wide dynamic range. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2017-55403 [Patent Document 2] Japanese Patent Application Laid-Open No. 2005-328493 Summary of the Invention [Problem to be solved by the invention]

[0008] There is a demand for an imaging device that can capture images in a range of light intensity equivalent to or greater than that of human vision, from dark to bright environments. One of the challenges is to develop an imaging device that can expand the dynamic range and achieve high image quality.

[0009] Another issue is miniaturization of the imaging device. [Means for solving the problem]

[0010] In order to obtain images with an expanded dynamic range, one pixel is provided with two capacitors, one large and one small. When it is dark, charge is stored only in the small capacitor, and when it is bright, not only the small capacitor but also the charge that overflows from the small capacitor is stored in the large capacitor. This allows charge to be stored according to the illuminance over a wide range of illuminance without saturating the output, and the charge is output.

[0011] The large capacitor is sandwiched between a transistor for controlling the amount of charge overflowing from the small capacitor and a transistor for resetting the accumulated charge. For example, these two transistors are transistors whose active layers are made of oxide semiconductors (hereinafter referred to as OS transistors). OS transistors have extremely low off-state current, which allows for a wider dynamic range of imaging.

[0012] Furthermore, two silicon transistors are connected to a photodiode formed in a silicon substrate, which may be a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, or a compound semiconductor substrate.

[0013] The silicon substrate may be an SOI (Silicon on Insulator) substrate or the like. The SOI substrate may be a SIMOX (Separation by Implanted Oxygen) substrate formed by implanting oxygen ions into a mirror-polished wafer and then heating it at a high temperature to form an oxide layer to a certain depth from the surface and eliminate defects that have occurred in the surface layer, or an SOI substrate formed using a Smart Cut method or an ELTRAN (registered trademark: Epitaxial Layer Transfer) method, which cleaves a semiconductor substrate by utilizing the growth of microvoids formed by hydrogen ion implantation through heat treatment. A transistor formed using a single-crystal substrate has a single-crystal semiconductor in the channel formation region.

[0014] This configuration allows for a circuit configuration with low leakage current, regardless of whether the image capture device is in bright or dark conditions. As a result, the signal-to-noise ratio (SNR) measured by the image capture device is improved, improving the image quality measured by the image capture device. Furthermore, by reducing leakage current using the OS transistor, image degradation is prevented before the image is read out.

[0015] The invention disclosed in this specification provides an imaging device including first to sixth transistors, a photoelectric conversion element, a first capacitor, and a second capacitor. One electrode of the photoelectric conversion element is electrically connected to one of a source or a drain of the first transistor, the other of the source or the drain of the first transistor is electrically connected to one of a source or a drain of a second transistor, the other of the source or the drain of the first transistor is electrically connected to one electrode of the first capacitor, the other of the source or the drain of the first transistor is electrically connected to a gate electrode of a third transistor, and the third transistor One of the source or drain of the transistor is electrically connected to one of the source or drain of the fourth transistor, the other of the source or drain of the second transistor is electrically connected to one electrode of the second capacitor, one electrode of the second capacitor is electrically connected to one of the source or drain of the fifth transistor, one of the source or drain of the sixth transistor is electrically connected to one of the source or drain of the first transistor, and the first transistor, the third transistor, the fourth transistor, and the sixth transistor are an imaging device having silicon in a region where a channel is formed.

[0016] In the above structure, the second transistor and the fifth transistor may be an imaging device including an oxide semiconductor in a channel formation region, or the second transistor and the fifth transistor may be an imaging device including silicon.

[0017] In the above configuration, the second capacitive element has a larger capacitance than the first capacitive element, and these capacitive elements are sometimes called Lateral Overflow Integration Capacitors (LOFICs).

[0018] In the above structure, the photoelectric conversion element and the first transistor are provided adjacent to each other, and the photoelectric conversion element and the source or drain of the sixth transistor are provided adjacent to each other and are manufactured over the same silicon substrate. [Effects of the Invention]

[0019] According to one embodiment of the present invention, an imaging device capable of capturing images in a range of light intensity equivalent to or greater than the human visual range, from dark to bright environments, can be realized. In addition, an imaging device capable of expanding the dynamic range and achieving high image quality can be manufactured. [Brief explanation of the drawings]

[0020] [Figure 1] FIG. 1 is an equivalent circuit diagram showing one embodiment of the present invention. [Figure 2] 2A and 2B are equivalent circuit diagrams showing variations. [Figure 3] FIG. 3 is a cross-sectional view of an image sensor chip according to an embodiment of the present invention. [Figure 4] FIG. 4 illustrates a configuration example of a transistor and a capacitor according to one embodiment of the present invention. [Figure 5] 5A to 5C are diagrams showing examples of the configuration of a transistor. [Figure 6] 6A to 6C are diagrams showing examples of the configuration of a transistor. [Figure 7] 7A to 7C are diagrams showing examples of the configuration of a transistor. [Figure 8] 8A to 8C are perspective views of a package containing an imaging device, and FIG. 8D is a cross-sectional view. [Figure 9] 9A to 9C are perspective views of a package containing an imaging device, and FIG. 9D is a cross-sectional view. [Figure 10] 10A to 10F are perspective views illustrating an electronic device. [Figure 11] FIG. 11 illustrates an example of a timing chart showing one embodiment of the present invention. [Figure 12]12A to 12G are examples of potential diagrams at each timing in the timing chart of FIG. DETAILED DESCRIPTION OF THE INVENTION

[0021] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various modifications can be made to the embodiments and details. Furthermore, the present invention should not be interpreted as being limited to the description of the embodiments shown below.

[0022] Note that the ordinal numbers such as "first" and "second" are used for convenience and do not indicate the order of processes or stacking. Therefore, for example, "first" can be appropriately replaced with "second" or "third" in the description. Furthermore, the ordinal numbers used to identify one embodiment of the present invention may not match those used in this specification.

[0023] For example, when the source (or first terminal, etc.) of the transistor is electrically connected to X via (or without) Z1 and the drain (or second terminal, etc.) of the transistor is electrically connected to Y via (or without) Z2, or when the source (or first terminal, etc.) of the transistor is directly connected to a part of Z1 and another part of Z1 is directly connected to X, and the drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2 and another part of Z2 is directly connected to Y, it can be expressed as follows.

[0024] For example, it can be expressed as follows: "X, Y, and the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor are electrically connected to each other, and are electrically connected in the order of X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y." Or, it can be expressed as follows: "The source (or first terminal, etc.) of the transistor is electrically connected to X, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are electrically connected in this order." Or, it can be expressed as follows: "X is electrically connected to Y via the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are connected in this order." By using expressions similar to these examples to specify the order of connections in a circuit configuration, the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor can be distinguished and the technical scope can be determined.

[0025] Alternatively, as another way of expressing this, for example, it can be expressed as follows: "The source (or first terminal, etc.) of the transistor is electrically connected to X via at least a first connection path, the first connection path does not have a second connection path, the second connection path is a path between the source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor via a transistor, the first connection path is a path via Z1, the drain (or second terminal, etc.) of the transistor is electrically connected to Y via at least a third connection path, the third connection path does not have the second connection path, and the third connection path is a path via Z2." Alternatively, it can be expressed as "the source (or first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first connection path, the first connection path does not have a second connection path, the second connection path has a connection path via a transistor, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third connection path, the third connection path does not have the second connection path." Alternatively, it can be expressed as follows: "The source (or first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first electrical path, the first electrical path does not have a second electrical path, the second electrical path is an electrical path from the source (or first terminal, etc.) of the transistor to the drain (or second terminal, etc.) of the transistor, and the drain (or second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third electrical path, the third electrical path does not have a fourth electrical path, and the fourth electrical path is an electrical path from the drain (or second terminal, etc.) of the transistor to the source (or first terminal, etc.) of the transistor." By using expression methods similar to these examples to define connection paths in a circuit configuration, it is possible to distinguish between the source (or first terminal, etc.) and the drain (or second terminal, etc.) of the transistor and determine the technical scope.

[0026] Note that these representation methods are merely examples and are not limited to these. Here, X, Y, Z1, and Z2 are assumed to be objects (for example, devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0027] Note that even when independent components are shown electrically connected in a circuit diagram, one component may have the functions of multiple components. For example, if part of a wiring also functions as an electrode, one conductive film has the functions of both wiring and an electrode. Therefore, the term "electrically connected" in this specification also includes such cases where one conductive film has the functions of multiple components.

[0028] (Embodiment 1) In this embodiment, an imaging device which is one embodiment of the present invention will be described with reference to drawings.

[0029] FIG. 1 is a circuit diagram of one of a plurality of pixels included in an imaging device of one embodiment of the present invention.

[0030] In the pixel, one electrode of the photoelectric conversion element PD is electrically connected to one of the source or drain of a transistor M1. The other of the source or drain of the transistor M1 is electrically connected to one of the source or drain of a transistor M2. The other of the source or drain of the transistor M1 is electrically connected to one of the electrodes of a first capacitance element C1. The other of the source or drain of the transistor M1 is electrically connected to the gate electrode of a transistor M3. One of the source or drain of the transistor M3 is electrically connected to one of the source or drain of a transistor M4. The other of the source or drain of the transistor M2 is electrically connected to one of the electrodes of a second capacitance element C2. One of the electrodes of the second capacitance element C2 is electrically connected to one of the source or drain of a transistor M5. One of the source or drain of the transistor M6 is electrically connected to one of the source or drain of the transistor M1.

[0031] Here, the node FD is connected to the other of the source or the drain of the transistor M1, the other of the source or the drain of the transistor M2, the gate electrode of the transistor M3, and one electrode of the first capacitance element C1.

[0032] The other electrode of the photoelectric conversion element PD is electrically connected to a wiring (VSS). The photoelectric conversion element PD generates and accumulates signal charges according to the amount of received light.

[0033] The other of the source and the drain of the transistor M5 is electrically connected to a wiring (VDD1), and the other of the source and the drain of the transistor M3 is electrically connected to a wiring (VDD2).

[0034] The other of the source and the drain of the transistor M4 is electrically connected to the wiring (OUT).

[0035] Note that although the above connection configuration of each element shows an example in which a plurality of transistors or a plurality of capacitor elements share a wiring to which they are electrically connected, they may each be electrically connected to a different wiring.

[0036] The transistor M1 functions as a transfer switch. It transfers the charge generated in the photoelectric conversion element PD to the node FD and is controlled by the gate TX. An overflow path is provided in the channel formation region of the transistor M1.

[0037] The transistor M2 can be called a second transfer switch, and is controlled by a gate SG. When the transistor M2 is turned on, it accumulates charge in the capacitance element C2.

[0038] The transistor M3 is a source follower transistor, and the gate thereof is connected to the node FD.

[0039] Transistor M4 is a select transistor and is controlled by gate SE.

[0040] The transistor M5 is a reset transistor and is controlled by the gate RST. The transistor M5 resets the capacitive element C1 connected to the node FD. At the same time, the transistor M5 also resets the capacitive element C2.

[0041] The transistor M6 is provided to reduce leakage current from the transistor M1, and is turned on when a signal is applied to the gate TL. The signal applied to the transistor M6 controls the transistor M6 to prevent leakage current from the capacitive element C1.

[0042] An example of a timing chart is shown in Figure 11. In Figure 11, the exposure period (accumulation period Exposure) and readout period (Readout) are indicated by arrows. At time T1 after exposure begins, a high gain mode period (HCG) occurs in which pixel signals are read out at a high conversion gain. HCGRST indicates the reset time, and HCGSIG indicates the output time. At time T5, a low gain mode period (LCG) occurs in which pixel signals are read out at a low conversion gain with the FD capacitance changed. LCGRST indicates the reset time, and LCGSIG indicates the output time. As shown in Figure 11, transistor M6 is driven by gate TL and turns on when it goes high after the exposure period. Note that FD indicates floating diffusion. Also, CS indicates a capacitance with a relatively deep potential.

[0043] In this embodiment, both the transistor M2 and the transistor M5 connected to the capacitor C2 are OS transistors that use an oxide semiconductor in their channel formation regions, and the other transistors are fabricated over a silicon substrate. Using OS transistors for the transistors M2 and M5 can reduce the amount of capacitance fluctuation due to leakage current. Alternatively, instead of using OS transistors for some of the transistors, both the transistor M2 and the transistor M5 may be silicon transistors, thereby shortening the fabrication process.

[0044] When the amount of light received by the photoelectric conversion element PD is large and charge overflows from the capacitance element C1 of the node FD, that is, when the illuminance is high, the charge is accumulated in the capacitance elements C1 and C2.

[0045] Furthermore, when the amount of light received by the photoelectric conversion element PD is small and the charge is stored in the capacitance element C1 of the node FD, that is, when the illuminance is low, the charge is stored only in the capacitance element C1.

[0046] Whether the illuminance is high or low, the readout operation of the pixel circuit is performed in the following order: reset period, high illuminance reset level readout period, low illuminance reset level readout period, photocharge transfer period, low illuminance signal level readout period, and high illuminance signal level readout period.

[0047] For driving methods of transistors other than transistor M6, examples of potential diagrams at each timing in the timing chart are shown in FIG. 12. FIG. 12A is an example of a potential diagram at time T1 in FIG. 11, FIG. 12B is an example of a potential diagram at time T2 in FIG. 11, and FIG. 12C is an example of a potential diagram at time T3 in FIG. 11. FIG. 12D is an example of a potential diagram at time T4 in FIG. 11, FIG. 12E is an example of a potential diagram at time T5 in FIG. 11, FIG. 12F is an example of a potential diagram at time T6 in FIG. 11, and FIG. 12G is an example of a potential diagram at time T7 in FIG. 11. Because driving methods for pixel circuits having a LOFIC structure are well known, detailed description thereof will be omitted here.

[0048] FIG. 2A also shows a configuration in which transistor M6 is removed from the circuit configuration of FIG. 1. Configuring at least transistors M2 and M5 as OS transistors results in a variation of FIG. 1. Note that forming transistors M1, M2, M3, M4, and M5 on a silicon substrate corresponds to a conventional example. Regarding the driving method of the circuit of FIG. 2A, the case in which transistors M1, M2, M3, M4, and M5 are formed on a silicon substrate is known as a pixel circuit having an LOFIC structure, and therefore, a description thereof will be omitted here.

[0049] The circuit shown in FIG. 2B is an example in which the first capacitor C1 shown in FIG. 2A is not illustrated. A node CS is also illustrated. In the circuit shown in FIG. 2B, when comparing a case in which the transistors M2 and M5 are formed on a silicon substrate with a case in which the transistors M2 and M5 are configured as OS transistors, the capacitance voltage fluctuation was estimated to be 11.2 mV in the former case and 0.37 nV in the latter case. The estimation was performed under the following conditions: a frame rate of 60 fps, a leakage current of the silicon transistor of 30 fA, a leakage current of the OS transistor of 1 zA, and a capacitance of 45 fF. As described above, when the imaging device of one embodiment of the present invention is configured to use OS transistors for the transistors M2 and M5, the capacitance voltage fluctuation due to leakage current can be reduced. Therefore, the dynamic range of the imaging device can be expanded.

[0050] FIG. 3 shows an example of a cross-sectional schematic diagram of a back-illuminated image sensor chip.

[0051] Figure 3 is a cross-sectional view of a chip fabricated by forming an OS transistor (OSFET) on a silicon transistor formed on a silicon substrate and then bonding it to a capacitive element C2 formed on another silicon substrate. The wiring layers on each silicon substrate are bonded together using bonding techniques such as Cu-Cu bonding or microbumps. Cu-Cu bonding is a technique for achieving electrical conductivity by connecting Cu (copper) pads together. A back gate may also be provided below the OSFET in Figure 3 to control the threshold voltage.

[0052] In Fig. 3, a microlens LENS is provided on the back surface of the silicon substrate. In Fig. 3, the silicon substrate and the microlens LENS are provided in contact with each other, but a color filter or black matrix may be provided between the silicon substrate and the microlens LENS.

[0053] A silicon substrate having a P-type well PWELL is doped with N-type impurities (such as phosphorus) to form N-type high concentration regions N+, which form the source region or drain region of each transistor.

[0054] 3 illustrates transistors M1, M4, and M6. The gate TL of transistor M6 is also illustrated. A P-type region P+ doped with a high concentration of P-type impurities (such as boron) is provided between the channel formation region of transistor M1 and the channel formation region of transistor M6. An N-type region N, which has a lower concentration than the N-type high-concentration region N+, is provided below the P-type region P+, and an N-type low-concentration region N-, which has a lower concentration than the N-type region N, is provided further below. The photoelectric conversion element PD is formed by stacking the P-type region P+, the N-type region N, and the N-type low-concentration region N-.

[0055] Although not shown in FIG. 3, the capacitor element C1 may be formed by forming the transistor M3 on a silicon substrate and forming an electrode on the gate of the transistor M3 via an insulating layer.

[0056] 3 shows an example of a back-illuminated (also called back-thinned) image sensor chip, but this is not particularly limited and may be a front-illuminated image sensor chip. Furthermore, this shows an example in which another silicon substrate having a capacitive element C2 is bonded, but this is not particularly limited and may be an image sensor chip in which the capacitive element C2 is stacked above the OS transistor without bonding another silicon substrate. Furthermore, this may be an image sensor chip in which a trench-type capacitor is stacked as the capacitive element C2.

[0057] (Embodiment 2) In this embodiment, a structure and a manufacturing process of an OS transistor (OSFET) used in the image sensor chip shown in FIG. 3 will be described below.

[0058] As an example, a structure in which transistors having different electrical characteristics are stacked will be described. This structure can increase the degree of freedom in designing a semiconductor device. Furthermore, stacking transistors having different electrical characteristics can increase the degree of integration of the semiconductor device. The transistor 500 in FIG. 4 is a transistor having an oxide semiconductor in a channel formation region, and the transistor 550 is an example of a transistor formed using a silicon substrate.

[0059] 5A is a cross-sectional view of a transistor 500 in the channel length direction, FIG. 5B is a cross-sectional view of the transistor 500 in the channel width direction, and FIG. 5C is a cross-sectional view of a transistor 550 in the channel width direction. For example, the transistor 500 corresponds to the transistor OSFET described in the first embodiment, and the transistor 550 corresponds to the transistor M1. The capacitor 600 in FIG. 4 corresponds to the capacitor C1 or C2. However, the OSFET in FIG. 3 corresponds to an example in which a conductor 503 (described later) is not provided.

[0060] The transistor 500 is an OS transistor. The off-state current of the transistor 500 is extremely low. Therefore, a data voltage or charge written to a storage node through the transistor 500 can be held for a long period of time. That is, the frequency of refresh operations of the storage node can be reduced or no refresh operations are required, thereby reducing the power consumption of the semiconductor device.

[0061] 5C , in the transistor 550, the top surface and the side surfaces in the channel width direction of the semiconductor region 313 are covered with a conductor 316 via an insulator 315. By forming the transistor 550 as a fin type in this way, the effective channel width is increased, thereby improving the on-state characteristics of the transistor 550. Furthermore, the contribution of the electric field of the gate electrode can be increased, thereby improving the off-state characteristics of the transistor 550.

[0062] The transistor 550 may be either a p-channel type or an n-channel type.

[0063] The region where the channel of the semiconductor region 313 is formed, the region nearby, the low-resistance region 314a that serves as the source region or drain region, and the low-resistance region 314b preferably contain a semiconductor such as a silicon-based semiconductor, and preferably contain single-crystal silicon. Alternatively, they may be formed of a material containing Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), or the like. A configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing may also be used. Alternatively, the transistor 550 may be a HEMT (High Electron Mobility Transistor) by using GaAs and GaAlAs, or the like.

[0064] The low resistance region 314a and the low resistance region 314b contain, in addition to the semiconductor material applied to the semiconductor region 313, an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron.

[0065] The conductor 316 functioning as the gate electrode can be made of a conductive material such as a semiconductor material, metal material, alloy material, or metal oxide material, such as silicon containing an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron.

[0066] Since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, it is preferable to use a material such as titanium nitride or tantalum nitride as the conductor. Furthermore, in order to achieve both conductivity and embeddability, it is preferable to use a metal material such as tungsten or aluminum as the conductor in a laminated state, and tungsten is particularly preferable in terms of heat resistance.

[0067] The transistor 550 may be formed using an SOI substrate or the like.

[0068] The SOI substrate may be a SIMOX substrate formed by implanting oxygen ions into a mirror-polished wafer and then heating it at a high temperature to form an oxide layer to a certain depth from the surface and eliminate defects that have occurred in the surface layer, or an SOI substrate formed using the Smart Cut method or the ELTRAN method (registered trademark), which cleaves a semiconductor substrate by utilizing the growth of microvoids formed by hydrogen ion implantation through heat treatment. A transistor formed using a single crystal substrate has a single crystal semiconductor in the channel formation region.

[0069] 4 is just an example, and the structure of the transistor 550 is not limited thereto. An appropriate transistor may be used depending on the circuit structure and driving method. For example, when the semiconductor device is a unipolar circuit including only OS transistors (meaning transistors with the same polarity, such as only n-channel transistors), the structure of the transistor 550 may be the same as that of the transistor 500, as shown in FIG. 4. The details of the transistor 500 will be described later.

[0070] An insulator 320, an insulator 322, an insulator 324, and an insulator 326 are stacked in this order over the transistor 550.

[0071] The insulators 320, 322, 324, and 326 can be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like.

[0072] In this specification, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen, aluminum oxynitride refers to a material whose composition contains more oxygen than nitrogen, and aluminum nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0073] The insulator 322 may function as a planarizing film that flattens steps caused by the transistor 550 or the like provided thereunder. For example, the top surface of the insulator 322 may be planarized by planarization treatment using a chemical mechanical polishing (CMP) method or the like to improve the planarity.

[0074] The insulator 324 is preferably a film having a barrier property that prevents hydrogen or impurities from diffusing from the substrate 311, the transistor 550, or the like to a region where the transistor 500 is provided.

[0075] An example of a film having a barrier property against hydrogen is silicon nitride formed by a CVD method. Here, hydrogen diffusion into a semiconductor element having an oxide semiconductor, such as the transistor 500, may degrade the characteristics of the semiconductor element. Therefore, it is preferable to use a film that suppresses hydrogen diffusion between the transistor 500 and the transistor 550. Specifically, the film that suppresses hydrogen diffusion is a film that releases a small amount of hydrogen.

[0076] The amount of desorption of hydrogen can be analyzed using, for example, thermal desorption spectroscopy (TDS). For example, the amount of desorption of hydrogen from the insulator 324 is calculated as 10×10 per area of the insulator 324 when the surface temperature of the film is in the range of 50° C. to 500° C. in TDS analysis. 15 atoms / cm 2 Less than or equal to 5 x 10 15 atoms / cm 2 The following is fine.

[0077] It is preferable that the insulator 326 has a lower dielectric constant than the insulator 324. For example, the relative dielectric constant of the insulator 326 is preferably less than 4, and more preferably less than 3. Furthermore, for example, the relative dielectric constant of the insulator 326 is preferably 0.7 times or less, and more preferably 0.6 times or less, the relative dielectric constant of the insulator 324. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance that occurs between wirings can be reduced.

[0078] Furthermore, insulators 320, 322, 324, and 326 are embedded with conductors 328 and 330, which connect to capacitor 600 or transistor 500. Conductors 328 and 330 function as plugs or wiring. Conductors that function as plugs or wiring may be collectively designated by the same reference numeral. In this specification and the like, a wiring and a plug connected to the wiring may be integrated. That is, a portion of a conductor may function as a wiring, and a portion of a conductor may function as a plug.

[0079] The materials for each plug and wiring (conductor 328, conductor 330, etc.) can be a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material, and can be used in a single layer or a laminated layer. High-melting-point materials such as tungsten and molybdenum, which have both heat resistance and conductivity, are preferably used, and tungsten is preferred. Alternatively, they are preferably formed from a low-resistance conductive material such as aluminum or copper. The use of a low-resistance conductive material can reduce the wiring resistance.

[0080] A wiring layer may be provided over the insulator 326 and the conductor 330. For example, in FIG. 4, the insulator 350, the insulator 352, and the insulator 354 are stacked in this order. The conductor 356 is formed in the insulator 350, the insulator 352, and the insulator 354. The conductor 356 functions as a plug or wiring connected to the transistor 550. Note that the conductor 356 can be formed using a material similar to that of the conductor 328 and the conductor 330.

[0081] Note that, for example, the insulator 350 preferably uses an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 356 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 350 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0082] Note that, for example, tantalum nitride or the like is preferably used as a conductor having a barrier property against hydrogen. Stacking tantalum nitride and highly conductive tungsten can suppress diffusion of hydrogen from the transistor 550 while maintaining the conductivity of the wiring. In this case, it is preferable that the tantalum nitride layer having a barrier property against hydrogen be in contact with the insulator 350 having a barrier property against hydrogen.

[0083] A wiring layer may be provided over the insulator 354 and the conductor 356. For example, in FIG. 4, the insulator 360, the insulator 362, and the insulator 364 are stacked in this order. The conductor 366 is formed in the insulator 360, the insulator 362, and the insulator 364. The conductor 366 functions as a plug or wiring. The conductor 366 can be formed using the same material as the conductor 328 and the conductor 330.

[0084] Note that, for example, the insulator 360 preferably uses an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 366 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 360 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0085] A wiring layer may be provided over the insulator 364 and the conductor 366. For example, in FIG. 4, an insulator 370, an insulator 372, and an insulator 374 are stacked in this order. A conductor 376 is formed in the insulator 370, the insulator 372, and the insulator 374. The conductor 376 functions as a plug or a wiring. The conductor 376 can be formed using a material similar to that of the conductor 328 and the conductor 330.

[0086] Note that, for example, the insulator 370 preferably uses an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 376 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 370 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0087] A wiring layer may be provided over the insulator 374 and the conductor 376. For example, in FIG. 4, an insulator 380, an insulator 382, and an insulator 384 are stacked in this order. A conductor 386 is formed in the insulator 380, the insulator 382, and the insulator 384. The conductor 386 functions as a plug or a wiring. The conductor 386 can be formed using a material similar to that of the conductor 328 and the conductor 330.

[0088] Note that, for example, the insulator 380 preferably uses an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 386 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 380 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0089] Although the above describes a wiring layer including the conductor 356, a wiring layer including the conductor 366, a wiring layer including the conductor 376, and a wiring layer including the conductor 386, the semiconductor device according to this embodiment is not limited to this. There may be three or fewer wiring layers similar to the wiring layer including the conductor 356, or there may be five or more wiring layers similar to the wiring layer including the conductor 356.

[0090] An insulator 510, an insulator 512, an insulator 514, and an insulator 516 are stacked in this order on the insulator 384. Any of the insulator 510, the insulator 512, the insulator 514, and the insulator 516 is preferably made of a substance that has a barrier property against oxygen and hydrogen.

[0091] For example, the insulator 510 and the insulator 514 are preferably formed using a film having a barrier property that prevents hydrogen or impurities from diffusing from the substrate 311 or a region where the transistor 550 is provided to a region where the transistor 500 is provided. Therefore, a material similar to that of the insulator 324 can be used.

[0092] An example of a film having a barrier property against hydrogen is silicon nitride formed by a CVD method. Here, hydrogen diffusion into a semiconductor element having an oxide semiconductor, such as the transistor 500, may degrade the characteristics of the semiconductor element. Therefore, a film that suppresses hydrogen diffusion is preferably used between the transistor 500 and the transistor 550. Specifically, the film that suppresses hydrogen diffusion is a film that releases a small amount of hydrogen.

[0093] As a film having a barrier property against hydrogen, for example, the insulators 510 and 514 are preferably made of a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0094] In particular, aluminum oxide has a high blocking effect against both oxygen and impurities such as hydrogen and moisture, which can cause fluctuations in the electrical characteristics of a transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500 during and after the transistor manufacturing process. Furthermore, aluminum oxide can suppress the release of oxygen from the oxide that constitutes the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0095] For example, the insulator 512 and the insulator 516 can be made of a material similar to that of the insulator 320. By using a material with a relatively low dielectric constant for these insulators, the parasitic capacitance generated between wirings can be reduced. For example, the insulators 512 and 516 can be made of a silicon oxide film or a silicon oxynitride film.

[0096] A conductor 518 and a conductor constituting the transistor 500 (for example, the conductor 503) are embedded in the insulators 510, 512, 514, and 516. The conductor 518 functions as a plug or wiring connected to the capacitor 600 or the transistor 550. The conductor 518 can be formed using a material similar to that of the conductor 328 and the conductor 330.

[0097] In particular, the conductor 518 in the region in contact with the insulator 510 and the insulator 514 is preferably a conductor having a barrier property against oxygen, hydrogen, and water. With this structure, the transistor 550 and the transistor 500 can be separated by a layer having a barrier property against oxygen, hydrogen, and water, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0098] Above the insulator 516 is the transistor 500 .

[0099] As shown in Figures 5A and 5B, transistor 500 has conductor 503 arranged so as to be embedded in insulator 514 and insulator 516, insulator 520 arranged on insulator 516 and conductor 503, insulator 522 arranged on insulator 520, insulator 524 arranged on insulator 522, oxide 530a arranged on insulator 524, oxide 530b arranged on oxide 530a, conductors 542a and 542b arranged apart from each other on oxide 530b, insulator 580 arranged on conductors 542a and 542b and having an opening formed therebetween overlapping conductors 542a and 542b, insulator 545 arranged on the bottom and side surfaces of the opening, and conductor 560 arranged on the surface on which insulator 545 is formed.

[0100] 5A and 5B, it is preferable that insulator 544 be disposed between oxide 530a, oxide 530b, conductor 542a, and conductor 542b and insulator 580. It is preferable that conductor 560 include conductor 560a disposed inside insulator 545 and conductor 560b disposed so as to be embedded inside conductor 560a. It is preferable that insulator 574 be disposed on insulator 580, conductor 560, and insulator 545, as shown in FIGS.

[0101] In this specification and other documents, the oxide 530a and the oxide 530b may be collectively referred to as the oxide 530.

[0102] Note that although the transistor 500 has a structure in which two layers of the oxide 530a and the oxide 530b are stacked in and around the channel formation region, the present invention is not limited to this. For example, a single layer of the oxide 530b or a stacked structure of three or more layers may be used.

[0103] Although the transistor 500 has a two-layer structure in which the conductor 560 is stacked, the present invention is not limited to this. For example, the conductor 560 may have a single-layer structure or a stacked structure of three or more layers. The transistor 500 shown in FIGS. 5A and 5B is merely an example and is not limited to this structure. An appropriate transistor may be used depending on the circuit configuration, driving method, and the like.

[0104] Here, the conductor 560 functions as the gate electrode of the transistor, and the conductors 542a and 542b function as the source and drain electrodes, respectively. As described above, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and in the region sandwiched between the conductors 542a and 542b. The arrangement of the conductors 560, 542a, and 542b is selected in a self-aligned manner with respect to the opening of the insulator 580. That is, in the transistor 500, the gate electrode can be positioned between the source and drain electrodes in a self-aligned manner. Therefore, the conductor 560 can be formed without providing a margin for alignment, thereby reducing the area occupied by the transistor 500. This allows for miniaturization and high integration of semiconductor devices.

[0105] Furthermore, since the conductor 560 is formed in a self-aligned manner in the region between the conductor 542a and the conductor 542b, the conductor 560 does not have a region that overlaps with the conductor 542a or the conductor 542b. This reduces the parasitic capacitance formed between the conductor 560 and the conductor 542a and between the conductor 560 and the conductor 542b. This improves the switching speed of the transistor 500 and provides high frequency characteristics.

[0106] The conductor 560 may function as a first gate (also referred to as a top gate) electrode. The conductor 503 may function as a second gate (also referred to as a bottom gate or back gate) electrode. In this case, the threshold voltage of the transistor 500 can be controlled by changing the potential applied to the conductor 503 independently of the potential applied to the conductor 560. In particular, applying a negative potential to the conductor 503 can increase the threshold voltage of the transistor 500 above 0 V and reduce the off-state current. Therefore, applying a negative potential to the conductor 503 can reduce the drain current when the potential applied to the conductor 560 is 0 V compared to when a negative potential is not applied.

[0107] The conductor 503 is arranged to overlap the oxide 530 and the conductor 560. In this way, when a potential is applied to the conductor 560 and the conductor 503, the electric field generated from the conductor 560 and the electric field generated from the conductor 503 are connected, and a channel formation region formed in the oxide 530 can be covered.

[0108] In this specification, a transistor configuration in which a channel formation region is electrically surrounded by the electric field of a pair of gate electrodes (a first gate electrode and a second gate electrode) is referred to as a surrounded channel (S-channel) structure. In this specification, the surrounded channel (S-channel) structure is characterized in that the side and periphery of the oxide 530 in contact with the conductors 542a and 542b, which function as source and drain electrodes, are I-type, similar to the channel formation region. Furthermore, the side and periphery of the oxide 530 in contact with the conductors 542a and 542b can be I-type, similar to the channel formation region, because they are in contact with the insulator 544. In this specification, I-type can be treated as the same as high-purity intrinsic oxide, as described later. The S-channel structure disclosed in this specification differs from the fin and planar structures. The S-channel structure enhances resistance to the short-channel effect, in other words, makes the transistor less susceptible to the short-channel effect.

[0109] The conductor 503 has a structure similar to that of the conductor 518, in which the conductor 503a is formed in contact with the inner walls of the openings of the insulators 514 and 516, and the conductor 503b is formed further inward. Note that although the transistor 500 has a structure in which the conductors 503a and 503b are stacked, the present invention is not limited to this. For example, the conductor 503 may have a single layer structure or a stacked structure of three or more layers.

[0110] Here, the conductor 503a is preferably made of a conductive material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (the impurities are less likely to permeate). Alternatively, it is preferably made of a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (the oxygen is less likely to permeate). In this specification, the function of suppressing the diffusion of impurities or oxygen refers to the function of suppressing the diffusion of any one or all of the impurities and oxygen.

[0111] For example, the conductor 503a has a function of suppressing the diffusion of oxygen, so that the conductor 503b can be prevented from being oxidized and its conductivity from decreasing.

[0112] Furthermore, when the conductor 503 also functions as a wiring, it is preferable that the conductor 503b be made of a highly conductive material containing tungsten, copper, or aluminum as a main component. Note that, although the conductor 503 is illustrated in this embodiment as a stack of the conductors 503a and 503b, the conductor 503 may have a single-layer structure.

[0113] The insulators 520, 522, and 524 function as a second gate insulating film.

[0114] Here, the insulator 524 in contact with the oxide 530 preferably contains more oxygen than the oxygen required for the stoichiometric composition. The oxygen is easily released from the film by heating. In this specification and elsewhere, oxygen released by heating may be referred to as "excess oxygen." In other words, the insulator 524 preferably has a region containing excess oxygen (also referred to as an "excess oxygen region"). By providing such an insulator containing excess oxygen in contact with the oxide 530, oxygen vacancies (V O When hydrogen enters the oxygen vacancy in the oxide 530, the defect (hereinafter referred to as V O H.) functions as a donor and may generate electrons as carriers. In addition, some of the hydrogen may bond with oxygen that is bonded to a metal atom to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to have normally-on characteristics. Furthermore, hydrogen in an oxide semiconductor is easily moved by stress such as heat or an electric field. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be reduced. In one embodiment of the present invention, V in the oxide 530 OIt is preferable to reduce H as much as possible to obtain high-purity intrinsic or substantially high-purity intrinsic V. O To obtain an oxide semiconductor with sufficiently reduced H, it is important to remove impurities such as moisture and hydrogen from the oxide semiconductor (also called "dehydration" or "dehydrogenation treatment") and to supply oxygen to the oxide semiconductor to compensate for oxygen vacancies (also called "oxygenation treatment"). O When an oxide semiconductor in which impurities such as H are sufficiently reduced is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0115] Specifically, it is preferable to use an oxide material from which a portion of oxygen is released by heating as an insulator having an excess oxygen region. The oxide material from which oxygen is released by heating is an oxide material from which the amount of released oxygen converted to oxygen atoms is 1.0 × 10 in TDS (Thermal Desorption Spectroscopy) analysis. 18 atoms / cm 3 or more, preferably 1.0 × 10 19 atoms / cm 3 More preferably, 2.0 × 10 19 atoms / cm 3 or more, or 3.0 x 10 20 atoms / cm 3 The oxide film is one having the above properties. The surface temperature of the film during the TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower.

[0116] Alternatively, the oxide 530 may be brought into contact with the insulator having the excess oxygen region and subjected to one or more of heat treatment, microwave treatment, and RF treatment. By performing such treatment, water or hydrogen in the oxide 530 can be removed. For example, a reaction occurs in the oxide 530 that breaks the VOH bond, in other words, "V OThe reaction "H → Vo + H" occurs, resulting in dehydrogenation. Some of the generated hydrogen may combine with oxygen to form HO, which may be removed from the oxide 530 or the insulator near the oxide 530. Some of the hydrogen may also be gettered by the conductor 542a and the conductor 542b.

[0117] The microwave treatment is preferably performed using, for example, an apparatus having a power source for generating high-density plasma or an apparatus having a power source for applying RF to the substrate side. For example, high-density oxygen radicals can be generated by using an oxygen-containing gas and high-density plasma, and the oxygen radicals generated by the high-density plasma can be efficiently introduced into the oxide 530 or an insulator near the oxide 530 by applying RF to the substrate side. The microwave treatment is performed at a pressure of 133 Pa or higher, preferably 200 Pa or higher, and more preferably 400 Pa or higher. The gases introduced into the microwave treatment apparatus may be, for example, oxygen and argon, with an oxygen flow ratio (O2 / (O2+Ar)) of 50% or less, preferably 10% to 30%.

[0118] During the manufacturing process of the transistor 500, heat treatment is preferably performed while the surface of the oxide 530 is exposed. The heat treatment may be performed, for example, at a temperature of 100° C. to 450° C., more preferably 350° C. to 400° C. Note that the heat treatment is performed in a nitrogen gas or inert gas atmosphere or an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more. For example, the heat treatment is preferably performed in an oxygen atmosphere. This allows oxygen to be supplied to the oxide 530, thereby reducing oxygen vacancies. The heat treatment may be performed under reduced pressure. Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere, followed by an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more to replenish desorbed oxygen. Alternatively, the heat treatment may be performed in an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more, followed by another heat treatment in a nitrogen gas or inert gas atmosphere.

[0119] By subjecting the oxide 530 to oxygen addition treatment, the oxygen vacancies in the oxide 530 can be repaired by the supplied oxygen, in other words, the reaction "Vo + O → null" can be promoted. Furthermore, the supplied oxygen reacts with the hydrogen remaining in the oxide 530, and the hydrogen can be removed as H2O (dehydration). As a result, the hydrogen remaining in the oxide 530 recombines with the oxygen vacancies to form V O The formation of H can be suppressed.

[0120] When the insulator 524 has an excess oxygen region, the insulator 522 preferably has a function of suppressing the diffusion of oxygen (for example, oxygen atoms, oxygen molecules, etc.) (preferably making the oxygen less permeable).

[0121] The insulator 522 preferably has a function of suppressing diffusion of oxygen and impurities, which prevents oxygen contained in the oxide 530 from diffusing toward the insulator 520. Furthermore, reaction of the conductor 503 with oxygen contained in the insulator 524 or the oxide 530 can be suppressed.

[0122] The insulator 522 is preferably a single-layer or multi-layer insulator containing a high-k material, such as aluminum oxide, hafnium oxide, oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more highly integrated, thinner gate insulating films can cause problems such as leakage current. Using a high-k material for the insulator that functions as the gate insulating film allows for a reduction in the gate potential during transistor operation while maintaining the physical film thickness.

[0123] In particular, an insulator containing an oxide of one or both of aluminum and hafnium, which is an insulating material that has the function of suppressing the diffusion of impurities and oxygen (i.e., is difficult for oxygen to permeate), is preferably used. As an insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) is preferably used. When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses oxygen release from the oxide 530 and the intrusion of impurities such as hydrogen into the oxide 530 from the periphery of the transistor 500.

[0124] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the above insulators.

[0125] Furthermore, it is preferable that the insulator 520 be thermally stable. For example, silicon oxide and silicon oxynitride are suitable because they are thermally stable. Furthermore, by combining a high-k insulator with silicon oxide or silicon oxynitride, it is possible to obtain the insulator 520 having a thermally stable layered structure with a high dielectric constant.

[0126] 5A and 5B, the second gate insulating film has a three-layer structure including insulators 520, 522, and 524. However, the second gate insulating film may have a single-layer structure, a two-layer structure, or a four- or more-layer structure. In this case, the second gate insulating film is not limited to a stack structure made of the same material, and may have a stack structure made of different materials.

[0127] The transistor 500 uses a metal oxide functioning as an oxide semiconductor for the oxide 530 including the channel formation region. For example, the oxide 530 may be a metal oxide such as In-M-Zn oxide (wherein M is one or more elements selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, or the like).

[0128] The metal oxide functioning as an oxide semiconductor may be formed by a sputtering method or an ALD (Atomic Layer Deposition) method. Note that the metal oxide functioning as an oxide semiconductor will be described in detail in other embodiments.

[0129] The metal oxide that functions as a channel formation region in the oxide 530 preferably has a band gap of 2 eV or more, preferably 2.5 eV or more. By using a metal oxide with a wide band gap, the off-state current of the transistor can be reduced.

[0130] The oxide 530 has the oxide 530a below the oxide 530b, and thus can suppress the diffusion of impurities from components formed below the oxide 530a to the oxide 530b.

[0131] Note that oxide 530 preferably has a stacked structure of multiple oxide layers with different atomic ratios of each metal atom. Specifically, the atomic ratio of element M among the constituent elements in the metal oxide used for oxide 530a is preferably greater than the atomic ratio of element M among the constituent elements in the metal oxide used for oxide 530b. Furthermore, the atomic ratio of element M to In in the metal oxide used for oxide 530a is preferably greater than the atomic ratio of element M to In in the metal oxide used for oxide 530b. Furthermore, the atomic ratio of In to element M in the metal oxide used for oxide 530b is preferably greater than the atomic ratio of In to element M in the metal oxide used for oxide 530a.

[0132] The energy of the conduction band minimum of the oxide 530a is preferably higher than that of the oxide 530b, or in other words, the electron affinity of the oxide 530a is preferably smaller than that of the oxide 530b.

[0133] Here, the energy level of the conduction band minimum changes gradually at the junction between the oxide 530a and the oxide 530b. In other words, the energy level of the conduction band minimum at the junction between the oxide 530a and the oxide 530b changes continuously or forms a continuous junction. To achieve this, it is preferable to reduce the defect level density of the mixed layer formed at the interface between the oxide 530a and the oxide 530b.

[0134] Specifically, when the oxide 530a and the oxide 530b have a common element (main component) other than oxygen, a mixed layer with a low density of defect states can be formed. For example, when the oxide 530b is an In-Ga-Zn oxide, the oxide 530a may be an In-Ga-Zn oxide, a Ga-Zn oxide, a gallium oxide, or the like.

[0135] In this case, the oxide 530b serves as the main carrier path. By configuring the oxide 530a as described above, the defect state density at the interface between the oxide 530a and the oxide 530b can be reduced. As a result, the influence of interface scattering on carrier conduction is reduced, and the transistor 500 can obtain a high on-state current.

[0136] Conductors 542a and 542b, which function as a source electrode and a drain electrode, are provided on oxide 530b. Conductors 542a and 542b are preferably made of a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, or an alloy containing any of the above metal elements or an alloy combining any of the above metal elements. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel is preferably used. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or materials that maintain conductivity even when absorbing oxygen.Furthermore, metal nitride films such as tantalum nitride are preferred because they have barrier properties against hydrogen or oxygen.

[0137] 5A, the conductors 542a and 542b are shown as single-layer structures, but they may be stacked with two or more layers. For example, a tantalum nitride film and a tungsten film may be stacked. Alternatively, a titanium film and an aluminum film may be stacked. Alternatively, a two-layer structure in which an aluminum film is stacked on a tungsten film, a two-layer structure in which a copper film is stacked on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is stacked on a titanium film, or a two-layer structure in which a copper film is stacked on a tungsten film may be used.

[0138] Other examples include a three-layer structure in which a titanium film or titanium nitride film is laminated on the titanium film or titanium nitride film, an aluminum film or copper film is laminated on the titanium film or titanium nitride film, and a titanium film or titanium nitride film is further formed thereon, and a three-layer structure in which a molybdenum film or molybdenum nitride film is laminated on the molybdenum film or molybdenum nitride film, an aluminum film or copper film is laminated on the molybdenum film or molybdenum nitride film, and a molybdenum film or molybdenum nitride film is further formed thereon. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may also be used.

[0139] 5A, regions 543a and 543b may be formed as low-resistance regions at and near the interface of the oxide 530 with the conductor 542a (conductor 542b). In this case, the region 543a functions as either a source region or a drain region, and the region 543b functions as the other. A channel formation region is formed in the region sandwiched between the regions 543a and 543b.

[0140] By providing the conductor 542a (conductor 542b) so as to be in contact with the oxide 530, the oxygen concentration in the region 543a (region 543b) may be reduced. Also, a metal compound layer containing the metal contained in the conductor 542a (conductor 542b) and components of the oxide 530 may be formed in the region 543a (region 543b). In such a case, the carrier density in the region 543a (region 543b) increases, and the region 543a (region 543b) becomes a low-resistance region.

[0141] The insulator 544 is provided to cover the conductors 542a and 542b and suppresses oxidation of the conductors 542a and 542b. In this case, the insulator 544 may be provided to cover the side surface of the oxide 530 and to be in contact with the insulator 524.

[0142] The insulator 544 can be a metal oxide containing one or more elements selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, magnesium, etc. Alternatively, the insulator 544 can be silicon nitride oxide, silicon nitride, or the like.

[0143] In particular, it is preferable to use, as the insulator 544, an insulator containing an oxide of either or both of aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate). Hafnium aluminate is particularly preferable because it has higher heat resistance than hafnium oxide film. Therefore, it is less likely to crystallize during heat treatment in a later process. Note that if the conductors 542a and 542b are made of oxidation-resistant materials or if their conductivity does not decrease significantly even when they absorb oxygen, the insulator 544 is not an essential component. It can be designed appropriately depending on the desired transistor characteristics.

[0144] The insulator 544 can prevent impurities such as water and hydrogen contained in the insulator 580 from diffusing into the oxide 530b through the insulator 545. The insulator 580 can also prevent the conductor 560 from being oxidized by excess oxygen.

[0145] The insulator 545 functions as a first gate insulating film. Like the insulator 524, the insulator 545 is preferably formed using an insulator that contains excess oxygen and releases oxygen by heating.

[0146] Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, and silicon oxide having vacancies can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat.

[0147] By using an insulator containing excess oxygen as the insulator 545, oxygen can be effectively supplied from the insulator 545 to the channel formation region of the oxide 530b. Similarly to the insulator 524, the concentration of impurities such as water or hydrogen in the insulator 545 is preferably reduced. The thickness of the insulator 545 is preferably 1 nm to 20 nm.

[0148] Furthermore, a metal oxide may be provided between the insulator 545 and the conductor 560 to efficiently supply excess oxygen contained in the insulator 545 to the oxide 530. The metal oxide preferably suppresses oxygen diffusion from the insulator 545 to the conductor 560. By providing a metal oxide that suppresses oxygen diffusion, the diffusion of excess oxygen from the insulator 545 to the conductor 560 is suppressed. That is, a decrease in the amount of excess oxygen supplied to the oxide 530 can be suppressed. Furthermore, oxidation of the conductor 560 due to excess oxygen can be suppressed. As the metal oxide, any material that can be used for the insulator 544 may be used.

[0149] Note that the insulator 545 may have a layered structure, similar to the second gate insulating film. As transistors become smaller and more highly integrated, thinner gate insulating films can cause problems such as leakage current. Therefore, by using a layered structure of a high-k material and a thermally stable material for the insulator that functions as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. Furthermore, a layered structure that is thermally stable and has a high dielectric constant can be achieved.

[0150] Although the conductor 560 functioning as the first gate electrode is shown as having a two-layer structure in FIGS. 5A and 5B, it may have a single-layer structure or a laminated structure of three or more layers.

[0151] The conductor 560a is preferably made of a conductive material that suppresses the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (e.g., NO, NO, and the like), and copper atoms. Alternatively, a conductive material that suppresses the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, and the like) is preferably used. The oxygen-suppressing function of the conductor 560a can suppress the oxidation of the conductor 560b due to oxygen contained in the insulator 545, which can reduce the conductivity. Examples of conductive materials that suppress the diffusion of oxygen include tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Alternatively, an oxide semiconductor that can be used for the oxide 530 can be used for the conductor 560a. In this case, the conductor 560b can be formed by sputtering to reduce the electrical resistance of the conductor 560a, thereby making it a conductor. This can be called an OC (Oxide Conductor) electrode.

[0152] The conductor 560b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. Because the conductor 560b also functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. The conductor 560b may have a layered structure, such as a layered structure of titanium or titanium nitride and the above-mentioned conductive material.

[0153] The insulator 580 is provided over the conductor 542a and the conductor 542b with the insulator 544 interposed therebetween. The insulator 580 preferably has an excess oxygen region. For example, the insulator 580 preferably includes silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, silicon oxide having voids, or a resin. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Silicon oxide and silicon oxide having voids are particularly preferred because they allow for easy formation of an excess oxygen region in a later step.

[0154] The insulator 580 preferably has an excess oxygen region. By providing the insulator 580 from which oxygen is released by heating, oxygen in the insulator 580 can be efficiently supplied to the oxide 530. Note that the concentration of impurities such as water or hydrogen in the insulator 580 is preferably reduced.

[0155] The opening of the insulator 580 is formed to overlap the region between the conductor 542a and the conductor 542b, so that the conductor 560 is formed to be embedded in the opening of the insulator 580 and the region sandwiched between the conductor 542a and the conductor 542b.

[0156] When miniaturizing semiconductor devices, it is necessary to shorten the gate length, but it is also necessary to prevent the conductivity of the conductor 560 from decreasing. If the film thickness of the conductor 560 is increased to achieve this, the conductor 560 may have a shape with a high aspect ratio. In this embodiment, the conductor 560 is provided so as to be embedded in the opening of the insulator 580. Therefore, even if the conductor 560 has a shape with a high aspect ratio, the conductor 560 can be formed without collapsing during the process.

[0157] The insulator 574 is preferably provided in contact with the top surface of the insulator 580, the top surface of the conductor 560, and the top surface of the insulator 545. By forming the insulator 574 by a sputtering method, an excess oxygen region can be provided in the insulator 545 and the insulator 580. This allows oxygen to be supplied from the excess oxygen region into the oxide 530.

[0158] For example, the insulator 574 can be a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, and the like.

[0159] In particular, aluminum oxide has high barrier properties and can suppress the diffusion of hydrogen and nitrogen even when it is a thin film with a thickness of 0.5 nm to 3.0 nm. Therefore, aluminum oxide formed by sputtering can function as both an oxygen source and a barrier film against impurities such as hydrogen.

[0160] An insulator 581 functioning as an interlayer film is preferably provided over the insulator 574. Like the insulator 524, the insulator 581 preferably has a reduced concentration of impurities such as water or hydrogen.

[0161] Furthermore, conductors 540a and 540b are arranged in openings formed in insulators 581, 574, 580, and 544. Conductor 540a and 540b are arranged opposite each other with conductor 560 interposed therebetween. Conductor 540a and 540b have the same configuration as conductors 546 and 548, which will be described later.

[0162] An insulator 582 is provided over the insulator 581. The insulator 582 is preferably formed using a substance that has a barrier property against oxygen and hydrogen. Therefore, the insulator 582 can be formed using a material similar to that of the insulator 514. For example, the insulator 582 is preferably formed using a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0163] In particular, aluminum oxide has a high blocking effect against both oxygen and impurities such as hydrogen and moisture, which can cause fluctuations in the electrical characteristics of a transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500 during and after the transistor manufacturing process. Furthermore, aluminum oxide can suppress the release of oxygen from the oxide that constitutes the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0164] An insulator 586 is provided over the insulator 582. The insulator 586 can be formed using a material similar to that of the insulator 320. By using a material with a relatively low dielectric constant for these insulators, parasitic capacitance between wirings can be reduced. For example, a silicon oxide film, a silicon oxynitride film, or the like can be used as the insulator 586.

[0165] Furthermore, conductors 546, 548, etc. are embedded in insulators 520, 522, 524, 544, 580, 574, 581, 582, and 586.

[0166] The conductor 546 and the conductor 548 function as plugs or wirings that connect to the capacitor 600, the transistor 500, or the transistor 550. The conductor 546 and the conductor 548 can be formed using the same materials as the conductor 328 and the conductor 330.

[0167] After the transistor 500 is formed, an opening may be formed to surround the transistor 500, and an insulator with high barrier properties against hydrogen or water may be formed to cover the opening. By surrounding the transistor 500 with the insulator with high barrier properties, it is possible to prevent moisture and hydrogen from entering from the outside. Alternatively, multiple transistors 500 may be collectively surrounded by an insulator with high barrier properties against hydrogen or water. When forming an opening to surround the transistor 500, for example, it is preferable to form an opening that reaches the insulator 522 or the insulator 514 and form the insulator with high barrier properties in contact with the insulator 522 or the insulator 514, because this can serve as part of the manufacturing process of the transistor 500. For example, the insulator with high barrier properties against hydrogen or water may be made of a material similar to that of the insulator 522 or the insulator 514.

[0168] Subsequently, a capacitor 600 is provided above the transistor 500. The capacitor 600 has a conductor 610, a conductor 620, and an insulator 630.

[0169] A conductor 612 may be provided over the conductor 546 and the conductor 548. The conductor 612 functions as a plug or wiring connected to the transistor 500. The conductor 610 functions as an electrode of the capacitor 600. Note that the conductor 612 and the conductor 610 can be formed at the same time.

[0170] A metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or a metal nitride film containing any of the above elements (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film), etc. can be used for the conductor 612 and the conductor 610. Alternatively, a conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide with silicon oxide added can also be used.

[0171] In this embodiment, the conductor 612 and the conductor 610 have a single-layer structure, but the present invention is not limited to this structure and may have a stacked structure of two or more layers. For example, a conductor having a barrier property and a conductor having high adhesion to the conductor having high conductivity may be formed between a conductor having a barrier property and a conductor having high conductivity.

[0172] The conductor 620 is provided so as to overlap with the conductor 610 with the insulator 630 interposed therebetween. Note that the conductor 620 can be formed using a conductive material such as a metal material, an alloy material, or a metal oxide material. It is preferable to use a high-melting-point material such as tungsten or molybdenum that has both heat resistance and conductivity, and tungsten is particularly preferable. Furthermore, when the conductor 620 is formed simultaneously with other components such as a conductor, a low-resistance metal material such as Cu (copper) or Al (aluminum) can be used.

[0173] An insulator 640 is provided over the conductor 620 and the insulator 630. The insulator 640 can be provided using a material similar to that of the insulator 320. The insulator 640 may also function as a planarizing film that covers the uneven shape underneath.

[0174] With this structure, miniaturization or high integration can be achieved in a semiconductor device including a transistor including an oxide semiconductor.

[0175] Examples of a substrate that can be used for the semiconductor device of one embodiment of the present invention include a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, a metal substrate (e.g., a stainless steel substrate, a substrate having stainless steel foil, a tungsten substrate, a substrate having tungsten foil, etc.), a semiconductor substrate (e.g., a single-crystal semiconductor substrate, a polycrystalline semiconductor substrate, or a compound semiconductor substrate), an SOI substrate, and the like. A plastic substrate having heat resistance that can withstand the processing temperature of this embodiment may also be used. Examples of glass substrates include barium borosilicate glass, aluminosilicate glass, aluminoborosilicate glass, and soda-lime glass. Crystallized glass and the like can also be used.

[0176] Alternatively, flexible substrates, laminated films, paper containing fibrous materials, or base films can be used as the substrate. Examples of flexible substrates, laminated films, and base films include the following: Plastics such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), and polytetrafluoroethylene (PTFE). Synthetic resins such as acrylic are also included. Polypropylene, polyester, polyvinyl fluoride, and polyvinyl chloride are also included. Polyamide, polyimide, aramid resin, epoxy resin, inorganic vapor-deposited film, and paper are also included. In particular, transistors manufactured using semiconductor substrates, single-crystal substrates, or SOI substrates can be manufactured to have small size, high current capacity, and minimal variations in characteristics, size, and shape. Constructing a circuit using such transistors can reduce the power consumption of the circuit or increase the circuit integration.

[0177] Alternatively, a flexible substrate may be used as the substrate, and transistors, resistors, and / or capacitors may be formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate and the transistors, resistors, and / or capacitors. The release layer can be used to separate a semiconductor device, after it has been partially or entirely completed, from the substrate and transfer it to another substrate. In this case, the transistors, resistors, and / or capacitors can be transferred to a substrate with poor heat resistance or a flexible substrate. The release layer may be, for example, a laminated structure of an inorganic film such as a tungsten film and a silicon oxide film, a structure in which an organic resin film such as polyimide is formed on a substrate, or a silicon film containing hydrogen.

[0178] That is, a semiconductor device may be formed on a certain substrate and then transferred to another substrate. Examples of substrates onto which a semiconductor device may be transferred include, in addition to the substrates on which the above-mentioned transistors can be formed, paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, stone substrates, wood substrates, cloth substrates (including natural fibers (silk, cotton, hemp), synthetic fibers (nylon, polyurethane, polyester), or recycled fibers (acetate, cupra, rayon, recycled polyester)), leather substrates, and rubber substrates. By using these substrates, it is possible to manufacture semiconductor devices that are flexible, durable, heat-resistant, lightweight, or thin.

[0179] By providing a semiconductor device over a flexible substrate, an increase in weight can be suppressed and a semiconductor device that is less likely to be damaged can be provided.

[0180] <Transistor variation 1> A transistor 500A illustrated in Figures 6A to 6C is a variation of the transistor 500 having the structure illustrated in Figures 5A and 5B. Figure 6A is a top view of the transistor 500A, Figure 6B is a cross-sectional view of the transistor 500A in the channel length direction, and Figure 6C is a cross-sectional view of the transistor 500A in the channel width direction. Note that the structures illustrated in Figures 6A to 6C can also be applied to other transistors, such as the transistor 550, included in the semiconductor device of one embodiment of the present invention.

[0181] 6A to 6C differs from the transistor 500 shown in FIGS. 5A and 5B in that the transistor 500A includes an insulator 552, an insulator 513, and an insulator 404. The transistor 500A also differs from the transistor 500 shown in FIGS. 5A and 5B in that the insulator 552 is provided in contact with the side surface of the conductor 540a and the insulator 552 is provided in contact with the side surface of the conductor 540b. The transistor 500A also differs from the transistor 500 shown in FIGS. 5A and 5B in that the insulator 520 is not provided.

[0182] 6A to 6C, an insulator 513 is provided over an insulator 512. Furthermore, an insulator 404 is provided over the insulator 574 and the insulator 513.

[0183] 6A to 6C , the insulators 514, 516, 522, 524, 544, 580, and 574 are patterned, and the insulator 404 covers them. That is, the insulator 404 is in contact with the top surface of the insulator 574, the side surface of the insulator 574, the side surface of the insulator 580, the side surface of the insulator 544, the side surface of the insulator 524, the side surface of the insulator 522, the side surface of the insulator 516, the side surface of the insulator 514, and the top surface of the insulator 513. As a result, the oxide 530 and the like are isolated from the outside by the insulators 404 and 513.

[0184] The insulators 513 and 404 preferably have a high function of suppressing diffusion of hydrogen (for example, at least one of hydrogen atoms, hydrogen molecules, and the like) or water molecules. For example, silicon nitride or silicon nitride oxide, which are materials with high hydrogen barrier properties, are preferably used for the insulators 513 and 404. This can suppress diffusion of hydrogen and the like into the oxide 530, thereby suppressing deterioration in the characteristics of the transistor 500A. Therefore, the reliability of the semiconductor device of one embodiment of the present invention can be improved.

[0185] The insulator 552 is provided in contact with the insulator 581, the insulator 404, the insulator 574, the insulator 580, and the insulator 544. The insulator 552 preferably has a function of suppressing diffusion of hydrogen or water molecules. For example, the insulator 552 is preferably made of an insulator with high hydrogen barrier properties, such as silicon nitride, aluminum oxide, or silicon nitride oxide. Silicon nitride is particularly suitable for use as the insulator 552 because it has high hydrogen barrier properties. Using a material with high hydrogen barrier properties for the insulator 552 can suppress diffusion of impurities such as water or hydrogen from the insulator 580 or the like to the oxide 530 through the conductor 540a and the conductor 540b. Furthermore, oxygen contained in the insulator 580 can be suppressed from being absorbed by the conductor 540a and the conductor 540b. As described above, the reliability of the semiconductor device of one embodiment of the present invention can be improved.

[0186] <Transistor variation 2> An example configuration of a transistor 500B will be described using Figures 7A, 7B, and 7C. Figure 7A is a top view of the transistor 500B. Figure 7B is a cross-sectional view of the L1-L2 portion indicated by the dashed-dotted line in Figure 7A. Figure 7C is a cross-sectional view of the W1-W2 portion indicated by the dashed-dotted line in Figure 7A. Note that in the top view of Figure 7A, some elements are omitted for clarity.

[0187] The transistor 500B is a modified example of the transistor 500 and can be substituted for the transistor 500. Therefore, to avoid repetition of the description, the differences between the transistor 500B and the transistor 500 will be mainly described.

[0188] The conductor 560 functioning as the first gate electrode includes a conductor 560a and a conductor 560b on the conductor 560a. The conductor 560a is preferably made of a conductive material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms. Alternatively, the conductor 560a is preferably made of a conductive material that has the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.).

[0189] The conductor 560a has the function of suppressing oxygen diffusion, which improves the material selectivity of the conductor 560b. In other words, the presence of the conductor 560a suppresses oxidation of the conductor 560b, preventing a decrease in conductivity.

[0190] Furthermore, it is preferable to provide an insulator 544 so as to cover the top surface and side surfaces of the conductor 560 and the side surfaces of the insulator 545. Note that the insulator 544 is preferably made of an insulating material that has a function of suppressing the diffusion of impurities such as water or hydrogen and oxygen. For example, it is preferable to use aluminum oxide or hafnium oxide. Other examples that can be used include metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, and tantalum oxide, silicon nitride oxide, and silicon nitride.

[0191] Providing the insulator 544 can suppress oxidation of the conductor 560. Furthermore, including the insulator 544 can suppress diffusion of impurities such as water and hydrogen contained in the insulator 580 into the transistor 500B.

[0192] In the transistor 500B, the conductor 560 overlaps part of the conductor 542a and part of the conductor 542b, and therefore the parasitic capacitance of the transistor 500B is likely to be larger than that of the transistor 500. Therefore, the operating frequency of the transistor 500B tends to be lower than that of the transistor 500. However, the transistor 500B has higher productivity than the transistor 500 because it does not require a step of forming an opening in the insulator 580 or the like and filling it with the conductor 560, the insulator 545, or the like.

[0193] The structures, configurations, methods, and the like described in this embodiment can be used in appropriate combination with structures, configurations, methods, and the like described in other embodiments.

[0194] (Embodiment 3) In this embodiment, an example of a package and a camera module that house an image sensor chip will be described. The image sensor chip can have the same structure as the imaging device of one embodiment of the present invention shown in FIG. 3, for example.

[0195] 8A is a perspective view showing the top surface of a package containing an image sensor chip. The package includes a package substrate 810 for fixing an image sensor chip 850, a cover glass 820, and an adhesive 830 for bonding the two together.

[0196] 8B is a perspective view of the underside of the package. The underside of the package has a BGA (Ball Grid Array) configuration with solder balls as bumps 840. Note that the configuration is not limited to BGA, and may be an LGA (Land Grid Array) or PGA (Pin Grid Array), etc.

[0197] Fig. 8C is a perspective view of the package with the cover glass 820 and part of the adhesive 830 omitted, and Fig. 8D is a cross-sectional view of the package. Electrode pads 860 are formed on the package substrate 810, and the electrode pads 860 and bumps 840 are electrically connected via through holes 880 and lands 885. The electrode pads 860 are electrically connected to electrodes of the image sensor chip 850 by wires 870.

[0198] 9A is a perspective view of the top surface of a camera module in which an image sensor chip is housed in a lens-integrated package. The camera module includes a package substrate 811 for fixing an image sensor chip 851, a lens cover 821, and a lens 835. An IC chip 890 having functions such as a drive circuit and a signal conversion circuit for the imaging device is also provided between the package substrate 811 and the image sensor chip 851, and the camera module is configured as a SiP (System in Package).

[0199] 9B is a perspective view of the appearance of the bottom side of the camera module. The bottom and four side surfaces of the package substrate 811 have a QFN (Quad Flat No-Lead Package) configuration in which mounting lands 841 are provided. Note that this configuration is just one example, and a QFP (Quad Flat Package) or the aforementioned BGA, etc. may also be used.

[0200] Fig. 9C is a perspective view of the module omitting a portion of lens cover 821 and lens 835, and Fig. 9D is a cross-sectional view of the camera module. A portion of land 841 is used as electrode pad 861, and electrode pad 861 is electrically connected to electrodes of image sensor chip 851 and IC chip 890 by wire 871.

[0201] By housing the image sensor chip in a package of the above-described type, it becomes easy to mount the image sensor chip on a printed circuit board or the like, and the image sensor chip can be incorporated into various semiconductor devices and electronic devices.

[0202] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments.

[0203] (Fourth embodiment) Examples of electronic devices that can use the imaging device according to one embodiment of the present invention and the semiconductor device including the imaging device include display devices, personal computers, image storage devices or image playback devices equipped with a recording medium, mobile phones, game consoles including portable devices, portable data terminals, e-book readers, video cameras, cameras such as digital still cameras, goggle-type displays (head-mounted displays), navigation systems, audio playback devices (car audio, digital audio players, etc.), copiers, facsimiles, printers, printer-combined machines, automated teller machines (ATMs), vending machines, etc. Specific examples of these electronic devices are shown in FIG.

[0204] 10A shows a surveillance camera, which includes a housing 951, a lens 952, a support portion 953, and the like. The imaging device of one embodiment of the present invention can be included as one of the components for acquiring an image in the surveillance camera. Note that the term "surveillance camera" is a common name and does not limit the application. For example, a device having a function as a surveillance camera is also called a camera or a video camera.

[0205] 10B shows a video camera including a first housing 971, a second housing 972, a display unit 973, operation keys 974, a lens 975, a connection unit 976, and the like. The operation keys 974 and the lens 975 are provided in the first housing 971, and the display unit 973 is provided in the second housing 972. The imaging device of one embodiment of the present invention can be provided as one of the components for acquiring images in the video camera. The imaging device of one embodiment of the present invention can acquire images with an expanded dynamic range.

[0206] 10C shows a digital camera including a housing 961, a shutter button 962, a microphone 963, a light-emitting unit 967, a lens 965, and the like. The imaging device of one embodiment of the present invention can be included as one of the components for acquiring an image in the digital camera. The imaging device of one embodiment of the present invention can acquire an image with an expanded dynamic range.

[0207] 10D shows a wristwatch-type information terminal, which includes a housing 931, a display portion 932, a wristband 933, operation buttons 935, a crown 936, a camera 939, and the like. The display portion 932 may be a touch panel. The imaging device of one embodiment of the present invention can be included as one of the components for acquiring an image in the information terminal. The imaging device of one embodiment of the present invention can acquire an image with an expanded dynamic range.

[0208] 10E illustrates a portable game console including a housing 901, a housing 902, a display portion 903, a display portion 904, a microphone 905, a speaker 906, an operation key 907, a stylus 908, a camera 909, and the like. Note that although the portable game console illustrated in FIG. 10E includes two display portions 903 and 904, the number of display portions included in the portable game console is not limited to this. The imaging device of one embodiment of the present invention can be included as one of the components for acquiring an image in the portable game console. The imaging device of one embodiment of the present invention can acquire an image with an expanded dynamic range.

[0209] 10F shows a portable data terminal including a housing 911, a display portion 912, a speaker, a camera 919, and the like. Information can be input and output using a touch panel function of the display portion 912. The portable data terminal can include the imaging device of one embodiment of the present invention as one of components for acquiring an image. The imaging device of one embodiment of the present invention can acquire an image with an expanded dynamic range.

[0210] Note that this embodiment mode can be appropriately combined with other embodiment modes described in this specification. [Explanation of symbols]

[0211] 311: substrate, 313: semiconductor region, 314a: low resistance region, 314b: low resistance region, 315: insulator, 316: conductor, 320: insulator, 322: insulator, 324: insulator, 326: insulator, 328: conductor, 330: conductor, 350: insulator, 352: insulator, 354: insulator, 356: conductor, 360: insulator, 362: insulator, 364: insulator, 366: conductor, 370: insulator, 372: insulator, 374: insulator, 376: conductor, 380: insulator, 382: insulator, 384: insulator, 386: conductor, 404: insulator, 500: transistor, 500A: transistor, 500B: transistor, 503: conductor, 503a: conductor, 503b: conductor, 510: insulator, 512: insulator, 513: insulator, 514: insulator, 516: insulator, 518: conductor, 520: insulator, 522: insulator, 524: insulator, 530: oxide, 530a: oxide, 530b: oxide, 540a: conductor, 540b: conductor, 542a: conductor, 542b: conductor, 543a: region, 543b: region, 544: insulator, 545: insulator, 546: conductor, 548: conductor, 550: transistor, 552: insulator , 560: conductor, 560a: conductor, 560b: conductor, 574: insulator, 580: insulator, 581: insulator, 582: insulator, 586: insulator, 600: capacitor, 610: conductor, 612: conductor, 620: conductor, 630: insulator, 640: insulator, 810: package substrate, 811: package substrate, 820: cover glass, 821: lens cover, 830: adhesive, 835: lens, 840: bump, 841: land, 850: image sensor chip, 851: image sensor chip, 860: electrode pad, 861: electrode pad, 870: wire, 871: Wire, 880: Through hole, 885: Land, 890: IC chip, 901: Housing, 902: Housing, 903: Display, 904: Display, 905: Microphone, 906: Speaker, 907: Operation keys, 908: Stylus, 909: Camera, 911: Housing, 912: Display, 919: Camera, 931: Housing, 932: Display, 933: Wristband, 935: Button, 936: Crown, 939: Camera, 951: Housing, 952: Lens, 953: Support, 961: Housing, 962: Shutter button, 963: Microphone, 965: Lens, 967: Light-emitting part,971: Housing, 972: Housing, 973: Display unit, 974: Operation keys, 975: Lens, 976: Connection unit,

Claims

[Claim 1] An imaging device including first to sixth transistors, a photoelectric conversion element, a first capacitor, and a second capacitor, one electrode of the photoelectric conversion element is electrically connected to one of the source and drain of the first transistor; the other of the source and the drain of the first transistor is electrically connected to the one of the source and the drain of the second transistor; the other of the source and the drain of the first transistor is electrically connected to one electrode of the first capacitance element; the other of the source and the drain of the first transistor is electrically connected to the gate electrode of the third transistor; one of a source or a drain of the third transistor is electrically connected to one of a source or a drain of the fourth transistor; the other of the source and the drain of the second transistor is electrically connected to one electrode of the second capacitor element; one electrode of the second capacitor element is electrically connected to one of the source and the drain of the fifth transistor; one of a source or a drain of the sixth transistor is electrically connected to one of a source or a drain of the first transistor; The imaging device, wherein the first transistor, the third transistor, the fourth transistor, and the sixth transistor each have silicon in a region where a channel is formed.

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