Voltage detection device and voltage detection method

Abstract

To provide a voltage detection device and a voltage detection method capable of accurately detecting both of a change in an output voltage of a battery over a long period of time and a change therein over a short period of time.SOLUTION: A voltage detection device that measures a voltage of a battery using an ADC includes: a level shift unit that shifts a voltage level of a voltage signal output from the battery to a median value of a measurement range of the ADC; an amplifier that amplifies the voltage signal shifted in the voltage level by the level shift unit; the ADC that measures the voltage signal amplified by the amplifier and outputs a digital sample signal corresponding to the voltage signal; and a derivation unit that derives a voltage value of the voltage of the battery on the basis of the sample signal output from the ADC.SELECTED DRAWING: Figure 12

Description

[Technical Field]

[0001] The present disclosure relates to a voltage detection device and a voltage detection method. [Background technology]

[0002] There is known a technology for detecting the output voltage of a battery using an ADC (Analog to Digital Converter) (see, for example, Patent Document 1). The ADC has the role of converting an analog voltage into a digital value. By connecting the output terminal of the battery to the input terminal of the ADC, the output voltage of the battery can be measured as a digital value. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-221544 Summary of the Invention [Problem to be solved by the invention]

[0004] The change in the output voltage of a battery can be either a large change over a long period of time or a small change over a short period of time. For example, in response to the charging and discharging of a battery, the voltage changes over a relatively long period of time, decreasing as the discharging time increases. In addition, in response to the fluctuation of the load connected to the battery, the voltage fluctuates (oscillates) over a relatively short period of time.

[0005] However, it is sometimes not easy to detect both long-term and short-term changes in the battery output voltage, as this depends on the measurement range of the ADC used for detection.

[0006] An object of the present disclosure is to provide a voltage detection device and a voltage detection method that can accurately detect both long-term and short-term changes in the output voltage of a battery. [Means for solving the problem]

[0007] In order to achieve the above object, the voltage detection device of the present disclosure is a voltage detection device that measures the voltage of a battery using an ADC, and includes: a level shift unit that shifts the voltage level of a voltage signal output from the battery to the median value of the measurement range of the ADC; an amplifier unit that amplifies the voltage signal whose voltage level has been shifted by the level shift unit; the ADC that measures the voltage signal amplified by the amplifier unit and outputs a digital sample signal corresponding to the voltage signal; and a derivation unit that derives the voltage value of the battery voltage based on the sample signal output from the ADC.

[0008] In addition, in order to achieve the above-mentioned object, the voltage detection method disclosed herein is a voltage detection method in which a processor included in a voltage detection device that measures the voltage of a battery using an ADC shifts the voltage level of a voltage signal output from the battery to the median value of the measurement range of the ADC using a level shift unit, amplifies the voltage signal whose voltage level has been shifted by the level shift unit using an amplifier unit, measures the voltage signal amplified by the amplifier unit using the ADC, outputs a digital sample signal corresponding to the voltage signal, and derives a voltage value of the voltage of the battery based on the sample signal output from the ADC. [Effects of the Invention]

[0009] According to the present disclosure, both long-term and short-term changes in the output voltage of a battery can be detected with high accuracy. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a block diagram showing an example of the configuration of a voltage detection device according to a first embodiment; [Figure 2] FIG. 4 is a diagram for explaining a change in voltage output from a battery. [Figure 3] FIG. 2 is a circuit diagram illustrating an example of a hardware configuration of a microcontroller. [Figure 4] FIG. 1 is a diagram for explaining the function of a multiplier / divider. [Figure 5] FIG. 2 is a configuration diagram showing an example of the configuration of a multiplier / divider. [Figure 6] FIG. 2 is a circuit diagram illustrating an example of the configuration of a logarithmic conversion circuit. [Figure 7] FIG. 2 is a circuit diagram showing an example of the configuration of an adder circuit. [Figure 8] FIG. 2 is a circuit diagram illustrating an example of the configuration of a subtraction circuit. [Figure 9] FIG. 1 is a circuit diagram illustrating an example of the configuration of an inverse logarithmic transformation circuit. [Figure 10] FIG. 2 is a diagram for explaining the operation of an amplifier. [Figure 11] FIG. 2 is a circuit diagram showing an example of the configuration of an amplifier. [Figure 12] 5 is a flowchart showing an example of the flow of a measurement process according to the first embodiment. [Figure 13] 10 is a flowchart showing an example of the flow of a multiplier / divider adjustment process. [Figure 14] 10 is a flowchart illustrating an example of the flow of an amplifier adjustment process. [Figure 15] 10 is a flowchart showing an example of the flow of a process for inversely calculating sample values ​​based on parameters of an amplifier. [Figure 16] 10 is a flowchart showing an example of the flow of a reverse calculation process of sample values ​​based on parameters of a multiplier / divider. [Figure 17] FIG. 10 is a block diagram showing an example of the configuration of a voltage detection device according to a second embodiment. [Figure 18] FIG. 10 is a diagram for explaining the operation of a subtractor. [Figure 19] FIG. 2 is a circuit diagram illustrating an example of the configuration of a subtractor. [Figure 20] FIG. 2 is a circuit diagram showing an example of the configuration of an amplifier. [Figure 21] 10 is a flowchart showing an example of the flow of a measurement process according to the second embodiment. [Figure 22] 10 is a flowchart illustrating an example of the flow of a subtractor adjustment process. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Note that the following embodiments do not limit the technology of the present disclosure.

[0012] [First embodiment] First, the configuration of the voltage detection device of this embodiment will be described. Fig. 1 shows a block diagram illustrating an example of the configuration of a voltage detection device 10 of this embodiment. As shown in Fig. 1, a battery 2 that is the detection target of the voltage detection device 10 of this embodiment is connected to a load 4 and supplies a voltage to the load 4. The load 4 is driven by the voltage supplied from the battery 2, and may be, for example, various types of circuits or semiconductor devices.

[0013] The battery 2 of this embodiment is rechargeable, and can be used repeatedly by being charged. Referring to FIG. 2, the voltage (output voltage) v output from the battery 2 is bat The change in the voltage v output from battery 2 will be explained. bat changes significantly (see Figure 2, change D) over time (see Figure 2, time T) depending on the charge and discharge. Specifically, the longer the discharge time, the more the voltage v bat The voltage output from battery 2, v bat changes slightly (see change d in Figure 2) in a relatively short time (see time t in Figure 2) in response to fluctuations in the load 4. Specifically, in response to fluctuations in the load 4, the voltage v bat fluctuates to the upper limit.

[0014] The voltage detection device 10 detects the voltage v of the battery 2 that changes as described above. batSpecifically, the voltage detection device 10 detects the voltage v output from the battery 2. bat A voltage signal corresponding to the voltage is detected and the voltage value is measured. Note that, here, the voltage signal output from the battery 2 etc. may be simply referred to as "voltage." Also, the voltage output from each circuit etc. may be referred to as "output voltage."

[0015] As shown in FIG. 1, a voltage detection device 10 of this embodiment includes a multiplier / divider 12, an amplifier 14, and a microcontroller 16.

[0016] The microcontroller 16 includes an ADC (Analog to Digital Converter) 20, a DAC (Digital to Analog Converter) 22, and a PWM (Pulse Width Modulation) 24, and has the function of controlling the operation of the voltage detection device 10 to detect the voltage of the battery 2.

[0017] The ADC 20 is connected to the positive (+) side of the battery 2, and the voltage output from the battery 2 is input to the ADC 20. The ADC 20 is also connected to the multiplier / divider 12. The ADC 20 is further connected to the amplifier 14, and the output voltage v out2 As an example, in this embodiment, an ADC 20 with a measurement range of 5V is used.

[0018] The DAC22 is connected to the multiplier / divider 12, and the output voltage V dac The output voltage v output from the multiplier / divider 12 is out1 (Details will be explained later.) The output voltage V dac is set by the multiplier / divider adjustment process (see FIG. 13), the details of which will be described later.

[0019] The PWM 24 is connected to the amplifier 14, and the resistance value R of the variable resistor 106 (see FIG. 11) of the amplifier 14, which will be described in detail later, is varSpecifically, it has the function of controlling the average voltage V output from PWM24. pwm The resistance value R of the variable resistor 106 of the amplifier 14 is var The average voltage of PWM24, V pwm is set by the amplifier firing process (see FIG. 14), which will be described in more detail below.

[0020] Such a microcontroller 16 is, for example, as shown in FIG. 3. The microcontroller 16 includes hardware such as a CPU (Central Processing Unit) 30, a ROM (Read Only Memory) 32, a RAM (Random Access Memory) 34, and a storage unit 36. The CPU 30, ROM 32, RAM 34, and storage unit 36 ​​are connected via a bus (not shown) such as a system bus or a control bus so that various information can be exchanged between them. The CPU 30 is an example of a processor that controls the microcontroller 16. The CPU 30 of this embodiment is an example of a derivation unit of the present disclosure. The ROM 32 stores the output voltage v of the battery 2, which is calculated by the CPU 30. bat The RAM 34 temporarily stores various data. The storage unit 36 ​​stores the output voltage v of the battery 2. bat The recording unit 36 ​​stores various information such as the measured values ​​of the temperature and humidity. For example, various types of memory can be used as the storage unit 36. The program for performing the measurement process described above may be stored in the storage unit 36. The recording unit 36 ​​may be provided outside the microcontroller 16, i.e., outside the microcontroller 16. In this case, the microcontroller 16 transmits the measured values ​​obtained by measurement to the external storage unit 36, whereby the measured values ​​are stored in the storage unit 36.

[0021] The multiplier / divider 12 calculates the output voltage v, which is the analog voltage output from the battery 2. batThis is a circuit that performs multiplication or division. It performs a logarithmic transformation on the input voltage and then adds or subtracts the logarithmically transformed voltages. Then, by performing an inverse logarithmic transformation on the voltage obtained by addition or subtraction, the result of multiplication or division of the original voltage can be obtained.

[0022] The multiplier-divider 12 of this embodiment has a function of shifting the level of the output voltage output from the battery 2. Specifically, the multiplier-divider 12 has a function of shifting the voltage level of the voltage signal output from the battery 2 to the median value of the measurement range of the ADC 20. More specifically, as shown in FIG. 4, the multiplier-divider 12 shifts the voltage level of the output voltage v output from the battery 2 to the median value of the measurement range of the ADC 20. bat The average value V for a given discharge time ave (4.1V in Figure 4) is set to the center of the ADC20 measurement range (2.5V in Figure 4). bat The output voltage v is the level (voltage value) of out1 The multiplier-divider 12 of this embodiment is an example of a level shift unit of the present disclosure.

[0023] The specific configuration of the multiplier / divider 12 of this embodiment will be described below. As shown in Fig. 5, the multiplier / divider 12 of this embodiment includes a constant voltage source 40, a logarithmic conversion circuit 42, a logarithmic conversion circuit 44, an adder circuit 46, a logarithmic conversion circuit 48, a subtractor circuit 50, and an inverse logarithmic conversion circuit 52.

[0024] The constant voltage source 40 has a function of supplying a voltage to be input to the logarithmic conversion circuit 42, and outputs a voltage having the same voltage value as the median value of the measurement range of the ADC 20 to the logarithmic conversion circuit 42. As described above, in this embodiment, the ADC 20 has a measurement range of 5 V. In this case, the constant voltage source 40 supplies a power supply voltage V of 2.5 V. DD If the voltage value of the constant voltage source 40 is greater than the median value of the measurement range of the ADC 20, the voltage is divided using resistors or other elements so that the voltage value after the voltage division is the median value of the measurement range of the ADC 20, and the power supply voltage V after the voltage division is set to DD is supplied.

[0025] The logarithmic conversion circuits 42, 44, and 48 have the same configuration. FIG. 6 shows an example of the configuration of the logarithmic conversion circuits 42, 44, and 48. The logarithmic conversion circuits 42, 44, and 48 each include a resistor 60, an NPN transistor 62, and an operational amplifier 64. The positive input terminal of the operational amplifier 64 is connected to ground. One end of the resistor 60 is connected to the negative input terminal of the operational amplifier 64. In this embodiment, the resistance of the resistor 60 is set to 25 kΩ, for example. The collector of the NPN transistor 62 is connected to the negative input terminal of the operational amplifier 64, and the emitter is connected to the output terminal of the operational amplifier 64.

[0026] In the case of the logarithmic conversion circuit 42, the other end of the resistor 60 is connected to the constant voltage source 40. The output terminal of the operational amplifier 64 is connected to the adder circuit 46. On the other hand, in the case of the logarithmic conversion circuit 44, the other end of the resistor 60 is connected to the positive side of the battery 2. The output terminal of the operational amplifier 64 is connected to the adder circuit 46. Furthermore, in the case of the logarithmic conversion circuit 48, the other end of the resistor 60 is connected to the DAC 22. The output terminal of the operational amplifier 64 is connected to the subtractor circuit 50.

[0027] 7, the adder circuit 46 includes resistors 70, 71, 72, 75, and 76, and operational amplifiers 74 and 78. In this embodiment, the resistors 70, 71, 72, 75, and 76 have the same resistance value. As an example, in this embodiment, the resistance value is set to 10 kΩ.

[0028] The positive input terminal of the operational amplifier 74 is connected to ground. The negative input terminal of the operational amplifier 74 is connected to one end of a resistor 70, the other end of which is connected to the logarithmic conversion circuit 42. The negative input terminal of the operational amplifier 74 is connected to one end of a resistor 71, the other end of which is connected to the logarithmic conversion circuit 44. A resistor 72 is connected between the negative input terminal and output terminal of the operational amplifier 74. The output terminal of the operational amplifier 74 is connected to the negative input terminal of an operational amplifier 78 via a resistor 75. The positive input terminal of the operational amplifier 78 is connected to ground. A resistor 76 is connected between the negative input terminal and output terminal of the operational amplifier 78. The output terminal of the operational amplifier 78 is connected to the subtraction circuit 50.

[0029] As shown in FIG. 8 , the subtraction circuit 50 includes resistors 80, 81, 82, and 84 and an operational amplifier 86. In this embodiment, the resistors 80, 81, 82, and 84 have the same resistance value, which is also the same as the resistors 70, 71, 72, 75, and 76 of the adder circuit 46. As an example, in this embodiment, the resistance value is 10 kΩ. The positive input terminal of the operational amplifier 86 is connected to ground via the resistor 81. The positive input terminal of the operational amplifier 86 is also connected to one end of a resistor 80, the other end of which is connected to the logarithmic conversion circuit 48. The negative input terminal of the operational amplifier 86 is also connected to one end of a resistor 82, the other end of which is connected to the adder circuit 46. A resistor 84 is connected between the negative input terminal and the output terminal of the operational amplifier 86. The output terminal of the operational amplifier 86 is connected to the inverse logarithmic conversion circuit 52.

[0030] As shown in FIG. 9 , the inverse logarithmic transformation circuit 52 includes an NPN transistor 90, a resistor 92, and an operational amplifier 94. The positive input terminal of the operational amplifier 94 is connected to ground. The emitter of the NPN transistor 90 is connected to the negative input terminal of the operational amplifier 94. The collector of the NPN transistor 90 is connected to the subtraction circuit 50. A resistor 92 is connected between the negative input terminal and the output terminal of the operational amplifier 94. The resistance value of the resistor 92 is the same as the resistance values ​​of the logarithmic transformation circuits 42, 44, and 48. As an example, in this embodiment, the resistance value of the resistor 92 is 25 kΩ. The output terminal of the operational amplifier 94 is connected to the amplifier 14.

[0031] The voltage v output from the multiplier / divider 12 (inverse logarithmic transformation circuit 52) out1 is input to the amplifier 14. The output voltage v output by the multiplier / divider 12 is out1 is the output voltage of battery 2, v bat and the power supply voltage V of the constant voltage source 40 DD and the output voltage of DAC22, V dac The following equation (1) is derived using the power supply voltage V of the constant voltage source 40 as described above. DD is shown to be 2.5V.

number

[0032] The amplifier 14 is a circuit that amplifies the amplitude of the analog voltage. The amplifier 14 of this embodiment has a variable amplification factor, and amplifies the voltage v output from the multiplier / divider 12. out1 Specifically, as shown in FIG. 10, the amplifier 14 amplifies the voltage v out1 By amplifying this, the output voltage v output from battery 2 is bat The amplitude of the change is amplified, and the amplified voltage v out2 More specifically, the amplifier 14 outputs the voltage v out2However, the voltage v is set so that it does not exceed the measurement range of the ADC20 and the measurement range is effectively utilized. out1 The amplifier 14 of this embodiment is an example of an amplifier unit of the present disclosure.

[0033] In this embodiment, a non-inverting amplifier is used as the amplifier 14. FIG. 11 shows a circuit diagram of an example of the configuration of the amplifier 14 of this embodiment. As shown in FIG. 11, the amplifier 14 of this embodiment includes resistors 100 and 104, an operational amplifier 102, and a variable resistor 106. The variable resistor 106 is connected between the positive input terminal and output terminal of the operational amplifier 102. In this embodiment, a variable resistor whose resistance value can be controlled by voltage is used as the variable resistor 106, and as a specific example, an analog photocoupler using a CdS (cadmium sulfide) cell is used as the variable resistor 106.

[0034] The positive input terminal of the operational amplifier 102 is connected to ground via a resistor 104. The resistance value of the resistor 104 is set to be the same as the resistance value of the analog photocoupler, which is a variable resistor 106, when the full-range voltage of the ADC 20 (5 V in this embodiment) is input to the variable resistor 106, which is an analog photocoupler. Note that, because the measured value varies depending on the characteristics of the analog photocoupler, the resistance value of the resistor 104 is determined after measuring the characteristics of the analog photocoupler. The resistor 100 is connected to the PWM 24 and serves to prevent overcurrent from flowing through an LED (Light Emitting Diode) used in the analog photocoupler of the variable resistor 106. The resistance value of the resistor 100 is determined according to the rating of the analog photocoupler. Meanwhile, the negative input terminal of the operational amplifier 102 is connected to the antilogarithmic conversion circuit 52 of the multiplier / divider 12.

[0035] The amplification factor A of the amplifier 14 is determined by the resistance value R of the resistor 104 and the resistance value R of the variable resistor 106. var As described above, the resistance value R of the variable resistor 106 is determined as shown in the following equation (2). var is the average voltage V output from PWM24 of microcontroller16 pwmis controlled by

number

[0036] The output voltage v from the amplifier 14 out2 is input to the ADC 20 of the microcontroller 16 and sampled by the ADC 20. From the above equations (1) and (2), the output voltage v out1 is input to the amplifier 14, the output voltage v output from the amplifier 14 out2 is calculated using the following formula (3).

number

[0037] Next, the output voltage v of the battery 2 by the voltage detection device 10 of this embodiment bat In this embodiment, as a preliminary preparation before the measurement process, the microcontroller 16 stores information indicating the correspondence relationship between the duty of the PWM 24 and the value of the amplification degree An of the amplifier 14. The information indicating the correspondence relationship is obtained by actually measuring the average voltage V of the PWM 24 while changing the duty of the PWM 24. pwm is input to the variable resistor 106 (photocoupler) of the amplifier 14, and the resistance value R var In this embodiment, the resistance value R var The information representing the above correspondence relationship obtained by actually measuring the above is stored in advance.

[0038] 12 shows a flowchart illustrating an example of the flow of measurement processing executed by the microcontroller 16 of the voltage detecting device 10. In this embodiment, the CPU 30 of the microcontroller 16 executes a program (not shown) stored in the ROM 32, thereby performing the measurement processing shown in FIG.

[0039] As shown in Figure 12, the output voltage of battery 2, v bat The measurement is performed by repeating the processes of steps S100 to S114.

[0040] As shown in FIG. 12, first, in step S100, a measurement loop is started.

[0041] In the next step S102, the CPU 30 determines whether or not to adjust the multiplier / divider 12 and the amplifier 14. Whether or not to adjust the multiplier / divider 12 and the amplifier 14 depends on, for example, the time elapsed since the previous adjustment, the output voltage v of the battery 2, and the like. bat Any conditions, such as fluctuations in the output voltage, can be set, and the CPU 30 makes a determination based on the set conditions. If the multiplier-divider 12 and the amplifier 14 are not to be adjusted, the determination in step S102 is negative, and the process proceeds to step S106. On the other hand, if the multiplier-divider 12 and the amplifier 14 are to be adjusted, the determination in step S102 is positive, and the process proceeds to step S104.

[0042] In step S104, the CPU 30 performs an adjustment process for the multiplier / divider 12 and the amplifier 14, the details of which will be described later.

[0043] In the next step S106, the CPU 30 calculates the output voltage v of the amplifier 14. out2 The output voltage v of the amplifier 14 is measured by the ADC 20 and a sampled value is obtained. out2 is the output voltage v of battery 2 as mentioned above. bat is transformed through the multiplier / divider 12 and amplifier 14.

[0044] In the next step S108, the CPU 30 calculates the output voltage v based on the parameters of the amplifier 14. out2 The sampled value is subjected to a reverse calculation process (described in detail later) to convert it into a voltage value before being input to the amplifier 14.

[0045] In the next step S110, the CPU 30 performs a reverse calculation process (described in detail later) to reverse-calculate the sample value obtained by the process of step S108 above based on the parameters of the multiplier-divider 12, and converts it into a voltage value before being input to the multiplier-divider 12.

[0046] Next, in step S112, the CPU 30 calculates the output voltage v of the battery 2. bat One measurement value (digital value) is acquired and stored in the memory unit 36.

[0047] By repeating (looping) the processing of steps S102 to S112, the output voltages v of the plurality of batteries 2 are bat The measured value is obtained.

[0048] If the termination condition is met, the CPU 30 terminates the measurement loop in step S114. When the process of step S114 ends, the measurement process shown in FIG.

[0049] Next, a description will be given of the adjustment process of the multiplier-divider 12 and the amplifier 14, which is executed in step S104 of the measurement process in Fig. 12. This adjustment process includes two processes: a multiplier-divider adjustment process for adjusting the multiplier-divider 12, and an amplifier adjustment process for adjusting the amplifier 14.

[0050] First, we will explain the multiplier-divider adjustment process that adjusts the multiplier-divider 12. Fig. 13 shows a flowchart illustrating an example of the flow of the multiplier-divider adjustment process that is executed by the microcontroller 16 of the voltage detection device 10.

[0051] In step S400 of FIG. 13, the CPU 30 calculates the output voltage v of the battery 2. bat is measured for a certain period of time, and the output voltage v batThe maximum value of V max and the minimum value V min and are acquired as digital values ​​and stored.

[0052] In the next step S402, the CPU 30 calculates the output voltage v of the battery 2. bat The average value of V ave In this embodiment, the CPU 30 derives the output voltage v using the following equation (4): bat The maximum value of V max and the minimum value V min By deriving the average value of ave is derived.

number

[0053] In the next step S404, the CPU 30 calculates the output voltage V dac In this embodiment, the output voltage V of the DAC 22 is set. dac A, Battery 2's output voltage V bat The average value of V ave Set it to the same value as

[0054] In the next step S406, the CPU 30 outputs the output voltage V dac When the process of step S406 ends, the multiplier / divider adjustment process shown in FIG. 13 ends.

[0055] Next, a description will be given of an amplifier adjustment process for adjusting the amplifier 14. Fig. 14 shows a flowchart illustrating an example of the flow of the amplifier adjustment process executed by the microcontroller 16 of the voltage detection device 10.

[0056] In step S420 of FIG. 14, the CPU 30 calculates the output voltage v of the multiplier / divider 12. out1 is measured for a certain period of time, and the output voltage v out1 The maximum value of V max1 and the minimum value V min1 and are acquired as digital values ​​and stored.

[0057] In the next step S422, the CPU 30 calculates the maximum value V max1 and the minimum value V min1 and are different values ​​(V max1 ≠V min1 ) is determined. max1 and the minimum value V min1 If the values ​​are not different from each other, the determination in step S422 is negative, and the process proceeds to step S424.

[0058] In step S424, the CPU 30 calculates the maximum value V max1 and the minimum value V min1 Specifically, the CPU 30 calculates the maximum value V max1 is defined, and the minimum value V min1 The "x" in the following equations (5) and (6) is the minimum value that the ADC 20 can express as a digital value. The value of "x" is the output voltage v of the multiplier / divider 12. out1 The value is determined in advance according to the expected amount of change in the

number

[0059] On the other hand, the maximum value V max1 and the minimum value V min1 If the values ​​are different from each other, the determination in step S422 is affirmative, and the process proceeds to step S426. In step S426, the CPU 30 calculates the maximum amplitude V when amplified by the amplification factor An of the amplifier 14, which was calculated in advance. H and the minimum value V L Specifically, the CPU 30 derives the maximum amplitude V H The minimum amplitude V is calculated using the following equation (8). L is derived.

number

[0060] In the next step S428, the CPU 30 determines whether the amplitude when amplified by the amplification factor An of the amplifier 14 falls within the measurement range of the ADC 20. In this embodiment, the measurement range of the ADC 20 is 0 V to 5 V, so specifically, the minimum value V of the amplitude L is greater than 0V (V L >0) and the maximum amplitude V H is less than 5V (V H <5) is satisfied. If this condition is not satisfied, the determination in step S428 is negative, and the process proceeds to step S430. In this case, the output voltage v of the amplifier 14 amplified by the set amplification factor An is out2 is not within the measurement range of the ADC 20, the CPU 30 changes the amplification factor An from its current value to a smaller value in step S430, and then returns to step S426. As a result, the processing of step S426 is performed again with the amplification factor An set to a smaller value.

[0061] On the other hand, the minimum amplitude V calculated in step S426 L is greater than 0V and the maximum amplitude V H If is smaller than 5V, the determination in step S428 is affirmative, and the process proceeds to step S432.

[0062] In the next step S432, the CPU 30 derives the duty of the PWM 24 corresponding to the amplification degree An currently set in the amplifier 14 from the information representing the correspondence relationship described above, and sets it in the PWM 24.

[0063] In the next step S434, the CPU 30 starts signal output from the PWM 24. As described above, the average voltage V pwmchanges the resistance value of the variable resistor 106 (photocoupler) of the amplifier 14 to realize an amplifier with an amplification degree An that satisfies the conditions. When the process of step S434 ends, the amplifier adjustment process shown in FIG.

[0064] Next, a description will be given of the process of back-calculating the sample values ​​based on the parameters of the amplifier 14, which is executed in step S108 of the measurement process in Fig. 12. Fig. 15 shows a flowchart illustrating an example of the flow of the process of back-calculating the sample values ​​based on the parameters of the amplifier 14, which is executed by the microcontroller 16 of the voltage detection device 10.

[0065] In step S800 of FIG. 15, the CPU 30 calculates the sample value V obtained by the ADC 20 for the full range of the ADC 20. smp Since the full range of the ADC 20 is 5V, the CPU 30 of this embodiment derives the ratio y using the following equation (9).

number

[0066] In the next step S802, the CPU 30 calculates the output voltage v of the multiplier / divider 12. out1 The maximum value of V max1 , minimum value V min1 , and the ratio y calculated in step S800, the voltage input to the amplifier 14, i.e., the output voltage v of the multiplier / divider 12, is calculated. out1 The CPU 30 of this embodiment calculates the output voltage v out1 Calculate backwards.

number

[0067] In the next step S804, the CPU 30 calculates the output voltage v out1 , the output voltage V out1When the process of step S804 is completed, the process of back-calculating the sample value based on the parameters of the amplifier 14 shown in FIG. 15 is completed.

[0068] Next, a description will be given of the inverse calculation process of the sample values ​​based on the parameters of the multiplier-divider 12, which is executed in step S110 of the measurement process in Fig. 12. Fig. 16 shows a flowchart illustrating an example of the flow of the inverse calculation process of the sample values ​​based on the parameters of the multiplier-divider 12, which is executed by the microcontroller 16 of the voltage detection device 10.

[0069] In step S1000 of FIG. 16, the CPU 30 calculates the output voltage v of the multiplier / divider 12 obtained by the inverse calculation process of FIG. 15. out1 and the output voltage V of DAC22 dac to Battery 2 output voltage V bat The CPU 30 of this embodiment calculates the output voltage v by the following equation (11), which is obtained by the above-mentioned equation (1). bat Calculate backwards.

number

[0070] In the next step S1002, the CPU 30 calculates the output voltage v bat , the output voltage V bat When the process of step S1002 is completed, the process of inversely calculating the sample value based on the parameters of the multiplier / divider 12 shown in FIG. 16 is completed.

[0071] In this way, in the measurement process shown in FIG. 12, the output voltage v of the battery 2 is measured by the processes of steps S102 to S112. bat The output voltage v over a short period of time (see time t in Figure 2) corresponding to the fluctuation of the load 4, such as the change d shown in Figure 2, is obtained. batThe change (amplitude) can be detected with high accuracy.

[0072] In this embodiment, the voltage detection device 10 performs measurement processing at predetermined times, such as at times corresponding to the elapsed time since the charging of the battery 2 is completed or at times corresponding to the operating state of the load 4, and measures the output voltage v of the battery 2 for the number of measurement loops at each predetermined time. bat The output voltage v of battery 2 is measured for the number of measurement loops obtained at each predetermined timing. bat By connecting the measured values, it is possible to detect long-term changes (see time T in FIG. 2) that occur due to charging and discharging of the battery 2, such as the change D shown in FIG. 2 described above.

[0073] Second Embodiment Fig. 17 shows a block diagram illustrating an example of the configuration of a voltage detection device 10 of this embodiment. As shown in Fig. 17, the voltage detection device 10 of this embodiment includes a subtractor 13 and an amplifier 15, which are an example of a circuit having two functions of subtraction and amplification, instead of the multiplier / divider 12 and amplifier 14 of the voltage detection device 10 of the first embodiment (see Fig. 1). Also, the microcontroller 16 of this embodiment differs from the microcontroller 16 of the first embodiment (see Fig. 1) in that it does not include a PWM 24.

[0074] The subtractor 13 is a circuit that performs subtraction on the analog voltage output from the battery 2. The subtractor 13 of this embodiment subtracts the output voltage v bat Therefore, the output voltage of DAC22, V dac By subtracting bat Specifically, the subtractor 13 has a function of shifting the voltage level of the voltage signal output from the battery 2 to the median value of the measurement range of the ADC 20. More specifically, as shown in FIG. 18, the subtractor 13 subtracts the voltage level of the output voltage v bat The average value V for a given discharge time ave(4.1V in Figure 18) is set to the median value of ADC20 (2.5V in Figure 18). bat The output voltage v is the level (voltage value) of out1 The subtractor 13 of this embodiment is an example of a level shift unit of the present disclosure.

[0075] In this way, the output voltage v output from the subtractor 13 out1 is obtained by the following equation (12).

number

[0076] A specific configuration of the subtractor 13 of this embodiment will be described. FIG. 19 shows an example of the configuration of the subtractor 13. The subtractor 13 includes resistors 110, 112, 114, and 116 and an operational amplifier 118. In this embodiment, the resistors 110, 112, 114, and 116 have the same resistance value. The positive input terminal of the operational amplifier 118 is connected to the DAC 22 via the resistor 110. The positive input terminal of the operational amplifier 118 is also connected to a reference voltage of the subtractor 13 via the resistor 112. In this embodiment, the reference voltage of the subtractor 13 is set to the median voltage value of the measurement range of the ADC 20. The negative input terminal of the operational amplifier 118 is connected to the positive side of the battery 2 via the resistor 114. A resistor 116 is connected between the negative input terminal and output terminal of the operational amplifier 118. The output terminal of the operational amplifier 118 is connected to the amplifier 15 .

[0077] The amplifier 15 is a circuit that amplifies the amplitude of the analog voltage. out1 Specifically, similar to the amplifier 14 of the first embodiment, as shown in FIG. out1 By amplifying this, the output voltage v output from battery 2 is bat The amplitude of the change is amplified, and the amplified voltage v out2More specifically, the amplifier 15 outputs the voltage v out2 However, the voltage v is set so that it does not exceed the measurement range of the ADC20 and the measurement range is effectively utilized. out1 The amplifier 15 of this embodiment is an example of the amplifier unit of the present disclosure. The amplifier 15 may have a variable or fixed amplification factor.

[0078] In this embodiment, a non-inverting amplifier is used as the amplifier 15. FIG. 20 shows a circuit diagram of an example of the configuration of the amplifier 15 of this embodiment. As shown in FIG. 20, the amplifier 15 of this embodiment includes resistors 120 and 122 and an operational amplifier 124. The negative input terminal of the operational amplifier 124 is connected to the subtractor 13. Meanwhile, the positive input terminal of the operational amplifier 124 is connected to a reference voltage of the amplifier 15 via the resistor 120. In this embodiment, the reference voltage of the amplifier 15 is set to the median voltage value of the measurement range of the ADC 20. In addition, a resistor 122 is connected between the positive input terminal and the output terminal of the operational amplifier 124.

[0079] The output terminal of the operational amplifier 124 is connected to the ADC 20 of the microcontroller 16. The output voltage v output from the amplifier 15 is out2 is input to the ADC 20 of the microcontroller 16 and sampled by the ADC 20. The amplification degree of the amplifier 15 is determined by the resistance value R1 of the resistor 120 and the resistance value R2 of the resistor 122. The output voltage v output from the amplifier 15 is out2 is calculated by the following equation (13).

number

[0080] Next, the output voltage v of the battery 2 by the voltage detection device 10 of this embodiment bat The measurement process for measuring the above will be described.

[0081] Fig. 21 shows a flowchart illustrating an example of the flow of measurement processing executed by the microcontroller 16 of the voltage detecting device 10. The measurement processing of this embodiment shown in Fig. 21 differs from the measurement processing of the first embodiment (see Fig. 12) in that it includes processing of steps S103 and S105 instead of steps S102 and S104.

[0082] As shown in Fig. 21, when a measurement loop is started in step S100, the CPU 30 determines in the next step S103 whether or not to adjust the subtractor 13. Whether or not to adjust the subtractor 13 depends on, for example, the elapsed time since the previous adjustment, the output voltage v of the battery 2, etc. bat Any conditions, such as fluctuations in the output voltage, can be set, and the CPU 30 makes a determination based on the set conditions. If the subtractor 13 is not to be adjusted, the determination in step S103 is negative, and the process proceeds to step S106. On the other hand, if the subtractor 13 is to be adjusted, the determination in step S103 is positive, and the process proceeds to step S105.

[0083] In step S105, the CPU 30 executes an adjustment process for the subtractor 13, the details of which will be described later.

[0084] In the next step S106, the CPU 30 calculates the output voltage v of the amplifier 15 in the same manner as in the measurement process of the first embodiment. out2 is measured by ADC20 and the sampled value is obtained.

[0085] In the next step S108, the CPU 30 calculates the output voltage v based on the parameters of the amplifier 15. out2 The CPU 30 of this embodiment performs a reverse calculation process to reversely calculate the sample value of the output voltage v by performing the reverse calculation process according to the above equation (13). out2 Reverse-calculate the sample value of

[0086] In the next step S111, the CPU 30 performs a reverse calculation process to reversely calculate the sample value obtained by the process of step S108 based on the parameters of the subtractor 13, and converts it into a voltage value before being input to the subtractor 13.

[0087] Next, in step S112, the CPU 30 calculates the output voltage v of the battery 2. bat The output voltages v of the plurality of batteries 2 are obtained by repeating (looping) the processes of steps S103 to S112. bat The measured value is obtained.

[0088] If the termination condition is met, the CPU 30 terminates the measurement loop in step S114. When the process of step S114 ends, the measurement process shown in FIG.

[0089] Next, the adjustment process of the subtractor 13 executed in step S105 of the measurement process in Fig. 21 will be described. Fig. 22 shows a flowchart illustrating an example of the flow of the subtractor adjustment process executed by the microcontroller 16 of the voltage detection device 10. As shown in Fig. 22, the subtractor adjustment process of this embodiment is similar to the multiplier / divider adjustment process of the first embodiment (see Fig. 13).

[0090] Specifically, in step S500 of FIG. 22, the CPU 30 calculates the output voltage v of the battery 2. bat is measured for a certain period of time, and the output voltage v bat The maximum value of V max and the minimum value V min and are acquired as digital values ​​and stored.

[0091] In the next step S502, the CPU 30 calculates the output voltage v of the battery 2. bat The average value of V ave In this embodiment, the CPU 30 uses the equation (4) described above in the first embodiment to derive the output voltage v bat The maximum value of V max and the minimum value V min By deriving the average value of ave is derived. In the next step S504, the CPU 30 calculates the output voltage V dac In this embodiment, the output voltage V of the DAC 22 is set. dacA, Battery 2's output voltage V bat The average value of V ave Set it to the same value as

[0092] In the next step S506, the CPU 30 outputs the output voltage V dac When the process of step S506 is completed, the subtractor adjustment process shown in FIG. 22 is completed. By this subtractor adjustment process, the subtractor 13 starts to output the output voltage v output from the battery 2. bat The amount of subtraction from is adjusted.

[0093] In this embodiment, the voltage detection device 10 is described as including the subtractor 13 and the amplifier 15 as an example of a circuit having two functions of subtraction and amplification, but is not limited to this. For example, the voltage detection device 10 may be provided with one circuit having two functions of subtraction and amplification. A specific example of this is a differential amplifier.

[0094] As described above, the voltage detection device 10 of the first and second embodiments is a voltage detection device that measures the output voltage of the battery 2 using the ADC 20. The voltage detection device 10 includes a multiplier / divider 12 or a subtractor 13 that functions as a level shifter that shifts the voltage level of a voltage signal output from the battery 2 to the median value of the measurement range of the ADC 20. The voltage detection device 10 also includes an amplifier 14 or an amplifier 15 that amplifies the voltage signal whose voltage level has been shifted by the multiplier / divider 12 or the subtractor 13. The voltage detection device 10 also includes an ADC 20 that measures the voltage signal amplified by the amplifier 14 or the amplifier 15 and outputs a digital sample signal corresponding to the voltage signal. The voltage detection device 10 also includes a microcontroller 16 that includes a CPU 30 that derives the voltage value of the output voltage of the battery 2 based on the sample signal output from the ADC 20.

[0095] For example, unlike the voltage detection device 10 of this embodiment, a battery may be connected to the ADC, and the output voltage V bat When detecting directly, the output voltage Vbat Among the changes in the ADC, small changes (amplitude) over a short period of time that correspond to the load connected to the battery may be rounded to a fixed digital value and may not be detected. On the other hand, increasing the resolution of the ADC to detect small changes (amplitude) may result in higher costs. Furthermore, widening the ADC's measurement range to detect large changes over a long period of time may result in coarse measurements of small changes over a short period of time. Furthermore, since only a portion of the ADC's measurement range is used when measuring small changes over a short period of time, most of the measurement range is unused, resulting in underutilization of the ADC's performance. On the other hand, narrowing the ADC's measurement range to detect small changes over a short period of time may result in the ADC's measurement range being outside the ADC's measurement range, for example, when the battery is fully charged or just before it is fully discharged, and large changes over a long period of time may not be detected.

[0096] In contrast, the voltage detection device 10 of the first and second embodiments has the above-mentioned configuration, and is therefore able to measure the output voltage of the battery 2 within the measurement range of the ADC 20 regardless of the battery output voltage and amplitude, and is therefore able to accurately detect both long-term and short-term changes in the battery output voltage.

[0097] Although a non-inverting amplifier is used for the amplifier 14 in the first embodiment and the amplifier 15 in the second embodiment, an inverting amplifier may be used depending on the characteristics of the voltage change. When an inverting amplifier is used, the sample value of the output of the amplifier 14 or the amplifier 15 measured by the ADC 20 is the actual output voltage V of the battery 2. bat Since the value is the inverted value, the output voltage V of battery 2 is calculated by taking into account the inversion of the value. bat can be derived.

[0098] In the first embodiment, the multiplier-divider 12 is adjusted, and in the second embodiment, the subtractor 13 is adjusted, using the output of the DAC 22. However, the multiplier-divider 12 or the subtractor 13 may be adjusted using a means other than the DAC 22. As the means other than the DAC 22, for example, a means capable of generating any voltage may be used.

[0099] Furthermore, in the first embodiment, a variable resistor other than an analog photocoupler may be used as the variable resistor 106 of the amplifier 14. For example, a variable resistor whose resistance value is controlled by a switch may be used. When using a variable resistor whose resistance value is controlled by a switch, it is preferable to use a DAC or a GPIO (General Purpose Input / Output) appropriately selected depending on the type of resistor to control the resistance value, instead of the PWM 24. Note that when a DAC is used to control the resistance value, it is necessary to provide a channel separate from the DAC 22. Furthermore, when a variable resistor other than an analog photocoupler is used, the resistor 100 may not be necessary.

[0100] The following additional notes are provided regarding the above-described embodiments. (Appendix 1) A voltage detection device that measures the voltage of a battery using an ADC, a level shift unit that shifts the voltage level of a voltage signal output from the battery to the median value of a measurement range of the ADC; an amplifier that amplifies the voltage signal whose voltage level has been shifted by the level shifter; the ADC measuring the voltage signal amplified by the amplifier and outputting a digital sample signal corresponding to the voltage signal; a derivation unit that derives a voltage value of the battery voltage based on the sample signal output from the ADC; A voltage detection device comprising:

[0101] (Appendix 2) the level shift unit includes a multiplier / divider that multiplies or divides the voltage value of the voltage signal output from the battery, 2. The voltage detection device of claim 1.

[0102] (Appendix 3) The level shift unit a subtractor that subtracts from the voltage value of the voltage signal output from the battery 2. The voltage detection device of claim 1.

[0103] (Appendix 4) The level shift unit and the amplifier unit are configured as one circuit. 2. The voltage detection device of claim 1.

[0104] (Appendix 5) The one circuit shifts the voltage level of the voltage signal by subtracting from the voltage value of the voltage signal output from the battery. 5. The voltage detection device according to claim 4.

[0105] (Appendix 6) The amplification degree of the amplifier is variable. 6. A voltage detection device according to any one of claims 1 to 5.

[0106] (Appendix 7) The amplification factor of the amplifier is fixed. 6. A voltage detection device according to any one of claims 1 to 5.

[0107] (Appendix 8) A processor included in a voltage detection device that measures the battery voltage using an ADC A level shift unit shifts the voltage level of the voltage signal output from the battery to the median value of the measurement range of the ADC; an amplifier amplifying the voltage signal whose voltage level has been shifted by the level shifter; The ADC measures the voltage signal amplified by the amplifier and outputs a digital sample signal corresponding to the voltage signal; Deriving a voltage value of the battery voltage based on the sample signal output from the ADC; Voltage detection method.

[0108] (Appendix 9) The processor in the voltage detection device that measures the battery voltage using an ADC A level shift unit shifts the voltage level of the voltage signal output from the battery to the median value of the measurement range of the ADC; an amplifier amplifying the voltage signal whose voltage level has been shifted by the level shifter; The ADC measures the voltage signal amplified by the amplifier and outputs a digital sample signal corresponding to the voltage signal; Deriving a voltage value of the battery voltage based on the sample signal output from the ADC; Voltage detection program for executing the process. [Explanation of symbols]

[0109] 2 Battery 10 Voltage detection device 12 Multipliers and Dividers 13 Subtractor 14, 15 Amplifier 16 microcontrollers 20 ADC 22 DAC 24 PWM 30 CPU

Claims

1. A voltage detection device that measures the voltage of a battery using an ADC, a level shift unit that shifts the voltage level of a voltage signal output from a battery to a median value of a measurement range of the ADC; an amplifier that amplifies the voltage signal whose voltage level has been shifted by the level shifter; the ADC measuring the voltage signal amplified by the amplifier and outputting a digital sample signal corresponding to the voltage signal; a derivation unit that derives a voltage value of the battery voltage based on the sample signal output from the ADC; A voltage detection device comprising:

2. the level shift unit includes a multiplier / divider that multiplies or divides the voltage value of the voltage signal output from the battery, The voltage detection device according to claim 1 .

3. The level shift unit a subtractor that subtracts from the voltage value of the voltage signal output from the battery The voltage detection device according to claim 1 .

4. The level shift unit and the amplifier unit are configured as one circuit. The voltage detection device according to claim 1 .

5. The one circuit shifts the voltage level of the voltage signal by subtracting from the voltage value of the voltage signal output from the battery. The voltage detection device according to claim 4.

6. The amplification degree of the amplifier is variable. The voltage detection device according to claim 1 .

7. The amplification factor of the amplifier is fixed. The voltage detection device according to claim 1 .

8. A processor included in a voltage detection device that measures a battery voltage using an ADC, a level shift unit shifting the voltage level of the voltage signal output from the battery to the median value of the measurement range of the ADC; an amplifier amplifying the voltage signal whose voltage level has been shifted by the level shifter; The ADC measures the voltage signal amplified by the amplifier, and outputs a digital sample signal corresponding to the voltage signal; deriving a voltage value of the battery voltage based on the sample signal output from the ADC; Voltage detection method.

Images