Wiring board

Abstract

To provide a wiring board capable of suppressing solder from remaining on the side of wiring.SOLUTION: A wiring board includes an insulating substrate, a plurality of wirings arranged on one surface of the insulating substrate, and a covering member covering the surface of the wirings, and when the direction in which the wirings are stacked on the insulating substrate is defined as the stacking direction, at least a portion of the side surface, which is the surface on the side in a direction perpendicular to the stacking direction, is an exposed surface that is not covered by the covering member and is exposed to the outside.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a wiring board. [Background technology]

[0002] Conventionally, solder has often been used when electronic components such as semiconductors and light-emitting elements are mounted on wiring boards. For example, Patent Document 1 discloses a method for preventing short circuits between wiring by changing the composition and melting point of the solder depending on the weight of the electronic components. Patent Document 2 discloses a component mounting board in which a recess is provided in a conductor layer, which is the wiring connected to the electronic components, so that any overflowing solder flows into the recess, thereby preventing short circuits. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 5-003197 [Patent Document 2] International Publication No. 2019 / 069744 Summary of the Invention [Problem to be solved by the invention]

[0004] However, neither of the techniques in Patent Documents 1 nor 2 sufficiently considers how to prevent short circuits caused by solder accumulating on the side surfaces of wiring, and therefore there has been a demand for the development of a wiring board that can prevent solder accumulating on the side surfaces of wiring.

[0005] The present invention has been made to solve at least part of the above-mentioned problems, and has an object to provide a wiring board that can prevent solder from remaining on the side surfaces of wiring. [Means for solving the problem]

[0006] The present invention has been made to solve at least part of the above-mentioned problems, and can be realized in the following forms.

[0007] (1) According to one aspect of the present invention, there is provided a wiring board comprising an insulating substrate, a plurality of wirings arranged on one surface of the insulating substrate, and a covering member covering the surfaces of the wirings, wherein, when the direction in which the wirings are stacked on the insulating substrate is defined as a stacking direction, at least a portion of the side surface, which is the surface on the side perpendicular to the stacking direction, is an exposed surface that is not covered by the covering member and is exposed to the outside.

[0008] Generally, a material with low solder wettability is used for the wiring, and a material with high solder wettability is used for the covering member covering the surface of the wiring. With this configuration, at least a portion of the side surface of the wiring, which is the surface perpendicular to the stacking direction, is an exposed surface that is not covered by the covering member and is exposed to the outside. Therefore, even if solder protrudes from between the covering member and the electronic component when bonding an electronic component (such as a semiconductor chip) to the covering member using solder, the side surface of the wiring includes an exposed surface, so that the protruding solder can be prevented from remaining on the side surface of the wiring. As a result, the occurrence of a short circuit due to solder remaining on the side surface of the wiring can be prevented.

[0009] (2) In the wiring board of the above aspect, in at least some of the adjacent wirings, the exposed surface of one wiring may face the exposed surface of the other wiring. This configuration makes it difficult for solder used to bond electronic components to flow between adjacent wirings whose exposed surfaces face each other, thereby preventing short circuits caused by flowing solder bridging adjacent wirings.

[0010] (3) In the wiring board of the above aspect, the distance between the opposing exposed surfaces may be shorter as the exposed surfaces are closer to the insulating substrate. With this configuration, even if solder spills out from between the covering member and the electronic component (such as a semiconductor chip) when the electronic component is attached to the covering member using solder, the solder that spills out and reaches the exposed surface is likely to fall toward the insulating substrate due to gravity, further preventing the solder from remaining on the exposed surface. As a result, the occurrence of short circuits caused by solder remaining on the side of the wiring can be further prevented.

[0011] (4) In the wiring board of the above aspect, a recessed portion may be formed in the insulating substrate in a portion corresponding to the space between adjacent wirings, the recessed portion being recessed below the boundary between the insulating substrate and each of the wirings at the position where each of the wirings is arranged. According to this configuration, even if solder overflows from between the covering member and the electronic component when an electronic component (such as a semiconductor chip) is attached to the covering member using solder, the overflowing solder that flows down can be made to flow into the recessed portion, thereby preventing the occurrence of a short circuit caused by the flowed-down solder bridging adjacent wiring.

[0012] (5) In the wiring board of the above aspect, the covering member may include a first covering member that contacts the surface and covers the surface, and a second covering member that covers the surface by covering the first layer, and the second covering member may be made of a material whose main component is any of Au, Ag, Cu, Ni, Sn, and Cr, and the wiring may be made of a material whose main component is W or Mo. With this configuration, the second covering member made of a material with high solder wettability covers the surface of the wiring made of a material with low solder wettability, and electronic components (such as semiconductor chips) are attached to the second covering member using solder, which prevents the solder from spreading to the exposed surface, thereby further preventing short circuits caused by solder remaining on the side surfaces of the wiring.

[0013] The present invention can be realized in various forms, for example, in the form of an insulating substrate, a wiring substrate, a wiring substrate for semiconductors, and components including these, a method for manufacturing an insulating substrate, a method for manufacturing a wiring substrate, etc. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is an explanatory diagram schematically illustrating a cross-sectional configuration of a wiring board according to an embodiment of the present invention. [Figure 2] FIG. [Figure 3] FIG. 10 is an explanatory diagram schematically illustrating a cross-sectional configuration of a wiring board of a comparative example. [Figure 4] FIG. 10 is an explanatory diagram schematically illustrating a wiring board according to a modified example of the embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0015] FIG. 1 is an explanatory diagram schematically illustrating a cross-sectional configuration of a wiring board 1 according to one embodiment of the present invention. In FIG. 1, mutually orthogonal X, Y, and Z axes are shown to identify directions. These X, Y, and Z axes are common to all figures following FIG. 1. The wiring board 1 is a wiring board on which a semiconductor chip EC is mounted as an electronic component. The wiring board 1 includes an insulating substrate 10, wiring 12, a diffusion prevention layer 14, and a conductive coating 16. Note that FIG. 1 illustrates the wiring board 1 with the semiconductor chip EC mounted thereon via solder 18.

[0016] Fig. 2 is a plan view of the wiring board 1. A cross section of the wiring board 1 shown in Fig. 1 excluding the solder 18 and the semiconductor chip EC (including the terminals TM) corresponds to the cross section taken along line F1-F1 in Fig. 2.

[0017] The insulating substrate 10 is a ceramic substrate made of an insulating material containing Al2O3. Alternatively, the insulating substrate 10 may be a substrate in which an insulating film is applied to the surface of a metal plate, as long as it has insulating properties. A plurality of wirings 12 are arranged on a surface 10S on one side (the side in the +Z-axis direction in FIG. 1) of the insulating substrate 10 (see FIG. 2). The wirings 12 are made of a material whose main component is W or Mo. The main component refers to the component with the highest mass percentage among the components contained in the target material.

[0018] The diffusion barrier layer 14 contacts and covers the surface of the wiring 12. The diffusion barrier layer 14 is disposed between the wiring 12 and the conductive coating 16 (described later) to prevent mutual movement of metal atoms due to diffusion between the wiring 12 and the conductive coating 16. The diffusion barrier layer 14 is made of a material primarily composed of, for example, Ni, Pd, Ti, or a compound of these metals. The conductive coating 16 covers the surface of the wiring 12 by covering the diffusion barrier layer 14. The conductive coating 16 is a conductive film that prevents oxidation of the diffusion barrier layer 14. The conductive coating 16 is made of a material primarily composed of, for example, Au, Ag, Cu, Ni, Sn, Cr, or a compound of these metals. The materials constituting the diffusion barrier layer 14 and the conductive coating 16 have higher solder wettability than the material constituting the wiring 12. The diffusion barrier layer 14 and the conductive coating 16 correspond to the first and second coating members included in the coating member CV that covers the surface of the wiring 12. As in this embodiment, generally, a material with low solder wettability is used for the wiring 12, and a material with high solder wettability is used for the covering member CV that covers the surface of the wiring 12.

[0019] In this embodiment, when the direction in which the wiring 12 is stacked on the insulating substrate 10 is defined as the stacking direction (+Z-axis direction in FIG. 1), the side surface SD is the surface of the wiring 12 on the side perpendicular to the stacking direction (X-axis direction in FIG. 1). Of these side surfaces SD, the side surface SDi facing inward in the X-axis direction is entirely uncovered by the covering member CV (the diffusion prevention layer 14 and the conductive coating 16) and is exposed to the outside. Note that the "inward" in the X-axis direction here refers to the side toward the center of the gap GP between adjacent wirings 12 in the X-axis direction, and this meaning will be used in the following description. On the other hand, of the side surfaces SD, the side surface SDo facing outward in the X-axis direction is entirely covered by the covering member CV and is not exposed to the outside. Note that the "outward" in the X-axis direction here refers to the side away from the center of the gap GP between adjacent wirings 12 in the X-axis direction, and this meaning will be used in the following description.

[0020] 1, in adjacent wirings 12, the exposed surface ES of one wiring 12 faces the exposed surface ES of the other wiring 12. The distance LG between the facing exposed surfaces ES becomes shorter as the exposed surfaces ES are closer to the insulating substrate 10. In other words, the facing exposed surfaces ES become closer to each other as they move toward the -Z-axis direction.

[0021] Furthermore, in the portion of insulating substrate 10 corresponding to the gap GP between adjacent wirings 12, a recessed portion HL is formed that is recessed further than the boundary BD between insulating substrate 10 and each of the wirings 12 at the position where each of the wirings 12 is arranged. The portion of insulating substrate 10 corresponding to the gap GP between adjacent wirings 12 refers to the portion of insulating substrate 10 between the two positions where adjacent wirings 12 are arranged.

[0022] In this embodiment, in all pairs (four pairs in FIG. 2) of wirings 12 adjacent to each other along the X-axis direction on the insulating substrate 10 (surface 10S), the entire side surfaces SDi opposing each other in the X-axis direction are exposed surfaces ES (see FIG. 1), and the distance LG between the opposing exposed surfaces ES becomes shorter the closer to the insulating substrate 10 (see FIG. 1). In addition, recessed portions HL are formed in the portions between all the wirings 12 adjacent to each other along the X-axis direction.

[0023] As described above, the semiconductor chip EC is mounted on the wiring substrate 1 via the solder 18. More specifically, the semiconductor chip EC is bonded to the conductive coating 16 via the solder 18. The portion of the semiconductor chip EC that is bonded to the solder 18 is the terminal TM. In FIG. 1 , most of the solder 18 spreads between the conductive coating 16 and the terminal TM, and part of the solder 18 covers the inner end face of the conductive coating 16 in the X-axis direction.

[0024] When the semiconductor chip EC is bonded to the conductive coating 16 using solder 18, the solder 18 may overflow from between the conductive coating 16 and the semiconductor chip EC (specifically, the terminals TM). In this case, because the entire side surface SDi of the wiring 12 is the exposed surface ES (made of a material with lower solder wettability than the material constituting the conductive coating 16), the overflowing solder 18 flows more easily outward in the X-axis direction on the conductive coating 16 than inward. Even if the solder 18 flows inward in the X-axis direction on the conductive coating 16 and then flows down from the conductive coating 16, the solder 18 is less likely to remain on the exposed surface ES. Furthermore, because the distance LG between the opposing exposed surfaces ES is shorter the closer to the insulating substrate 10 (because the solder 18 that has flowed onto the exposed surface ES is more likely to fall toward the insulating substrate 10 due to gravity), the solder 18 is even less likely to remain on the exposed surface ES. Furthermore, the solder 18 that flows down from the conductive coating 16 flows down into the recessed portion HL.

[0025] 3 is an explanatory diagram showing a schematic cross-sectional configuration of a wiring board 1p of a comparative example. The wiring board 1p of the comparative example differs from the wiring board 1 of the present embodiment mainly in that both the entire side surface SDi and the entire side surface SDo are covered with a covering member CVp (diffusion prevention layer 14p and conductive coating 16p) and are not exposed to the outside, forming a covered surface CS, and in that a recessed portion HL is not formed.

[0026] The wiring board 1p of the comparative example includes a diffusion prevention layer 14p and a conductive coating 16p instead of the diffusion prevention layer 14 and the conductive coating 16. As described above, the diffusion prevention layer 14p and the conductive coating 16p serve as the covering member CVp to cover both the entire side surface SDi and the entire side surface SDo.

[0027] In the wiring board 1p of the comparative example, when the semiconductor chip EC is bonded to the conductive coating 16 using solder 18, the solder 18 that protrudes from between the conductive coating 16p and the semiconductor chip EC (specifically, the terminals TM) easily flows along the conductive coating 16p toward either the inside or outside in the X-axis direction. If the solder 18 flows toward the inside in the X-axis direction on the conductive coating 16 and then flows down from the conductive coating 16, the solder 18 may accumulate on the side SDi of the wiring 12 (specifically, on the conductive coating 16 covering the side SDi) or may accumulate in the gap GP between adjacent wirings 12 in the X-axis direction. Note that FIG. 3 shows a state in which the solder 18 accumulates in the gap GP between adjacent wirings 12. In such cases, a short circuit is likely to occur due to the solder 18 remaining on the side SDi of the wiring 12 or due to the solder 18 bridging the wirings 12 with the accumulated gap GP.

[0028] In this regard, in the wiring board 1 of the present embodiment described above, because the entire side surface SDi of the wiring 12 is the exposed surface ES, even if the solder 18 overflows from between the conductive coating 16 and the semiconductor chip EC when the semiconductor chip EC is bonded to the conductive coating 16 using solder 18, the overflowing solder 18 is more likely to flow outward in the X-axis direction on the conductive coating 16 than inward. Furthermore, because the entire side surface SDi of the wiring 12 is the exposed surface ES, even if the solder 18 flows down from the conductive coating 16 to the inside in the X-axis direction, the solder 18 can be prevented from remaining on the side surface SDi of the wiring 12. As a result, the occurrence of a short circuit due to the solder 18 remaining on the side surface SDi of the wiring 12 can be prevented.

[0029] Furthermore, in the wiring board 1 of this embodiment, the exposed surface ES of one of the adjacent wirings 12 faces the exposed surface ES of the other wiring 12. This makes it possible to prevent the solder 18 used to bond the semiconductor chip EC from flowing down into the gap GP between the adjacent wirings 12 whose exposed surfaces ES face each other. This prevents the solder 18 from accumulating in the gap GP, thereby preventing the flowed-down solder 18 from bridging the adjacent wirings 12 and causing a short circuit.

[0030] Furthermore, in the wiring board 1 of this embodiment, the distance LG between the opposing exposed surfaces ES becomes shorter the closer to the insulating substrate 10. Therefore, even if the solder 18 overflows from between the conductive coating 16 and the semiconductor chip EC, the overflowing solder 18 that reaches the exposed surface ES is likely to fall toward the insulating substrate 10 due to gravity, which further prevents the solder 18 from remaining on the exposed surface ES. As a result, the occurrence of a short circuit due to the solder 18 remaining on the side surface SDi of the wiring 12 can be further prevented.

[0031] Furthermore, recessed portions HL are formed in the wiring board 1 of this embodiment. Therefore, even if the solder 18 overflows from between the conductive coating 16 and the semiconductor chip EC, the overflowing solder 18 that flows down from the conductive coating 16 can be made to flow into the recessed portions HL, thereby preventing the flowed-down solder 18 from bridging the adjacent wirings 12 and causing a short circuit.

[0032] Furthermore, in the wiring board 1 of this embodiment, the conductive coating 16, which is the second coating member, is made of a material primarily composed of Au, Ag, Cu, Ni, Sn, Cr, or a compound of these metals, and the wiring 12 is made of a material primarily composed of W or Mo. Therefore, the conductive coating 16, which is made of a material with high solder wettability, covers the surface of the wiring 12, which is made of a material with low solder wettability, and the semiconductor chip EC is attached to the conductive coating 16 using solder 18, which prevents the solder 18 from spreading to the exposed surface ES. As a result, the occurrence of short circuits caused by the solder 18 remaining on the side surface SDi of the wiring 18 can be further prevented.

[0033] <Modification of this embodiment> The present invention is not limited to the above-described embodiment, and can be embodied in various forms without departing from the spirit of the invention. For example, the following modifications are also possible.

[0034] The above embodiment is an example of a wiring substrate, and the configuration of the wiring substrate can be modified in various ways. For example, the electronic components mounted on the wiring substrate are not limited to semiconductor chips, but may be light-emitting elements such as LED chips or other electronic components. Furthermore, the material constituting the insulating substrate 10 is not limited to Al2O3, but may include any of AlN, SiN, and SiC.

[0035] In the above embodiment, the entire side surface SDi is the exposed surface ES, but this is not limited to this. For example, as in the wiring board 1a shown in FIG. 4, in addition to the entire side surface SDi, the entire side surface SDo may also be the exposed surface ES. Furthermore, the entire side surface SDi may be the covered surface CS, and only the entire side surface SDo may be the exposed surface ES. Furthermore, the entire side surface SDi or the side surface SDo does not have to be the exposed surface ES. In other words, only a portion of the side surface SDi or the side surface SDo may be the exposed surface ES.

[0036] In the above embodiment, in all pairs of wirings 12 adjacent to each other along the X-axis direction on the insulating substrate 10, the exposed surface ES of one wiring 12 faces the exposed surface ES of the other wiring 12, but this is not limited to this. The exposed surface ES of one wiring 12 may face the exposed surface ES of the other wiring 12 only in some pairs of all pairs of wirings 12 adjacent to each other along the X-axis direction on the insulating substrate 10.

[0037] In the above embodiment, the distance LG between the opposing exposed surfaces ES becomes shorter the closer to the insulating substrate 10, but this is not limited to this. The distance LG between the opposing exposed surfaces ES may become longer the closer to the insulating substrate 10, or may be constant at any position in the Z-axis direction. Of course, in order to make it easier for the solder 18 that has reached the exposed surfaces ES to fall toward the insulating substrate 10 due to gravity, it is preferable that the distance LG become shorter the closer to the insulating substrate 10.

[0038] In the above embodiment, the recessed portion HL is formed in the portion of the insulating substrate 10 corresponding to the gap GP between adjacent wirings 12, but this is not limited to this. The recessed portion HL does not have to be formed in the portion of the insulating substrate 10 corresponding to the gap GP between adjacent wirings 12. Of course, it is preferable to form the recessed portion HL in order to prevent the solder 18 that has flowed down from the conductive coating 16 from bridging the adjacent wirings 12 and causing a short circuit.

[0039] In the above embodiment, all pairs of adjacent wirings 12 on the insulating substrate 10 along the X-axis direction have been described. In addition, in pairs of adjacent wirings 12 on the insulating substrate 10 along the Y-axis direction, the side surfaces SD facing each other in the Y-axis direction may be exposed surfaces ES, the distance LG between the opposing exposed surfaces ES may be shorter the closer to the insulating substrate 10, and a recess HL may be formed in the portion of the insulating substrate 10 corresponding to the space between adjacent wirings 12 along the Y-axis direction.

[0040] This aspect has been described above based on embodiments and modifications. However, the above-described embodiments are intended to facilitate understanding of this aspect and are not intended to limit this aspect. This aspect may be modified or improved without departing from the spirit and scope of the claims, and equivalents thereof are included in this aspect. Furthermore, if a technical feature is not described as essential in this specification, it may be deleted as appropriate. [Explanation of symbols]

[0041] 1...Wiring board 10...Insulating substrate 12...Wiring 14... Diffusion prevention layer 16...Conductive coating BD…boundary CS…Coated surface CV: Covering material EC...semiconductor chips ES…Exposed surface GP... HL...recessed part LG…distance SD…side SDi…side SDo…side TM…Terminal

Claims

1. A wiring board, an insulating substrate; a plurality of wirings arranged on one surface of the insulating substrate; a covering member that covers a surface of the wiring, A wiring board characterized in that, when the direction in which the wiring is stacked on the insulating substrate is defined as the stacking direction, at least a portion of the side surface, which is the surface on the side perpendicular to the stacking direction, is an exposed surface that is not covered by the covering member and is exposed to the outside.

2. 2. The wiring board according to claim 1, A wiring board, characterized in that, in at least a portion of the adjacent wirings, the exposed surface of one of the wirings faces the exposed surface of the other of the wirings.

3. 3. The wiring board according to claim 2, A wiring board, characterized in that the distance between the opposing exposed surfaces becomes shorter as the exposed surfaces are closer to the insulating substrate.

4. 4. The wiring board according to claim 1, A wiring board characterized in that a recessed portion is formed in a portion of the insulating substrate corresponding to the space between adjacent wirings, the recessed portion being recessed deeper than the boundary between the insulating substrate and each of the wirings at the position where each of the wirings is arranged.

5. 4. The wiring board according to claim 1, The covering member is a first covering member that contacts and covers the surface; a second coating member that covers the surface via covering the first layer, wherein the second coating member is made of a material containing any one of Au, Ag, Cu, Ni, Sn, and Cr as a main component; The wiring board is characterized in that the wiring is made of a material containing W or Mo as a main component.

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