Semiconductor device and external connection main terminal

Abstract

To reduce a parasitic inductance to reduce a switching loss.SOLUTION: An external connection main terminal 40 includes a P main terminal 42 and an N main terminal 43. The P main terminal 42 includes: an external terminal 42a; a horizontal part 42c that is horizontal to an insulating circuit board and has a first trapezoidal shape; and connection terminals 42d1 and 42d2 that extend obliquely or vertically from the horizontal part 42c toward the insulating circuit board. The N main terminal 43 includes: an external terminal 43a; a horizontal part 43c having a second trapezoid shape horizontal to the insulating circuit board and having the second trapezoid shape overlapping the first trapezoid shape at a position spaced a predetermined distance above the horizontal part 42c; and connection terminals 43d1 and 43d2 extending obliquely or vertically from the horizontal part 43c toward the insulating circuit board.SELECTED DRAWING: Figure 12

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device and an external connection main terminal. [Background technology]

[0002] In a semiconductor device, a collector electrode junction and an emitter electrode junction are adjacent to each other at a predetermined interval and at equal vertical positions (see, for example, Patent Document 1). A wiring holder includes a first lead frame including a first wiring portion connected to a first conductive plate and wired parallel to the main surface of the substrate, and a second lead frame including a second wiring portion connected to a second conductive plate and wired overlapping the front surface of the first wiring portion with a gap (see, for example, Patent Document 2). A region is provided where the positive electrode lead frame and the negative electrode lead frame overlap each other (see, for example, Patent Documents 3 to 6). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-021107 [Patent Document 2] International Publication No. 2021 / 029150 [Patent Document 3] Japanese Patent Application Publication No. 2023-000131 [Patent Document 4] Japanese Patent Publication No. 2023-014524 [Patent Document 5] Japanese Patent Application Publication No. 2023-144474 [Patent Document 6] International Publication No. 2018 / 142863 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to reduce the parasitic inductance and thereby reduce the switching loss. [Means for solving the problem]

[0005] To solve the above problems, a semiconductor device is provided. The semiconductor device has an insulating circuit board group and an external connection main terminal in which a first main terminal and a second main terminal are integrated. The insulating circuit board group includes a plurality of insulating circuit boards. The first main terminal includes a positive external terminal connected to the positive electrode of an external power supply, a first lead frame portion connected to the positive external terminal and horizontal to the insulating circuit board group, and having a first trapezoidal shape, and a first board connection portion formed by extending diagonally or vertically from an end of the first lead frame portion toward the insulating circuit board group. The second main terminal is located above the first main terminal and includes: a negative external terminal connected to the negative external terminal; a second lead frame portion formed and connected to the negative external terminal, horizontal to the group of insulated circuit boards, and having a second trapezoidal shape, the second trapezoidal shape overlapping the first trapezoidal shape at a predetermined distance above the first lead frame portion; and a second substrate connection portion formed and extending obliquely or vertically from the end of the second lead frame portion toward the group of insulated circuit boards. To solve the above problems, an external connection main terminal is provided. The external connection main terminal has a first main terminal and a second main terminal. The first main terminal includes a positive external terminal connected to the positive electrode of an external power supply, a first lead frame portion formed and connected to the positive external terminal and having a first trapezoidal shape that is horizontal to an insulating circuit board group including multiple insulating circuit boards, and a first board connection portion formed by extending diagonally or vertically from an end of the first lead frame portion toward the insulating circuit board group. The second main terminal is located above the first main terminal and includes: a negative external terminal connected to the negative external terminal; a second lead frame portion formed and connected to the negative external terminal, horizontal to the group of insulated circuit boards, and having a second trapezoidal shape, the second trapezoidal shape overlapping the first trapezoidal shape at a predetermined distance above the first lead frame portion; and a second substrate connection portion formed and extending obliquely or vertically from the end of the second lead frame portion toward the group of insulated circuit boards. [Effects of the Invention]

[0006] According to one aspect, it is possible to reduce parasitic inductance and reduce switching loss. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a first plan view of a semiconductor device. [Figure 2] FIG. 2 is a side view of the semiconductor device. [Figure 3] 1 is a side cross-sectional view of a semiconductor device; [Figure 4] FIG. 2 is a second plan view of the semiconductor device. [Figure 5] FIG. 10 is a third plan view of the semiconductor device. [Figure 6] FIG. 4 is a fourth plan view of the semiconductor device. [Figure 7] FIG. 1 is a diagram illustrating an equivalent circuit of the function of a semiconductor device. [Figure 8] FIG. 2 is a diagram showing the configuration of a PN main terminal of a first reference example. [Figure 9] FIG. 10 is a diagram showing the configuration of a PN main terminal of a second reference example. [Figure 10] FIG. 10 is a diagram illustrating a configuration of a PN main terminal of a third reference example. [Figure 11] FIG. 10 is a diagram showing evaluations of the PN main terminals of the first, second, and third reference examples. [Figure 12] 2 is a diagram illustrating an example of the configuration of a PN main terminal according to the present embodiment. FIG. [Figure 13] 1A and 1B are diagrams illustrating an example of a first extension direction of the connection terminal of the PN main terminal, where (a) shows the extension direction of the connection terminal of the P main terminal, and (b) shows the extension direction of the connection terminal of the N main terminal. [Figure 14] 10A and 10B are diagrams illustrating an example of a second extension direction of the connection terminal of the PN main terminal, where (a) shows the extension direction of the connection terminal of the P main terminal, and (b) shows the extension direction of the connection terminal of the N main terminal. [Figure 15] 10A and 10B are diagrams for explaining the inclination angle and connection points of the connection terminal formed on the P main terminal. [Figure 16]10A and 10B are diagrams for explaining the inclination angles and connection points of connection terminals formed on the N main terminal. [Figure 17] 2 is a diagram illustrating an example of the configuration of a PN main terminal according to the present embodiment. FIG. [Figure 18] 10A and 10B are diagrams for explaining protrusions of an insulator; [Figure 19] FIG. 2 is a diagram showing an example of a connection area of ​​a PN main terminal. [Figure 20] FIG. 10 is a diagram showing an evaluation of the PN main terminal of the present embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments will be described with reference to the drawings. In the following description, the terms "front surface" and "top surface" refer to the XY plane facing upward (+Z direction) in the semiconductor device shown in the drawings. Similarly, "top" refers to the upward (+Z direction) direction in the semiconductor device shown in the drawings. The terms "back surface" and "bottom surface" refer to the XY plane facing downward (-Z direction) in the semiconductor device shown in the drawings. Similarly, the term "bottom" refers to the downward (-Z direction) direction in the semiconductor device shown in the drawings. Similar directions will be used in other drawings as necessary. The terms "front surface," "top surface," "top," "back surface," "bottom surface," "bottom," and "side surface" are merely convenient expressions for specifying relative positional relationships and do not limit the technical concept of the present invention. For example, "top" and "bottom" do not necessarily refer to the vertical direction relative to the ground. In other words, the "top" and "bottom" directions are not limited to the direction of gravity.

[0009] The semiconductor device will be described with reference to Figs. 1 to 3. Fig. 1 is a first plan view of the semiconductor device. Fig. 2 is a side view of the semiconductor device. Fig. 3 is a side cross-sectional view of the semiconductor device. Fig. 3 is a cross-sectional view taken along dashed dotted line X1-X1 in Fig. 1. Wires are not shown in Fig. 3.

[0010] The semiconductor device 10 includes a heat sink 21 disposed on the back surface and a case 22 disposed on the heat sink 21 and covering the side surfaces. The semiconductor device 10 also includes a storage area 22a enclosed by the heat sink 21 and the case 22, where components are housed. The components in the storage area 22a are sealed with a sealing member 24. The storage area 22a includes components such as an insulating circuit board, a semiconductor chip disposed on the insulating circuit board, and wires connecting these components. FIG. 3 shows insulating circuit boards 31 and 33 as part of the insulating circuit board. The semiconductor device 10 also includes an external connection output terminal 41 and external connection main terminals 40 including a main terminal 42 (first main terminal) and a main terminal 43 (second main terminal).

[0011] The heat sink 21 is a plate-like member that is substantially rectangular in plan view. The outer shape of the heat sink 21 may be slightly smaller than the outer shape of the case 22. The corners of the heat sink 21 may be round-chamfered or C-chamfered. The heat sink 21 is made of a metal that has excellent heat dissipation properties. Such metals are, for example, copper, aluminum, or an alloy containing at least one of these. The surface of the heat sink 21 may be plated to improve corrosion resistance. In this case, examples of the plating material that can be used include nickel, a nickel-phosphorus alloy, and a nickel-boron alloy.

[0012] An insulating circuit board is joined to the front surface of heat sink 21 via a joining member such as solder. The insulating circuit board includes an insulating plate, a circuit pattern formed on the front surface of the insulating plate, and a metal plate formed on the back surface of the insulating plate.

[0013] The insulating plate has a rectangular shape in a plan view. The corners of the insulating plate may be rounded or chamfered. The insulating plate is made of ceramics with high thermal conductivity. Such ceramics are made of, for example, a material containing aluminum oxide, silicon nitride, or aluminum nitride as a main component.

[0014] The circuit pattern is formed from a metal with excellent conductivity. Such metals include, for example, copper, aluminum, or an alloy containing at least one of these. The surface of the circuit pattern may be plated to improve corrosion resistance. Examples of plating materials used in this case include nickel, nickel-phosphorus alloy, and nickel-boron alloy. Furthermore, a semiconductor chip, an external connection output terminal 41, and main terminals 42 and 43 are mechanically and electrically connected to the circuit pattern as appropriate. The configurations of the circuit pattern and the semiconductor chip will be described later.

[0015] The metal plate is formed mainly from a metal with excellent thermal conductivity. Such metals are, for example, copper, aluminum, or an alloy containing at least one of these. To improve the corrosion resistance of the metal plate, a plating process may be performed. In this case, the plating material used is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy.

[0016] Examples of insulated circuit boards having such components include DCB (Direct Copper Bonding) boards and AMB (Active Metal Brazed) boards. Furthermore, the circuit pattern, semiconductor chip, external connection output terminal 41, and main terminals 42 and 43 on the insulated circuit board are joined via solder. Alternatively, external connection output terminal 41 and main terminals 42 and 43 may be joined to the circuit pattern on the insulated circuit board by laser welding or ultrasonic welding. Lead-free solder is used. Lead-free solder primarily contains at least one of the following alloys: a tin-silver-copper alloy, a tin-zinc-bismuth alloy, a tin-copper alloy, and a tin-silver-indium-bismuth alloy. Instead of solder, a metal sintered body may be used. The material of the metal sintered body is silver, gold, nickel, copper, or an alloy containing at least one of these.

[0017] Furthermore, wires are used to mechanically and electrically connect semiconductor chips, between semiconductor chips and circuit patterns, and between multiple circuit patterns on an insulated circuit board on which semiconductor chips are mounted. The wires are made of a material with excellent conductivity. Examples of such materials include gold, silver, copper, aluminum, and alloys containing at least one of these. The diameter of the wire is, for example, 20 μm or more and 300 μm or less when used as a control electrode of a semiconductor chip. Alternatively, the diameter of the wire is, for example, 350 μm or more and 500 μm or less when connected to a main electrode of a semiconductor chip and used as main current wiring.

[0018] The semiconductor chip may be primarily made of silicon. Such a semiconductor chip may include a reverse-conducting (RC) IGBT, which combines the functions of an insulated gate bipolar transistor (IGBT) and a free wheeling diode (FWD). The semiconductor chip has a collector electrode as an input electrode on its back surface, and a gate electrode as a control electrode and an emitter electrode as an output electrode on its front surface.

[0019] In this embodiment, the semiconductor chip will be described as an RC-IGBT. The semiconductor chip may be primarily composed of silicon carbide. Such a semiconductor chip may be, for example, a power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor). This semiconductor chip includes a power MOSFET and an FWD. In this case, the semiconductor chip includes a drain electrode as an input electrode on the back surface, a gate electrode as a control electrode, and a source electrode as an output electrode on the front surface. The semiconductor chip is bonded to a predetermined circuit pattern on an insulating circuit board via a bonding member. The bonding member may be the aforementioned solder or a metal sintered material. The metal sintered body may be primarily composed of, for example, aluminum, copper, or an alloy containing at least one of these.

[0020] Case 22 includes sidewalls 23 and a lid 25 that covers the upper portions of sidewalls 23. Note that FIG. 1 shows a plan view without lid 25. The inner surfaces of sidewalls 23 are rectangular in plan view, and sidewalls 23 include first to fourth inner wall surfaces 23a to 23d that surround storage area 22a on all four sides. First inner wall surface 23a and third inner wall surface 23c correspond to the short sides, and second inner wall surface 23b and fourth inner wall surface 23d correspond to the long sides. The lower surfaces of sidewalls 23 are bonded to the outer edge of heat sink 21 with adhesive or the like.

[0021] The case 22 is made of a thermoplastic resin, and the side wall portion 23 and the lid portion 25 are integrally formed by insert molding, including the external connection output terminal 41 and the main terminals 42, 43. Examples of such resins include polyphenylene sulfide resin, polybutylene terephthalate resin, polybutylene succinate resin, polyamide resin, and acrylonitrile butadiene styrene resin.

[0022] The storage area 22a surrounded by the heat sink 21 and the sidewall 23 of the case 22 is filled with a sealing member 24. As a result, components such as an insulating circuit board, circuit patterns, semiconductor chips, and wires arranged in the storage area 22a are sealed with the sealing member 24. The sealing member is an insulating polymer gel, preferably containing silicone gel as its main component.

[0023] Fig. 4 is a second plan view of the semiconductor device. Fig. 5 is a third plan view of the semiconductor device. Fig. 4 shows a state in which the sealing member 24 in the storage area 22a of the case 22 is removed from the first plan view of Fig. 1. Wires are not shown in Fig. 4. Fig. 5 shows a state in which the main terminal 43 is further removed from the second plan view of Fig. 4. The external connection output terminal 41 and the main terminals 42 and 43 will be described below with reference to Figs. 3 to 5.

[0024] The external connection output terminal 41 and the main terminals 42, 43 electrically connect the circuit pattern to an external device. The external connection output terminal 41 and the main terminals 42, 43 are formed from flat conductive members. A portion of the main terminals 42, 43 is integrally held by a terminal holder 44.

[0025] One end of external connection output terminal 41 is exposed on the upper surface of lid portion 25 of case 22 and forms external output terminal 41a for connecting to an external device. External connection output terminal 41 also includes horizontal portions 41b and 41c, in this order, from external output terminal 41a toward the other end. Horizontal portions 41b and 41c are horizontal with the bottom surface of storage area 22a, with horizontal portion 41b being lower than external output terminal 41a, and horizontal portion 41c being lower than horizontal portion 41b. External output terminal 41a and horizontal portions 41b and 41c are formed, for example, by bending flat external connection output terminal 41, and external output terminal 41a and horizontal portion 41b, and horizontal portion 41b and horizontal portion 41c are both connected by connecting portions extending vertically.

[0026] The external output terminal 41a is divided into external output terminals 41a1 to 41a3 in the horizontal direction (Y direction). The horizontal portion 41c is divided into horizontal portions 41c1 and 41c2 across a central slit 41c3 in the horizontal direction (Y direction). Connection terminals 41d1 and 41d2 are formed at the end of the horizontal portion 41c1, extending downward. The connection terminals 41d1 and 41d2 are electrically and mechanically connected to circuit patterns 31b and 31c (described later) via solder, respectively. Connection terminals 41d3 and 41d4 are formed at the end of the horizontal portion 41c2, extending downward. The connection terminals 41d3 and 41d4 are electrically and mechanically connected to circuit patterns 32b and 32c (described later) via solder, respectively. Alternatively, they may be directly connected by, for example, laser welding or ultrasonic welding.

[0027] Meanwhile, one end of the main terminal 42 is exposed on the upper surface of the lid portion 25 of the case 22 and forms an external terminal 42a for connection to an external device (external power source). The main terminal 42 also includes horizontal portions 42b and 42c, which are arranged in this order from the external terminal 42a toward the other end. The horizontal portions 42b and 42c are horizontal with the bottom surface of the storage area 22a, with the height of the horizontal portion 42b being lower than that of the external terminal 42a, and the height of the horizontal portion 42c being lower than that of the horizontal portion 42b. The external terminal 42a and the horizontal portions 42b and 42c are formed by bending the flat main terminal 42, and the external terminal 42a and the horizontal portion 42b, and the horizontal portion 42b and the horizontal portion 42c are both connected by connecting portions extending vertically.

[0028] The external terminal 42a is divided into external terminals 42a1 and 42a2 in the horizontal direction (Y direction). Furthermore, downwardly extending connection terminals 42d1 and 42d2 are formed at the end of the horizontal portion 42c. The connection terminals 42d1 and 42d2 are electrically and mechanically connected to the circuit patterns 31a and 32a (described later) via solder, respectively. Alternatively, they may be directly connected by, for example, laser welding or ultrasonic welding.

[0029] One end of the main terminal 43 is exposed on the upper surface of the lid portion 25 of the case 22 and forms an external terminal 43a for connection to an external device. The external terminal 43a is divided into external terminals 43a1 and 43a2 in the horizontal direction (Y direction). The main terminal 43 also includes a horizontal portion 43c extending from the external terminal 43a to the other end. The horizontal portion 43c is horizontal with the bottom surface of the storage area 22a and is lower in height than the external terminal 43a. The external terminal 43a and the horizontal portion 43c are formed by bending the flat main terminal 43, and the external terminal 43a and the horizontal portion 43c are connected by a connecting portion extending vertically.

[0030] Furthermore, downwardly extending connection terminals 43d1 and 43d2 are formed at the end of horizontal portion 43c. Connection terminals 43d1 and 43d2 are electrically and mechanically connected to circuit patterns 33b and 34b (described later) respectively via solder. Alternatively, they may be directly connected by, for example, laser welding or ultrasonic welding.

[0031] The terminal holding portion 44 seals the connecting portion connecting the external terminal 43a and horizontal portion 43c of the main terminal 43, the connecting portions connecting the external terminal 42a and horizontal portions 42b and 42c of the main terminal 42, and the horizontal portion 42b. This maintains insulation even when the main terminals 42 and 43 are arranged close to each other. The terminal holding portion 44 may be made of the same material as the case 22.

[0032] Although not shown, a control terminal may be provided. One end of the control terminal is also exposed from the case 22 or the lid 25 of the case 22, and the other end is disposed within the storage area 22a. The other end of the control terminal is electrically connected to the control electrode of the semiconductor chip. The other end of the control terminal may be mechanically and electrically connected to the control electrode of the semiconductor chip by a control wire. The other end of the control terminal and the control wire may be connected via a circuit pattern. The diameter of the control wire may be smaller than the diameter of the wire used for the main current wiring.

[0033] The horizontal portion 41c of the external connection output terminal 41, the horizontal portion 42c of the main terminal 42, and the horizontal portion 43c of the main terminal 43 are located at a position lower than the upper surface 24a of the sealing member 24 and are sealed by the sealing member 24.

[0034] Fig. 6 is a fourth plan view of the semiconductor device. Fig. 6 shows the state in which external connection output terminal 41 and main terminals 42 and 43 are removed from the third plan view of Fig. 5. The configurations of the insulating circuit board, semiconductor chip, and wires will be described below with reference to Fig. 6.

[0035] A group of insulating circuit boards is bonded to the front surface of heat sink 21. The group of insulating circuit boards includes insulating circuit board 31 (first insulating circuit board), insulating circuit board 32 (second insulating circuit board), insulating circuit board 33 (third insulating circuit board), and insulating circuit board 34 (fourth insulating circuit board). Furthermore, auxiliary boards 61 and 62 are bonded to the front surface of heat sink 21. Auxiliary board 61 is provided near the long sides of insulating circuit boards 31 and 32 in the +Y direction, and has a lead pattern formed thereon to connect to insulating circuit boards 31 and 32. Furthermore, auxiliary board 62 is provided near the long sides of insulating circuit boards 33 and 34 in the -Y direction, and has a lead pattern formed thereon to connect to insulating circuit boards 33 and 34. Note that auxiliary boards 61 and 62 may include, for example, a circuit pattern that controls input to a gate electrode of a semiconductor chip and is connected to a control terminal, or a circuit pattern that is connected to an auxiliary emitter terminal.

[0036] Circuit patterns 31a to 31c are formed on the front surface of insulating plate 31d included in insulating circuit board 31. Circuit patterns 32a to 32c are formed on the front surface of insulating plate 32d included in insulating circuit board 32. Circuit patterns 33a and 33b are formed on the front surface of insulating plate 33d included in insulating circuit board 33. Circuit patterns 34a and 34b are formed on the front surface of insulating plate 34d included in insulating circuit board 34.

[0037] The circuit pattern 31a is T-shaped in a plan view. The circuit pattern 31a is provided toward the end of the insulating plate 31d in the +Y direction. Semiconductor chips 51a to 51c are arranged on the circuit pattern 31a. The semiconductor chips 51a and 51b are arranged on both sides of the circuit pattern 31a in the ±X directions. The semiconductor chip 51c is arranged in the center between the semiconductor chips 51a and 51b of the circuit pattern 31a. The back surfaces of the semiconductor chips 51a to 51c and the circuit pattern 31a are mechanically and electrically joined by solder, which is a joining member.

[0038] Circuit patterns 31b and 31c are rectangular in plan view. Circuit patterns 31b and 31c are arranged on insulating plate 31d, sandwiching a portion of circuit pattern 31a that protrudes in the -Y direction. An output electrode on the front surface of semiconductor chip 51a and circuit pattern 31b are mechanically and electrically connected by wire 111. An output electrode on the front surface of semiconductor chip 51b and circuit pattern 31c are mechanically and electrically connected by wire 112. An output electrode on the front surface of semiconductor chip 51c and circuit patterns 31b and 31c are mechanically and electrically connected by wire 113.

[0039] The circuit pattern 31b and the circuit pattern 33a are mechanically and electrically connected by a wire 151. The circuit pattern 31c and the circuit pattern 33a are mechanically and electrically connected by a wire 152.

[0040] Furthermore, a connection terminal 42d1 of the main terminal 42 is electrically and mechanically connected to the region 31a1 of the circuit pattern 31a by soldering, ultrasonic bonding, or the like. A connection terminal 41d1 of the external connection output terminal 41 is electrically and mechanically connected to the region 31b1 of the circuit pattern 31b by soldering. A connection terminal 41d2 of the external connection output terminal 41 is electrically and mechanically connected to the region 31c1 of the circuit pattern 31c by soldering.

[0041] The circuit pattern 32a is T-shaped in a plan view. The circuit pattern 32a is provided toward the end of the insulating plate 32d in the +Y direction. Semiconductor chips 52a to 52c are arranged on the circuit pattern 32a. The semiconductor chips 52a and 52b are arranged on both sides of the circuit pattern 32a in the ±X directions. The semiconductor chip 52c is arranged in the center between the semiconductor chips 52a and 52b of the circuit pattern 32a. The back surfaces of the semiconductor chips 52a to 52c and the circuit pattern 32a are mechanically and electrically joined by solder, which is a joining member.

[0042] The circuit patterns 32b and 32c are rectangular in plan view. The circuit patterns 32b and 32c are arranged on the insulating plate 32d, sandwiching a portion of the circuit pattern 32a that protrudes in the -Y direction. The output electrode on the front surface of the semiconductor chip 52a and the circuit pattern 32b are mechanically and electrically connected by a wire 121. The output electrode on the front surface of the semiconductor chip 52b and the circuit pattern 32c are mechanically and electrically connected by a wire 122. The output electrode on the front surface of the semiconductor chip 52c and the circuit patterns 32b and 32c are mechanically and electrically connected by a wire 123.

[0043] The circuit pattern 32b and the circuit pattern 34a are mechanically and electrically connected by a wire 153. The circuit pattern 32c and the circuit pattern 34a are mechanically and electrically connected by a wire 154.

[0044] Furthermore, a connection terminal 42d2 of the main terminal 42 is electrically and mechanically connected to an area 32a1 of the circuit pattern 32a by soldering, ultrasonic bonding, or the like. A connection terminal 41d3 of the external connection output terminal 41 is electrically and mechanically connected to an area 32b1 of the circuit pattern 32b by soldering. A connection terminal 41d4 of the external connection output terminal 41 is electrically and mechanically connected to an area 32c1 of the circuit pattern 32c by soldering.

[0045] The circuit pattern 33a is U-shaped in a plan view. The circuit pattern 33a is provided near the end of the insulating plate 33d on the -Y direction side. Semiconductor chips 53a to 53c are arranged on the circuit pattern 33a. The semiconductor chips 53a and 53b are arranged on both sides of a recess in the circuit pattern 33a. The semiconductor chip 53c is arranged between the semiconductor chips 53a and 53b of the circuit pattern 33a, in the center of the end on the -Y direction side. The back surfaces of the semiconductor chips 53a to 53c and the circuit pattern 33a are mechanically and electrically joined by solder, which is a joining member.

[0046] Circuit pattern 33b is T-shaped in plan view and is formed within the recess of circuit pattern 33a, near the end of insulating plate 33d on the +Y direction side. An output electrode on the front surface of semiconductor chip 53a and circuit pattern 33b are mechanically and electrically connected by wire 131. An output electrode on the front surface of semiconductor chip 53b and circuit pattern 33b are mechanically and electrically connected by wire 132. An output electrode on the front surface of semiconductor chip 53c and circuit pattern 33b are mechanically and electrically connected by wire 133.

[0047] The circuit pattern 34a is U-shaped in a plan view. The circuit pattern 34a is provided near the end of the insulating plate 34d on the -Y direction side. Semiconductor chips 54a to 54c are arranged on the circuit pattern 34a. The semiconductor chips 54a and 54b are arranged on both sides of a recess in the circuit pattern 34a. The semiconductor chip 54c is arranged between the semiconductor chips 54a and 54b of the circuit pattern 34a, in the center of the end on the -Y direction side. The back surfaces of the semiconductor chips 54a to 54c and the circuit pattern 34a are mechanically and electrically joined by solder.

[0048] Circuit pattern 34b is T-shaped in plan view and is formed within the recess of circuit pattern 34a, near the end of insulating plate 34d on the +Y direction side. An output electrode on the front surface of semiconductor chip 54a and circuit pattern 34b are mechanically and electrically connected by wire 141. An output electrode on the front surface of semiconductor chip 54b and circuit pattern 34b are mechanically and electrically connected by wire 142. An output electrode on the front surface of semiconductor chip 54c and circuit pattern 34b are mechanically and electrically connected by wire 143.

[0049] Furthermore, a connection terminal 43d1 of the main terminal 43 is electrically and mechanically connected to the region 33b1 of the circuit pattern 33b by soldering, ultrasonic bonding, etc. A connection terminal 43d2 of the main terminal 43 is electrically and mechanically connected to the region 34b1 of the circuit pattern 34b by soldering, ultrasonic bonding, etc.

[0050] The wires 111-113, 121-123, 131-133, 141-143, and 151-154 are bonding wires whose main component is a metal with excellent conductivity. Such metals are made of aluminum, copper, or an alloy containing at least one of these. In this embodiment, the wires 111-113, 121-123, 131-133, 141-143, and 151-154 are used as main current wiring, and their diameters are, for example, 300 μm or more and 500 μm or less.

[0051] A bonding device may be used to bond the wires 111-113, 121-123, 131-133, 141-143, and 151-154 to the conductive parts (circuit patterns or output electrodes on the front surface of the semiconductor chip). A bonding tool included in the bonding device applies ultrasonic vibrations while pressing the wires 111-113, 121-123, 131-133, 141-143, and 151-154 against the conductive parts. By this wedge bonding, the wires 111-113, 121-123, 131-133, 141-143, and 151-154 are bonded to the conductive parts.

[0052] As already mentioned, the semiconductor chips 51a to 51c, 52a to 52c, 53a to 53c, and 54a to 54c are RC-IGBTs that combine the functions of an IGBT and an FWD. The power conversion function of the semiconductor device 10 will now be described with reference to FIG.

[0053] Fig. 7 is a diagram showing an equivalent circuit of the function of a semiconductor device. Fig. 7 shows an inverter circuit configured with semiconductor chips 51a-51c and 52a-52c including RC-IGBTs and semiconductor chips 53a-53c and 54a-54c. Semiconductor chips 51a-51c and 52a-52c include a switching element (IGBT) M1 and a diode element (FWD) D1. Semiconductor chips 53a-53c and 54a-54c include a switching element (IGBT) M2 and a diode element (FWD) D2.

[0054] Semiconductor device 10 forms a half-bridge circuit including upper arm portion A and lower arm portion B. Upper arm portion A of semiconductor device 10 includes wires 111-113 and wires 121-123, semiconductor chips 51a-51c and semiconductor chips 52a-52c, and main terminal 42, which are arranged on insulating circuit board 31 and insulating circuit board 32. It also includes external connection output terminal 41, which is arranged on circuit patterns 31b and 31c and circuit patterns 32b and 32c of insulating circuit board 31 and insulating circuit board 32.

[0055] Lower arm portion B of semiconductor device 10 includes wires 131 to 133 and wires 141 to 143, semiconductor chips 53a to 53c and semiconductor chips 54a to 54c, and main terminal 43, which are arranged on insulating circuit board 33 and insulating circuit board 34.

[0056] Insulated circuit boards 31 and 32 and insulated circuit boards 33 and 34 are connected by wires 151 and 152 and wires 153 and 154. This connects upper arm portion A and lower arm portion B. This allows semiconductor device 10 to function as a half-bridge circuit including upper arm portion A and lower arm portion B.

[0057] In this case, in the semiconductor device 10, the wiring 55a connecting the connection point P connected to the positive electrode of the external power supply (not shown) and the connection point C1 of the input electrode (collector electrode) on the back surface of the semiconductor chips 51a to 51c and 52a to 52c corresponds to the main terminal 42 and the circuit patterns 31a and 32a. In other words, the main terminal 42 is the P main terminal that constitutes the positive input terminal of the half-bridge circuit.

[0058] Wiring 55c connecting connection point M connected to a terminal of a load (not shown) with connection point E1C2 of output electrodes (emitter electrodes) of semiconductor chips 51a-51c and semiconductor chips 52a-52c and input electrodes (collector electrodes) of semiconductor chips 53a-53c and semiconductor chips 54a-54c corresponds to external connection output terminal 41, circuit patterns 31b, 31c, circuit patterns 32b, 32c, wires 151, 152, wires 153, 154, and circuit patterns 33a, 34a. In other words, external connection output terminal 41 is an M terminal that constitutes an output terminal in a half-bridge circuit.

[0059] Wiring 55b connecting connection point N connected to the negative pole of the external power supply and connection point E2 of the output electrodes (emitter electrodes) of semiconductor chips 53a to 53c and 54a to 54c corresponds to main terminal 43 and circuit patterns 33b and 34b. In other words, main terminal 43 is the N main terminal that constitutes the negative input terminal of the half-bridge circuit.

[0060] Wirings 55d and 55e connecting connection points G1 and G2 to which control signals are input and control electrodes (gate electrodes) of semiconductor chips 51a to 51c, 52a to 52c and semiconductor chips 53a to 53c, 54a to 54c correspond to control terminals (not shown).

[0061] Next, the P main terminal and N main terminal (hereinafter, the P main terminal and N main terminal may be collectively referred to as PN main terminals) which are external connection main terminals of the reference example will be described with reference to FIGS. 8 to 11. FIG. 8 is a diagram showing the configuration of a PN main terminal of the first reference example. PN main terminal 210 has a paired structure consisting of P main terminal 211 and N main terminal 213, and P main terminal 212 and N main terminal 214. Note that terminal holders for maintaining the insulation between P main terminal 211 and N main terminal 213, and between P main terminal 212 and N main terminal 214, are not shown in the figure.

[0062] One end of P main terminal 211 is exposed on the top surface of the case and forms external terminal 211a for connection to an external device. P main terminal 211 also includes horizontal portions 211b and 211c, arranged in this order from external terminal 211a to the other end. Horizontal portions 211b and 211c are horizontal (in the Y direction) with respect to the bottom surface of the device storage area, with horizontal portion 211b being lower than external terminal 211a, and horizontal portion 211c being lower than horizontal portion 211b. External terminal 211a and horizontal portions 211b and 211c are formed by bending flat P main terminal 211, and external terminal 211a and horizontal portion 211b, and horizontal portion 211b and horizontal portion 211c are both connected by connecting portions extending vertically. Furthermore, connection terminals 211d1 and 211d2 extending vertically toward the insulating circuit board are formed at the end of the horizontal portion 211c.

[0063] The N main terminal 213 is located above the P main terminal 211, and one end of the N main terminal 213 is exposed on the top surface of the case and forms an external terminal 213a for connection to an external device. The N main terminal 213 includes a horizontal portion 213c extending from the external terminal 213a to the other end. The horizontal portion 213c is horizontal to the bottom surface of the device storage area and is lower in height than the external terminal 213a. The horizontal portion 213c is formed longer in the +Y direction than the horizontal portion 211c of the P main terminal 211, and is positioned with an overlapping region that overlaps the horizontal portion 211c at a predetermined distance (hereinafter, the overlapping region may be referred to as a laminated portion).

[0064] The external terminal 213a and horizontal portion 213c are formed by bending the flat N main terminal 213, and are connected to each other by a connecting portion extending vertically. Furthermore, connection terminals 213d1 and 213d2 are formed at the end of the horizontal portion 213c, extending vertically toward the insulating circuit board. Connection terminals 211d1 and 211d2 of P main terminal 211 and connection terminals 213d1 and 213d2 of N main terminal 213 are electrically and mechanically connected to the circuit patterns via solder, or are directly connected by, for example, laser welding or ultrasonic welding.

[0065] Meanwhile, one end of the P main terminal 212 is exposed on the top surface of the case and forms external terminal 212a for connection to an external device. P main terminal 212 also includes horizontal portions 212b and 212c, arranged in this order from external terminal 212a toward the other end. Horizontal portions 212b and 212c are horizontal with respect to the bottom surface of the device storage area, with horizontal portion 212b being lower than external terminal 212a, and horizontal portion 212c being lower than horizontal portion 212b. External terminal 212a and horizontal portions 212b and 212c are formed by bending flat P main terminal 212, and external terminal 212a and horizontal portion 212b, and horizontal portion 212b and horizontal portion 212c are connected by connecting portions extending vertically. Furthermore, connection terminals 212d1 and 212d2 extending vertically toward the insulating circuit board are formed at the end of the horizontal portion 212c.

[0066] The N main terminal 214 is located above the P main terminal 212, and one end of the N main terminal 214 is exposed on the top surface of the case and forms an external terminal 214a for connecting to an external device. The N main terminal 214 includes a horizontal portion 214c extending from the external terminal 214a to the other end. The horizontal portion 214c is horizontal to the bottom surface of the device storage area and is lower in height than the external terminal 214a. The horizontal portion 214c is longer in the +Y direction than the horizontal portion 212c of the P main terminal 212, and is positioned with a laminated portion that overlaps the horizontal portion 212c at a predetermined distance.

[0067] The external terminal 214a and horizontal portion 214c are formed by bending the flat N main terminal 214, and are connected to each other by a connecting portion extending vertically. Furthermore, connection terminals 214d1 and 214d2 are formed at the end of the horizontal portion 214c, extending vertically toward the insulating circuit board. Connection terminals 212d1 and 212d2 of P main terminal 212 and connection terminals 214d1 and 214d2 of N main terminal 214 are electrically and mechanically connected to the circuit patterns via solder, or are directly connected by, for example, laser welding or ultrasonic welding.

[0068] 9 is a diagram showing the configuration of a PN main terminal of the second reference example. PN main terminal 220 has a P main terminal 221 and an N main terminal 222. Note that the illustration of a terminal holder for maintaining the insulation between P main terminal 221 and N main terminal 222 is omitted. One end of P main terminal 221 is exposed on the top surface of the case and forms external terminal 221a for connection to an external device. External terminal 221a is divided into external terminals 221a1 and 221a2 in the horizontal direction (Y direction). P main terminal 221 also includes horizontal portions 221b and 221c in this order from external terminal 221a to the other end.

[0069] Horizontal portions 221b and 221c are horizontal to the bottom surface of the device storage area, and horizontal portion 221b is lower in height than external terminal 221a, and horizontal portion 221c is lower in height than horizontal portion 221b. External terminal 221a and horizontal portions 221b and 221c are formed by bending flat P main terminal 221, and external terminal 221a and horizontal portion 221b, and horizontal portion 221b and horizontal portion 221c are connected by connecting portions extending vertically. In addition, connection terminals 221d1 and 221d2 extending vertically toward the insulating circuit board are formed at the end of horizontal portion 221c.

[0070] The N main terminal 222 is located above the P main terminal 221, and one end of the N main terminal 222 is exposed on the top surface of the case and forms external terminal 222a for connecting to an external device. External terminal 222a is divided horizontally into external terminals 222a1 and 222a2. N main terminal 222 includes horizontal portion 222c extending from external terminal 222a to the other end. Horizontal portion 222c is horizontal with respect to the bottom surface of the device storage area, and is lower than external terminal 222a and higher than horizontal portion 221c of P main terminal 221. Horizontal portion 222c is formed shorter in the -Y direction than horizontal portion 221c of P main terminal 221, and is positioned with a laminated portion overlapping horizontal portion 221c at a predetermined distance.

[0071] External terminal 222a and horizontal portion 222c are formed by bending flat N main terminal 222, and external terminal 222a and horizontal portion 222c are connected by a connecting portion extending vertically. Furthermore, connection terminals 222d1 and 222d2 are formed at the end of horizontal portion 222c, extending vertically across horizontal portion 221c toward the insulating circuit board.

[0072] Connection terminals 221d1 and 221d2 of P main terminal 221 and connection terminals 222d1 and 222d2 of N main terminal 222 are electrically and mechanically connected to the circuit patterns via solder, or are directly connected by, for example, laser welding or ultrasonic welding.

[0073] 10 is a diagram showing the configuration of a PN main terminal of the third reference example. PN main terminal 230 has a P main terminal 231 and an N main terminal 232. Note that a terminal holder for maintaining insulation between P main terminal 231 and N main terminal 232 is not shown. One end of the P main terminal 231 is exposed on the top surface of the case and forms external terminal 231a for connecting to an external device. External terminal 231a is divided into external terminals 231a1 and 231a2 in the horizontal direction (Y direction). P main terminal 231 also includes horizontal portions 231b and 231c, in this order, from external terminal 231a toward the other end. Horizontal portions 231b and 231c are horizontal with respect to the bottom surface of the device storage area, with horizontal portion 231b being lower than external terminal 231a, and horizontal portion 231c being lower than horizontal portion 231b. External terminal 231a and horizontal portions 231b and 231c are formed by bending the flat P main terminal 231, and external terminal 231a and horizontal portion 231b, and horizontal portion 231b and horizontal portion 231c are connected by connecting portions extending vertically. Furthermore, connection terminals 231d1 and 231d2 extending vertically toward the insulating circuit board are formed at the end of the horizontal portion 231c.

[0074] The N main terminal 232 is located above the P main terminal 231, and one end of the N main terminal 232 is exposed on the top surface of the case and forms an external terminal 232a for connecting to an external device. The external terminal 232a is divided into external terminals 232a1 and 232a2 in the horizontal direction. The N main terminal 232 includes a horizontal portion 232c extending from the external terminal 232a to the other end. The horizontal portion 232c is horizontal with respect to the bottom surface of the device storage area, and is lower than the external terminal 232a and higher than the horizontal portion 231c of the P main terminal 231. The horizontal portion 232c is formed shorter in the -Y direction than the horizontal portion 231c of the P main terminal 231, and is positioned with a laminated portion that overlaps the horizontal portion 231c at a predetermined distance.

[0075] The external terminal 232a and horizontal portion 232c are formed by bending the flat N main terminal 232, and are connected to each other by a connecting portion extending vertically. Furthermore, connection terminals 232d1 and 232d2 are formed at the end of the horizontal portion 232c, extending vertically across the horizontal portion 231c toward the insulating circuit board.

[0076] Connection terminals 231d1 and 231d2 of P main terminal 231 and connection terminals 232d1 and 232d2 of N main terminal 232 are electrically and mechanically connected to the circuit patterns via solder, or are directly connected by, for example, laser welding or ultrasonic welding.

[0077] Here, parasitic inductance (L component) occurs in the conductor parts of the wiring pattern on the insulating circuit board of a semiconductor device. Parasitic inductance reduces the switching speed of the switching elements included in the semiconductor chip, increasing switching loss, and causes voltage fluctuations between the power supply and ground, so there is a demand for reducing parasitic inductance.

[0078] To reduce this parasitic inductance, PN main terminal 210 of the first reference example shown in Fig. 8 has eight connection terminals for PN main terminal 210 connected to the insulating circuit board. However, increasing the number of connection terminals between PN main terminal 210 and the insulating circuit board to reduce parasitic inductance results in an insufficient mounting area for the semiconductor chip, and also makes it difficult to increase the current rating of the semiconductor device.

[0079] On the other hand, in the PN main terminal 220 of the second reference example shown in Fig. 9, the number of connection terminals of the PN main terminal 220 to the insulating circuit board is reduced to four (a 50% reduction in the number of connection terminals compared to Fig. 8), thereby increasing the mounting area of ​​the semiconductor chip. However, simply reducing the number of connection terminals increases the parasitic inductance due to changes in the shape of the connection terminals.

[0080] In addition, in the PN main terminal 230 of the third reference example shown in FIG. 10, as in FIG. 9, the number of connection terminals of the PN main terminal 230 to the insulating circuit board is reduced to four, thereby reducing the number of connection terminals between the PN main terminal 230 and the insulating circuit board. Furthermore, in the PN main terminal 230, the area of ​​the laminated portion between the horizontal portion 231c of the P main terminal 231 and the horizontal portion 232c of the N main terminal 232 is larger than the area of ​​the laminated portion between the horizontal portion 221c of the P main terminal 221 and the horizontal portion 222c of the N main terminal 222 in the PN main terminal 220 in Fig. 9. By increasing the area of ​​the laminated portion in this way, the PN main terminal 230 reduces an increase in parasitic inductance that occurs due to a change in the shape of the connection terminals resulting from a reduction in the number of connection terminals.

[0081] However, simply increasing the area of ​​the laminated portion would result in an insufficient inter-electrode insulation distance between the P main terminal 231 and the N main terminal 232 at different potentials. Furthermore, simply increasing the area of ​​the laminated portion could make bonding using an assembly tool difficult. For example, when ultrasonically bonding the PN main terminal 230 to the insulating circuit board, the ultrasonic bonding tool may hit the periphery of the laminated portion, making it difficult to ultrasonically bond the connection terminal to the specified location on the insulating circuit board, resulting in poor assembly performance during device assembly.

[0082] Figure 11 shows the evaluation of the PN main terminals of the first, second, and third reference examples. The evaluations of the PN main terminal 210 of the first reference example, the PN main terminal 220 of the second reference example, and the PN main terminal 230 of the third reference example are shown for parasitic inductance, insulation distance, ease of assembly, and current rating expansion. A circle in the figure indicates that the requirements for the evaluation item are met, and a cross indicates that the requirements are not met. Note that a parasitic inductance of 10 nH or less meets the requirements.

[0083] In the configuration of the PN main terminal 210 of the first reference example, the parasitic inductance is 9.9 nH, so the parasitic inductance requirement is met. The insulation distance between the P main terminal 211 and the N main terminal 213 and the insulation distance between the P main terminal 212 and the N main terminal 214 are secured, so the insulation distance requirement is met. There is no difficulty in assembly, so the assembly requirement is met. It is difficult to increase the current rating, so the requirement for increasing the current rating is not met.

[0084] In the configuration of the PN main terminal 220 of the second reference example, the parasitic inductance is 13 nH, so the parasitic inductance requirement is not met. The insulation distance between the P main terminal 221 and the N main terminal 222 is secured, so the insulation distance requirement is met. There is no difficulty in assembly, so the assembly requirement is met. The current rating can be increased, so the current rating increase requirement is met.

[0085] In the configuration of the PN main terminal 230 of the third reference example, the parasitic inductance is 9.2 nH, so the parasitic inductance requirement is met. It is difficult to ensure the insulation distance between the P main terminal 231 and the N main terminal 232, so the insulation distance requirement is not met. It is difficult to assemble, so the assembly requirement is not met. The current rating can be increased, so the current rating increase requirement is met. As described above, none of the PN main terminal 210 of the first reference example, the PN main terminal 220 of the second reference example, and the PN main terminal 230 of the third reference example meets all the requirements, making it difficult to meet the product specifications.

[0086] Next, main terminals 42 and 43, which are external connection main terminals 40 of this embodiment, will be described below. Note that, hereinafter, main terminal 42 (first main terminal) may be referred to as P main terminal 42, and main terminal 43 (second main terminal) may be referred to as N main terminal 43. Also, P main terminal 42 and N main terminal 43 may be collectively referred to as PN main terminals 40.

[0087] 12 is a diagram showing an example of the configuration of a PN main terminal according to this embodiment. PN main terminal 40 has a P main terminal 42 and an N main terminal 43. Note that the illustration does not include a terminal holder and an insulator for maintaining the insulation between P main terminal 42 and N main terminal 43. One end of the P main terminal 42 is exposed on the top surface of the case and forms an external terminal 42a (positive external terminal) that connects to an external device (external power supply). The external terminal 42a is divided into external terminals 42a1 and 42a2 in the horizontal direction (Y direction). The P main terminal 42 also includes, from the external terminal 42a to the other end, a horizontal portion 42b and a horizontal portion 42c (first lead frame portion), in that order. The horizontal portions 42b and 42c, which are bus bars, are horizontal with respect to the bottom surface of the device storage area, with the height of the horizontal portion 42b being lower than that of the external terminal 42a, and the height of the horizontal portion 42c being lower than that of the horizontal portion 42b.

[0088] The external terminal 42a and horizontal portions 42b and 42c are formed by bending a flat P main terminal 42, and the external terminal 42a and horizontal portion 42b, and the horizontal portion 42b and horizontal portion 42c are connected by connecting portions extending vertically. A first board connection portion 42d is formed at the end of the horizontal portion 42c and extends obliquely toward the insulating circuit board. The first board connection portion 42d includes a connection terminal 42d1 (first connection terminal) and a connection terminal 42d2 (second connection terminal).

[0089] The N main terminal 43 is located above the P main terminal 42, and one end of the N main terminal 43 is exposed on the top surface of the case and forms an external terminal 43a (negative external terminal) for connection to an external device. The external terminal 43a is divided horizontally into external terminals 43a1 and 43a2. The N main terminal 43 includes a horizontal portion 43c (second lead frame portion) from the external terminal 43a to the other end. The horizontal portion 43c, which is a bus bar, is horizontal to the bottom surface of the device storage area, and is lower than the external terminal 43a and higher than the horizontal portion 42c of the P main terminal 42. The horizontal portion 43c is located with a laminate portion that overlaps the horizontal portion 42c of the P main terminal 42 at a predetermined distance.

[0090] The external terminal 43a and horizontal portion 43c are formed by bending the flat N main terminal 43, and the external terminal 43a and horizontal portion 43c are connected by a connecting portion extending vertically. A second substrate connection portion 43d is formed at an end of the horizontal portion 43c, extending vertically across the horizontal portion 42c toward the insulating circuit board. The second substrate connection portion 43d includes a connection terminal 43d1 (third connection terminal) and a connection terminal 43d2 (fourth connection terminal).

[0091] Connection terminals 42d1 and 42d2 of P main terminal 42 and connection terminals 43d1 and 43d2 of N main terminal 43 are electrically and mechanically connected to the circuit patterns via solder, or are directly connected by, for example, laser welding or ultrasonic welding. The connection terminals 42d1 and 42d2 of the P main terminal 42 extend diagonally or vertically toward the insulating circuit board, and the connection terminals 43d1 and 43d2 of the N main terminal 43 extend diagonally or vertically from the horizontal portion 43c across the horizontal portion 42c toward the insulating circuit board.

[0092] In the example of Figure 12, the connection terminals 42d1 and 42d2 are shown extending diagonally and the connection terminals 43d1 and 43d2 are shown extending vertically, but it is sufficient if at least one of the connection terminals 42d1 and 42d2 and the connection terminals 43d1 and 43d2 extends diagonally toward the insulating circuit board. Therefore, the connection terminals 43d1 and 43d2 may extend in an oblique direction and the connection terminals 42d1 and 42d2 may extend in a vertical direction, or the connection terminals 42d1 and 42d2 and the connection terminals 43d1 and 43d2 may all extend in an oblique direction.

[0093] 13 is a diagram showing an example of a first extension direction of the connection terminal of the PN main terminal. (a) shows the extension direction of the connection terminal of the P main terminal, and (b) shows the extension direction of the connection terminal of the N main terminal. The horizontal portion 42c of the P main terminal 42 has a first trapezoidal shape including a first long-side bottom 42c1 connected to the external terminal 42a and a first short-side bottom 42c2 that narrows from the first long-side bottom 42c1 toward the connection terminals 42d1 and 42d2. In addition, the horizontal portion 43c of the N main terminal 43 has a second trapezoidal shape including a second long side bottom 43c1 connected to the external terminal 43a and a second short side bottom 43c2 whose width narrows as it approaches the connection terminals 43d1 and 43d2 from the second long side bottom 43c1.

[0094] Here, connection terminal 42d1 of P main terminal 42 extends from horizontal portion 42c in the +Y direction and is connected to a predetermined insulating circuit board, and connection terminal 42d2 of P main terminal 42 extends from horizontal portion 42c in the +Y direction and is connected to a predetermined insulating circuit board. Furthermore, connection terminal 43d1 of N main terminal 43 extends from horizontal portion 43c in the -X direction and is connected to a predetermined insulating circuit board, and connection terminal 43d2 of N main terminal 43 extends from horizontal portion 43c in the +X direction and is connected to a predetermined insulating circuit board.

[0095] 14 is a diagram showing an example of a second extension direction of the connection terminals of the PN main terminals. (a) shows the extension direction of the connection terminals of the P main terminals, and (b) shows the extension direction of the connection terminals of the N main terminals. Connection terminal 42d1 of P main terminal 42 extends in the −X direction from horizontal portion 42c and is connected to a predetermined insulating circuit board, and connection terminal 42d2 of P main terminal 42 extends in the +X direction from horizontal portion 42c and is connected to a predetermined insulating circuit board. Connection terminal 43d1 of N main terminal 43 extends in the +Y direction from horizontal portion 43c and is connected to a predetermined insulating circuit board, and connection terminal 43d2 of N main terminal 43 extends in the +Y direction from horizontal portion 43c and is connected to a predetermined insulating circuit board. In this way, it is also possible to form the connection terminals in an extension direction opposite to that shown in FIG. 13.

[0096] 15 is a diagram illustrating the inclination angle and connection location of the connection terminal formed on the P main terminal. When connection terminal 42d1 of P main terminal 42 extends obliquely relative to insulating circuit board 31 (first insulating circuit board), if the angle between connection terminal 42d1 and the horizontal plane of horizontal portion 42c is θ1, the range of angle θ1 is 30°≦θ≦80°. Therefore, connection terminal 42d1 is joined to circuit pattern 31a (first circuit pattern) on insulating circuit board 31 at angle θ1.

[0097] Furthermore, when connection terminal 42d2 of P main terminal 42 extends obliquely relative to insulating circuit board 32 (second insulating circuit board), if the angle between connection terminal 42d2 and the horizontal plane of horizontal portion 42c is θ2, the range of angle θ2 is 30°≦θ≦80°. Therefore, connection terminal 42d2 is joined to circuit pattern 32a (second circuit pattern) on insulating circuit board 32 at angle θ2. It is preferable that the angles θ1 and θ2 are each between 45° and 60°. Furthermore, the angles θ1 and θ2 may be the same angle or different angles as long as they are within the above angle range.

[0098] 16 is a diagram illustrating the inclination angle and connection location of the connection terminal formed on the N main terminal. When connection terminal 43d1 of N main terminal 43 extends obliquely relative to insulating circuit board 33 (third insulating circuit board), if the angle between connection terminal 43d1 and the horizontal plane of horizontal portion 43c is θ3, the range of angle θ3 is 30°≦θ≦80°. Therefore, connection terminal 43d1 is joined to circuit pattern 33b (third circuit pattern) on insulating circuit board 33 at angle θ3.

[0099] Furthermore, when connection terminal 43d2 of N main terminal 43 extends obliquely relative to insulating circuit board 34 (fourth insulating circuit board), if the angle between connection terminal 43d2 and the horizontal plane of horizontal portion 43c is θ4, the range of angle θ4 is 30°≦θ≦80°. Therefore, connection terminal 43d2 is joined to circuit pattern 34b (fourth circuit pattern) on insulating circuit board 34 at angle θ4. It is preferable that the angles θ3 and θ4 are each between 45° and 60°. Furthermore, the angles θ3 and θ4 may be the same angle or different angles as long as they are within the above angle range.

[0100] Fig. 17 is a diagram showing an example of the configuration of a PN main terminal according to this embodiment. This diagram shows a configuration in which a terminal holder 44 and an insulator 45 for maintaining insulation between a P main terminal 42 and an N main terminal 43 are included in the PN main terminal 40 shown in Fig. 12. The terminal holder 44 has been described above with reference to Fig. 3, so a description thereof will be omitted. Insulator 45 molds the periphery of horizontal portion 42c of P main terminal 42 and horizontal portion 43c of N main terminal 43, and the space in the laminated portion of the overlapping region where the first trapezoidal shape of horizontal portion 42c overlaps the second trapezoidal shape of horizontal portion 43c. Molding with insulator 45 maintains the insulation of the laminated portions of horizontal portion 42c of P main terminal 42 and horizontal portion 43c of N main terminal 43.

[0101] Furthermore, the insulator 45 has a protrusion 45d1 sandwiched between the connection terminal 42d1 of the P main terminal 42 and the connection terminal 43d1 of the N main terminal 43, and has a protrusion 45d2 sandwiched between the connection terminal 42d2 of the P main terminal 42 and the connection terminal 43d2 of the N main terminal 43.

[0102] The insulator 45 may be made of the same material as the terminal holder 44 and the case 22. That is, the insulator 45 is a thermoplastic resin, and examples of such resins include polyphenylene sulfide resin, polybutylene terephthalate resin, polybutylene succinate resin, polyamide resin, and acrylonitrile butadiene styrene resin.

[0103] 18 is a diagram illustrating the protrusion of the insulator. Protrusion 45d1 is formed on insulator 45 so as to be sandwiched between connection terminal 42d1 of P main terminal 42 connected to insulating circuit board 31 and connection terminal 43d1 of N main terminal 43 connected to insulating circuit board 33. Furthermore, sealing member 24 is filled above lower end Le of protrusion 45d1. In other words, lower end Le of protrusion 45d1 is located lower than upper surface 24a of sealing member 24.

[0104] 19 is a diagram showing an example of a connection area of ​​a PN main terminal. Semiconductor device 10 has a rectangular device shape, and includes short sides L1a (first short side) and L1b (second short side) on the short side, and long sides L2a (first long side) and L2b (second long side) on the long side. Furthermore, insulating circuit board 33 is arranged in a first direction (-Y direction) from short side L1a to short side L1b relative to insulating circuit board 31, and insulating circuit board 32 is arranged in a second direction (+X direction) from long side L2a to long side L2b relative to insulating circuit board 31. Furthermore, insulating circuit board 34 is arranged in the first direction (-Y direction) relative to insulating circuit board 32 and in the second direction (+X direction) relative to insulating circuit board 33.

[0105] Meanwhile, bottom 42c2 on the first short side of horizontal portion 42c and bottom 43c2 on the second short side of horizontal portion 43c are located in connection area A1, which corresponds to the center of the long sides of semiconductor device 10 and includes the areas where insulating circuit boards 31 and 33 face each other and the areas where insulating circuit boards 32 and 34 face each other. Bottom 42c1 on the first long side of horizontal portion 42c and bottom 43c1 on the second long side of horizontal portion 43c are located near the short sides of the device. Furthermore, line segment m1 (first line segment) connecting connection terminals 42d1 and 42d2 and line segment m2 (second line segment) connecting connection terminals 43d1 and 43d2 are parallel to each other.

[0106] In the configuration of PN main terminal 40 of the present embodiment described above, PN main terminal 40 has a structure in which horizontal portion 42c of P main terminal 42 and horizontal portion 43c of N main terminal 43 are both trapezoidal in shape. This causes the laminated portion of adjacently arranged horizontal portions 42c and 43c to have a trapezoidal shape, increasing the area, thereby reducing parasitic inductance and enabling a reduction in switching loss of the switching element included in the semiconductor chip.

[0107] Furthermore, at least one of connection terminals 42d1 and 42d2 formed on horizontal portion 42c and connection terminals 43d1 and 43d2 formed on horizontal portion 43c is inclined at an angle for connection to the insulating circuit board, thereby shortening the length of the non-laminated portion of P main terminal 42 and the length of the non-laminated portion of N main terminal 43, thereby further reducing parasitic inductance.

[0108] Furthermore, horizontal portions 42c and 43c are molded with insulator 45, and insulator 45 has protrusion 45d1 between connection terminal 42d1 of P main terminal 42 and connection terminal 43d1 of N main terminal 43, and protrusion 45d1 between connection terminal 42d2 of P main terminal 42 and connection terminal 43d2 of N main terminal 43. This ensures insulation between the different electrodes of P main terminal 42 and N main terminal 43. Furthermore, because sealing member 24 is filled above the lower end Le of the protrusion of insulator 45, insulation between the different electrodes of P main terminal 42 and N main terminal 43 can be further improved.

[0109] Furthermore, trapezoidal horizontal portion 42c is configured so that its width narrows toward connection terminals 42d1 and 42d2 connected to the insulating circuit board, and trapezoidal horizontal portion 43c is configured so that its width narrows toward connection terminals 43d1 and 43d2 connected to the insulating circuit board, thereby increasing the area of ​​the laminated portion, reducing parasitic inductance, and improving ease of assembly (clearance) during device assembly. Regarding assembly, for example, when ultrasonically bonding the PN main terminal 40 to the insulating circuit board, the ultrasonic bonding tool does not come into contact with the periphery of the laminated portion, so the connection terminal can be ultrasonically bonded to a predetermined location on the insulating circuit board, making it easy to perform bonding using an assembly tool.

[0110] Furthermore, PN main terminal 40 is connected to the insulating circuit board via connection terminals 42d1 and 42d2 and connection terminals 43d1 and 43d2, without increasing the number of connections to the insulating circuit board. This reduces the area for terminal connections and improves the efficiency of the internal layout, making it possible to increase the current rating.

[0111] 20 is a diagram showing the evaluation of the PN main terminal of this embodiment, showing the evaluation of PN main terminal 40 in terms of parasitic inductance, insulation distance, ease of assembly, and current rating expansion. The parasitic inductance is 9.8 nH, which is less than 10 nH, so the parasitic inductance requirement is met. The insulation distance between P main terminal 42 and N main terminal 43 is ensured, so the insulation distance requirement is met (the PN main terminal's different potential insulation distance can handle voltages up to 3.3 kV). There is no difficulty in assembly, so the assembly requirement is met. The current rating can be increased, so the requirement for increased current rating is met. In this way, PN main terminal 40 meets the requirements for all items, making it possible to meet product specifications. [Explanation of symbols]

[0112] 10 Semiconductor device 21 Heat sink 22 cases 22a Storage area 23 Side wall 23a~23d 1st~4th inner wall surface 24 Sealing member 24a Top side 25 Lid 31~34 Insulated circuit board 31a to 31c, 32a to 32c, 33a, 33b, 34a, 34b Circuit patterns 31a1~31c1, 32a1~32c1, 33b1, 34b1 area 31d, 32d, 33d, 34d Insulating board 40 External connection main terminal 41 External connection output terminal 42 Main terminal (P main terminal) 43 Main terminal (N main terminal) 41a, 41a1 to 41a3 External output terminals 42a, 42a1, 42a2, 43a, 43a1, 43a2 External terminal 41b, 41c, 41c1, 41c2 Horizontal part of external connection output terminal 42b, 42c, 43c Horizontal part of external connection main terminal 41c3 slit 41d1~41d4 External connection output terminal connection terminal 42c1 Bottom of the first long side 42c2 Bottom of the first short side 43c1 Bottom of the second long side 43c2 Bottom of the second short side 42d First board connection part 43d Second board connection 42d1, 42d2, 43d1, 43d2 Connection terminals for external main terminals 44 Terminal holding part 45 Insulators 45d1, 45d2 Protrusion Le lower end 51a to 51c, 52a to 52c, 53a to 53c, 54a to 54c Semiconductor chips 55a~55e wiring 111~113, 121~123, 131~133, 141~143, 151~154 Wires 61, 62 Auxiliary board L1a First short side L1b Second short side L2a First long side L2b Second long side A1 Connection Area m1 First line segment m2 Second line segment 210 PN main terminal 211, 212 P main terminal 211a, 212a external terminal 211b, 211c, 212b, 212c horizontal section 211d1, 211d2, 212d1, 212d2 connection terminals 213, 214 N main terminal 213a, 214a external terminal 213c, 214c horizontal part 213d1, 213d2, 214d1, 214d2 connection terminals 220 PN main terminal 221 P main terminal 221a, 221a1, 221a2 external terminal 221b, 221c horizontal part 221d1, 221d2 connection terminals 222 N main terminal 222a, 222a1, 222a2 external terminal 222c horizontal section 221d1, 222d2 connection terminals 230 PN main terminal 231 P main terminal 231a, 231a1, 231a2 external terminal 231b, 231c horizontal part 231d1, 231d2 connection terminals 232 N main terminal 232a, 232a1, 232a2 external terminal 232c horizontal section 232d1, 232d2 connection terminals

Claims

1. an insulating circuit board group including a plurality of insulating circuit boards; a first main terminal including: a positive external terminal connected to a positive electrode of an external power supply; a first lead frame portion formed and connected to the positive external terminal, the first lead frame portion being horizontal to the insulating circuit board group and having a first trapezoidal shape; and a first substrate connection portion formed by extending from an end of the first lead frame portion in an oblique direction or a vertical direction toward the insulating circuit board group; an external connection main terminal comprising: a negative external terminal connected to a negative electrode of the external power supply; a second main terminal located above the first main terminal, the second main terminal including: a second lead frame portion formed to be connected to the negative external terminal and having a second trapezoidal shape that is horizontal to the group of insulated circuit boards, the second trapezoidal shape being spaced a predetermined distance above the first lead frame portion so that the second trapezoidal shape overlaps the first trapezoidal shape; and a second board connection portion formed to extend from an end of the second lead frame portion in an oblique direction or a vertical direction toward the group of insulated circuit boards; and A semiconductor device having:

2. 2. The semiconductor device according to claim 1, wherein at least one of said first substrate connecting portion and said second substrate connecting portion extends obliquely toward said group of insulating circuit boards.

3. 3. The semiconductor device of claim 2, wherein the first substrate connection portion extends obliquely at an angle in the range of 30° to 80° relative to the horizontal plane of the first lead frame portion, and the second substrate connection portion extends obliquely at an angle in the range of 30° to 80° relative to the horizontal plane of the second lead frame portion.

4. 2. The semiconductor device according to claim 1, wherein the peripheries of the first lead frame portion and the second lead frame portion and the space in the overlapping region where the first trapezoidal shape overlaps the second trapezoidal shape are molded with an insulating material.

5. 5. The semiconductor device according to claim 4, wherein said insulator has a protrusion sandwiched between said first substrate connecting portion and said second substrate connecting portion.

6. 6. The semiconductor device according to claim 5, wherein the sealing material is filled up to above the lower end of the protrusion.

7. the first lead frame portion has the first trapezoidal shape including a bottom of a first long side connected to the positive external terminal and a bottom of a first short side that narrows in width from the bottom of the first long side toward the first substrate connection portion, 2. The semiconductor device according to claim 1, wherein the second lead frame portion has the second trapezoidal shape including a bottom of a second long side connected to the negative external terminal and a bottom of a second short side whose width narrows as it approaches the second substrate connection portion from the bottom of the second long side.

8. The device has a rectangular shape, with a short side including a first short side and a second short side, and a long side including a first long side and a second long side; the insulating circuit board group includes a first insulating circuit board, a second insulating circuit board, a third insulating circuit board, and a fourth insulating circuit board; When the third insulating circuit board is disposed in a first direction from the first short side toward the second short side with respect to the first insulating circuit board, the second insulating circuit board is disposed in a second direction from the first long side toward the second long side with respect to the first insulating circuit board, and the fourth insulating circuit board is disposed in the first direction with respect to the second insulating circuit board and in the second direction with respect to the third insulating circuit board, a bottom of the first short side of the first lead frame portion and a bottom of the second short side of the second lead frame portion are located in a connection area that is in the center of the long side of the device shape and that includes a location where the first insulating circuit board and the third insulating circuit board face each other and a location where the second insulating circuit board and the fourth insulating circuit board face each other; a bottom of the first long side of the first lead frame portion and a bottom of the second long side of the second lead frame portion are located near the short side of the device shape; 8. The semiconductor device according to claim 7.

9. the first substrate connection portion includes a first connection terminal and a second connection terminal, and the second substrate connection portion includes a third connection terminal and a fourth connection terminal; the first connection terminal is connected to a first circuit pattern provided on the first insulating circuit board in the connection area, and the second connection terminal is connected to a second circuit pattern provided on the second insulating circuit board in the connection area; 9. The semiconductor device according to claim 8, wherein the third connection terminal is connected to a third circuit pattern laid on the third insulating circuit board in the connection area, and the fourth connection terminal is connected to a fourth circuit pattern laid on the fourth insulating circuit board in the connection area.

10. 10. The semiconductor device of claim 9, wherein a first line segment connecting a connection point of the first connection terminal to the first circuit pattern and a connection point of the second connection terminal to the second circuit pattern is parallel to a second line segment connecting a connection point of the third connection terminal to the third circuit pattern and a connection point of the fourth connection terminal to the fourth circuit pattern.

11. a first main terminal including: a positive external terminal connected to a positive electrode of an external power supply; a first lead frame portion formed to be connected to the positive external terminal and having a first trapezoidal shape that is horizontal with respect to an insulating circuit board group including a plurality of insulating circuit boards; and a first substrate connection portion formed to extend from an end of the first lead frame portion in a diagonal direction or a vertical direction toward the insulating circuit board group; a second main terminal located above the first main terminal, the second main terminal including: a negative external terminal connected to a negative electrode of the external power supply; a second lead frame portion formed and connected to the negative external terminal, having a second trapezoidal shape that is horizontal to the group of insulating circuit boards, the second trapezoidal shape overlapping the first trapezoidal shape at a predetermined distance above the first lead frame portion; and a second substrate connection portion formed by extending from an end of the second lead frame portion in an oblique direction or a vertical direction toward the group of insulating circuit boards; External connection main terminals having.

12. The external connection main terminal according to claim 11 , wherein at least one of the first board connection portion and the second board connection portion extends obliquely toward the group of insulating circuit boards.

13. 13. The external connection main terminal according to claim 12, wherein the first substrate connection portion extends obliquely at an angle within a range of 30° to 80° with respect to the horizontal plane of the first lead frame portion, and the second substrate connection portion extends obliquely at an angle within a range of 30° to 80° with respect to the horizontal plane of the second lead frame portion.

14. The external connection main terminal according to claim 11, wherein the peripheries of the first lead frame portion and the second lead frame portion and the space of the overlapping region where the first trapezoidal shape overlaps the second trapezoidal shape are molded with an insulator.

15. The external connection main terminal according to claim 14 , wherein the insulator has a protrusion sandwiched between the first board connection portion and the second board connection portion.

16. The external connection main terminal according to claim 15 , wherein the sealing member is filled up to above the lower end of the protrusion.

17. the first lead frame portion has the first trapezoidal shape including a bottom of a first long side connected to the positive external terminal and a bottom of a first short side that narrows in width from the bottom of the first long side toward the first substrate connection portion, 12. The external connection main terminal according to claim 11, wherein the second lead frame portion has the second trapezoidal shape including a bottom of a second long side connected to the negative external terminal and a bottom of a second short side whose width narrows as it approaches the second substrate connection portion from the bottom of the second long side.

18. the device including the insulating circuit board group has a rectangular device shape, with a first short side and a second short side on the short side and a first long side and a second long side on the long side; the insulating circuit board group includes a first insulating circuit board, a second insulating circuit board, a third insulating circuit board, and a fourth insulating circuit board; When the third insulating circuit board is disposed in a first direction from the first short side toward the second short side with respect to the first insulating circuit board, the second insulating circuit board is disposed in a second direction from the first long side toward the second long side with respect to the first insulating circuit board, and the fourth insulating circuit board is disposed in the first direction with respect to the second insulating circuit board and in the second direction with respect to the third insulating circuit board, a bottom of the first short side of the first lead frame portion and a bottom of the second short side of the second lead frame portion are located in a connection area that is in the center of the long side of the device shape and that includes a location where the first insulating circuit board and the third insulating circuit board face each other and a location where the second insulating circuit board and the fourth insulating circuit board face each other; a bottom of the first long side of the first lead frame portion and a bottom of the second long side of the second lead frame portion are located near the short side of the device shape; 18. The external connection main terminal according to claim 17.

19. the first substrate connection portion includes a first connection terminal and a second connection terminal, and the second substrate connection portion includes a third connection terminal and a fourth connection terminal; the first connection terminal is connected to a first circuit pattern provided on the first insulating circuit board in the connection area, and the second connection terminal is connected to a second circuit pattern provided on the second insulating circuit board in the connection area; 19. The external connection main terminal according to claim 18, wherein the third connection terminal is connected to a third circuit pattern laid on the third insulating circuit board in the connection area, and the fourth connection terminal is connected to a fourth circuit pattern laid on the fourth insulating circuit board in the connection area.

20. 20. The external connection main terminal according to claim 19, wherein a first line segment connecting a connection point of the first connection terminal to the first circuit pattern and a connection point of the second connection terminal to the second circuit pattern is parallel to a second line segment connecting a connection point of the third connection terminal to the third circuit pattern and a connection point of the fourth connection terminal to the fourth circuit pattern.

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