Semiconductor device and vehicle

Abstract

To provide a semiconductor device in which a buffer layer can more reliably cover a desired portion of a semiconductor element.SOLUTION: A semiconductor device A10 includes a first semiconductor element 21A having a first electrode 211, a first conductive member 30 conductively bonded to the first electrode 211, a first buffer layer covering at least a portion of the first semiconductor element 21A, and a sealing resin covering the first buffer layer. The Young's modulus of the first buffer layer is lower than the Young's modulus of the sealing resin. The first conductive member 30 includes a first main portion 31, a first connecting portion 32, and a first linking portion 33. The first linking portion 32 faces the side opposite to the side facing the first electrode 211 in the first direction z and has a base surface 321 connected to the first linking portion 33. The minimum dimension d of the first linking portion 33 in the second direction x is smaller than the dimension B of the base surface 321 in the second direction x.SELECTED DRAWING: Figure 13

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a vehicle equipped with the semiconductor device. [Background technology]

[0002] Patent Document 1 discloses a semiconductor device including a substrate, a semiconductor element mounted on the substrate, solder joining the substrate and the semiconductor element, and a buffer layer (polyimide coating) covering a portion of the solder and the semiconductor element. This configuration reduces thermal stress acting on the solder, thereby improving the reliability of the semiconductor device against temperature cycles (thermal cycles).

[0003] In the manufacturing of the semiconductor device disclosed in Patent Document 1, a buffer layer is generally applied using a dispenser. In this case, if a conductive member such as a metal clip is conductively connected to the electrode of the semiconductor element, the flow of the buffer layer is interfered with by the conductive member. This may prevent the buffer layer from reaching the desired portion of the semiconductor element. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-183038

[0005] [overview] In view of the above circumstances, an object of the present disclosure is to provide a semiconductor device in which a buffer layer can more reliably cover a desired portion of a semiconductor element.

[0006] A first aspect of the present disclosure provides a semiconductor device comprising: a first semiconductor element having a first electrode located on one side in a first direction; a first conductive member conductively bonded to the first electrode; a first buffer layer covering at least a portion of the first semiconductor element; and a sealing resin covering the first buffer layer. The Young's modulus of the first buffer layer is lower than that of the sealing resin. The first conductive member has a first connection portion conductively bonded to the first electrode; a first main portion located on the opposite side of the first semiconductor element from the first connection portion; and a first coupling portion connecting the first connection portion to the first main portion. The first coupling portion faces the side opposite to the side facing the first electrode in the first direction and includes a base surface connected to the first coupling portion. In a second direction perpendicular to the first direction, the minimum dimension of the first coupling portion in the second direction is smaller than the dimension of the base surface in the second direction.

[0007] A vehicle provided by a second aspect of the present disclosure includes a drive system, a storage battery that supplies power to the drive system, an on-board charger that supplies power to the storage battery, and a semiconductor device. The semiconductor device is included in a circuit that constitutes the on-board charger. Compared to the semiconductor device provided by the first aspect of the present disclosure, the semiconductor device further includes a first die pad having a first mounting surface, a first power terminal, and a first gate terminal. A first semiconductor element included in the semiconductor device provided by the first aspect of the present disclosure is conductively bonded to the first mounting surface. The first power terminal is connected to the first die pad. The first gate terminal is electrically connected to the first semiconductor element.

[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a plan view of the semiconductor device shown in FIG. [Figure 3]FIG. 3 is a plan view corresponding to FIG. 2, showing the sealing resin and the buffer layer. [Figure 4] FIG. 4 is a bottom view of the semiconductor device shown in FIG. [Figure 5] FIG. 5 is a front view of the semiconductor device shown in FIG. [Figure 6] FIG. 6 is a right side view of the semiconductor device shown in FIG. [Figure 7] FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. [Figure 8] FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. [Figure 9] FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. [Figure 10] FIG. 10 is a partially enlarged view of FIG. 7, showing the first semiconductor element and its vicinity. [Figure 11] FIG. 11 is a partially enlarged view of FIG. 7, showing the second semiconductor element and its vicinity. [Figure 12] FIG. 12 is a partially enlarged perspective view of the semiconductor device shown in FIG. 1, showing only the first die pad, the first semiconductor element, the bonding layer, and the first conductive member. [Figure 13] FIG. 13 is a plan view corresponding to FIG. [Figure 14] FIG. 14 is a right side view corresponding to FIG. [Figure 15] FIG. 15 is a front view corresponding to FIG. [Figure 16] FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. [Figure 17] FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. [Figure 18] FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. [Figure 19] FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. [Figure 20] FIG. 20 is a schematic diagram of a vehicle equipped with the semiconductor device shown in FIG. [Figure 21]FIG. 21 is a partially enlarged plan view of the semiconductor device according to the second embodiment of the present disclosure, and corresponds to FIG. [Figure 22] FIG. 22 is a right side view corresponding to FIG. [Figure 23] FIG. 23 is a partially enlarged plan view of the semiconductor device according to the third embodiment of the present disclosure, and corresponds to FIG. [Figure 24] FIG. 24 is a cross-sectional view taken along line XXIV-XXIV in FIG. [Figure 25] FIG. 25 is a partially enlarged plan view of the semiconductor device according to the fourth embodiment of the present disclosure, and corresponds to FIG. [Figure 26] FIG. 26 is a right side view corresponding to FIG. [Figure 27] FIG. 27 is a front view corresponding to FIG.

[0010] [Detailed explanation] The details of the present disclosure will be described with reference to the accompanying drawings.

[0011] [First embodiment] 1 to 19, a semiconductor device A10 according to a first embodiment of the present disclosure will be described. The semiconductor device A10 includes a first die pad 11, a second die pad 12, a first power terminal 13, a second power terminal 14, a third power terminal 15, two first signal terminals 16, two semiconductor elements 21, a first conductive member 30, a second conductive member 40, a sealing resin 50, and a buffer layer 70. The semiconductor device A10 also includes two second signal terminals 17, two first wires 61, and two second wires 62. For ease of understanding, FIG. 3 shows the sealing resin 50 and the buffer layer 70 in a perspective view. In FIG. 3, the sealing resin 50 and the buffer layer 70 are each indicated by imaginary lines (double-dashed lines). 12 shows only the first die pad 11, the first semiconductor element 21A (described in detail later), the bonding layer 29 (described in detail later), and the first conductive member 30 among the elements of the semiconductor device A10. For ease of understanding, FIG. 19 shows a portion of the first buffer layer 70A housed in the recess 335 (described in detail later) of the first conductive member 30.

[0012] In describing the semiconductor device A10, for convenience, the normal direction to the first mounting surface 111 (details will be described later) of the first die pad 11 will be referred to as the "first direction z." The direction perpendicular to the first direction z will be referred to as the "second direction x." The direction perpendicular to each of the first direction z and the second direction x will be referred to as the "third direction y."

[0013] The semiconductor device A10 converts a DC power supply voltage applied to the first power terminal 13 and the third power terminal 15 into AC power using two semiconductor elements 21. The converted AC power is output from the second power terminal 14. The semiconductor device A10 is used in a power conversion circuit such as a converter.

[0014] The first die pad 11 and the second die pad 12 are spaced apart from each other in the third direction y, as shown in FIGS. 3 and 7 . The first die pad 11 and the second die pad 12, along with the first power terminal 13, the second power terminal 14, the third power terminal 15, the two first signal terminals 16, and the two second signal terminals 17, are obtained from the same lead frame. The lead frame contains copper (Cu) or a copper alloy. Therefore, each of the first die pad 11, the second die pad 12, the first power terminal 13, the second power terminal 14, the third power terminal 15, the two first signal terminals 16, and the two second signal terminals 17 contains copper.

[0015] 7 and 8, the first die pad 11 has a first mounting surface 111 and a first heat dissipation surface 112. The first mounting surface 111 and the first heat dissipation surface 112 face opposite each other in the first direction z. The first mounting surface 111 is covered with a sealing resin 50. The first heat dissipation surface 112 is exposed from the sealing resin 50.

[0016] As shown in FIG. 7, the second die pad 12 has a second mounting surface 121, a second heat dissipation surface 122, and a first seat portion 123. The second mounting surface 121 and the second heat dissipation surface 122 face opposite each other in the first direction z. The second mounting surface 121 is covered with a sealing resin 50. The second heat dissipation surface 122 is exposed from the sealing resin 50. The first seat portion 123 is recessed from the first mounting surface 111 of the second die pad 12. As a result, a step is formed between the first mounting surface 111 and the first seat portion 123 in the second die pad 12.

[0017] As shown in FIGS. 7 to 9, the sealing resin 50 covers the buffer layer 70. The sealing resin 50 also covers a portion of each of the first die pad 11, the second die pad 12, the first conductive member 30, and the second conductive member 40. The sealing resin 50 has electrical insulation properties. The sealing resin 50 is made of a material containing, for example, black epoxy resin. The sealing resin 50 has a top surface 51, a bottom surface 52, a first side surface 53, a second side surface 54, and a plurality of recesses 55.

[0018] 7 and 8, the top surface 51 faces the same side as the first mounting surface 111 of the first die pad 11 in the first direction z. As shown in FIGS. 7 to 9, the bottom surface 52 faces the opposite side to the top surface 51 in the first direction z. As shown in FIG. 4, the first heat dissipation surface 112 of the first die pad 11 and the second heat dissipation surface 122 of the second die pad 12 are exposed from the bottom surface 52.

[0019] 2, 4, and 6, the first side surface 53 and the second side surface 54 face opposite each other in the second direction x. Each of the first side surface 53 and the second side surface 54 is connected to the top surface 51 and the bottom surface 52. As shown in FIG. 5, each of the first power terminal 13, the second power terminal 14, the third power terminal 15, the two first signal terminals 16, and the two second signal terminals 17 protrudes from the first side surface 53.

[0020] 1, 2, and 4, the recesses 55 are recessed from the first side surface 53 in the second direction x and penetrate through in the first direction z. In the third direction y, the recesses 55 are individually provided between the first power terminal 13 and a first detection terminal 17A (described later), between the first power terminal 13 and a third power terminal 15, between the second power terminal 14 and the third power terminal 15, and between the second power terminal 14 and a second detection terminal 17B (described later).

[0021] As shown in FIG. 3 and FIGS. 7 to 9, the two semiconductor elements 21 are individually bonded to the first die pad 11 and the second die pad 12. In the semiconductor device A10, the two semiconductor elements 21 include a first semiconductor element 21A and a second semiconductor element 21B. The first semiconductor element 21A is bonded to the first mounting surface 111 of the first die pad 11. The second semiconductor element 21B is bonded to the second mounting surface 121 of the second die pad 12. The two semiconductor elements 21 are, for example, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). Alternatively, the two semiconductor elements 21 may be switching elements such as IGBTs (Insulated Gate Bipolar Transistors) or diodes. In the description of the semiconductor device A10, the two semiconductor elements 21 are n-channel MOSFETs with a vertical structure. The two semiconductor elements 21 include compound semiconductor substrates. The compound semiconductor substrate contains silicon carbide (SiC). Alternatively, the two semiconductor elements 21 may be formed from semiconductor substrates containing synthetic diamond. As shown in Figures 3, 10, and 11, the first semiconductor element 21A and the second semiconductor element 21B each have a first electrode 211, a second electrode 212, a third electrode 213, and two fourth electrodes 214.

[0022] 10 and 11 , the first electrode 211 is located on the side opposite to the side facing either the first mounting surface 111 of the first die pad 11 or the second mounting surface 121 of the second die pad 12 in the first direction z. A current corresponding to the power converted by the semiconductor element 21 flows through the first electrode 211. In other words, the first electrode 211 corresponds to the source of the semiconductor element 21.

[0023] 10 and 11 , the second electrode 212 faces either the first mounting surface 111 of the first die pad 11 or the second mounting surface 121 of the second die pad 12. A current corresponding to the power before being converted by the semiconductor element 21 flows through the second electrode 212. In other words, the second electrode 212 corresponds to the drain of the semiconductor element 21.

[0024] 10 and 11, the third electrode 213 is located on the same side as the first electrode 211 in the first direction z. A gate voltage for driving the semiconductor element 21 is applied to the third electrode 213. The area of ​​the third electrode 213 is smaller than the area of ​​the first electrode 211 when viewed in the first direction z.

[0025] 3, the two fourth electrodes 214 are located on the same side as the first electrode 211 in the first direction z. The two fourth electrodes 214 are located on opposite sides of the third electrode 213 in the second direction x. A voltage having the same potential as the voltage applied to the first electrode 211 is applied to each of the two fourth electrodes 214.

[0026] 7 and 12, each of the first semiconductor element 21A and the second semiconductor element 21B has an edge 215. When viewed in the first direction z, the edge 215 surrounds the first electrode 211, the third electrode 213, and the two fourth electrodes 214.

[0027] As shown in FIG. 10, the bonding layer 29 conductively bonds the first mounting surface 111 of the first die pad 11 and the second electrode 212 of the first semiconductor element 21A. As a result, the second electrode 212 of the first semiconductor element 21A is electrically connected to the first die pad 11. Furthermore, as shown in FIG. 11, the bonding layer 29 conductively bonds the second mounting surface 121 of the second die pad 12 and the second electrode 212 of the second semiconductor element 21B. As a result, the second electrode 212 of the second semiconductor element 21B is electrically connected to the second die pad 12. The bonding layer 29 is solder. Alternatively, the bonding layer 29 may be a sintered body of metal particles. The metal particles may contain, for example, silver (Ag).

[0028] As shown in FIG. 3 , the first power terminal 13 is connected to one side of the first die pad 11 in the second direction x. Therefore, the first power terminal 13 is electrically connected to the second electrode 212 of the first semiconductor element 21A via the first die pad 11. The first power terminal 13 is a P terminal (positive electrode) to which a DC power supply voltage to be converted into power is applied. The first power terminal 13 is located on the opposite side of the third power terminal 15 from the second power terminal 14 and adjacent to the third power terminal 15. The first power terminal 13 has a mounting portion 131 and a covering portion 132. The mounting portion 131 protrudes from the first side surface 53 of the sealing resin 50. The mounting portion 131 extends in the second direction x. The covering portion 132 connects the mounting portion 131 and the first die pad 11. The covering portion 132 is covered by the sealing resin 50. As shown in FIG. 8, the covering portion 132 is bent toward the side approaching the first mounting surface 111 of the first die pad 11 in the first direction z.

[0029] As shown in FIG. 3 , the second power terminal 14 is connected to one side of the second die pad 12 in the second direction x. Therefore, the second power terminal 14 is electrically connected to the second electrode 212 of the second semiconductor element 21B via the second die pad 12. AC power converted by the two semiconductor elements 21 is output from the second power terminal 14. The second power terminal 14 is located on the opposite side of the third power terminal 15 from the first power terminal 13 and adjacent to the third power terminal 15. The second power terminal 14 has a mounting portion 141 and a covering portion 142. The mounting portion 141 protrudes from the first side surface 53 of the sealing resin 50. The mounting portion 141 extends in the second direction x. The covering portion 142 connects the mounting portion 141 and the second die pad 12. The covering portion 142 is covered by the sealing resin 50. The covering portion 142 is bent toward the side approaching the second mounting surface 121 of the second die pad 12 in the first direction z.

[0030] 2 and 3, the third power terminal 15 is located on the opposite side of the second side surface 54 of the sealing resin 50 with respect to the first die pad 11 and the second die pad 12 in the second direction x. The third power terminal 15 is spaced apart from the first die pad 11 and the second die pad 12. The third power terminal 15 is electrically connected to the first electrode 211 of the second semiconductor element 21B. The third power terminal 15 is an N-terminal (negative electrode) to which a DC power supply voltage to be converted into power is applied.

[0031] As shown in Figures 3 and 9, the third power terminal 15 has a mounting portion 151, a covering portion 152, and a second seat portion 153. The mounting portion 151 protrudes from the first side surface 53 of the sealing resin 50. The mounting portion 151 extends in the second direction x. The covering portion 152 is connected to the mounting portion 151. The covering portion 152 is covered by the sealing resin 50. The second seat portion 153 is provided in the covering portion 152. The second seat portion 153 is recessed in the first direction z from the side where the second main portion 41 (described in detail later) of the second conductive member 40 is located in the first direction z.

[0032] 2 and 3, the two first signal terminals 16 are located on the opposite side of the sealing resin 50 from the second side surface 54 with respect to the first die pad 11 and the second die pad 12 in the second direction x. As shown in Fig. 3, the two first signal terminals 16 extend in the second direction x. The two first signal terminals 16 sandwich the first power terminal 13, the second power terminal 14, the third power terminal 15, and the two second signal terminals 17 between them in the third direction y. The two first signal terminals 16 include a first gate terminal 16A and a second gate terminal 16B.

[0033] 3, each of the two first signal terminals 16 has a mounting portion 161 and a covering portion 162. The mounting portion 161 protrudes from the first side surface 53 of the sealing resin 50. The mounting portion 161 extends in the second direction x. The covering portion 162 is connected to the mounting portion 161. The covering portion 162 is covered by the sealing resin 50.

[0034] 3, the first gate terminal 16A is located closer to the first die pad 11 than to the second die pad 12. The first gate terminal 16A is electrically connected to the third electrode 213 of the first semiconductor element 21A. A gate voltage for driving the first semiconductor element 21A is applied to the first gate terminal 16A.

[0035] 3, the second gate terminal 16B is located closer to the second die pad 12 than to the first die pad 11. The second gate terminal 16B is electrically connected to the third electrode 213 of the second semiconductor element 21B. A gate voltage for driving the second semiconductor element 21B is applied to the second gate terminal 16B.

[0036] 2 and 3, the two second signal terminals 17 are located on the opposite side of the sealing resin 50 from the second side surface 54 with respect to the first die pad 11 and the second die pad 12 in the second direction x. As shown in Fig. 3, the two second signal terminals 17 extend in the second direction x. The two second signal terminals 17 sandwich the first power terminal 13, the second power terminal 14, and the third power terminal 15 between them in the third direction y. The two second signal terminals 17 include a first detection terminal 17A and a second detection terminal 17B.

[0037] 3, each of the two second signal terminals 17 has a mounting portion 171 and a covering portion 172. The mounting portion 171 protrudes from the first side surface 53 of the sealing resin 50. The mounting portion 171 extends in the second direction x. The covering portion 172 is connected to the mounting portion 171. The covering portion 172 is covered by the sealing resin 50.

[0038] 2 and 3, the first detection terminal 17A is located between the first power terminal 13 and the first gate terminal 16A. The first detection terminal 17A is electrically connected to one of the two fourth electrodes 214 of the first semiconductor element 21A. A voltage having the same potential as the voltage applied to the first electrode 211 of the first semiconductor element 21A is applied to the first detection terminal 17A.

[0039] 2 and 3, the second detection terminal 17B is located between the second power terminal 14 and the second gate terminal 16B. The second detection terminal 17B is electrically connected to one of the two fourth electrodes 214 of the second semiconductor element 21B. A voltage having the same potential as the voltage applied to the first electrode 211 of the second semiconductor element 21B is applied to the second detection terminal 17B.

[0040] 5, the heights h of the mounting portion 131 of the first power terminal 13, the mounting portion 141 of the second power terminal 14, and the mounting portion 151 of the third power terminal 15 are all equal. As shown in Fig. 6, when viewed in the third direction y, the mounting portion 161 of one of the two first signal terminals 16 overlaps the mounting portion 131, the mounting portion 141, the mounting portion 151, and the mounting portion 171 of each of the two second signal terminals 17.

[0041] As shown in FIGS. 3, 7, and 8, the first conductive member 30 is conductively bonded to the first electrode 211 of the first semiconductor element 21A and the first seat portion 123 of the second die pad 12. This electrically connects the first electrode 211 of the first semiconductor element 21A to the second die pad 12 and the second electrode 212 of the second semiconductor element 21B. The first conductive member 30 contains copper or a copper alloy. The first conductive member 30 is a metal clip. The first conductive member 30 is integrally formed by bending or the like. The first conductive member 30 has a first main portion 31, two first connecting portions 32, two first connecting portions 33, a second connecting portion 34, and a second connecting portion 35.

[0042] 10 and 12, the two first connection portions 32 are conductively bonded to the first electrode 211 of the first semiconductor element 21A via the bonding layer 29. The two first connection portions 32 are spaced apart from each other in the second direction x. As shown in FIG. 10 and FIGS. 13 to 16, each of the two first connection portions 32 includes a base surface 321 and two side surfaces 322. The base surface 321 faces the side opposite to the side facing the first electrode 211 of the first semiconductor element 21A in the first direction z. The two side surfaces 322 are spaced apart from each other in the second direction x. The two side surfaces 322 are inclined with respect to the base surface 321 in directions approaching each other from the base surface 321 toward the first semiconductor element 21A in the first direction z.

[0043] 7 and 12, the first main portion 31 is located on the opposite side of the first semiconductor element 21A in the first direction z with the two first connection portions 32 as references. The first main portion 31 is covered with a sealing resin 50. When viewed in the first direction z, the first main portion 31 overlaps the gap between the first die pad 11 and the second die pad 12.

[0044] 7 and 12, each of the two first coupling portions 33 couples one of the two first connection portions 32 to the first main portion 31. The two first coupling portions 33 are individually connected to the two first connection portions 32. As shown in FIG. 13, when viewed in the first direction z, each of the two first coupling portions 33 overlaps the edge 215 of the first semiconductor element 21A. As shown in FIG. 15, each of the two first coupling portions 33 is inclined with respect to the base surface 321 of one of the two first connection portions 32.

[0045] As shown in FIGS. 13 to 15, each of the two first coupling portions 33 has a first portion 33A, a second portion 33B, and a third portion 33C. The first portion 33A is connected to the base surface 321 of one of the two first connection portions 32. The second portion 33B is connected to the first main portion 31. The third portion 33C is located between the first portion 33A and the second portion 33B in the first direction z. In addition, the third portion 33C is located between the first portion 33A and the second portion 33B in the third direction y. The third portion 33C is connected to the first portion 33A and the second portion 33B.

[0046] As shown in FIGS. 13 to 15, the first portion 33A includes a first surface 331 and two second surfaces 332. The first surface 331 is connected to the base surface 321 of one of the two first connection portions 32. The first surface 331 is inclined with respect to the base surface 321. The first surface 331 includes a connecting edge 331A. The connecting edge 331A forms a boundary with the base surface 321. The connecting edge 331A extends in the second direction x. Both ends of the connecting edge 331A in the second direction x reach the peripheral edge 321A of the base surface 321. The two second surfaces 332 are adjacent to each other in the second direction x. Each of the two second surfaces 332 is connected to the first surface 331 and the third portion 33C. As shown in FIGS. 16 and 17, the two second surfaces 332 are inclined relative to the base surface 321 in directions that move away from each other as they approach the first semiconductor element 21A in the first direction z.

[0047] As shown in FIGS. 13 to 15, the third portion 33C includes two third surfaces 333 and a ridge line 333A. The two third surfaces 333 are adjacent to each other in the second direction x. The two third surfaces 333 are individually connected to the two second surfaces 332 of the first portion 33A. The two third surfaces 333 are further connected to the second portion 33B. As shown in FIGS. 16 and 18, the two third surfaces 333 are inclined relative to the base surface 321 of one of the two first connection portions 32 in the first direction z in directions that move away from each other as they approach the first semiconductor element 21A. The area of ​​each of the two third surfaces 333 is greater than the area of ​​each of the two second surfaces 332. The ridge line 333A forms the boundary edge between the two third surfaces 333. As shown in FIG. 15, the inclination angle α2 of the ridge line 333A relative to the base surface 321 is smaller than the inclination angle α1 of the first surface 331 of the first portion 33A relative to the base surface 321.

[0048] As shown in FIGS. 13 to 15, the second portion 33B includes two fourth surfaces 334. The two fourth surfaces 334 are adjacent to each other in the second direction x. The two fourth surfaces 334 are connected to the first main portion 31. Furthermore, the two fourth surfaces 334 are individually connected to the two third surfaces 333 of the third portion 33C. The area of ​​each of the two fourth surfaces 334 is smaller than the area of ​​each of the two third surfaces 333.

[0049] 18 and 19, each of the two first coupling portions 33 has a recessed portion 335. Each of the two recessed portions 335 is provided in the third portion 33C. Each of the two recessed portions 335 is recessed in the third direction y from the side where the first main portion 31 is located toward the side where the two first connection portions 32 are located.

[0050] 13 , the minimum dimension d in the second direction x of each of the two first coupling portions 33 is smaller than the dimension B in the second direction x of the base surface 321 of each of the two first connecting portions 32. In each of the two first coupling portions 33, the portion having the minimum dimension d is the third portion 33C. Therefore, the dimension in the second direction x of the third portion 33C is the minimum dimension d of the first coupling portion 33 in the second direction x.

[0051] 3 and 7, the second connection portion 34 is conductively bonded to the first seat portion 123 of the second die pad 12 via the bonding layer 29. The second connection portion 34 extends in the second direction x. At least a portion of the second connection portion 34 is housed in the first seat portion 123. The second connection portion 34 is covered with a sealing resin 50.

[0052] 3 and 7, the second coupling portion 35 couples the first main portion 31 and the second connecting portion 34. The second coupling portion 35 is inclined with respect to both the first mounting surface 111 of the first die pad 11 and the second mounting surface 121 of the second die pad 12. The second coupling portion 35 is covered with a sealing resin 50.

[0053] As shown in FIGS. 3, 8, and 9, the second conductive member 40 is conductively joined to the first electrode 211 of the second semiconductor element 21B and the second seat portion 153 of the third power terminal 15. This electrically connects the third power terminal 15 to the first electrode 211 of the second semiconductor element 21B. The second conductive member 40 contains copper or a copper alloy. The second conductive member 40 is a metal clip. The second conductive member 40 is integrally formed by bending or the like. The second conductive member 40 has a second main portion 41, two third connecting portions 42, two third connecting portions 43, a fourth connecting portion 44, and a fourth connecting portion 45.

[0054] 11, the two third connection portions 42 are conductively bonded to the first electrode 211 of the second semiconductor element 21B via the bonding layer 29. As shown in FIGS. 3 and 9, the two third connection portions 42 are spaced apart from each other in the second direction x. The shape of each of the two third connection portions 42 is equal to the shape of each of the two first connection portions 32 of the first conductive member 30.

[0055] 7 and 9, the second main portion 41 is located on the opposite side of the second semiconductor element 21B in the first direction z with the two third connection portions 42 as references. The second main portion 41 is covered with a sealing resin 50. As shown in FIG. 3, the second main portion 41 is bent in a hook shape as viewed in the first direction z. As viewed in the first direction z, the second main portion 41 overlaps the gap between the first die pad 11 and the second die pad 12.

[0056] 7 , each of the two third coupling portions 43 couples one of the two third connection portions 42 to the second main portion 41. The two third coupling portions 43 are individually connected to the two third connection portions 42. Each of the two first coupling portions 33 is inclined with respect to the second mounting surface 121 of the second die pad 12. The shape of each of the two third coupling portions 43 is equal to the shape of each of the two first coupling portions 33 of the first conductive member 30.

[0057] 3 and 9 , the fourth connection portion 44 is conductively joined to the second seat portion 153 of the third power terminal 15 via the joining layer 29. The fourth connection portion 44 extends in the third direction y. At least a portion of the fourth connection portion 44 is housed in the second seat portion 153. The fourth connection portion 44 is covered with a sealing resin 50.

[0058] 3 and 9, the fourth coupling portion 45 couples the second main portion 41 and the fourth connection portion 44. The fourth coupling portion 45 is inclined with respect to both the first mounting surface 111 of the first die pad 11 and the second mounting surface 121 of the second die pad 12. The fourth coupling portion 45 is covered with a sealing resin 50.

[0059] 3, one of the two first wires 61 is conductively joined to the third electrode 213 of the first semiconductor element 21A and the covering portion 162 of the first gate terminal 16A. As shown in FIG. 3, the other of the two first wires 61 is conductively joined to the third electrode 213 of the second semiconductor element 21B and the covering portion 162 of the second gate terminal 16B.

[0060] 3, one of the two second wires 62 is conductively joined to one of the two fourth electrodes 214 of the first semiconductor element 21A and to the covering portion 172 of the first detection terminal 17A. As shown in FIG. 3, the other of the two second wires 62 is conductively joined to one of the two fourth electrodes 214 of the second semiconductor element 21B and to the covering portion 172 of the second detection terminal 17B.

[0061] As shown in FIGS. 7 to 9 , the buffer layer 70 covers the two semiconductor elements 21. The buffer layer 70 includes a first buffer layer 70A and a second buffer layer 70B that are spaced apart from each other. The first buffer layer 70A covers the first semiconductor element 21A, the two first connecting portions 32, and the two first coupling portions 33 of the first conductive member 30. As a result, the first buffer layer 70A reaches the edge 215 of the first semiconductor element 21A. The first buffer layer 70A also covers a portion of the first mounting surface 111 of the first die pad 11. As shown in FIG. 19 , a portion of the first buffer layer 70A is accommodated in the recesses 335 of the two first coupling portions 33. The second buffer layer 70B covers the second semiconductor element 21B, the two third connecting portions 42, and the two third coupling portions 43 of the second conductive member 40. As a result, the second buffer layer 70B reaches the edge 215 of the second semiconductor element 21B. Furthermore, the second buffer layer 70B covers a part of the second mounting surface 121 of the second die pad 12.

[0062] As shown in FIGS. 7 to 9, the buffer layer 70 is covered with the sealing resin 50. The buffer layer 70 is an insulator. The Young's modulus of the buffer layer 70 is lower than that of the sealing resin 50. The buffer layer 70 is made of a material containing silicone and polyimide. The viscosity of the buffer layer 70 made of this material is 50 to 300 (Pa·s). Alternatively, the buffer layer 70 may be made of a material containing either silicone or polyimide. The buffer layer 70 is formed by applying a fluid material onto each of the first semiconductor element 21A and the second semiconductor element 21B. A dispenser or the like is used for application.

[0063] Next, a vehicle C equipped with the semiconductor device A10 will be described with reference to Fig. 20. The vehicle C is, for example, an electric vehicle (EV).

[0064] As shown in FIG. 20 , a vehicle C includes an on-board charger 91, a storage battery 92, and a drive system 93. Power is supplied to the on-board charger 91 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, power may be supplied from the power supply facility to the on-board charger 91 via a wired connection. The on-board charger 91 is configured with a step-up DC-DC converter. The semiconductor device A10 is included in the converter circuit. The voltage of the power supplied to the on-board charger 91 is stepped up by the converter and then supplied to the storage battery 92. The stepped-up voltage is, for example, 600 V.

[0065] The drive system 93 drives the vehicle C. The drive system 93 has an inverter 931 and a drive source 932. Electric power stored in the storage battery 92 is supplied to the inverter 931. The power supplied from the storage battery 92 to the inverter 931 is DC power. Alternatively, unlike the power system shown in FIG. 20 , a step-up DC-DC converter may be further provided between the storage battery 92 and the inverter 931. The inverter 931 converts DC power into AC power. The inverter 931 is connected to the drive source 932. The drive source 932 has an AC motor and a transmission. When the AC power converted by the inverter 931 is supplied to the drive source 932, the AC motor rotates and the rotation is transmitted to the transmission. The transmission appropriately reduces the rotation speed transmitted from the AC motor and then rotates the drive shaft of the vehicle C. This drives the vehicle C.

[0066] Next, the effects of the semiconductor device A10 will be described.

[0067] The semiconductor device A10 includes a first semiconductor element 21A, a first conductive member 30, a first buffer layer 70A, and a sealing resin 50. The Young's modulus of the first buffer layer 70A is lower than that of the sealing resin 50. The first main portion 31 includes a first connecting portion 32, a first main portion 31, and a first coupling portion 33. The first connecting portion 32 includes a base surface 321 connected to the first coupling portion 33. The minimum dimension d of the first coupling portion 33 in the second direction x is smaller than the dimension B of the base surface 321 in the second direction x. This configuration reduces interference between the first coupling portion 33 and the first buffer layer 70A when forming the first buffer layer 70A during manufacturing of the semiconductor device A10. This allows the first buffer layer 70A in a fluid state to reach a greater distance. Therefore, this configuration allows the buffer layer 70 to more reliably cover a desired portion of the semiconductor element 21 in the semiconductor device A10.

[0068] The Young's modulus of the first buffer layer 70A is lower than that of the sealing resin 50. This configuration reduces thermal strain that occurs in the bonding layer 29 that conductively bonds the first electrode 211 of the first semiconductor element 21A to the first connection portion 32. This reduces thermal stress that occurs in the bonding layer 29. This improves the reliability of the semiconductor device A10 against temperature cycles.

[0069] The first buffer layer 70A is an insulator. The first buffer layer 70A covers at least a portion of each of the first connection portion 32 and the first coupling portion 33. The first semiconductor element 21A has an edge 215 that surrounds the first electrode 211 when viewed in the first direction z. The first buffer layer 70A reaches the edge 215. With this configuration, the first buffer layer 70A can suppress leakage current that would otherwise occur from the first electrode 211 of the semiconductor element 21.

[0070] When viewed in the first direction z, the first coupling portion 33 overlaps the edge 215 of the first semiconductor element 21A. The first coupling portion 33 is inclined with respect to the base surface 321 of the first connection portion 32. By adopting this configuration, a longer section of the edge 215 that contacts the first buffer layer 70A can be ensured during the manufacture of the semiconductor device A10.

[0071] The first connecting portion 33 has a first portion 33A, a second portion 33B, and a third portion 33C. The third portion 33C is connected to the first portion 33A and the second portion 33B. In the first direction z, the third portion 33C is located between the first portion 33A and the second portion 33B. The dimension of the third portion 33C in the second direction x is the minimum dimension d of the first connecting portion 33 in the second direction x. This configuration makes it possible to increase the dimension of the first buffer layer 70A in the first direction z during the manufacture of the semiconductor device A10.

[0072] The first portion 33A includes a first surface 331 that forms a boundary with the base surface 321 of the first connecting portion 32. The first coupling portion 33 includes two third surfaces 333 and a ridge line 333A that forms a boundary between the two third surfaces 333. The first surfaces 331 and the ridge line 333A are each inclined with respect to the base surface 321. The inclination angle α2 of the ridge line 333A with respect to the base surface 321 is smaller than the inclination angle α1 of the first surface 331 with respect to the base surface 321. This configuration not only increases the dimension of the first buffer layer 70A in the first direction z, but also makes it easier for the first buffer layer 70A to flow over a wider area during the manufacture of the semiconductor device A10.

[0073] The first coupling portion 33 has a recessed portion 335 provided in the third portion 33C. The recessed portion 335 is recessed in the third direction y from the side where the first main portion 31 is located toward the side where the first connecting portion 32 is located. With this configuration, during the manufacture of the semiconductor device A10, the first buffer layer 70A flows toward the recessed portion 335, thereby further expanding the flow of the first buffer layer 70A. In addition, an anchor effect of the first buffer layer 70A on the first coupling portion 33 is exerted, thereby improving the adhesion of the first buffer layer 70A to the first conductive member 30.

[0074] The semiconductor device A10 further includes a first die pad 11 having a first mounting surface 111 facing the first direction z. The first semiconductor element 21A is conductively bonded to the first mounting surface 111. The first buffer layer 70A covers a portion of the first mounting surface 111. With this configuration, the first buffer layer 70A can effectively suppress leakage current that would otherwise be generated from the first electrode 211 of the semiconductor element 21.

[0075] Second Embodiment A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 21 and 22. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 21 corresponds to Figure 13, which shows the semiconductor device A10. Figure 22 corresponds to Figure 14, which shows the semiconductor device A10.

[0076] In the semiconductor device A20, the configuration of the first conductive member 30 is different from that of the semiconductor device A10.

[0077] 20, in the first conductive member 30, the connecting edge 331A of each of the two first connecting portions 33 is located inward of the peripheral edge 321A of the base surface 321 of one of the two first connecting portions 32. The connecting edge 331A is spaced apart from the peripheral edge 321A.

[0078] Next, the effects of the semiconductor device A20 will be described.

[0079] The semiconductor device A20 includes a first semiconductor element 21A, a first conductive member 30, a first buffer layer 70A, and a sealing resin 50. The Young's modulus of the first buffer layer 70A is lower than that of the sealing resin 50. The first main portion 31 includes a first connecting portion 32, a first main portion 31, and a first coupling portion 33. The first connecting portion 32 includes a base surface 321 connected to the first coupling portion 33. The minimum dimension d of the first coupling portion 33 in the second direction x is smaller than the dimension B of the base surface 321 in the second direction x. Therefore, with this configuration, the semiconductor device A20 can also more reliably cover a desired portion of the semiconductor element 21 with the buffer layer 70. Furthermore, by incorporating a configuration common to the semiconductor device A10, the semiconductor device A20 achieves the same effects as the semiconductor device A10.

[0080] In the first conductive member 30 of the semiconductor device A20, a linking edge 331A that forms the boundary between the first surface 331 of the first coupling portion 33 and the base surface 321 of the first connection portion 32 is spaced apart from the peripheral edge 321A of the base surface 321. By adopting this configuration, when the first buffer layer 70A is formed in the manufacture of the semiconductor device A20, interference of the first coupling portion 33 with the first buffer layer 70A is further reduced.

[0081] Third Embodiment A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to Figures 23 and 24. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 23 corresponds to Figure 13, which shows the semiconductor device A10. For ease of understanding, Figure 24 shows a portion of the first buffer layer 70A housed in the through portion 336 (details of which will be described later) of the first conductive member 30.

[0082] In the semiconductor device A30, the configuration of the first conductive member 30 differs from that of the semiconductor device A10.

[0083] 23 and 24 , each of the two first coupling portions 33 of the first conductive member 30 has a through portion 336. The through portion 336 penetrates in the first direction z. A portion of the first buffer layer 70A is accommodated in the through portion 336 of each of the two first coupling portions 33.

[0084] 23 and 24 , when viewed in the first direction z, the through portion 336 of each of the two first coupling portions 33 is spaced apart from the edge 215 of the first semiconductor element 21A. When viewed in the first direction z, the through portion 336 of each of the two first coupling portions 33 individually overlaps the base surface 321 of each of the two first connection portions 32.

[0085] Next, the effects of the semiconductor device A30 will be described.

[0086] The semiconductor device A30 includes a first semiconductor element 21A, a first conductive member 30, a first buffer layer 70A, and a sealing resin 50. The Young's modulus of the first buffer layer 70A is lower than that of the sealing resin 50. The first main portion 31 includes a first connecting portion 32, a first main portion 31, and a first coupling portion 33. The first connecting portion 32 includes a base surface 321 connected to the first coupling portion 33. The minimum dimension d of the first coupling portion 33 in the second direction x is smaller than the dimension B of the base surface 321 in the second direction x. Therefore, with this configuration, the semiconductor device A30 can also more reliably cover a desired portion of the semiconductor element 21 with the buffer layer 70. Furthermore, by incorporating a configuration common to the semiconductor device A10, the semiconductor device A30 achieves the same effects as the semiconductor device A10.

[0087] In the semiconductor device A30, the first coupling portion 33 of the first conductive member 30 has a through portion 336. The through portion 336 penetrates in the first direction z. This configuration allows the first buffer layer 70A to flow down through the through portion 336 when forming the first buffer layer 70A in the manufacture of the semiconductor device A30. This further reduces interference of the first coupling portion 33 with the first buffer layer 70A.

[0088] [Fourth embodiment] A semiconductor device A40 according to a fourth embodiment of the present disclosure will be described with reference to FIGS. 25 to 27. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. Here, FIG. 25 corresponds to FIG. 13 showing the semiconductor device A10. FIG. 26 corresponds to FIG. 14 showing the semiconductor device A10. FIG. 27 corresponds to FIG. 15 showing the semiconductor device A10.

[0089] In the semiconductor device A40, the configuration of the first conductive member 30 differs from that of the semiconductor device A10.

[0090] 25 and 26, each of the two first coupling portions 33 of the first conductive member 30 is located on either side of the two first connecting portions 32 in the second direction x. Each of the two first coupling portions 33 is located outward from the base surface 321 of each of the two first connecting portions 32. As shown in FIGS. 26 and 27, each of the two first coupling portions 33 stands upright in the first direction z.

[0091] Next, the effects of the semiconductor device A40 will be described.

[0092] The semiconductor device A40 includes a first semiconductor element 21A, a first conductive member 30, a first buffer layer 70A, and a sealing resin 50. The Young's modulus of the first buffer layer 70A is lower than that of the sealing resin 50. The first main portion 31 includes a first connecting portion 32, a first main portion 31, and a first coupling portion 33. The first connecting portion 32 includes a base surface 321 connected to the first coupling portion 33. The minimum dimension d of the first coupling portion 33 in the second direction x is smaller than the dimension B of the base surface 321 in the second direction x. Therefore, with this configuration, the semiconductor device A40 can also more reliably cover the desired portion of the semiconductor element 21 with the buffer layer 70. Furthermore, by incorporating a configuration common to the semiconductor device A10, the semiconductor device A40 achieves the same effects as the semiconductor device A10.

[0093] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0094] The present disclosure includes the embodiments described in the appendix below. [Appendix 1] a first semiconductor element (21A) having a first electrode (211) located on one side in a first direction; a first conductive member (30) conductively joined to the first electrode (211); a first buffer layer (70A) covering at least a portion of the first semiconductor element (21A); a sealing resin (50) that covers the first buffer layer (70A), The Young's modulus of the first buffer layer (70A) is lower than the Young's modulus of the sealing resin (50), the first conductive member (30) has a first connection portion (32) conductively joined to the first electrode (211), a first main portion (31) located on the opposite side of the first semiconductor element (21A) with respect to the first connection portion (32), and a first coupling portion (33) coupling the first connection portion (32) and the first main portion (31), the first connection portion (32) faces a side opposite to a side facing the first electrode (211) in the first direction and includes a base surface (321) connected to the first connection portion (33); In a second direction perpendicular to the first direction, the minimum dimension (d) of the first connecting portion (33) in the second direction is smaller than the dimension (B) of the base surface (321) in the second direction. [Appendix 2] The first buffer layer (70A) is an insulator, The semiconductor device (A10) according to Appendix 1, wherein the first buffer layer (70A) covers at least a part of each of the first connecting portion (32) and the first linking portion (33). [Appendix 3] the first semiconductor element (21A) has an edge (215) surrounding the first electrode (211) when viewed in the first direction; The semiconductor device (A10) according to Appendix 2, wherein the first buffer layer (70A) reaches the edge (215). [Appendix 4] The semiconductor device (A10) according to Appendix 3, wherein the first connecting portion (33) overlaps the edge (215) when viewed in the first direction. [Appendix 5] The semiconductor device (A10) according to appendix 4, wherein the first connecting portion (33) is inclined with respect to the base surface (321). [Appendix 6] the first connecting portion (33) has a first portion (33A) connected to the base surface (321), a second portion (33B) connected to the first main portion (31), and a third portion (33C) connected to the first portion (33A) and the second portion (33B), In the first direction, the third portion (33C) is located between the first portion (33A) and the second portion (33B), The semiconductor device (A10) according to Appendix 5, wherein the dimension of the third portion (33C) in the second direction is the minimum dimension (d) of the first connecting portion (33) in the second direction. [Appendix 7] the first portion (33A) includes a first surface (331) connected to the base surface (321) and two second surfaces (332) adjacent to each other in the second direction; Each of the two second surfaces (332) is connected to the first surface (331) and the third portion (33C), The semiconductor device (A10) according to appendix 6, wherein the first surface (331) and each of the two second surfaces (332) are inclined with respect to the base surface (321). [Appendix 8] The first surface (331) includes a connecting edge (331A) that forms a boundary with the base surface (321), The semiconductor device (A10) according to Appendix 7, wherein the connecting edge (331A) extends in the second direction. [Appendix 9] The semiconductor device (A10) according to Appendix 8, wherein, when viewed in the first direction, both sides of the connecting edge (331A) in the second direction reach a peripheral edge (321A) of the base surface (321). [Appendix 10] The semiconductor device (A20) according to Appendix 8, wherein the connecting edge (331A) is spaced apart from the peripheral edge (321A) of the base surface (321) when viewed in the first direction. [Appendix 11] the third portion (33C) includes two third surfaces (333) adjacent to each other in the second direction, the two third surfaces (333) are individually connected to the two second surfaces (332) and are also connected to the second portion (33B); The semiconductor device (A10) according to Appendix 9, wherein each of the two third surfaces (333) is inclined with respect to the base surface (321). [Appendix 12] The third portion (33C) includes a ridge (333A) that forms a boundary between the two third surfaces (333), The ridge line (333A) is inclined with respect to the base surface (321), The semiconductor device (A10) according to Appendix 11, wherein an inclination angle (α2) of the ridge line (333A) relative to the base surface (321) is smaller than an inclination angle (α1) of the first surface (331) relative to the base surface (321). [Appendix 13] The semiconductor device (A10) according to Appendix 12, wherein the area of ​​each of the two third surfaces (333) is larger than the area of ​​each of the two second surfaces (332). [Appendix 14] The first connecting portion (33) has a recessed portion (335) provided in the third portion (33C), A semiconductor device (A10) described in Appendix 13, wherein in a third direction perpendicular to the first direction and the second direction, the recessed portion (335) is recessed from the side where the first main portion (31) is located toward the side where the first connection portion (32) is located. [Appendix 15] the first connecting portion (33) has a through portion (336) provided in the third portion (33C), The semiconductor device (A30) according to appendix 14, wherein the through portion (336) penetrates in the first direction. [Appendix 16] The device further includes a first die pad (11) having a first mounting surface (111) facing the first direction, The first semiconductor element (21A) has a second electrode (212) located on the opposite side to the first electrode (211) in the first direction, The second electrode (212) is conductively bonded to the first mounting surface (111), The semiconductor device (A10) according to any one of appendixes 3 to 15, wherein the first buffer layer (70A) covers a part of the first mounting surface (111). [Appendix 17] the first die pad (11) has a first heat dissipation surface (112) facing the opposite side to the first mounting surface (111) in the first direction, The semiconductor device (A10) according to appendix 16, wherein the first heat dissipation surface (112) is exposed from the sealing resin (50). [Appendix 18] a first power terminal (13) connected to the first die pad (11); a first gate terminal (16A) electrically connected to the first semiconductor element (21A); The semiconductor device (A10) according to Appendix 17, wherein a portion of each of the first power terminal (13) and the first gate terminal (16A) protrudes from the sealing resin (50). [Appendix 19] Drivetrain (93) and a storage battery (92) for supplying power to the drive system (93); an on-board charger (91) for supplying power to the storage battery (92); The semiconductor device (A10) according to Supplementary Note 18, The semiconductor device (A10) is included in a circuit that constitutes the on-board charger (91). [Appendix 20] The semiconductor device (A10) according to Appendix 14, wherein a portion of the first buffer layer (70A) is housed in the recess (335). [Appendix 21] The semiconductor device (A30) according to Appendix 15, wherein a portion of the first buffer layer (70A) is housed in the through portion (336). [Appendix 22] The semiconductor device (A30) according to Appendix 15, wherein the through portion (336) is spaced apart from the edge (215) when viewed in the first direction. [Appendix 23] The semiconductor device (A30) according to Appendix 15, wherein the through portion (336) overlaps the base surface (321) when viewed in the first direction. [Explanation of symbols]

[0095] A10 to A40: Semiconductor device C: Vehicle 11: First die pad 111: First mounting surface 112: 1st heat dissipation surface 12: Second die pad 121: Second mounting surface 122:Second heat dissipation surface 123:1st seat 13: 1st power terminal 131: Mounting section 132: Covering part 14:Second power terminal 141: Mounting section 142: Covering part 15: 3rd power terminal 151: Mounting section 152: Covering part 153:Second seat 16: 1st signal terminal 16A, 16B: First gate terminal, second gate terminal 161: Mounting section 162: Covering part 17: 2nd signal terminal 17A, 17B: First detection terminal, second detection terminal 171: Mounting section 172: Covering part 21: Semiconductor element 21A,: First semiconductor element, second semiconductor element 211~214: 1st electrode ~ 4th electrode 215: Edge 29: 1st bonding layer 30: First conductive member 31: First main part 32: First connection part 321: Base 321: Periphery 322: Side 33: 1st connection part 33A, 33B, 33C: Part 1, Part 2, Part 3 331~334: 1st page ~ 4th page 333A: Ridgeline 335: Indentation 336: Penetration 40: Second conductive member 41: Second main part 42: Third connection part 43:Third connection part 44: 4th connection part 45: 4th connection part 50: Sealing resin 51:Top surface 52: Bottom 53,54: 1st side, 2nd side 55: Recess 61, 62: First wire, second wire 70:Buffer layer 70A, 70B: 1st buffer layer, 2nd buffer layer 91: Vehicle charger 92: Storage battery 93: Drive system 931: Inverter 932: Power source z,x,y: 1st direction, 2nd direction, 3rd direction

Claims

1. a first semiconductor element having a first electrode located on one side in a first direction; a first conductive member conductively connected to the first electrode; a first buffer layer covering at least a portion of the first semiconductor element; a sealing resin that covers the first buffer layer, the Young's modulus of the first buffer layer is lower than the Young's modulus of the sealing resin; the first conductive member has a first connection portion conductively joined to the first electrode, a first main portion located on the opposite side of the first connection portion from the first semiconductor element, and a first coupling portion coupling the first connection portion and the first main portion together; the first connection portion faces a side opposite to a side facing the first electrode in the first direction and includes a base surface connected to the first coupling portion, In a second direction perpendicular to the first direction, the minimum dimension of the first coupling portion in the second direction is smaller than the dimension of the base surface in the second direction.

2. the first buffer layer is an insulator, The semiconductor device according to claim 1 , wherein the first buffer layer covers at least a portion of each of the first connecting portion and the first coupling portion.

3. the first semiconductor element has an edge surrounding the first electrode when viewed in the first direction; The semiconductor device according to claim 2 , wherein the first buffer layer reaches the edge.

4. The semiconductor device according to claim 3 , wherein the first connecting portion overlaps the edge when viewed in the first direction.

5. The semiconductor device according to claim 4 , wherein the first connecting portion is inclined with respect to the base surface.

6. the first connecting portion has a first portion connected to the base surface, a second portion connected to the first main portion, and a third portion connected to the first portion and the second portion, In the first direction, the third portion is located between the first portion and the second portion, The semiconductor device according to claim 5 , wherein the dimension of said third portion in said second direction is the minimum dimension of said first coupling portion in said second direction.

7. the first portion includes a first surface connected to the base surface and two second surfaces adjacent to each other in the second direction, each of the two second surfaces is connected to the first surface and the third portion; The semiconductor device according to claim 6 , wherein the first surface and each of the two second surfaces are inclined with respect to the base surface.

8. the first surface includes a connecting edge that interfaces with the base surface; The semiconductor device according to claim 7 , wherein the connecting edge extends in the second direction.

9. The semiconductor device according to claim 8 , wherein both sides of the connecting edge in the second direction reach peripheral edges of the base surface when viewed in the first direction.

10. The semiconductor device according to claim 8 , wherein the connecting edge is spaced apart from a peripheral edge of the base surface when viewed in the first direction.

11. the third portion includes two third surfaces adjacent to each other in the second direction, the two third surfaces are individually connected to the two second surfaces and are also connected to the second portion; The semiconductor device according to claim 9 , wherein each of the two third surfaces is inclined with respect to the base surface.

12. the third portion includes an edge that forms a boundary between the two third surfaces; the ridge line is inclined with respect to the base surface, The semiconductor device according to claim 11 , wherein an inclination angle of said ridge line relative to said base surface is smaller than an inclination angle of said first surface relative to said base surface.

13. The semiconductor device according to claim 12 , wherein an area of ​​each of said two third surfaces is larger than an area of ​​each of said two second surfaces.

14. the first connecting portion has a recessed portion provided in the third portion, 14. The semiconductor device according to claim 13, wherein the recessed portion is recessed from a side where the first main portion is located toward a side where the first connection portion is located in a third direction perpendicular to the first direction and the second direction.

15. the first connecting portion has a through portion provided in the third portion, The semiconductor device according to claim 14 , wherein the through portion penetrates in the first direction.

16. a first die pad having a first mounting surface facing the first direction; the first semiconductor element has a second electrode located on the opposite side to the first electrode in the first direction; the second electrode is conductively bonded to the first mounting surface, 16. The semiconductor device according to claim 3, wherein the first buffer layer covers a portion of the first mounting surface.

17. the first die pad has a first heat dissipation surface facing the opposite side to the first mounting surface in the first direction; The semiconductor device according to claim 16 , wherein the first heat dissipation surface is exposed from the sealing resin.

18. a first power terminal connected to the first die pad; a first gate terminal electrically connected to the first semiconductor element; The semiconductor device according to claim 17 , wherein a portion of each of the first power terminal and the first gate terminal protrudes from the sealing resin.

19. The drive system and a storage battery that supplies power to the drive system; an on-board charger that supplies power to the storage battery; The semiconductor device according to claim 18, The semiconductor device is included in a circuit that configures the on-board charger.

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