Transformer and high-frequency module

Abstract

To achieve a transformer and a high-frequency module, capable of implementing a differential power amplification circuit supporting a higher frequency or output.SOLUTION: A transformer provided at a multilayer substrate 3 having a plurality of wiring layers laminated with a dielectric layer interposed therebetween includes a balanced-side coil 41 provided between a first terminal T1 and a second terminal T2, and an unbalanced-side coil 42 provided between a third terminal T3 and a fourth terminal T4. The balanced-side coil 41 is configured such that a first inductor L1 and a second inductor L2 provided at different ones of the wiring layers are connected in parallel. The unbalanced-side coil 42 is configured such that a third inductor L3 and a fourth inductor L4 provided at different ones of the wiring layers are connected in series.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a transformer and a high-frequency module. [Background technology]

[0002] A power amplifier that combines differential signals using a transformer is known (for example, Patent Document 1). The transformer used in the power amplifier described in Patent Document 1 includes a primary coil to which a power supply voltage is supplied at a midpoint and to which a differential signal is input, and a secondary coil that is grounded at one end, is electromagnetically coupled to the primary coil, and outputs a combined signal of the differential signals from the other end.

[0003] In a power amplifier having the above configuration, if the winding ratio between the primary coil and the secondary coil is increased to achieve higher output, this may result in an increase in the size of the transformer and an increase in power loss.Patent Document 2 listed below discloses a technology for suppressing an increase in the size of the transformer and an increase in power loss by providing a balanced side coil (primary coil) and an unbalanced side coil (secondary coil) across multiple layers of a multi-layer substrate. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-147574 [Patent Document 2] International Publication No. 2023 / 127387 Summary of the Invention [Problem to be solved by the invention]

[0005] In the above-mentioned Patent Document 2, a balanced side coil and an unbalanced side coil are respectively formed by electrically connecting coils across multiple layers in series. In recent years, there has been a demand for transformers that can further increase the frequency and output of power amplifiers.

[0006] The present disclosure has been made in view of the above, and aims to provide a transformer and a high-frequency module that enable a differential power amplifier circuit to operate at higher frequencies and with higher output power. [Means for solving the problem]

[0007] A transformer according to one aspect of the present disclosure is a transformer mounted on a multilayer substrate in which multiple wiring layers are stacked with dielectric layers sandwiched between them, and includes a balanced side coil provided between a first terminal and a second terminal, and an unbalanced side coil provided between a third terminal and a fourth terminal, wherein the balanced side coil is configured by connecting in parallel a first inductor and a second inductor provided on different wiring layers, and the unbalanced side coil is configured by connecting in series a third inductor and a fourth inductor provided on different wiring layers.

[0008] In this configuration, the inductance value of the balanced side coil can be made smaller relative to the inductance value of the unbalanced side coil, thereby increasing the impedance conversion ratio of the transformer.

[0009] Furthermore, the resonance point of the resonance circuit caused by the line capacitance can be shifted to a higher frequency, thereby widening the passband to the higher frequency side.

[0010] A high-frequency module according to one aspect of the present disclosure includes the above-described transformer and a power amplifier circuit including a first amplifier and a second amplifier, wherein the transformer receives a first balanced signal output from the first amplifier at its first terminal, receives a second balanced signal output from the second amplifier at its second terminal, is connected to a ground potential at its fourth terminal, is supplied with a DC power supply potential at its fifth terminal, and outputs an unbalanced signal obtained by combining the first balanced signal and the second balanced signal from its third terminal.

[0011] In this configuration, the inductance of the balanced coil can be made smaller relative to the inductance of the unbalanced coil, thereby increasing the impedance conversion ratio of the transformer and enabling higher power output from the high-frequency module.

[0012] Furthermore, the resonance point of the resonance circuit caused by the line capacitance can be shifted to a higher frequency, thereby widening the passband to the higher frequency side.

[0013] A high-frequency module according to one aspect of the present disclosure includes the above-described transformer and a power amplifier circuit including a first amplifier and a second amplifier, wherein the transformer receives a first balanced signal output from the first amplifier at its first terminal, receives a second balanced signal output from the second amplifier at its second terminal, receives a DC power supply potential at its fourth terminal, and outputs an unbalanced signal obtained by combining the first balanced signal and the second balanced signal from its third terminal.

[0014] In this configuration, the inductance of the balanced coil can be made smaller relative to the inductance of the unbalanced coil, thereby increasing the impedance conversion ratio of the transformer and enabling higher power output from the high-frequency module.

[0015] Furthermore, the resonance point of the resonance circuit caused by the line capacitance can be shifted to a higher frequency, thereby widening the passband to the higher frequency side. [Effects of the Invention]

[0016] According to the present disclosure, it is possible to realize a transformer and a high-frequency module that enable a differential power amplifier circuit to operate at higher frequencies and with higher output. [Brief explanation of the drawings]

[0017] [Figure 1] FIG. 1 is a schematic diagram showing an example of a circuit block configuration of a high-frequency module according to a first embodiment. [Figure 2]FIG. 2 is a cross-sectional view showing an example of a multilayer substrate on which the transformer according to the first embodiment is mounted. [Figure 3] FIG. 3 is a plan view showing a first specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the first embodiment. [Figure 4A] FIG. 4A is a perspective view of a first wiring layer and a second wiring layer overlapped in a first specific example of the first embodiment. [Figure 4B] FIG. 4B is a perspective view of the third wiring layer and the fourth wiring layer overlapping each other in the first specific example of the first embodiment. [Figure 5] FIG. 5 is a plan view showing a second specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the first embodiment. [Figure 6A] FIG. 6A is a perspective view of a first wiring layer and a second wiring layer overlapped in a second specific example of the first embodiment. [Figure 6B] FIG. 6B is a perspective view of the third wiring layer and the fourth wiring layer overlapping each other in the second specific example of the first embodiment. [Figure 7] FIG. 7 is a plan view showing a third specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the first embodiment. [Figure 8A] FIG. 8A is a perspective view of a first wiring layer and a second wiring layer overlapped in a third specific example of the first embodiment. [Figure 8B] FIG. 8B is a perspective view of the third wiring layer and the fourth wiring layer overlapping each other in the third specific example of the first embodiment. [Figure 9] FIG. 9 is a plan view showing a fourth specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the first embodiment. [Figure 10A] FIG. 10A is a perspective view of a first wiring layer and a second wiring layer overlapped in a fourth specific example of the first embodiment. [Figure 10B] FIG. 10B is a perspective view of the third wiring layer and the fourth wiring layer overlapping each other in the fourth specific example of the first embodiment. [Figure 11]FIG. 11 is a schematic diagram showing an example of a circuit block configuration of the high-frequency module according to the second embodiment. [Figure 12] FIG. 12 is a plan view showing a first specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the second embodiment. [Figure 13A] FIG. 13A is a perspective view of a first wiring layer and a second wiring layer overlapped in a first specific example of the second embodiment. [Figure 13B] FIG. 13B is a perspective view of the third wiring layer and the fourth wiring layer overlapping each other in the first specific example of the second embodiment. [Figure 14] FIG. 14 is a plan view showing a second specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the second embodiment. [Figure 15A] FIG. 15A is a perspective view of a first wiring layer and a second wiring layer overlapped in a second specific example of the second embodiment. [Figure 15B] FIG. 15B is a perspective view of the third wiring layer and the fourth wiring layer overlapping each other in the second specific example of the second embodiment. [Figure 16] FIG. 16 is a plan view showing a third specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the second embodiment. [Figure 17A] FIG. 17A is a perspective view of a first wiring layer and a second wiring layer overlapped in a third specific example of the second embodiment. [Figure 17B] FIG. 17B is a perspective view of the third wiring layer and the fourth wiring layer overlapping each other in the third specific example of the second embodiment. [Figure 18] FIG. 18 is a plan view showing a fourth specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the second embodiment. [Figure 19A] FIG. 19A is a perspective view of a first wiring layer and a second wiring layer overlapped in a fourth specific example of the second embodiment. [Figure 19B] FIG. 19B is a perspective view of the third wiring layer and the fourth wiring layer overlapping each other in the fourth specific example of the second embodiment. [Figure 20]FIG. 20 is a plan view showing an example of component arrangement on a multilayer substrate of a high-frequency module according to a modified example of the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0018] A transformer and a high-frequency module according to an embodiment will be described in detail below with reference to the drawings. However, the present disclosure is not limited to the embodiment.

[0019] (Embodiment 1) 1 is a schematic diagram showing an example of a circuit block configuration of a radio frequency module according to embodiment 1. The radio frequency module 1 according to this embodiment is an ultra-compact integrated module that integrates multiple integrated circuits and various functional components mounted on a ceramic laminate substrate such as an LTCC (Low Temperature Co-fired Ceramics) substrate.

[0020] In the example shown in FIG. 1, the high-frequency module 1 includes a power amplifier circuit 2, a transformer 4, and capacitors C1, C2, and C3.

[0021] The power amplifier circuit 2 is, for example, a chip device mounted on an LTCC substrate. The power amplifier circuit 2 may be configured with, for example, a bipolar transistor or a field effect transistor (FET). When the power amplifier circuit 2 is configured with a bipolar transistor, for example, a heterojunction bipolar transistor (HBT) is exemplified.

[0022] The power amplifier circuit 2 includes a first amplifier 21 and a second amplifier 22. A differential Doherty amplifier circuit, for example, is exemplified as the power amplifier circuit 2. In this case, the first amplifier 21 and the second amplifier 22 may each include a carrier amplifier and a peak amplifier.

[0023] The transformer 4 according to the first embodiment includes a balanced side coil 41 and an unbalanced side coil 42. The balanced side coil 41 and the unbalanced side coil 42 are electromagnetically coupled.

[0024] The first balanced signal RF_INP output from the first amplifier 21 is input to one end (first terminal T1) of the balanced side coil 41. The second balanced signal RF_INN output from the second amplifier 22 is input to the other end (second terminal T2) of the balanced side coil 41.

[0025] A DC power supply potential VCC is supplied to the center tap P (fifth terminal T5) of the balanced side coil 41. A capacitor C1 is provided between the supply path of the DC power supply potential VCC and the ground potential GND. The capacitor C1 is a smoothing capacitor that removes high-frequency noise components contained in the DC power supply potential VCC.

[0026] An unbalanced signal RF_OUT is output from one end of the unbalanced coil 42. The other end (fourth terminal T4) of the unbalanced coil 42 is connected to the ground potential GND.

[0027] The capacitors C2 and C3 are components that constitute an output matching circuit. Note that the output matching circuit may also be configured to include a transformer 4 in addition to the capacitors C2 and C3.

[0028] In the configuration shown in Figure 1, the transformer 4 combines the first balanced signal RF_INP input from the first terminal T1 and the second balanced signal RF_INN input from the second terminal T2, converts them into an unbalanced signal RF_OUT, and outputs the unbalanced signal RF_OUT from the third terminal T3.

[0029] Hereinafter, a specific example of a configuration in which the balanced side coil 41 and the unbalanced side coil 42 of the transformer 4 are provided on each wiring layer of the multilayer substrate in the high-frequency module 1 according to the embodiment will be described. Fig. 2 is a cross-sectional view showing an example of a multilayer substrate on which the transformer according to the embodiment 1 is mounted. Fig. 2 shows a YZ plane cross-section orthogonal to the XY plane, seen from the Z direction, of the component mounting surface of the high-frequency module 1 on which the power amplifier circuit 2 is mounted.

[0030] 2, the balanced side coil 41 and the unbalanced side coil 42 of the transformer 4 are provided on a multilayer substrate 3 in which a plurality of wiring layers ML are stacked with dielectric layers DI sandwiched therebetween. The multilayer substrate 3 is formed of a ceramic laminated substrate such as an LTCC substrate.

[0031] 3 is a plan view showing a first specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to Embodiment 1. Here, the wiring layer ML provided on the surface layer of the multilayer substrate 3 (here, the component mounting surface of the high-frequency module 1) is referred to as the first wiring layer 3a, the wiring layer ML provided between the first wiring layer 3a and the second wiring layer 3b with a dielectric layer DI sandwiched therebetween is referred to as the third wiring layer 3c, and the wiring layer ML provided between the third wiring layer 3c and the third wiring layer 3c with a dielectric layer DI sandwiched therebetween is referred to as the fourth wiring layer 3d.

[0032] In the first specific example shown in FIG. 3, the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the fourth wiring layer 3d are provided in parallel between the first terminal T1 and the second terminal T2.

[0033] Specifically, the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B1 provided in the first terminal T1.

[0034] The first inductor L1 of the first wiring layer 3a and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B2 provided in the second terminal T2.

[0035] The first inductor L1 of the first wiring layer 3a and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B5 provided in the fifth terminal T5.

[0036] As a result, the balanced side coil 41 is configured as a parallel circuit of the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the fourth wiring layer 3d.

[0037] In the first specific example shown in FIG. 3, the third inductor L3 of the second wiring layer 3b and the fourth inductor L4 of the third wiring layer 3c are provided in series between the third terminal T3 and the fourth terminal T4.

[0038] Specifically, the third inductor L3 of the second wiring layer 3b and the fourth inductor L4 of the third wiring layer 3c are electrically connected to each other by a via B6.

[0039] As a result, the unbalanced side coil 42 is configured as a series circuit of the third inductor L3 of the second wiring layer 3b and the fourth inductor L4 of the third wiring layer 3c.

[0040] 4A is a perspective view of a first wiring layer and a second wiring layer overlapped in a first specific example of embodiment 1. FIG. 4B is a perspective view of a third wiring layer and a fourth wiring layer overlapped in the first specific example of embodiment 1.

[0041] 4A, the first inductor L1 of the balanced side coil 41 provided on the first wiring layer 3a and the third inductor L3 of the unbalanced side coil 42 provided on the second wiring layer 3b overlap in the Z direction via the dielectric layer DI. This causes the first inductor L1 and the third inductor L3 to be electromagnetically coupled.

[0042] 4B, the fourth inductor L4 of the unbalanced-side coil 42 provided on the third wiring layer 3c and the second inductor L2 of the balanced-side coil 41 provided on the fourth wiring layer 3d overlap in the Z direction via the dielectric layer DI. This causes the fourth inductor L4 and the second inductor L2 to be electromagnetically coupled.

[0043] FIG. 5 is a plan view showing a second specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the first embodiment.

[0044] In the second specific example shown in FIG. 5, the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the third wiring layer 3c are provided in parallel between the first terminal T1 and the second terminal T2.

[0045] Specifically, the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B1 provided in the first terminal T1.

[0046] The first inductor L1 of the second wiring layer 3b and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B2 provided in the second terminal T2.

[0047] The first inductor L1 of the second wiring layer 3b and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B5 provided in the fifth terminal T5.

[0048] As a result, the balanced side coil 41 is configured as a parallel circuit of the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the third wiring layer 3c.

[0049] In the second specific example shown in FIG. 5, the third inductor L3 in the first wiring layer 3a and the fourth inductor L4 in the fourth wiring layer 3d are provided in series between the third terminal T3 and the fourth terminal T4.

[0050] Specifically, the third inductor L3 of the first wiring layer 3a and the fourth inductor L4 of the fourth wiring layer 3d are electrically connected to each other through a via B6.

[0051] As a result, the unbalanced side coil 42 is configured as a series circuit of the third inductor L3 of the first wiring layer 3a and the fourth inductor L4 of the fourth wiring layer 3d.

[0052] 6A is a perspective view of a first wiring layer and a second wiring layer overlapped in a second specific example of embodiment 1. FIG. 6B is a perspective view of a third wiring layer and a fourth wiring layer overlapped in the second specific example of embodiment 1.

[0053] 6A, the third inductor L3 of the unbalanced-side coil 42 provided on the first wiring layer 3a and the first inductor L1 of the balanced-side coil 41 provided on the second wiring layer 3b overlap in the Z direction via the dielectric layer DI. This causes the third inductor L3 and the first inductor L1 to be electromagnetically coupled.

[0054] 6B, the second inductor L2 of the balanced side coil 41 provided on the third wiring layer 3c and the fourth inductor L4 of the unbalanced side coil 42 provided on the fourth wiring layer 3d overlap in the Z direction via the dielectric layer DI. This causes the second inductor L2 and the fourth inductor L4 to be electromagnetically coupled.

[0055] FIG. 7 is a plan view showing a third specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the first embodiment.

[0056] In the third specific example shown in FIG. 7, the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the third wiring layer 3c are provided in parallel between the first terminal T1 and the second terminal T2.

[0057] Specifically, the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B1 provided in the first terminal T1.

[0058] The first inductor L1 of the first wiring layer 3a and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B2 provided in the second terminal T2.

[0059] The first inductor L1 of the first wiring layer 3a and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B5 provided in the fifth terminal T5.

[0060] As a result, the balanced side coil 41 is configured as a parallel circuit of the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the third wiring layer 3c.

[0061] In the third specific example shown in FIG. 7, the third inductor L3 in the second wiring layer 3b and the fourth inductor L4 in the fourth wiring layer 3d are provided in series between the third terminal T3 and the fourth terminal T4.

[0062] Specifically, the third inductor L3 in the second wiring layer 3b and the fourth inductor L4 in the fourth wiring layer 3d are electrically connected to each other through a via B6.

[0063] As a result, the unbalanced side coil 42 is configured as a series circuit of the third inductor L3 of the second wiring layer 3b and the fourth inductor L4 of the fourth wiring layer 3d.

[0064] 8A is a perspective view of a first wiring layer and a second wiring layer overlapped in a third specific example of embodiment 1. FIG. 8B is a perspective view of a third wiring layer and a fourth wiring layer overlapped in the third specific example of embodiment 1.

[0065] 8A, the first inductor L1 of the balanced side coil 41 provided on the first wiring layer 3a and the third inductor L3 of the unbalanced side coil 42 provided on the second wiring layer 3b overlap in the Z direction via the dielectric layer DI. This causes the first inductor L1 and the third inductor L3 to be electromagnetically coupled.

[0066] 8B, the second inductor L2 of the balanced side coil 41 provided on the third wiring layer 3c and the fourth inductor L4 of the unbalanced side coil 42 provided on the fourth wiring layer 3d overlap in the Z direction via the dielectric layer DI. This causes the second inductor L2 and the fourth inductor L4 to be electromagnetically coupled.

[0067] FIG. 9 is a plan view showing a fourth specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the first embodiment.

[0068] In the fourth specific example shown in FIG. 9, the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the fourth wiring layer 3d are provided in parallel between the first terminal T1 and the second terminal T2.

[0069] Specifically, the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B1 provided in the first terminal T1.

[0070] The first inductor L1 of the second wiring layer 3b and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B2 provided in the second terminal T2.

[0071] The first inductor L1 of the second wiring layer 3b and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B5 provided in the fifth terminal T5.

[0072] As a result, the balanced side coil 41 is configured as a parallel circuit of the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the fourth wiring layer 3d.

[0073] In the fourth specific example shown in FIG. 9, the third inductor L3 of the first wiring layer 3a and the fourth inductor L4 of the third wiring layer 3c are provided in series between the third terminal T3 and the fourth terminal T4.

[0074] Specifically, the third inductor L3 of the first wiring layer 3a and the fourth inductor L4 of the third wiring layer 3c are electrically connected to each other by a via B6.

[0075] As a result, the unbalanced side coil 42 is configured as a series circuit of the third inductor L3 of the first wiring layer 3a and the fourth inductor L4 of the third wiring layer 3c.

[0076] 10A is a perspective view of a first wiring layer and a second wiring layer overlapped in a fourth specific example of embodiment 1. FIG. 10B is a perspective view of a third wiring layer and a fourth wiring layer overlapped in the fourth specific example of embodiment 1.

[0077] 10A, the third inductor L3 of the unbalanced-side coil 42 provided on the first wiring layer 3a and the first inductor L1 of the balanced-side coil 41 provided on the second wiring layer 3b overlap in the Z direction via the dielectric layer DI. This causes the third inductor L3 and the first inductor L1 to be electromagnetically coupled.

[0078] 10B, the fourth inductor L4 of the unbalanced-side coil 42 provided on the third wiring layer 3c and the second inductor L2 of the balanced-side coil 41 provided on the fourth wiring layer 3d overlap in the Z direction via the dielectric layer DI. This causes the fourth inductor L4 and the second inductor L2 to be electromagnetically coupled.

[0079] As described above, the balanced side coil 41 of the transformer 4 according to the first embodiment is configured as a parallel circuit of the first inductor L1 and the second inductor L2, which are provided on different wiring layers. Also, as described above, the unbalanced side coil 42 of the transformer 4 according to the first embodiment is configured as a series circuit of the third inductor L3 and the fourth inductor L4, which are provided on different wiring layers.

[0080] In the above configuration, the balanced side coil 41, which is configured as a parallel circuit of the first inductor L1 and the second inductor L2, and the unbalanced side coil 42, which is configured as a series circuit of the third inductor L3 and the fourth inductor L4, overlap in the Z direction, thereby becoming electromagnetically coupled, and the balanced signal input between the first terminal T1 and the second terminal T2 is converted into an unbalanced signal.

[0081] With the above configuration, the inductance value of the balanced side coil can be made smaller relative to the inductance value of the unbalanced side coil 42. This increases the impedance conversion ratio of the transformer 4, enabling the high-frequency module 1 to achieve higher power amplification output.

[0082] Furthermore, the resonance point of the resonance circuit caused by the line capacitance can be shifted to a higher frequency, thereby widening the passband to the higher frequency side.

[0083] The transformer 4 according to the first embodiment may be configured as a surface mount device (SMD).

[0084] (Embodiment 2) 11 is a schematic diagram showing an example of a circuit block configuration of a high-frequency module according to embodiment 2. Here, differences from embodiment 1 will be described in detail, and descriptions of the same contents as embodiment 1 may be omitted.

[0085] In the high-frequency module 1a according to the second embodiment, the center tap P of the balanced side coil 41 is connected to the other end (fourth terminal T4) of the unbalanced side coil 42. A DC power supply potential VCC is supplied to the fourth terminal T4 of the transformer 4a, thereby virtually grounding the fourth terminal T4 of the transformer 4a.

[0086] FIG. 12 is a plan view showing a first specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the second embodiment.

[0087] In the first specific example shown in FIG. 12, the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the fourth wiring layer 3d are provided in parallel between the first terminal T1 and the second terminal T2.

[0088] Specifically, the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B1 provided in the first terminal T1.

[0089] The first inductor L1 of the first wiring layer 3a and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B2 provided in the second terminal T2.

[0090] The first inductor L1 of the first wiring layer 3a and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B5.

[0091] As a result, the balanced side coil 41 is configured as a parallel circuit of the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the fourth wiring layer 3d.

[0092] In the first specific example shown in FIG. 12, the third inductor L3 of the second wiring layer 3b and the fourth inductor L4 of the third wiring layer 3c are provided in series between the third terminal T3 and the fourth terminal T4.

[0093] Specifically, the third inductor L3 of the second wiring layer 3b and the fourth inductor L4 of the third wiring layer 3c are electrically connected to each other by a via B6.

[0094] As a result, the unbalanced side coil 42 is configured as a series circuit of the third inductor L3 of the second wiring layer 3b and the fourth inductor L4 of the third wiring layer 3c.

[0095] 13A is a perspective view of a first wiring layer and a second wiring layer overlapped in a first specific example of embodiment 2. FIG. 13B is a perspective view of a third wiring layer and a fourth wiring layer overlapped in the first specific example of embodiment 2.

[0096] 13A, the first inductor L1 of the balanced side coil 41 provided on the first wiring layer 3a and the third inductor L3 of the unbalanced side coil 42 provided on the second wiring layer 3b overlap in the Z direction via the dielectric layer DI. This causes the first inductor L1 and the third inductor L3 to be electromagnetically coupled.

[0097] 13B, the fourth inductor L4 of the unbalanced-side coil 42 provided on the third wiring layer 3c and the second inductor L2 of the balanced-side coil 41 provided on the fourth wiring layer 3d overlap in the Z direction via the dielectric layer DI. This causes the fourth inductor L4 and the second inductor L2 to be electromagnetically coupled.

[0098] FIG. 14 is a plan view showing a second specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the second embodiment.

[0099] In the second specific example shown in FIG. 14, the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the third wiring layer 3c are provided in parallel between the first terminal T1 and the second terminal T2.

[0100] Specifically, the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B1 provided in the first terminal T1.

[0101] The first inductor L1 of the second wiring layer 3b and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B2 provided in the second terminal T2.

[0102] The first inductor L1 of the second wiring layer 3b and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B5.

[0103] As a result, the balanced side coil 41 is configured as a parallel circuit of the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the third wiring layer 3c.

[0104] In the second specific example shown in FIG. 14, the third inductor L3 in the first wiring layer 3a and the fourth inductor L4 in the fourth wiring layer are provided in series between the third terminal T3 and the fourth terminal T4.

[0105] Specifically, the third inductor L3 of the first wiring layer 3a and the fourth inductor L4 of the fourth wiring layer 3d are electrically connected to each other through a via B6.

[0106] As a result, the unbalanced side coil 42 is configured as a series circuit of the third inductor L3 of the first wiring layer 3a and the fourth inductor L4 of the fourth wiring layer 3d.

[0107] 15A is a perspective view of a first wiring layer and a second wiring layer overlapped in a second specific example of embodiment 2. FIG. 15B is a perspective view of a third wiring layer and a fourth wiring layer overlapped in the second specific example of embodiment 2.

[0108] 15A, the third inductor L3 of the unbalanced-side coil 42 provided on the first wiring layer 3a and the first inductor L1 of the balanced-side coil 41 provided on the second wiring layer 3b overlap in the Z direction via the dielectric layer DI. This causes the third inductor L3 and the first inductor L1 to be electromagnetically coupled.

[0109] 15B, the second inductor L2 of the balanced side coil 41 provided on the third wiring layer 3c and the fourth inductor L4 of the unbalanced side coil 42 provided on the fourth wiring layer 3d overlap in the Z direction via the dielectric layer DI. This causes the second inductor L2 and the fourth inductor L4 to be electromagnetically coupled.

[0110] FIG. 16 is a plan view showing a third specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the second embodiment.

[0111] In the third specific example shown in FIG. 16, the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the third wiring layer 3c are provided in parallel between the first terminal T1 and the second terminal T2.

[0112] Specifically, the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B1 provided in the first terminal T1.

[0113] The first inductor L1 of the first wiring layer 3a and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B2 provided in the second terminal T2.

[0114] The first inductor L1 of the first wiring layer 3a and the second inductor L2 of the third wiring layer 3c are electrically connected to each other through a via B5.

[0115] As a result, the balanced side coil 41 is configured as a parallel circuit of the first inductor L1 of the first wiring layer 3a and the second inductor L2 of the third wiring layer 3c.

[0116] In the third specific example shown in FIG. 16, the third inductor L3 in the second wiring layer 3b and the fourth inductor L4 in the fourth wiring layer 3d are provided in series between the third terminal T3 and the fourth terminal T4.

[0117] Specifically, the third inductor L3 in the second wiring layer 3b and the fourth inductor L4 in the fourth wiring layer 3d are electrically connected to each other through a via B6.

[0118] As a result, the unbalanced side coil 42 is configured as a series circuit of the third inductor L3 of the second wiring layer 3b and the fourth inductor L4 of the fourth wiring layer 3d.

[0119] 17A is a perspective view of a first wiring layer and a second wiring layer overlapped in a third specific example of embodiment 2. FIG. 17B is a perspective view of a third wiring layer and a fourth wiring layer overlapped in the third specific example of embodiment 2.

[0120] 17A, the first inductor L1 of the balanced side coil 41 provided on the first wiring layer 3a and the third inductor L3 of the unbalanced side coil 42 provided on the second wiring layer 3b overlap in the Z direction via the dielectric layer DI. This causes the first inductor L1 and the third inductor L3 to be electromagnetically coupled.

[0121] 17B, ​​the second inductor L2 of the balanced side coil 41 provided on the third wiring layer 3c and the fourth inductor L4 of the unbalanced side coil 42 provided on the fourth wiring layer 3d overlap in the Z direction via the dielectric layer DI. This causes the second inductor L2 and the fourth inductor L4 to be electromagnetically coupled.

[0122] FIG. 18 is a plan view showing a fourth specific example of the balanced side coil and the unbalanced side coil provided in each wiring layer of the multilayer substrate of the transformer according to the second embodiment.

[0123] In the fourth specific example shown in FIG. 18, the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the fourth wiring layer 3d are provided in parallel between the first terminal T1 and the second terminal T2.

[0124] Specifically, the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B1 provided in the first terminal T1.

[0125] The first inductor L1 of the second wiring layer 3b and the second inductor L2 of the fourth wiring layer 3d are electrically connected to each other through a via B2 provided in the second terminal T2.

[0126] The first inductor L1 in the second wiring layer 3b and the second inductor L2 in the fourth wiring layer 3d are electrically connected to each other through a via B5.

[0127] As a result, the balanced side coil 41 is configured as a parallel circuit of the first inductor L1 of the second wiring layer 3b and the second inductor L2 of the fourth wiring layer 3d.

[0128] In the fourth specific example shown in FIG. 18, the third inductor L3 of the first wiring layer 3a and the fourth inductor L4 of the third wiring layer 3c are provided in series between the third terminal T3 and the fourth terminal T4.

[0129] Specifically, the third inductor L3 of the first wiring layer 3a and the fourth inductor L4 of the third wiring layer 3c are electrically connected to each other by a via B6.

[0130] As a result, the unbalanced side coil 42 is configured as a series circuit of the third inductor L3 of the first wiring layer 3a and the fourth inductor L4 of the third wiring layer 3c.

[0131] 19A is a perspective view of a first wiring layer and a second wiring layer overlapped in a fourth specific example of embodiment 2. Fig. 19B is a perspective view of a third wiring layer and a fourth wiring layer overlapped in the fourth specific example of embodiment 2.

[0132] 19A, the third inductor L3 of the unbalanced side coil 42 provided on the first wiring layer 3a and the first inductor L1 of the balanced side coil 41 provided on the second wiring layer 3b overlap in the Z direction via the dielectric layer DI. This causes the third inductor L3 and the first inductor L1 to be electromagnetically coupled.

[0133] 19B, the fourth inductor L4 of the unbalanced-side coil 42 provided on the third wiring layer 3c and the second inductor L2 of the balanced-side coil 41 provided on the fourth wiring layer 3d overlap in the Z direction via the dielectric layer DI. This causes the fourth inductor L4 and the second inductor L2 to be electromagnetically coupled.

[0134] As described above, the balanced side coil 41 of the transformer 4a according to the second embodiment is configured as a parallel circuit of a first inductor L1 and a second inductor L2 provided on different wiring layers, similar to the balanced side coil 41 of the transformer 4 according to the first embodiment. Moreover, as described above, the unbalanced side coil 42 of the transformer 4 according to the first embodiment is configured as a series circuit of a third inductor L3 and a fourth inductor L4 provided on different wiring layers, similar to the unbalanced side coil 42 of the transformer 4 according to the first embodiment.

[0135] In the above configuration, the balanced side coil 41, which is configured as a parallel circuit of the first inductor L1 and the second inductor L2, and the unbalanced side coil 42, which is configured as a series circuit of the third inductor L3 and the fourth inductor L4, overlap in the Z direction, thereby becoming electromagnetically coupled, and the balanced signal input between the first terminal T1 and the second terminal T2 is converted into an unbalanced signal.

[0136] With the above configuration, similar to the first embodiment, the inductance value of the balanced side coil can be made relatively small relative to the inductance value of the unbalanced side coil 42. This increases the impedance conversion ratio of the transformer 4, enabling the high-frequency module 1 to achieve high-output power amplification.

[0137] Furthermore, the resonance point of the resonance circuit caused by the line capacitance can be shifted to a higher frequency, thereby widening the passband to the higher frequency side.

[0138] (Variation) Fig. 20 is a plan view showing an example of component arrangement on a multilayer substrate of a high-frequency module according to a modified example of embodiment 2. In the example shown in Fig. 20, the transformer 4a is configured as a surface mount device (SMD), and a capacitor C1 is provided near the fourth terminal T4.

[0139] When configured as an SMD with the transformer 4a according to the second embodiment, the number of terminals can be reduced compared to when the transformer 4 according to the first embodiment is configured as an SMD. Specifically, the fifth terminal T5 of the transformer 4 according to the first embodiment becomes unnecessary.

[0140] In the configuration of embodiment 2, if the supply path of the DC power supply potential VCC between the fourth terminal T4 of the transformer 4a and the capacitor C1 becomes long, the inductance component of the supply path of the DC power supply potential VCC becomes non-negligible, and RF coupling may occur between the balanced side coil 41 and the unbalanced side coil 42, resulting in deterioration of characteristics.

[0141] 20, the transformer 4a is configured as an SMD, and the capacitor C1, which is provided between the supply path of the DC power supply potential VCC and the ground potential GND, is arranged adjacent to the transformer 4a, thereby suppressing RF coupling between the balanced side coil 41 and the unbalanced side coil 42. This makes it possible to suppress characteristic degradation caused by the reduction in the number of terminals of the transformer 4a according to the second embodiment.

[0142] It should be noted that the above-described embodiments are intended to facilitate understanding of the present disclosure and are not intended to limit the present disclosure. The present disclosure may be modified or improved without departing from the spirit thereof, and equivalents thereof are also included in the present disclosure.

[0143] The present disclosure can have the following configurations as described above or instead of the above.

[0144] (1) A transformer according to one aspect of the present disclosure is a transformer mounted on a multilayer substrate in which multiple wiring layers are stacked with dielectric layers sandwiched between them, and includes a balanced side coil disposed between a first terminal and a second terminal, and an unbalanced side coil disposed between a third terminal and a fourth terminal, wherein the balanced side coil is configured by connecting in parallel a first inductor and a second inductor disposed on different wiring layers, and the unbalanced side coil is configured by connecting in series a third inductor and a fourth inductor disposed on different wiring layers.

[0145] In this configuration, the inductance value of the balanced side coil can be made smaller relative to the inductance value of the unbalanced side coil, thereby increasing the impedance conversion ratio of the transformer.

[0146] Furthermore, the resonance point of the resonance circuit caused by the line capacitance can be shifted to a higher frequency, thereby widening the passband to the higher frequency side.

[0147] (2) In the transformer of (1) above, the center tap of the balanced side coil is connected to the fifth terminal.

[0148] (3) In the transformer of (1) above, the fourth terminal is connected to a center tap of the balanced side coil.

[0149] In this configuration, the number of terminals of the transformer can be reduced.

[0150] (4) The transformer described in (2) or (3) above is an SMD made of an LTCC substrate.

[0151] (5) In the transformer of (4) above, the multilayer substrate includes a first wiring layer, a second wiring layer sandwiched between the first wiring layer and the second wiring layer, a third wiring layer sandwiched between the second wiring layer and the second wiring layer, and a fourth wiring layer sandwiched between the third wiring layer and the fourth wiring layer.

[0152] (6) In the transformer of (5) above, in a plan view, the multilayer substrate has the first inductor and the third inductor overlapping with a dielectric layer interposed therebetween, and the second inductor and the fourth inductor overlapping with a dielectric layer interposed therebetween.

[0153] In this configuration, the first inductor and the third inductor, which overlap with each other in a plan view via a dielectric layer, are electromagnetically coupled, and the second inductor and the fourth inductor, which overlap with each other in a plan view via a dielectric layer, are electromagnetically coupled, thereby converting a balanced signal input between the first terminal and the second terminal into an unbalanced signal.

[0154] (7) In the transformer of (6) above, the first inductor is provided in the first wiring layer, the second inductor is provided in the fourth wiring layer, the third inductor is provided in the second wiring layer, and the fourth inductor is provided in the third wiring layer.

[0155] (8) In the transformer of (6) above, the first inductor is provided in the second wiring layer, the second inductor is provided in the third wiring layer, the third inductor is provided in the first wiring layer, and the fourth inductor is provided in the fourth wiring layer.

[0156] (9) In the transformer of (6) above, the first inductor is provided in the first wiring layer, the second inductor is provided in the third wiring layer, the third inductor is provided in the second wiring layer, and the fourth inductor is provided in the fourth wiring layer.

[0157] (10) In the transformer of (6) above, the first inductor is provided in the second wiring layer, the second inductor is provided in the fourth wiring layer, the third inductor is provided in the first wiring layer, and the fourth inductor is provided in the third wiring layer.

[0158] (11) A high-frequency module according to one aspect of the present disclosure includes the transformer described above in (2) and a power amplifier circuit including a first amplifier and a second amplifier, wherein the transformer receives a first balanced signal output from the first amplifier at its first terminal, receives a second balanced signal output from the second amplifier at its second terminal, is connected to a ground potential at its fourth terminal, is supplied with a DC power supply potential at its fifth terminal, and outputs an unbalanced signal obtained by combining the first balanced signal and the second balanced signal from its third terminal.

[0159] In this configuration, the inductance of the balanced coil can be made smaller relative to the inductance of the unbalanced coil, thereby increasing the impedance conversion ratio of the transformer and enabling higher power output from the high-frequency module.

[0160] Furthermore, the resonance point of the resonance circuit caused by the line capacitance can be shifted to a higher frequency, thereby widening the passband to the higher frequency side.

[0161] (12) A high-frequency module according to one aspect of the present disclosure includes the transformer described above in (3) and a power amplifier circuit including a first amplifier and a second amplifier, wherein the transformer receives a first balanced signal output from the first amplifier at its first terminal, receives a second balanced signal output from the second amplifier at its second terminal, receives a DC power supply potential at its fourth terminal, and outputs an unbalanced signal obtained by combining the first balanced signal and the second balanced signal from its third terminal.

[0162] In this configuration, the inductance of the balanced coil can be made smaller relative to the inductance of the unbalanced coil, thereby increasing the impedance conversion ratio of the transformer and enabling higher power output from the high-frequency module.

[0163] Furthermore, the resonance point of the resonance circuit caused by the line capacitance can be shifted to a higher frequency, thereby widening the passband to the higher frequency side.

[0164] (13) In the high-frequency module of (11) or (12) above, the transformer is an SMD made of an LTCC substrate.

[0165] (14) In the high-frequency module of (11) or (12) above, the multilayer substrate includes a first wiring layer, a second wiring layer sandwiched between the first wiring layer and the second wiring layer, a third wiring layer sandwiched between the second wiring layer and the second wiring layer, and a fourth wiring layer sandwiched between the third wiring layer and the fourth wiring layer.

[0166] (15) In the high-frequency module of (14) above, in a plan view, the multilayer substrate has the first inductor and the third inductor overlapping with a dielectric layer interposed therebetween, and the second inductor and the fourth inductor overlapping with a dielectric layer interposed therebetween.

[0167] In this configuration, the first inductor and the third inductor, which overlap with each other in a plan view via a dielectric layer, are electromagnetically coupled, and the second inductor and the fourth inductor, which overlap with each other in a plan view via a dielectric layer, are electromagnetically coupled, thereby converting a balanced signal input between the first terminal and the second terminal into an unbalanced signal.

[0168] (16) In the high-frequency module of (15) above, the first inductor is provided in the first wiring layer, the second inductor is provided in the fourth wiring layer, the third inductor is provided in the second wiring layer, and the fourth inductor is provided in the third wiring layer.

[0169] (17) In the high-frequency module of (15) above, the first inductor is provided in the second wiring layer, the second inductor is provided in the third wiring layer, the third inductor is provided in the first wiring layer, and the fourth inductor is provided in the fourth wiring layer.

[0170] (18) In the high-frequency module of (15) above, the first inductor is provided in the first wiring layer, the second inductor is provided in the third wiring layer, the third inductor is provided in the second wiring layer, and the fourth inductor is provided in the fourth wiring layer.

[0171] (19) In the high-frequency module of (15) above, the first inductor is provided in the second wiring layer, the second inductor is provided in the fourth wiring layer, the third inductor is provided in the first wiring layer, and the fourth inductor is provided in the third wiring layer.

[0172] (20) In the high-frequency module of (15) above, the power amplifier circuit is a differential Doherty amplifier circuit, and the first amplifier and the second amplifier each include a carrier amplifier and a peak amplifier.

[0173] (21) In the high-frequency module of (15) above, a capacitor is provided between the supply path of the DC power supply potential and a ground potential and is disposed adjacent to the transformer.

[0174] This configuration can suppress the deterioration of characteristics caused by the reduction in the number of terminals of the transformer.

[0175] The present disclosure makes it possible to realize a transformer and a high-frequency module that enable a differential power amplifier circuit to operate at higher frequencies and with higher output power. [Explanation of symbols]

[0176] 1,1a high frequency module 2. Power amplifier circuit 3 Multilayer board 3a 1st wiring layer 3b 2nd wiring layer 3c 3rd wiring layer 3d 4th wiring layer 4,4a transformer 21 First Amplifier 22 Second Amplifier 41 Balanced side coil 42 Unbalanced side coil DI dielectric layer GND Ground potential ML wiring layer P Center tap T1 Terminal 1 T2 Terminal 2 T3 Third terminal T4 4th terminal T5 5th terminal VCC DC power supply potential

Claims

1. A transformer provided on a multilayer substrate in which a plurality of wiring layers are stacked with dielectric layers sandwiched therebetween, a balanced side coil provided between the first terminal and the second terminal; an unbalanced side coil provided between the third terminal and the fourth terminal; Including, The balanced side coil is a first inductor and a second inductor provided in different wiring layers and connected in parallel; The unbalanced side coil is a third inductor and a fourth inductor provided in different wiring layers and connected in series; transformer.

2. 2. The transformer according to claim 1, A center tap of the balanced side coil is connected to a fifth terminal. transformer.

3. 2. The transformer according to claim 1, a center tap of the balanced side coil is connected to the fourth terminal; transformer.

4. 4. The transformer according to claim 2 or 3, It is an SMD made of an LTCC substrate. transformer.

5. 5. The transformer according to claim 4, The multilayer substrate comprises: a first wiring layer; a second wiring layer provided with a dielectric layer sandwiched between the second wiring layer and the first wiring layer; a third wiring layer provided with a dielectric layer sandwiched between the third wiring layer and the second wiring layer; a fourth wiring layer provided with a dielectric layer sandwiched between the fourth wiring layer and the third wiring layer; Including, transformer.

6. 6. The transformer according to claim 5, The multilayer substrate comprises: In a plan view, the first inductor and the third inductor overlap with each other via a dielectric layer, and the second inductor and the fourth inductor overlap with each other via a dielectric layer. transformer.

7. 7. The transformer according to claim 6, the first inductor is provided in the first wiring layer; the second inductor is provided in the fourth wiring layer, the third inductor is provided in the second wiring layer, the fourth inductor is provided in the third wiring layer; transformer.

8. 7. The transformer according to claim 6, the first inductor is provided in the second wiring layer; the second inductor is provided in the third wiring layer, the third inductor is provided in the first wiring layer, the fourth inductor is provided in the fourth wiring layer; transformer.

9. 7. The transformer according to claim 6, the first inductor is provided in the first wiring layer; the second inductor is provided in the third wiring layer, the third inductor is provided in the second wiring layer, the fourth inductor is provided in the fourth wiring layer; transformer.

10. 7. The transformer according to claim 6, the first inductor is provided in the second wiring layer; the second inductor is provided in the fourth wiring layer, the third inductor is provided in the first wiring layer, the fourth inductor is provided in the third wiring layer; transformer.

11. A transformer according to claim 2; a power amplifier circuit including a first amplifier and a second amplifier; Equipped with The transformer is a first balanced signal output from the first amplifier is input to the first terminal; a second balanced signal output from the second amplifier is input to the second terminal; the fourth terminal is connected to a ground potential; a DC power supply potential is supplied to the fifth terminal; an unbalanced signal obtained by combining the first balanced signal and the second balanced signal is output from the third terminal; High frequency module.

12. A transformer according to claim 3; a power amplifier circuit including a first amplifier and a second amplifier; Equipped with The transformer is a first balanced signal output from the first amplifier is input to the first terminal; a second balanced signal output from the second amplifier is input to the second terminal; a DC power supply potential is supplied to the fourth terminal; an unbalanced signal obtained by combining the first balanced signal and the second balanced signal is output from the third terminal; High frequency module.

13. 13. The high-frequency module according to claim 11, The transformer is an SMD made of an LTCC substrate. High frequency module.

14. 13. The high-frequency module according to claim 11, The multilayer substrate comprises: a first wiring layer; a second wiring layer provided with a dielectric layer sandwiched between the second wiring layer and the first wiring layer; a third wiring layer provided with a dielectric layer sandwiched between the third wiring layer and the second wiring layer; a fourth wiring layer provided with a dielectric layer sandwiched between the fourth wiring layer and the third wiring layer; Including, High frequency module.

15. 15. The high-frequency module according to claim 14, The multilayer substrate comprises: In a plan view, the first inductor and the third inductor overlap with each other via a dielectric layer, and the second inductor and the fourth inductor overlap with each other via a dielectric layer. High frequency module.

16. 16. The high-frequency module according to claim 15, the first inductor is provided in the first wiring layer; the second inductor is provided in the fourth wiring layer, the third inductor is provided in the second wiring layer, the fourth inductor is provided in the third wiring layer; High frequency module.

17. 16. The high-frequency module according to claim 15, the first inductor is provided in the second wiring layer; the second inductor is provided in the third wiring layer, the third inductor is provided in the first wiring layer, the fourth inductor is provided in the fourth wiring layer; High frequency module.

18. 16. The high-frequency module according to claim 15, the first inductor is provided in the first wiring layer; the second inductor is provided in the third wiring layer, the third inductor is provided in the second wiring layer, the fourth inductor is provided in the fourth wiring layer; High frequency module.

19. 16. The high-frequency module according to claim 15, the first inductor is provided in the second wiring layer; the second inductor is provided in the fourth wiring layer, the third inductor is provided in the first wiring layer, the fourth inductor is provided in the third wiring layer; High frequency module.

20. 16. The high-frequency module according to claim 15, the power amplifier circuit is a differential Doherty amplifier circuit, the first amplifier and the second amplifier each include a carrier amplifier and a peak amplifier; High frequency module.

21. 16. The high-frequency module according to claim 15, a capacitor provided between the supply path of the DC power supply potential and a ground potential is disposed adjacent to the transformer; High frequency module.

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