Print head and liquid discharge apparatus

Abstract

To provide a print head improved in detection accuracy of the residual vibration generated after a piezoelectric element is driven.SOLUTION: A print head includes a pressure chamber whose volume changes according to a drive signal, a nozzle communicating with the pressure chamber and configured to allow a liquid to be discharged, a piezoelectric element configured to output a residual vibration signal corresponding to a residual vibration caused by a change in the volume of the pressure chamber, a residual vibration detection circuit configured to output a residual vibration detection signal corresponding to the residual vibration signal, a first transistor configured to switch whether to supply the residual vibration signal to the residual vibration detection circuit, and a second transistor configured to switch whether to supply the drive signal to the residual vibration detection circuit. A constant-potential signal is supplied to a back-gate terminal of the first transistor and to a back-gate terminal of the second transistor, and the residual vibration detection circuit outputs a residual vibration detection signal obtained by differentially amplifying the residual vibration signal input through the first transistor and the drive signal input through the second transistor.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] The present invention relates to a printhead and a liquid ejection device. [Background technology]

[0002] In a liquid ejection device in which ink is ejected from an ejection section by driving a piezoelectric element, a technology is known in which a signal corresponding to residual vibrations generated after the piezoelectric element is driven is detected and the state of the ejection section is determined based on the detection result of the signal, as described in Patent Document 1. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-039856 Summary of the Invention [Problem to be solved by the invention]

[0004] However, from the viewpoint of improving the accuracy of detecting residual vibrations that occur after the piezoelectric element is driven, the technique described in Patent Document 1 is not sufficient, and there is room for further improvement. [Means for solving the problem]

[0005] One aspect of the print head according to the present invention is a pressure chamber whose volume changes in response to a drive signal; a nozzle communicating with the pressure chamber and discharging a liquid; a piezoelectric element that outputs a residual vibration signal corresponding to the residual vibration caused by a change in the volume of the pressure chamber; a residual vibration detection circuit that outputs a residual vibration detection signal corresponding to the residual vibration signal; a first transistor that switches whether or not the residual vibration signal is supplied to the residual vibration detection circuit; a second transistor that switches whether or not the drive signal is supplied to the residual vibration detection circuit; Equipped with a constant potential signal is supplied to the back gate terminal of the first transistor; the constant potential signal is supplied to a back gate terminal of the second transistor; The residual vibration detection circuit outputs the residual vibration detection signal obtained by differentially amplifying the residual vibration signal input via the first transistor and the drive signal input via the second transistor.

[0006] One aspect of the liquid ejection device according to the present invention is a drive circuit that outputs a drive signal; a pressure chamber whose volume changes in response to the drive signal; a nozzle communicating with the pressure chamber and discharging a liquid; a piezoelectric element that outputs a residual vibration signal corresponding to the residual vibration caused by a change in the volume of the pressure chamber; a residual vibration detection circuit that outputs a residual vibration detection signal corresponding to the residual vibration signal; a first transistor that switches whether or not the residual vibration signal is supplied to the residual vibration detection circuit; a second transistor that switches whether or not the drive signal is supplied to the residual vibration detection circuit; A process for determining a state of ejection of liquid from the nozzle based on the residual vibration detection signal. With a sigh, Equipped with a constant potential signal is supplied to the back gate terminal of the first transistor; the constant potential signal is supplied to a back gate terminal of the second transistor; The residual vibration detection circuit outputs the residual vibration detection signal obtained by differentially amplifying the residual vibration signal input via the first transistor and the drive signal input via the second transistor. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram illustrating a schematic configuration of a liquid ejection device. [Figure 2] FIG. 2 is a diagram illustrating a schematic configuration of a discharge unit. [Figure 3] FIG. 2 is a diagram illustrating a schematic configuration of a discharge unit. [Figure 4] 10 is a diagram showing an example of a signal waveform of a drive voltage signal COM. FIG. [Figure 5] FIG. 2 is a diagram illustrating an example of a functional configuration of a drive signal selection circuit. [Figure 6] FIG. 10 is a diagram showing an example of the decoded content in the decoder. [Figure 7] FIG. 2 is a diagram illustrating an example of the circuit configuration of a selection circuit, a switching circuit, and a residual vibration detection circuit included in a drive signal selection circuit. [Figure 8] FIG. 10 is a diagram illustrating an example of the operation of a drive signal selection circuit. [Figure 9] FIG. 1 is a diagram illustrating an example of the structure of an integrated circuit. [Figure 10] 10 is a diagram illustrating an example of the configuration of a mounting area Sel in which a selection circuit is mounted. FIG. [Figure 11] 1 is a diagram showing an example of the configuration of a mounting area Sw in which a switch circuit is mounted; [Figure 12] FIG. 10 is a diagram showing an example of a residual vibration signal Vout. [Figure 13] FIG. 10 is a diagram showing an example of a calculation model of simple harmonic motion assuming residual vibration occurring in a pressure chamber or a diaphragm. [Figure 14] 10 is a diagram for explaining the relationship between the viscosity of ink and the signal waveform of a residual vibration signal Vout. FIG. [Figure 15] 10 is a diagram for explaining the signal waveform of a residual vibration signal Vout when air bubbles are mixed in a pressure chamber. FIG. [Figure 16] FIG. 10 is a diagram showing an example of the circuit configuration of a selection circuit, a switching circuit, and a residual vibration detection circuit included in a drive signal selection circuit of a second embodiment. [Figure 17] 10 is a diagram showing an example of the configuration of a mounting area Sel in which a selection circuit according to the second embodiment is mounted; FIG. [Figure 18] 10 is a diagram illustrating an example of the configuration of a mounting area Sw on which a switch circuit according to a second embodiment is mounted. FIG. [Figure 19]FIG. 10 is a diagram illustrating an example of the structure of an integrated circuit according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] Preferred embodiments of the present invention will be described below with reference to the drawings. The drawings used are for the convenience of explanation. Note that the embodiments described below do not unduly limit the content of the present invention as defined in the claims. Furthermore, not all of the configurations described below are necessarily essential components of the present invention.

[0009] 1. First embodiment 1.1 Configuration of the liquid ejection device FIG. 1 is a diagram showing a schematic configuration of a liquid ejection device 1. As shown in FIG. 1, the liquid ejection device 1 is a so-called line-type inkjet printer that forms a desired image on a medium P transported by a transport unit 4 by ejecting ink, which is an example of a liquid, at a desired timing onto the medium P. Note that the liquid ejection device 1 is not limited to a line-type inkjet printer, and may also be a serial-type inkjet printer. Furthermore, the liquid ejection device 1 is not limited to an inkjet printer, The medium P may be a color material ejection device used in manufacturing color filters for liquid crystal displays and the like, an electrode material ejection device used in forming electrodes for organic EL displays, FEDs (surface-emitting displays), etc., a bioorganic material ejection device used in manufacturing biochips, a three-dimensional modeling device, a textile printing device, etc. In the following description, the direction in which the medium P is transported may be referred to as the transport direction, and the width direction of the transported medium P may be referred to as the scanning direction.

[0010] As shown in FIG. 1, the liquid ejection device 1 includes a control unit 2, a liquid container 3, a transport unit 4, and a plurality of ejection units 5.

[0011] The control unit 2 includes processing circuits such as a CPU (Central Processing Unit) and an FPGA (Field Programmable Gate Array), and a storage circuit such as a semiconductor memory. The control unit 2 outputs signals to control each element of the liquid ejection device 1 based on image data supplied from an external device such as a host computer (not shown) provided outside the liquid ejection device 1.

[0012] The liquid container 3 stores ink as an example of a liquid to be supplied to the ejection unit 5. Specifically, the liquid container 3 stores ink of a plurality of colors to be ejected onto the medium P, such as black, cyan, magenta, yellow, red, and gray. As such a liquid container 3, an ink cartridge, a bag-shaped ink pack made of a flexible film, an ink tank that can be refilled with ink, or the like can be used.

[0013] The transport unit 4 has a transport motor 41 and a transport roller 42. A transport control signal Ctrl-T output by the control unit 2 is input to the transport unit 4. The transport motor 41 is driven based on the transport control signal Ctrl-T, and the drive of the transport motor 41 causes the transport roller 42 to rotate. The rotation of the transport roller 42 transports the medium P along the transport direction.

[0014] Each of the multiple ejection units 5 has a drive module 10 and an ejection module 20. A corresponding image information signal IP output by the control unit 2 is input to each of the multiple ejection units 5, and ink stored in the liquid container 3 is supplied to each of the multiple ejection units 5. The drive module 10 controls the operation of the ejection module 20 based on the image information signal IP. As a result, the ejection module 20 ejects ink supplied from the liquid container 3 at a predetermined timing according to the control of the drive module 10.

[0015] In the liquid ejection device 1 of this embodiment, the ejection modules 20 of each of the multiple ejection units 5 are aligned along the scanning direction so as to be equal to or greater than the width of the medium P. The drive modules 10 of each of the multiple ejection units 5 cause the ejection modules 20 to eject ink in synchronization with the transport of the medium P. The ink ejected from each of the multiple ejection modules 20 lands at a desired position on the medium P. This forms a desired image on the medium P.

[0016] Next, a schematic configuration of the discharge unit 5 will be described. FIG. 2 is a diagram showing a schematic configuration of the discharge unit 5. As shown in FIG. 2, the discharge unit 5 has a drive module 10 and a discharge module 20. In the discharge unit 5, the drive module 10 and the discharge module 20 are electrically connected via a cable 15. Here, a flexible flat cable (FFC) or a flexible printed circuit (FPC) can be used as the cable 15 that electrically connects the drive module 10 and the discharge module 20. In addition, the drive module 10 and the discharge module 20 can be connected via a BtoB (Board to Board) connector without using the cable 15. Alternatively, the electrical connection may be achieved by using the cable 15 in combination with a BtoB connector.

[0017] The drive module 10 includes a control circuit board 11, a drive circuit 50, a control circuit 100, and a power supply circuit 110.

[0018] The power supply circuit 110 converts a commercial voltage signal input to the liquid ejection device 1 into a DC voltage signal with a constant voltage value, for example, a DC voltage signal with a voltage value of 42 V, and outputs the converted DC voltage signal as a voltage signal VHV. The voltage signal VHV output by the power supply circuit 110 is input to the drive circuit 50 and also to the ejection module 20. Such a power supply circuit 110 may be a switching regulator capable of converting a commercial voltage signal into a DC voltage signal with high efficiency, such as a flyback circuit. Note that the DC voltage signal including the voltage signal VHV output by the power supply circuit 110 may be input to various components of the liquid ejection device 1 in addition to the drive circuit 50 and the ejection module 20. Furthermore, the voltage value of the voltage signal VHV output by the power supply circuit 110 is not limited to 42 V. The power supply circuit 110 may output DC voltage signals of multiple voltage values ​​used in the liquid ejection device 1 in addition to the voltage signal VHV.

[0019] The control circuit board 11 is a printed circuit board having one or more wiring layers, and may be a glass epoxy board, a glass polyimide board, or the like. The elements that make up the drive module 10, including the drive circuit 50, the control circuit 100, and the power supply circuit 110, are mounted on the control circuit board 11. Note that the control circuit board 11 on which the elements that make up the drive module 10 are mounted may be made up of a single printed circuit board or multiple printed circuit boards.

[0020] The control circuit 100 is a processor and includes a processing circuit such as a CPU or FPGA, and a storage circuit such as a semiconductor memory. The control circuit 100 receives an image information signal IP output by the control unit 2. Based on the input image information signal IP, the control circuit 100 generates and outputs signals for controlling the operation of the drive module 10 and the ejection module 20.

[0021] Specifically, the control circuit 100 generates a clock signal SCK, a latch signal LAT, a change signal CH, a test timing signal TSIG, and print data signals SI1 to SIn based on the input image information signal IP, and outputs them to the ejection module 20.

[0022] The control circuit 100 also generates a reference drive signal dA and outputs it to the drive circuit 50. The drive circuit 50 generates a drive voltage signal COM including a signal waveform defined by the input reference drive signal dA and outputs it to the ejection module 20. Specifically, the control circuit 100 generates the reference drive signal dA as a digital signal and outputs it to the drive circuit 50. The drive circuit 50 converts the input digital reference drive signal dA into an analog signal and then generates the drive voltage signal COM by class-D amplifying the converted analog signal based on the voltage signal VHV. The drive circuit 50 outputs the generated drive voltage signal COM to the ejection module 20. That is, the control circuit 100 outputs the reference drive signal dA that defines the signal waveform of the drive voltage signal COM output by the drive circuit 50. Note that the reference drive signal dA may be an analog signal as long as it can define the signal waveform of the drive voltage signal COM. Furthermore, the drive circuit 50 is only required to generate the drive voltage signal COM by amplifying the signal waveform defined by the basic drive signal dA based on the voltage signal VHV, and may generate the drive voltage signal COM by performing class A amplification, class B amplification, or class AB amplification instead of or in addition to class D amplification.

[0023] The driving circuit 50 also generates a reference voltage signal VBS and outputs it to the ejection module 20. The reference voltage signal VBS is a signal with a constant voltage value that defines a reference potential for driving the piezoelectric element 60, which will be described later. The voltage value of such a reference voltage signal VBS may be, for example, ground potential, or may be 5.5 V or 6 V. Note that while FIG. 2 illustrates the drive circuit 50 generating the reference voltage signal VBS and outputting it to the discharge module 20, the reference voltage signal VBS may also be generated by a constant voltage output circuit (not shown) that is configured separately from the drive circuit 50.

[0024] Furthermore, waveform information signals WFS1 to WFSn are input to the control circuit 100 from the ejection modules 20, which will be described later. The control circuit 100 determines whether or not the ink ejection state from the ejection modules 20 is normal based on each of the input waveform information signals WFS1 to WFSn. Details of the waveform information signals WFS1 to WFSn input to the control circuit 100 and details of the method for determining whether or not the ink ejection state from the ejection modules 20 is normal based on the waveform information signals WFS1 to WFSn will be described later.

[0025] The ejection module 20 includes print heads 21-1 to 21-n, a head circuit board 23, and waveform information output circuits 270-1 to 270-n. Each of the print heads 21-1 to 21-n includes a head chip 22, a flexible board 24, and a drive signal selection circuit 200. Each of the head chips 22 included in each of the print heads 21-1 to 21-n includes ejection units 600-1 to 600-m, and each of the ejection units 600-1 to 600-m includes a piezoelectric element 60.

[0026] The ejection module 20 receives the clock signal SCK, latch signal LAT, change signal CH, inspection timing signal TSIG, print data signals SI1 to SIn, drive voltage signal COM, reference voltage signal VBS, and voltage signal VHV output by the drive module 10.

[0027] The head circuit board 23 transmits the input clock signal SCK, latch signal LAT, change signal CH, test timing signal TSIG, print data signals SI1 to SIn, drive voltage signal COM, reference voltage signal VBS, and voltage signal VHV to the corresponding print heads 21-1 to 21-n. The head circuit board 23 is a printed circuit board having one or more wiring layers, and may be made of, for example, a glass epoxy board or a glass polyimide board.

[0028] Specifically, of the input clock signal SCK, latch signal LAT, change signal CH, inspection timing signal TSIG, print data signals SI1 to SIn, drive voltage signal COM, reference voltage signal VBS, and voltage signal VHV, head circuit board 23 propagates the clock signal SCK, latch signal LAT, change signal CH, inspection timing signal TSIG, print data signal SI1, drive voltage signal COM, reference voltage signal VBS, and voltage signal VHV to print head 21-1, and propagates the clock signal SCK, latch signal LAT, change signal CH, inspection timing signal TSIG, print data signal SIn, drive voltage signal COM, reference voltage signal VBS, and voltage signal VHV to print head 21-n.

[0029] Of the clock signal SCK, latch signal LAT, change signal CH, test timing signal TSIG, print data signal SI1, drive voltage signal COM, reference voltage signal VBS, and voltage signal VHV input to print head 21-1, the clock signal SCK, latch signal LAT, change signal CH, test timing signal TSIG, print data signal SI1, drive voltage signal COM, and voltage signal VHV are input to print head 21-1's drive signal selection circuit 200. The drive signal selection circuit 200 of print head 21-1 selects or deselects the signal waveform included in drive voltage signal COM based on the input clock signal SCK, latch signal LAT, change signal CH, test timing signal TSIG, and print data signal SI1, thereby generating and outputting drive voltage signals Vin-1 to Vin-m.

[0030] The drive voltage signals Vin-1 to Vin-m output by the drive signal selection circuit 200 of the print head 21-1 are supplied to the corresponding ejection sections 600-1 to 600-m of the head chip 22 of the print head 21-1. Specifically, of the drive voltage signals Vin-1 to Vin-m output by the drive signal selection circuit 200 of the print head 21-1, the drive voltage signal Vin-1 is supplied to one end of the piezoelectric element 60 included in the ejection section 600-1 of the head chip 22 of the print head 21-1, and the drive voltage signal Vin-m is supplied to one end of the piezoelectric element 60 included in the ejection section 600-m of the head chip 22 of the print head 21-1. At this time, a reference voltage signal VBS is commonly supplied to the other end of the piezoelectric element 60 included in each of the ejection sections 600-1 to 600-m of the head chip 22 of the print head 21-1. Piezoelectric elements 60 included in each of ejection portions 600-1 to 600-m of head chip 22 of print head 21-1 are driven in response to the potential difference between the voltage value of corresponding drive voltage signals Vin-1 to Vin-m supplied to one end and the voltage value of reference voltage signal VBS supplied to the other end. An amount of ink corresponding to the driving of piezoelectric elements 60 is ejected from ejection portions 600-1 to 600-m of print head 21-1.

[0031] Furthermore, residual vibrations occur in the ejectors 600-1 to 600-m of the head chip 22 of the print head 21-1 after the piezoelectric elements 60 included therein are driven. The piezoelectric elements 60 included in the ejectors 600-1 to 600-m of the head chip 22 of the print head 21-1 are displaced in response to the residual vibrations generated in the corresponding ejectors 600-1 to 600-m. The piezoelectric elements 60 included in the ejectors 600-1 to 600-m of the print head 21-1 output residual vibration signals Vout-1 to Vout-m corresponding to the displacement. These residual vibration signals Vout-1 to Vout-m are input to the drive signal selection circuit 200 of the print head 21-1. The drive signal selection circuit 200 of the print head 21-1 then generates a residual vibration detection signal NVT corresponding to the input residual vibration signals Vout-1 to Vout-m and outputs it from the print head 21-1.

[0032] The drive signal selection circuit 200 of the print head 21-1 is configured as an integrated circuit device, and is mounted on the flexible substrate 24 of the print head 21-1. On Film) may be implemented.

[0033] Of the clock signal SCK, latch signal LAT, change signal CH, inspection timing signal TSIG, print data signal SIn, drive voltage signal COM, reference voltage signal VBS, and voltage signal VHV input to print head 21-n, the clock signal SCK, latch signal LAT, change signal CH, inspection timing signal TSIG, print data signal SIn, drive voltage signal COM, and voltage signal VHV are input to print head 21-n's drive signal selection circuit 200. The drive signal selection circuit 200 of print head 21-n selects or deselects the signal waveform included in the drive voltage signal COM based on the input clock signal SCK, latch signal LAT, change signal CH, inspection timing signal TSIG, and print data signal SIn, thereby generating and outputting drive voltage signals Vin-1 to Vin-m.

[0034] The drive voltage signals Vin-1 to Vin-m output by the drive signal selection circuit 200 of the print head 21-n are supplied to the corresponding ejection sections 600-1 to 600-m of the head chip 22 of the print head 21-n. Specifically, of the drive voltage signals Vin-1 to Vin-m output by the drive signal selection circuit 200 of the print head 21-n, the drive voltage signal Vin-1 is supplied to one end of the piezoelectric element 60 included in the ejection section 600-1 of the head chip 22 of the print head 21-n, and the drive voltage signal Vin-m is supplied to one end of the piezoelectric element 60 included in the ejection section 600-m of the head chip 22 of the print head 21-n. At this time, the reference voltage signal VBS is commonly supplied to the other end of the piezoelectric element 60 included in each of the ejection sections 600-1 to 600-m of the head chip 22 of the print head 21-n. The piezoelectric elements 60 included in each of the ejection units 600-1 to 600-m of the head chip 22 of the print head 21-n are driven in response to the potential difference between the voltage value of the corresponding drive voltage signals Vin-1 to Vin-m supplied to one end and the voltage value of the reference voltage signal VBS supplied to the other end. An amount of ink corresponding to the drive of the piezoelectric elements 60 is ejected from the ejection units 600-1 to 600-m of the print head 21-n.

[0035] Furthermore, residual vibrations occur in the ejectors 600-1 to 600-m of the head chip 22 of the print head 21-n after each of the piezoelectric elements 60 included therein is driven. The piezoelectric elements 60 included in each of the ejectors 600-1 to 600-m of the head chip 22 of the print head 21-n are displaced in response to the residual vibrations generated in the corresponding ejectors 600-1 to 600-m. The piezoelectric elements 60 included in each of the ejectors 600-1 to 600-m of the print head 21-n output residual vibration signals Vout-1 to Vout-m corresponding to the displacement. These residual vibration signals Vout-1 to Vout-m are input to the drive signal selection circuit 200 of the print head 21-n. The drive signal selection circuit 200 of the print head 21-n then generates a residual vibration detection signal NVT corresponding to the input residual vibration signals Vout-1 to Vout-m and outputs it from the print head 21-n.

[0036] The drive signal selection circuit 200 of the print head 21-n may be configured as an integrated circuit device and mounted on the flexible substrate 24 of the print head 21-n by COF mounting.

[0037] The waveform information output circuits 270-1 to 270-n are mounted on the head circuit board 23.

[0038] The residual vibration detection signal NVT output by the print head 21-1 is input to the waveform information output circuit 270-1. The waveform information output circuit 270-1 acquires waveform information of the input residual vibration detection signal NVT and generates a waveform information signal WFS1 including the acquired waveform information.

[0039] Specifically, the waveform information output circuit 270-1 acquires the period of the residual vibration detection signal NVT as waveform information of the input residual vibration detection signal NVT by comparing the voltage value of the input residual vibration detection signal NVT with a predetermined reference voltage value. Furthermore, the waveform information output circuit 270-1 estimates and acquires the amplitude of the input residual vibration detection signal NVT as waveform information of the input residual vibration detection signal NVT based on the period of the acquired residual vibration detection signal NVT. The waveform information output circuit 270-1 may also acquire the period and amplitude of the residual vibration detection signal NVT as waveform information of the input residual vibration detection signal NVT by analog-to-digital conversion of the input residual vibration detection signal NVT. Furthermore, the waveform information output circuit 270-1 may acquire the attenuation rate of the frequency or amplitude as waveform information instead of or in addition to the period and amplitude of the residual vibration detection signal NVT. Then, the waveform information output circuit 270-1 generates a waveform information signal WFS1 including the acquired waveform information, and outputs it to the control circuit 100 that the drive module 10 has.

[0040] Similarly, the residual vibration detection signal NVT output by the print head 21-n is input to the waveform information output circuit 270-n. The waveform information output circuit 270-n acquires waveform information of the input residual vibration detection signal NVT and generates a waveform information signal WFSn including the acquired waveform information.

[0041] Specifically, the waveform information output circuit 270-n acquires the period of the residual vibration detection signal NVT as waveform information of the input residual vibration detection signal NVT by comparing the voltage value of the input residual vibration detection signal NVT with a predetermined reference voltage value. Furthermore, the waveform information output circuit 270-n acquires the amplitude of the input residual vibration detection signal NVT as waveform information of the input residual vibration detection signal NVT based on the acquired period of the residual vibration detection signal NVT. The waveform information output circuit 270-n may obtain the period and amplitude of the residual vibration detection signal NVT as waveform information of the input residual vibration detection signal NVT by analog-to-digital conversion of the input residual vibration detection signal NVT. The waveform information output circuit 270-n may also obtain the frequency and amplitude attenuation rate of the residual vibration detection signal NVT as waveform information. The waveform information output circuit 270-n then generates a waveform information signal WFSn including the obtained waveform information and outputs it to the control circuit 100 of the drive module 10.

[0042] Based on the input waveform information signals WFS1 to WFSn, the control circuit 100 determines whether the ink ejection state from each of the print heads 21-1 to 21-n is normal.

[0043] Here, waveform information output circuits 270-1 to 270-n may be configured as a single integrated circuit device or may be configured with discrete components. Furthermore, waveform information output circuit 270-1 may be implemented together with drive signal selection circuit 200 in an integrated circuit device that constitutes drive signal selection circuit 200 of print head 21-1, and waveform information output circuit 270-n may be implemented together with drive signal selection circuit 200 in an integrated circuit device that constitutes drive signal selection circuit 200 of print head 21-n.

[0044] As described above, in the liquid ejection device 1 of this embodiment, the ejection unit 5 includes a drive circuit 50 that outputs a drive voltage signal COM, and a control circuit 100 that determines the ink ejection state from the print head 21 based on the residual vibration detection signal NVT.

[0045] Here, print heads 21-1 to 21-n all have the same configuration, and when there is no need to distinguish between them, they may be simply referred to as print head 21. Furthermore, in the following description, print head 21 receives a clock signal SCK, a latch signal LAT, a change signal CH, a test timing signal TSIG, a print data signal SI as print data signals SI1 to SIn, a drive voltage signal COM, a reference voltage signal VBS, and a voltage signal VHV, and outputs a residual vibration detection signal NVT. The residual vibration detection signal NVT output by print head 21 is input to waveform information output circuit 270 as waveform information output circuits 270-1 to 270-n, which acquires waveform information of the input residual vibration detection signal NVT and generates waveform information signals WFS as waveform information signals WFS1 to WFSn based on the acquired waveform information, and outputs the waveform information signals WFS to control circuit 100 of drive module 10.

[0046] Furthermore, the ejection sections 600-1 to 600-m of the print head 21 all have the same configuration, and when there is no need to distinguish between them, they will be simply referred to as ejection section 600. That is, the print head 21 will be described as having a plurality of ejection sections 600, m in number. In this case, the description will be given assuming that the drive voltage signal Vin is supplied to the ejection sections 600 as drive voltage signals Vin-1 to Vin-m, and that the ejection sections 600 output residual vibration signals Vout as residual vibration signals Vout-1 to Vout-m.

[0047] 1.2 Configuration of the discharge section Next, we will explain an example of the configuration of the ejection section 600 of the head chip 22 of the print head 21. Fig. 3 is a diagram for explaining the schematic configuration of the ejection section 600. In addition to the ejection section 600, Fig. 3 also illustrates a nozzle plate 632, a reservoir 641, and a supply port 661.

[0048] 3, the ejection section 600 includes a piezoelectric element 60, a vibration plate 621, a pressure chamber 631, and a nozzle 651. The piezoelectric element 60 includes a piezoelectric body 601 and electrodes 611 and 612. The piezoelectric element 60 is configured such that the electrodes 611 and 612 are positioned so as to sandwich the piezoelectric body 601. The piezoelectric element 60 is configured as follows. The piezoelectric element 60 is driven so that its central portion is displaced up and down in accordance with the potential difference between the voltage supplied to the electrode 611 and the voltage supplied to the electrode 612. For example, a drive voltage signal Vin based on the drive voltage signal COM is supplied to the electrode 611, and a reference voltage signal VBS is supplied to the electrode 612. When the voltage value of the drive voltage signal Vin supplied to the electrode 611 changes, the potential difference between the drive voltage signal Vin supplied to the electrode 611 and the reference voltage signal VBS supplied to the electrode 612 changes. As a result, the piezoelectric element 60 is driven so that its central portion is displaced up and down. Alternatively, the drive voltage signal Vin based on the drive voltage signal COM may be supplied to the electrode 612, and the reference voltage signal VBS may be supplied to the electrode 611.

[0049] The diaphragm 621 is located below the piezoelectric element 60 in Fig. 3. In other words, the piezoelectric element 60 is formed on the upper surface of the diaphragm 621 in Fig. 3. Such a diaphragm 621 is displaced in the vertical direction as the piezoelectric element 60 is driven in the vertical direction.

[0050] A pressure chamber 631 is located below the diaphragm 621 in FIG. 3. Ink is supplied to the pressure chamber 631 from a reservoir 641. Furthermore, ink stored in the liquid container 3 is introduced into the reservoir 641 via a supply port 661. That is, the pressure chamber 631 is filled with ink stored in the liquid container 3. The internal volume of such a pressure chamber 631 expands or contracts in accordance with the vertical displacement of the diaphragm 621. That is, the pressure in the pressure chamber 631 changes in accordance with the vertical displacement of the diaphragm 621, and at this time, the diaphragm 621 functions as a diaphragm that changes the internal volume of the pressure chamber 631.

[0051] The nozzle 651 is an opening provided in the nozzle plate 632, and communicates with the pressure chamber 631. When the internal volume of the pressure chamber 631 changes, ink filled inside the pressure chamber 631 is ejected from the nozzle 651 in accordance with the change in the internal volume.

[0052] In the ejection section 600 configured as described above, when the piezoelectric element 60 is driven to bend upward, the vibration plate 621 is displaced upward. This causes the internal volume of the pressure chamber 631 to expand, and as a result, ink stored in the reservoir 641 is drawn into the pressure chamber 631. On the other hand, when the piezoelectric element 60 is driven to bend downward, the vibration plate 621 is displaced downward. This causes the internal volume of the pressure chamber 631 to contract, and as a result, an amount of ink corresponding to the degree of contraction of the internal volume of the pressure chamber 631 is ejected from the nozzle 651.

[0053] Furthermore, after the piezoelectric element 60 is driven to bend downward, damped vibration occurs in the pressure chamber 631. The damped vibration occurring in the pressure chamber 631 causes the vibration plate 621 to vibrate, which in turn causes the piezoelectric element 60 to vibrate. Then, as the piezoelectric element 60 vibrates in response to the vibration of the vibration plate 621, the piezoelectric element 60 outputs a residual vibration signal Vout based on the charge generated in response to the vibration.

[0054] That is, the ejection section 600 of the print head 21 of the liquid ejection device 1 of this embodiment has a pressure chamber 631 whose volume changes in response to the drive voltage signal COM, a nozzle 651 that communicates with the pressure chamber 631 and ejects ink, and a piezoelectric element 60 that outputs a residual vibration signal Vout in response to residual vibrations caused by the change in volume of the pressure chamber 631. At this time, the piezoelectric element 60 is displaced in response to the drive voltage signal COM, and the volume of the pressure chamber 631 changes due to the displacement of the piezoelectric element 60.

[0055] The piezoelectric element 60 is driven by the supply of a drive voltage signal Vin corresponding to the drive voltage signal COM, and is not limited to the structure shown in FIG. 3 as long as it has a structure that allows ink to be ejected from the nozzle 651 when driven.

[0056] 1.3 Configuration and operation of the drive signal selection circuit 1.3.1 Signal waveform of drive voltage signal COM Next, we will explain the configuration and operation of the drive signal selection circuit 200, which generates and outputs a corresponding drive voltage signal Vin to each of the multiple ejection sections 600 of the print head 21 by selecting or deselecting a signal waveform included in the drive voltage signal COM. Before explaining the details of the drive signal selection circuit 200, we will explain an example of the signal waveform of the drive voltage signal COM input to the drive signal selection circuit 200. Figure 4 is a diagram showing an example of the signal waveform of the drive voltage signal COM. As shown in Figure 4, the drive voltage signal COM includes a drive voltage signal ComA and a drive voltage signal ComB.

[0057] The drive voltage signal ComA includes signal waveforms for expressing four gradations of large dots LD, medium dots MD, small dots SD, and non-recording ND on the medium P. Specifically, the drive voltage signal ComA includes drive waveforms Adp1 and Adp2 as signal waveforms in a period t from when the latch signal LAT rises until the next rise of the latch signal LAT.

[0058] The drive waveform Adp1 is placed in a period tp1 within the cycle t, from the rising edge of the latch signal LAT to the rising edge of the change signal CH. The drive waveform Adp1 starts at a voltage Vc, changes to drive the piezoelectric element 60, and then ends at a voltage Vc. When this drive waveform Adp1 is supplied to one end of the piezoelectric element 60, a predetermined amount of ink is ejected from the corresponding nozzle 651.

[0059] The drive waveform Adp2 is placed in a period tp2 within the cycle t, from the rising edge of the change signal CH to the rising edge of the latch signal LAT. The drive waveform Adp2 starts at a voltage Vc, changes to drive the piezoelectric element 60, and then ends at a voltage Vc. When this drive waveform Adp2 is supplied to one end of the piezoelectric element 60, a smaller amount of ink than a predetermined amount is ejected from the corresponding nozzle 651.

[0060] In the following description, the predetermined amount of ink ejected from the corresponding nozzle 651 when the drive waveform Adp1 is supplied to one end of the piezoelectric element 60 may be referred to as a medium amount, and the amount of ink smaller than the predetermined amount ejected from the corresponding nozzle 651 when the drive waveform Adp2 is supplied to one end of the piezoelectric element 60 may be referred to as a small amount.

[0061] The drive voltage signal ComB includes a signal waveform for performing a state inspection CD of the nozzle 651 to be inspected among the multiple nozzles 651. Specifically, the drive voltage signal ComB includes drive waveforms Bdp1, Bdp2, and Bdp3 as signal waveforms in a period t.

[0062] The drive waveform Bdp1 is placed in a period ts1 within the cycle t, from the rising edge of the latch signal LAT to the rising edge of the test timing signal TSIG. The drive waveform Bdp1 starts at a voltage Vc, changes to drive the piezoelectric element 60, and then ends at a voltage Vd. When this drive waveform Bdp1 is supplied to one end of the piezoelectric element 60, ink is not ejected from the corresponding nozzle 651, and the piezoelectric element 60 is driven so as to generate a predetermined residual vibration in the corresponding ejection section 600.

[0063] The drive waveform Bdp2 is placed in period ts2, which is the period from the rising edge of the test timing signal TSIG that defines the end of period ts1 to the rising edge of the next test timing signal TSIG within the cycle t. The drive waveform Bdp2 has a constant voltage value of Vd. When this drive waveform Bdp2 is supplied to one end of a piezoelectric element 60, the piezoelectric element 60 is not driven, and therefore, ink is not ejected from the corresponding nozzle 651.

[0064] The drive waveform Bdp3 is a test timing signal that defines the end of the period ts2 within the cycle t. It is placed in the period ts3 from the rising edge of TSIG to the rising edge of the next latch signal LAT. The drive waveform Bdp3 starts at a voltage Vd and then ends when the voltage reaches Vc. When this drive waveform Bdp3 is supplied to one end of a piezoelectric element 60, the piezoelectric element 60 is not driven, and therefore ink is not ejected from the corresponding nozzle 651.

[0065] That is, the drive circuit 50 outputs to the drive signal selection circuit 200 a drive voltage signal COM including a drive voltage signal ComA including drive waveforms Adp1 and Adp2 for expressing four gradations of large dots LD, medium dots MD, small dots SD, and non-printing ND on the medium P, and a drive voltage signal ComB including drive waveforms Bdp1, Bdp2, and Bdp3 for performing a status inspection CD of the ejection section 600 including the nozzle 651 to be inspected.

[0066] Note that the signal waveform of the drive voltage signal COM shown in Figure 4 is an example, and the drive voltage signal COM may include signal waveforms of various shapes depending on the type of medium P on which the ink lands, the characteristics of the ink being ejected, etc.

[0067] 1.3.2 Drive signal selection circuit configuration A specific example of the configuration of the drive signal selection circuit 200 will be described. Fig. 5 is a diagram showing an example of the functional configuration of the drive signal selection circuit 200. Fig. 5 also shows m ejection units 600, ejection units 600-1 to 600-m, which are driven by the drive voltage signal Vin output by the drive signal selection circuit 200. As shown in Fig. 5, the drive signal selection circuit 200 includes a selection control circuit 220, m selection circuits 230, a switching circuit 240, and a residual vibration detection circuit 250.

[0068] The clock signal SCK, print data signal SI, latch signal LAT, change signal CH, test timing signal TSIG, and voltage signal VHV are input to the selection control circuit 220. Based on the input clock signal SCK, print data signal SI, latch signal LAT, change signal CH, test timing signal TSIG, and voltage signal VHV, the selection control circuit 220 outputs selection signals Sa, Sb, and Sc of predetermined logic levels during periods tp1, tp2, ts1, ts2, and ts3, respectively.

[0069] The selection control circuit 220 has a set of a register 222, a latch circuit 224, and a decoder 226 provided in correspondence with each of the ejection units 600-1 to 600-m of the print head 21. In other words, the selection control circuit 220 has at least m sets of registers 222, latch circuits 224, and decoders 226.

[0070] The print data signal SI includes 3-bit print data SId[SIH, SIM, SIL] serially corresponding to each of the m ejection units 600, for selecting which dot to form on the medium P (large dot LD, medium dot MD, small dot SD, or non-printing ND), or whether to execute a status inspection CD that inspects the ink ejection status from the ejection units 600. In other words, the print data signal SI is a serial signal of at least 3m bits.

[0071] The print data signal SI is input to the selection control circuit 220 in synchronization with the clock signal SCK. The m registers 222 included in the selection control circuit 220 hold the 3-bit print data SId [SIH, SIM, SIL] included in the input print data signal SI, corresponding to the ejection sections 600-1 to 600-m.

[0072] Specifically, the m registers 222 correspond to the ejection sections 600-1 to 600-m, respectively, and are connected in cascade. The print data signal SI input to the selection control circuit 220 is , and are sequentially transferred to the subsequent stages of the m cascaded registers 222 in synchronization with the clock signal SCK. In other words, the m registers 222 form a shift register. When the supply of the clock signal SCK to the selection control circuit 220 is stopped, the m registers 222 hold the 3-bit print data SId[SIH, SIM, SIL] corresponding to the ejection sections 600-1 to 600-m. In the following description, in order to distinguish between the m cascaded registers 222, they may be referred to as stage 1, stage 2, ..., stage m, in order from the upstream side to the downstream side where the print data signal SI is supplied.

[0073] Each of the m latch circuits 224 simultaneously latches the 3-bit print data SId [SIH, SIM, SIL] held in the corresponding register 222 at the rising edge of the latch signal LAT.

[0074] The print data SId[SIH, SIM, SIL] latched by the m latch circuits 224 is input to the corresponding decoders 226. Each of the m decoders 226 decodes the input print data SId[SIH, SIM, SIL] to generate selection signals Sa, Sb, Sc of logic levels corresponding to large dots LD, medium dots MD, small dots SD, non-printing ND, and status inspection CD.

[0075] Fig. 6 is a diagram showing an example of the decoded content in decoder 226. As shown in Fig. 6, when print data SId[SIH,SIM,SIL]=[1,1,0] corresponding to large dots LD is input, decoder 226 sets the logic level of selection signal Sa to H,H levels during periods tp1 and tp2, sets the logic level of selection signal Sb to L,L,L levels during periods ts1, ts2, and ts3, and sets the logic level of selection signal Sc to L,L,L levels during periods ts1, ts2, and ts3.

[0076] Furthermore, when print data SId[SIH,SIM,SIL]=[1,0,0] corresponding to a medium dot MD is input, the decoder 226 sets the logic level of the selection signal Sa to H,L levels during periods tp1, tp2, sets the logic level of the selection signal Sb to L,L,L levels during periods ts1, ts2, ts3, and sets the logic level of the selection signal Sc to L,L,L levels during periods ts1, ts2, ts3.

[0077] Furthermore, when print data SId[SIH, SIM, SIL]=[0, 1, 0] corresponding to a small dot SD is input, the decoder 226 sets the logic level of the selection signal Sa to L, H levels during periods tp1, tp2, the logic level of the selection signal Sb to L, L, L levels during periods ts1, ts2, ts3, and the logic level of the selection signal Sc to L, L, L levels during periods ts1, ts2, ts3.

[0078] Furthermore, when print data SId[SIH, SIM, SIL]=[0,0,0] corresponding to non-recording ND is input, the decoder 226 sets the logic level of the selection signal Sa to L,L levels during periods tp1 and tp2, sets the logic level of the selection signal Sb to L,L,L levels during periods ts1, ts2, and ts3, and sets the logic level of the selection signal Sc to L,L,L levels during periods ts1, ts2, and ts3.

[0079] Furthermore, when print data SId[SIH, SIM, SIL]=[1,1,1] corresponding to status inspection CD is input, the decoder 226 sets the logic level of selection signal Sa to L, L levels during periods tp1 and tp2, sets the logic level of selection signal Sb to H, L, H levels during periods ts1, ts2, and ts3, and sets the logic level of selection signal Sc to L, H, L levels during periods ts1, ts2, and ts3.

[0080] As described above, the decoder 226 generates the data based on the print data SId [SIH, SIM, SIL]. Based on this, it generates selection signals Sa, Sb, Sc of logic levels according to the amount of ink ejected from the corresponding ejection section 600. At this time, the selection signals Sa, Sb, Sc output by the decoder 226 are high-amplitude logic signals that have been level-shifted by a level shifter (not shown), with the L level being the ground potential and the H level being the voltage value of the voltage signal VHV.

[0081] The selection control circuit 220 outputs the selection signals Sa, Sb, and Sc output by the decoder 226 to the corresponding selection circuits 230 , and outputs the selection signal Sc output by the decoder 226 to the switching circuit 240 .

[0082] 7 is a diagram showing an example of the circuit configuration of the selection circuit 230, switching circuit 240, and residual vibration detection circuit 250 included in the drive signal selection circuit 200. The drive signal selection circuit 200 has m selection circuits 230 corresponding to the m piezoelectric elements 60. All of the m selection circuits 230 have the same configuration, and in FIG. 7, only the circuit configuration of the selection circuit 230 corresponding to the ejection unit 600-1 is shown, and the circuit configurations of the selection circuits 230 corresponding to the other ejection units 600 are not shown.

[0083] The selection circuit 230 includes logic inversion circuits 232a and 232b and switch circuits 234a, 234b, and 234c.

[0084] The switch circuit 234a includes an n-type transistor 236a and a p-type transistor 238a. One end of the n-type transistor 236a is electrically connected to one end of the p-type transistor 238a, and the other end of the n-type transistor 236a is electrically connected to the other end of the p-type transistor 238a. A drive voltage signal ComA is supplied to a connection point electrically connecting one end of the n-type transistor 236a and one end of the p-type transistor 238a, and a connection point electrically connecting the other end of the n-type transistor 236a and the other end of the p-type transistor 238a is electrically connected to one end of the piezoelectric element 60 included in the ejection unit 600-1. A selection signal Sa is supplied to a gate terminal, which is a control terminal of the n-type transistor 236a, and a signal obtained by inverting the logic level of the selection signal Sa by a logic inverter circuit 232a is supplied to a gate terminal, which is a control terminal of the p-type transistor 238a. That is, the switch circuit 234a constitutes a transmission gate.

[0085] In the following description, the connection point where one end of n-type transistor 236a and one end of p-type transistor 238a are electrically connected may be referred to as one end of switch circuit 234a, and the connection point where the other end of n-type transistor 236a and the other end of p-type transistor 238a are electrically connected may be referred to as the other end of switch circuit 234a.

[0086] When an H-level selection signal Sa is input to the switch circuit 234a configured as described above, one end and the other end are controlled to be conductive. As a result, the switch circuit 234a supplies the drive voltage signal ComA to one end of the piezoelectric element 60. On the other hand, when an L-level selection signal Sa is input to the switch circuit 234a, one end and the other end are controlled to be non-conductive. As a result, the switch circuit 234a does not supply the drive voltage signal ComA to one end of the piezoelectric element 60. In other words, the switch circuit 234a switches whether or not to supply the drive voltage signal ComA to the piezoelectric element 60 based on the logic level of the selection signal Sa.

[0087] The switch circuit 234b includes an n-type transistor 236b and a p-type transistor 238b. One end of the n-type transistor 236b is electrically connected to one end of the p-type transistor 238b, and the other end of the n-type transistor 236b is electrically connected to the other end of the p-type transistor 238b. A drive voltage signal ComB is supplied to the connection point where one end of the n-type transistor 236b and one end of the p-type transistor 238b are electrically connected. The connection point where the other end of n-type transistor 236b and the other end of p-type transistor 238b are electrically connected is electrically connected to one end of piezoelectric element 60 included in discharge section 600-1. A selection signal Sb is supplied to the gate terminal which is the control terminal of n-type transistor 236b, and a signal obtained by inverting the logic level of selection signal Sb by logic inverter circuit 232b is supplied to the gate terminal which is the control terminal of p-type transistor 238b. In other words, switch circuit 234b configures a transmission gate.

[0088] In the following description, the connection point where one end of n-type transistor 236b and one end of p-type transistor 238b are electrically connected may be referred to as one end of switch circuit 234b, and the connection point where the other end of n-type transistor 236b and the other end of p-type transistor 238b are electrically connected may be referred to as the other end of switch circuit 234b.

[0089] When an H-level selection signal Sb is input to the switch circuit 234b configured as described above, one end and the other end are controlled to be conductive. As a result, the switch circuit 234b supplies the drive voltage signal ComB to one end of the piezoelectric element 60. On the other hand, when an L-level selection signal Sb is input to the switch circuit 234b, one end and the other end are controlled to be non-conductive. As a result, the switch circuit 234b does not supply the drive voltage signal ComB to one end of the piezoelectric element 60. In other words, the switch circuit 234b switches whether or not to supply the drive voltage signal ComB to the piezoelectric element 60 based on the logic level of the selection signal Sb.

[0090] The switch circuit 234c includes an n-type transistor 236c. One end of the n-type transistor 236c is electrically connected to one end of the residual vibration detection circuit 250, and the other end of the n-type transistor 236c is electrically connected to one end of the piezoelectric element 60 included in the discharge section 600-1. A selection signal Sc is supplied to the gate terminal, which is the control terminal of the n-type transistor 236b. In the following description, one end of the n-type transistor 236c may be referred to as one end of the switch circuit 234b, and the other end of the n-type transistor 236c may be referred to as the other end of the switch circuit 234b.

[0091] When an H-level selection signal Sc is input to the switch circuit 234c configured as described above, one end and the other end are controlled to be conductive. As a result, the switch circuit 234c outputs the residual vibration signal Vout-1 output by the piezoelectric element 60 included in the ejection section 600-1 to the residual vibration detection circuit 250. On the other hand, when an L-level selection signal Sc is input to the switch circuit 234c, one end and the other end are controlled to be non-conductive. As a result, the switch circuit 234c does not output the residual vibration signal Vout-1 output by the piezoelectric element 60 included in the ejection section 600-1 to the residual vibration detection circuit 250. In other words, the switch circuit 234c switches whether or not to output the residual vibration signal Vout to the residual vibration detection circuit 250.

[0092] Here, the other ends of the switch circuits 234c included in each of the m selection circuits 230 corresponding to the respective dischargers 600-1 to 600-m are connected in common and then electrically connected to the residual vibration detection circuit 250. In other words, the residual vibration signals Vout-1 to Vout-m output by each of the m selection circuits 230 corresponding to the respective dischargers 600-1 to 600-m propagate through a common wiring pattern and are input to the residual vibration detection circuit 250. In the following description, the residual vibration signals Vout-1 to Vout-m input to the residual vibration detection circuit 250 may be referred to as residual vibration signals dVout.

[0093] The selection circuit 230 configured as above selects or deselects the signal waveforms of the drive voltage signals ComA and ComB based on the selection signals Sa and Sb, thereby generating the drive voltage signal Vin and supplying it to one end of the piezoelectric element 60, and also switches whether or not to acquire the residual vibration signal Vout generated in the corresponding ejection part 600 based on the selection signal Sc. Here, in the following description, a state in which one end and the other end of the switch circuit 234a are controlled to be conductive, A state in which one end and the other end of the switch circuit 234b are connected electrically, and a state in which one end and the other end of the switch circuit 234c are controlled to be connected electrically, may be referred to as "on", and a state in which one end and the other end of the switch circuit 234a are controlled to be non-conductive, a state in which one end and the other end of the switch circuit 234b are controlled to be non-conductive, and a state in which one end and the other end of the switch circuit 234c are controlled to be non-conductive, may be referred to as "off".

[0094] That is, the selection circuit 230 has a switch circuit 234a that switches whether or not the drive voltage signal ComA is supplied to one end of the piezoelectric element 60 included in the discharge section 600, a switch circuit 234b that switches whether or not the drive voltage signal ComB is supplied to one end of the piezoelectric element 60 included in the discharge section 600, and a switch circuit 234c that switches whether or not the residual vibration signal Vout output by the piezoelectric element 60 of the discharge section 600 is supplied to the residual vibration detection circuit 250. In this case, in the liquid discharger 1 of this embodiment, the switch circuit 234a is a transmission gate including an n-type transistor 236a that is an N-channel transistor and a p-type transistor 238a that is a P-channel transistor, the switch circuit 234b is a transmission gate including an n-type transistor 236b that is an N-channel transistor and a p-type transistor 238b that is a P-channel transistor, and the switch circuit 234c is an n-type transistor 236c that is an N-channel transistor.

[0095] In other words, the selection circuit 230 has an n-type transistor 236a and a p-type transistor 238a that switch whether or not the drive voltage signal ComA is supplied to one end of the piezoelectric element 60 included in the discharge section 600, an n-type transistor 236b and a p-type transistor 238b that switch whether or not the drive voltage signal ComB is supplied to one end of the piezoelectric element 60 included in the discharge section 600, and an n-type transistor 236c that switches whether or not the residual vibration signal Vout output by the piezoelectric element 60 of the discharge section 600 is supplied to the residual vibration detection circuit 250.

[0096] The switching circuit 240 includes a switch circuit 242 and an OR circuit 244. The switch circuit 242 also includes an n-type transistor 242a.

[0097] The OR circuit 244 receives the selection signal Sc output by the decoder 226 corresponding to each of the discharge units 600-1 to 600-m. The OR circuit 244 also outputs a switch control signal SS to the control terminal, which is the gate terminal, of the n-type transistor 242a. One end of the n-type transistor 242a is electrically connected to the wiring pattern through which the drive voltage signal ComB propagates, and the other end is electrically connected to the residual vibration detection circuit 250.

[0098] In the switching circuit 240 configured as described above, when any of the selection signals Sc output by the decoders 226 corresponding to the respective discharge units 600-1 to 600-m is at H level, the OR circuit 244 outputs an H-level switch control signal SS, and the n-type transistor 242a is controlled to be conductive between its one end and the other end by receiving the H-level switch control signal SS from the switching circuit 240. As a result, the switching circuit 240 outputs the drive voltage signal ComB to the residual vibration detection circuit 250 as the drive voltage signal bCom.

[0099] That is, the switching circuit 240 switches, depending on the logic level of the selection signal Sc, whether to output the drive voltage signal ComB as the drive voltage signal bCom to the residual vibration detection circuit 250. In other words, the switching circuit 240 includes an n-type transistor 242a, which is an N-channel transistor, that switches whether to supply the drive voltage signal ComB to the residual vibration detection circuit 250.

[0100] The residual vibration detection circuit 250 includes resistors R1, R2, R3, R4, R5, R6, and R7, capacitors C1 and C2, a power supply circuit PW1, and an amplifier circuit OP1.

[0101] The drive voltage signal bCom output by the switching circuit 240 is supplied to one end of the resistor R1, and the residual vibration signals dVout output from the m selection circuits 230 are supplied to the other end of the resistor R2.

[0102] One end of the resistor R1 is electrically connected to one end of the capacitor C1. The other end of the capacitor C1 is electrically connected to one end of the resistor R2. The other end of the resistor R2 is supplied with ground potential. In other words, the capacitor C1 and the resistor R2 form a high-pass filter circuit. The output of the high-pass filter circuit formed by the capacitor C1 and the resistor R2, the other end of the capacitor C1 and one end of the resistor R2, are electrically connected to one end of the resistor R3. The other end of the resistor R3 is electrically connected to one end of the resistor R4 and to the negative input terminal of the amplifier circuit OP1. The other end of the resistor R4 is electrically connected to the output terminal of the amplifier circuit OP1.

[0103] The other end of resistor R1 is electrically connected to one end of capacitor C2. The other end of capacitor C2 is electrically connected to one end of resistor R5. The other end of resistor R5 is supplied with ground potential. In other words, capacitor C2 and resistor R5 form a high-pass filter circuit. The output of the high-pass filter circuit formed by capacitor C2 and resistor R5, the other end of capacitor C2 and one end of resistor R5, are electrically connected to one end of resistor R6. The other end of resistor R6 is electrically connected to one end of resistor R7 and to the positive input terminal of amplifier circuit OP1. The other end of resistor R7 is electrically connected to the positive terminal of power supply circuit PW1, and ground potential is supplied to the negative terminal of power supply circuit PW1.

[0104] In the residual vibration detection circuit 250 configured as described above, a signal in which the DC component of the drive voltage signal bCom has been reduced by a high-pass filter circuit configured with capacitor C1 and resistor R2 is input to the negative input terminal of amplifier circuit OP1, and a signal in which the bias voltage signal VB output by power supply circuit PW1 is superimposed on the signal in which the DC component included in the residual vibration signal dVout has been reduced by a high-pass filter circuit configured with capacitor C2 and resistor R4 is input to the positive input terminal of amplifier circuit OP1. Then, amplifier circuit OP1 outputs a signal in which the difference between the signal input to the negative input terminal and the signal input to the positive input terminal is amplified by an amplification factor determined by the resistance values ​​of resistors R4 and R3, and voltage vb, which is the voltage value of the bias voltage signal VB, is added to the amplified signal as residual vibration detection signal NVT. That is, the residual vibration detection circuit 250 outputs a signal that corresponds to the difference between the drive voltage signal bCom and the residual vibration signal dVout, and corresponds to the potential difference across the resistor R1, as the residual vibration detection signal NVT.

[0105] That is, the residual vibration detection circuit 250 has a resistor R1 having one end electrically connected to one end of the n-type transistor 236c and the other end electrically connected to one end of the n-type transistor 242a, and an amplifier circuit OP1 that amplifies the potential difference between one end and the other end of the resistor R1, and outputs a residual vibration detection signal NVT that corresponds to the input residual vibration signal Vout, and that corresponds to the difference between the residual vibration signal Vout input via the n-type transistor 236c and the drive voltage signal ComB input via the n-type transistor 242a.

[0106] The operation of the drive signal selection circuit 200 configured as above will now be described in detail. Fig. 8 is a diagram showing an example of the operation of the drive signal selection circuit 200. The print data signal SI is supplied serially to the drive signal selection circuit 200 in synchronization with the clock signal SCK. The print data signal SI input to the drive signal selection circuit 200 is transferred sequentially to the subsequent register 222 in synchronization with the clock signal SCK. Then, when the supply of the clock signal SCK to the drive signal selection circuit 200 is stopped, each of the m registers 222 receives m data. The 3-bit print data SId [SIH, SIM, SIL] corresponding to the ejection section 600 is held.

[0107] Thereafter, when the latch signal LAT rises, the latch circuits 224 simultaneously latch the print data SId[SIH, SIM, SIL] held in the registers 222. Here, LT1, LT2, ..., LTm shown in Figure 8 indicate the print data SId[SIH, SIM, SIL] held in the 1st, 2nd, ..., mth stages of the registers 222 and latched by the corresponding latch circuits 224.

[0108] The print data SId[SIH, SIM, SIL] latched by the latch circuit 224 is input to the decoder 226. The decoder 226 decodes the input print data SId[SIH, SIM, SIL] as shown in Fig. 6, and outputs selection signals Sa, Sb, and Sc of a predetermined logic level in a cycle t.

[0109] Specifically, when print data SId[SIH,SIM,SIL]=[1,1,0] is input, decoder 226 sets the logic level of selection signal Sa to H,H levels during periods tp1 and tp2, sets the logic level of selection signal Sb to L,L,L levels during periods ts1, ts2, and ts3, and sets the logic level of selection signal Sc to L,L,L levels during periods ts1, ts2, and ts3. As a result, during period tp1, switch circuit 234a is controlled to be ON, switch circuit 234b is controlled to be OFF, and switch circuit 234c is controlled to be OFF. Therefore, during period tp1, selection circuit 230 selects drive waveform Adp1 and outputs it as drive voltage signal Vin. During period tp2, switch circuit 234a is controlled to be ON, switch circuit 234b is controlled to be OFF, and switch circuit 234c is controlled to be OFF. Therefore, during the period tp2, the selection circuit 230 selects the drive waveform Adp2 and outputs it as the drive voltage signal Vin.

[0110] That is, when print data SId[SIH,SIM,SIL]=[1,1,0] is input to the decoder 226, the corresponding selection circuit 230 supplies, to the piezoelectric element 60 included in the corresponding ejection unit 600, a drive voltage signal Vin in which drive waveforms Adp1 and Adp2 are consecutive during period t, and which corresponds to the large dot LD shown in FIG. 8. This causes the nozzle 651 included in the corresponding ejection unit 600 to eject a medium amount of ink during period tp1, and a small amount of ink during period tp2. As a result, during period t, the medium amount of ink and the small amount of ink land on the medium P and combine to form a large dot LD on the medium P.

[0111] Furthermore, when print data SId[SIH,SIM,SIL]=[1,0,0] is input, decoder 226 sets the logic levels of selection signal Sa to H,L levels during periods tp1 and tp2, sets the logic levels of selection signal Sb to L,L,L levels during periods ts1, ts2, and ts3, and sets the logic levels of selection signal Sc to L,L,L levels during periods ts1, ts2, and ts3. As a result, during period tp1, switch circuit 234a is controlled to be ON, switch circuit 234b is controlled to be OFF, and switch circuit 234c is controlled to be OFF. Therefore, during period tp1, selection circuit 230 selects drive waveform Adp1 and outputs it as drive voltage signal Vin. During period tp2, switch circuit 234a is controlled to be OFF, switch circuit 234b is controlled to be OFF, and switch circuit 234c is controlled to be OFF. Therefore, the selection circuit 230 does not select any of the drive waveforms Adp1, Adp2, Bdp1, Bdp2, or Bdp3 during the period tp2. At this time, the voltage Vc held by the capacitive component of the corresponding piezoelectric element 60 is supplied to the corresponding piezoelectric element 60.

[0112] That is, the decoder 226 receives the print data SId[SIH, SIM, SIL]=[1, When [0,0] is input, the corresponding selection circuit 230 supplies the piezoelectric element 60 included in the corresponding ejection unit 600 with a drive voltage signal Vin that is a sequence of a drive waveform Adp1 and a signal waveform with a constant voltage Vc during a period t, which corresponds to a medium dot MD shown in FIG. 8. This causes the nozzle 651 included in the corresponding ejection unit 600 to eject a medium amount of ink during a period tp1, and no ink is ejected during a period tp2. As a result, a medium amount of ink lands on the medium P during the period t, and a medium dot MD is formed on the medium P.

[0113] Furthermore, when print data SId[SIH, SIM, SIL]=[0, 1, 0] is input, the decoder 226 sets the logic level of the selection signal Sa to L, H levels during periods tp1 and tp2, sets the logic level of the selection signal Sb to L, L, L levels during periods ts1, ts2, and ts3, and sets the logic level of the selection signal Sc to L, L, L levels during periods ts1, ts2, and ts3. As a result, during period tp1, the switch circuit 234a is controlled to be OFF, the switch circuit 234b is controlled to be OFF, and the switch circuit 234c is controlled to be OFF. Therefore, during period tp1, the selection circuit 230 does not select any of the drive waveforms Adp1, Adp2, Bdp1, Bdp2, or Bdp3. At this time, the voltage Vc maintained by the capacitive component of the corresponding piezoelectric element 60 is supplied to the corresponding piezoelectric element 60. Furthermore, during period tp2, switch circuit 234a is controlled to be on, switch circuit 234b is controlled to be off, and switch circuit 234c is controlled to be off. Therefore, during period tp2, selection circuit 230 selects drive waveform Adp2 and outputs it as drive voltage signal Vin.

[0114] That is, when print data SId[SIH,SIM,SIL]=[0,1,0] is input to the decoder 226, the corresponding selection circuit 230 supplies, to the piezoelectric element 60 included in the corresponding ejection unit 600, a drive voltage signal Vin in which a signal waveform with a constant voltage value of Vc and a drive waveform Adp2 are consecutive during a period t, and which corresponds to the small dot SD shown in FIG. 8. As a result, no ink is ejected from the nozzle 651 included in the corresponding ejection unit 600 during a period tp1, and a small amount of ink is ejected during a period tp2. As a result, a small amount of ink lands on the medium P during the period t, forming a small dot SD on the medium P.

[0115] Furthermore, when print data SId[SIH, SIM, SIL]=[0,0,0] is input, the decoder 226 sets the logic level of the selection signal Sa to L,L levels during periods tp1 and tp2, sets the logic level of the selection signal Sb to L,L,L levels during periods ts1, ts2, and ts3, and sets the logic level of the selection signal Sc to L,L,L levels during periods ts1, ts2, and ts3. As a result, during period tp1, the switch circuit 234a is controlled to be OFF, the switch circuit 234b is controlled to be OFF, and the switch circuit 234c is controlled to be OFF. Therefore, during period tp1, the selection circuit 230 does not select any of the drive waveforms Adp1, Adp2, Bdp1, Bdp2, or Bdp3. At this time, the voltage Vc maintained by the capacitive component of the corresponding piezoelectric element 60 is supplied to the corresponding piezoelectric element 60. During period tp2, switch circuit 234a is controlled to be off, switch circuit 234b is controlled to be off, and switch circuit 234c is controlled to be off. Therefore, during period tp2, selection circuit 230 does not select any of drive waveforms Adp1, Adp2, Bdp1, Bdp2, or Bdp3. At this time, voltage Vc held by the capacitive component of the corresponding piezoelectric element 60 is supplied to the corresponding piezoelectric element 60.

[0116] That is, when print data SId[SIH, SIM, SIL]=[0,0,0] is input to the decoder 226, the corresponding selection circuit 230 supplies the piezoelectric element 60 included in the corresponding ejection section 600 with a drive voltage signal Vin having a constant signal waveform with a voltage value of Vc in a period t, which corresponds to the non-printing ND shown in FIG. As a result, no ink is ejected from the nozzle 651 included in the corresponding ejection unit 600 during period tp1, and no ink is ejected during period tp2 either. As a result, no ink lands on the medium P during the cycle t, and no dots are formed on the medium P.

[0117] Furthermore, when print data SId[SIH, SIM, SIL]=[1,1,1] is input, the decoder 226 sets the logic level of the selection signal Sa to L, L levels during periods tp1 and tp2, sets the logic level of the selection signal Sb to H, L, H levels during periods ts1, ts2, and ts3, and sets the logic level of the selection signal Sc to L, H, L levels during periods ts1, ts2, and ts3. As a result, during period ts1, the switch circuit 234a is controlled to be OFF, the switch circuit 234b is controlled to be ON, and the switch circuit 234c is controlled to be OFF. Therefore, during period ts1, the selection circuit 230 selects the drive waveform Bdp1 and outputs it as the drive voltage signal Vin. During period ts2, the switch circuit 234a is controlled to be OFF, the switch circuit 234b is controlled to be OFF, and the switch circuit 234c is controlled to be ON. Therefore, during period tp2, after the piezoelectric element 60 is driven by the drive waveform Bdp1, the selection circuit 230 acquires a residual vibration signal Vout corresponding to the residual vibration generated in the corresponding ejection portion 600. Furthermore, during period ts3, the switch circuit 234a is controlled to be off, the switch circuit 234b is controlled to be on, and the switch circuit 234c is controlled to be off. Therefore, during period ts3, the selection circuit 230 selects the drive waveform Bdp3 and outputs it as the drive voltage signal Vin.

[0118] That is, when print data SId[SIH,SIM,SIL]=[1,1,1] is input to the decoder 226, the corresponding selection circuit 230 supplies a drive voltage signal Vin to the piezoelectric element 60 during period ts1, driving the piezoelectric element 60 so that ink is not ejected from the nozzle 651 included in the corresponding ejection section 600 and a predetermined residual vibration is generated in the corresponding ejection section 600, acquires the residual vibration signal Vout output by the corresponding piezoelectric element 60 during period ts2, and supplies a drive voltage signal Vin to the piezoelectric element 60 so that the displacement of the piezoelectric element 60 is in a steady state during period ts3.

[0119] The residual vibration signal Vout acquired by the selection circuit 230 during period ts2 and corresponding to the residual vibration occurring in the corresponding ejection section 600 is output as a residual vibration signal dVout to the residual vibration detection circuit 250. Furthermore, during period tp2, the H-level selection signal Sc output by the decoder 226 is also input to the switching circuit 240. As a result, the switching circuit 240 outputs the drive waveform Bdp2, which is the drive voltage signal ComB during period tp2, as the drive voltage signal bCom to the residual vibration detection circuit 250. The residual vibration detection circuit 250 then outputs a signal obtained by amplifying the difference between the residual vibration signal dVout and the drive voltage signal bCom and adding a voltage vb, which is the voltage value of the bias voltage signal VB, to the signal, as the residual vibration detection signal NVT.

[0120] The residual vibration detection signal NVT output by the residual vibration detection circuit 250 is input to the waveform information output circuit 270 described above. The waveform information output circuit 270 acquires the period and amplitude of the residual vibration detection signal NVT as waveform information of the input residual vibration detection signal NVT, generates a waveform information signal WFS including the acquired waveform information, and outputs it to the control circuit 100. Then, based on the waveform information signal WFS including the input waveform information, the control circuit 100 determines the ink ejection state from the ejection module 20, that is, the ink ejection state from the ejection unit 600 including the piezoelectric element 60 that output the residual vibration signal Vout. In other words, when print data SId[SIH, SIM, SIL]=[1,1,1] is input to the decoder 226, a status inspection CD is executed to inspect the ink ejection state from the corresponding ejection unit 600.

[0121] Here, the residual vibration signal Vout acquired by the selection circuit 230 during the period ts2 and the residual vibration signal dVout input to the residual vibration detection circuit 250 during the period ts2 is The signal is a signal in which the charge output by the piezoelectric element 60 in response to the residual vibration generated in the corresponding discharge section 600 is superimposed on the voltage Vd, which is the voltage value of the drive waveform Bdp1 supplied to the piezoelectric element 60 immediately before the period ts2. During the period ts2, the drive voltage signal ComB as the drive voltage signal bCom output by the switching circuit 240 has the drive waveform Bdp2 and is a signal with a constant voltage value of voltage Vd. That is, during the period ts2, the residual vibration detection circuit 250 extracts and amplifies the signal generated by the charge output by the piezoelectric element 60 in response to the residual vibration generated in the discharge section 600, and adds the voltage vb, which is the voltage value of the bias voltage signal VB, to generate the residual vibration detection signal NVT. In other words, the residual vibration detection circuit 250 shapes the signal waveform of the residual vibration signal Vout output in response to the residual vibration generated in the corresponding discharge section 600, and outputs the residual vibration detection signal NVT in response to the residual vibration generated in the discharge section 600.

[0122] As a result, in the residual vibration detection circuit 250 of this embodiment, the influence of noise that may be superimposed on the drive voltage signal ComB is reduced. Therefore, the accuracy of the residual vibration detection signal NVT output by the residual vibration detection circuit 250 is improved. As a result, the accuracy of determining the ink ejection state from the ejection module 20 in the control circuit 100, that is, the accuracy of determining the ink ejection state from the ejection unit 600 including the piezoelectric element 60 that outputs the residual vibration signal Vout, is improved.

[0123] As described above, the drive signal selection circuit 200 forms multi-tone dots on the medium P by controlling the amount of ink ejected from the corresponding ejection section 600 for each period t based on the logical level of the print data SId[SIH, SIM, SIL] serially included in the print data signal SI input in synchronization with the clock signal SCK, and also acquires a residual vibration signal Vout corresponding to the residual vibration generated in the corresponding ejection section 600, and outputs a residual vibration detection signal NVT corresponding to the acquired residual vibration signal Vout.

[0124] Here, when the selection circuit 230 acquires the residual vibration signal Vout, the voltage value of the residual vibration signal Vout during the period when the n-type transistor 236c is controlled to be on and the n-type transistor 236c outputs the residual vibration signal Vout to the residual vibration detection circuit 250, i.e., during the period ts2, is preferably smaller than the voltage value of the selection signal Sc input to the gate terminal, which is the control terminal of the n-type transistor 236c, minus the threshold voltage at which the n-type transistor 236c is controlled to be on and which switches whether the n-type transistor 236c supplies the residual vibration signal Vout to the residual vibration detection circuit 250. In other words, the voltage Vd of the drive voltage signal ComB during the period ts2, which is the voltage value of the drive waveform Bdp2, is preferably smaller than the voltage value of the voltage signal VHV, which is the voltage value of the selection signal Sc, minus the threshold voltage of the n-type transistor 236c.

[0125] The voltage value associated with the charge output by the piezoelectric element 60 in response to the residual vibration generated in the discharge portion 600, which is superimposed on the drive waveform Bdp2 in response to the residual vibration generated in the discharge portion 600, is weak and is therefore susceptible to the influence of the on-resistance of the n-type transistor 236c when the selection circuit 230 acquires the residual vibration signal Vout. By making the voltage value of the residual vibration signal Vout during the period in which the n-type transistor 236c outputs the residual vibration signal Vout to the residual vibration detection circuit 250 smaller than the voltage value of the selection signal Sc input to the gate terminal, which is the control terminal of the n-type transistor 236c, minus the threshold voltage at which the n-type transistor 236c switches whether or not to supply the residual vibration signal Vout to the residual vibration detection circuit 250, the on-resistance of the n-type transistor 236c can be reduced, and as a result, the accuracy with which the selection circuit 230 acquires the residual vibration signal Vout is improved, and the accuracy with which the state of the discharge portion 600 is determined is improved.

[0126] 1.3.3 Drive signal selection circuit structure Next, an example of the structure of an integrated circuit 300, which is an integrated circuit device equipped with the drive signal selection circuit 200, will be described. Fig. 9 is a diagram showing an example of the structure of the integrated circuit 300. Here, Fig. 9 will be described using an X-axis and a Y-axis which are orthogonal to each other. In the description of Fig. 9, the tip side of the arrow indicating the X-axis shown in the figure will be referred to as the +X side and the starting side as the -X side, and the tip side of the arrow indicating the Y-axis shown in the figure will be referred to as the +Y side and the starting side as the -Y side.

[0127] As shown in FIG. 9 , the integrated circuit 300 includes a substrate 310. The substrate 310 includes short sides 311 and 312 and long sides 313 and 314 that are longer than the short sides 311 and 312. The short sides 311 and 312 face each other along the X axis, with the short side 311 located on the -X side and the short side 312 located on the +X side. The long sides 313 and 314 face each other along the Y axis, with the long side 313 located on the -Y side and the long side 314 located on the +Y side. The short side 311 is substantially perpendicular to the long sides 313 and 314, and the short side 312 is substantially perpendicular to the long sides 313 and 314. In other words, the substrate 310 is substantially rectangular. The shape of the substrate 310 is not limited to a substantially rectangular shape and may be circular or another polygonal shape, and may have a notch, an arc, or an opening.

[0128] The substrate 310 is provided with terminals Tck, Tsi, Tlt, Tch, Tsg, Tnv, Tca, Tcb, and Tvh, and m terminals Tvi. The terminals Tck, Tsi, Tlt, Tch, Tsg, Tnv, Tca, Tcb, and Tvh are located adjacent to the long side 313 along the Y axis. Specifically, the terminals Tck, Tsi, Tlt, Tch, Tsg, Tnv, Tca, Tcb, and Tvh are located adjacent to the long side 314 along the Y axis, from the -X side to the +X side, in the order of terminal Tvh, terminal Tcb, terminal Tca, terminal Tck, terminal Tsi, terminal Tlt, terminal Tch, terminal Tsg, and terminal Tnv. The m terminals Tvi are located adjacent to the long side 314 along the Y axis. In addition to the terminals Tck, Tsi, Tlt, Tch, Tsg, Tnv, Tca, Tcb, Tvh, and m terminals Tvi, the substrate 310 may be provided with multiple terminals such as a terminal to which a ground potential is supplied.

[0129] The integrated circuit 300 operates in response to signals input via terminals Tck, Tsi, Tlt, Tch, Tsg, Tca, Tcb, and Tvh, and outputs signals corresponding to the operation from terminal Tnv and each of m terminals Tvi. Specifically, a clock signal SCK is supplied to terminal Tck, a print data signal SI is supplied to terminal Tsi, a latch signal LAT is supplied to terminal Tlt, a change signal CH is supplied to terminal Tch, a test timing signal TSIG is supplied to terminal Tsg, a drive voltage signal ComA is supplied to terminal Tca, a drive voltage signal ComB is supplied to terminal Tcb, and a voltage signal VHV is supplied to terminal Tvh. A residual vibration detection signal NVT is output from terminal Tnv. A drive voltage signal Vin is output from each of m terminals Tvi to a corresponding ejector 600, and a residual vibration signal Vout is supplied from the corresponding ejector 600 to each of m terminals Tvi.

[0130] Also mounted on the substrate 310 are m registers 222, m latch circuits 224, m decoders 226, m selection circuits 230, a switching circuit 240, and a residual vibration detection circuit 250, which constitute the drive signal selection circuit 200. Here, in Fig. 9, the area where the registers 222 are mounted is illustrated as a mounting area Reg, the area where the latch circuits 224 are mounted is illustrated as a mounting area Lt, the area where the decoders 226 are mounted is illustrated as a mounting area Dec, the area where the selection circuit 230 is mounted is illustrated as a mounting area Sel, the area where the OR circuit 244 of the switching circuit 240 is mounted is illustrated as a mounting area Or, the area where the switch circuit 242 of the switching circuit 240 is mounted is illustrated as a mounting area Sw, and the area where the residual vibration detection circuit 250 is mounted is illustrated as a mounting area Amp.

[0131] The m mounting areas Reg are positioned side by side along the X axis. The m mounting areas Lt are positioned side by side along the X axis on the +Y side of the m mounting areas Reg aligned along the X axis. The m mounting areas Dec are positioned side by side along the X axis on the +Y side of the m mounting areas Lt aligned along the X axis. The m mounting areas Sel are positioned side by side along the X axis on the +Y side of the m mounting areas Dec aligned along the X axis. That is, the m mounting areas Reg, m mounting areas Lt, m mounting areas Dec, and m mounting areas Sel are positioned in the order of m mounting areas Reg, m mounting areas Lt, m mounting areas Dec, and m mounting areas Sel, from the -Y side to the +Y side along the Y axis.

[0132] Furthermore, among the m mounting areas Reg, the mounting area Reg located at the i-th position from the short side 311 (i is any value from 1 to m), among the m mounting areas Lt, the mounting area Lt located at the i-th position from the short side 311, among the m mounting areas Dec, the mounting area Dec located at the i-th position from the short side 311, and among the m mounting areas Sel, the mounting area Sel located at the i-th position from the short side 311 are positioned along the Y axis from the -Y side to the +Y side in the order of mounting area Reg, mounting area Lt, mounting area Dec, mounting area Sel.

[0133] The mounting area Or in which the OR circuit 244 of the switching circuit 240 is mounted is on the +X side of the m mounting areas Reg, the m mounting areas Lt, the m mounting areas Dec, and the m mounting areas Sel, and at least a portion of it is located between the mounting areas Dec and Sel when viewed along the X axis. The mounting area Sw in which the switch circuit 242 of the switching circuit 240 is mounted is on the +X side of the mounting area Or, and is located so that at least a portion of it overlaps with the mounting area Or when viewed along the X axis. The mounting area Amp in which the residual vibration detection circuit 250 is mounted is located on the +X side of the mounting area Sw.

[0134] The terminals Tck, Tsi, Tlt, Tch, Tsg, Tnv, Tca, Tcb, Tvh and m terminals Tvi arranged as described above are electrically connected to m mounting areas Reg, m mounting areas Lt, m mounting areas Dec, m mounting areas Sel, mounting area Or, mounting area Sw and mounting area Amp by wiring patterns formed on the substrate 310.

[0135] A wiring Wck is electrically connected to each of the m registers 222 mounted in the m mounting areas Reg. The wiring Wck is also electrically connected to a terminal Tck. Furthermore, each of the m registers 222 mounted in the m mounting areas Reg is electrically connected to a register 222 mounted in an adjacent mounting area Reg via a wiring pattern. In other words, the m registers 222 mounted in the m mounting areas Reg are connected in cascade. Furthermore, one end of a wiring Wsi is electrically connected to the register 222 in the mounting area Reg located furthest to the +X side among the m mounting areas Reg aligned along the X axis, and the other end of the wiring Wsi is electrically connected to a terminal Tsi.

[0136] The print data signal SI supplied to the terminal Tsi propagates through the wiring Wsi and is input to the register 222 in the mounting area Reg located furthest to the +X side of the m mounting areas Regs aligned along the X axis. The clock signal SCK supplied to the terminal Tck propagates through the wiring Wck and is input to each of the m registers 222 mounted in the m mounting areas Regs. As a result, the print data SId[SIH, SIM, SIL] contained in the print data signal SI is transferred sequentially to the subsequent register 222 in synchronization with the clock signal SCK. Then, by stopping the supply of the clock signal SCK to the terminal Tck, the print data SId[SIH, SIM, SIL] is held in each of the m registers 222 mounted in the m mounting areas Regs.

[0137] A wiring Wlt is electrically connected to each of the m latch circuits 224 mounted in the m mounting areas Lt. The wiring Wlt is also electrically connected to the terminal Tlt. Furthermore, each of the m latch circuits 224 mounted in the m mounting areas Lt is electrically connected to a corresponding register 222 via a wiring pattern. Specifically, the register 222 mounted in the i-th mounting area Reg from the short side 311 of the m mounting areas Reg is electrically connected via a wiring pattern to the latch circuit 224 mounted in the i-th mounting area Lt from the short side 311 of the m mounting areas Lt, and the register 222 mounted in the i+1-th mounting area Reg from the short side 311 of the m mounting areas Reg is electrically connected via a wiring pattern to the latch circuit 224 mounted in the i+1-th mounting area Lt from the short side 311 of the m mounting areas Lt.

[0138] The latch signal LAT supplied to the terminal Tlt propagates through the wiring Wsi and is input to each of the m latch circuits 224 mounted in the m mounting areas Lt. When the latch signal LAT input to each of the m latch circuits 224 mounted in the m mounting areas Lt rises, each of the m latch circuits 224 mounted in the m mounting areas Lt simultaneously latches the print data SId[SIH, SIM, SIL] held in the corresponding register 222.

[0139] The m decoders 226 mounted in the m mounting areas Dec are electrically connected to the wiring Wlt, wiring Wch, wiring Wsg, and wiring Wvh, respectively. The wiring Wch is also electrically connected to the terminal Tch. The wiring Wsg is also electrically connected to the terminal Tsg. The wiring Wvh is also electrically connected to the terminal Tvh. As described above, the wiring Wlt is also electrically connected to the terminal Tlt. Each of the m decoders 226 mounted in the m mounting areas Dec is also electrically connected to a corresponding latch circuit 224 via a wiring pattern. Specifically, the latch circuit 224 mounted in the mounting area Lt located i-th from the short side 311 among the m mounting areas Lt is electrically connected to the decoder 226 mounted in the mounting area Dec located i-th from the short side 311 among the m mounting areas Dec via a wiring pattern, and the latch circuit 224 mounted in the mounting area Lt located i+1-th from the short side 311 among the m mounting areas Lt is electrically connected to the decoder 226 mounted in the mounting area Dec located i+1-th from the short side 311 among the m mounting areas Dec via a wiring pattern.

[0140] The latch signal LAT supplied to the terminal Tlt, the change signal CH supplied to the terminal Tch, and the test timing signal TSIG supplied to the terminal Tsg propagate through the corresponding wirings Wlt, Wch, and Wsg and are input to the m decoders 226 mounted in the m mounting areas Dec. The voltage signal VHV supplied to the terminal Tvh propagates through the wiring Wvh and is input to the m decoders 226 mounted in the m mounting areas Dec. Each of the m decoders 226 mounted in the m mounting areas Dec outputs selection signals Sa, Sb, and Sc, which are obtained by level-shifting a signal of a logic level corresponding to the signal latched by the corresponding latch circuit 224 to a high-amplitude logic level in response to the voltage signal VHV, during periods tp1 and tp2 defined by the latch signal LAT and the change signal CH and periods ts1, ts2, and ts3 defined by the latch signal LAT and the test timing signal TSIG.

[0141] The m selection circuits 230 mounted in the m mounting areas Sel are electrically connected to the wiring Wca, wiring Wcb, and wiring Wvh, respectively. The wiring Wca is also electrically connected to the terminal Tca. The wiring Wcb is also electrically connected to the terminal Tcb. As described above, the wiring Wvh is also electrically connected to the terminal Tvh. Furthermore, the m selection circuits 230 mounted in the m mounting areas Sel are electrically connected to the wiring Wca, wiring Wcb, and wiring Wvh, respectively, through which the selection signal Sa is propagated. The decoder 226 is also electrically connected to the corresponding decoder 226 via wiring Wsa through which the selection signal Sb propagates, wiring Wsb through which the selection signal Sb propagates, and wiring Wsc through which the selection signal Sc propagates. Specifically, the decoder 226 mounted in the mounting area Dec that is located the ith from the short side 311 among the m mounting areas Dec is electrically connected to the selection circuit 230 mounted in the mounting area Sel that is located the ith from the short side 311 among the m mounting areas Sel via wiring Wsa, Wsb, and Wsc, and the decoder 226 mounted in the mounting area Dec that is located the (i+1)th from the short side 311 among the m mounting areas Dec is electrically connected to the selection circuit 230 mounted in the mounting area Sel that is located the (i+1)th from the short side 311 among the m mounting areas Sel via wiring Wsa, Wsb, and Wsc.

[0142] The drive voltage signal ComA supplied to the terminal Tca and the drive voltage signal ComB supplied to the terminal Tcb propagate through the corresponding wiring Wca and Wcb, respectively, and are input to the m selection circuits 230 mounted in the m mounting areas Sel. Each of the m selection circuits 230 mounted in the m mounting areas Sel generates a drive voltage signal Vin by selecting or deselecting the drive voltage signals ComA and ComB during periods tp1, tp2, and periods ts1, ts2, and ts3, respectively, depending on the logic levels of the selection signals Sa, Sb, and Sc propagated through the wiring Wsa, Wsb, and Wsc. The drive voltage signal Vin generated by each of the m selection circuits 230 mounted in the m mounting areas Sel is then output from the integrated circuit 300 via the corresponding terminal Tvi. This drives the piezoelectric element 60 included in the corresponding ejection unit 600.

[0143] Furthermore, each of the m selection circuits 230 mounted in the m mounting areas Sel receives as input a residual vibration signal Vout output by the piezoelectric element 60 in response to residual vibration occurring after ink is ejected from the corresponding ejection section 600. Each of the m selection circuits 230 mounted in the m mounting areas Sel acquires the input residual vibration signal Vout in response to the logic levels of the input selection signals Sa, Sb, Sc propagating through the wirings Wsa, Wsb, Wsc, and outputs the signal as a residual vibration detection signal NVT.

[0144] Furthermore, a voltage signal VHV supplied to a terminal Tvh is propagated through a wiring Wvh and input to each of the m mounting regions Sel. The voltage signal VHV input to each of the m mounting regions Sel is supplied to an N-well region Nwell (to be described later) included in each of the m mounting regions Sel.

[0145] A specific example of the mounting area Sel on which the selection circuit 230 is mounted will be described. FIG. 10 is a diagram showing an example of the configuration of the mounting area Sel on which the selection circuit 230 is mounted. Note that in FIG. 10, the logic inversion circuits 232a and 232b included in the selection circuit 230 are illustrated in a simplified manner. Here, FIG. 10 will be described using the x1-axis and y1-axis, which are independent of the X-axis and Y-axis shown in FIG. 9 and are orthogonal to each other. In the description of FIG. 10, the tip side of the arrow indicating the x1-axis will be referred to as the +x1 side, and the starting side will be referred to as the -x1 side. The tip side of the arrow indicating the y1-axis will be referred to as the +y1 side, and the starting side will be referred to as the -y1 side. In addition, viewing the mounting area Sel from the normal direction of the plane formed by the x1-axis and y1-axis may be referred to as a planar view of the mounting area Sel.

[0146] 10, the mounting region Sel includes a P-type substrate region Psub and an N-well region Nwell. The P-type substrate region Psub is a region in which an impurity such as boron is added to a wafer substrate such as silicon, and the N-well region Nwell is a region in which an impurity such as phosphorus is added to the P-type substrate region Psub. A ground signal GND at ground potential is supplied to the P-type substrate region Psub, and a voltage signal VHV is supplied to the N-well region Nwell.

[0147] In the P-type substrate region Psub, N-type diffusion layers 331, 332, 333, 341, 342, and 343 and electrodes 334, 335, 344, and 345 are formed.

[0148] The N-type diffusion layers 331, 332, and 333 are positioned side by side along the x1 axis from the −x1 side to the +x1 side, in the order of N-type diffusion layer 331, N-type diffusion layer 332, and N-type diffusion layer 333. The electrodes 334 and 335 are positioned side by side along the x1 axis from the −x1 side to the +x1 side, in the order of electrode 334 and electrode 335. In this case, the electrode 334 is positioned such that its end on the −x1 side overlaps with a portion of the N-type diffusion layer 331 and its end on the +x1 side overlaps with a portion of the N-type diffusion layer 332, when viewed in a plan view of the mounting region Sel. The electrode 335 is positioned such that its end on the −x1 side overlaps with a portion of the N-type diffusion layer 332 and its end on the +x1 side overlaps with a portion of the N-type diffusion layer 333, when viewed in a plan view of the mounting region Sel. That is, in a plan view of the mounting region Sel, the electrode 334 is located between the N-type diffusion layer 331 and the N-type diffusion layer 332 so as to bridge the N-type diffusion layer 331 and the N-type diffusion layer 332, and the electrode 335 is located between the N-type diffusion layer 332 and the N-type diffusion layer 333 so as to bridge the N-type diffusion layer 332 and the N-type diffusion layer 333. In addition, an oxide film (not shown) or the like is formed as an insulating layer between the electrode 334 and the P-type substrate region Psub, and between the electrode 335 and the P-type substrate region Psub.

[0149] The N-type diffusion layers 341, 342, and 343 are located on the +y1 side of the N-type diffusion layers 331, 332, and 333, and are arranged in the order of N-type diffusion layer 341, N-type diffusion layer 342, and N-type diffusion layer 343, from the −x1 side to the +x1 side along the x1 axis. The electrodes 344 and 345 are located on the +x1 side along the x1 axis, from the −x1 side to the +x1 side, and are arranged in the order of electrode 344, electrode 345. In this case, the electrode 344 is located such that its end on the −x1 side overlaps with a portion of the N-type diffusion layer 341 and its end on the +x1 side overlaps with a portion of the N-type diffusion layer 342, when viewed in a plan view of the mounting region Sel. The electrode 345 is located such that its end on the −x1 side overlaps with a portion of the N-type diffusion layer 342 and its end on the +x1 side overlaps with a portion of the N-type diffusion layer 343, when viewed in a plan view of the mounting region Sel. That is, in a plan view of the mounting region Sel, the electrode 344 is located between the N-type diffusion layer 341 and the N-type diffusion layer 342 so as to bridge the N-type diffusion layer 341 and the N-type diffusion layer 342, and the electrode 345 is located between the N-type diffusion layer 342 and the N-type diffusion layer 343 so as to bridge the N-type diffusion layer 342 and the N-type diffusion layer 343. In addition, an oxide film (not shown) or the like is formed as an insulating layer between the electrode 344 and the P-type substrate region Psub, and between the electrode 345 and the P-type substrate region Psub.

[0150] In the N-well region Nwell, P-type diffusion layers 351, 352, and 353 and electrodes 354 and 355 are formed.

[0151] The P-type diffusion layers 351, 352, and 353 are located on the +y1 side of the N-type diffusion layers 341, 342, and 343, and are arranged side by side along the x1 axis from the −x1 side to the +x1 side in the order of P-type diffusion layer 351, P-type diffusion layer 352, and P-type diffusion layer 353. The electrodes 354 and 355 are located along the x1 axis from the −x1 side to the +x1 side in the order of electrode 354, electrode 355. In this case, the electrode 354 is located such that its end on the −x1 side overlaps with a portion of the P-type diffusion layer 351 and its end on the +x1 side overlaps with a portion of the P-type diffusion layer 352 in a planar view of the mounting region Sel. The electrode 355 is located such that its end on the −x1 side overlaps with a portion of the P-type diffusion layer 352 and its end on the +x1 side overlaps with a portion of the P-type diffusion layer 353 in a planar view of the mounting region Sel. That is, in a plan view of the mounting region Sel, the electrode 354 is located between the P-type diffusion layer 351 and the P-type diffusion layer 352 so as to bridge the P-type diffusion layer 351 and the P-type diffusion layer 352, and the electrode 355 is located between the P-type diffusion layer 352 and the P-type diffusion layer 353 so as to bridge the P-type diffusion layer 352 and the P-type diffusion layer 353. In addition, an oxide film (not shown) or the like is formed as an insulating layer between the electrode 354 and the N-well region Nwell and between the electrode 345 and the N-well region Nwell.

[0152] In the selection circuit 230 mounted in the mounting area Sel as described above, the drive voltage signal ComA is input to the N-type diffusion layer 341 and the P-type diffusion layer 351 via electrodes (not shown), and the drive voltage signal ComB is input to the N-type diffusion layer 343 and the P-type diffusion layer 353 via electrodes (not shown). The selection signal Sa is input to an electrode 344, and after its logical level is inverted in a logic inversion circuit 232a, is also input to an electrode 354. The selection signal Sb is input to an electrode 345, and after its logical level is inverted in a logic inversion circuit 232b, is also input to an electrode 355. The selection signal Sc is input to electrodes 334 and 335. The selection circuit 230 mounted in the mounting area Sel outputs the signals of the N-type diffusion layer 342 and the P-type diffusion layer 352 as a drive voltage signal Vin via an electrode not shown, and also outputs a residual vibration signal Vout generated in the corresponding discharge section 600 in response to the drive voltage signal Vin from the N-type diffusion layers 331, 333 via an electrode not shown and the N-type diffusion layer 332.

[0153] Specifically, when an H-level selection signal Sa is input to the selection circuit 230 mounted in the mounting region Sel, in a plan view of the mounting region Sel, a channel having a channel width Wcn2 is formed in a P-type substrate region Psub that is between the N-type diffusion layer 341 and the N-type diffusion layer 342 and overlaps with the electrode 344, and a channel having a channel width Wcn3 is formed in an N-well region Nwell that is between the P-type diffusion layer 351 and the P-type diffusion layer 352 and overlaps with the electrode 354. As a result, the drive voltage signal ComA supplied to the N-type diffusion layer 341 and the P-type diffusion layer 351 is supplied to the N-type diffusion layer 342 and the P-type diffusion layer 352 and output as the drive voltage signal Vin.

[0154] Similarly, when an H-level selection signal Sb is input to the selection circuit 230 mounted in the mounting region Sel, a channel having a channel width Wcn2 is formed in a P-type substrate region Psub that is between the N-type diffusion layer 342 and the N-type diffusion layer 343 and overlaps with the electrode 345 in a plan view of the mounting region Sel, and a channel having a channel width Wcn3 is formed in an N-well region Nwell that is between the P-type diffusion layer 352 and the P-type diffusion layer 353 and overlaps with the electrode 355 in a plan view of the mounting region Sel. As a result, the drive voltage signal ComB supplied to the N-type diffusion layer 343 and the P-type diffusion layer 353 is supplied to the N-type diffusion layer 342 and the P-type diffusion layer 352 and output as the drive voltage signal Vin.

[0155] Furthermore, when an H-level selection signal Sc is input to selection circuit 230 mounted in mounting region Sel, a channel having a channel width Wcn1 is formed in P-type substrate region Psub that overlaps with electrode 334 between N-type diffusion layer 331 and N-type diffusion layer 332 in plan view of mounting region Sel, and a channel having a channel width Wcn1 is formed in P-type substrate region Psub that overlaps with electrode 335 between N-type diffusion layer 332 and N-type diffusion layer 333 in plan view of mounting region Sel. As a result, residual vibration signal Vout, which is a signal supplied to N-type diffusion layer 332 and corresponds to the residual vibration generated in the corresponding discharge portion 600 in response to drive voltage signal Vin, is supplied to N-type diffusion layers 331, 333 and output as residual vibration signal Vout.

[0156] That is, the N-type diffusion layers 341, 342 and electrode 344 constitute an n-type transistor 236a included in the switch circuit 234a, the P-type diffusion layers 351, 352 and electrode 354 constitute a p-type transistor 238a included in the switch circuit 234a, the N-type diffusion layers 343, 342 and electrode 345 constitute an n-type transistor 236b included in the switch circuit 234b, the P-type diffusion layers 353, 352 and electrode 355 constitute a p-type transistor 238b included in the switch circuit 234b, and the N-type diffusion layers 331, 332 and electrode 334, the N-type diffusion layers 332, 333 and electrode 335 constitute an n-type transistor 236c included in the switch circuit 234c.

[0157] At this time, the back gate of the n-type transistor 236a included in the switch circuit 234a A ground signal GND of the ground potential supplied to the P-type substrate region Psub is supplied to the back gate terminal of the n-type transistor 236b included in the switch circuit 234a, the back gate terminal of the n-type transistor 236c included in the switch circuit 234c, and a voltage signal VHV supplied to the N-well region Nwell is supplied to the back gate terminal of the p-type transistor 238a included in the switch circuit 234a and the back gate terminal of the p-type transistor 238b included in the switch circuit 234b.

[0158] 9 , the OR circuit 244 mounted in the mounting area Or is electrically connected to m wirings Wsc, which are electrically connected to the m decoders 226 mounted in the m mounting areas Dec. As described above, the selection signals Sc output by the corresponding decoders 226 propagate through the wirings Wsc. As a result, the m selection signals Sc output by the m decoders 226 mounted in the m mounting areas Dec are input to the OR circuit 244 mounted in the mounting area Or. When at least one of the m selection signals Sc inputted is at H level, the OR circuit 244 mounted in the mounting area Or outputs a high-level switch control signal SS. When all of the m selection signals Sc inputted are at L level, the OR circuit 244 outputs a low-level switch control signal SS.

[0159] The switch circuit 242 mounted on the mounting area Sw is electrically connected to the wiring Wss and the wiring Wcb. The wiring Wss is also electrically connected to the OR circuit 244 mounted on the mounting area Or, and the switch control signal SS output by the OR circuit 244 mounted on the mounting area Or is propagated through the wiring Wss. As described above, the wiring Wcb is also electrically connected to the terminal Tcb, and the drive voltage signal ComB supplied to the terminal Tcb is propagated through the wiring Wss. As a result, the switch control signal SS output by the OR circuit 244 mounted on the mounting area Or and the drive voltage signal ComB are input to the switch circuit 242 mounted on the mounting area Sw. When the switch control signal SS output by the OR circuit 244 implemented in the implementation area Or is at H level, the switch circuit 242 implemented in the implementation area Sw outputs the drive voltage signal ComB supplied through the wiring Wcb as the drive voltage signal bCom, and when the switch control signal SS output by the OR circuit 244 implemented in the implementation area Or is at L level, the switch circuit 242 stops outputting the drive voltage signal ComB as the drive voltage signal bCom.

[0160] Here, a specific example of the mounting area Sw on which the switch circuit 242 including the n-type transistor 242a is mounted will be described. FIG. 11 is a diagram showing an example of the configuration of the mounting area Sw on which the switch circuit 242 is mounted. Here, in FIG. 11, the description will be made using the x2 axis and y2 axis, which are independent of the X axis and Y axis shown in FIG. 9 and the x1 axis and y1 axis shown in FIG. 10 and are orthogonal to each other. In the description of FIG. 11, the tip side of the arrow indicating the x2 axis will be referred to as the +x2 side, and the starting side will be referred to as the -x2 side. The tip side of the arrow indicating the y2 axis will be referred to as the +y2 side, and the starting side will be referred to as the -y2 side. In addition, viewing the mounting area Sw from the normal direction of the plane formed by the x2 axis and the y2 axis may be referred to as a planar view of the mounting area Sw.

[0161] 11, the mounting area Sw includes a P-type substrate area Psub. The P-type substrate area Psub is an area in which an impurity such as boron is added to a wafer substrate such as silicon, and a ground signal GND at ground potential is supplied to the P-type substrate area Psub.

[0162] In addition, in the P-type substrate region Psub of the mounting region Sw, N-type diffusion layers 361, 362, and 363 and electrodes 364 and 365 are formed.

[0163] The N-type diffusion layers 361, 362, and 363 are arranged in the order of N-type diffusion layer 361, N-type diffusion layer 362, and N-type diffusion layer 363 along the x2 axis from the -x2 side to the +x2 side. The electrodes 364 and 365 are arranged in the order of electrode 364 and electrode 365 along the x2 axis from the -x2 side to the +x2 side. In this case, the electrode 364 is The electrode 364 is positioned such that its end on the -x2 side overlaps with a portion of the N-type diffusion layer 361 and its end on the +x2 side overlaps with a portion of the N-type diffusion layer 362, in a plan view of the mounting region Sw. The electrode 365 is positioned such that its end on the -x2 side overlaps with a portion of the N-type diffusion layer 362 and its end on the +x2 side overlaps with a portion of the N-type diffusion layer 363. That is, the electrode 364 is positioned between the N-type diffusion layers 361 and 362 in a plan view of the mounting region Sw so as to bridge the N-type diffusion layers 361 and 362, and the electrode 365 is positioned between the N-type diffusion layers 362 and 363 in a plan view of the mounting region Sw so as to bridge the N-type diffusion layers 362 and 363. Furthermore, an oxide film (not shown) or the like is formed as an insulating layer between the electrode 364 and the P-type substrate region Psub, and between the electrode 365 and the P-type substrate region Psub.

[0164] In the switch circuit 242 mounted in the mounting area Sw as described above, the drive voltage signal ComB is input to the N-type diffusion layers 361 and 363 via electrodes (not shown). The switch control signal SS is input to electrodes 364 and 365. The n-type transistor 242a mounted in the mounting area Sw outputs the signal of the N-type diffusion layer 362 as the drive voltage signal bCom via electrodes (not shown).

[0165] Specifically, when an H-level switch control signal SS is input to the switch circuit 242 mounted in the mounting area Sw, a channel having a channel width Wcn4 is formed in the P-type substrate region Psub between the N-type diffusion layer 361 and the N-type diffusion layer 362 and overlapping with the electrode 364 in a planar view of the mounting area Sw, and a channel having a channel width Wcn4 is formed in the P-type substrate region Psub between the N-type diffusion layer 362 and the N-type diffusion layer 363 and overlapping with the electrode 365 in a planar view of the mounting area Sw. As a result, the drive voltage signal ComB supplied to the N-type diffusion layers 361 and 363 is supplied to the N-type diffusion layer 362 and output as the drive voltage signal bCom. In other words, the N-type diffusion layers 361 and 362 and the electrode 364, and the N-type diffusion layers 362 and 363 and the electrode 365 constitute the n-type transistor 242a. At this time, the back gate terminal of the n-type transistor 242a is supplied with the ground signal GND at the ground potential supplied to the P-type substrate region Psub.

[0166] Returning to FIG. 9 , the residual vibration detection circuit 250 mounted in the mounting area Amp is electrically connected to the wiring Wbc, wiring Wvo, and wiring Wvh. The wiring Wbc is also electrically connected to the n-type transistor 242a mounted in the mounting area Sw. The wiring Wvo is also electrically connected to each of the m selection circuits 230 mounted in the m mounting areas Sel. The wiring Wvh is also electrically connected to the terminal Tvh. The driving voltage signal bCom output from the n-type transistor 242a mounted in the mounting area Sw propagates through the wiring Wbc. The residual vibration signal Vout, which is the residual vibration signal dVout output from each of the m selection circuits 230 mounted in the m mounting areas Sel, propagates through the wiring Wvo. The voltage signal VHV propagates through the wiring Wvh. As a result, the driving voltage signal bCom and the residual vibration signal dVout are input to the residual vibration detection circuit 250 mounted in the mounting area Amp. In the mounting area Amp, the voltage signal VHV is used as a reference potential for a well area in which some of the circuit elements that make up the residual vibration detection circuit 250 are mounted.

[0167] The residual vibration detection circuit 250 mounted in the mounting area Amp generates and outputs a residual vibration detection signal NVT by amplifying a signal corresponding to the difference between the input drive voltage signal bCom and the residual vibration signal dVout. That is, the residual vibration detection circuit 250 outputs the residual vibration detection signal NVT obtained by differentially amplifying the residual vibration signal Vout input via the n-type transistor 236c and the drive voltage signal ComB input via the n-type transistor 242a.

[0168] The residual vibration detection signal output by the residual vibration detection circuit 250 mounted in this mounting area Amp The NVT propagates through the wiring Wnv electrically connected to the residual vibration detection circuit 250 mounted in the mounting area Amp, and is output from the terminal Tnv.

[0169] 1.4 Residual vibration signal and discharge part status determination Here, a specific example of residual vibration occurring in the ejection section 600 after the drive voltage signal Vin is supplied to the ejection section 600, and a specific example of residual vibration signal Vout corresponding to the residual vibration will be described. The liquid ejection device 1 of this embodiment acquires a residual vibration signal Vout corresponding to the residual vibration occurring in the ejection section 600 after the piezoelectric element 60 included in the ejection section 600 is driven in accordance with the drive voltage signal Vin including the drive waveform Bdp1, and determines the state of the corresponding ejection section 600 based on a residual vibration detection signal NVT corresponding to the acquired residual vibration signal Vout.

[0170] Specifically, in the liquid ejection device 1 of this embodiment, the piezoelectric element 60 included in the corresponding ejection section 600 is driven by being supplied with a drive voltage signal Vin including a drive waveform Bdp1. When the piezoelectric element 60 is driven, the vibration plate 621 is displaced, and the displacement of the vibration plate 621 changes the internal pressure of the pressure chamber 631. Thereafter, when the voltage value of the drive voltage signal Vin supplied to the piezoelectric element 60 becomes constant, damped vibration occurs in the vibration plate 621 in accordance with the change in the internal pressure of the pressure chamber 631. At this time, the damped vibration generated in the vibration plate 621 displaces the piezoelectric element 60. Then, an electric charge corresponding to the displacement is released from the piezoelectric element 60. A signal corresponding to the electric charge released from the piezoelectric element 60 by the damped vibration generated in the vibration plate 621 corresponds to the residual vibration signal Vout.

[0171] Fig. 12 is a diagram showing an example of the residual vibration signal Vout. As shown in Fig. 12, the signal waveform of the residual vibration signal Vout is a damped vibration waveform in which the voltage amplitude decreases over time in accordance with the damped vibration generated in the vibration plate 621 due to changes in the internal pressure of the pressure chamber 631. Waveform information such as the amplitude and period contained in the damped vibration waveform of this residual vibration signal Vout changes depending on the state of the ink stored in the pressure chamber 631.

[0172] Here, the relationship between the waveform information of the residual vibration signal Vout and the state of ink stored in the pressure chamber 631 will be explained using a calculation model. FIG. 13 is a diagram showing an example of a calculation model of simple harmonic motion that assumes residual vibration occurring in the pressure chamber 631 or the diaphragm 621. As described above, the piezoelectric element 60 is displaced when the drive voltage signal Vin is supplied, and the diaphragm 621 is also displaced in accordance with the displacement of the piezoelectric element 60. The displacement of the diaphragm 621 then changes the volume of the corresponding pressure chamber 631. At this time, a portion of the ink filled in the pressure chamber 631 is ejected from the nozzle 651 in accordance with the pressure generated inside the pressure chamber 631.

[0173] In a series of operations for ejecting ink from such nozzle 651, the vibration plate 621 freely vibrates at a natural vibration frequency determined by the flow path resistance r based on the shape of the flow path through which the ink flows and the viscosity of the ink, the inertance m due to the weight of the liquid in the flow path, and the compliance C of the vibration plate 621, and the piezoelectric element 60 is displaced in response to the free vibration occurring in the vibration plate 621. Then, a signal of the charge generated by the displacement of the piezoelectric element 60 is output as a residual vibration signal Vout.

[0174] A calculation model of the residual vibration occurring in such diaphragm 621 can be expressed by pressure p, inertance m, compliance C, and flow path resistance r. Then, by calculating the step response in terms of volume velocity u when pressure p is applied to the circuit shown in Fig. 13, the following equations (1) to (3) are obtained.

[0175]

number

[0176]

number

[0177]

number

[0178] Figure 14 is a diagram illustrating the relationship between ink viscosity and the signal waveform of the residual vibration signal Vout. In Figure 14, the horizontal axis represents time, and the vertical axis represents the magnitude of the residual vibration. Figure 14 also illustrates the ink viscosity, with the signal waveform when the viscosity increase ratio is 1.0 represented as waveform a1, the signal waveform when the viscosity increase ratio is 1.4 represented as waveform a2, the signal waveform when the viscosity increase ratio is 1.8 represented as waveform a3, and the signal waveform when the viscosity increase ratio is 2.2 represented as waveform a4.

[0179] 14, when the viscosity of the stored ink increases and the viscosity ratio increases, the amplitude and damping rate of the residual vibration signal Vout change. Specifically, when the viscosity of the ink stored in the pressure chamber 631 increases, the flow path resistance r increases. Therefore, the amplitude of the damped vibration generated in the vibration plate 621 decreases and the damping rate increases. As a result, when an abnormal viscosity increase occurs in the stored ink, the amplitude of the corresponding residual vibration signal Vout decreases and the damping rate increases.

[0180] 15 is a diagram illustrating the signal waveform of the residual vibration signal Vout when an air bubble has entered the pressure chamber 631. In Fig. 15, the horizontal axis represents time, and the vertical axis represents the magnitude of the residual vibration. Fig. 15 also illustrates, as waveform b1, a signal waveform in a normal state when no air bubble has entered the pressure chamber 631, and as waveform b2, an example of a signal waveform when an air bubble has entered the pressure chamber 631.

[0181] As shown in Figure 15, when air bubbles are trapped in pressure chamber 631, the vibration frequency of residual vibration signal Vout increases. Specifically, when air bubbles are trapped inside pressure chamber 631, the inertance m, which corresponds to the weight of ink stored therein, decreases by the amount of the trapped air bubbles. When inertance m decreases, the angular velocity ω increases as shown in equation (2). This shortens the vibration period of the residual vibration occurring in diaphragm 621, and as a result, the vibration frequency of residual vibration signal Vout increases and the period shortens.

[0182] As described above, waveform information such as the amplitude and period of the residual vibration signal Vout changes when an increase in viscosity abnormality, in which the viscosity of the ink increases, or an air bubble intrusion abnormality, in which air bubbles are mixed in, occurs in the pressure chamber 631. Therefore, the state of the ejection unit 600, which includes the piezoelectric element 60 that outputs the residual vibration signal Vout, can be determined based on waveform information such as the amplitude and period of the residual vibration signal Vout.

[0183] In the liquid ejection device 1 of this embodiment, the drive signal selection circuit 200 acquires the residual vibration signal Vout, shapes it, and outputs it as a residual vibration detection signal NVT. Then, the waveform information output circuit 270 extracts waveform information such as amplitude and period contained in the residual vibration detection signal NVT corresponding to the residual vibration signal Vout, and the control circuit 100 determines the state of the corresponding ejection section 600 based on the waveform information extracted by the waveform information output circuit 270.

[0184] Here, the drive voltage signal ComB is an example of a drive signal, and the n-type transistor 236c is an example of a first transistor, n-type transistor 242a is an example of a second transistor, ground signal GND is an example of a constant potential signal, resistor R1 is an example of a detection resistor, amplifier circuit OP1 and residual vibration detection circuit 250 are examples of a differential amplifier circuit, and control circuit 100 is an example of a processor.

[0185] 1.5 Effects The liquid ejection device 1 and print head 21 of this embodiment configured as described above include a pressure chamber 631 whose volume changes in response to the drive voltage signal ComB, a nozzle 651 that communicates with the pressure chamber 631 and ejects liquid, a piezoelectric element 60 that outputs a residual vibration signal Vout in response to the residual vibration generated by the volume change of the pressure chamber 631, a residual vibration detection circuit 250 that receives the residual vibration signal Vout and outputs a residual vibration detection signal NVT in response to the residual vibration signal Vout, and a switch circuit 234c that switches whether or not to supply the residual vibration signal Vout to the residual vibration detection circuit 250, and the switch circuit 234c is composed only of an n-type transistor 236c, which is an N-channel transistor, and does not include a P-channel transistor.

[0186] If the switch circuit 234c includes a P-channel transistor, a signal having a higher potential than the maximum voltage value of the drive voltage signal ComB, such as a voltage signal VHV, is supplied to the back gate terminal of the P-channel transistor. A high-potential signal such as the voltage signal VHV is generated by a high-efficiency switching power supply circuit, such as a switching regulator, in order to increase the conversion efficiency associated with the generation of the signal. However, due to the characteristics of the circuit, a ripple voltage is superimposed on the signal generated by the switching power supply circuit.

[0187] If a P-channel transistor is included in the switch circuit 234c, which switches whether or not the residual vibration signal Vout is supplied to the residual vibration detection circuit 250, there is a risk that the ripple voltage superimposed on the voltage signal VHV via the back gate terminal will contribute to the residual vibration signal Vout. In particular, because the signal associated with the charge output from the piezoelectric element 60 in response to the residual vibration generated in the ejection unit 600 is very weak, the influence of the ripple voltage superimposed on the voltage signal VHV will be significant. In other words, if the ripple voltage superimposed on the voltage signal VHV contributes to the residual vibration signal Vout, there is a risk that the detection accuracy of the residual vibration signal Vout, that is, the detection accuracy of the signal associated with the charge output from the piezoelectric element 60 in response to the residual vibration generated in the ejection unit 600, will decrease.

[0188] In contrast, in the liquid ejection device 1 and print head 21 of this embodiment, the switch circuit 234c, which switches whether or not the residual vibration signal Vout is supplied to the residual vibration detection circuit 250, is composed only of n-type transistors 236c, which are N-channel transistors, thereby reducing the risk that the ripple voltage superimposed on the high-voltage voltage signal VHV will be superimposed on the residual vibration signal Vout. As a result, the detection accuracy of the residual vibration signal Vout, that is, the detection accuracy of the residual vibration that occurs after the piezoelectric element 60 is driven, can be improved.

[0189] Furthermore, in the liquid ejection device 1 and print head 21 of the embodiment, in addition to the n-type transistor 236c which is the switch circuit 234c that switches whether or not the residual vibration signal Vout is supplied to the residual vibration detection circuit 250, the switch circuit 242 that switches whether or not the drive voltage signal ComB is supplied to the residual vibration detection circuit 250 includes an n-type transistor 242a which is an N-channel transistor, and a constant potential signal is applied to the back gate terminal of the n-type transistor 236c, and a ground signal GND of ground potential is supplied, and the ground signal GND is also supplied to the back gate terminal of the n-type transistor 242a. In other words, a common signal is supplied to the back gate terminal of the n-type transistor 236c and the back gate terminal of the n-type transistor 242a. Then, the residual vibration detection circuit 250 is The residual vibration detection signal NVT is output by differentially amplifying the residual vibration signal Vout input via the n-type transistor 236c and the drive voltage signal ComB input via the n-type transistor 242a.

[0190] In the print head 21 configured as described above, if a signal is superimposed on the residual vibration signal Vout via the back gate terminal of the n-type transistor 236c, the same signal is also superimposed on the drive voltage signal ComB via the back gate terminal of the n-type transistor 242a. The residual vibration detection circuit 250 differentially amplifies the residual vibration signal Vout input via the n-type transistor 236c and the drive voltage signal ComB input via the n-type transistor 242a, thereby canceling out the signal superimposed on the residual vibration signal Vout via the back gate terminal of the n-type transistor 236c with the signal superimposed on the drive voltage signal ComB via the back gate terminal of the n-type transistor 242a. This reduces the risk that the signal superimposed on the residual vibration signal Vout will contribute to the residual vibration detection signal NVT output from the residual vibration detection circuit 250, even if a signal is superimposed on the residual vibration signal Vout via the back gate terminal of the n-type transistor 236c. As a result, it is possible to improve the accuracy of detecting residual vibrations that occur after the piezoelectric element 60 is driven.

[0191] 2. Second embodiment Next, a liquid ejection device 1 according to a second embodiment will be described. In describing the liquid ejection device 1 according to the second embodiment, the same components as those in the liquid ejection device 1 according to the first embodiment will be denoted by the same reference numerals, and descriptions thereof will be omitted or simplified.

[0192] 16 is a diagram showing an example of the circuit configuration of a selection circuit 230, a switching circuit 240, and a residual vibration detection circuit 250 included in a drive signal selection circuit 200 of the second embodiment. As shown in Fig. 16, the liquid ejection device 1 of the second embodiment differs from the liquid ejection device 1 of the first embodiment in that, in the drive signal selection circuit 200, the selection circuit 230 includes a logic inversion circuit 232c, the switch circuit 234c of the selection circuit 230 includes a p-type transistor 238c, and the switch circuit 242 of the switch circuit 240 includes a p-type transistor 242b and a logic inversion circuit 243.

[0193] Specifically, in the liquid ejection device 1 of the second embodiment, the switch circuit 234c includes a p-type transistor 238c in addition to an n-type transistor 236c. One end of the n-type transistor 236c is electrically connected to one end of the p-type transistor 238c, and the other end of the n-type transistor 236c is electrically connected to the other end of the p-type transistor 238c. The connection point where one end of the n-type transistor 236c and one end of the p-type transistor 238c are electrically connected is electrically connected to one end of the residual vibration detection circuit 250, and the connection point where the other end of the n-type transistor 236c and the other end of the p-type transistor 238c are electrically connected to one end of the piezoelectric element 60 included in the ejection unit 600-1. The selection signal Sc is supplied to the control terminal / gate terminal of the n-type transistor 236c, and a signal obtained by inverting the logic level of the selection signal Sc by the logic inverter circuit 232c is supplied to the control terminal / gate terminal of the p-type transistor 238c. That is, the switch circuit 234c of the second embodiment configures a transmission gate. Here, the junction at which one end of the n-type transistor 236c and one end of the p-type transistor 238c are electrically connected corresponds to one end of the switch circuit 234c, and the junction at which the other end of the n-type transistor 236c and the other end of the p-type transistor 238c are electrically connected corresponds to the other end of the switch circuit 234c.

[0194] The switch circuit 234c configured as above is controlled so that one end and the other end are electrically connected when a selection signal Sc of H level is input. As a result, the switch circuit 234c detects the residual vibration signal Vout-1 output by the piezoelectric element 60 included in the discharge section 600-1 as a residual vibration signal Vout-1. The switch circuit 234c outputs the residual vibration signal Vout-1 to the residual vibration detection circuit 250. On the other hand, when an L-level selection signal Sc is input, the switch circuit 234c is controlled so that one end and the other end are not conductive. As a result, the switch circuit 234c does not output the residual vibration signal Vout-1 output by the piezoelectric element 60 included in the discharge part 600-1 to the residual vibration detection circuit 250. That is, like the switch circuit 234c of the first embodiment, the switch circuit 234c of the second embodiment switches whether or not to output the residual vibration signal Vout to the residual vibration detection circuit 250.

[0195] Furthermore, in the liquid ejection device 1 of the second embodiment, the switch circuit 242 includes a p-type transistor 242b in addition to an n-type transistor 242a. One end of the n-type transistor 242a is electrically connected to one end of the p-type transistor 242b, and the other end of the n-type transistor 242a is electrically connected to the other end of the p-type transistor 242b. The junction between one end of the n-type transistor 242a and one end of the p-type transistor 242b is electrically connected to the wiring pattern through which the drive voltage signal ComB propagates, and the junction between the other end of the n-type transistor 242a and the other end of the p-type transistor 242b is electrically connected to the residual vibration detection circuit 250. A switch control signal SS is supplied to the gate terminal, which is the control terminal of the n-type transistor 242a, and a signal obtained by inverting the logic level of the switch control signal SS by a logic inverter circuit 243 is supplied to the gate terminal, which is the control terminal of the p-type transistor 242b. That is, the switch circuit 242 of the second embodiment includes a transmission gate. Here, the connection point where one end of the n-type transistor 242a and one end of the p-type transistor 242b are electrically connected is referred to as one end of the switch circuit 242, and the connection point where the other end of the n-type transistor 242a and the other end of the p-type transistor 242b are electrically connected is referred to as the other end of the switch circuit 242.

[0196] When the switch control signal SS is input at H level, the switch circuit 242 configured as described above is controlled to have one end and the other end conductive, and as a result, the switch circuit 242 outputs the drive voltage signal ComB as the drive voltage signal bCom to the residual vibration detection circuit 250.

[0197] Next, a specific example of the mounting area Sel on which the selection circuit 230 of the second embodiment is mounted will be described. FIG. 17 is a diagram showing an example of the configuration of the mounting area Sel on which the selection circuit 230 of the second embodiment is mounted. Note that in FIG. 17, the logic inversion circuits 232a, 232b, and 232c included in the selection circuit 230 are illustrated in a simplified form. Also, in FIG. 17, the description will be made using the x1 axis and y1 axis, which are the same axes as in FIG. 10 and are perpendicular to each other. Also, in the description of FIG. 17, as in the description of FIG. 10, the tip side of the arrow indicating the x1 axis will be referred to as the +x1 side and the starting side as the -x1 side, and the tip side of the arrow indicating the y1 axis will be referred to as the +y1 side and the starting side as the -y1 side. Furthermore, viewing the mounting area Sel from the normal direction of the plane formed by the x1 axis and the y1 axis may be referred to as a planar view of the mounting area Sel.

[0198] 17, like the mounting region Sel of the first embodiment, the mounting region Sel of the second embodiment includes a P-type substrate region Psub in which an impurity such as boron is added to a wafer substrate such as silicon, and an N-well region Nwell in which an impurity such as phosphorus is added to the P-type substrate region Psub. A ground signal GND at ground potential is supplied to the P-type substrate region Psub, and a voltage signal VHV is supplied to the N-well region Nwell.

[0199] In the P-type substrate region Psub, similarly to the first embodiment, N-type diffusion layers 331, 332, 333, 341, 342, and 343 and electrodes 334, 335, 344, and 345 are formed. In the N-well region Nwell, similarly to the first embodiment, P-type diffusion layers 351, 352, and 353 and electrodes 354 and 355 are formed, as well as P-type diffusion layers 371, 372, and 373 and electrodes 374 and 375.

[0200] The P-type diffusion layers 371, 372, and 373 are located on the +y1 side of the N-type diffusion layers 341, 342, and 343 and on the −y1 side of the P-type diffusion layers 351, 352, and 353, and are arranged in the order of P-type diffusion layer 371, P-type diffusion layer 372, and P-type diffusion layer 373, from the −x1 side to the +x1 side along the x1 axis. The electrodes 374 and 375 are located in the order of electrode 374, electrode 375, from the −x1 side to the +x1 side along the x1 axis. At this time, in a plan view of the mounting region Sel, the electrode 374 is positioned such that its end on the −x1 side overlaps with a portion of the P-type diffusion layer 371 and its end on the +x1 side overlaps with a portion of the P-type diffusion layer 372, and the electrode 375 is positioned such that its end on the −x1 side overlaps with a portion of the P-type diffusion layer 372 and its end on the +x1 side overlaps with a portion of the P-type diffusion layer 373. That is, in a plan view of the mounting region Sel, the electrode 374 is positioned between the P-type diffusion layers 371 and 372 so as to bridge the two layers, and the electrode 375 is positioned between the P-type diffusion layers 372 and 373 so as to bridge the two layers. Furthermore, an oxide film (not shown) or the like is formed as an insulating layer between the electrode 374 and the N-well region Nwell, and between the electrode 375 and the N-well region Nwell.

[0201] In the selection circuit 230 mounted in the mounting area Sel as described above, the drive voltage signal ComA is input to the N-type diffusion layer 341 and the P-type diffusion layer 351 via electrodes (not shown), and the drive voltage signal ComB is input to the N-type diffusion layer 343 and the P-type diffusion layer 353 via electrodes (not shown). The selection signal Sa is input to an electrode 344, and after its logic level is inverted in a logic inversion circuit 232a, is also input to an electrode 354. The selection signal Sb is input to an electrode 345, and after its logic level is inverted in a logic inversion circuit 232b, is also input to an electrode 355. The selection signal Sc is input to electrodes 334 and 335, and after its logic level is inverted in a logic inversion circuit 232c, is also input to electrodes 374 and 375. The selection circuit 230 mounted in the mounting area Sel outputs the signals of the N-type diffusion layer 342 and the P-type diffusion layer 352 as a drive voltage signal Vin via an electrode not shown, and outputs a residual vibration signal Vout generated in the corresponding ejection section 600 in response to the drive voltage signal Vin from the N-type diffusion layers 331, 333 via an electrode not shown and the N-type diffusion layer 332, and from the P-type diffusion layers 371, 373 via an electrode not shown and the P-type diffusion layer 372.

[0202] Specifically, when an H-level selection signal Sa is input to the selection circuit 230 mounted in the mounting region Sel, in a plan view of the mounting region Sel, a channel having a channel width Wcn2 is formed in a P-type substrate region Psub that is between the N-type diffusion layer 341 and the N-type diffusion layer 342 and overlaps with the electrode 344, and a channel having a channel width Wcn3 is formed in an N-well region Nwell that is between the P-type diffusion layer 351 and the P-type diffusion layer 352 and overlaps with the electrode 354. As a result, the drive voltage signal ComA supplied to the N-type diffusion layer 341 and the P-type diffusion layer 351 is supplied to the N-type diffusion layer 342 and the P-type diffusion layer 352 and output as the drive voltage signal Vin.

[0203] Similarly, when an H-level selection signal Sb is input to the selection circuit 230 mounted in the mounting region Sel, a channel having a channel width Wcn2 is formed in a P-type substrate region Psub that is between the N-type diffusion layer 342 and the N-type diffusion layer 343 and overlaps with the electrode 345 in a plan view of the mounting region Sel, and a channel having a channel width Wcn3 is formed in an N-well region Nwell that is between the P-type diffusion layer 352 and the P-type diffusion layer 353 and overlaps with the electrode 355 in a plan view of the mounting region Sel. As a result, the drive voltage signal ComB supplied to the N-type diffusion layer 343 and the P-type diffusion layer 353 is supplied to the N-type diffusion layer 342 and the P-type diffusion layer 352 and output as the drive voltage signal Vin.

[0204] Also, a selection signal Sc of H level is input to the selection circuit 230 mounted in the mounting area Sel. When the electrode 334 is inserted, in a plan view of the mounting region Sel, a channel having a channel width Wcn1 is formed in a P-type substrate region Psub between the N-type diffusion layer 331 and the N-type diffusion layer 332, overlapping with the electrode 334; in a plan view of the mounting region Sel, a channel having a channel width Wcn1 is formed in a P-type substrate region Psub between the N-type diffusion layer 332 and the N-type diffusion layer 333, overlapping with the electrode 335; in a plan view of the mounting region Sel, a channel having a channel width Wcn5 is formed in an N-well region Nwell between the P-type diffusion layer 371 and the P-type diffusion layer 372, overlapping with the electrode 374; and in a plan view of the mounting region Sel, a channel having a channel width Wcn5 is formed in an N-well region Nwell between the P-type diffusion layer 372 and the P-type diffusion layer 373, overlapping with the electrode 375. As a result, the residual vibration signal Vout, which is a signal supplied to the N-type diffusion layer 332 and the P-type diffusion layer 372 and corresponds to the residual vibration generated in the corresponding discharge section 600 in response to the drive voltage signal Vin, is supplied to the N-type diffusion layers 331, 333 and the P-type diffusion layers 371, 373 and is output as the residual vibration signal Vout.

[0205] The residual vibration signal Vout as the residual vibration signal dVout output from the N-type diffusion layers 331, 333 and the P-type diffusion layers 371, 373 mounted in this mounting area Sel propagates through the wiring Wvo and is input to the residual vibration detection circuit 250 mounted in the mounting area Amp.

[0206] That is, the N-type diffusion layers 341 and 342 and the electrode 344 constitute an n-type transistor 236a included in the switch circuit 234a, the P-type diffusion layers 351 and 352 and the electrode 354 constitute a p-type transistor 238a included in the switch circuit 234a, the N-type diffusion layers 343 and 342 and the electrode 345 constitute an n-type transistor 236b included in the switch circuit 234b, and the P-type diffusion layers 353 and 352 and the electrode 355 constitute an n-type transistor 238b included in the switch circuit 234b. , constitute a p-type transistor 238b included in switch circuit 234b, N-type diffusion layers 331, 332 and electrode 334, and N-type diffusion layers 332, 333 and electrode 335 constitute an n-type transistor 236c included in switch circuit 234c, and P-type diffusion layers 371, 372 and electrode 374, and P-type diffusion layers 372, 373 and electrode 375 constitute a p-type transistor 238c included in switch circuit 234c.

[0207] At this time, a ground signal GND of the ground potential supplied to the P-type substrate region Psub is supplied to the back gate terminal of the n-type transistor 236a included in the switch circuit 234a, the back gate terminal of the n-type transistor 236b included in the switch circuit 234b, and the back gate terminal of the n-type transistor 236c included in the switch circuit 234c, and a voltage signal VHV supplied to the N-well region Nwell is supplied to the back gate terminal of the p-type transistor 238a included in the switch circuit 234a, the back gate terminal of the p-type transistor 238b included in the switch circuit 234b, and the back gate terminal of the p-type transistor 238c included in the switch circuit 234c.

[0208] Next, a specific example of the mounting area Sw on which the switch circuit 242 of the second embodiment is mounted will be described. FIG. 18 is a diagram illustrating an example of the configuration of the mounting area Sw on which the switch circuit 242 of the second embodiment is mounted. Note that in FIG. 18, the logic inversion circuit 243 included in the switch circuit 242 is illustrated in a simplified form. Here, FIG. 18 will be described using the x2 axis and y2 axis, which are the same axes as in FIG. 11 and are perpendicular to each other. In the description of FIG. 18, the tip side of the arrow indicating the x2 axis will be referred to as the +x2 side, and the starting side will be referred to as the -x2 side. The tip side of the arrow indicating the y2 axis will be referred to as the +y2 side, and the starting side will be referred to as the -y2 side. In addition, viewing the mounting area Sw from the normal direction of the plane formed by the x2 axis and the y2 axis may be referred to as a planar view of the mounting area Sw.

[0209] As shown in FIG. 18, the mounting region Sw of the second embodiment includes a P-type substrate region Psub in which an impurity such as boron is added to a wafer substrate such as silicon included in the mounting region Sw of the first embodiment, and an N-well region Nwell A ground signal GND at ground potential is supplied to the P-type substrate region Psub, and a voltage signal VHV is supplied to the N-well region Nwell. Here, the N-well region Nwell included in the mounting region Sw of the second embodiment and the N-well region Nwell included in the mounting region Sel may be an integrated region, or may be separate regions.

[0210] As in the first embodiment, N-type diffusion layers 361, 362, and 363 and electrodes 364 and 365 are formed in the P-type substrate region Psub of the mounting region Sw. Furthermore, P-type diffusion layers 381, 382, ​​and 383 and electrodes 384 and 385 are formed in the N-well region Nwell of the mounting region Sw.

[0211] The P-type diffusion layers 381, 382, ​​and 383 are located on the +y1 side of the N-type diffusion layers 361, 362, and 363, and are arranged in the order of P-type diffusion layer 381, P-type diffusion layer 382, ​​and P-type diffusion layer 383, from the −x2 side to the +x2 side along the x2 axis. The electrodes 384 and 385 are located in the order of electrode 384, electrode 385, from the −x2 side to the +x2 side along the x2 axis. In this case, the electrode 384 is located such that its end on the −x2 side overlaps with a portion of the P-type diffusion layer 381 and its end on the +x2 side overlaps with a portion of the P-type diffusion layer 382, ​​when viewed in a plan view of the mounting region Sw. The electrode 385 is located such that its end on the −x2 side overlaps with a portion of the P-type diffusion layer 382 and its end on the +x2 side overlaps with a portion of the P-type diffusion layer 383, when viewed in a plan view of the mounting region Sw. That is, in a plan view of the mounting region Sw, the electrode 384 is located between the P-type diffusion layer 381 and the P-type diffusion layer 382 so as to bridge the P-type diffusion layer 381 and the P-type diffusion layer 382, ​​and the electrode 385 is located between the P-type diffusion layer 382 and the P-type diffusion layer 383 so as to bridge the P-type diffusion layer 382 and the P-type diffusion layer 383. In addition, an oxide film (not shown) or the like is formed as an insulating layer between the electrode 384 and the N-well region Nwell, and between the electrode 385 and the N-well region Nwell.

[0212] In the switch circuit 242 mounted in the mounting area Sw as described above, the drive voltage signal ComB is input to the N-type diffusion layers 361 and 363 and the P-type diffusion layers 381 and 383 via electrodes (not shown). In addition, the switch control signal SS is input to electrodes 364, 365, 384, and 385. Then, the switch circuit 242 mounted in the mounting area Sw outputs the signals of the N-type diffusion layer 362 and the P-type diffusion layer 382 as the drive voltage signal bCom via electrodes (not shown).

[0213] Specifically, when an H-level switch control signal SS is input to the switch circuit 242 mounted in the mounting area Sw, in a planar view of the mounting area Sw, a channel having a channel width Wcn4 is formed in a P-type substrate region Psub that overlaps with the electrode 364 between the N-type diffusion layer 361 and the N-type diffusion layer 362; in a planar view of the mounting area Sw, a channel having a channel width Wcn4 is formed in a P-type substrate region Psub that overlaps with the electrode 365 between the N-type diffusion layer 362 and the N-type diffusion layer 363; in a planar view of the mounting area Sw, a channel having a channel width Wcn6 is formed in an N-well region Nwell that overlaps with the electrode 384 between the P-type diffusion layer 381 and the P-type diffusion layer 382; and in a planar view of the mounting area Sw, a channel having a channel width Wcn6 is formed in an N-well region Nwell that overlaps with the electrode 385 between the P-type diffusion layer 382 and the P-type diffusion layer 383. As a result, the drive voltage signal ComB supplied to the N-type diffusion layers 361, 363 and the P-type diffusion layers 381, 382 is supplied to the N-type diffusion layer 362 and the P-type diffusion layer 382 and output as the drive voltage signal bCom.

[0214] The drive voltage signal bCom output from the N-type diffusion layer 362 and the P-type diffusion layer 382 mounted in this mounting area Sw propagates through the wiring Wbc and is input to the residual vibration detection circuit 250 mounted in the mounting area Amp.

[0215] That is, the N-type diffusion layers 361, 362 and electrode 364, the N-type diffusion layers 362, 363 and electrode 365 constitute an n-type transistor 242a, and the P-type diffusion layers 381, 382 and electrode 384, the P-type diffusion layers 382, ​​383 and electrode 385 constitute a p-type transistor 242b. At this time, a ground signal GND of the ground potential supplied to the P-type substrate region Psub is supplied to the back gate terminal of the n-type transistor 242a, and a voltage signal VHV supplied to the N-well region Nwell is supplied to the back gate terminal of the p-type transistor 242b.

[0216] As described above, in the liquid ejection device 1 of the second embodiment, the drive voltage signal bCom and the residual vibration signal dVout are input to the residual vibration detection circuit 250 mounted in the mounting area Amp. The residual vibration detection circuit 250 mounted in the mounting area Amp then generates and outputs the residual vibration detection signal NVT by amplifying a signal corresponding to the difference between the drive voltage signal ComB as the input drive voltage signal bCom and the residual vibration signal Vout as the residual vibration signal dVout. That is, the residual vibration detection circuit 250 of the second embodiment outputs the residual vibration detection signal NVT obtained by differentially amplifying the residual vibration signal Vout input via the p-type transistor 238c and the drive voltage signal ComB input via the p-type transistor 242b.

[0217] Even in the liquid ejection device 1 of the second embodiment, the residual vibration detection circuit 250 differentially amplifies the residual vibration signal Vout input via the p-type transistor 238c and the drive voltage signal ComB input via the p-type transistor 242b, so that even if a ripple voltage of the voltage signal VHV input to the back gate terminal is superimposed on the residual vibration signal Vout input via the p-type transistor 238c, the ripple voltage is canceled out. As a result, the detection accuracy of the residual vibration occurring after the piezoelectric element 60 is driven can be improved.

[0218] At this time, the p-type transistor 238c of the selection circuit 230 mounted in the mounting area Sel is electrically connected to the residual vibration detection circuit 250, and a wiring Wvo through which the residual vibration signal Vout propagates as the residual vibration signal dVout, the p-type transistor 238c of the switch circuit 242 mounted in the mounting area Sw is electrically connected to the residual vibration detection circuit 250, and a wiring Wbc through which the drive voltage signal ComB propagates as the drive voltage signal bCom, and the voltage signal VHV is connected to the mounting area Sel on which the selection circuit 230 is mounted, In the integrated circuit 300, it is preferable that the wiring Wvh that propagates to the mounting area Sw in which the switch circuit 242 is mounted, and that propagates the voltage signal VHV supplied to the back gate terminal of the p-type transistor 238c of the selection circuit 230 and the back gate terminal of the p-type transistor 242b of the switch circuit 242, is arranged such that at least a portion of the wiring Wvo is arranged along the wiring Wvh, and at least a portion of the wiring Wbc is arranged along the wiring Wvh, and the wiring Wvh is located between the wiring Wvo and the wiring Wbc.

[0219] 19 is a diagram illustrating an example of the structure of an integrated circuit 300 on which a drive signal selection circuit 200 included in a liquid ejection device 1 according to the second embodiment is implemented. As shown in FIG. 19 , in the integrated circuit 300 according to the second embodiment, the wiring Wvh through which the voltage signal VHV propagates extends along the Y-axis, i.e., the longitudinal direction of the integrated circuit 300, between the mounting areas Dec and Sel, and is electrically connected to m mounting areas Sel, Sw, and Amp. The wiring Wvo through which the residual vibration signal Vout propagates as the residual vibration signal dVout is located on the +Y side of the wiring Wvh between the mounting areas Dec and Sel, and extends along the Y-axis, i.e., the longitudinal direction of the integrated circuit 300. The wiring Wbc through which the drive voltage signal ComB propagates as the drive voltage signal bCom is located on the −Y side of the wiring Wvh and extends along the Y-axis, i.e., the longitudinal direction of the integrated circuit 300.

[0220] As shown in FIG. 19 , between the mounting area Sw and the mounting area Amp, at least a portion of the wiring Wvo is arranged along the wiring Wvh, and at least a portion of the wiring Wbc is arranged along the wiring Wvh, with the wiring Wvh being located between the wiring Wvo and the wiring Wbc. This reduces the difference between the contribution of the ripple voltage of the voltage signal VHV to the residual vibration signal Vout (residual vibration signal dVout) propagating through the wiring Wvo and the contribution of the ripple voltage of the voltage signal VHV to the drive voltage signal ComB (drive voltage signal bCom) propagating through the wiring Wbc. This allows the residual vibration detection circuit 250, which differentially amplifies the residual vibration signal Vout input via the p-type transistor 238c and the drive voltage signal ComB input via the p-type transistor 242b, to more accurately cancel the ripple voltage of the voltage signal VHV superimposed on the residual vibration signal Vout. As a result, the accuracy of detecting residual vibrations occurring after the piezoelectric element 60 is driven can be further improved.

[0221] Furthermore, in the liquid ejection device 1 of the second embodiment, m mounting areas Sel are electrically connected to the wiring Wvo. That is, m p-type transistors 238c, whose back gate terminals are supplied with the voltage signal VHV, are electrically connected to the wiring Wvo. Therefore, there is a risk that the ripple voltage of the voltage signal VHV will contribute to the residual vibration signal dVout propagating through the wiring Wvo via the back gate terminals included in each of the m p-type transistors 238c.

[0222] From the viewpoint of reducing the influence of the ripple voltage of the voltage signal VHV that contributes to the residual vibration signal dVout propagating through such wiring Wvo via m p-type transistors 238c electrically connected to the wiring Wvo, it is preferable to make the sum of the channel widths of one or more transistors electrically connected to the wiring Wvo and having the voltage signal VHV supplied to their back gate terminals approximately equal to the sum of the channel widths of one or more transistors electrically connected to the wiring Wbc and having the voltage signal VHV supplied to their back gate terminals.

[0223] Specifically, in the integrated circuit 300 of the liquid ejection device 1 of the second embodiment, the wiring Wvo is electrically connected to m mounting areas Sel. That is, the wiring Wvo is electrically connected to m transistors, including m P-channel transistors each composed of P-type diffusion layers 371, 372 and an electrode 374, and m P-channel transistors each composed of P-type diffusion layers 372, 373 and an electrode 375. Therefore, the total channel width of one or more transistors electrically connected to the wiring Wvo, the back gate terminal of which is supplied with the voltage signal VHV, is the sum of "m×Wcn5", which is the total channel width of the m P-channel transistors each composed of the P-type diffusion layers 371, 372 and the electrode 374, and "m×Wcn5", which is the total channel width of the m P-channel transistors each composed of the P-type diffusion layers 372, 373 and the electrode 375, or "2×m×Wcn5".

[0224] On the other hand, in the integrated circuit 300 of the liquid ejection device 1 of the second embodiment, the wiring Wbc is electrically connected to the mounting region Sw. That is, the wiring Wvo is electrically connected to a P-channel transistor configured of P-type diffusion layers 381, 382 and an electrode 384, and a P-channel transistor configured of P-type diffusion layers 382, ​​383 and an electrode 385. Therefore, among one or more transistors electrically connected to the wiring Wbc, the total channel width of one or more transistors to whose back gate terminals the voltage signal VHV is supplied is "Wcn6", which is the total channel width of the P-channel transistor configured of the P-type diffusion layers 381, 382 and the electrode 384. and "Wcn6" which is the total channel width of the P-channel transistor formed by the P-type diffusion layers 382, ​​383 and the electrode 385, and is thus "2×Wcn5".

[0225] Furthermore, by making the sum of the channel widths of one or more transistors electrically connected to the wiring Wvo, whose back gate terminals receive the voltage signal VHV, "2×m×Wcn5," and the sum of the channel widths of one or more transistors electrically connected to the wiring Wbc, whose back gate terminals receive the voltage signal VHV, "2×Wcn5," approximately equal, the difference between the contribution of the ripple voltage of the voltage signal VHV that contributes to the residual vibration signal dVout propagating through the wiring Wvo via the back gate terminals of the m p-type transistors 238c connected to the wiring Wvo and the contribution of the ripple voltage of the voltage signal VHV that contributes to the drive voltage signal ComB as the drive voltage signal bCom propagating through the wiring Wbc can be reduced. This enables the residual vibration detection circuit 250 to more accurately cancel the ripple voltage of the voltage signal VHV superimposed on the residual vibration signal Vout. As a result, the accuracy of detecting residual vibration occurring after the piezoelectric element 60 is driven can be further improved.

[0226] That is, by making the total channel width of the transistor group consisting of one or more transistors including the p-type transistor 238c, one end of which is electrically connected to the wiring Wvo, and the back gate terminal of which is supplied with the voltage signal VHV, approximately equal to the total channel width of the transistor group consisting of one or more transistors including the p-type transistor 242b, one end of which is electrically connected to the wiring Wbc, and the back gate terminal of which is supplied with the voltage signal VHV, it becomes possible to more accurately cancel out the ripple voltage of the voltage signal VHV superimposed on the residual vibration signal Vout in the residual vibration detection circuit 250. As a result, it is possible to further improve the accuracy of detecting the residual vibration that occurs after the piezoelectric element 60 is driven.

[0227] In the liquid ejection device 1 of the second embodiment, the p-type transistor 238c is an example of a first transistor, the p-type transistor 242b is an example of a second transistor, the voltage signal VHV is an example of a constant potential signal, the wiring Wvo is an example of a first wiring, the wiring Wbc is an example of a second wiring, and the wiring Wvh is an example of a third wiring. A transistor group including the p-type transistor 238c, one end of which is electrically connected to the wiring Wvo, and one or more transistors having back gate terminals to which the voltage signal VHV is supplied is an example of a first transistor group, and a transistor group including the p-type transistor 242b, one end of which is electrically connected to the wiring Wbc, and one or more transistors having back gate terminals to which the voltage signal VHV is supplied is an example of a second transistor group.

[0228] 3. Variations In the liquid ejection device 1 of this embodiment described above, the ejection section 600 that ejects ink has been described as having one pressure chamber 631 as an example, but the configuration of the ejection section 600 that ejects ink is not limited to this, and similar effects can be achieved, for example, even with a configuration that has two or more pressure chambers 631 for one nozzle 651 and piezoelectric elements 60 corresponding to each pressure chamber 631.

[0229] Furthermore, in the liquid ejection device 1 of this embodiment, it has been explained that the volume of the pressure chamber 631 is changed by driving the piezoelectric element 60, and the piezoelectric element 60 outputs a signal corresponding to the residual vibration caused by the volume change of the pressure chamber 631, but the piezoelectric element 60 that changes the volume of the pressure chamber 631 and the piezoelectric element 60 that outputs a signal corresponding to the residual vibration caused by the volume change of the pressure chamber 631 may be different piezoelectric elements. Even with such a configuration, the same effects can be achieved.

[0230] Although the embodiments and modifications have been described above, the present invention is not limited to these embodiments and can be embodied in various forms without departing from the spirit of the present invention. For example, the above embodiments can be combined as appropriate.

[0231] The present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations with the same functions, methods, and results, or configurations with the same purpose and effects). The present invention also includes configurations in which non-essential parts of the configurations described in the embodiments are replaced. The present invention also includes configurations that achieve the same effects as the configurations described in the embodiments or that can achieve the same purpose. The present invention also includes configurations in which publicly known technology is added to the configurations described in the embodiments.

[0232] The following can be derived from the above-described embodiment.

[0233] One embodiment of the print head comprises: a pressure chamber whose volume changes in response to a drive signal; a nozzle communicating with the pressure chamber and discharging a liquid; a piezoelectric element that outputs a residual vibration signal corresponding to the residual vibration caused by a change in the volume of the pressure chamber; a residual vibration detection circuit that outputs a residual vibration detection signal corresponding to the residual vibration signal; a first transistor that switches whether or not the residual vibration signal is supplied to the residual vibration detection circuit; a second transistor that switches whether or not the drive signal is supplied to the residual vibration detection circuit; Equipped with a constant potential signal is supplied to the back gate terminal of the first transistor; the constant potential signal is supplied to a back gate terminal of the second transistor; The residual vibration detection circuit outputs the residual vibration detection signal obtained by differentially amplifying the residual vibration signal input via the first transistor and the drive signal input via the second transistor.

[0234] According to this printhead, the residual vibration detection circuit outputs a residual vibration detection signal obtained by differentially amplifying the residual vibration signal input via the first transistor, whose back gate terminal is supplied with a constant potential signal, and the drive signal input via the second transistor, whose back gate terminal is supplied with a constant potential signal. That is, the residual vibration detection circuit differentially amplifies the signals output by the first transistor and the second transistor, whose back gate terminals are supplied with a common signal, and outputs the residual vibration detection signal. Therefore, even if noise is superimposed on the residual vibration signal due to the signal input to the back gate terminal in the first transistor, which switches whether or not to supply the residual vibration signal to the residual vibration detection circuit, the noise superimposed on the residual vibration signal is canceled out in the residual vibration detection circuit. As a result, the accuracy of the residual vibration detection signal corresponding to the residual vibration signal output by the residual vibration detection circuit, i.e., the accuracy of detecting residual vibrations caused by volume changes in the pressure chamber, is improved.

[0235] In one embodiment of the print head, The residual vibration detection circuit a detection resistor having one end electrically connected to one end of the first transistor and the other end electrically connected to one end of the second transistor; a differential amplifier circuit that amplifies a potential difference between one end and the other end of the detection resistor; may have

[0236] In one embodiment of the print head, the piezoelectric element is displaced in response to the drive signal, The volume of the pressure chamber may change in accordance with the displacement of the piezoelectric element.

[0237] According to this print head, there is no need to provide a dedicated piezoelectric element for generating residual vibration in the pressure chamber, and the print head can be made smaller.

[0238] In one embodiment of the print head, a first wiring that electrically connects the first transistor and the residual vibration detection circuit and through which the residual vibration signal propagates; a second wiring that electrically connects the second transistor and the residual vibration detection circuit and through which the drive signal propagates; a third wiring through which the constant potential signal supplied to the back gate terminal of the first transistor and the back gate terminal of the second transistor propagates; and At least a portion of the first wiring is disposed along the third wiring, At least a portion of the second wiring is disposed along the third wiring, At least a portion of the third wiring may be located between the first wiring and the second wiring.

[0239] This print head can further reduce the difference between the level of noise superimposed on the residual vibration signal input to the residual vibration detection circuit via the first transistor and the level of noise superimposed on the drive signal input to the residual vibration detection circuit via the second transistor. As a result, the residual vibration detection circuit can more accurately cancel out the noise superimposed on the residual vibration signal. This improves the accuracy of the residual vibration detection signal corresponding to the residual vibration signal output by the residual vibration detection circuit, and therefore the accuracy of detecting residual vibrations caused by volumetric changes in the pressure chambers.

[0240] In one embodiment of the print head, a first transistor group consisting of one or more transistors, one end of which is electrically connected to the first wiring and the constant potential signal is supplied to a back gate terminal of the first transistor group; a second transistor group consisting of one or more transistors, one end of which is electrically connected to the second wiring and the constant potential signal is supplied to a back gate terminal of the second transistor group; and the first transistor group includes the first transistor, the second transistor group includes the second transistor, A total channel width of one or more transistors included in the first transistor group may be approximately equal to a total channel width of one or more transistors included in the second transistor group.

[0241] This print head can further reduce the difference between the level of noise superimposed on the residual vibration signal input to the residual vibration detection circuit via the first transistor and the level of noise superimposed on the drive signal input to the residual vibration detection circuit via the second transistor. As a result, the residual vibration detection circuit can more accurately cancel out the noise superimposed on the residual vibration signal. This improves the accuracy of the residual vibration detection signal corresponding to the residual vibration signal output by the residual vibration detection circuit, and therefore the accuracy of detecting residual vibrations caused by volumetric changes in the pressure chambers.

[0242] One aspect of the liquid ejection device is a drive circuit that outputs a drive signal; a pressure chamber whose volume changes in response to the drive signal; a nozzle communicating with the pressure chamber and discharging a liquid; A piezoelectric element that outputs a residual vibration signal corresponding to the residual vibration caused by the volume change of the pressure chamber. With my child, a residual vibration detection circuit that outputs a residual vibration detection signal corresponding to the residual vibration signal; a first transistor that switches whether or not the residual vibration signal is supplied to the residual vibration detection circuit; a second transistor that switches whether or not the drive signal is supplied to the residual vibration detection circuit; a processor that determines a state of ejection of liquid from the nozzle based on the residual vibration detection signal; Equipped with a constant potential signal is supplied to the back gate terminal of the first transistor; the constant potential signal is supplied to a back gate terminal of the second transistor; The residual vibration detection circuit outputs the residual vibration detection signal obtained by differentially amplifying the residual vibration signal input via the first transistor and the drive signal input via the second transistor.

[0243] According to this liquid ejection device, the print head's residual vibration detection circuit outputs a residual vibration detection signal obtained by differentially amplifying a residual vibration signal input via a first transistor whose back gate terminal receives a constant potential signal and the drive signal input via a second transistor whose back gate terminal receives a constant potential signal. That is, the residual vibration detection circuit differentially amplifies signals output from the first and second transistors whose back gate terminals receive a common signal, and outputs the residual vibration detection signal. Therefore, even if noise is superimposed on the residual vibration signal due to the signal input to the back gate terminal in the first transistor, which switches whether or not to supply the residual vibration signal to the residual vibration detection circuit, the noise superimposed on the residual vibration signal is canceled out in the residual vibration detection circuit. As a result, the accuracy of the residual vibration detection signal corresponding to the residual vibration signal output by the residual vibration detection circuit, i.e., the accuracy of detecting residual vibrations caused by volumetric changes in the pressure chamber, is improved.

[0244] In one aspect of the liquid ejection device, The residual vibration detection circuit a detection resistor having one end electrically connected to one end of the first transistor and the other end electrically connected to one end of the second transistor; a differential amplifier circuit that amplifies a potential difference between one end and the other end of the detection resistor; may have

[0245] In one aspect of the liquid ejection device, the piezoelectric element is displaced in response to the drive signal, The volume of the pressure chamber may change in accordance with the displacement of the piezoelectric element.

[0246] According to this liquid ejection device, there is no need to provide a dedicated piezoelectric element for generating residual vibration in the pressure chamber, and the print head can be made smaller.

[0247] In one aspect of the liquid ejection device, a first wiring that electrically connects the first transistor and the residual vibration detection circuit and through which the residual vibration signal propagates; a second wiring that electrically connects the second transistor and the residual vibration detection circuit and through which the drive signal propagates; a third wiring through which the constant potential signal supplied to the back gate terminal of the first transistor and the back gate terminal of the second transistor propagates; and At least a portion of the first wiring is disposed along the third wiring, At least a portion of the second wiring is disposed along the third wiring, At least a portion of the third wiring may be located between the first wiring and the second wiring.

[0248] This liquid ejection device can further reduce the difference between the level of noise superimposed on the residual vibration signal input to the residual vibration detection circuit via the first transistor and the level of noise superimposed on the drive signal input to the residual vibration detection circuit via the second transistor.As a result, the residual vibration detection circuit can more accurately cancel out the noise superimposed on the residual vibration signal.This improves the accuracy of the residual vibration detection signal corresponding to the residual vibration signal output by the residual vibration detection circuit, and therefore the detection accuracy of residual vibrations caused by volumetric changes in the pressure chambers.

[0249] In one aspect of the liquid ejection device, a first transistor group consisting of one or more transistors, one end of which is electrically connected to the first wiring and the constant potential signal is supplied to a back gate terminal of the first transistor group; a second transistor group consisting of one or more transistors, one end of which is electrically connected to the second wiring and the constant potential signal is supplied to a back gate terminal of the second transistor group; and the first transistor group includes the first transistor, the second transistor group includes the second transistor, A total channel width of one or more transistors included in the first transistor group may be approximately equal to a total channel width of one or more transistors included in the second transistor group.

[0250] This liquid ejection device can further reduce the difference between the level of noise superimposed on the residual vibration signal input to the residual vibration detection circuit via the first transistor and the level of noise superimposed on the drive signal input to the residual vibration detection circuit via the second transistor.As a result, the residual vibration detection circuit can more accurately cancel out the noise superimposed on the residual vibration signal.This improves the accuracy of the residual vibration detection signal corresponding to the residual vibration signal output by the residual vibration detection circuit, and therefore the detection accuracy of residual vibrations caused by volumetric changes in the pressure chambers. [Explanation of symbols]

[0251] 1...liquid ejection device, 2...control unit, 3...liquid container, 4...transport unit, 5...ejection unit, 10...drive module, 11...control circuit board, 15...cable, 20...ejection module, 21...print head, 22...head chip, 23...head circuit board, 24...flexible board, 41...transport motor, 42...transport roller, 50...drive circuit, 60...piezoelectric element, 100...control circuit, 110...power supply circuit, 200...drive signal Selection circuit, 220... selection control circuit, 222... register, 224... latch circuit, 226... decoder, 230... selection circuit, 232a, 232b, 232c... logic inversion circuit, 234a, 234b, 234c... switch circuit, 236a, 236b, 236c... n-type transistor, 238a, 238b, 238c... p-type transistor, 240... switching circuit, 242... switch circuit, 242a... n-type transistor, 242b... p type transistor, 243... logic inversion circuit, 244... OR circuit, 250... residual vibration detection circuit, 270... waveform information output circuit, 300... integrated circuit, 310... substrate, 311, 312... short side, 313, 314... long side, 331, 332, 333... N-type diffusion layer, 334, 335... electrode, 341, 342, 343... N-type diffusion layer, 344, 345... electrode, 351, 352, 353... P-type diffusion layer, 354, 355... electrode, 361, 362, 363 3...N-type diffusion layer, 364, 365...electrodes, 371, 372, 373...P-type diffusion layer, 374, 375...electrodes, 381, 382, ​​383...P-type diffusion layer, 384, 385...electrodes, 600...discharge portion, 601...piezoelectric body, 611, 612...electrodes, 621...diaphragm, 631...pressure chamber, 632...nozzle plate, 641...reservoir, 651...nozzle, 661...supply port, C...compliance, C1, C2...capacitor, OP1...amplification circuit , P...media, PW1...power supply circuit, R1~R7...resistance, Tca, Tcb, Tch, Tck, Tlt, Tnv, Tsg, Tsi, Tvh, Tvi... terminal, Wbc, Wca, Wcb, Wch, Wck, Wlt, Wnv, Wsa, Wsb, Wsc, Wsg, Wsi, Wss, Wvh, Wvo... wiring

Claims

1. a pressure chamber whose volume changes in response to a drive signal; a nozzle communicating with the pressure chamber and discharging a liquid; a piezoelectric element that outputs a residual vibration signal corresponding to the residual vibration caused by a change in the volume of the pressure chamber; a residual vibration detection circuit that outputs a residual vibration detection signal corresponding to the residual vibration signal; a first transistor that switches whether or not the residual vibration signal is supplied to the residual vibration detection circuit; a second transistor that switches whether or not the drive signal is supplied to the residual vibration detection circuit; Equipped with a constant potential signal is supplied to a back gate terminal of the first transistor; the constant potential signal is supplied to a back gate terminal of the second transistor; the residual vibration detection circuit differentially amplifies the residual vibration signal input via the first transistor and the drive signal input via the second transistor and outputs the residual vibration detection signal. A print head characterized by:

2. The residual vibration detection circuit a detection resistor having one end electrically connected to one end of the first transistor and the other end electrically connected to one end of the second transistor; a differential amplifier circuit that amplifies a potential difference between one end and the other end of the detection resistor; having 2. The printhead of claim 1.

3. the piezoelectric element is displaced in response to the drive signal, The volume of the pressure chamber changes in accordance with the displacement of the piezoelectric element.

2. The printhead of claim 1.

4. a first wiring electrically connecting the first transistor and the residual vibration detection circuit and through which the residual vibration signal propagates; a second wiring electrically connecting the second transistor and the residual vibration detection circuit and through which the drive signal propagates; a third wiring through which the constant potential signal supplied to the back gate terminal of the first transistor and the back gate terminal of the second transistor propagates; and At least a portion of the first wiring is disposed along the third wiring, At least a portion of the second wiring is disposed along the third wiring, At least a portion of the third wiring is located between the first wiring and the second wiring.

2. The printhead of claim 1.

5. a first transistor group including one or more transistors, one end of which is electrically connected to the first wiring and the constant potential signal is supplied to a back gate terminal of the first transistor group; a second transistor group including one or more transistors, one end of which is electrically connected to the second wiring and the constant potential signal is supplied to a back gate terminal of the second transistor group; and the first transistor group includes the first transistor, the second transistor group includes the second transistor, a sum of the channel widths of one or more transistors included in the first transistor group is approximately equal to a sum of the channel widths of one or more transistors included in the second transistor group; 5. The printhead of claim 4.

6. a drive circuit that outputs a drive signal; a pressure chamber whose volume changes in response to the drive signal; a nozzle communicating with the pressure chamber and discharging a liquid; a piezoelectric element that outputs a residual vibration signal corresponding to the residual vibration caused by a change in the volume of the pressure chamber; a residual vibration detection circuit that outputs a residual vibration detection signal corresponding to the residual vibration signal; a first transistor that switches whether or not the residual vibration signal is supplied to the residual vibration detection circuit; a second transistor that switches whether or not the drive signal is supplied to the residual vibration detection circuit; a processor that determines a state of ejection of liquid from the nozzle based on the residual vibration detection signal; Equipped with a constant potential signal is supplied to a back gate terminal of the first transistor; the constant potential signal is supplied to a back gate terminal of the second transistor; the residual vibration detection circuit differentially amplifies the residual vibration signal input via the first transistor and the drive signal input via the second transistor and outputs the residual vibration detection signal. A liquid ejection device characterized by:

7. The residual vibration detection circuit a detection resistor having one end electrically connected to one end of the first transistor and the other end electrically connected to one end of the second transistor; a differential amplifier circuit that amplifies a potential difference between one end and the other end of the detection resistor; having 7. The liquid ejection device according to claim 6.

8. the piezoelectric element is displaced in response to the drive signal, The volume of the pressure chamber changes in accordance with the displacement of the piezoelectric element.

7. The liquid ejection device according to claim 6.

9. a first wiring electrically connecting the first transistor and the residual vibration detection circuit and through which the residual vibration signal propagates; a second wiring electrically connecting the second transistor and the residual vibration detection circuit and through which the drive signal propagates; a third wiring through which the constant potential signal supplied to the back gate terminal of the first transistor and the back gate terminal of the second transistor propagates; and At least a portion of the first wiring is disposed along the third wiring, At least a portion of the second wiring is disposed along the third wiring, At least a portion of the third wiring is located between the first wiring and the second wiring.

7. The liquid ejection device according to claim 6.

10. One end is electrically connected to the first wiring, and the constant potential signal is supplied to a back gate terminal. a first transistor group consisting of one or more transistors; a second transistor group including one or more transistors, one end of which is electrically connected to the second wiring and the constant potential signal is supplied to a back gate terminal of the second transistor group; and the first transistor group includes the first transistor, the second transistor group includes the second transistor, a sum of the channel widths of one or more transistors included in the first transistor group is approximately equal to a sum of the channel widths of one or more transistors included in the second transistor group; The liquid ejection device according to claim 9 .

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