Multilayer ceramic capacitor and circuit board

Abstract

To provide a thin multilayer ceramic capacitor with suppressed electrostatic capacitance degradation.SOLUTION: A multilayer ceramic capacitor 100 includes: a cuboid element body 10 having a stack 20 in which ceramic layers 21 and internal electrodes 22a, 22b are alternately stacked, a protective portion 30 covering a surface of the stack, and a plurality of via conductors 23a, 23b arranged so as to pass through the ceramic layers in the stacking direction of the stack, electrically connected to the internal electrodes, and having at least one end portion reaching the surface of the protective portion; and a plurality of terminal electrodes 40a, 40b that are arranged on at least a mounting face 11, which is a face facing a circuit board when the multilayer ceramic capacitor is mounted on the circuit board, among faces forming the surfaces of the element body, and that are connected electrically to the via conductors, respectively. The element body includes a capacitance forming portion 12, and an internal electrode partially facing portion 13 formed by a region in which the internal electrodes of the same polarity overlap in the stacking direction, and each via conductor arranged adjacent to the region, and the thickness of the internal electrode partially facing portion in the stacking direction is less than the maximum thickness of the capacitance forming portion in the stacking direction.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic capacitor and a circuit board. [Background technology]

[0002] A wide variety of ceramic electronic components are used in high-frequency communication systems, such as mobile phones. These ceramic electronic components are required to be smaller and thinner, and efforts are being made to make them smaller and thinner in multilayer ceramic capacitors as well.

[0003] Patent Document 1 discloses a thin, break-resistant multilayer ceramic capacitor in which via-hole electrodes that electrically connect internal electrode layers to each other and between internal electrode layers and terminal electrodes have voids formed therein. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2020-72263 Summary of the Invention [Problem to be solved by the invention]

[0005] In a multilayer ceramic capacitor equipped with via-hole electrodes (via conductors) as disclosed in Patent Document 1, there is a large difference in the thermal expansion coefficient between the via conductors, which are primarily composed of metal, and the ceramic layers in contact with them. Therefore, when firing is performed during the manufacturing process or when large temperature changes occur during use, cracks may occur between the via conductors and the ceramic layers due to the difference in the amount of expansion or contraction between them. If these cracks extend and reach the interface between the internal electrode in contact with the ceramic layer and the via conductor connected to it, they can cause poor connection of the internal electrodes, leading to a decrease in capacitance.

[0006] The present invention has been made to solve the above problems, and has an object to provide a thin multilayer ceramic capacitor in which a decrease in capacitance is suppressed, and a circuit board on which the multilayer ceramic capacitor is mounted. [Means for solving the problem]

[0007] The inventors conducted various studies to solve the above-mentioned problems and discovered that the above-mentioned object can be achieved in a multilayer ceramic capacitor in which internal electrodes are electrically connected to each other through via conductors by making the thickness of the element body thinner in the vicinity of the via conductors than in other parts, thereby completing the present invention.

[0008] That is, a first aspect of the present invention for solving the above-mentioned problems provides a rectangular parallelepiped element body having a laminate in which ceramic layers made of ceramic and internal electrodes mainly composed of metal are alternately stacked, a protective part covering the surface of the laminate, and a plurality of via conductors arranged to penetrate the ceramic layers in the stacking direction of the laminate, electrically connected to the internal electrodes, and at least one end of which reaches the surface of the protective part, and a plurality of terminal electrodes arranged at least on a mounting surface that faces a circuit board when mounted on the circuit board, of each surface forming the surface of the element body, and electrically connected to the via conductors, wherein the element body has a capacitance forming portion that is a region where the internal electrodes of different polarities overlap in the stacking direction, and an internal electrode portion opposing portion formed by a region where the internal electrodes of the same polarity overlap in the stacking direction and the via conductors arranged adjacent to said region, and p is smaller than the maximum thickness T1 of the capacitance forming portion in the lamination direction.

[0009] A second aspect of the present invention for solving the above problem is a circuit board on which the multilayer ceramic capacitor according to the first aspect is mounted. [Effects of the Invention]

[0010] According to the present invention, it is possible to provide a thin multilayer ceramic capacitor in which a decrease in capacitance is suppressed, and a circuit board on which the multilayer ceramic capacitor is mounted. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a schematic view (perspective view) showing the structure of a multilayer ceramic capacitor according to a first embodiment of the present invention. [Figure 2] 2 is a cross-sectional view taken along line AA (LT cross-sectional view) in FIG. 1. [Figure 3A] 10 is a schematic diagram (LT cross-sectional view) showing another example of the shape of the internal electrode portion opposing portion. FIG. [Figure 3B] 10 is a schematic diagram (LT cross-sectional view) showing another example of the shape of the internal electrode portion opposing portion. FIG. [Figure 4] 10 is a diagram illustrating a procedure for determining whether the thickness Tp of the internal electrode portion opposing portion in the stacking direction of the multilayer ceramic capacitor is smaller than the maximum thickness T1 of the capacitance forming portion in the stacking direction. [Figure 5] FIG. 10 is a schematic view (LT cross-sectional view) showing the structure of a modified example of the multilayer ceramic capacitor according to the second embodiment of the present invention. [Figure 6] FIG. 10 is a schematic view (LT cross-sectional view) showing the structure of a multilayer ceramic capacitor according to a third embodiment of the present invention. [Figure 7] FIG. 10 is a schematic view (perspective view) showing the structure of a multilayer ceramic capacitor according to a fourth embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0012] The configuration and effects of the present invention will be described below, along with the technical concept, with reference to the drawings. However, the mechanism of action includes assumptions, and the correctness of such assumptions does not limit the present invention.

[0013] [Multilayer ceramic capacitors] First Embodiment An embodiment of a multilayer ceramic capacitor according to a first aspect of the present invention is shown in FIGS. 1 and 2 as a first embodiment. The multilayer ceramic capacitor 100 according to the first embodiment has a rectangular parallelepiped shape and includes a pair of faces perpendicular to each of three mutually orthogonal axes, i.e., the L-axis, which is the length direction, the W-axis, which is the width direction, and the T-axis, which is the height direction. The rectangular parallelepiped is not limited to a mathematically defined rectangular parallelepiped, and may have any shape that is recognized as a rectangular parallelepiped when observed as a whole. Therefore, a rectangular parallelepiped in the present disclosure also includes a capacitor with rounded edges and corners, a capacitor with curved edges, and a capacitor with curved faces with a small curvature. The length (L), width (W), and height (T) dimensions of the ceramic capacitor 100 can each independently take any value.

[0014] The dimensions of the multilayer ceramic capacitor 100 are, for example, an L-direction dimension of 200 μm to 2000 μm, a W-direction dimension of 100 μm to 2000 μm, and a T-direction dimension of 30 μm to 220 μm, with a value W / L (the ratio of the W-direction dimension to the L-direction dimension) of 0.3 to 1.0. It is preferable that the L-direction dimension be 400 μm to 1200 μm, the W-direction dimension be 400 μm to 1200 μm, and the T-direction dimension be 40 μm to 150 μm, with a value W / L (the ratio of the W-direction dimension to the L-direction dimension) of 0.4 to 1.0. It is more preferable that the T-direction dimension be 100 μm or less, as this is less subject to design constraints on the circuit board on which it is mounted.

[0015] 2 (LT cross section), the multilayer ceramic capacitor 100 according to the first embodiment includes a laminate 20 in which ceramic layers 21 made of ceramic and internal electrodes 22 mainly composed of metal are alternately stacked in the T direction, and an element body 10 having a protective part 30 covering the surface of the laminate 20. The internal electrodes 22 include internal electrodes 22a of one polarity that are electrically connected to each other, and internal electrodes 22b of a polarity different from that of the internal electrodes 22a that are electrically connected to each other.

[0016] A protective portion 30 is arranged on the surface of the element body 10, covering the surface of the laminate 20. The protective portion 30 includes a cover portion 31 arranged on a plane perpendicular to the T direction, and margin portions 32 arranged on a plane perpendicular to the W direction and a plane perpendicular to the L direction, respectively.

[0017] The element body 10 has a plurality of via conductors 23 that are arranged to penetrate the ceramic layers 21 in the stacking direction of the laminate 20, are electrically connected to the internal electrodes 22, and have at least one end reaching the surface of the protective part 30 (cover part 31). The via conductors 23 include a via conductor 23a electrically connected to the internal electrode 22a and a via conductor 23b electrically connected to the internal electrode 22b. Note that although the multilayer ceramic capacitor 100 shown in FIGS. 1 and 2 includes two via conductors 23, the number of via conductors in the multilayer ceramic capacitor according to the first aspect of the present invention is not limited to this.

[0018] The multilayer ceramic capacitor 100 according to the first embodiment is arranged at least on a mounting surface 11, which is the surface that faces the circuit board when mounted on the circuit board, among the surfaces that form the surface of the element body 10, and includes a plurality of terminal electrodes 40 electrically connected to via conductors 23 (23a, 23b). The terminal electrodes 40 include a terminal electrode 40a electrically connected to the via conductor 23a and a terminal electrode 40b electrically connected to the via conductor 23b. Note that although the multilayer ceramic capacitor 100 shown in FIGS. 1 and 2 includes two terminal electrodes 40, the number of terminal electrodes in the multilayer ceramic capacitor according to the first aspect of the present invention is not limited to this.

[0019] The element body 10 includes a capacitance forming portion 12, which is a region where internal electrodes 22a and 22b having different polarities overlap in the stacking direction, a region where internal electrodes 22a or internal electrodes 22b having the same polarity overlap in the stacking direction, and an internal electrode portion facing portion 13 formed by via conductors 23 arranged adjacent to the region. p is smaller than the maximum thickness T1 of the capacitance forming portion 12 in the stacking direction. pBy satisfying <T1>, the decrease in the capacitance of the multilayer ceramic capacitor 100 is suppressed. This is because the thickness of the base body 10 is thin and the thickness of the internal electrode portion facing portion 13 is thinner than that of the capacitance forming portion 12, so in the internal electrode portion facing portion 13, the absolute amount of expansion or contraction in the stacking direction becomes small, and even when a difference occurs in the amount of expansion or contraction due to the difference in the coefficient of thermal expansion between the via conductor 23 (23a, 23b) and the ceramic layer 21, it is presumed that cracking and its elongation at the interface between the two do not occur. Note that in FIG. 2, an example is shown in which only the mounting surface 11 located in the internal electrode portion facing portion 13 is recessed toward the laminate 20 side, but the shape of the internal electrode portion facing portion 13 in the multilayer ceramic capacitor according to the first aspect of the present invention is not limited to this. For example, like the multilayer ceramic capacitor 100' shown in FIG. 3A, only the surface facing the mounting surface 11 may be recessed toward the laminate 20 side, or like the multilayer ceramic capacitor 100'' shown in FIG. 3B, both the mounting surface 11 and the surface facing it may be recessed toward the laminate 20 side.

[0020] Here, the thickness T in the stacking direction of the internal electrode portion facing portion 13 pWhether the thickness T1 of the capacitance forming portion 12 in the lamination direction is smaller than the maximum thickness T1 is determined by the following procedure. First, a surface perpendicular to the mounting surface of the multilayer ceramic capacitor 100 is ground to expose the vicinity of the center of gravity of the via conductor 23a. Grinding may be performed on a multilayer ceramic capacitor 100 embedded in resin. Next, the ground surface where the via conductor 23a is exposed is observed with an optical microscope or a scanning electron microscope (SEM), and an image is obtained in which the boundary between the via conductor 23a and the ceramic layer 21, as well as the mounting surface 11 and the surface facing it, are in the same field of view, as shown in FIG. 4. Note that in FIG. 4, the terminal electrode 40a is omitted to make the positions of the capacitance forming portion 12 and the internal electrode portion facing portion 13 easier to understand. Next, in the obtained image, the internal electrodes 22 (22a, 22b) are observed near the via conductor 23a, and a line segment e is drawn connecting the end points of the internal electrode 22b that is not connected to the via conductor 23a on the via conductor 23a side. At this time, if each end point of the internal electrode 22b does not exist on a specific line segment, the line segment closest to each of the points is drawn as line segment e. Depending on the arrangement of the internal electrodes 22 (22a, 22b), line segment e may be drawn on both sides of the via conductor 23a or on only one side. Next, the region where the internal electrodes 22 (22a, 22b) are formed and located on the via conductor 23a side, with line segment e as the boundary, is defined as the internal electrode portion facing portion 13, including the via conductor 23a. Furthermore, the region where the internal electrodes are formed and located on the opposite side of the line segment e from the via conductor 23a is defined as the capacitance forming portion 12. Next, in the region defined as the capacitance forming portion 12, the longest line segment that is parallel to the line segment e that defines the boundary with the internal electrode portion facing portion 13 and connects the mounting surface 11 to the surface facing it is determined as line segment t1, and the value obtained by dividing the length of line segment t1 by the magnification of the microscope image is defined as the maximum thickness T1 in the stacking direction of the capacitance forming portion 12. Next, at an arbitrary point in the region defined as the internal electrode portion facing portion 13, a line segment t that is parallel to line segment t1 and connects the surface of the cover portion 31 that forms the mounting surface 11 to the surface of the cover portion 31 that forms the surface facing it is determined as the maximum thickness T1 in the stacking direction of the capacitance forming portion 12. p The length of the line segment t1 is divided by the magnification of the microscope image, and the resulting value is used as the thickness T of the internal electrode portion facing portion 13 in the lamination direction at the arbitrary point. p Then, T pWhen the relationship of T1 holds for the entire internal electrode portion facing portion 13, it is determined that the thickness T in the stacking direction of the internal electrode portion facing portion 13 p is smaller than the maximum thickness T1 in the stacking direction of the capacitance forming portion 12. Note that the above procedure is for the vicinity of the via conductor 23a, but it is needless to say that it may be carried out in the vicinity of the via conductor 23b having a different polarity.

[0021] The internal electrode portion facing portion 13 has a thickness T in the stacking direction p When the minimum value is T2, the value of T1 - T2 is preferably 0.2 μm or more and 40 μm or less, more preferably 0.5 μm or more and 35 μm or less, and even more preferably 1 μm or more and 30 μm or less. When the value of T1 - T2 is 0.2 μm or more, the above-described effect of suppressing the decrease in capacitance becomes remarkable. On the other hand, when the value of T1 - T2 is 40 μm or less, it is possible to suppress a decrease in mechanical strength due to a decrease in the thickness of the element body 10.

[0022] The internal electrode portion facing portion 13 has a thickness T in the stacking direction p When the minimum value is T2, the value of {(T1 - T2) / T1}×100, that is, the percentage of the difference between the maximum thickness T1 of the capacitance forming portion 12 and the minimum thickness T2 of the internal electrode portion facing portion 13 with respect to the maximum thickness of the capacitance forming portion 12 is preferably 0.2% or more and 40% or less, more preferably 0.5% or more and 35% or less, and even more preferably 1% or more and 30% or less. When the value of {(T1 - T2) / T1}×100 is 0.2% or more, the above-described effect of suppressing the decrease in capacitance becomes remarkable. On the other hand, when the value of {(T1 - T2) / T1}×100 is 40% or less, it is possible to suppress a decrease in mechanical strength due to a decrease in the thickness of the element body 10.

[0023] In the internal electrode portion facing portion 13, T pIt is preferable that the value of increases from the position where the via conductor 23 is formed toward the capacitance forming portion 12, in order to prevent a decrease in the mechanical strength of the element body 10. Furthermore, in this case, it is more preferable that the shape of the mounting surface 11 or the surface facing thereto in the internal electrode portion facing portion 13 is such that the amount of protrusion increases from the position where the via conductor 23 is formed toward the capacitance forming portion 12. This is presumably because, in a surface having the above-mentioned shape, the direction of the normal varies depending on the position, thereby preventing stress concentration at a specific location. If either the mounting surface 11 or the surface facing thereto has the above-mentioned shape, a decrease in the mechanical strength of the element body 10 is significantly prevented, but it is most preferable that both the mounting surface 11 and the surface facing thereto have the above-mentioned shape, in order to prevent a decrease in the mechanical strength of the element body 10.

[0024] The thickness of the element body 10, obtained by subtracting the thickness of the terminal electrodes 40 (40a, 40b) from the T-direction dimension of the multilayer ceramic capacitor 100 described above, is, for example, 20 μm to 200 μm, and preferably 30 μm to 180 μm.

[0025] Hereinafter, each component constituting the multilayer ceramic capacitor 100 according to the first embodiment will be described in detail.

[0026] (ceramic layer) The ceramic layer 21 is made of ceramic. The ceramic composition is not particularly limited as long as it forms a dense ceramic layer 21 by co-firing with the internal electrodes 22 described later, and may be appropriately selected depending on the properties required for the multilayer ceramic capacitor. Examples of ceramic compositions include those containing barium titanate (BaTiO3) as the main component, those containing strontium titanate (SrTiO3) as the main component, and those containing BaTiO3 having a perovskite structure. 1-x-y Ca x Sr y Ti 1-z Zr zExamples of such ceramics include those containing O3 as a main component. The ceramic may contain an additive element in addition to the main component. Examples of the additive element include at least one selected from Mo, Nb, Ta, W, Mg, Mn, V, Cr, rare earth elements (Y, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb), and Co, Ni, Li, B, Na, K, and Si. The additive element may be contained as a simple element or in the form of a compound such as an oxide, nitride, or carbide. The additive element may exist in a solid solution state in the main component, or may form a different phase from the elements constituting the main component or other additive elements.

[0027] (Internal electrode) The internal electrodes 22 (22a, 22b) are primarily composed of a metal. The type of metal is not particularly limited, and nickel (Ni), copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), and alloys thereof can be used. Among these, nickel (Ni) is preferred as the primary element because of its high heat resistance, which allows the firing temperature to be increased when co-firing with the ceramic layer 21 to form a dense ceramic layer 21, and it is relatively inexpensive. Here, the term "primary element" as used herein refers to the element with the highest content expressed in atomic percentage (atomic %).

[0028] The internal electrodes 22 (22a, 22b) may contain, in addition to metal, ceramic particles having the same composition as the ceramic constituting the ceramic layer 21, or a glass component.

[0029] (Protection Department) The protective part 30 has a function of protecting the ceramic layers 21 and the internal electrodes 22. The material of the protective part 30 is not limited as long as it has high electrical insulation and low permeability to deterioration factors such as moisture. From the viewpoints of making shrinkage during firing when manufacturing the multilayer ceramic capacitor 100 uniform and alleviating internal stress within the multilayer ceramic capacitor 100, it is preferable that the main component of the protective part 30 be the same as the ceramic that forms the ceramic layers 21.

[0030] (Via conductor) Like the internal electrodes 22 (22a, 22b), the via conductors 23 (23a, 23b) are primarily composed of metal. Usable metals include those similar to those of the internal electrodes 22 (22a, 22b) described above. The composition of the via conductors may be different from that of the internal electrodes 22 (22a, 22b), but is preferably the same as that of the internal electrodes 22 (22a, 22b). By making the via conductors (23a, 23b) and the internal electrodes 22 (22a, 22b) the same composition, the magnitude of shrinkage caused by firing during manufacturing of the multilayer ceramic capacitor 100 is uniform, suppressing deformation, and the resistivity of the conductive paths of the multilayer ceramic capacitor 100 is uniform, suppressing localized heat generation during use.

[0031] The diameter of the via conductors 23 (23a, 23b) is not particularly limited, but is preferably 5 μm to 100 μm, more preferably 10 μm to 50 μm, from the viewpoint of reducing electrical resistance and suppressing heat generation during circuit operation while ensuring the capacitance of the multilayer ceramic capacitor 100. These preferred diameters are also preferable because they enable the diameter of the recesses 121 formed in the opposing surface 12 to be effective in suppressing charging.

[0032] The via conductors 23 (23a, 23b) preferably have a recess at their end on the opposing surface 12 side in a cross section parallel to the stacking direction of the laminate 20, i.e., at their end on the side covered by the protective portion 30 (cover portion 31). The recess at the end of the via conductors 23 (23a, 23b) on the opposing surface 12 side is formed as a result of the end of the via conductors 23 (23a, 23b) following the deformation of the cover portion-forming green sheet when forming the recess 121 on the opposing surface 12 during the manufacturing process of the multilayer ceramic capacitor 100, which will be described later. Therefore, the presence of a recess at the end of the via conductors 23 (23a, 23b) on the opposing surface 12 side indicates high adhesion between the via conductors 23 (23a, 23b) and the adjacent cover portion 31, ceramic layer 21, and internal electrode 22 (22a, 22b), thereby obtaining a multilayer ceramic capacitor 100 with high mechanical strength.

[0033] (terminal electrode) The material of the terminal electrodes 40 (40a, 40b) is not limited as long as it is conductive, and examples of the material include metals such as nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), and gold (Au), alloys containing any of these as a main component, and conductive resins.

[0034] The terminal electrodes 40 (40a, 40b) may have an underlying conductor 41 in contact with the element body 10 and a plated conductor 42 formed on the surface of the underlying conductor 41. The terminal electrodes 40 (40a, 40b) having such a structure can improve adhesion to the element body 10 by the underlying conductor 41, and can improve solder wettability by the plated conductor 42 when mounted on a circuit board.

[0035] Ni is an example of the material of the underlying conductor 41. The thickness of the underlying conductor 41 can be set to 0.1 μm or more and 10 μm or less, and preferably 0.5 μm or more and 5 μm or less.

[0036] The plated conductor 42 may be formed of a single layer or multiple layers. When the plated conductor 42 is formed of multiple layers, the number of layers is preferably two to four. An example of the material and structure of the plated conductor 42 is one formed of Cu, Ni, and Sn in this order. The thickness of the plated conductor 42 can be 1 μm to 20 μm, and preferably 3 μm to 10 μm.

[0037] <Second embodiment> In a multilayer ceramic capacitor according to another embodiment (second embodiment) of the multilayer ceramic capacitor according to the first aspect of the present invention, the outer edges of the laminate and the via conductors may overlap in a cross section passing through the via conductors and parallel to the stacking direction. An example of such a multilayer ceramic capacitor 200 is shown in Fig. 5. In the multilayer ceramic capacitor 200, the area of ​​the internal electrode portion opposing portion 13 in a plane perpendicular to the stacking direction can be reduced, and the area of ​​the capacitance forming portion 12 can be increased accordingly, which has the advantage of providing a larger capacitance.

[0038] <Third embodiment> In another embodiment (third embodiment) of the multilayer ceramic capacitor according to the first aspect of the present invention, the internal electrodes are extended to a surface perpendicular to the mounting surface, and external electrodes are disposed on the surfaces (extended surfaces) to which the internal electrodes are extended, and electrical connection between the internal electrodes is also established via the external electrodes. An example of a multilayer ceramic capacitor 300 according to the third embodiment is shown in FIG. 6. While FIG. 6 shows an example in which two opposing surfaces are extended as extended surfaces 14, the number of extended surfaces is not limited to this. Also, FIG. 6 shows an example in which terminal electrodes 40 (40a, 40b) extending to the extended surfaces 14 form external electrodes 50 (50a, 50b). However, the external electrodes 50 (50a, 50b) may be formed separately from the terminal electrodes 40 (40a, 40b). Furthermore, in FIG. 6, there are regions on both the left and right ends of the multilayer ceramic capacitor 300 where only portions of the internal electrodes overlap in the stacking direction. However, these regions do not correspond to the internal electrode portion facing portions defined in the present invention because no via conductors are disposed adjacent to these regions. In the multilayer ceramic capacitor 300, the current flowing through the internal electrodes 22 (22a, 22b) is divided between the via conductors 23 (23a, 23b) and the external electrodes 50 (50a, 50b), thereby reducing the current flowing through each of the via conductors 23 (23a, 23b) and the external electrodes 50 (50a, 50b). This reduces heat generation during operation.

[0039] <Fourth embodiment> In another embodiment (fourth embodiment) of the multilayer ceramic capacitor according to the first aspect of the present invention, the number of terminal electrodes arranged on the mounting surface is four or more, and each of the terminal electrodes has a polarity opposite to that of the nearest terminal electrode on the mounting surface. An example of a multilayer ceramic capacitor 400 according to a third embodiment is shown in FIG. 7. While FIG. 7 shows an example in which the number of terminal electrodes 40 arranged on the mounting surface 11 is four, the number of terminal electrodes arranged on the mounting surface is not limited to this. The multilayer ceramic capacitor 400 has an advantage in that the directions of currents flowing through via conductors (not shown) electrically connected to the respective terminal electrodes 40 (40a, 40b) are opposite to each other in the nearest conductors, thereby causing magnetic fields generated by the currents to cancel each other out, thereby reducing the equivalent series inductance (ESL). The above-mentioned effects are remarkable when the multilayer ceramic capacitor 400 has two pairs of surfaces that are parallel to the stacking direction of the laminate and face each other, and when the distance between one pair, i.e., the L-direction dimension, is L μm and the distance between the other pair, i.e., the W-direction dimension, is W μm (where L≧W), and when the value of W / L, which is the ratio of W to L, is 0.8 or more and 1 or less, i.e., when the mounting surface 11 has a shape that is close to a square.

[0040] [Manufacturing method for multilayer ceramic electronic components] The multilayer ceramic capacitor according to the first aspect of the present invention can be manufactured by the procedure described below.

[0041] (A) Preparation of ceramic powder First, ceramic powder is prepared. Commercially available ceramic powders can be used as appropriate. When producing ceramic powder in-house, various raw material powders containing the constituent elements are mixed in a predetermined ratio and pre-fired (calcined). When mixing the various raw material powders in a predetermined ratio, various additives such as the above-mentioned additive elements and sintering aids may be further added, or these various additives may be further added to the powder after calcination.

[0042] (B) Preparation of raw sheets Next, the ceramic powder is mixed with a binder and a dispersion medium to prepare a slurry, and the slurry is formed into a sheet to obtain a green sheet.

[0043] The binder used should be one that can maintain the shape of the green sheet and volatilizes without leaving behind carbon or other residues during the binder removal process prior to firing. Examples of binders that can be used include polyvinyl alcohol, polyvinyl butyral, cellulose, urethane, and vinyl acetate. There are no particular restrictions on the amount of binder used, but since it will be removed in a later process, it is preferable to use as little as possible within the range that achieves the desired formability and shape retention, in order to reduce raw material costs.

[0044] The dispersion medium used is one that does not cause aggregation of the calcined powder and binder and can be easily removed by volatilization or the like after forming into a green sheet, as described below. Examples of the dispersion medium that can be used include water and alcohol-based solvents.

[0045] Components for adjusting the properties of the slurry, such as dispersants, plasticizers, and thickeners, may be added to the slurry.

[0046] The method for mixing the mixed powder with the binder and the dispersion medium is not particularly limited as long as the components are mixed uniformly while preventing the inclusion of impurities. One example is ball mill mixing.

[0047] The prepared slurry can be formed into a sheet to obtain a green sheet by a commonly used method such as a doctor blade method or a die coating method.

[0048] ((C) Formation of internal electrode pattern) Next, an internal electrode pattern containing metal is formed on the green sheet. The internal electrode pattern can be formed by printing or applying an internal electrode paste in a predetermined pattern, or by forming a metal film in a predetermined pattern by vapor deposition or sputtering. The internal electrode pattern is formed with a sufficient margin to ensure electrical insulation with via conductor patterns that will be formed later and that will not come into contact with the via conductor patterns. This margin forms the internal electrode portion facing portion in the element body obtained after firing, which will be described later.

[0049] When forming an internal electrode pattern using an internal electrode paste, the internal electrode paste used is obtained by mixing metal particles and a vehicle in a triple roll mill. The internal electrode paste may contain glass frit and ceramic powder in addition to the above-mentioned components.

[0050] The type and amount of binder and solvent contained in the vehicle used are not limited, and may be selected appropriately taking into consideration the viscosity of the internal electrode paste, ease of handling, compatibility with the green sheet, and the like.

[0051] The internal electrode paste can be printed on the green sheet using, for example, a screen mask on which a predetermined internal electrode pattern is formed. When printing, a space may be left to become a margin when the multilayer ceramic capacitor is completed.

[0052] (D) Preparation of green laminate Next, a predetermined number of green sheets on which the internal electrode patterns are formed are stacked and the green sheets are pressure-bonded together to obtain a green laminate. The stacking and pressure-bonding can be performed by a conventional method, such as pressing the stacked green sheets together in the stacking direction while heating them, and thermocompression bonding using the action of a binder. At this time, by pressing using a mold with protrusions at positions corresponding to the internal electrode portion facing portions, the thickness of the internal electrode portion facing portions can be made thinner than the capacitance-forming portions.

[0053] During lamination and compression bonding, a green sheet that will become a cover when the multilayer ceramic capacitor is completed may be added to the end portion in the lamination direction. In this case, the green sheet to be added may have the same composition as the green sheet on which the internal electrode pattern is printed, or a different composition. From the viewpoint of making the shrinkage rate during firing uniform, it is preferable that the composition of the green sheet to be added is the same as or similar to the green sheet on which the above-mentioned internal electrode precursor is arranged.

[0054] ((E) Formation of via conductor pattern) Next, holes are formed in the green laminate, and the holes are filled with a conductive paste to form a via conductor pattern. Conventional methods such as drilling or lasers can be used to form the holes. Lasers are preferred because they can produce a smooth processed surface. Conventional methods such as syringe injection and metal mask printing can be used to fill the holes with the conductive paste. Metal mask printing is preferred because it has excellent filling properties for small-diameter holes. The components of the conductive paste can be the same as those of the internal electrode paste described above, and the amount of each component can be determined taking into account the hole filling properties.

[0055] ((F) Formation of terminal electrode pattern) Next, a terminal electrode pattern is formed on at least one of the surfaces (mounting surface) perpendicular to the lamination direction of the green laminate. A green sheet, which will serve as a cover when the laminate is completed, may be crimped onto the surface on which the terminal electrode pattern is not formed, so as to cover the via conductor pattern. The terminal electrode pattern can be formed by printing or applying a terminal electrode paste, or by forming a metal film by vapor deposition or sputtering. The terminal electrode pattern can be formed using a mask with a predetermined pattern, or by forming a paste film or metal film on the entire mounting surface of the green laminate and then removing the area other than the terminal electrode pattern. Face milling, barrel polishing, or other methods can be used to remove the area other than the terminal electrode pattern. When using a terminal electrode paste to form the terminal electrode pattern, the components can be the same as those of the internal electrode paste described above. The blending amounts of each component can be determined to obtain a uniform pattern with a predetermined thickness.

[0056] (G) Preparation of pre-fired chips Next, the green laminate is divided into individual pieces to obtain pre-fired chips. For the division, a commonly used means such as a dicing saw or a laser cutting machine can be used. After dividing the green laminate into individual pieces to form surfaces on which the internal electrode precursors are exposed, the surfaces may be coated with a material for forming margins to obtain pre-fired chips.

[0057] (H) Removal of binder Next, the resulting pre-fired chips are heated to volatilize and remove the binder. The heating conditions can be set appropriately taking into account the volatilization temperature and content of the binder. For example, the chips are held in a nitrogen (N2) atmosphere at a temperature of 200 to 500°C for 5 to 20 hours.

[0058] (I) Firing of pre-fired chips Next, the pre-fired chip from which the binder has been removed is heated to a predetermined temperature and fired. When setting the firing conditions, it is preferable to consider the sinterability of the ceramic powder, as well as the heat resistance and oxidation resistance of the metals contained in the internal electrode pattern, via conductor pattern, and terminal electrode pattern. An example of firing conditions is holding the chip at a temperature of 1100°C to 1400°C for 10 minutes to 2 hours in a reducing atmosphere containing a mixture of nitrogen (N2), hydrogen (H2), and water vapor (H2O). After firing, a reoxidation treatment may be performed in which the chip is held at 600°C to 1000°C in a nitrogen (N2) gas atmosphere or a low-oxygen atmosphere.

[0059] The sintered body thus obtained may be used as a multilayer ceramic capacitor as it is, or may be used as a multilayer ceramic capacitor after forming a conductive layer on the surface of the terminal electrode pattern by plating.

[0060] [Circuit board] A circuit board according to a second aspect of the present invention is equipped with the multilayer ceramic capacitor according to the first embodiment. This circuit board is highly reliable and can be installed in a small space because the multilayer ceramic capacitor is a thin type that suppresses the reduction in capacitance.

[0061] This specification also discloses the following techniques.

[0062] (Appendix 1) a laminate in which ceramic layers formed of ceramic and internal electrodes mainly composed of metal are alternately stacked; a protective portion covering the surface of the laminate; and a plurality of via conductors arranged to penetrate the ceramic layers in the stacking direction of the laminate, electrically connected to the internal electrodes, and having at least one end reaching the surface of the protective portion; A rectangular parallelepiped element having the following structure: A plurality of terminal electrodes are disposed at least on the mounting surface, which is the surface that faces the circuit board when mounted on the circuit board, among the surfaces that form the surface of the element body, and are electrically connected to the via conductors. Equipped with The element body is a capacitance forming portion which is a region where the internal electrodes of different polarities overlap each other in the stacking direction; and an area where the internal electrodes of the same polarity overlap in the stacking direction, and an internal electrode portion facing portion formed by the via conductors arranged adjacent to that area; Equipped with The thickness T of the internal electrode portion facing portion in the lamination direction p is smaller than the maximum thickness T1 of the capacitance forming portion in the lamination direction. Multilayer ceramic capacitor.

[0063] (Appendix 2) The multilayer ceramic capacitor according to (Appendix 1), wherein the distance between the mounting surface and the surface facing the internal electrode portion opposing portion increases from the formation position of the via conductor toward the capacitance forming portion.

[0064] (Appendix 3) Said T p The multilayer ceramic capacitor according to (Appendix 1) or (Appendix 2), wherein when the minimum value of T1-T2 is T2, the value of T1-T2 is 0.2 μm or more and 40 μm or less.

[0065] (Appendix 4) Said T p (Appendix 1) to (Appendix 3), wherein when the minimum value of T1 is defined as T2, the value of {(T1-T2) / T1}×100, which is the percentage of the difference between T1 and T2 relative to T1, is 0.2% or more and 40% or less.

[0066] (Appendix 5) The multilayer ceramic capacitor according to any one of (Appendix 1) to (Appendix 4), wherein the dimension in the lamination direction is 100 μm or less.

[0067] (Appendix 6) A circuit board on which the multilayer ceramic capacitor according to any one of (Supplementary Note 1) to (Supplementary Note 5) is mounted. [Industrial Applicability]

[0068] According to the present invention, it is possible to provide a thin multilayer ceramic capacitor in which a decrease in capacitance is suppressed. Such a multilayer ceramic capacitor is not only highly reliable but also useful in that it can be arranged in a narrow space, thereby reducing restrictions on the design of a circuit board. [Explanation of symbols]

[0069] 100, 100', 100'', 200, 300, 400 Multilayer ceramic capacitors 10 Base 11 Mounting surface 12 Capacitance forming part 13 Internal electrode part opposing part 14 Drawer surface 20 laminate 21 ceramic layer 22(22a, 22b) Internal electrode 23(23a, 23b) Via conductor 30 Protection Department 31 Cover 32 Margin 40(40a, 40b) terminal electrode 41 Undercoat conductor 42 Plated conductor 50(50a, 50b) External electrode

Claims

1. a laminate in which ceramic layers formed of ceramic and internal electrodes mainly composed of metal are alternately stacked; a protective portion covering the surface of the laminate; and a plurality of via conductors arranged to penetrate the ceramic layers in the stacking direction of the laminate, electrically connected to the internal electrodes, and having at least one end reaching the surface of the protective portion; A rectangular parallelepiped element having the following structure: A plurality of terminal electrodes are disposed at least on the mounting surface, which is the surface that faces the circuit board when mounted on the circuit board, among the surfaces that form the surface of the element body, and are electrically connected to the via conductors. Equipped with The element body is a capacitance forming portion which is a region where the internal electrodes of different polarities overlap each other in the stacking direction; and an area where the internal electrodes of the same polarity overlap in the stacking direction, and an internal electrode portion facing portion formed by the via conductors arranged adjacent to that area; Equipped with The thickness T of the internal electrode portion facing portion in the lamination direction ｐ The maximum thickness T of the capacitance forming portion in the lamination direction １ Less than Multilayer ceramic capacitor.

2. The internal electrode portion facing portion is ｐ 2. The multilayer ceramic capacitor according to claim 1, wherein the value of .theta. increases from the position where the via conductor is formed to the capacitance forming portion.

3. Said T ｐ The minimum value of T ２ When this is done, T １ -T ２ 2. The multilayer ceramic capacitor according to claim 1, wherein the value of is 0.2 μm or more and 40 μm or less.

4. Said T ｐ The minimum value of T ２ When the above T １ and the aforementioned T ２ The difference between １ is the percentage of (T １ -T ２ ) / T １ 2. The multilayer ceramic capacitor according to claim 1, wherein the value of {overscore (R)}×100 is 0.2% or more and 40% or less.

5. 2. The multilayer ceramic capacitor according to claim 1, wherein the dimension in the lamination direction is 100 μm or less.

6. A circuit board having the multilayer ceramic capacitor according to any one of claims 1 to 5 mounted thereon.

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