Multilayer inductor
The laminated inductor design addresses structural defects by minimizing stress concentration through specific coil conductor layer configurations, improving reliability and impedance uniformity.
Patent Information
- Application Number
- JP2024040050
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-14
- Publication Date
- 2025-09-29
AI Technical Summary
The manufacturing of multilayer inductors can result in structural defects such as cracks due to stress generated during cutting, leading to reduced reliability.
A laminated inductor design with specific coil conductor layer configurations, including M+N first coil conductor layers connected in parallel via via conductors, and the inclusion of first and second external electrodes, reduces stress concentration and structural defects by minimizing the number of first extension conductors exposed to cutting stress.
The design suppresses the occurrence of cracks, enhancing the reliability of the multilayer inductor by reducing stress concentration and maintaining impedance and current density uniformity.
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Figure 2025140568000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a laminated inductor. [Background technology]
[0002] Patent Document 1 discloses a laminated inductor including a laminate made of a plurality of insulator layers, external electrodes formed on the outside of the laminate, and a coil conductor formed in a spiral shape inside the laminate, the coil conductor having lead-out portions electrically connected to the external electrodes and a coil main body excluding the lead-out portions, the coil conductor having conductor patterns formed on the insulator layers and via-hole conductors that penetrate the insulator layers and electrically connect the plurality of conductor patterns, the conductor patterns formed on some of the insulator layers being C-shaped patterns of a substantially rectangular shape that includes four vertices and has part of one side missing, and the conductor patterns formed on some of the insulator layers being I-shaped patterns corresponding to the part of the missing side of the C-shaped pattern of the substantially rectangular shape, the conductor patterns constituting the coil main body being only the C-shaped pattern and the I-shaped pattern, the coil main body having a partial structure in which two or more C-shaped patterns are continuously stacked, and the number of C-shaped patterns in the coil main body is greater than the number of I-shaped patterns. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-162101 Summary of the Invention [Problem to be solved by the invention]
[0004] Incidentally, the manufacturing of a multilayer inductor may include a step of cutting the laminate block by a method such as press cutting or dicer cutting. In the multilayer inductor described in Patent Document 1, stress generated when cutting the laminate block may cause structural defects such as cracks in the lead conductor itself or in the interface between the lead conductor and the insulating layer. If a structural defect occurs in the multilayer inductor, the risk of wire breakage or the like increases when the multilayer inductor is used, thereby reducing the reliability of the multilayer inductor.
[0005] The present invention has been made to solve the above problems, and has an object to provide a multilayer inductor that can suppress a decrease in reliability caused by structural defects such as cracks. [Means for solving the problem]
[0006] The laminated inductor of the present invention comprises a laminate formed by laminating a plurality of insulating layers in a lamination direction and having a coil therein, and first and second external electrodes provided on the outer surface of the laminate and electrically connected to the coil. The coil is formed by electrically connecting a plurality of coil conductor layers laminated in the lamination direction together with the insulating layers. The plurality of coil conductor layers include M+N first coil conductor layers (M and N are natural numbers) that are continuous in the lamination direction. Each of the first coil conductor layers has a first parallel portion. The first parallel portions of the first coil conductor layers adjacent to each other in the lamination direction are connected in parallel via at least two via conductors. Of the first coil conductor layers, M layer is a first lead layer that has a first lead conductor connected to the first external electrode, and N layer is a first non-lead layer that does not have the first lead conductor.
[0007] In a first embodiment, M is a natural number of 2 or more, and at least one first non-drawn layer is present between at least one pair of the first drawn layers in the stacking direction.
[0008] In a second aspect, when viewed from the stacking direction, the portion of the winding portion of the first extraction layer that forms the current path has the same orientation and shape as the portion of the winding portion of the first non-extraction layer that forms the current path. [Effects of the Invention]
[0009] According to the present invention, it is possible to provide a multilayer inductor that can suppress a decrease in reliability caused by structural defects such as cracks. [Brief explanation of the drawings]
[0010] [Figure 1] FIG. 1 is a perspective view schematically showing an example of a laminated inductor according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a perspective view of the laminated inductor shown in FIG. 1 in the height direction. [Figure 3] FIG. 3 is an exploded plan view schematically showing an example of the internal structure of the laminated inductor shown in FIG. [Figure 4] FIG. 4 is a perspective view of the laminated inductor shown in FIG. 1 in the width direction. [Figure 5] FIG. 5 is a perspective view of the laminated inductor of the comparative example seen in the height direction. [Figure 6] FIG. 6 is a perspective view of the laminated inductor of the comparative example seen in the width direction. [Figure 7] FIG. 7 is a schematic diagram showing an enlarged cross section of the first lead conductor taken along line VII-VII in FIG. [Figure 8] FIG. 8 is an exploded plan view schematically showing an example of a laminated inductor according to a second embodiment of the present invention. [Figure 9] FIG. 9 is an exploded plan view schematically showing an example of a laminated inductor according to a third embodiment of the present invention. [Figure 10] FIG. 10 is an exploded plan view schematically showing an example of a laminated inductor according to a fourth embodiment of the present invention. [Figure 11]FIG. 11 is an exploded plan view schematically showing an example of a laminated inductor according to a fifth embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0011] The laminated inductor of the present invention will be described below. Note that the present invention is not limited to the following configurations, and may be modified as appropriate within the scope of the present invention. Furthermore, a combination of multiple individual preferred configurations described below also constitutes the present invention.
[0012] In this specification, terms indicating the relationship between elements (e.g., "perpendicular," "parallel," "orthogonal," etc.) and terms indicating the shape of elements are not expressions that only express a strict meaning, but are expressions that also include a range of substantial equivalence, for example, a difference of a few percent.
[0013] The following embodiments are merely examples, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. From the second embodiment onwards, descriptions of matters common to the first embodiment will be omitted, and only differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned in each embodiment.
[0014] The drawings shown below are schematic diagrams, and the dimensions, aspect ratio, scale, etc. may differ from those of the actual product.
[0015] [First embodiment] FIG. 1 is a perspective view schematically showing an example of a laminated inductor according to a first embodiment of the present invention.
[0016] The multilayer inductor 1A shown in Fig. 1 includes a laminate 10A, a first external electrode 21, and a second external electrode 22. The laminate 10A has, for example, a rectangular parallelepiped or approximately rectangular parallelepiped shape having six sides. Although not shown in Fig. 1, the laminate 10A is formed by stacking multiple insulating layers in the stacking direction, and has a coil inside. The first external electrode 21 and the second external electrode 22 are each electrically connected to the coil.
[0017] In the laminated inductor 1A and the laminate 10A, the length direction, height direction, and width direction are defined as the L direction, T direction, and W direction in Fig. 1. Here, the length direction L, height direction T, and width direction W are perpendicular to each other.
[0018] In the example shown in FIG. 1, the laminate 10A has a first end face 11 and a second end face 12 facing each other in the length direction L, a first main face 13 and a second main face 14 facing each other in the height direction T, and a first side face 15 and a second side face 16 facing each other in the width direction W.
[0019] Although not shown in Fig. 1, the corners and ridges of the laminate 10A are preferably rounded. The corners of the laminate 10A are portions where three surfaces of the laminate 10A intersect, and the ridges of the laminate 10A are portions where two surfaces of the laminate 10A intersect.
[0020] The first external electrode 21 and the second external electrode 22 are provided on the outer surface of the laminate 10A.
[0021] For example, as shown in FIG. 1, the first external electrode 21 covers the entire first end face 11 of the laminate 10A and extends from the first end face 11 to cover a portion of the first main surface 13, a portion of the second main surface 14, a portion of the first side surface 15, and a portion of the second side surface 16.
[0022] As shown in FIG. 1, the second external electrode 22 covers the entire second end face 12 of the laminate 10A and extends from the second end face 12 to cover a portion of the first main face 13, a portion of the second main face 14, a portion of the first side face 15, and a portion of the second side face 16.
[0023] When mounting the laminated inductor 1A having the first external electrode 21 and the second external electrode 22 arranged as described above on a substrate, any one of the first main surface 13, the second main surface 14, the first side surface 15, and the second side surface 16 of the laminate 10A becomes the mounting surface.
[0024] FIG. 2 is a perspective view of the laminated inductor shown in FIG. 1 in the height direction.
[0025] In the laminated inductor 1A shown in FIG. 2, a laminate 10A has a coil 30A inside.
[0026] The coil 30A has a first extension conductor 51 and a second extension conductor 52, which will be described later. The coil 30A is connected to the first external electrode 21 via the first extension conductor 51. The coil 30A is connected to the second external electrode 22 via the second extension conductor 52.
[0027] FIG. 3 is an exploded plan view schematically showing an example of the internal structure of the laminated inductor shown in FIG.
[0028] 3, the laminate 10A (see FIG. 1) is configured by stacking a plurality of insulating layers IL1, IL2, IL3, IL4, IL5, IL6, IL7, and IL8 in a height direction T from a first main surface 13 (see FIG. 1) toward a second main surface 14 (see FIG. 1) of the laminate 10A. Hereinafter, the insulating layers IL1, IL2, IL3, IL4, IL5, IL6, IL7, and IL8 will also be collectively referred to as insulating layers IL.
[0029] In Figure 3, insulating layer IL1 is arranged on the upper side (the second main surface 14 side of the laminate 10A) in the stacking direction (here, the height direction T), and insulating layer IL8 is arranged on the lower side (the first main surface 13 side of the laminate 10A) in the stacking direction, and of the main surfaces of each insulating layer IL, the main surface on the negative side of the height direction T (the back side of the paper in Figure 3) is arranged on the lower side in the stacking direction, and the main surface on the positive side of the height direction T (the front side of the paper in Figure 3) is arranged on the upper side in the stacking direction.
[0030] The constituent material of each insulating layer IL may be, for example, a magnetic material such as a ferrite material.
[0031] 3, insulating layers IL1, IL2, IL3, IL4, IL5, IL6, IL7, and IL8 are provided with coil conductor layers CC1, CC2, CC3, CC4, CC5, CC6, CC7, and CC8, respectively. Hereinafter, the coil conductor layers CC1, CC2, CC3, CC4, CC5, CC6, CC7, and CC8 will also be collectively referred to as coil conductor layers CC.
[0032] The coil conductor layers CC1, CC2, CC3, CC4, CC5, CC6, CC7 and CC8 are respectively provided on the main surfaces of the insulating layers IL1, IL2, IL3, IL4, IL5, IL6, IL7 and IL8, specifically on the main surfaces on the positive side of the height direction T (the front side of the paper in Figure 3).
[0033] A plurality of coil conductor layers CC stacked together with insulating layers IL in the stacking direction (here, height direction T) are electrically connected to form a coil 30A (see FIG. 2).
[0034] The coil conductor layer CC1 of the first layer L1 is made up of a winding portion R1 and a first lead conductor 51. The insulating layer IL1 of the first layer L1 is provided with via conductors V1x and V1y that connect the coil conductor layer CC1 and the coil conductor layer CC2.
[0035] The coil conductor layer CC2 of the second layer L2 is made up of a winding portion R2. The insulating layer IL2 of the second layer L2 is provided with via conductors V2x and V2y that connect the coil conductor layer CC2 and the coil conductor layer CC3.
[0036] The coil conductor layer CC3 of the third layer L3 is made up of a winding portion R3. The insulating layer IL3 of the third layer L3 is provided with via conductors V3x and V3y that connect the coil conductor layer CC3 and the coil conductor layer CC4.
[0037] The coil conductor layer CC4 of the fourth layer L4 includes a winding portion R4 and a first lead conductor 51. The insulating layer IL4 of the fourth layer L4 is provided with a via conductor V4y that connects the coil conductor layer CC4 and the coil conductor layer CC5.
[0038] The coil conductor layer CC5 of the fifth layer L5 includes a winding portion R5 and a second lead conductor 52. The insulating layer IL5 of the fifth layer L5 is provided with via conductors V5x and V5y that connect the coil conductor layer CC5 and the coil conductor layer CC6.
[0039] The coil conductor layer CC6 of the sixth layer L6 is made up of a winding portion R6. The insulating layer IL6 of the sixth layer L6 is provided with via conductors V6x and V6y that connect the coil conductor layer CC6 and the coil conductor layer CC7.
[0040] The coil conductor layer CC7 of the seventh layer L7 is made up of a winding portion R7. The insulating layer IL7 of the seventh layer L7 is provided with via conductors V7x and V7y that connect the coil conductor layer CC7 and the coil conductor layer CC8.
[0041] The eighth layer (L8) of the coil conductor layer CC8 includes a winding portion (R8) and a second lead conductor (52).
[0042] Hereinafter, the winding portions R1, R2, R3, R4, R5, R6, R7, and R8 will also be collectively referred to as winding portion R.
[0043] The winding portion R forms the winding portion of the coil 30A when viewed from the coil axial direction (here, the height direction T).
[0044] Hereinafter, via conductors V1x, V1y, V2x, V2y, V3x, V3y, V4y, V5x, V5y, V6x, V6y, V7x, and V7y will also be collectively referred to as via conductors V.
[0045] The via conductors V are provided so as to penetrate the insulating layer IL in the stacking direction (here, the height direction T).
[0046] Lands may be provided on the main surface of the insulating layer IL to be connected to the via conductors V. In this case, the size of the lands may be slightly larger than the line width of the coil conductor layer CC excluding the land portion.
[0047] Examples of materials constituting each coil conductor layer CC (including lands) and each via conductor V include Ag, Au, Cu, Pd, Ni, Al, and alloys containing at least one of these metals.
[0048] 3 are stacked in the height direction T, the coil conductor layers CC are electrically connected through the via conductors V. As a result, a solenoid coil 30A having a coil axis extending in the height direction T is formed in the laminate 10A, as shown in FIG.
[0049] 3, the laminate 10A preferably includes one or more insulating layers IL on the first main surface 13 side thereof and on which no coil conductor layers CC are provided. Similarly, the laminate 10A preferably includes one or more insulating layers IL on the second main surface 14 side thereof and on which no coil conductor layers CC are provided. This also applies to the following embodiments.
[0050] In the laminated inductor of the present invention, the multiple coil conductor layers include M+N first coil conductor layers that are continuous in the stacking direction (here, the height direction T). M and N are natural numbers. Each of the first coil conductor layers has a first parallel portion, and the first parallel portions of first coil conductor layers that are adjacent in the stacking direction are connected in parallel via at least two via conductors.
[0051] In the multilayer inductor 1A shown in Fig. 3, the four coil conductor layers CC1, CC2, CC3, and CC4 form the first coil conductor layer 41. That is, in the multilayer inductor 1A shown in Fig. 3, M+N=4.
[0052] In the laminated inductor 1A, the coil conductor layers CC1, CC2, CC3, and CC4 have first parallel portions P11, P12, P13, and P14, respectively. Hereinafter, the first parallel portions will also be collectively referred to as P1.
[0053] The first parallel portion P11 of the coil conductor layer CC1 and the first parallel portion P12 of the coil conductor layer CC2 are connected in parallel via via conductors V1x and V1y. Similarly, the first parallel portion P12 of the coil conductor layer CC2 and the first parallel portion P13 of the coil conductor layer CC3 are connected in parallel via via conductors V2x and V2y. Furthermore, the first parallel portion P13 of the coil conductor layer CC3 and the first parallel portion P14 of the coil conductor layer CC4 are connected in parallel via via conductors V3x and V3y.
[0054] In the laminated inductor 1A, the entire winding portion R1 of the coil conductor layer CC1 forms a first parallel portion P11. Similarly, the entire winding portion R2 of the coil conductor layer CC2 forms a first parallel portion P12. Furthermore, the entire winding portion R3 of the coil conductor layer CC3 forms a first parallel portion P13. Furthermore, the entire winding portion R4 of the coil conductor layer CC4 forms a first parallel portion P14.
[0055] In the multilayer inductor 1A, only both ends of the first parallel portion P1 are connected to adjacent first parallel portions P1 via via conductors V, but the first parallel portion P1 may also be connected to adjacent first parallel portions P1 via via conductors in portions other than both ends. In this case, the first parallel portions P1 of adjacent first coil conductor layers 41 are connected to each other via three or more via conductors. In this way, it is sufficient that the first parallel portions P1 of adjacent first coil conductor layers 41 are connected in parallel via at least two via conductors. As in the multilayer inductor 1A, the first parallel portions P1 of adjacent first coil conductor layers 41 may also be connected in parallel via two via conductors.
[0056] FIG. 4 is a perspective view of the laminated inductor shown in FIG. 1 in the width direction.
[0057] Of the first coil conductor layers 41, the M layer is a first extension layer 41M having a first extension conductor 51 connected to the first external electrode 21. As shown in Figures 3 and 4, in the multilayer inductor 1A, two layers, the coil conductor layers CC1 and CC4, form the first extension layer 41M. That is, in the multilayer inductor 1A, M=2.
[0058] Of the first coil conductor layers 41, the N layer is a first undrawn layer 41N that does not have a first drawn conductor 51 connected to the first external electrode 21. As shown in Figures 3 and 4, in the multilayer inductor 1A, two layers, the coil conductor layers CC2 and CC3, are the first undrawn layers 41N. That is, in the multilayer inductor 1A, N=2.
[0059] As shown in FIG. 4, in reality, no boundary is visible between adjacent insulating layers IL.
[0060] The effect of the first coil conductor layer 41 having the first unleaded layer 41N will be described below.
[0061] The manufacturing process of a laminated inductor may include a step of cutting the laminate block by a method such as a press cutter or a dicer cutter. Hereinafter, a description will be given of an example in which the manufacturing process of a laminated inductor 1A includes a step of cutting the laminate block along the height direction T so that the first end surface 11 of the laminate 10A becomes the cutting surface. When cutting the laminate block, stress is generated in the direction of the cutting blade. Since the first extension conductor 51 contains a metal component such as Ag, the first extension conductor 51 has a higher elastic modulus and a smaller fracture strain than the insulating layer IL made of a ferrite material or the like. Therefore, if there are a large number of first extension conductors 51 on the cutting surface, the stress generated in the direction of the cutting blade's insertion increases the risk of structural defects such as cracks occurring in the first extension conductors 51 themselves or at the interface between the first extension conductors 51 and the insulating layer IL.
[0062] As shown in FIGS. 3 and 4, in the multilayer inductor 1A, of the four first coil conductor layers 41, two layers are first extension layers 41M and two layers are first non-extended layers 41N. On the other hand, in a comparative multilayer inductor 101A described later, of the four first coil conductor layers 41, four layers are first extension layers 41M. Compared to the comparative multilayer inductor 101A, the multilayer inductor 1A has a smaller number of first extension conductors 51 in the direction of advancement of the cutting blade. This reduces the risk of structural defects such as cracks occurring in the multilayer inductor 1A due to stress generated in the direction of advancement of the cutting blade. As a result, the multilayer inductor 1A is less susceptible to deterioration in reliability due to structural defects such as cracks.
[0063] Furthermore, in the laminated inductor 1A, compared to the comparative example laminated inductor 101A, the provision of the first non-extracted layer 41N reduces the number of overlaps of the first extracted conductor 51 in the stacking direction (here, the height direction T), thereby increasing the impedance of the laminated inductor 1A.
[0064] In the multilayer inductor of the present invention, M is a natural number greater than or equal to 2, and preferably, at least one first undrawn layer 41N is present between at least one pair of first lead layers 41M in the stacking direction. As shown in FIGS. 3 and 4 , in the multilayer inductor 1A, M is 2, and coil conductor layers CC2 and CC3, which are first undrawn layers 41N, are present between coil conductor layers CC1 and CC4, which are first lead layers 41M. If at least one first undrawn layer 41N is present between at least one pair of first lead layers 41M in the stacking direction, many insulating layers IL made of ferrite or the like, which has a low elastic modulus and a large fracture strain, are sandwiched between the first lead layers 41M. This suppresses stress concentration in the first lead conductor 51 during the process of cutting the laminate block, further reducing the risk of structural defects such as cracks occurring in the multilayer inductor 1A.
[0065] In the multilayer inductor of the present invention, M+N is preferably a natural number greater than or equal to 3, and the first extension layers 41M preferably do not extend continuously in the lamination direction by more than two layers. As shown in FIGS. 3 and 4, in the multilayer inductor 1A, M+N is 4, and the coil conductor layers CC1 and CC4, which are the first extension layers 41M, are not extend continuously in the lamination direction. If the first extension layers 41M do not extend continuously in the lamination direction by more than two layers, the first non-extended layers 41N will be present between the first extension layers 41M. Therefore, many insulating layers IL made of ferrite or the like, which has a low elastic modulus and a large fracture strain, will be sandwiched between the first extension layers 41M. This suppresses stress concentration in the first extension conductor 51 during the process of cutting the laminate block, further reducing the risk of structural defects such as cracks occurring in the multilayer inductor 1A.
[0066] As shown in FIGS. 3 and 4, in the laminated inductor 1A, M=2 and N=2, and two first undrawn layers 41N are provided continuously in the lamination direction between two first drawn layers 41M.
[0067] As in the laminated inductor 1A shown in Figure 3, when viewed from the stacking direction, it is preferable that the portion of the winding portion R of the first drawn-out layer 41M that forms the current path has the same orientation and shape as the portion of the winding portion R of the first non-drawn-out layer 41N that forms the current path.
[0068] When viewed from the stacking direction, if the portion of the winding portion R of the first lead layer 41M that forms the current path has the same orientation and shape as the portion of the winding portion R of the first unleaded layer 41N that forms the current path, blocking of the magnetic flux of the coil can be suppressed, thereby most efficiently improving impedance. If the portion of the winding portion R of the first lead layer 41M that forms the current path has a different orientation or shape from the portion of the winding portion R of the first unleaded layer 41N that forms the current path, the magnetic flux of the coil may be blocked or may cancel each other out in the portions where the winding portions R have different shapes or different orientations. This may result in a decrease in the impedance of the laminated inductor.
[0069] Furthermore, when viewed from the stacking direction, if the portion of the winding portion R of the first lead layer 41M that forms the current path has the same orientation and shape as the portion of the winding portion R of the first undrawn layer 41N that forms the current path, differences in current density in the conductors in each first parallel portion P1 can be prevented, thereby suppressing deterioration of the multilayer inductor 1A over long periods of use. If the portion of the winding portion R of the first lead layer 41M that forms the current path has a different orientation or shape from the portion of the winding portion R of the first undrawn layer 41N that forms the current path, the ease of current flow in each first parallel portion P1 may differ. In this case, a large amount of current will selectively flow through the first parallel portion P1, which is the path through which current flows most easily. This accelerates deterioration of the path through which current flows most easily, potentially making the multilayer inductor more susceptible to deterioration.
[0070] The portion of the winding portion R of the first lead layer 41M that constitutes the current path refers to the portion of the winding portion R of the first lead layer 41M excluding dummy electrodes through which no current flows. Similarly, the portion of the winding portion R of the first undrawn layer 41N that constitutes the current path refers to the portion of the winding portion R of the first undrawn layer 41N excluding dummy electrodes through which no current flows. As shown in FIG. 3, the multilayer inductor 1A does not have dummy electrodes through which no current flows, so the entire winding portion R of the first lead layer 41M constitutes the current path, and the entire winding portion R of the first undrawn layer 41N constitutes the current path.
[0071] In the laminated inductor 1A, when viewed from the stacking direction, the winding portion R of the first lead layer 41M has the same orientation and shape as the winding portion R of the first unleaded layer 41N. In the laminated inductor 1A, when viewed from the stacking direction, the winding portion R of the first lead layer 41M entirely overlaps with the winding portion R of the first unleaded layer 41N entirely.
[0072] In at least one of the first extension layers 41M, the width of the portion of the first extension conductor 51 that contacts the first external electrode 21 is preferably larger than the width of the first parallel portion P1. As shown in FIG. 3, in the multilayer inductor 1A, in the coil conductor layer CC1 that is the first extension layer 41M, the width A1 of the portion of the first extension conductor 51 that contacts the first external electrode 21 is larger than the width B1 of the first parallel portion P11. In addition, in the coil conductor layer CC4 that is the first extension layer 41M, the width A4 of the portion of the first extension conductor 51 that contacts the first external electrode 21 is larger than the width B4 of the first parallel portion P14. As in the multilayer inductor 1A, in all of the first extension layers 41M, the width of the portion of the first extension conductor 51 that contacts the first external electrode 21 is preferably larger than the width of the first parallel portion P1.
[0073] If the width of the portion of the first extension conductor 51 that contacts the first external electrode 21 is larger than the width of the first parallel portion P1, for example, when the laminate block is cut in the height direction T so that the first end face 11 of the laminate 10A becomes the cutting surface, the area of the first extension conductor 51 can be increased in a direction perpendicular to the direction in which the cutting blade enters. This reduces stress concentration in the first extension conductor 51, further reducing the risk of structural defects such as cracks occurring in the laminate inductor 1A.
[0074] On the other hand, in the multilayer inductor 1A, the number of first extension layers 41M is reduced compared to a configuration without the first unextended layers 41N, and the resistance of the first extension conductor 51 increases by the amount of the reduced number of first extension layers 41M. Therefore, by making the width of the portion of the first extension conductor 51 that contacts the first external electrode 21 larger than the width of the first parallel portion P1, the increase in resistance of the first extension conductor 51 can be suppressed.
[0075] The total width of the portions of the first extension conductor 51 in the first extension layer 41M that contact the first external electrode 21 is preferably equal to or greater than the total width of the first parallel portion P1 in the first extension layer 41M and the first unextended layer 41N. As shown in Fig. 3, in the multilayer inductor 1A, the sum of the width A1 of the portion of the first extension conductor 51 in the coil conductor layer CC1 that contacts the first external electrode 21 and the width A4 of the portion of the first extension conductor 51 in the coil conductor layer CC4 that contacts the first external electrode 21 is the total width of the portions of the first extension conductor 51 in the first extension layer 41M that contact the first external electrode 21. Furthermore, the sum of the widths B1 to B4 of the first parallel portions P11, P12, P13, and P14 of the coil conductor layers CC1, CC2, CC3, and CC4 is the total width of the first parallel portion P1 in the first extension layer 41M and the first unextended layer 41N. In the laminated inductor 1A, the total width of the portions of the first extension conductor 51 in the first extension layer 41M that contact the first external electrode 21 is greater than the total width of the first parallel portion P1 in the first extension layer 41M and the first unextended layer 41N. The total width of the portions of the first extension conductor 51 in the first extension layer 41M that contact the first external electrode 21 may be the same as the total width of the first parallel portion P1 in the first extension layer 41M and the first unextended layer 41N.
[0076] When the total width of the portions of the first extension conductor 51 in the first extension layer 41M that contact the first external electrode 21 is equal to or greater than the total width of the first parallel portion P1 in the first extension layer 41M and the first non-extended layer 41N, it is possible to prevent the current density in the first extension conductor 51 from becoming higher than the current density in the winding portion R. This makes it possible to prevent electromigration from occurring in the first extension conductor 51.
[0077] In the multilayer inductor 1A, the width of the first extension conductor 51 is greater in the portion in contact with the first outer electrode 21 than in the portion in contact with the winding portion R1. The width of the first extension conductor 51 may be constant.
[0078] In the first extension layer 41M, the first extension conductor 51 and the first parallel portion P1 may be directly connected. As shown in Fig. 3, in the multilayer inductor 1A, in the coil conductor layer CC1 which is the first extension layer 41M, the first extension conductor 51 and the first parallel portion P11 are directly connected. Similarly, in the coil conductor layer CC4 which is the first extension layer 41M, the first extension conductor 51 and the first parallel portion P14 are directly connected.
[0079] In the first extraction layer 41M, the portion connecting the first external electrode 21 and the via conductor V located at a position with the shortest path length to the first external electrode 21 may have a linear shape, except for the portion in contact with the first external electrode 21.
[0080] For example, in the coil conductor layer CC1, which is the first extension layer 41M, the via conductor V1x is the via conductor located at a position with the shortest path length to the first external electrode 21. In the coil conductor layer CC1, the width of the portion of the first extension conductor 51 that contacts the first external electrode 21 is wide. Even in this case, the portion between the first external electrode 21 and the via conductor V1x, which has a width indicated by B1 in FIG. 3, is linear. Therefore, it can be said that the portion of the coil conductor layer CC1 that connects the first external electrode 21 and the via conductor V1x is linear, except for the portion that contacts the first external electrode 21.
[0081] Of the winding portion R of the first undrawn layer 41N, the portion that forms the current path may consist only of the first parallel portion P1. Alternatively, the entire winding portion R of the first undrawn layer 41N may consist only of the first parallel portion P1. As shown in FIG. 3, in the multilayer inductor 1A, in the coil conductor layer CC2 that is the first undrawn layer 41N, the entire winding portion R2 consists only of the first parallel portion P12. Similarly, in the coil conductor layer CC4 that is the first undrawn layer 41N, the entire winding portion R4 consists only of the first parallel portion P14.
[0082] In the laminated inductor of the present invention, the multiple coil conductor layers may have K+L consecutive second coil conductor layers in the stacking direction (height direction T in FIG. 3), where K and L are natural numbers. Each of the second coil conductor layers has a second parallel portion, and the second parallel portions of the second coil conductor layers adjacent to each other in the stacking direction are connected in parallel via at least two via conductors.
[0083] In the multilayer inductor 1A shown in Fig. 3, the four coil conductor layers CC5, CC6, CC7, and CC8 form the second coil conductor layers 42. That is, in the multilayer inductor 1A shown in Fig. 3, K+L=4.
[0084] In the laminated inductor 1A, the coil conductor layers CC5, CC6, CC7, and CC8 have second parallel portions P25, P26, P27, and P28, respectively. Hereinafter, the second parallel portions will also be collectively referred to as P2.
[0085] The second parallel portion P25 of the coil conductor layer CC5 and the second parallel portion P26 of the coil conductor layer CC6 are connected in parallel via via conductors V5x and V5y. Similarly, the second parallel portion P26 of the coil conductor layer CC6 and the second parallel portion P27 of the coil conductor layer CC7 are connected in parallel via via conductors V6x and V6y. Furthermore, the second parallel portion P27 of the coil conductor layer CC7 and the second parallel portion P28 of the coil conductor layer CC8 are connected in parallel via via conductors V7x and V7y.
[0086] In the laminated inductor 1A, the entire winding portion R5 of the coil conductor layer CC5 forms the second parallel portion P25. Similarly, the entire winding portion R6 of the coil conductor layer CC6 forms the second parallel portion P26. Furthermore, the entire winding portion R7 of the coil conductor layer CC7 forms the second parallel portion P27. Furthermore, the entire winding portion R8 of the coil conductor layer CC8 forms the second parallel portion P28.
[0087] In the multilayer inductor 1A, only both ends of the second parallel portion P2 are connected to adjacent second parallel portions P2 via via conductors V, but the second parallel portion P2 may also be connected to adjacent second parallel portions P2 via via conductors in portions other than both ends. In this case, the second parallel portions P2 of adjacent second coil conductor layers 42 are connected to each other via three or more via conductors. In this way, it is sufficient that the second parallel portions P2 of adjacent second coil conductor layers 42 are connected in parallel via at least two via conductors. As in the multilayer inductor 1A, the second parallel portions P2 of adjacent second coil conductor layers 42 may also be connected in parallel via two via conductors.
[0088] Of the second coil conductor layers 42, the K layer is a second lead layer 42K having a second lead conductor 52 connected to the second external electrode 22. As shown in Figures 3 and 4, in the multilayer inductor 1A, the two layers of the coil conductor layers CC5 and CC8 form the second lead layer 42K. That is, in the multilayer inductor 1A, K=2.
[0089] Of the second coil conductor layers 42, the L layer is a second undrawn layer 42L that does not have a second drawn conductor 52 connected to the second external electrode 22. As shown in Figures 3 and 4, in the multilayer inductor 1A, the two layers, the coil conductor layers CC6 and CC7, serve as the second undrawn layer 42L. That is, in the multilayer inductor 1A, L=2.
[0090] If the second coil conductor layer 42 has a second non-pulled layer 42L, the risk of structural defects such as cracks occurring in the laminated inductor 1A can be reduced when the manufacturing process of the laminated inductor 1A includes, for example, a process of cutting the laminate block along the height direction T so that the second end surface 12 of the laminate 10A becomes the cutting surface.
[0091] In the laminated inductor 1A, the four coil conductor layers CC from the second main surface 14 side of the laminate 10A constitute the first coil conductor layer 41, and the four coil conductor layers CC from the first main surface 13 side of the laminate 10A constitute the second coil conductor layer 42. The second coil conductor layer 42 is provided on the main surface side opposite to the first coil conductor layer 41, and may have the same configuration as the first coil conductor layer 41 except that the lead conductor is connected to the second external electrode 22.
[0092] An example of a method for manufacturing the laminated inductor 1A shown in FIGS. 1 to 4 will now be described.
[0093] <Magnetic material manufacturing process> First, Fe2O3, ZnO, CuO, and NiO are weighed out to give a predetermined ratio.
[0094] Next, these weighed materials and pure water are placed in a ball mill together with PSZ (partially stabilized zirconia) media, mixed, and then pulverized. The mixing and pulverization time is, for example, 4 hours or more and 8 hours or less.
[0095] The resulting pulverized material is then dried and then calcined at a calcination temperature of, for example, 700° C. to 800° C. for, for example, 2 hours to 5 hours.
[0096] In this manner, a powdered magnetic material, more specifically, a powdered magnetic ferrite material is produced.
[0097] The ferrite material is, for example, a Ni-Cu-Zn based ferrite material.
[0098] For example, when the total amount is taken as 100 mol%, the Ni-Cu-Zn ferrite material contains 40 mol% or more and 49.5 mol% or less of Fe calculated as Fe2O3, 2 mol% or more and 35 mol% or less of Zn calculated as ZnO, 6 mol% or more and 13 mol% or less of Cu calculated as CuO, and 10 mol% or more and 45 mol% or less of Ni calculated as NiO.
[0099] The Ni-Cu-Zn ferrite material may further contain additives such as Co, Bi, Sn, and Mn.
[0100] The Ni—Cu—Zn ferrite material may further contain inevitable impurities.
[0101] <Green sheet manufacturing process> First, a magnetic material, an organic binder such as polyvinyl butyral resin, an organic solvent such as ethanol or toluene, a plasticizer, etc. are mixed in a ball mill together with PSZ media, and then pulverized to produce a slurry.
[0102] Next, the slurry is formed into a sheet of a predetermined thickness by a doctor blade method or the like, and then punched into a predetermined shape to produce a green sheet. The thickness of the green sheet is, for example, 20 μm or more and 30 μm or less. The shape of the green sheet is, for example, rectangular.
[0103] As the material for the green sheets, instead of a magnetic material, a non-magnetic material such as borosilicate glass material may be used, or a mixed material of a magnetic material and a non-magnetic material may be used.
[0104] <Conductor pattern formation process> First, a via hole is formed by irradiating a predetermined portion of the green sheet with a laser.
[0105] Next, a conductive paste such as Ag paste is applied to the surface of the green sheet by screen printing or the like, filling the via holes. This forms via conductor patterns in the via holes of the green sheet, while forming coil conductor conductor patterns connected to the via conductor patterns on the surface. In this way, a coil sheet is produced in which the coil conductor conductor patterns and the via conductor conductor patterns are formed on the green sheet. The coil sheet is provided with the coil conductor conductor patterns corresponding to the coil conductor layer CC (including the first lead conductors 51 and 52) shown in FIG. 3 and the via conductor conductor pattern corresponding to the via conductor V shown in FIG. 3.
[0106] <Laminated block manufacturing process> The coil sheets are stacked in the stacking direction (here, from the negative direction to the positive direction of the height direction T) in the order shown in FIG. 3, and then thermocompression-bonded to form a laminated block.
[0107] <Laminate and coil manufacturing process> First, the laminate block is cut into a predetermined size by a method such as a pressure cut or a dicer cut, thereby producing individual chips.
[0108] Next, the individual chips are fired at a firing temperature of, for example, 900° C. to 920° C. for, for example, 2 hours to 4 hours.
[0109] When the individual chips are fired, the green sheets of the coil sheets become insulating layers.
[0110] Furthermore, when the individual chips are fired, the conductor patterns for the coil conductors and the conductor patterns for the via conductors become coil conductors and via conductors, respectively, resulting in the fabrication of a coil in which multiple coil conductors stacked together with insulating layers are electrically connected through the via conductors.
[0111] In this way, a plurality of insulating layers are stacked in the stacking direction, and a laminate having a coil inside is produced.
[0112] The corners and ridges of the laminate may be rounded by, for example, barrel polishing.
[0113] <External electrode formation process> First, a conductive paste such as a paste containing Ag and glass frit is applied to the end surface of the outer surface of the laminate from which the coil is drawn out, thereby forming a conductive paste layer.
[0114] Next, the conductive paste layer is baked to form the base electrodes of the external electrodes. The baking temperature is, for example, 800° C. or higher and 820° C. or lower. The thickness of the base electrodes is, for example, 5 μm.
[0115] Then, a Ni-plated electrode and a Sn-plated electrode are formed in this order on the surface of the base electrode by electrolytic plating, etc. This forms an external electrode having the base electrode, Ni-plated electrode, and Sn-plated electrode in this order.
[0116] In this way, the laminated inductor 1A is manufactured.
[0117] The laminated inductor 1A has dimensions of, for example, length direction L: 2.0 mm, width direction W: 1.25 mm, and height direction T: 1.25 mm.
[0118] FIG. 5 is a perspective view of the laminated inductor of the comparative example seen in the height direction. FIG. 6 is a perspective view of the laminated inductor of the comparative example seen in the width direction.
[0119] As shown in FIG. 5, in the comparative laminated inductor 101A, the laminate 10A has a coil 30A inside.
[0120] The coil 30A has a first extension conductor 51 and a second extension conductor 52. The coil 30A is connected to the first external electrode 21 via the first extension conductor 51. The coil 30A is connected to the second external electrode 22 via the second extension conductor 52.
[0121] 6, in the comparative example laminated inductor 101A, all of the coil conductor layers CC1, CC2, CC3, and CC4 are first extension layers 41M having first extension conductors 51. Also, all of the coil conductor layers CC5, CC6, CC7, and CC8 are second extension layers 42K having second extension conductors 52. Except for the number of first extension conductors 51 and the number of second extension conductors 52 included in the coil 30A, the comparative example laminated inductor 101A has the same configuration as the laminated inductor 1A.
[0122] In the comparative multilayer inductor 101A, four layers of first extension conductors 51 are continuously stacked on the first end surface 11 of the laminate 10A. A manufacturing method for the comparative multilayer inductor 101A may include a step of cutting the laminate block along the height direction T so that the first end surface 11 of the laminate 10A becomes the cutting surface. In this case, the comparative multilayer inductor 101A has a higher content of metal components such as Ag, which is the material of the first extension conductor 51, in the cutting direction compared to the multilayer inductor 1A. Metal components such as Ag have a higher elastic modulus and a smaller fracture strain compared to the ferrite material, etc., that constitutes the insulating layer IL. Therefore, in the multilayer inductor 101A, which has a high content of metal components such as Ag on the cut surface, there is a higher risk of structural defects such as cracks occurring due to stress generated in the direction of entry of the cutting blade.
[0123] FIG. 7 is a schematic diagram showing an enlarged cross section of the first lead conductor taken along line VII-VII in FIG.
[0124] In the example shown in Fig. 7, a crack CR has occurred that passes through the interface between the first extension conductor 51 and the insulating layer IL. In the multilayer inductor 101A, not only the crack CR that passes through the interface between the first extension conductor 51 and the insulating layer IL shown in Fig. 7 but also a crack CR that breaks the first extension conductor 51 itself may occur. If a structural defect such as a crack CR occurs in the multilayer inductor 101A, the risk of disconnection or the like increases when the multilayer inductor 101A is used, thereby reducing the reliability of the multilayer inductor 101A.
[0125] [Second embodiment] In the laminated inductor according to the second embodiment of the present invention, the first lead layers and the first unleaded layers are provided alternately in the lamination direction.
[0126] FIG. 8 is an exploded plan view schematically showing an example of a laminated inductor according to a second embodiment of the present invention.
[0127] 8 has a configuration in which the coil conductor layer CC3 of the third layer L3 and the coil conductor layer CC4 of the fourth layer L4 in the multilayer inductor 1A are swapped, and the coil conductor layer CC5 of the fifth layer L5 and the coil conductor layer CC6 of the sixth layer L6 are swapped. Other than the above, the multilayer inductor 1B has the same configuration as the multilayer inductor 1A.
[0128] In the multilayer inductor 1B shown in Fig. 8, the four coil conductor layers CC1, CC2, CC3, and CC4 form the first coil conductor layer 41. That is, in the multilayer inductor 1B shown in Fig. 8, M+N=4.
[0129] 8, the two coil conductor layers CC1 and CC3 form the first lead layer 41M. That is, in the multilayer inductor 1B, M=2.
[0130] 8, the two coil conductor layers CC2 and CC4 form the first undrawn layer 41N. That is, in the multilayer inductor 1B, N=2.
[0131] 8, the first lead layers 41M and the first unleaded layers 41N are alternately arranged in the stacking direction (here, the height direction T). When the first lead layers 41M and the first unleaded layers 41N are alternately arranged in the stacking direction, the first lead layers 41M are not contiguous to each other in the stacking direction. This further reduces the risk of structural defects such as cracks occurring in the multilayer inductor 1B.
[0132] When the first lead layers 41M and the first non-drawn layers 41N are alternately provided in the stacking direction, M+N is a natural number greater than or equal to 3. Although not shown, when M+N is 3, one first non-drawn layer 41N may be provided between a pair of first lead layers 41M, or one first lead layer 41M may be provided between a pair of first non-drawn layers 41N.
[0133] As in the multilayer inductor 1B shown in FIG. 8, a plurality of first extension layers 41M may be present, and the first extension layers 41M and first unextended layers 41N may be arranged alternately in the stacking direction. In this case, a first unextended layer 41N is present between each of the plurality of first extension layers 41M. As a result, many insulating layers IL made of ferrite or the like, which has a low elastic modulus and a large fracture strain, are sandwiched between the first extension layers 41M. This makes it possible to suppress stress concentration in the first extension conductor 51 during the process of cutting the laminate block, further reducing the risk of structural defects such as cracks occurring in the multilayer inductor 1B.
[0134] 8, the second lead layers 42K and the second unleaded layers 42L are alternately arranged in the lamination direction. When the second lead layers 42K and the second unleaded layers 42L are alternately arranged in the lamination direction, the second lead layers 42K are not contiguous in the lamination direction. This further reduces the risk of structural defects such as cracks occurring in the multilayer inductor 1B.
[0135] [Third embodiment] The laminated inductor according to the third embodiment of the present invention has one first lead layer and one first unleaded layer.
[0136] FIG. 9 is an exploded plan view schematically showing an example of a laminated inductor according to a third embodiment of the present invention.
[0137] 9 has a configuration in which the coil conductor layer CC3 of the third layer L3, the coil conductor layer CC4 of the fourth layer L4, the coil conductor layer CC5 of the fifth layer L5, and the coil conductor layer CC6 of the sixth layer L6 of the multilayer inductor 1A have been removed. Other than the above, the multilayer inductor 1C has the same configuration as the multilayer inductor 1A.
[0138] In the laminated inductor 1C shown in Fig. 9, the two coil conductor layers CC1 and CC2 form the first coil conductor layer 41. That is, in the laminated inductor 1C shown in Fig. 9, M+N=2.
[0139] 9, one of the coil conductor layers CC1 serves as the first lead layer 41M. That is, in the laminated inductor 1C, M=1.
[0140] 9, one of the coil conductor layers CC2 is a first undrawn layer 41N. That is, in the multilayer inductor 1C, N=1.
[0141] In the laminated inductor 1C shown in Fig. 9, the two coil conductor layers CC3 and CC4 form the second coil conductor layer 42. That is, in the laminated inductor 1C shown in Fig. 9, K+L=2.
[0142] In the laminated inductor 1C shown in Fig. 9, one of the coil conductor layers CC4 serves as the second lead layer 42K. That is, in the laminated inductor 1C, K=1.
[0143] 9, one of the coil conductor layers CC3 is the second undrawn layer 42L. That is, in the multilayer inductor 1C, L=1.
[0144] [Fourth embodiment] In the laminated inductor according to the fourth embodiment of the present invention, some of the coil conductor layers present between the first coil conductor layer and the second coil conductor layer are connected in parallel.
[0145] FIG. 10 is an exploded plan view schematically showing an example of a laminated inductor according to a fourth embodiment of the present invention.
[0146] In the laminated inductor 1D shown in FIG. 10, coil conductor layers CC1, CC2, CC3, CC4, CC5, CC6, CC7, and CC8 are electrically connected via via conductors V1x, V1y, V2x, V2y, V3x, V3y, V3z, V4x, V4y, V4z, V5x, V5y, V5z, V6x, V6y, V7x, and V7y.
[0147] 10, the coil conductor layer CC4 of the fourth layer L4 is located between the first coil conductor layer and the second coil conductor layer, and a portion of the coil conductor layer CC4 is connected in parallel to the coil conductor layer adjacent to it in the stacking direction.
[0148] A portion of the coil conductor layer CC4 is connected in parallel to a portion of the coil conductor layer CC3 of the third layer L3 through via conductors V3x, V3y, and V3z, and a portion of the coil conductor layer CC4 is connected in parallel to a portion of the coil conductor layer CC5 of the fifth layer L5 through via conductors V4x, V4y, and V4z.
[0149] In the multilayer inductor 1D, the coil conductor layers between the first and second coil conductor layers are connected in parallel, thereby reducing the DC resistance. Also, because only some of the coil conductor layers between the first and second coil conductor layers are connected in parallel, the number of via conductors overlapping in the stacking direction can be reduced. This makes it possible to suppress cracks that occur during firing of the multilayer inductor 1D due to a large number of via conductors overlapping in the stacking direction.
[0150] [Fifth embodiment] In the laminated inductor according to the fifth embodiment of the present invention, the coil conductor layers present between the first coil conductor layer and the second coil conductor layer are connected in series.
[0151] FIG. 11 is an exploded plan view schematically showing an example of a laminated inductor according to a fifth embodiment of the present invention.
[0152] In the laminated inductor 1E shown in FIG. 11, coil conductor layers CC1, CC2, CC3, CC4, CC5, CC6, CC7, CC8, and CC9 are electrically connected via via conductors V1x, V1y, V2x, V2y, V3x, V4x, V5x, V6x, V7x, V7y, V8x, and V8y.
[0153] 11, the coil conductor layer CC4 of the fourth layer L4, the coil conductor layer CC5 of the fifth layer L5, and the coil conductor layer CC6 of the sixth layer L6 are located between the first and second coil conductor layers, and the coil conductor layer CC4, the coil conductor layer CC5, and the coil conductor layer CC6 are connected in series.
[0154] 11, the first coil conductor layer has a parallel portion, which reduces current concentration in the first coil conductor layer. Furthermore, the first coil conductor layer has a first undrawn layer, which reduces stress concentration in the first drawn conductor 51 during the process of cutting the laminate block. The multilayer inductor 1E exhibits the above effects, and is an example of a multilayer inductor in which the coil conductor layers present between the first and second coil conductor layers are connected in series.
[0155] The laminated inductor of the present invention is not limited to the above-described embodiment, and various applications and modifications can be made within the scope of the present invention with respect to the configuration, manufacturing conditions, etc. of the laminated inductor.
[0156] In the laminated inductor of the present invention, M and N may be the same or different.
[0157] When the laminated inductor of the present invention has a second coil conductor layer, K and L may be the same or different. Also, M and K may be the same or different. Similarly, N and L may be the same or different.
[0158] When the laminated inductor of the present invention has a second coil conductor layer, there may be no other coil conductor layer between the first coil conductor layer and the second coil conductor layer as in the first to third embodiments, or there may be another coil conductor layer as in the fourth and fifth embodiments. For example, when a third coil conductor layer is present between the first coil conductor layer and the second coil conductor layer, the configuration of the third coil conductor layer is not particularly limited.
[0159] The present specification discloses the following:
[0160] <1> a laminate in which a plurality of insulating layers are laminated in a lamination direction and which has a coil therein; a first external electrode and a second external electrode provided on an outer surface of the laminate and electrically connected to the coil; the coil is configured by electrically connecting a plurality of coil conductor layers stacked together with the insulating layers in the stacking direction, the plurality of coil conductor layers include M+N layers (M and N are natural numbers) of first coil conductor layers that are continuous in the stacking direction; each of the first coil conductor layers has a first parallel portion; the first parallel portions of the first coil conductor layers adjacent to each other in the stacking direction are connected in parallel via at least two via conductors, Among the first coil conductor layers, an M layer is a first lead layer having a first lead conductor connected to the first external electrode, and an N layer is a first non-lead layer not having the first lead conductor, M is a natural number greater than or equal to 2, A laminated inductor, wherein at least one first undrawn layer is present between at least one pair of the first drawn layers in the lamination direction.
[0161] <2> a laminate in which a plurality of insulating layers are laminated in a lamination direction and which has a coil therein; a first external electrode and a second external electrode provided on an outer surface of the laminate and electrically connected to the coil; the coil is configured by electrically connecting a plurality of coil conductor layers stacked together with the insulating layers in the stacking direction, the plurality of coil conductor layers include M+N layers (M and N are natural numbers) of first coil conductor layers that are continuous in the stacking direction; each of the first coil conductor layers has a first parallel portion; the first parallel portions of the first coil conductor layers adjacent to each other in the stacking direction are connected in parallel via at least two via conductors, Among the first coil conductor layers, an M layer is a first lead layer having a first lead conductor connected to the first external electrode, and an N layer is a first non-lead layer not having the first lead conductor, A laminated inductor, wherein, when viewed from the stacking direction, the portion of the winding portion of the first drawn-out layer that forms the current path has the same orientation and shape as the portion of the winding portion of the first undrawn layer that forms the current path.
[0162] <3> In the first extraction layer, a portion connecting the first external electrode and the via conductor located at a position where the path length to the first external electrode is shortest has a linear shape except for a portion in contact with the first external electrode. <2> The laminated inductor according to claim 1.
[0163] <4> M is a natural number greater than or equal to 2, At least one first non-drawn layer is present between at least one pair of the first drawn layers in the stacking direction. <2> or <3> The laminated inductor according to claim 1.
[0164] <5> In at least one of the first lead layers, a width of a portion of the first lead conductor that contacts the first external electrode is larger than a width of the first parallel portion. <1> ~ <4> 10. The laminated inductor according to claim 9, wherein
[0165] <6> a total width of a portion of the first lead conductor in the first lead layer that is in contact with the first external electrode is equal to or greater than a total width of the first parallel portion in the first lead layer and the first non-lead layer; <1> ~ <5> 10. The laminated inductor according to claim 9, wherein
[0166] <7> M+N are natural numbers greater than or equal to 3, The first drawer layer does not include two or more consecutive layers in the stacking direction. <1> ~ <6> 10. The laminated inductor according to claim 9, wherein
[0167] <8> M+N is a natural number greater than or equal to 3, The first extraction layers and the first non-extraction layers are alternately provided in the stacking direction. <7> The laminated inductor according to claim 1.
[0168] <9> M=2 and N=2, Two first non-drawn layers are provided continuously in the stacking direction between two first drawn layers. <7> The laminated inductor according to
[0169] <10> In the first lead layer, the first lead conductor and the first parallel section are directly connected to each other. <1> ~ <9> 10. The laminated inductor according to claim 9, wherein
[0170] <11> a portion of the winding portion of the first unextracted layer that constitutes a current path is composed only of the parallel portion; <1> ~ <10> 10. The laminated inductor according to claim 9, wherein
[0171] <12> the plurality of coil conductor layers include K+L layers (K and L are natural numbers) of second coil conductor layers that are continuous in the stacking direction; each of the second coil conductor layers has a second parallel portion; the second parallel portions of the second coil conductor layers adjacent to each other in the stacking direction are connected in parallel via at least two via conductors, Among the second coil conductor layers, the K layer is a second lead layer having a second lead conductor connected to the second external electrode, and the L layer is a second non-lead layer not having the second lead conductor. <1> ~ <11> 10. The laminated inductor according to claim 9, wherein [Explanation of symbols]
[0172] 1A, 1B, 1C, 1D, 1E, 101A multilayer inductors 10A laminate 11 first end face 12 Second end face 13 First principal surface 14 Second main surface 15 First Aspect 16 The Second Aspect 21 1st external electrode 22 2nd external electrode 30A coil 41 First coil conductor layer 41M 1st drawer layer 41N First non-extractable layer 42 Second coil conductor layer 42K Second drawer layer 42L Second non-drawer layer 51 First lead-out conductor 52 Second lead-out conductor CC, CC1, CC2, CC3, CC4, CC5, CC6, CC7, CC8, CC9 Coil conductor layers IL, IL1, IL2, IL3, IL4, IL5, IL6, IL7, IL8, IL9 insulating layer V, V1x, V1y, V2x, V2y, V3x, V3y, V3z, V4x, V4y, V4z, V5x, V5y, V5z, V6x, V6y, V7x, V7y, V8x, V8y, Via conductor P1, P11, P12, P13, P14 1st parallel section P2, P25, P26, P27, P28 2nd parallel section CR Crack L lengthwise T Height direction W width direction
Claims
1. a laminate in which a plurality of insulating layers are laminated in a lamination direction and which has a coil therein; a first external electrode and a second external electrode provided on an outer surface of the laminate and electrically connected to the coil, the coil is configured by electrically connecting a plurality of coil conductor layers stacked together with the insulating layers in the stacking direction, the plurality of coil conductor layers include M+N layers (M and N are natural numbers) of first coil conductor layers that are continuous in the stacking direction, each of the first coil conductor layers has a first parallel portion; the first parallel portions of the first coil conductor layers adjacent to each other in the stacking direction are connected in parallel via at least two via conductors, Among the first coil conductor layers, an M layer is a first lead layer having a first lead conductor connected to the first external electrode, and an N layer is a first non-lead layer not having the first lead conductor, M is a natural number greater than or equal to 2, A laminated inductor, wherein at least one first unleaded layer is present between at least one pair of the first unleaded layers in the lamination direction.
2. a laminate in which a plurality of insulating layers are laminated in a lamination direction and which has a coil therein; a first external electrode and a second external electrode provided on an outer surface of the laminate and electrically connected to the coil, the coil is configured by electrically connecting a plurality of coil conductor layers stacked together with the insulating layers in the stacking direction, the plurality of coil conductor layers include M+N layers (M and N are natural numbers) of first coil conductor layers that are continuous in the stacking direction, each of the first coil conductor layers has a first parallel portion; the first parallel portions of the first coil conductor layers adjacent to each other in the stacking direction are connected in parallel via at least two via conductors, Among the first coil conductor layers, an M layer is a first lead layer having a first lead conductor connected to the first external electrode, and an N layer is a first non-lead layer not having the first lead conductor, A laminated inductor, wherein, when viewed from the stacking direction, the portion of the winding portion of the first lead layer that forms a current path has the same orientation and shape as the portion of the winding portion of the first non-lead layer that forms a current path.
3. 3. The laminated inductor according to claim 2, wherein in the first extension layer, a portion connecting the first external electrode and the via conductor located at a position where the path length to the first external electrode is shortest has a linear shape except for a portion in contact with the first external electrode.
4. M is a natural number greater than or equal to 2, 4. The laminated inductor according to claim 2, wherein at least one first unleaded layer is present between at least one pair of the first unleaded layers in the lamination direction.
5. The laminated inductor according to any one of claims 1 to 3, wherein in at least one of the first extension layers, the width of the portion of the first extension conductor that contacts the first external electrode is greater than the width of the first parallel portion.
6. A laminated inductor as described in any one of claims 1 to 3, wherein the total width of the portion of the first extension conductor in the first extension layer that contacts the first external electrode is equal to or greater than the total width of the first parallel portion in the first extension layer and the first non-extension layer.
7. M+N is a natural number equal to or greater than 3, 4. The laminated inductor according to claim 1, wherein the first lead layer does not include two or more consecutive layers in the lamination direction.
8. M+N is a natural number equal to or greater than 3, The laminated inductor according to claim 7 , wherein the first lead layers and the first unleaded layers are alternately provided in the lamination direction.
9. M=2 and N=2, 8. The laminated inductor according to claim 7, wherein two of the first undrawn layers are provided continuously in the lamination direction between two of the first drawn layers.
10. 4. The laminated inductor according to claim 1, wherein in said first lead layer, said first lead conductor and said first parallel portion are directly connected to each other.
11. 4. The laminated inductor according to claim 1, wherein a portion of the winding portion of said first unleaded layer that constitutes a current path is made up of only said parallel portion.
12. the plurality of coil conductor layers include K+L layers (K and L are natural numbers) of second coil conductor layers that are continuous in the stacking direction, each of the second coil conductor layers has a second parallel portion; the second parallel portions of the second coil conductor layers adjacent to each other in the stacking direction are connected in parallel via at least two via conductors, A laminated inductor as described in any one of claims 1 to 3, wherein, of the second coil conductor layers, the K layer is a second lead-out layer having a second lead-out conductor connected to the second external electrode, and the L layer is a second non-lead-out layer not having the second lead-out conductor.
Citation Information
Patent Citations
Laminate inductor
JP2013162101A