Multi-layer ceramic capacitor and manufacturing method thereof

Abstract

To provide a multi-layer ceramic capacitor and a manufacturing method thereof.SOLUTION: A multi-layer ceramic capacitor includes a multi-layer ceramic brick having first and second end surfaces and including a plurality of dielectric layers and a plurality of internal electrode layers, a first terminal electrode provided on the first end surface, and a second terminal electrode provided on the second end surface. Each internal electrode layer includes an inner layer and a first indium segregation layer which is located between the inner layer and one of the dielectric layers. The dielectric layer includes a plurality of second indium segregation layers. Thus, an average failure interval of the multi-layer ceramic capacitor is enhanced, and a useful lifetime of the multi-layer ceramic capacitor can be extended.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a capacitor and a method for manufacturing the same, and more particularly to a multilayer ceramic capacitor and a method for manufacturing the same.

[0002] Multilayer ceramic capacitors (MLCCs) are a type of ceramic capacitor, and their capacitance is proportional to the surface area of ​​the product and the number of ceramic film layers. Multilayer ceramic capacitors can be fabricated using surface mount technology (SMT). Because of their ease of wafer fabrication and small volume, multilayer ceramic capacitors have become a mainstream product in the capacitor industry and are used in a variety of electronic devices. Summary of the Invention [Problem to be solved by the invention]

[0003] Perovskite oxide compounds, as materials for the dielectric layers of multilayer ceramic capacitors, can reduce the cost of multilayer ceramic capacitors and improve their performance. Therefore, perovskite oxide compounds are widely used in multilayer ceramic capacitors. However, as the number of stacked inner electrode layers in a multilayer ceramic capacitor increases, the thickness of the dielectric layers decreases, which reduces the insulation resistance between the inner electrode layers and reduces the reliability and high-temperature load life of the multilayer ceramic capacitor.

[0004] Also, decreasing the thickness of the dielectric layers reduces the mean time to failure (MTTF) of known multilayer ceramic capacitors, further shortening the useful life of the multilayer ceramic capacitors.

[0005] This creates a need to develop capacitor manufacturing methods that overcome the deficiencies of known multilayer ceramic capacitors. [Means for solving the problem]

[0006] One aspect of the present invention provides a multilayer ceramic capacitor comprising: a multilayer ceramic brick having first and second end faces facing each other, the multilayer ceramic brick including: a plurality of dielectric layers each including a plurality of perovskite oxides containing barium and titanium and a borosilicate glass; and a plurality of inner electrode layers stacked on each other with the dielectric layers; a first terminal electrode provided on the first end face and electrically connected to a portion of the inner electrode layer; and a second terminal electrode provided on the second end face and electrically connected to another portion of the inner electrode layer; each of the plurality of inner electrode layers including an inner layer made of nickel and a first indium isolation layer having a thickness of 1 nm to 19 nm and positioned between the inner layer and one of the dielectric layers; and the dielectric layer including a plurality of second indium isolation layers each positioned at a plurality of crystal grain boundaries of the perovskite oxide.

[0007] According to the multilayer ceramic capacitor described in the previous paragraph, the weight of the borosilicate glass may be 0.01 wt% to 5 wt%, when the total weight of the perovskite oxide is 100 wt%.

[0008] According to the multilayer ceramic capacitor described in the previous paragraph, the borosilicate glass may include diboron trioxide, dialuminum trioxide, and silicon dioxide.

[0009] According to the multilayer ceramic capacitor described in the previous paragraph, the internal electrode layers are formed by sintering nickel paste to which indium has been added, and the amount of indium added to the nickel paste may be 0.01 mol % to 5 mol %.

[0010] According to the multilayer ceramic capacitor described in the previous paragraph, the first indium content of the first indium isolation layer may be greater than the second indium content of each of the second indium isolation layers.

[0011] According to the multilayer ceramic capacitor described in the previous paragraph, when the sum of the titanium content of the perovskite oxide and the second indium content of the second indium isolation layer is 100 mol%, the second indium content is 10 -20 mol% to 10 -2 It may also be expressed as mol%.

[0012] According to the multilayer ceramic capacitor described in the previous paragraph, the first indium isolation layer may include indium, barium, and titanium.

[0013] According to the multilayer ceramic capacitor described in the previous paragraph, the second indium isolation layer may include indium, barium, and titanium.

[0014] According to the multilayer ceramic capacitor described in the previous paragraph, the ratio of the thickness of each of the internal electrode layers to the thickness of each of the dielectric layers may be 0.4 to 0.6.

[0015] Another aspect of the present invention provides a method for manufacturing a multilayer ceramic capacitor, the method comprising the steps of: forming a plurality of dielectric layers, each of which contains a plurality of perovskite oxides containing barium and titanium and a borosilicate glass; forming a plurality of inner electrode layers; alternately stacking the inner electrode layers and the dielectric layers to form a laminate; performing a sintering process, which includes a low-temperature firing removal step and a high-temperature sintering step, to form the laminate into a multilayer ceramic brick; and forming a first terminal electrode and a second terminal electrode on both ends of the multilayer ceramic brick, respectively, to obtain a multilayer ceramic capacitor.

[0016] According to the method for manufacturing a multilayer ceramic capacitor described in the previous paragraph, when the total weight of the perovskite oxide is 100 wt %, the weight of the borosilicate glass may be 0.01 wt % to 5 wt %.

[0017] According to the method for manufacturing a multilayer ceramic capacitor described in the previous paragraph, the borosilicate glass may include diboron trioxide, dialuminum trioxide, and silicon dioxide.

[0018] According to the method for manufacturing a multilayer ceramic capacitor described in the previous paragraph, the inner electrode layers are formed by sintering nickel paste containing indium, and the amount of indium added to the nickel paste may be 0.01 mol % to 5 mol %.

[0019] According to the method for manufacturing a multilayer ceramic capacitor described in the previous paragraph, after the sintering process, a first indium isolation layer may be formed at the interface between any of the inner electrode layers and one of the corresponding dielectric layers, and multiple second indium isolation layers may be formed at multiple grain boundaries of the perovskite oxide, and the first indium isolation layer and the second indium isolation layer may be generated simultaneously. [Effects of the Invention]

[0020] Therefore, the multilayer ceramic capacitor and the method for manufacturing the multilayer ceramic capacitor of the present invention can improve the mean time between failures of the multilayer ceramic capacitor and extend the service life of the multilayer ceramic capacitor. [Brief explanation of the drawings]

[0021] To make the above and other objects, features, advantages and embodiments of the present invention more clearly and comprehensibly, the description of the drawings is as follows. [Figure 1] 1 is a schematic perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention; [Figure 2] 2 is a cross-sectional view of the multilayer ceramic capacitor according to the embodiment of FIG. 1 taken along the cross-sectional line AA. [Figure 3] 2 is a cross-sectional view of the multilayer ceramic capacitor according to the embodiment of FIG. 1 taken along the cross-sectional line BB. [Figure 4] 4 is a process flowchart of a method for manufacturing a multilayer ceramic capacitor according to another embodiment of the present invention. [Figure 5] 1 is a scanning transmission electron microscope annular dark-field image of the multilayer ceramic capacitor of Experimental Example 1. [Figure 6]6 is an Lα energy dispersive X-ray image of indium from Experimental Example 1 of FIG. 5. [Figure 7] 1 is a bright-field image of the multilayer ceramic capacitor of Experimental Example 2 taken by a scanning transmission electron microscope. [Figure 8] 8 is an Lα energy dispersive X-ray image of indium from Experimental Example 2 of FIG. 7. [Figure 9] FIG. 9 is an enlarged view of the perovskite oxide of barium titanate in FIG. 8. [Figure 10] FIG. 10 is an Lα energy dispersive X-ray image of indium in the barium titanate perovskite oxide of FIG. [Figure 11] 1 is a graph of mean time between failures versus total thickness of dielectric layers in nickel multilayer ceramic capacitors and nickel-indium multilayer ceramic capacitors. DETAILED DESCRIPTION OF THE INVENTION

[0022] Each embodiment of the present invention will be discussed in more detail below. However, the embodiments are applications of various inventive concepts and can be specifically implemented within a variety of different specific scopes. The specific embodiments are for illustrative purposes only and are not intended to be limiting of the scope of the disclosure. Furthermore, to simplify the drawings, some well-known structures and elements are simply depicted in the drawings.

[0023] Furthermore, terms such as "first" and "second" in the description are merely used to distinguish between elements or operations in the same technology, and are not intended to represent a program order or an arrangement order.

[0024] The spatial relationship between two elements described in the present invention applies not only to the orientation depicted in the drawings, but also to orientations not shown in the drawings, such as an upside-down orientation. Furthermore, the terms "connection" and "electrical connection" between two elements in the present invention are not limited to direct connection or direct electrical connection between the two elements, but may also include indirect connection or indirect electrical connection as necessary.

[0025] In the present invention, a multilayer ceramic capacitor having a "metal" internal electrode layer is referred to as a "metal" multilayer ceramic capacitor (Metal MLCC), such as a nickel multilayer ceramic capacitor (Ni MLCC) or a nickel-indium multilayer ceramic capacitor (Ni-In MLCC). Specifically, a "nickel multilayer ceramic capacitor" refers to a multilayer ceramic capacitor having an internal metal electrode layer containing nickel. Similarly, a "nickel-indium multilayer ceramic capacitor" refers to a multilayer ceramic capacitor having an internal metal electrode layer containing nickel and indium.

[0026] Please refer to Figures 1 to 3. Figures 1 to 3 are a schematic perspective view of a multilayer ceramic capacitor 100 according to one embodiment of the present invention, and a schematic cross-sectional view of the multilayer ceramic capacitor 100 according to the embodiment of Figure 1 taken along the cross-sectional line AA and the cross-sectional line BB. The multilayer ceramic capacitor 100 includes a multilayer ceramic brick 200, a first terminal electrode 300, and a second terminal electrode 400.

[0027] For example, the multilayer ceramic brick 200 may be a rectangular parallelepiped or a cube. However, the shape of the multilayer ceramic brick 200 can be designed according to product needs, and the present invention is not limited thereto. The multilayer ceramic brick 200 has a first end face 202 and a second end face 204, where the first end face 202 and the second end face 204 are opposite each other. As can be seen from FIGS. 1 to 3 , the multilayer ceramic brick 200 is a rectangular parallelepiped, and may further include a first surface 205, a second surface 206, a third surface 207, and a fourth surface 208, where the first surface 205 and the second surface 206 are opposite each other, and the third surface 207 and the fourth surface 208 are opposite each other. The first end face 202, the second end face 204, the third surface 207, and the fourth surface 208 are all located between the first surface 205 and the second surface 206. The third surface 207 and the fourth surface 208 are located between the first end surface 202 and the second end surface 204 .

[0028] The multilayer ceramic brick 200 includes a plurality of dielectric layers 210 and a plurality of internal electrode layers 220. The dielectric layers 210 and the internal electrode layers 220 are stacked on top of each other. During the manufacturing process of the multilayer ceramic brick 200, green sheets of the dielectric layers 210 and paste layers of the internal electrode layers 220 may be stacked on top of each other to form a stack structure, which may then be sintered. The dielectric layers 210 are ceramic layers formed by sintering green sheets of perovskite oxide (not shown) and borosilicate glass. Therefore, each of the dielectric layers 210 includes a plurality of perovskite oxides and borosilicate glass. The perovskite oxide includes barium and titanium. In some embodiments, the dielectric layers 210 are made of the perovskite oxide barium titanate (BaTiO).

[0029] The borosilicate glass may include boron trioxide (BO), aluminum oxide (AlO), and silicon dioxide (SiO). In some embodiments, the borosilicate glass may comprise 0.01 wt% to 5 wt% of the total weight of the perovskite oxide, where the total weight of the perovskite oxide is 100 wt%. For example, the borosilicate glass may comprise 0.05 wt%, 0.1 wt%, 0.2 wt%, 0.3 wt%, 0.4 wt%, 0.5 wt%, 0.6 wt%, 0.7 wt%, 0.8 wt%, 0.9 wt%, 1 wt%, 1.5 wt%, 2 wt%, 2.5 wt%, 3 wt%, 3.5 wt%, 4 wt%, or 4.5 wt%. When the weight of the borosilicate glass is within the above range, the mean time between failures of the multilayer ceramic capacitor 100 can be improved, thereby extending the service life of the multilayer ceramic capacitor 100 .

[0030] 2 , the inner electrode layer 220 may be divided into two portions. One portion of the inner electrode layer 220 extends from the first end surface 202 toward the second end surface 204 of the multilayer ceramic brick 200 and is separated from the second end surface 204. The other portion of the inner electrode layer 220 extends from the second end surface 204 toward the first end surface 202 and is separated from the first end surface 202. The two portions of the multilayer ceramic brick 200 are alternately arranged, and a dielectric layer 210 is located between adjacent portions of the inner electrode layer 220. The inner electrode layer 220 is approximately parallel to the first surface 205 and the second surface 206 of the multilayer ceramic brick 200.

[0031] 2 and 3, each of the inner electrode layers 220 includes an inner layer 222 and a first indium isolation layer 224. The material of the inner layer 222 includes nickel. For example, nickel may be the main component of the inner layer 222. The first indium isolation layer 224 of each of the inner electrode layers 220 is located between the inner layer 222 and the dielectric layer 210 adjacent to the inner layer 222. As a result, the first indium isolation layer 224 of each of the inner electrode layers 220 separates the inner layer 222 from the outer dielectric layer 210.

[0032] The thickness of the first indium isolation layer 224 is 1 nm to 100 nm. For example, the thickness of the first indium isolation layer 224 may be 3 nm, 5 nm, 8 nm, 10 nm, 12 nm, 15 nm, 18 nm, 19 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, or 90 nm. When the thickness of the first indium isolation layer 224 is within the above range, the mean time between failures of the multilayer ceramic capacitor 100 can be improved, thereby extending the service life of the multilayer ceramic capacitor 100. See FIG. 2. The ratio of the thickness h1 of each of the internal electrode layers 220 to the thickness h2 of each of the dielectric layers 210 may be 0.4 to 0.6. When the ratio is within the above range, the mean time between failures of the multilayer ceramic capacitor 100 can be improved, thereby extending the service life of the multilayer ceramic capacitor 100. See FIG. 2. In some embodiments, the total thickness H of the dielectric layer 210 ranges from 0.5 μm to 8.4 μm. For example, the total thickness H of the dielectric layer 210 may be 1.2 μm, 3.2 μm, 5 μm, or 6.8 μm.

[0033] The inner electrode layer 220 may be formed by sintering a nickel paste containing indium. Thus, the first indium isolation layer 224 may be a condensed metal phase layer of indium metal and may be located between the inner layer 222 made of nickel and the ceramic body of the dielectric layer 210. The dielectric layer 210 may be made of barium titanate, and the first indium isolation layer 224 may contain indium, barium, and titanium. The amount of indium added to the nickel paste may be 0.01 mol% to 5 mol%. For example, the amount of indium added to the nickel paste may be 0.05 mol%, 0.1 mol%, 0.2 mol%, 0.3 mol%, 0.4 mol%, 0.5 mol%, 0.6 mol%, 0.7 mol%, 0.8 mol%, 0.9 mol%, 1 mol%, 1.5 mol%, 2 mol%, 2.5 mol%, 3 mol%, 3.5 mol%, 4 mol%, or 4.5 mol%. When the amount of indium added to the nickel paste is within the above range, the mean time between failures of the multilayer ceramic capacitor 100 can be improved, thereby extending the service life of the multilayer ceramic capacitor 100.

[0034] By adding indium metal, the material of the inner electrode layer 220 can be sintered in a highly reducing atmosphere. For example, the material of the inner electrode layer 220 can be sintered in an atmosphere with a high hydrogen content. Therefore, the multilayer ceramic capacitor 100 can have stable reliability at high operating temperatures, such as 105°C or 125°C. Furthermore, the first indium isolation layer 224 can provide a Schottky barrier between the inner layer 222 and the dielectric layer 210, and the Schottky barrier can suppress leakage current in the multilayer ceramic capacitor 100. As a result, the multilayer ceramic capacitor 100 has a long high-temperature load life and high reliability.

[0035] 1 , the first terminal electrode 300 is provided on at least the first end surface 202 of the multilayer ceramic brick 200 and is electrically connected to the inner electrode layers 220 extending from the first end surface 202. The second terminal electrode 400 is provided on at least the second end surface 204 of the multilayer ceramic brick 200 and is electrically connected to the inner electrode layers 220 extending from the second end surface 204. As can be seen from FIGS. 1 and 2 , the first terminal electrode 300 covers the first end surface 202, and the first surface 205, the second surface 206, the third surface 207, and the fourth surface 208 are adjacent to the first end surface 202. The second terminal electrode 400 covers the second end surface 204, and the first surface 205, the second surface 206, the third surface 207, and the fourth surface 208 are adjacent to the second end surface 204.

[0036] The first terminal electrode 300 and the second terminal electrode 400 may both have a single-layer structure or a multi-layer structure. The first terminal electrode 300 and the second terminal electrode 400 may both have a three-layer structure in which they are stacked in order, and the first layer of the three-layer structure may be made of copper, silver, or a silver-palladium alloy, the second layer of the three-layer structure may be made of nickel, and the third layer of the three-layer structure may be made of tin. The multilayer ceramic capacitor 100 of the present invention may be used in autonomous driving technology for electric vehicles, but is not limited to this.

[0037] 4 is a process flowchart of a manufacturing method M of a multilayer ceramic capacitor 100 according to another embodiment of the present invention. Please refer to FIGS. 2 and 4. As shown in step 410 of manufacturing method M, a plurality of dielectric layers 210 are formed. As shown in step 420 of manufacturing method M, a plurality of inner electrode layers 220 are formed. As shown in step 430 of manufacturing method M, the inner electrode layers 220 and the dielectric layers 210 are alternately stacked to form a laminate.

[0038] 2 and 4. As shown in step 440 of manufacturing method M, a sintering process is performed to form the laminate into a multilayer ceramic brick 200. The sintering process includes a low-temperature firing-off step and a high-temperature sintering step. The temperature of the low-temperature firing-off step may be 300°C, and the temperature of the high-temperature sintering step may be 1200°C.

[0039] 2 and 4. As shown in steps 450 and 460 of manufacturing method M, a first terminal electrode 300 and a second terminal electrode 400 are formed on both ends of the multilayer ceramic brick 200, respectively, to obtain a multilayer ceramic capacitor 100.

[0040] The following specific examples are provided to further illustrate and explain the present invention, so as to enable those skilled in the art to fully utilize and practice the present invention without the need for undue interpretation. These examples should not be construed as limiting the scope of the invention, but are intended to illustrate how to practice the materials and methods of the present invention.

[0041] <Experimental Example 1>

[0042] In Experimental Example 1, barium titanate perovskite powder and additives were ball-milled. The additives could be 3 mol% dysprosium oxide (Dy2O3), 0.1 mol% magnesium oxide (MgO), and 0.03 wt% borosilicate glass powder. The raw materials were uniformly mixed and dried to obtain raw material powder, and the raw material powder and organic solvent were pulverized to obtain raw material paste. The raw material paste was cast onto a plastic film and dried to obtain ceramic green sheets. Nickel paste containing 0.05 wt% indium oxide (In2O3) powder was uniformly mixed using a three-roller mixer and then printed onto the green sheets as an inner layer. Multiple printed nickel sheets were stacked and cut to obtain green sheets for nickel-indium multilayer ceramic capacitor wafers. The organic adhesive was fired at 300°C, and then the oxygen partial pressure was 1×10 -13 Under these conditions, the nickel-indium multilayer ceramic capacitors were sintered at 1200°C for 2 hours and then reoxidized at a lower temperature. During the sintering process in a reducing atmosphere, the indium oxide was converted to metallic indium, forming a nickel-indium alloy. Finally, the capacitors were heated at 780°C for 20 minutes to form copper terminal electrodes.

[0043] Subsequently, a highly accelerated life test (HALT) was performed at 140°C and 40V (i.e., a voltage four times higher than the rated voltage). The parameters and mean time between failures for Experimental Example 1 are shown in Table 1 below.

[0044] [Table 1]

[0045] FIG. 5 is a scanning transmission electron microscope annular dark-field image of the multilayer ceramic capacitor 100a of Experimental Example 1. FIG. 6 is an Lα energy dispersive X-ray image of indium in Experimental Example 1 of FIG. 5. As can be seen from FIGS. 5 and 6, the inner electrode layers 220 are formed by sintering nickel paste containing indium. Therefore, the multilayer ceramic capacitor 100a may be referred to as a nickel-indium multilayer ceramic capacitor. The structure of the multilayer ceramic capacitor 100a is substantially the same as that of the multilayer ceramic capacitor 100. The difference between the multilayer ceramic capacitor 100a and the multilayer ceramic capacitor 100 is that the multilayer ceramic capacitor 100a also includes first indium isolation layers 224 in the inner electrode layers 220, and the dielectric layer 210 of the multilayer ceramic capacitor 100a includes multiple second indium isolation layers 214.

[0046] 5 and 6, the dielectric layer 210 may include a plurality of perovskite oxides 212, and the second indium isolation layers 214 may be formed at a plurality of grain boundaries 212a of the perovskite oxides 212. That is, the indium metal in the material of the inner electrode layer 220 not only isolates the interface between the inner electrode layer 220 and the corresponding dielectric layer 210, but also diffuses into the dielectric layer 210 and is barriered by the grain boundaries 212a of the perovskite oxides 212 in the dielectric layer 210.

[0047] See Figures 5 and 6. The crystal grains (i.e., barium titanate crystal grains) may be understood as having a core-shell structure, with the core region of the crystal grain being barium titanate, and the shell region of the crystal grain being the grain boundary 212a (i.e., the second indium isolation layer 214) containing indium metal and the first indium isolation layer 224 containing indium metal. In other words, the indium metal formed a barrier in the shell region of the core-shell structure. Specifically, the diffused indium (+3) occupies the titanium (+4) site of the perovskite oxide 212 and functions as an acceptor, capturing free electrons generated when oxygen vacancies are formed during sintering under a reducing atmosphere. Therefore, the indium isolation located in the shell region of the core-shell structure of the barium titanate crystal grains, including the grain boundaries, increased the resistivity, reduced the leakage current, and improved the mean time to failure of the multilayer ceramic capacitor 100a.

[0048] Nickel can form a liquid phase with the borosilicate glass at the interface between any of the inner electrode layers 220 and the corresponding dielectric layer 210 and diffuse into the shell region of the core-shell structure of the barium titanate crystalline particles. The co-doping amount of the borosilicate glass increases in proportion to the indium content of the nickel paste. The first indium isolation layer 224 and the second indium isolation layer 214 work in concert depending on the total thickness of the dielectric layer 210.

[0049] The first indium content of the first indium isolation layer 224 may be greater than the second indium content of each of the second indium isolation layers 214. When the sum of the titanium content of the perovskite oxide 212 and the second indium content of the second indium isolation layer 214 is 100 mol%, the second indium content may be 10 -20 mol% to 10 -2 The second indium isolation layer 214 may include indium, barium, and titanium.

[0050] After the sintering process, a first indium isolation layer 224 may be formed at the interface between any of the inner electrode layers 220 and one of the corresponding dielectric layers 210, and multiple second indium isolation layers 214 may be formed at multiple grain boundaries 212a of the perovskite oxide 212, and the first indium isolation layer 224 and the second indium isolation layer 214 may be produced simultaneously.

[0051] <Experimental Examples 2 to 6>

[0052] The manufacturing method of the multilayer ceramic capacitor of Experimental Example 1 was similar to the manufacturing method of the multilayer ceramic capacitors of Experimental Examples 2 to 6 (hereinafter abbreviated as Experimental Examples 2 to 6). In Experimental Examples 2 to 6, the amount of indium oxide added was changed depending on the total thickness of the dielectric layers of the multilayer ceramic capacitor. The amount of borosilicate glass powder added was essentially proportional to the amount of indium oxide added to promote the diffusion of indium crystals in the dielectric layers.

[0053] <Experimental Examples 7 to 14>

[0054] The manufacturing method of the multilayer ceramic capacitor of Experimental Example 1 was similar to the manufacturing method of the multilayer ceramic capacitors of Experimental Examples 7 to 14 (hereinafter abbreviated as Experimental Examples 7 to 14). In Experimental Examples 7 to 14, the total thickness of the dielectric layers of the multilayer ceramic capacitors was the same, and the range of the added amount of boron silicate glass powder was 0.01 wt% to 5 wt%, but the added amount of indium oxide was different.

[0055] <Comparative Examples 1 and 2>

[0056] The manufacturing method of the multilayer ceramic capacitor of Experimental Example 1 was similar to the manufacturing methods of the multilayer ceramic capacitors of Comparative Examples 1 and 2. In Comparative Example 1, indium oxide was not added. In Comparative Example 2, borosilicate glass powder was not added.

[0057] Figure 7 is a scanning transmission electron microscope bright-field image of the multilayer ceramic capacitor 100b of Experimental Example 2. Figure 8 is an Lα energy dispersive X-ray image of indium of Experimental Example 2 of Figure 7. As can be seen from Figures 7 and 8, the multilayer ceramic capacitor 100b is a nickel-indium multilayer ceramic capacitor. As shown in Figure 8, the indium isolation (i.e., the first indium isolation layer 224 and the second indium isolation layer 214) is located at the interface between the inner layer 222 and the dielectric layer 210, and at the grain boundaries 212a of the perovskite oxide 212.

[0058] Figure 9 is an enlarged view of the barium titanate perovskite oxide in Figure 8. Figure 10 is an Lα energy dispersive X-ray image of indium in the barium titanate perovskite oxide in Figure 9. As shown in Figure 9, indium diffuses and is isolated in the shell region of the core-shell structure. Since indium isolation is located in the shell region, including the grain boundaries, indium can occupy the titanium sites in the barium titanate and extend the receptor function to the core region of the dielectric layer. When the thickness of the dielectric layer is increased, the indium isolation in the shell region also has an effect.

[0059] The results in Table 1 show that compared with the mean time between failures of the multilayer ceramic capacitors of Comparative Examples 1 and 2, the multilayer ceramic capacitor of the present invention has a specific content of boron silicate glass powder and indium oxide, and can improve the mean time between failures.

[0060] 11 is a graph 1100 showing the relationship between the total thickness of the dielectric layers in a nickel multilayer ceramic capacitor and a nickel-indium multilayer ceramic capacitor and the mean time between failures. As shown in FIG. 11, as the total thickness of the dielectric layers increases, the mean time between failures of the nickel-indium multilayer ceramic capacitor increases, thereby extending the service life of the nickel-indium multilayer ceramic capacitor. Furthermore, the mean time between failures of the nickel-indium multilayer ceramic capacitor is superior to that of the nickel multilayer ceramic capacitor.

[0061] As described above, one advantage of the present invention is as follows. The inner electrode layers of the multilayer ceramic capacitor include a nickel inner layer and an indium isolation layer located between the nickel inner layer and the dielectric layer. The indium isolation layer can provide a Schottky barrier between the nickel inner layer and the dielectric layer, and the Schottky barrier can suppress leakage current. Furthermore, due to the addition of indium metal, the multilayer ceramic brick can be sintered in a highly reducing atmosphere. Therefore, the multilayer ceramic capacitor can have stable reliability at high operating temperatures. This can extend the high-temperature load life of the multilayer ceramic capacitor and improve its reliability. Compared to known multilayer ceramic capacitors, the multilayer ceramic capacitor of the present invention has an improved mean time between failures, thereby extending the service life of the multilayer ceramic capacitor.

[0062] Although the present invention has been disclosed in the above embodiments, the above embodiments are not intended to limit the present invention, and any person skilled in the art can make various modifications and improvements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be determined based on what is defined by the claims attached below. [Explanation of symbols]

[0063] 100, 100a, 100b: Multilayer ceramic capacitors 200: Multilayer ceramic brick 202: First end surface 204: Second end surface 205: 1st surface 206:Second surface 207:Third surface 208: 4th surface 210: Dielectric layer 212: Perovskite oxide 212a: Grain boundary 214: Second indium isolation layer 220: Inner electrode layer 222: Inner layer 224: First indium isolation layer 300: 1st terminal electrode 400: 2nd terminal electrode 410, 420, 430, 440, 450, 460: Process 1100:Graph H: Total thickness h1, h2: thickness M: Manufacturing method

Claims

1. a multilayer ceramic brick having a first end surface and a second end surface facing each other, the multilayer ceramic brick including: a plurality of dielectric layers each including a plurality of perovskite oxides containing barium and titanium and a borosilicate glass; and a plurality of inner electrode layers stacked one on top of the plurality of dielectric layers; a first terminal electrode provided on the first end surface and electrically connected to some of the plurality of inner electrode layers; a second terminal electrode provided on the second end surface and electrically connected to another part of the plurality of inner electrode layers; Equipped with Each of the plurality of inner electrode layers is an inner layer made of a material containing nickel; a first indium isolation layer located between the inner layer and one of the plurality of dielectric layers, the first indium isolation layer having a thickness of 1 nm to 19 nm; Including, The plurality of dielectric layers include a plurality of second indium isolation layers located at a plurality of grain boundaries of the plurality of perovskite oxides, respectively.

2. 2. The multilayer ceramic capacitor according to claim 1, wherein the weight of the borosilicate glass is 0.01 wt % to 5 wt % when the total weight of the plurality of perovskite oxides is 100 wt %.

3. 2. The multilayer ceramic capacitor of claim 1, wherein the borosilicate glass comprises diboron trioxide, dialuminum trioxide, and silicon dioxide.

4. 2. The multilayer ceramic capacitor according to claim 1, wherein the plurality of inner electrode layers are formed by sintering nickel paste to which indium has been added, and the amount of indium added to the nickel paste is 0.01 mol % to 5 mol %.

5. 2. The multilayer ceramic capacitor of claim 1, wherein the first indium content of the first indium isolation layer is greater than the second indium content of each of the plurality of second indium isolation layers.

6. When the total of the titanium content of the plurality of perovskite oxides and the second indium content of the plurality of second indium isolation layers is 100 mol%, the second indium content is 10 -20 mol% to 10 -2 2. The multilayer ceramic capacitor according to claim 1, wherein the content of the cations in the cations is 1.0 mol %.

7. 2. The multilayer ceramic capacitor of claim 1, wherein the first indium isolation layer comprises indium, barium, and titanium.

8. 2. The multilayer ceramic capacitor of claim 1, wherein the plurality of second indium isolation layers comprises indium, barium, and titanium.

9. 2. The multilayer ceramic capacitor according to claim 1, wherein the ratio of the thickness of each of the plurality of internal electrode layers to the thickness of each of the plurality of dielectric layers is 0.4 to 0.

6.

10. A method for manufacturing a multilayer ceramic capacitor, comprising: forming a plurality of dielectric layers comprising a plurality of perovskite oxides comprising barium and titanium and a borosilicate glass; forming a plurality of inner electrode layers; a step of alternately stacking the plurality of inner electrode layers and the plurality of dielectric layers to form a laminate; performing a sintering process including a low-temperature firing removal step and a high-temperature sintering step to form the laminate into a multilayer ceramic brick; forming a first terminal electrode and a second terminal electrode on both ends of the multilayer ceramic brick, respectively, to obtain a multilayer ceramic capacitor; A method for manufacturing a multilayer ceramic capacitor comprising:

11. 11. The method for producing a multilayer ceramic capacitor according to claim 10, wherein the weight of the borosilicate glass is 0.01 wt % to 5 wt % when the total weight of the plurality of perovskite oxides is 100 wt %.

12. 11. The method for producing a multilayer ceramic capacitor according to claim 10, wherein the borosilicate glass contains diboron trioxide, dialuminum trioxide, and silicon dioxide.

13. 11. The method for manufacturing a multilayer ceramic capacitor according to claim 10, wherein the plurality of inner electrode layers are formed by sintering nickel paste to which indium has been added, and the amount of indium added to the nickel paste is 0.01 mol % to 5 mol %.

14. 11. The method for manufacturing a multilayer ceramic capacitor according to claim 10, wherein after the sintering process, a first indium isolation layer is formed at the interface between any one of the plurality of inner electrode layers and one of the plurality of dielectric layers corresponding thereto, and a plurality of second indium isolation layers are formed at a plurality of crystal grain boundaries of the plurality of perovskite oxides, and the first indium isolation layer and the plurality of second indium isolation layers are generated simultaneously.

Images