Converter system, control method for converter system, and uninterruptible power supply system

Abstract

To provide a converter system and uninterruptible power supply system capable of suppressing a phase difference among carrier signals of a plurality of three-phase PWM converters connected in parallel without connection using a signal line.SOLUTION: A plurality of first converters 12 connected in parallel without a transformer convert input voltage VR, VS, VT to intermediate DC voltage VAB using on-off control of bridge-connected switching elements Q1 to Q6. A control unit 20 compares a carrier signal with a carrier wave based on the input voltage VR, VS, VT to generate a PWM signal for performing on-off control of the switching elements Q1 to Q6. The control unit 20 takes timing, in the vicinity of which two of three phases of the carrier wave overlap, as phase determination timing. The control unit 20 adjusts phases of carrier signals so that a frequency component about twice of that of a carrier frequency is dominant in other converter current whose phase determination timing does not overlap.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a converter system in which a plurality of PWM converters are connected in parallel, and an uninterruptible power supply system. [Background technology]

[0002] As shown in Patent Document 1, in an uninterruptible power supply system in which multiple three-phase uninterruptible power supplies equipped with PWM converters are connected in parallel without a transformer, a circulating current flows if they share a common battery. The circulating current includes a component caused by the phase difference of the carrier signals in the multiple PWM converters connected in parallel. Therefore, the circulating current can be reduced by distributing and using a common carrier signal among the multiple PWM converters connected in parallel. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2024-5823 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in an uninterruptible power supply system in which multiple three-phase uninterruptible power supplies are connected in parallel, the parallel UPSs are not necessarily located close to each other, and the power lines and signal lines may not be separated between the UPSs. In this case, multiple PWM converters connected in parallel may have noise superimposed on the common carrier signal, making it impossible to accurately detect the carrier signal or causing a phase difference.

[0005] One aspect of the present invention is to provide a converter system, a control method for the converter system, and an uninterruptible power supply system that can suppress the phase difference between the carrier signals of multiple PWM converters connected in parallel without connecting them with signal lines. [Means for solving the problem]

[0006] A converter system according to one embodiment of the present invention includes a plurality of three-phase PWM converters connected in parallel without a transformer. The PWM converters convert three-phase AC voltages into DC voltages by controlling the on / off of bridge-connected switching elements. The system also includes a plurality of control units that independently control the plurality of three-phase PWM converters. Each of the control units includes a converter control functional block. The converter control functional block generates a PWM signal that controls the on / off of the switching elements by comparing a carrier wave based on an input voltage with a carrier signal. All or all but one of the plurality of control units includes a synchronization control functional block. The synchronization control functional block uses the area where two of the three phases of the carrier wave overlap as a phase determination timing and adjusts the phase of the carrier signal so that a frequency component approximately twice the carrier frequency becomes dominant in the converter current of the other non-overlapping phases. [Effects of the Invention]

[0007] According to one aspect of the present invention, it is possible to suppress the phase difference of carrier signals used to generate PWM signals in multiple PWM converters connected in parallel without connecting the multiple PWM converters connected in parallel in a transformerless manner using signal lines. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of an uninterruptible power supply system. [Figure 2] FIG. 2 is a diagram illustrating an input filter and a first converter shown in FIG. [Figure 3] 2 is a diagram illustrating a second converter and an output filter shown in FIG. 1. FIG. [Figure 4] FIG. 2 is a diagram illustrating a control unit shown in FIG. [Figure 5] FIG. 10 is a diagram illustrating phase detection timing. [Figure 6] FIG. 10 is a diagram illustrating a converter current at a phase detection timing. [Figure 7]FIG. 10 is a diagram showing a simulation of analysis results (first-order / second-order). [Figure 8] 10 is a flowchart showing a phase adjustment operation. DETAILED DESCRIPTION OF THE INVENTION

[0009] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the following, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following embodiments, components having similar functions will be given the same reference numerals and descriptions thereof will be omitted as appropriate.

[0010] Referring to FIG. 1, the uninterruptible power supply system 1 of this embodiment includes a plurality of uninterruptible power supply devices 1. The power storage device 4 supplies backup power in the event of a power outage.

[0011] The uninterruptible power supply system 1 operates using a continuous inverter power supply method. During normal operation when three-phase AC power is being supplied normally from the commercial AC power supply 2, the uninterruptible power supply system 1 converts the three-phase AC power from the commercial AC power supply 2 into DC power, charges the power storage device 4 with the converted DC power, and then converts the converted DC power into AC power to supply to the load 3. During an abnormal operation when three-phase AC power is not being supplied normally from the commercial AC power supply 2, the uninterruptible power supply system 1 converts the DC power stored in the power storage device 4 into AC power and supplies it to the load 3, thereby continuing the supply of AC power to the load 3.

[0012] The power storage device 4 includes, for example, a battery pack in which a plurality of battery cells (secondary batteries such as lithium ion batteries and lead-acid batteries) are connected in series and / or parallel, and in some cases, a battery management system (BMS) that manages the plurality of battery cells. The power storage device 4 may be configured using a flywheel or a capacitor. There is no limit to the number of power storage devices 4, and they can be increased or decreased depending on the required backup time.

[0013] In the uninterruptible power supply system 1, multiple UPSs 10a, 10b are connected in parallel without a transformer. Each of the multiple UPSs 10a, 10b operates independently using a continuous inverter power supply method. By connecting multiple UPSs 10a, 10b in parallel, the uninterruptible power supply system 1 can increase its output capacity and provide redundancy. There is no limit to the number of UPSs 10a, 10b, and they can be increased or decreased depending on the required output capacity and number of redundant units. The UPSs 10a, 10b have the same configuration, and when there is no need to distinguish between the UPSs 10a, 10b, they will be described as UPS 10.

[0014] The UPS 10 is connected to a commercial AC power source 2 and converts the three-phase AC voltage supplied from the commercial AC power source 2 into an input voltage V R , V S , V T AC input terminal T1 receives R , T1 S , T1 T The UPS 10 includes a DC input / output terminal T2 to which the power storage device 4 is connected. A , T2 B The UPS 10 outputs an output voltage V U , V V , V W AC output terminal T3 U , T3 V , T3 W Equipped with.

[0015] The UPS 10 includes an input filter 11 and a first converter 12. AC input terminal T1 R , T1 S , T1 T The input voltage V R , V S , V T is input to the first converter 12 via the input filter 11.

[0016] The first converter 12 converts the input voltage V supplied from the commercial AC power supply 2 into R , V S , V T The intermediate DC voltage V between the positive power line A and the negative power line B ABTherefore, the uninterruptible power supply system 1 is a converter system in which the three-phase PWM converter of the UPS 10a and the three-phase PWM converter of the UPS 10b are connected in parallel without a transformer.

[0017] Referring to FIG. 2, the input filter 11 is R , V S , V T The input filter 11 has inductors L1 to L3 provided on the AC lines to which the input voltage V R , V S , V T The capacitors C1 to C3 are connected to AC lines to which the input voltage V is input, and the other ends of the capacitors C1 to C3 are connected to each other. R , V S , V T The input filter 11 may be a delta connection connected between the lines of the input voltage V R , V S , V T and converts the square wave generated by the first converter 12 into a sine wave voltage, thereby forming an AC filter (low-pass filter) that prevents harmonics from leaking to the commercial AC power supply 2 side.

[0018] The first converter 12 includes switching elements Q1 to Q6, each composed of a bridge-connected IGBT, and diodes D1 to D6 connected in anti-parallel to the switching elements Q1 to Q6, respectively. The state in which the diode D1 is connected in anti-parallel to the switching element Q1 means, for example, that the collector of the switching element Q1 is connected to the cathode of the diode D1, and the emitter of the switching element Q1 is connected to the anode of the diode D1. That is, the diodes D1 to D6 are connected in parallel with each other so that the forward direction is opposite to the direction of current flowing between the collectors and emitters of the switching elements Q1 to Q6. The switching elements Q1 to Q6 may be configured with other power transistors, such as MOSFETs. The body diodes of the switching elements Q1 to Q6 may be substituted for the diodes D1 to D6.

[0019] Switching elements Q1 and Q2 are connected in series as an R-phase arm between positive power line A and negative power line B. Diodes D1 and D2 are connected in antiparallel to switching elements Q1 and Q2, respectively. The connection point between switching elements Q1 and Q2 is the neutral point of the R-phase arm.

[0020] Switching elements Q3 and Q4 are connected in series as an S-phase arm between positive power line A and negative power line B. Diodes D3 and D4 are connected in antiparallel to switching elements Q3 and Q4, respectively. The connection point between switching elements Q3 and Q4 is the neutral point of the S-phase arm.

[0021] Switching elements Q5 and Q6 are connected in series as a T-phase arm between the positive power line A and the negative power line B. Diodes D5 and D6 are connected in antiparallel to switching elements Q5 and Q6, respectively. The connection point between switching element Q4 and switching element Q6 is the neutral point of the T-phase arm.

[0022] The UPS 10 includes an input voltage detector 31 and a converter current detector 32. The input voltage detector 31 detects input voltages V1 and V2. S , V T The input voltage value V R * , V S * , V T * The converter current detector 32 detects the converter current of each phase as a converter current value i R * , i S * , i T * Detect as.

[0023] The UPS 10 includes a capacitor C connected to a positive power line A and a negative power line B. AB Capacitor C AB is the intermediate DC voltage V between the positive power line A and the negative power line B AB The positive power line A is connected to the DC input / output terminal T2A The negative power line B is connected to the DC input / output terminal T2 B Therefore, the capacitor C AB are connected in parallel to the power storage device 100.

[0024] The UPS 10 includes a second converter 13 and an output filter 14 .

[0025] The second converter 13 generates an intermediate DC voltage V between the positive power line A and the negative power line B. AB The output voltage V supplied to load 3 U , V V , V W This is a three-phase PWM inverter that converts

[0026] 3, the second converter 13 includes switching elements Q7 to Q12, each made of a bridge-connected IGBT, and diodes D7 to D12 connected in anti-parallel to the switching elements Q7 to Q12, respectively. The switching elements Q7 to Q12 may be configured with other power transistors such as MOSFETs. The body diodes of the switching elements Q7 to Q12 may be substituted for the diodes D7 to D12.

[0027] Switching elements Q7 and Q8 form a U-phase arm connected in series between positive power line A and negative power line B. Diodes D7 and D8 are connected in antiparallel to switching elements Q7 and Q8, respectively. The connection point between switching elements Q7 and Q8 is the neutral point of the U-phase arm.

[0028] Switching elements Q9 and Q10 form a V-phase arm connected in series between positive power line A and negative power line B. Diodes D9 and D10 are connected in antiparallel to switching elements Q9 and Q10, respectively. The connection point between switching elements Q9 and Q10 is the neutral point of the V-phase arm.

[0029] Switching elements Q11 and Q12 are connected in series as a W-phase arm between positive power line A and negative power line B. Diodes D11 and D12 are connected in antiparallel to switching elements Q11 and Q12, respectively. The connection point between switching elements Q11 and Q12 is the neutral point of the W-phase arm.

[0030] The output filter 14 is connected to the output voltage V U , V V , V W Inductors L4 to L6 are provided on each of the AC lines that output the output voltage V U , V V , V W and capacitors C4 to C6, each connected to an AC line that outputs the input voltage V U , V V , V W The output filter 14 is a delta connection connected between the lines of the second converter 13. U , V V , V W and converts the square wave voltage generated by the second converter 13 into a sine wave voltage, thereby forming an AC filter (low pass filter) that prevents harmonics from leaking to the load 3 side.

[0031] The UPS 10 includes an output voltage detector 34 and an inverter current detector 35. The output voltage detector 34 detects the output voltage V U , V V , V W The output voltage value V U * , V V * , V W * The inverter current detector 35 detects the inverter current of each phase as an inverter current value i U * , i V * , i W * Detect as.

[0032] The UPS 10 includes a control unit 20 that controls the operations of the first converter 12 and the second converter 13. The control unit 20 includes a CPU (Central Processing Unit), a ROM (Read Only Memory), The control unit 20 is an arithmetic processing circuit such as a microcomputer equipped with a ROM, a RAM (Random Access Memory), etc. The control unit 20 reads out a control program stored in the ROM and expands the control program in the RAM, thereby controlling the operation of the first converter 12 and the second converter 13.

[0033] The control unit 20 includes, as a converter control function block for controlling the first converter 12, an AC command value generation unit 21, a converter command value calculation unit 22, and a converter PWM signal generation unit .

[0034] The AC command value generating unit 21 generates an input voltage value V detected by the input voltage detector 31. R * , V S * , V T * The AC command value for each phase is generated in synchronization with the phase of the inverter.

[0035] The converter command value calculation unit 22 calculates the AC command value for each phase generated by the AC command value generation unit 21 and the converter current value i detected by the converter current detector 32. R * , i S * , i T * Based on these, calculations are performed using known techniques to generate PWM command values ​​for each phase.

[0036] The converter PWM signal generation unit 23 compares the PWM command values ​​for each phase generated by the converter command value calculation unit 22 with the carrier signal, and generates gate signals P1 to P6 that control the on / off of the switching elements Q1 to Q6 of the first converter 12.

[0037] The control unit 20 includes an inverter command value calculation unit 24 and an inverter PWM signal generation unit 25 as inverter control function blocks for controlling the second converter 13 .

[0038] The inverter command value calculation unit 24 calculates the AC command value of each phase and the output voltage value V U * , V V * , V W * and the inverter current value i U * , i V * , i W * Based on these, calculations are performed using known techniques to generate PWM command values ​​for each phase.

[0039] The inverter PWM signal generation unit 25 compares the PWM command values ​​for each phase generated by the inverter command value calculation unit 24 with the carrier signal, and generates gate signals P7 to P12 that control the on / off of the switching elements Q7 to Q12 of the second converter 13.

[0040] The control unit 20 includes a synchronization control function block that synchronizes the phases of the carrier signals between the UPSs 10a and 10b connected in parallel, and includes a phase determination timing detection block 26, a band-limiting filter 27, a phase determination block 28, and a carrier signal generation block 29. The synchronization control function block of the control unit 20 synchronizes the carrier signals of the UPSs 10a and 10b by internal control without connecting the UPSs 10a and 10b with a signal line.

[0041] The carrier wave V, which is the voltage command of the converter R ** , V S ** , V T ** As shown in FIG. 5(a), there are six timings in one cycle at 90° intervals when two of the three phases overlap. The phase determination timing detector 26 detects the input voltage value V R * , V S *The phase determination timing detector 26 detects, as the phase determination timing, one or more of the six periods Te1 to Te6 around the timing when two of the three phases overlap. The phase determination timing detector 26 may detect all six periods as the phase determination timing. The phase determination timing detector 26 detects the carrier wave V R ** , V S ** , V T ** It is not necessary to detect the phase determination timing for every cycle of the carrier signal, but it may be detected at a predetermined cycle interval. The phase determination timing detector 26 may change the cycle interval at which the phase determination timing is detected. For example, the phase determination timing detector 26 may detect the phase determination timing at short cycle intervals until the phase of the carrier signal is synchronized, and after the phase of the carrier signal is synchronized, the cycle interval at which the phase determination timing is detected may be extended.

[0042] For example, during period Te2, the pulse waveforms of the gate signals P1 and P3 of the switching elements Q1 and Q3 are almost equal, although they are not completely equal due to the dead time, as shown in Fig. 5(b). Therefore, during period Te2, the first converter 12 is in a state as if it were switching in two phases, as shown in Fig. 5(c).

[0043] FIG. 6(a) shows the carrier V R ** , V S ** , V T ** 6(b) shows the carrier signal. When there is no phase shift between the carrier signals of the UPS 10a and 10b, as shown in FIG. 6(c), the T-phase converter current value i T * In this case, a frequency component (hereinafter referred to as a secondary component) that is approximately twice the frequency of the carrier signal (hereinafter referred to as a carrier frequency) becomes dominant.

[0044] 6(d) and (e) show the T-phase converter current value i when the phase difference between the carrier signals of the UPSs 10a and 10b is at its maximum, 180°. T * The converter current value i of the T phase in the UPS 10a and 10b is T * are out of phase with each other, and a frequency component approximately equal to one time the carrier frequency (hereinafter referred to as a first-order component) becomes dominant.

[0045] When the phase shift of the carrier signals in the UPSs 10a and 10b is 0° to 180°, the waveform is somewhere between that shown in FIG. 6(c) and that shown in FIG. 6(d) and (e). That is, when the converter current value i T * The larger the phase shift, the greater the proportion of the first-order component, and the smaller the phase shift, the greater the proportion of the second-order component.

[0046] Therefore, the phase determination unit 28 determines whether or not there is a phase shift in the carrier signal by analyzing the frequency components of the converter current of phases whose input voltage values ​​do not overlap near the point where two of the three phases overlap. The ratio of the primary component to the secondary component is the subject of analysis.

[0047] Therefore, the converter current value i detected by the converter current detector 33 T * is passed through a band-limiting filter 27 to reduce the influence of frequency components unnecessary for analysis, and is input to a phase determining unit 28. The band-limiting filter 27 R , V S , V T It functions as a high-pass filter that cuts fundamental wave components such as those of the control power supply, and also functions as a low-pass filter that cuts harmonic components such as those of the control power supply.

[0048] The phase determination unit 28 determines the converter current value i T * is analyzed by, for example, a discrete Fourier transform (DFT), and the ratio of the first-order component to the second-order component is calculated as the analysis result (first-order / second-order).

[0049] FIG. 7 is a characteristic graph showing the relationship between the analysis result (primary / secondary) by the phase determination unit 28 and the phase shift between the UPSs 10a and 10b simulated over periods (Te2 and Te5). In FIG. 7, the solid line indicates the rated load, and the dotted line indicates the no-load state. The analysis result (primary / secondary) is the lowest value within the phase difference range of 0.0 to 1.0 μs, where there is almost no phase shift, and the graph shows a curve similar to a quadratic function. Therefore, the phase determination unit 28 instructs the carrier signal generation unit 29, which generates the carrier signal shown in FIG. 6(b), to adjust the phase so that the analysis result (primary / secondary) falls within a valley (less than a predetermined determination threshold th). Other possible applications include the gradient descent method (a method of controlling in a direction that reduces the slope) and the least squares method (a method of controlling so that the unsigned squared value is reduced).

[0050] Carrier signal generating unit 29 outputs the carrier signal, the phase of which has been adjusted based on the instruction from phase determining unit 28, to converter PWM signal generating unit 23 and inverter PWM signal generating unit 25.

[0051] Next, the phase adjustment operation by the synchronization control function block of the control unit 20 will be described in detail with reference to FIG. The phase determination timing detector 26 detects the carrier wave V R ** , V S ** The period (Te2, Te5) around the timing when the gate waveforms overlap is detected as the phase determination timing (step S101). The phase determination timing detection unit 26 stops detecting the phase determination timing during the period when the gate waveform is disturbed, such as when the gate is blocked for overcurrent protection. In other words, the synchronization control function block does not perform the phase adjustment operation during the period when the gate waveform is disturbed.

[0052] When the phase determination timing is detected in step S101, the phase determination unit 28 determines the converter current value i T *is taken in via the band limiting filter 27 and the frequency components are analyzed (step S102). The phase determining unit 28 calculates the ratio between the first-order component and the second-order component as the analysis result (first-order / second-order) (step S103).

[0053] The phase determination unit 28 determines whether the analysis result (primary / secondary) is less than the determination threshold th (step S104). If the analysis result (primary / secondary) is not less than the determination threshold th in step S104, the phase determination unit 28 determines that a phase shift has occurred. If it is determined that a phase shift has occurred, the phase determination unit 28 diagnoses whether the analysis result (primary / secondary) is stored in the primary storage area for the analysis result (step S105). If the analysis result (primary / secondary) is not stored in the primary storage area in step S105, the phase determination unit 28 instructs the carrier signal generation unit 29 to adjust the phase. The phase determination unit 28 sets the adjustment amount to a first adjustment amount (e.g., 1 μs) (step S106) and instructs the carrier signal generation unit 29 to adjust the phase in a direction (leading or lagging) preset by the set adjustment amount (step S107). The carrier signal generation unit 29 outputs a carrier signal whose phase has been adjusted based on the instruction in step S107. If the analysis result (primary / secondary) is not stored in the primary storage area in step S105, it means that the previous determination did not result in a phase shift. Therefore, since it is not known in which direction the phase adjustment should be performed, the phase determination unit 28 instructs the phase adjustment in the direction preset by the set adjustment amount (first adjustment amount).

[0054] Next, the phase determination unit 28 stores the phase adjustment direction instructed to the carrier signal generation unit 29 and the analysis result (primary / secondary) calculated in step S103 in a primary storage area (step S108). Returning to step S101, the phase determination timing detection unit 26 detects the next phase determination timing.

[0055] If the analysis result (primary / secondary) is stored in the primary storage area in step S105, the phase determination unit 28 determines whether the current analysis result (primary / secondary) is improved compared to the previous analysis result (primary / secondary) that is stored (step S109). That is, the phase determination unit 28 determines whether the analysis result (primary / secondary) is improved by the previous phase adjustment.

[0056] If an improvement is found in step S109, the phase determination unit 28 instructs the carrier signal generation unit 29 to adjust the phase in the same direction as the previous time by the set adjustment amount (step S110). The carrier signal generation unit 29 outputs a carrier signal whose phase has been adjusted based on the instruction of step S110. Next, in step S108, the phase determination unit 28 stores the direction of phase adjustment and the analysis result (primary / secondary) calculated in step S103 in a primary storage area.

[0057] If no improvement is found in step S109, this means that the previous adjustment direction was incorrect. Therefore, the phase determination unit 28 instructs the carrier signal generation unit 29 to adjust the phase in the opposite direction to the previous adjustment by twice the set adjustment amount (step S111). The carrier signal generation unit 29 outputs a carrier signal whose phase has been adjusted based on the instruction in step S111.

[0058] Next, the phase determination unit 28 sets the adjustment amount to be smaller than the first adjustment amount (for example, to 0.1 μs) (step S112), and then proceeds to step S108, where it stores the direction of phase adjustment and the analysis result (primary / secondary) calculated in step S103 in the primary storage area.

[0059] If the analysis result (primary / secondary) is less than the determination threshold th in step S104, the phase determination unit 28 determines that no phase shift has occurred. If it is determined that no phase shift has occurred, the phase determination unit 28 erases the contents stored in the primary storage area (step S112), and the process returns to step S101, where the phase determination timing detection unit 26 detects the next phase determination timing.

[0060] The synchronization control function block of the control unit 20 may be provided in both UPS 10a and 10b, or in only one of them. This embodiment is also applicable to cases where the number of UPS 10 connected in parallel is three or more. When the number of UPS 10 connected in parallel is three or more, the synchronization control function block of the control unit 20 may be provided in all UPS 10, or in all UPS 10 except for one.

[0061] Furthermore, in the above-described embodiment, a method for suppressing the phase difference of the carrier signal in a converter system in which a plurality of three-phase PWM converters are connected in parallel without a transformer has been described, but the present invention is not limited to this. That is, the present invention can be applied to any converter system in which a plurality of PWM converters are connected in parallel without a transformer, such as a converter system in which a plurality of single-phase PWM converters are connected in parallel without a transformer, or a converter system in which a plurality of bidirectional PWM inverters are connected in parallel without a transformer.

[0062] For example, if the converter system is a transformerless converter system with multiple single-phase PWM converters connected in parallel, the converter current can be controlled to approximate the current waveform when only one converter is operating. That is, the converter system's control unit uses the converter current and the carrier signal frequency to control the converter current so that the frequency component of the carrier signal becomes dominant. This makes it possible to suppress the phase difference of the carrier signal, even in a converter system with multiple single-phase PWM converters connected in parallel without a transformer.

[0063] Furthermore, in the above-described embodiment, the band-limiting filter 27 is a band-pass filter (BPF) that cuts off a band lower than a frequency component that is approximately one time the carrier frequency and cuts off a band higher than a frequency component that is approximately twice the carrier frequency, and the phase determining unit 28 determines the converter current value i T *is analyzed by a discrete Fourier transform (DFT). However, the present invention is not limited to this. That is, the band-limiting filter 27 may include a first filter that passes a frequency component (first-order component) that is approximately one time the carrier frequency, and a second filter that passes a frequency component (second-order component) that is approximately twice the carrier frequency.

[0064] Specifically, the first filter may include a first high-pass filter (HPF) and a first low-pass filter (LPF) that pass frequency components (first-order components) that are approximately one time the carrier frequency, and the second filter may include a second high-pass filter and a second low-pass filter that pass frequency components (second-order components) that are approximately twice the carrier frequency. Note that the first filter may be a band-pass filter that passes frequency components that are approximately one time the carrier frequency, and the second filter may be a band-pass filter that passes frequency components that are approximately twice the carrier frequency.

[0065] The converter current value i detected by the converter current detector 33 T * is input to the first filter and the second filter. The phase determination unit 28 determines the converter current value i T * is the primary component, and the converter current value i T * is a second-order component, the ratio of the first-order component to the second-order component may be calculated as the analysis result (first-order / second-order).

[0066] With this configuration, the phase determination unit 28 can calculate the ratio between the first-order component and the second-order component as the analysis result (first-order / second-order) without using a discrete Fourier transform (DFT). Because the band-limiting filter 27 includes a first filter and a second filter and the phase determination unit 28 calculates the analysis result without using a discrete Fourier transform (DFT), the control unit 20 can perform calculations using a filter configured with hardware, enabling faster synchronization control with less burden on the controller.

[0067] (summary) (1) A converter system (uninterruptible power supply system 1) according to each embodiment of the present invention includes a first converter 12 (three-phase PWM converter) in which a plurality of converters are connected in parallel without a transformer. The first converter 12 converts an input voltage V R , V S , V T (three-phase AC voltage) to intermediate DC voltage V AB (DC voltage). The plurality of control units 20 independently control the plurality of first converters 12. Each of the plurality of control units 20 includes a converter control function block. The converter control function block converts the input voltage V R , V S , V T A PWM signal is generated to control the on / off of the switching elements Q1 to Q6 by comparing the carrier wave based on the carrier signal with the carrier wave. All or all but one of the multiple control units 20 are provided with a synchronization control function block. The synchronization control function block controls two of the three phases of the carrier wave (input voltage value V R ** , V S ** The synchronization control function block determines the phase judgment timing when the converter current value i T * The phase of the carrier signal is adjusted so that the secondary component (a frequency component approximately twice the carrier frequency) becomes dominant in the converter current.

[0068] According to the converter system described in (1) above, it is possible to suppress the phase difference of the carrier signals used to generate PWM signals in the multiple first converters 12 connected in parallel without connecting the multiple first converters 12 in a transformerless manner with no signal lines. Therefore, it is possible to control the multiple first converters 12 connected in parallel as if they were a single device with synchronized carrier signals.

[0069] (2) The synchronization control function block described in (1) above is configured to synchronize the converter current value i T * In the step S100, the phase of the carrier signal is adjusted so that the ratio of the first-order component (a frequency component having approximately the same frequency as the carrier frequency) to the second-order component becomes less than a predetermined determination threshold value th.

[0070] According to the converter system described in (2) above, the converter current value i T * The boundary where the second-order component becomes dominant can be mathematically set by the ratio of the first-order component to the second-order component in .

[0071] (3) The synchronization control function block described in (2) above includes a band-limiting filter 27. The band-limiting filter 27 cuts off a band lower than the first-order component and a band higher than the second-order component. The synchronization control function block outputs the converter current value i T * and a phase determination unit 28 that analyzes the frequency components of the signal.

[0072] According to the converter system described in (3) above, the converter current value i T * The first and second order components can be determined from

[0073] (4) The synchronization control function block described in (2) above includes a first filter that passes a frequency component approximately equal to the carrier frequency, and a second filter that passes a frequency component approximately equal to twice the carrier frequency. The synchronization control function block converts the converter current i T* and the converter current i T * and a phase determination unit 28 that analyzes the phase.

[0074] According to the converter system described in (4) above, the converter current value i T * Therefore, the first and second components can be obtained without performing complex processing.

[0075] (5) An uninterruptible power supply system 1 according to each embodiment of the present invention includes the converter system described in (1) to (4) above. The uninterruptible power supply system 1 converts an intermediate DC voltage V into a voltage V by controlling the on / off states of the bridge-connected switching elements Q7 to Q12. AB and a second converter 13 (three-phase PWM inverter) that converts the voltage Vin into a three-phase output voltage.

[0076] According to the uninterruptible power supply system 1 described in (5) above, the uninterruptible power supply system 1 can be configured using a plurality of first converters 12 connected in parallel without a transformer.

[0077] (6) The control unit 20 described in (5) above includes an inverter control function block that generates a PWM signal that controls the on / off of the switching elements Q7 to Q12 of the second converter 13 by comparing the carrier wave with a carrier signal phase-adjusted by the synchronization control function block.

[0078] According to the uninterruptible power supply system 1 described in (6) above, the phase difference of the carrier signal used in the second converter 13 to generate the PWM signal can be suppressed.

[0079] (7) A control method for a converter system (uninterruptible power supply system 1) according to each embodiment of the present invention controls a plurality of first converters 12 (three-phase PWM converters) connected in parallel without a transformer. The plurality of first converters 12 converts an input voltage V into a voltage V by controlling the on / off of bridge-connected switching elements Q1 to Q6. R , V S , VT (three-phase AC voltage) to intermediate DC voltage V AB Each of the first converters 12 includes a converter control function block. The converter control function block converts the input voltage V R , V S , V T The first converter 12 generates PWM signals for controlling the on / off of the switching elements Q1 to Q6 by comparing the carrier wave based on the carrier signal with the carrier wave. All or all but one of the first converters 12 generate PWM signals for controlling the on / off of two of the three phases of the carrier wave (input voltage value V R * , V S * ) overlap is used as the phase determination timing, and the converter current value i of other phases where the phase determination timing does not overlap is used as the phase determination timing. T * The phase of the carrier signal is adjusted so that the secondary component (a frequency component approximately twice the carrier frequency) becomes dominant in the converter current.

[0080] According to the converter system control method described in (7) above, it is possible to suppress the phase difference of the carrier signals used to generate PWM signals in the multiple first converters 12 connected in parallel without connecting the multiple first converters 12 in parallel with a transformer and without using signal lines. Therefore, it is possible to control the multiple first converters 12 connected in parallel as if they were a single device with synchronized carrier signals.

[0081] (8) The converter system (uninterruptible power supply system 1) according to each embodiment of the present invention includes a first converter 12 (PWM converter) in which a plurality of converters are connected in parallel without a transformer. The plurality of PWM converters converts an input voltage V R , V S , V T (power) to intermediate DC voltage V AB(electric power). The system includes a plurality of control units 20 that independently control the plurality of PWM converters. Each of the plurality of control units 20 includes a converter control function block. The converter control function block generates a PWM signal that controls the on / off of the switching elements Q1 to Q6 by comparing a carrier wave with a carrier signal. All or all but one of the plurality of control units 20 includes a synchronization control function block. The synchronization control function block adjusts the phase of the carrier signal using the converter current and the frequency of the carrier signal.

[0082] According to the converter system described in (8) above, it is possible to suppress the phase difference of the carrier signals used to generate PWM signals in multiple PWM converters connected in parallel without a transformer. Therefore, multiple PWM converters connected in parallel can be controlled as if they were a single device with synchronized carrier signals. The converter system described in (8) above can also be applied to single-phase uninterruptible power supplies and bidirectional inverters such as power conditioners.

[0083] (9) A control method for a converter system (uninterruptible power supply system 1) according to each embodiment of the present invention controls a plurality of first converters 12 (PWM converters) connected in parallel without a transformer. The plurality of PWM converters converts an input voltage V into a voltage V by controlling the on / off of bridge-connected switching elements Q1 to Q6. R , V S , V T (power) to intermediate DC voltage V AB Each of the PWM converters generates a PWM signal that controls the on / off of switching elements Q1 to Q6 by comparing the carrier wave with a carrier signal. All or all but one of the PWM converters adjusts the phase of the carrier signal using the converter current and the frequency of the carrier signal.

[0084] According to the converter system control method described in (9) above, it is possible to suppress the phase difference of the carrier signals used to generate PWM signals in multiple PWM converters connected in parallel without a transformer. Therefore, it is possible to control multiple PWM converters connected in parallel as if they were a single device with synchronized carrier signals. The converter system control method described in (9) above can also be applied to single-phase uninterruptible power supplies and bidirectional inverters such as power conditioners.

[0085] Although the present invention has been described above with reference to specific embodiments, it goes without saying that the above embodiments are merely examples and can be modified and implemented without departing from the spirit of the present invention. [Explanation of symbols]

[0086] 1. Uninterruptible Power Supply System 2 Commercial AC power supply 3. Load 4. Energy storage device 10, 10a, 10b Uninterruptible power supply (UPS) 12 First converter 13 Second converter 14 Output Filter 20 Control Unit 21 AC command value generator 22 Converter command value calculation unit 23 PWM signal generator for converter 24 Inverter command value calculation unit 25 PWM signal generator for inverter 26 Phase determination timing detection unit 27 Band-limiting filter 28 Phase determination section 29 Carrier signal generator 31 Input voltage detector 32 Converter current detector 34 Output voltage detector 35 Inverter current detector Q1~Q12 switching elements th decision threshold

Claims

1. A converter system in which a plurality of three-phase PWM converters that convert three-phase AC voltage into DC voltage by controlling the on / off of bridge-connected switching elements are connected in parallel without a transformer, a plurality of control units that independently control the plurality of three-phase PWM converters each include a converter control function block that generates a PWM signal that controls on / off of the switching elements of the three-phase PWM converter by comparing a carrier wave based on the three-phase AC voltage with a carrier signal; A converter system in which all or all but one of the multiple control units are equipped with a synchronization control function block that uses the area where two of the three phases of the carrier wave overlap as the phase determination timing and adjusts the phase of the carrier signal so that frequency components approximately twice the carrier frequency become dominant in the converter current of the other non-overlapping phases.

2. 2. The converter system according to claim 1, wherein the synchronization control function block adjusts the phase of the carrier signal so that, in the converter currents of other non-overlapping phases, a ratio of a frequency component having a frequency that is approximately one time the carrier frequency to a frequency component having a frequency that is approximately twice the carrier frequency is less than a predetermined determination threshold.

3. the synchronization control function block includes a band limiting filter that cuts off a band lower than a frequency component that is approximately one time the carrier frequency and cuts off a band higher than a frequency component that is approximately two times the carrier frequency; 3. The converter system according to claim 2, further comprising: a phase determination unit that analyzes a frequency component of the converter current that has passed through the band-limiting filter.

4. The synchronization control function block includes a first filter that passes a frequency component having a frequency approximately equal to one time the carrier frequency, and a second filter that passes a frequency component having a frequency approximately equal to two times the carrier frequency.

3. The converter system according to claim 2, further comprising: a phase determination unit that analyzes the converter current that has passed through the first filter and the converter current that has passed through the second filter.

5. A converter system according to claim 1; a three-phase PWM inverter that converts the DC voltage converted by the plurality of three-phase PWM converters into a three-phase output voltage by on / off control of the bridge-connected switching elements.

6. 6. The uninterruptible power supply system according to claim 5, wherein the control unit includes an inverter control function block that generates a PWM signal that controls on / off of the switching elements of the three-phase PWM inverter by comparing the carrier wave with the carrier signal phase-adjusted by the synchronization control function block.

7. A control method for a converter system in which a plurality of three-phase PWM converters that convert three-phase AC voltage into DC voltage by controlling on / off of bridge-connected switching elements are connected in parallel without a transformer, comprising: the plurality of three-phase PWM converters generate PWM signals for controlling on / off of the switching elements of the three-phase PWM converters by comparing a carrier wave based on the three-phase AC voltage with a carrier signal; A control method for a converter system in which, for all or all but one of the multiple three-phase PWM converters, the phase of the carrier signal is adjusted using the timing near where two of the three phases of the carrier wave overlap as the phase determination timing, so that a frequency component approximately twice the carrier frequency becomes dominant in the converter current of the other non-overlapping phases.

8. A converter system in which a plurality of PWM converters that convert power by controlling the on / off of bridge-connected switching elements are connected in parallel without a transformer, a plurality of control units that independently control the plurality of PWM converters each include a converter control function block that generates a PWM signal that controls on / off of the switching element of the PWM converter by comparing a carrier wave with a carrier signal; A converter system in which all or all but one of the multiple control units are equipped with a synchronization control function block that adjusts the phase of the carrier signal using the converter current and the frequency of the carrier signal.

9. A control method for a converter system in which a plurality of PWM converters that convert power by controlling the on / off of bridge-connected switching elements are connected in parallel without a transformer, comprising: the plurality of PWM converters generate PWM signals for controlling the on / off of the switching elements of the PWM converters by comparing a carrier wave with a carrier signal; A control method for a converter system in which all or all but one of the plurality of PWM converters adjusts the phase of the carrier signal using the converter current and the frequency of the carrier signal.

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