Hybrid-energy apparatus, system, and method therefor

Abstract

To integrate hybrid-energy sources such as solar cells and solar batteries for providing electrical energy for various applications.SOLUTION: A solar-cell layer has a plurality of solar cells for receiving light through a substrate and converting energy of the received light to first electrical energy. An energy-storage layer has one or more energy-storage units for storing second electrical energy. A converter layer has one or more power converters electrically connected to the solar-cell layer and the energy-storage layer, for receiving the first electrical energy and the second electrical energy therefrom and outputting third electrical energy via output thereof.SELECTED DRAWING: Figure 23

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit of U.S. Provisional Patent Application No. 62 / 862,898, filed June 18, 2019, the entire contents of which are incorporated herein by reference.

[0002] FIELD OF THE DISCLOSURE The present disclosure relates to energy devices, systems and methods, and in particular to devices and systems that integrate hybrid energy sources such as solar cells and solar batteries to provide electrical energy for a variety of applications. [Background technology]

[0003] Solar energy is used as a clean and practical energy source for a variety of applications. For example, solar panels may be deployed in sunny locations, such as on rooftops, to collect solar energy and convert it into electricity to power various electrical devices. Solar panels of various shapes, styles, and sizes are widely used as energy source components in a variety of devices, such as solar tiles, phone chargers, residential appliances, and industrial equipment.

[0004] For example, Figures 1-3 illustrate several prior art solar energy collection systems, collectively designated using the reference numeral 10. In the solar energy collection system 10 shown in Figure 1, solar panels 12, more specifically photovoltaic (PV) panels, are used to convert solar energy into electricity and output it to an electronic power converter 14. The electronic power converter 14 converts the received electricity into a usable form for powering a load 16.

[0005] The electronic power converter 14 is also connected to an alternating current (AC) utility grid 20 via a switch 18. Thus, when the switch 18 is closed, the electronic power converter 14 outputs power to the AC utility grid 20 to power various devices (not shown) electrically connected thereto, or may use the AC utility grid 20 to power the load 16 when the output of the electronic power converter 14 is insufficient.

[0006] Energy storage may be used to provide reliability to system 10. As shown in Figure 2, prior art system 10 in this example further includes energy storage 22, such as a battery assembly, that connects to load 16 and AC utility grid 20 via another electronic power converter 24. Using battery assembly 22, system 10 may compensate for the intermittent nature of the solar energy output from PV panel 12, improving system reliability.

[0007] FIG. 3 illustrates a prior art solar energy collection system 10 similar to that shown in FIG. 2, but connected to a load 16 and a direct current (DC) utility grid 26 instead of an AC utility grid 20.

[0008] Prior art solar energy collection systems have the following drawbacks and / or problems: • Unreliability of solar energy generation due to intermittent sunlight. • As solar irradiance varies throughout the day, the operating point (e.g., voltage, current, and / or the like) of a solar energy collection system varies widely, which significantly reduces the overall efficiency of the system. • The system typically requires a utility power grid to provide resiliency to the system, i.e., to provide power to the various loads when solar energy is insufficient or unavailable.

[0009] Due to these drawbacks and / or challenges, prior art solar energy collection systems may not provide optimal solutions for many new applications, such as solar tiles, solar chargers, etc. Therefore, prior art solar energy collection systems with suboptimal or sub-optimal performance would adversely affect the otherwise rapid growth of solar energy systems. Therefore, a reliable solar energy collection solution is desired.

[0010] Electronic devices typically use at least two electrodes, including a cathode and an anode, to electrically connect to other devices, apply voltage to the device, or collect current from the device, depending on their application. Some small devices, such as photovoltaics and light-emitting diodes (LEDs), require a thin layer of metal as the cathode and a conductive, transparent metal oxide as the anode. In a typical fabrication process for such devices, a layer of indium tin oxide (ITO) is the first layer of composition deposited as the anode, typically by magnetron sputtering or other thermal methods. The top electrode can be transparent, depending on the application. Other layers of composition are then deposited, coated, or otherwise bonded to the ITO layer as needed, with the final layer being the cathode layer.

[0011] For example, Figures 4 and 5 are schematic diagrams illustrating the simplest single-layer structures of some prior art photovoltaic and organic LED (OLED) devices. As shown in Figure 4, a prior art photovoltaic device 40 may include an anode layer 44 deposited on a substrate 42, followed by an active layer 46 and a cathode layer 48. As shown in Figure 5, an OLED device 60 may include an anode layer 64 deposited on a substrate 62, followed by a hole-injection / transport layer 66, an active layer 68, an electron-injection layer 70, and a metal cathode layer 72.

[0012] In the prior art, in the fabrication of these devices, various deposition methods such as thermal evaporation, radio frequency (RF) sputtering, DC sputtering, and / or the like may be used to deposit a thin film of metal such as silver or aluminum as a cathode layer over a previous layer such as an active layer.

[0013] 6 shows a prior art thermal evaporation device 80 that is widely used in the small-scale fabrication of electronic devices. As shown, prior art thermal evaporation devices 80 include a vacuum chamber 82 at their bottom that receives a heater 84, and a sample holder 86 at their top. Sample holder 86 includes a window 88.

[0014] Substrate 90 is placed on sample holder 86 and exposed to window 88. Heater 84 heats pure metal 92 thereon, evaporating it into a gas phase that flows upward, as indicated by arrows 94, through window 88 in sample holder 86 and deposits on substrate 90 to form a metal cathode layer. Prior art thermal evaporation device 80 may also include a vacuum gauge 96 for monitoring the vacuum level within vacuum chamber 82, and a gas inlet 98 for introducing ambient gases (not shown), such as O, N, etc., to promote surface reactions or maintain film stoichiometry.

[0015] The conventional deposition methods generally require a high level of vacuum, which can cause significant strain in the large-scale fabrication of electronic devices. Furthermore, the above conventional deposition methods also have other drawbacks, such as: (1) Long operating time, (2) causing damage to the previous layer due to impact of metal particles during deposition of the current layer; (3) It is an expensive method of disposal.

[0016] Due to the above drawbacks, conventional deposition methods may not provide an optimal solution for large-scale fabrication of electronic devices. Therefore, improved processing techniques are desirable as a solution. Summary of the Invention

[0017] Embodiments of the present disclosure relate to hybrid energy devices or modules that integrate solar cells, battery cells, and, in some embodiments, electronic circuitry in an efficient and reliable manner, resulting in a highly reliable energy device or module with high efficiency.

[0018] According to one aspect of the present disclosure, there is provided a multi-layer device having a transparent or semi-transparent substrate, a solar cell layer coupled to the substrate, an energy storage layer coupled to the solar cell layer, and a converter layer coupled to the energy storage layer, wherein the solar cell layer has a plurality of solar cells for receiving light through the substrate and converting energy of the received light into a first electrical energy, the energy storage layer has one or more energy storage units for storing a second electrical energy, and the converter layer has one or more power converters electrically connected to the solar cell layer and the energy storage layer, receiving the first electrical energy and the second electrical energy therefrom, and outputting a third electrical energy through their outputs.

[0019] In some embodiments, the substrate may include a layer of glass.

[0020] In some embodiments, the substrate may comprise a flexible, transparent, or translucent material, such as a transparent or translucent plastic material, such as polyethylene terephthalate (PET, also written as poly(ethylene terephthalate)), poly(ether sulfone) (PES), polyethylene naphthalene (PEN), polyimide (PI), and / or the like.

[0021] In some embodiments, the solar cell layer may be an inverted organic photovoltaic (OPV) structure comprising multiple sublayers, such as, from the substrate, a sublayer of indium tin oxide (ITO) deposited or otherwise bonded to the substrate and serving as the anode, a sublayer of zinc oxide (ZnO), a sublayer of ethoxylated poly(ethyleneimine) and poly(ethyleneimine) (i.e., PEIE), a sublayer of organic bulk heterojunction (BHJ) (i.e., a blend of p-type and n-type conjugated polymers), a sublayer of molybdenum trioxide (MoO), and a sublayer of silver (Ag) or aluminum (Al) as the cathode.

[0022] In some embodiments, the energy storage layer comprises one or more semiconductor capacitors.

[0023] In some embodiments, each semiconductor capacitor comprises multiple gallium arsenide (GaAs) / aluminum gallium arsenide (AlGaAs) sublayers, such as n AlGaAs layers (n>0 is an integer) and (n+1) GaAs layers, each AlGaAs layer sandwiched between two adjacent GaAs layers.

[0024] In some embodiments, the converter layer comprises a multi-input electronic power converter having a solar input converter, a battery input converter, and an output converter.

[0025] In some embodiments, any of the solar input converter, the battery input converter, and the output converter may include a coil wound around a ferromagnetic or ferrimagnetic core.

[0026] In some embodiments, the solar input converter, the battery input converter, and the output converter may all have a structure of at least three layers, including a core layer made of ferrite material sandwiched between two wiring layers, each with conductive traces on a base, with the traces of the two wiring layers interconnected through vias or holes thereon to form a coil wound around the ferrite core.

[0027] According to one aspect of the present disclosure, a hybrid power system is provided, the hybrid power system including: a solar cell module having a plurality of solar cells; a solar cell module electrically coupled to a first circuit having one or more first semiconductors for converting an output of the solar cell module into a first alternating current (AC) current; an energy storage module coupled to a second circuit having one or more second semiconductors for converting an output of the energy storage module into a second AC current; an output module coupled to a third circuit having one or more third semiconductors for outputting power; a transformer coupling the first circuit and the second circuit to the third circuit; and a control module for optimizing output power by adjusting signals applied to gate terminals of the first semiconductor, the second semiconductor, and the third semiconductor based on at least an output voltage of the solar module, an output voltage of the energy storage module, a current of the first circuit, an output current of the second circuit, an input current of the third circuit, and an output voltage of the output power.

[0028] According to one aspect of the present disclosure, a power circuit is provided, the power circuit including: a first input circuit for coupling to a photovoltaic (PV) source; a second input circuit for coupling to an energy storage source; a third circuit coupled to the first input circuit and the second input circuit for processing and outputting electrical energy received from at least one of the first circuit and the second circuit; and a control circuit coupled to the first circuit, the second circuit, and the third circuit for optimizing an output of the third circuit by controlling a flow of power between the circuits based on an output voltage of the PV source and the energy storage source, an output of the first input circuit and the second input circuit coupled to the third circuit, and an output voltage of the third circuit.

[0029] In some embodiments, the third circuit is coupled to the first input circuit and the second input circuit via a transformer, the first input circuit and the second input circuit being on an input side of the transformer, and the third circuit being on an output side of the transformer.

[0030] In some embodiments, each of the first circuit, the second circuit, and the third circuit comprises one or more semiconductors for power conversion.

[0031] In some embodiments, the control circuit is configured to optimize the output of the third circuit by adjusting gate signals applied to gate terminals of the semiconductors of the first circuit, the second circuit, and the third circuit based on the output voltages of the PV source and the energy storage source, the outputs of the first input circuit and the second input circuit coupled to the third circuit, and the output voltage of the third circuit.

[0032] In some embodiments, the outputs of the first input circuit and the second input circuit are output currents of the first input circuit and the second input circuit, and the power supply circuit further comprises one or more current sensors for sensing the output currents of the first input circuit and the second input circuit.

[0033] In some embodiments, the control circuit is configured to optimize the output of the third circuit further based on at least one of the output currents of the PV source and the energy storage source, and the input current of the third circuit.

[0034] In some embodiments, the output of the third circuit is a direct current (DC) output, the power supply circuit further comprises a DC-AC inverter circuit coupled to the third circuit to convert the DC output of the third circuit to an alternating current (AC) output, and the control circuit is configured to optimize the output of the DC-AC inverter circuit based on output voltages of the PV source and the energy storage source, output currents of the first input circuit and the second input circuit coupled to the third circuit, the output voltage of the third circuit, the output voltage of the DC-AC inverter circuit, and the output current of the DC-AC inverter circuit.

[0035] In some embodiments, the outputs of the first input circuit and the second input circuit are output voltages of the first input circuit and the second input circuit, and the power circuit further comprises one or more current estimators for estimating output currents of the first input circuit and the second input circuit based on the output voltages of the PV source, the energy storage source, and the third circuit, and gate signals of the semiconductors of the first circuit, the second circuit, and the third circuit.

[0036] In some embodiments, the one or more semiconductors of at least one of the first circuit, the second circuit, and the third circuit are gallium nitride (GaN) gates, and the power supply circuit further comprises a GaN gate driver circuit for preventing the GaN gate from shoot-through, the GaN gate driver circuit comprising a level shifter circuit.

[0037] In some embodiments, the level shifter circuit comprises a Zener diode and a capacitor coupled in parallel and in series with a resistor.

[0038] In some embodiments, the third circuit comprises a parallel inductor on the output side of the transformer to compensate for parasitic capacitance.

[0039] According to one aspect of the present disclosure, there is provided an energy device comprising: a transparent or translucent substrate; a solar cell layer coupled to the substrate, the solar cell layer comprising a plurality of solar cells for receiving light through the substrate and converting energy of the received light into a first electrical energy; an energy storage layer coupled to the solar cell layer, the energy storage layer comprising one or more energy storage units for storing a second electrical energy; and a converter layer coupled to the solar cell layer and the energy storage layer for receiving and processing electrical energy therefrom and outputting the processed energy via an output, the converter layer comprising the above-mentioned power circuitry, and using the solar cell layer and the energy storage layer as a PV source and an energy storage source, respectively.

[0040] According to one aspect of the present disclosure, a thermoelectric recycling structure is provided, the thermoelectric recycling structure including: a first component for engaging a heat source and receiving heat generated from the heat source therefrom; a second component spaced apart from the first component; and a thermally non-conductive electron-hole transporting thermoelectric layer sandwiched between the first component and the second component for receiving heat from the first component and converting the received heat into electrical power.

[0041] In some embodiments, the thermoelectric recycling structure further comprises a light collection layer coupled to the first component opposite the thermoelectric layer for engaging the first component with a heat source, the light collection layer comprising a metasurface for collecting light and a nanowire layer coupled to the metasurface for converting the collected light into converted heat and transferring the converted heat to the thermoelectric layer.

[0042] In some embodiments, the thermoelectric layer includes one or more thermoelectric components made of one or more two-dimensional (2D) materials.

[0043] In some embodiments, the one or more 2D materials include a 2D perovskite.

[0044] In some embodiments, the one or more thermoelectric components comprise a continuous thermoelectric sheet made of one or more 2D materials.

[0045] In some embodiments, the thermoelectric layer comprises multiple thermoelectric components separated from one another.

[0046] In some embodiments, the thermoelectric layer comprises a plurality of conductive nanochannels having one or more sub-wavelength dimensions thereof.

[0047] In some embodiments, the thermoelectric layer has a thickness of about 10 nanometers (nm).

[0048] According to one aspect of the present disclosure, there is provided an energy device comprising: a transparent or translucent substrate; a solar cell layer coupled to the substrate, the solar cell layer including a plurality of solar cells for receiving light through the substrate and converting energy of the received light into a first electrical energy; an energy storage layer coupled to the solar cell layer, the energy storage layer including one or more energy storage units for storing a second electrical energy; a converter layer coupled to the solar cell layer and the energy storage layer for receiving and processing electrical energy therefrom and outputting the processed energy via an output; and at least one of the thermoelectric recycling structures set forth in claims 13 to 20 coupled to at least one of the solar cell layer and the converter layer for receiving heat generated therefrom.

[0049] According to one aspect of the present disclosure, a supercapacitor is provided, the supercapacitor comprising one or more capacitor layers and first and second electrical terminals, each capacitor layer comprising a pair of conductive thin film sublayers sandwiching an electrically insulating membrane sublayer, a conductive medium between each thin film sublayer and the membrane sublayer, and first and second conductor sublayers sandwiching the pair of thin film and membrane sublayers, the first conductor sublayer being coupled to the first electrical terminal and the second conductor sublayer being coupled to the second electrical terminal.

[0050] In some embodiments, the thin film sublayer comprises at least one of activated carbon, graphene, and graphite.

[0051] In some embodiments, the conductive medium comprises at least one of an ionic liquid, a conductive ink, and a current collector.

[0052] In some embodiments, the conductive medium is coated onto the membrane sublayer.

[0053] In some embodiments, the ionic liquid comprises 1-ethyl-3-methylimidazolium tetrafluoroborate (EMIMBF4).

[0054] In some embodiments, the conductive thin film sublayer, the membrane sublayer, and the first and second conductor sublayers are flexible.

[0055] In some embodiments, the conductive thin film sublayer, and the first and second conductor sublayers are coated onto the membrane sublayer using at least one of slot die coating, spray coating printing, and doctor blade.

[0056] According to one aspect of the present disclosure, there is provided an energy device comprising: a transparent or translucent substrate; a solar cell layer coupled to the substrate, the solar cell layer comprising a plurality of solar cells for receiving light through the substrate and converting energy of the received light into a first electrical energy; an energy storage layer coupled to the solar cell layer, the energy storage layer comprising one or more energy storage units for storing a second electrical energy; and a converter layer coupled to the solar cell layer and the energy storage layer for receiving and processing electrical energy therefrom and outputting the processed energy via an output, the energy storage layer comprising one or more supercapacitors as described above. [Brief explanation of the drawings]

[0057] Embodiments of the present disclosure will now be described with reference to the following drawings, in which like reference numbers in different drawings refer to like elements.

[0058] [Figure 1] 1 is a schematic diagram illustrating a prior art solar energy collection system that connects to a load and / or an alternating current (AC) utility power grid, the solar energy collection system having solar panels for harvesting solar energy. [Figure 2] 1 is a schematic diagram illustrating a prior art solar energy collection system having solar panels and energy storage for connection to a load and / or for connection to an AC utility power grid. [Figure 3] 1 is a schematic diagram illustrating a prior art solar energy collection system that connects to a load and / or a direct current (DC) utility power grid, the solar energy collection system having solar panels and energy storage. [Figure 4] FIG. 1 is a schematic diagram illustrating a prior art photovoltaic device having a metal cathode layer. [Figure 5]FIG. 1 is a schematic diagram illustrating a prior art solar cell or light emitting device (LED) having a metal cathode layer. [Figure 6] FIG. 1 is a schematic diagram illustrating a prior art thermal evaporation device for small scale fabrication of electronic devices. [Figure 7] 1 illustrates a solar energy collection system having a hybrid energy device and connecting to a load and / or an AC utility grid, according to some embodiments of the present disclosure. [Figure 8] 1 illustrates a solar energy collection system having a hybrid energy device and connecting to a load and / or a DC utility grid, according to some embodiments of the present disclosure. [Figure 9A] 9 is a schematic diagram illustrating the physical structure of a hybrid energy device of the solar energy collection system shown in FIGS. 7 and 8, the hybrid energy device comprising a layer of battery cells as energy storage, according to some embodiments of the present disclosure. [Figure 9B] 9 is a schematic diagram illustrating the physical structure of a hybrid energy device of the solar energy collection system shown in FIGS. 7 and 8, the hybrid energy device comprising a layer of supercapacitors as energy storage, according to some embodiments of the present disclosure. [Figure 10] FIG. 9 is a schematic diagram illustrating the physical structure of a hybrid energy device of the solar energy collection system shown in FIGS. 7 and 8, according to some embodiments of the present disclosure. [Figure 11A] 9C is a schematic diagram illustrating the solar cell layers and substrate of the hybrid energy device shown in FIGS. 9A and 9B, where the substrate is made of glass, according to some embodiments of the present disclosure. FIG. [Figure 11B] 9C is a schematic diagram illustrating the solar cell layer and substrate of the hybrid energy device shown in FIGS. 9A and 9B, where the substrate is made of transparent or translucent plastic, according to some embodiments of the present disclosure. FIG. [Figure 12]FIG. 11C is a schematic diagram showing multiple sublayers of the solar cell layer shown in FIG. 11B printed on a substrate at large scale to form multiple solar cells. [Figure 13] FIG. 9C is a conceptual diagram illustrating printing the solar cell layer and energy storage layer of the hybrid energy device shown in FIGS. 9A and 9B onto a substrate. [Figure 14-17] 1 illustrates solar cell layers according to various embodiments of the present disclosure. [Figure 18] 9B shows the structure of the supercapacitor shown in FIG. 9B. [Figure 19A] 9B is a schematic diagram showing the structure of a battery cell of the energy storage layer of the hybrid energy device shown in FIG. 9A. FIG. [Figure 19B] 9B is a schematic diagram illustrating the structure of the battery cell shown in FIG. 9A in the form of a lithium-ion battery cell. [Figure 19C] FIG. 9B is a schematic diagram illustrating the structure of the battery cell shown in FIG. 9A in the form of a lithium-ion battery cell, according to some embodiments of the present disclosure. [Figure 20] FIG. 1 is a schematic diagram showing two battery cells printed on top of each other in series and sharing a common current collector sublayer between them. [Figure 21] Demonstrates a stencil printing technique for creating battery cells by using a cold manual laminator as a stencil printer device. [Figure 22] FIG. 21 illustrates a process for fabricating an anode sublayer on a current collector sublayer without any processing solvents using a stencil printing technique. [Figure 23] FIG. 9C is a schematic diagram showing details of the hybrid energy device shown in FIGS. 9A and 9B. [Figures 24A-24B] FIG. 1 is a block diagram of a solar energy collection system with integrated electronic power converters for AC and DC applications. [Figure 25A]FIG. 24C is a schematic diagram illustrating the functional structure of the integrated electronic power converter shown in FIGS. 24A and 24B, which includes a solar input converter, a battery input converter, and an output converter. [Figure 25B] FIG. 25B is a schematic diagram illustrating the functional structure of the solar input converter, battery input converter, and output converter shown in FIG. 25A. [Figure 25C] FIG. 24C is a circuit diagram of the integrated electronic power converter shown in FIGS. 24A and 24B. [Figure 26A] 24A and 24B, according to some embodiments of the present disclosure. [Figure 26B] 26B is a cross-sectional view of the integrated electronic power converter shown in FIG. 26A taken along section line AA. [Figure 26C] FIG. 26B is a schematic perspective view of a portion of the integrated electronic power converter shown in FIG. 26A according to some embodiments of the present disclosure. [Figure 27] FIG. 9 is a circuit diagram illustrating a DC hybrid energy device of the solar energy collection system shown in FIGS. 7 and 8, the DC hybrid energy device having an integrated DC power converter for powering the DC energy device, according to some embodiments of the present disclosure. [Figure 28] 28 shows waveforms of some signals in the solar cell module of the DC hybrid energy device shown in FIG. 27. [Figure 29] FIG. 28 is a block diagram of a current shaping control module of the DC hybrid energy device shown in FIG. 27 according to some embodiments of the present disclosure. [Figure 30] 28 shows waveforms of the current shaping control module of the DC hybrid energy device shown in FIG. 27. [Figure 31]FIG. 28 is a block diagram showing that pulses for the transformer secondary power semiconductors of the DC hybrid energy device shown in FIG. 27 are generated by using a zero voltage switching (ZVS) control circuit to ensure that their currents have the correct polarity at the switching instant. [Figure 32] FIG. 28 is a block diagram illustrating multiple DC hybrid energy devices shown in FIG. 27 connected in parallel to power a DC load and / or a DC power grid, according to some embodiments of the present disclosure. [Figure 33] FIG. 28 is a block diagram illustrating multiple DC hybrid energy devices shown in FIG. 27 connected in series to power a DC load and / or a DC power grid, according to some embodiments of the present disclosure. [Figure 34] FIG. 28 is a block diagram illustrating multiple DC hybrid energy devices shown in FIG. 27 connected in parallel to power an AC load and / or an AC power grid via a DC / AC inverter, according to some embodiments of the present disclosure. [Figure 35] FIG. 28 is a block diagram illustrating multiple DC hybrid energy devices shown in FIG. 27 connected in series to power an AC load and / or an AC power grid via a DC / AC inverter, according to some embodiments of the present disclosure. [Figure 36] FIG. 9 is a circuit diagram illustrating an AC hybrid energy device of the solar energy collection system shown in FIGS. 7 and 8, the AC hybrid energy device having an integrated AC power converter for powering the AC energy device, according to some embodiments of the present disclosure. [Figure 37] FIG. 37 is a block diagram illustrating multiple AC hybrid energy devices shown in FIG. 36 connected in parallel to power an AC load and / or an AC power grid, according to some embodiments of the present disclosure. [Figure 38] 1A-1C are schematic diagrams illustrating mobile phone cases with hybrid energy devices integrated into their back walls, according to some embodiments of the present disclosure. [Figure 39] FIG. 39 is a schematic diagram showing the structure of the hybrid energy device shown in FIG. 38. [Figure 40] 1A-1C are schematic diagrams illustrating mobile phones with hybrid energy devices integrated into their screens, according to some embodiments of the present disclosure. [Figure 41] FIG. 41 is a schematic diagram showing the structure of the hybrid energy device shown in FIG. 40. [Figure 42] FIG. 28 is a block diagram of a current shaping control module of the DC hybrid energy device shown in FIG. 27, which uses a digital high frequency (HF) current estimator 602 to estimate a HF current waveform, according to some embodiments of the present disclosure. [Figure 43] FIG. 1 is a circuit diagram showing a GaN gate driver circuit having an overcharge problem. [Figure 44] FIG. 1 is a circuit diagram illustrating a GaN gate driver circuit according to some embodiments of the present disclosure. [Figure 45] FIG. 1 is a circuit diagram showing a level shift circuit for avoiding the shoot-through problem. [Figure 46] FIG. 1 is a circuit diagram illustrating a power converter having parasitic capacitance. [Figure 47] FIG. 1 is a circuit diagram illustrating a DC power converter with soft switching and compensation for parasitic capacitance in accordance with some embodiments of the present disclosure. [Figure 48] FIG. 1 is a schematic diagram showing a thermoelectric unit coupled to a heat source. [Figure 49A] FIG. 49 is a schematic diagram showing details of the thermoelectric unit shown in FIG. 48. [Figure 49B] FIG. 49 is an enlarged schematic view of a portion of the thermoelectric unit shown in FIG. 48. [Figure 50] FIG. 49 is a schematic perspective view of an exemplary implementation of a photovoltaic (PV) panel integrated with a thermoelectric unit shown in FIG. 48. [Figure 51A] FIG. 1 is a schematic diagram illustrating a photovoltaic-thermoelectric unit according to some embodiments of the present disclosure. [Figure 51B]FIG. 51B is an enlarged schematic diagram of a portion of the photovoltaic-thermoelectric unit shown in FIG. 51A. [Figure 51C] FIG. 1 is a schematic perspective view of a portion of a metasurface. [Figure 51D] FIG. 1 is a schematic perspective view of a portion of a metasurface, according to some embodiments of the present disclosure. [Figure 52] 1 is a schematic diagram illustrating a thermoelectric unit according to some embodiments of the present disclosure, the thermoelectric unit comprising multiple nanochannels in parallel. [Figure 53] 1 is a schematic diagram illustrating a thermoelectric unit comprising a plurality of nanochannels in a mixture of parallel and series arrangements, according to some embodiments of the present disclosure. [Figure 54A] 1A-1C are schematic diagrams illustrating the structure of a supercapacitor according to some embodiments of the present disclosure. [Figure 54B] FIG. 54B is a schematic diagram showing the capacitor layers of the supercapacitor shown in FIG. 54A. [Figure 55] 1 is a schematic diagram illustrating the structure of a symmetric supercapacitor or symmetric supercapacitor cell according to some embodiments of the present disclosure. [Figure 56] FIG. 56 is a schematic diagram illustrating a large-scale fabrication process for the supercapacitor or supercapacitor cell shown in FIG. 55 using spray coating techniques, according to some embodiments of the present disclosure. [Figure 57] FIG. 46 is a schematic perspective view showing a supercapacitor formed by stacking multiple supercapacitor cells shown in FIG. 45 with a suitable insulator. DETAILED DESCRIPTION OF THE INVENTION

[0059] Overview of solar energy collection systems 7, a solar energy collection system according to some embodiments of the present disclosure is shown and generally identified using reference numeral 100. As shown, the solar energy collection system 100 includes a hybrid energy device 102 for powering a load 104.

[0060] The hybrid energy device 102 is also connected to an alternating current (AC) utility grid 106 via a switch 108. Thus, when the switch 108 is closed, the hybrid energy device 102 may output power to the AC utility grid 106 to power various devices (not shown) electrically connected thereto, or to power a load 104 using the AC utility grid 106 when the output of the hybrid energy device 102 is insufficient.

[0061] The hybrid energy device 102 in these embodiments includes a solar panel 112, such as a photovoltaic (PV) panel having multiple solar cells for collecting solar energy and serving as a first energy source, and an energy storage 114 as a second energy source. The solar panel 112 and the energy storage 114 output power to a multi-input electronic power converter 116. The multi-input electronic power converter 116 converts the received power into a form suitable for powering the load 104 and / or for output to the AC utility grid 106 (e.g., having a suitable voltage, current, frequency, and / or the like) and uses the output of the solar panel 112 to charge the energy storage 114. Additionally, the multi-input electronic power converter 116 controls the flow of power between the different components.

[0062] Figure 8 illustrates a solar energy collection system 100 according to some embodiments of the present disclosure. The solar energy collection system 100 in these embodiments is similar to that shown in Figure 7, except that the hybrid energy device 102 is connected to a direct current (DC) utility power grid 118. A multi-input electronic power converter 116 also controls the flow of power between the different components.

[0063] In the embodiment shown in Figures 7 and 8, the hybrid energy device 102, including the solar cell 112, energy storage 114, and multi-input electronic power converter 116, is an integrated device printed, deposited, or otherwise coupled to a substrate and may have different implementations in different embodiments.

[0064] 9A and 9B are schematic diagrams illustrating the physical structure of a hybrid energy device 102 having various energy stores 114 in different embodiments.

[0065] 9A, the hybrid energy device 102 includes a substrate 132 made of one or more suitable transparent or translucent materials, such as glass, transparent or translucent plastic, transparent or translucent polymer, and / or the like. A solar cell layer 134 is printed, deposited, or otherwise bonded to the substrate 132. Thus, the transparent substrate 132 allows the solar cells 112 to be exposed to ambient or incident light and provides support and protection for the solar cell layer 112 and other layers thereon.

[0066] In these embodiments, the energy storage 114 comprises a battery cell layer 136 printed, deposited, or otherwise coupled to the solar cell layer 112. The multi-input electronic power converter circuit layer 116 is coupled to the battery cell layer 136. The solar cell layer 112, the battery cell layer 136, and the multi-input electronic power converter layer 116 are electrically connected (not shown) according to FIG. 7 or FIG. 8.

[0067] The hybrid energy device 102 in the embodiment shown in FIG. 9B is similar to that shown in FIG. 9A, except that in these embodiments, the energy storage 114 comprises one or more capacitors 138 or supercapacitors (i.e., capacitors with large capacitance).

[0068] 9A and 9B, the solar cell 112 is coated on a substrate 132, followed by an energy storage layer 114 (which may be a battery cell 136 or a supercapacitor 138) and a converter layer 116. In some embodiments shown in FIG. 10, the order of layers may be substrate 132, converter 116, energy storage layer 114 (which may be a battery cell 136 in the example shown in FIG. 10), and solar cell layer 112.

[0069] In these embodiments, the substrate 132 may comprise a flexible material such as PET. A layer of UV-curable epoxy may be applied over the substrate 132 for protection.

[0070] 11A is a schematic diagram illustrating a solar cell layer 112 on a substrate 132 made of glass. As shown, the solar cell layer 112 comprises multiple sublayers, including, in order from the substrate 132, an anode sublayer 142 made of a suitable material such as indium tin oxide (ITO) deposited or otherwise bonded onto the substrate 132, a zinc oxide (ZnO) sublayer 144, a poly(ethyleneimine) and poly(ethyleneimine) ethoxylated (i.e., PEIE) sublayer 146, an organic solar cell sublayer 148, such as a polymer solar cell sublayer such as a bulk heterojunction (BHJ), a molybdenum trioxide (MoO) sublayer 150, and a cathode sublayer 152 made of a suitable material such as silver (Ag) or aluminum (Al). The anode 142 and the cathode 152 are electrically connected to an upper layer, such as the energy storage layer 114 (ie, the battery cell layer 136 or the supercapacitor layer 138) and / or the integrated converter layer 116.

[0071] 11B is a schematic diagram showing a solar cell layer 112 on a substrate 132 made of a flexible transparent or translucent material such as polyethylene terephthalate (PET, also written as poly(ethylene terephthalate)), poly(ether sulfone) (PES), polyethylene naphthalene (PEN), polyimide (PI), and / or the like. The solar cell layer 112 is the same as that shown in FIG. 11A.

[0072] Glass substrates result in rigid solar cell structures, while plastic substrates result in flexible solar cell structures. Those skilled in the art will appreciate that plastic substrates offer many advantages, including: 1) Ease of use in large scale fabrication techniques such as roll-to-roll coating techniques for making solar cells and stencil printing techniques for making batteries. 2) Flexible solar cells allow for a simplified fabrication process for all their layers.

[0073] In some embodiments, the solar cell layer 112, the energy storage layer 114 (ie, the battery layer 136 or the capacitor layer 138), and the integrated converter layer 116 may be printed on a large scale.

[0074] FIG. 12 is a schematic diagram showing the above-mentioned sublayers 142-152 of the solar cell layer 112 printed on a substrate 132 in a large scale to form multiple solar cells. First, the anode (ITO) sublayer 142 is printed on the PET substrate 132 as multiple ITO blocks in a matrix form. Next, multiple ZnO sublayers 144 are printed on the ITO sublayer, with each ZnO block 144 bonded to multiple ITO blocks 142 in adjacent rows, thereby forming a parallel connection structure. Next, the PEIE sublayer 146, the BHJ sublayer 148, and the MoO3 sublayer 150 are printed sequentially on top of each other as multiple blocks. Each set of the PEIE sublayer 146, the BHJ sublayer 148, and the MoO3 sublayer 150 forms a solar cell (without considering the anode and cathode sublayers) printed on the anode sublayer 142.

[0075] The cathode (Ag or Al) sublayer 152 is ultimately printed onto the layer stack as multiple blocks, with each cathode block extending to the anode layer 142 of an adjacent solar cell for serial connection.

[0076] In the above embodiment, the solar cell layer 112 comprises the ZnO sublayer 144 and the PEIE sublayer 146, but in some alternative embodiments, the solar cell layer 112 may comprise only one of the ZnO sublayer 144 and the PEIE sublayer 146. However, the performance of the solar cell layer 112 in these embodiments may be degraded.

[0077] 13 is a conceptual diagram illustrating the printing of several sublayers, such as a ZnO sublayer 144, a PEIE sublayer 146, and a BHJ sublayer 148 of the solar cell layer 112 onto a substrate 132. In these embodiments, a MoO3 sublayer 150 and an Ag sublayer 152 are deposited by using a thermal evaporator.

[0078] As shown in FIG. 13 , the substrate 132 is placed on a flat surface of a platform 172. A printing device (not shown) equipped with a slot die head 174 is used to print the sublayers / layers. The slot die head 174, equipped with ink cartridges 176 filled with the respective “inks,” moves (indicated by arrow 178) over the substrate 132 (or printed layer) to deposit material thereon from the ink cartridges 176 to form the solar cells 112 or energy storage cells (not shown). First, the solar cells 112 are printed on the substrate 132, and then the energy storage layer 114 (i.e., the battery cells 136 or supercapacitors 138) is printed on the solar cell layer 112. A multi-input electronic power converter 116 (in the form of a printed circuit board) is then bonded to the energy storage layer 114.

[0079] As used herein, "ink" refers to a sublayer / layer material in a suitable form, such as a solution, gel, or powder, used as a precursor for the fabrication of the sublayer / layer. For example, an ink of ZnO dissolved in butanol may be deposited by slot-die coating to form the ZnO sublayer 144 of the solar cell layer 112. During slot-die fabrication of each sublayer, a heat treatment is typically used to evaporate the solvent and solidify the fabricated sublayer.

[0080] 14, in some embodiments, the solar cell layer 112 can be a conventional OPV structure, which includes, in order from the substrate 132, multiple sublayers, such as an ITO anode sublayer 142, a poly(3,4-ethylenedioxythiophene)polystyrenesulfonate (PEDOT:PSS) sublayer 143, a BHJ sublayer as the active layer 148, and an Al or Ag sublayer 152 as the cathode. More organic or inorganic charge-carrying layers may be inserted into this configuration for efficient exciton confinement, which will result in improved performance.

[0081] In some embodiments shown in FIG. 15, the solar cell layer 112 comprises multiple sublayers, such as, from the substrate 132, a fluorine-doped tin oxide (FTO) sublayer 159, an electron-transporting titanium dioxide (TiO) sublayer 157 deposited directly on the FTO-coated substrate 132, a pure 2D, pure 3D, or mixed 2D-3D hybrid inorganic-organic perovskite sublayer 155, a sublayer 153 of 2,2′,7,7′-tetrakis-(N,N-di-4-methoxyphenylamino)-9,9′-spirobifluorene (Spiro-OMeTAD) or other suitable hole-transporting material that may be deposited on the perovskite sublayer 155, and an Ag or Al deposit 152 that forms the cathode sublayer.

[0082] The use of FTO has the advantage of a better energy level alignment between the work function of FTO159 and the conduction band of TiO2.

[0083] In some embodiments shown in FIG. 16, the solar cell layer 112 may comprise multiple sublayers, such as, in order from the substrate 132, an FTO sublayer 159, a TiO2 sublayer 157, an inorganic quantum dot (QD) layer 155, a thin MoO3 sublayer 161, followed by an Al, Ag, or gold (Au) electrode 152.

[0084] In these embodiments, both ITO and FTO can be used. Depending on the conduction band energy level of the QDs 155, both metal oxides (i.e., ITO and FTO) can provide a low energy barrier for efficient charge extraction from the solar cell. Either ZnO or TiO2 is then deposited on the ITO- or FTO-coated substrate 132. The active layer 155 is then coated on the electron-transporting metal oxide. The fabrication process is then completed by depositing a thin MoO3 sublayer 161, followed by an Al, Ag, or gold (Au) electrode.

[0085] In some embodiments shown in FIG. 17 , the solar cell layer 112 may be a tandem structure comprising a perovskite sublayer 171 coupled in series to a QD solar cell layer 175, with an intermediate layer 173 sandwiched between them. The intermediate layer 173 may be any suitable organic or inorganic material. In such a configuration, one of the cells is fabricated first without depositing a top metal electrode. The other cell is then fabricated directly on top, followed by deposition of a top electrode. Due to the effective photon collection capabilities of both the QD and perovskite materials, an efficient and stable tandem solar cell can be realized, which can then be integrated with other components of the solar energy collection system 100.

[0086] In the embodiment shown in Figure 9B, a supercapacitor 138 is used as the energy storage layer 114. Figure 18 shows the structure of the supercapacitor 138. As shown, the energy storage layer 114 or supercapacitor layer 138 comprises a plurality of GaAs / AlGaAs sublayers, such as n aluminum gallium arsenide (AlGaAs) layers (n>0 is an integer) and (n+1) gallium arsenide (GaAs) layers, with each AlGaAs layer sandwiched between two adjacent GaAs layers, thereby forming a plurality of semiconductor capacitors.

[0087] Each GaAs or AlGaAs sublayer may be deposited using a suitable technique, such as DC sputtering, radio frequency (RF) sputtering, thermal evaporation, and / or the like.

[0088] 19A is a schematic diagram illustrating the structure of a battery cell 136 of the energy storage layer 114 in the embodiment shown in FIG. 9A. As shown, the battery cell 136 comprises multiple sublayers, including a pair of current collector sublayers 202 and 210 coupled to an anode sublayer 204 and a cathode sublayer 208, respectively, and a separator sublayer 206 sandwiched between the anode sublayer 204 and the cathode sublayer 208.

[0089] Electrical current flows through current collector sublayers 202 and 210, which are coupled to anode sublayer 204 and cathode sublayer 208. Anode sublayer 204 is the negative or reducing electrode that releases electrons to the external circuit and is oxidized during the electrochemical reaction. Cathode sublayer 208 is the positive or oxidizing electrode that gains electrons from the external circuit and is reduced during the electrochemical reaction.

[0090] The separator sublayer 206 is a medium that prevents short-circuit current between the cathode 208 and anode 204 of the battery cell 136 and also provides a mechanism for ion transport therebetween. In various embodiments, the separator sublayer 206 may include a solid electrolyte and / or other suitable material. Compared to liquid electrolytes, which include solvents that dissolve salts, acids, or alkalis for ion conduction and are typically flammable, solid electrolytes are safer, and the resulting battery assembly may be more compact due to the reduction in required safety monitoring and / or safety prevention components and / or subsystems. Batteries using solid electrolytes also offer improved energy and power density.

[0091] 19B is a schematic diagram showing the structure of battery cell 136 in the form of a lithium-ion battery cell. In this embodiment, each of current collector sublayers 202 and 210 is a thin layer of aluminum foil or conductive paper. The anode sublayer 204 is made of carbon (including single-walled carbon nanotubes (SWCNTs) and carbon powder, described in more detail below), and Li4Ti5O activated by an electrolyte gel containing a semi-interpenetrating polymer network (SIPN or semi-IPN) skeleton and a lithium salt (such as lithium tetrafluoroborate (LIBF4)) dissolved in sebaconitrile. 12(i.e., LTO). The separator sublayer 206 is formed by a solid electrolyte, which in this embodiment is Al2O3, and the electrolyte gel described above. The cathode sublayer 208 is LiCoO2 (i.e., lithium cobalt oxide or LCO) activated with carbon (including SWCNTs and carbon powder, described in more detail below) and an electrolyte gel.

[0092] The semi-IPN skeleton is an ultraviolet (UV)-curable polymer composed of ethoxylated trimethylolpropane triacrylate (ETPTA) incorporating 1.0 weight percent (wt%) 2-hydroxy-2-methylpropiophenone (HMPP) as a photoinitiator, and poly(vinylidene fluoride-co-hexafluoropropylene) (PVdF-HFP) with a hexafluoropropylene (HFP) content of 6 mole percent (mol%), in a 75 / 25 wt / w ratio of ETPTA / PVdF-HFP. The semi-IPN skeleton serves as a binder for the other materials in the electrodes and electrolyte.

[0093] To enhance the conductivity of LCO and LTO, electrode-active LCO or LTO powder (e.g., nanoparticles) is coated with SWCNTs. Specifically, LCO or LTO powder is added to an SWCNT suspension (LCO / SWCNT ratio 99.75 / 0.25 w / w, LTO / SWCNT ratio 99.35 / 0.65 w / w) and mixed. The mixture is then filtered to obtain a solid, which is rinsed and dried to obtain SWCNT-coated LCO (i.e., activated LCO) or SWCNT-coated LTO (i.e., activated LTO).

[0094] The SWCNT-coated LTO nanoparticles are then mixed with carbon black (i.e., carbon powder) and the semi-IPN skeleton (in a ratio of 55 / 6 / 39 w / w / w) to form an electrode paste for fabricating the cathode sublayer 208. The SWCNT-coated LTO nanoparticles are then mixed with carbon black (i.e., carbon powder) and the semi-IPN skeleton (in a ratio of 30 / 7 / 63 w / w / w) to form an electrode paste for fabricating the anode sublayer 204. Carbon black is used herein to increase the conductivity of the electrode.

[0095] The solid electrolyte separator sublayer 206 contains sebaconitrile (SBN) and 1 mole (mol / liter, M) of LiBF in a semi-IPN skeleton in a ratio of 85 / 15 w / w, and then the aggregates are mixed with Al2O3 (approximately 300 moles) in a ratio of 60 / 40 w / w. The Al2O3 is used as a spacer to prevent any shorting of the electrodes.

[0096] 19B has many advantages over conventional lithium-ion batteries that use liquid electrolytes, such as safety and flexibility, but also has the disadvantages of complex manufacturing (requiring multiple printing steps) and low anode capacity, which may not be suitable for large-scale fabrication.

[0097] 19C is a schematic diagram illustrating the structure of a battery cell 136 in the form of a lithium-ion battery cell according to some embodiments of the present disclosure. In this embodiment, each of the current collector sublayers 202 and 210 is a thin layer of aluminum foil or conductive paper. The anode sublayer 204 is activated Si containing SWCNTs with graphite and the electrolyte gel described above. The separator layer 206 is a polyethylene or paper-based nanoporous material. The cathode sublayer 208 is LCO activated with carbon (containing SWCNTs and carbon powder) and electrolyte gel.

[0098] 19B , which uses LTO, the use of graphite and Si in these embodiments improves the capacity of the battery cell 136. Compared to using aluminum foil as the current collector sublayers 202 and 210, the use of conductive paper reduces the weight of the battery cell 136 and may reduce possible chemical reactions between the anode 204 and cathode 208 and the current collectors 202 and 210. Furthermore, the use of a paper-based or polypropylene-based (PP) separator makes the fabrication process inexpensive and easy, and therefore the battery cell 136 in these embodiments is cost-effective for large-scale fabrication.

[0099] The semi-IPN skeleton is a UV-curable polymer composed of ETPTA incorporating 1.0 wt% HMPP as a photoinitiator. The semi-IPN skeleton acts as a binder for the other materials in the electrodes and electrolyte.

[0100] To increase the conductivity of LCO and Si, electrode-active LCO or Si powder (e.g., nanoparticles) is coated with SWCNTs. Specifically, LCO or Si powder is added to an SWCNT suspension solution (LCO / SWCNT ratio 99.75 / 0.25 w / w, Si / SWCNT ratio 99.00 / 1.00 w / w) and mixed. The mixed solution is then filtered to obtain a solid, which is rinsed and dried to obtain SWCNT-coated LCO (i.e., activated LCO) or SWCNT-coated Si (i.e., activated Si).

[0101] The SWCNT-coated LCO nanoparticles are then mixed with carbon black (i.e., carbon powder) and electrolyte gel (in a ratio of 55 / 6 / 39 w / w / w) to form an electrode paste for making the cathode sublayer 208. The SWCNT-coated Si nanoparticles are then mixed with graphite and electrolyte gel (in a ratio of 5 / 45 / 50 w / w / w) to form an electrode paste for making the anode sublayer 204. Carbon black is used herein to increase the conductivity of the electrode.

[0102] The nanoporous separator sublayer 206 comprises a nanoporous membrane, such as a paper membrane, a PP or polyethylene (PE) based membrane, or the like.

[0103] 20 is a schematic diagram showing two battery cells 136 printed in series with one another and sharing a common current collector sublayer (labeled 202 / 210) between them. Each battery cell 136 has an output voltage of volts (V), with the total voltage of the two battery cells 136 being 2aV.

[0104] FIG. 21 illustrates a stencil printing technique for fabricating a battery cell 136 by using a cold manual laminator as a stencil printer device. In particular, a pair of rollers 222 rotates, as indicated by arrow 224, to apply pressure to the hybrid energy device (designated 102′, having a substrate 132 and a solar cell layer 112 printed thereon), which is then fed to the rollers 222, as indicated by arrow 228. The fed hybrid energy device 102′ is prepared with a copper mask (not shown) superimposed thereon, and a gel or paste, each having the above-described material for one of the sublayers 204-208, is applied to the masked hybrid energy device 102′. Thus, after passing through the rollers 222, a thin layer 230 of gel (having a thickness of approximately 100 μm) is printed or coated onto the masked hybrid energy device 102′.

[0105] 22 illustrates a process for fabricating an anode sublayer 204 on an aluminum or conductive paper current collector sublayer 202 using the above-described stencil printing technique without processing solvents. As shown, an LTO anode paste 252 is applied to a feed hybrid energy device 102' having an aluminum or conductive paper current collector sublayer 202 (not shown), and a rotating roller 222 applies pressure to the anode paste 252 passing therethrough to form a thin LTO film 204, which is then applied with a current density of approximately 2000 mW.cm. -2 2. The printed LTO anode sublayer 204 is then exposed to UV radiation 254 from a Hg UV lamp 256 having a peak radiation intensity of 1000 W for 30 seconds to solidify and form the printed LTO anode sublayer 204.

[0106] The hybrid energy device 102′ may then be masked, coated with electrolyte paste, and fed through a roller 222 in a stencil printing and UV curing process similar to that described above to print the solid electrolyte separator sublayer 206 on the anode sublayer 204. The cathode sublayer 208 may then be fabricated by printing the cathode paste on the solid electrolyte separator sublayer 206 of the hybrid energy device 102′ and cured by UV irradiation. After placing the Al current collector sublayer 210 on the printed cathode sublayer 208, a seamlessly integrated all-solid-state battery cell layer 136 is obtained, which may be a mono-full cell, i.e., the entire battery cell layer 136 comprising a single battery cell.

[0107] The above process can be repeated to print another battery cell layer 136 on top to create a printed bipolar battery cell 136.

[0108] In some embodiments, the sublayers of the battery cell 136 may be printed using the printing device described above with the slot die head 174 shown in FIG. 13 . In these embodiments, the particular head 174 may be used to print all of the sublayers of the solid-state battery cell 136 using slot die coating. However, stencil printing (see FIG. 21 ) is much easier to use with high-viscosity inks. Furthermore, it is not necessary to coat thin (i.e., nm-scale) layers (nm-scale) to fabricate the batteries disclosed herein. The sublayers of the battery cell 136 may have relatively thick thicknesses in the micrometer range, which can be easily achieved using stencil printing.

[0109] 23 shows details of the hybrid energy device 102. In this embodiment, the energy storage layer 114 is a supercapacitor layer comprising multiple GaAs / AlGaAs sublayers 138 that form multiple semiconductor capacitors as described above.

[0110] Integrated Electronic Power Converter In some embodiments, the multi-input electronic power converter 116 may be an integrated electronic power converter that may be printed, deposited, or otherwise integrated into the battery cell layer 136 (see FIGS. 9A and 9B). The block diagrams of the integrated electronic power converter shown in FIGS. 24A and 24B illustrate a solar energy collection system 100 with an integrated electronic power converter 116 for AC and DC applications, respectively.

[0111] 25A is a block diagram of the integrated electronic power converter 116. As shown, the integrated electronic power converter 116 includes a solar input converter 284 that receives the output of the solar cell layer 112 at a solar input 282 and converts the solar input 282 to a first intermediate form (voltage, current, frequency, and / or the like) for output to an output converter 288. The integrated electronic power converter 116 also includes a battery input converter 286 that receives the output of the energy storage layer 114 at a battery input 290 and converts the battery input 290 to a second intermediate form (voltage, current, frequency, and / or the like) for output to the output converter 288. The output converter 288 receives and combines the electrical outputs from the solar input converter 284 and the battery input converter 286, converts the combined electrical energy to a suitable form (voltage, current, frequency, and / or the like) for output (292) to a load and / or a utility grid (not shown).

[0112] In these embodiments, solar input converter 284, battery input converter 286, and output converter 288 are high frequency (HF) circuits and have a functional structure similar to that shown in Figure 25B. As can be seen, each of converters 284, 286, and 288 includes a power circuit 312 for receiving a power input, coupled to a drive circuit 314 for outputting power. A control and sense module 316 is coupled to drive circuit 314 to control the power output and maintain a balance between solar input 282 and battery input 290.

[0113] 25C is a circuit diagram of the integrated electronic power converter 116. As shown, the solar input converter 284, the battery input converter 286, and the output converter 288 are electrically coupled to a ferromagnetic or ferrimagnetic core through a transformer 322. The control and sensing module 316 controls the output current i of each of the solar input converter 284 and the battery input converter 286. p1 and i p2 (i=1 or 2 pi ), and the output voltage v of the output converter 288 o Senses and i Pi and v o is used to adjust the parameters of the solar input converter 284, the battery input converter 286, and the output converter 288 to optimize their performance.

[0114] As shown in FIGS. 26A-26C, the integrated electronic power converter 116 in some embodiments may be formed by printed circuits on multiple flexible printed circuit boards (PCBs) 330.

[0115] In these embodiments, the integrated electronic power converter 116 is implemented as an integrated circuit (IC) chip and includes a core layer 334 made of ferrite material, thereby forming a ferrite core. The ferrite core 334 is sandwiched between two silicon-based wiring layers 330. FIG. 26C is a schematic perspective view of a portion of the integrated electronic power converter 116. For ease of illustration, the structure of the integrated electronic power converter 116 is shown with a gap between the ferrite core 334 and the wiring layer 330. However, those skilled in the art will understand that such a gap is for illustrative purposes only, and that an actual integrated electronic power converter 116 may not have any gap between the ferrite core 334 and the wiring layer 330. For example, the ferrite core 334 may be printed, deposited, or otherwise integrated into any one of the wiring layers 330.

[0116] The ferrite core 334 includes three ferrite loops 336A, 336B, and 336C, which act as the cores of the inductors Ls of the solar input converter 284, the battery input converter 286, and the output converter 288, respectively.

[0117] Conductive traces 332, including 332A, 332B, and 332C, are distributed on wiring layer 330 and connect solar input converter 284, battery input converter 286, and output converter 288. As shown in Figures 26B and 26C, conductive traces 332 on opposite wiring layer 330 are connected through vias 342 (conductive holes on wiring layer 330) and wrapped around ferrite core 334.

[0118] In some embodiments, the integrated electronic power converter 116 is implemented as a circuit board having two wiring layers 220 made from a flexible PCB and a core layer 334 structured in a manner similar to that shown in Figures 26A-26C and described above. Conductive traces 332, including 332A, 332B, and 332C, are made from etched conductive layers on the flexible PCB 330. The conductive traces 332 on the opposite side of the flexible PCB 330 are connected through vias 342 and wrapped around a ferrite core 334.

[0119] Hybrid energy device circuit 27 is a circuit diagram illustrating a DC hybrid energy device 102 having an integrated DC power converter 116DC powering DC energy devices (not shown, collectively referred to as "output devices") at its output 402, according to some embodiments of the present disclosure. The DC power converter 116DC may be integrated into the hybrid energy device 102 and electrically connect the solar cells 112 and energy storage 114 to the respective output devices.

[0120] In these embodiments, the integrated DC power converter 116DC comprises multiple HF circuit modules, including a solar input converter 284, an energy storage converter 286, and an output converter 288. The integrated DC power converter 116DC also comprises a current shaping control module 316 for precisely controlling the flow of power between the solar cells 112, the energy storage 114, and the output 402, which shapes the HF current passing through the HF transformer 332 to achieve desired performance.

[0121] As shown in FIG. 27, each of the circuit modules 284, 286, and 288 includes a pair of metal oxide semiconductor field effect transistors (MOSFETs) (Q in solar input converter 284). 1、PV and Q 2、PV , Q in Energy Storage Converter 286 1、ES and Q 2、ES , Q in the output converter 2881、o and Q 2、o ) together in an LC circuit (which in this example has two capacitors and an inductor) to form a switch circuit for electrically coupling them via a transformer 322. The circuit modules 284, 286, and 288 are connected to their power semiconductor gate terminals Q 1、PV , Q 2、PV , Q 1、ES , Q 2、ES , Q 1、o , and Q 2、o can be controlled by adjusting the signal applied to

[0122] In the embodiment shown in FIG. 27, the current shaping control module 316 controls the output voltage v of the solar cell layer 112. pv , the output voltage v of the energy storage layer 114 Bat , the output current i of each of the solar input converter 284 and the energy storage converter 286 for coupling to the output converter 288 via the transformer 322. p、PV , i p、ES (collectively i p ), and the output voltage v of the output converter o The current shaping control module 316 senses multiple parameters including the power semiconductor gate terminals (collectively Q i、PV , Q i、ES , and Q i、o where i=1 or 2), optimizes the performance of the integrated DC power converter 116DC.

[0123] In particular, based on the sensed parameters described above, the current shaping control module 316 controls the gate terminal signal Q i、PV , Q i、ES , and Q i、o to control the duty cycle d of the power semiconductors on the PV side 284 of the transformer. PV , duty cycle d of the transformer battery side 286 ES , the duty cycle d of the power semiconductors at the transformer output 288 o, the phase shift (i.e., φ) between the pulses of the power semiconductors on the transformer PV side 284 and the pulses of the power semiconductors on the output side 288 PV ), the phase shift (i.e., φ) between the pulses of the power semiconductors on the transformer battery side 286 and the pulses of the power semiconductors on the output side 288 ES ), and the switching frequency (i.e., T s ) to shape the HF currents in the three modules 284, 286, and 288.

[0124] FIG. 28 shows the HF waveforms of some signals in a solar cell module 284.

[0125] 29 is a block diagram of a current shaping control module 316 for controlling the solar cell module 284 in some embodiments. According to this diagram, the power output from the solar cell module 284 is controlled by pulses Q of the transformer PV side power semiconductors. i、PV (i=1, 2) and the phase shift φ between the pulses of the power semiconductors at the output of the transformer PV In particular, the current shaping control module 316 sets a constant reference current value I as the maximum value of the instantaneous current of the transformer. max and a pair of reference signals v* PV and i* PV and generate signal k d、PV (where "*" represents a reference signal). The current shaping control module 316 also receives the input signal Q 1、o or Q 2、o A pair of monostable multivibrator circuits is used to detect the rising edge of and output a pulse of a predetermined length. Similar control can be performed for the energy storage module 286.

[0126] In general, the current shaping control module 316 generates two signals i at the inputs of the amplifiers 414 and 416, respectively. ref1 and i ref2 A, Q 2、o If ='1', then i ref1 =Imax -k d、PV ×t, Q 1、o If ='1', then i ref2 =I max -k d、PV ×t is decided. Here, "x" represents multiplication.

[0127] Then, signal i ref1 and i ref2 are the amplifiers 414 and 416, respectively. 2、o x|i p、PV | and Q 1、o x|i p、PV | (where "|a|" represents the absolute value of a), and the outputs of amplifiers 414 and 416 are used to trigger an SR flip-flop 418, generating a signal Q 1、PV and Q 2、PV Generate.

[0128] The current shaping control module 316 for controlling the energy storage module 286 may be similar to that shown in FIG. 29, except that the phase shift may be positive and negative depending on the charge or discharge mode of operation.

[0129] 30 shows waveforms for the current shaping control module 316. The controller controls the signal i generated by the controller 412. ref1 and i ref2 Droop gradient k di (i=1,2) to adjust the phase shift and control the power. p、PV or i p、ES Since the slope of d can be positive or negative (depending on the input and output voltage), controlling the droop slope can effectively control the phase shift regardless of the transformer current slope. PV , d o , T s Other control variables such as may be used to ensure soft switching of the power semiconductors.

[0130] FIG. 31 is a block diagram illustrating the generation of pulses for the converter secondary side power semiconductors by using a zero voltage switching (ZVS) control circuit 422, which controls the HF current i p (i p、PV or i p、ES , which may be 0.5 V or 1 V, has the correct polarity at the switching instant.

[0131] In some embodiments shown in FIG. 32, multiple DC hybrid energy devices 102 (see FIG. 27) may be connected in parallel or otherwise combined to power a DC load 104 and / or a DC power grid 118.

[0132] 33, multiple DC hybrid energy devices 102 described herein may be connected in series or otherwise combined to power a DC load 104 and / or a DC power grid 118. An advantage of these embodiments is that while the voltage output of each hybrid energy device 102 may be low, the combination of multiple hybrid energy devices 102 may provide a high voltage output when needed.

[0133] In some embodiments, the DC hybrid energy devices 102 may be used to power AC loads and / or an AC power grid using a DC / AC inverter. For example, Figure 34 shows multiple DC hybrid energy devices 102 connected in parallel to power DC loads 104 and / or a DC power grid 118 via a single input DC / AC inverter 432. Figure 31 shows multiple DC hybrid energy devices 102 connected in series to power DC loads 104 and / or a DC power grid 118 via a single input DC / AC inverter 432.

[0134] 36 is a circuit diagram illustrating an AC hybrid energy device 102 at its output 402 having an integrated AC power converter 116AC for powering AC energy devices (not shown, collectively referred to as output devices), according to some embodiments of the present disclosure. The AC power converter 116AC may be integrated into the hybrid energy device 102 and electrically connect the solar cells 112 and energy storage 114 to the respective output devices.

[0135] As shown in FIG. 36, the integrated AC power converter 116AC includes an output converter 288 that includes a pair of power semiconductors Q 3、o and Q 4、o and inductor L g , and the integrated DC power converter 116DC is similar to the integrated DC power converter 116DC except that it further comprises a current shaping control module 316 for the integrated AC power converter 116AC. g and AC output current i g Based on the sensed parameters, the current shaping control module 316 also controls the power semiconductor Q 3、o and Q 4、o (That is, in Figure 36, Q where i=1, 2, 3, 4 i、o ) to adjust the signal applied to the gate terminal.

[0136] In these embodiments, the current shaping control module 316 is similar to that of the integrated DC power converter 116DC. For example, the current shaping control module 316 for controlling the solar cell module 284 may have a structure similar to that shown in FIG. 29. The current shaping control module 316 in these embodiments also uses a ZVS control circuit similar to that shown in FIG. 31 to generate pulses for the transformer secondary power semiconductors and control the HF current i p has the correct polarity at the switching instant.

[0137] Those skilled in the art will recognize that in some embodiments shown in FIG. 37, multiple AC hybrid energy devices 102 shown in FIG. 36 may be connected in parallel or otherwise combined to power an AC load 104 and / or an AC power grid 106.

[0138] Exemplary Uses of Solar Energy Collection Systems The above-described solar energy collection system 100 may also be present in various electrical and electronic devices, either as a detachable part or as an integral part thereof, as desired.

[0139] For example, Fig. 38 shows a cell phone case 500 having a plurality of side walls 502 and a rear wall 504, thereby forming a recess 506 for receiving a cell phone (not shown), such as a smartphone, therein. A hybrid energy device 102 is integrated into the rear wall 502. As shown in Fig. 39, the hybrid energy device 102 includes, in order from the rear wall 502 of the cell phone case 500, an electronic power converter 116, an energy storage layer 114, a solar cell layer 112, and a transparent substrate 132, such as a piece of transparent glass. The energy storage layer 114 is connected to a battery in the cell phone via the electronic power converter 116.

[0140] In some alternative embodiments, the hybrid energy device 102 may not include an energy storage layer 114. Rather, the solar cell layer 112 is connected to a battery within the cell phone via an electronic power converter 116.

[0141] In some alternative embodiments, case 500 may be a case for other mobile devices, such as a tablet.

[0142] In some alternative embodiments, the hybrid energy device 102 may be integrated into the back wall of a cell phone or tablet.

[0143] In some alternative embodiments, the hybrid energy device 102 may be integrated into the back wall of the display of a laptop computing device.

[0144] In some embodiments shown in FIG. 40, the hybrid energy device 102 may be integrated into the screen 542 of a mobile phone 540 .

[0145] 41 , the screen 542 includes, from the outermost layer to the innermost layer, a transparent substrate layer 132 such as glass having one or more sublayers for touch detection (e.g., capacitive touch detection), a display layer 544 having a plurality of LEDs for displaying images, a solar cell layer 112, an energy storage layer 114, and an electronic power converter 116. The display layer 544 is a transparent layer such as a transparent OLED layer that allows light to pass through it to reach the solar cell layer 112 below. The energy storage layer 114 is connected to a battery in the mobile phone via the electronic power converter 116. Alternatively, the mobile phone 540 need not include a separate set of batteries other than the energy storage layer 114.

[0146] In these embodiments, the mobile phone 540 may not include an energy storage layer 114. Rather, the solar cell layer 112 is connected to the battery of the mobile phone 540 via an electronic power converter 116.

[0147] In various embodiments, the screen 542 may further include other necessary layers that may be located below the solar cell layer 112 or, if the layers are transparent, above the solar cell layer 112 .

[0148] In some alternative embodiments, the display layer 544 may be a liquid crystal display (LCD) layer. In these embodiments, a backlight may be required to provide the necessary illumination to display the image. Furthermore, the light energy conversion efficiency of the solar cell layer 112 may be affected by the image displayed on the display layer 544. For example, the light energy conversion of the solar cell layer 112 may be significantly reduced or even disabled when the display layer 544 displays a dark or black image thereon.

[0149] In some alternative embodiments, the screen 542 may further comprise a light conversion layer between the transparent substrate 132 and the display layer 544. The light conversion layer comprises one or more metasurfaces to adjust one or more parameters of the light emitted from the display layer 544, such as the amplitude or intensity, phase, polarization, pattern, or direction. Details of the light conversion layer are described in the applicant's co-pending U.S. Provisional Patent Application Nos. 62 / 862,853, filed June 18, 2019, and 62 / 961,317, filed January 15, 2020, the contents of each of which are incorporated herein by reference in their entirety.

[0150] Digital Current Estimation 27 and 29, the current shaping control module 316 is an HF current sensor and includes the necessary sensing circuitry (or "sensors") to sense multiple parameters. For example, the current shaping control module 316 uses the HF current sensor to measure the HF current i p Sense.

[0151] Current sensors are typically expensive and can introduce noise and delay into the control module 316. The HF current sensors in the current shaping control module 316 shown in Figures 27 and 29 increase the cost of the hybrid energy device, reduce its power density, and reduce the reliability of the control module 316.

[0152] Figure 42 illustrates the current shaping control module 316 in some embodiments. The current shaping control module 316 in these embodiments is similar to that shown in Figure 27. However, the current shaping control module 316 in these embodiments uses a digital HF current estimator 602 to estimate the HF current waveform and use it as feedback for the closed-loop control system shown in Figure 27.

[0153] Specifically, the current shaping control module 316 in these embodiments controls the input and output voltages (v o , v Bat , v pv ) and gate pulse signal Q i、pv , Q i、ES , and Q i、o to estimate the HF current waveform, thereby avoiding the use of any current sensors.

[0154] Gallium nitride (GaN) gate driver circuit Prior art GaN gate drivers may have reliability issues and may not be suitable for industrial applications. One of the main reliability issues is due to the high reverse conduction voltage due to the reverse conduction mechanism of GaN devices. In some embodiments, GaN devices are used as power semiconductors (Q 1、PV and Q 2、PV , Q 1、ES and Q 2、ES , and Q 1、o and Q 2、o ) can be used as

[0155] In GaN gate driver circuits, using bootstrap techniques in a half-bridge configuration can be challenging because it requires good regulation of the gate bias (e.g., a bias of 5 to 6 V with a maximum rating of 7 V). As shown in Figure 43, during low-side freewheeling, the negative voltage on the switch node can overcharge the bootstrap capacitor, causing the GaN high-side gate voltage to exceed the maximum rating of 7 V. As a result, post-regulation or voltage clamping may be required after bootstrap.

[0156] 44 shows a GaN gate driver circuit 610 with minimized reverse conduction time for use in a multi-input electronic power converter 116. As shown, the GaN gate driver circuit 610 includes two GaN gates Q1 and Q2 that are charged or discharged. The GaN gate driver circuit 610 includes two controlled switches S1 and S2, a pair of coupled inductors L1 and L2, a clamp capacitor C B , as well as a level shifter 612 to avoid shoot-through. The level shifter 612 can be a voltage source. However, in these embodiments, the level shifter 612 is implemented using a Zener diode D z and capacitor C z Implemented using parallel coupled and series resistors R z is connected to.

[0157] The GaN gate driver circuit 610 has various advantages, such as significantly reduced switching losses due to rapid turn-on and turn-off of the power switch during transition times, noise immunity, significantly reduced gate driver losses due to gate energy recovery, zero-voltage switching of the drive switch, a low component count, and the simplicity of its control circuit. Compared to other current source drivers (CSDs), the GaN gate driver circuit 610 has a significant advantage in that the voltage level of the GaN input capacitor rises higher than the gate driver power supply voltage. A parallel inductor may be added to the transformer secondary to mitigate the effects of the transformer parasitic capacitor.

[0158] Enhancement-mode GaN transistors have the characteristic that when the maximum gate voltage of the device exceeds a certain voltage level (e.g., 7 V), a failure mechanism occurs in the device. This also applies to depletion-mode GaN devices. Enhancement-mode GaN devices require a gate voltage close to a certain voltage level (e.g., 6 V) to achieve optimal performance. Unlike their silicon counterparts, enhancement-mode GaN devices experience device failure above a certain voltage (e.g., 7 V). A higher gate-source voltage for GaN can lower the drain-source resistance in the turn-on state, significantly reducing conduction losses. For some high-frequency applications, a CSD capable of driving the gate-source voltage of a GaN device higher than the supply voltage is desirable. Existing gate drivers for GaN that can drive two GaNs in one bridge leg cannot drive the gate at a voltage higher than the supply voltage. A unique feature of the GaN gate driver circuit 610 is the R ds (on) and hence conduction losses.

[0159] With the GaN gate driver circuit 610, the dead time and the resulting reverse conduction losses are minimized. In fact, the reason for the reverse conduction losses is the dead time. To avoid shoot-through, dead time may be inserted between the gate driver signals. As long as the crossover level of the gate driver signal is below the device threshold voltage, the dead time can be eliminated and shoot-through can also be avoided. The crossover level of the gate signal is always V CC, which is usually larger than the threshold voltage, so shoot-through problems may occur. In the GaN gate driver circuit 610, a level shifter circuit 612 can be inserted in the driver loop of either the upper switch or the lower switch. Based on the level shifter circuit 612, the crossover point can be adjusted to avoid shoot-through problems, as shown in FIG. 45. In addition, the negative voltage generated by the level shifter bias ensures high reliability of the turn-off status and avoids false turn-on due to a low threshold voltage. These advantages make the GaN gate driver circuit 610 suitable for GaN devices with a half-bridge structure.

[0160] Soft switching for HF operation Soft switching is important for high frequency applications because it significantly reduces switching losses. For example, in some embodiments, the electronic power converter 116 of the hybrid energy device 102 may operate in the megahertz (MHz) frequency range. Therefore, hard switching can result in excessive switching losses that degrade performance and require complex thermal management.

[0161] The power converter 116 DC shown in FIG. 27 can provide zero voltage switching (ZVS) and substantially reduce switching losses. However, under certain conditions, ZVS can be lost, thereby reducing performance. This problem arises from the fact that high frequency transformers can have some parasitic capacitance. For example, FIG. 46 shows the various parasitic capacitances C p1 ~C p3 , and C of the HF transformer T s1 ~C s3 These parasitic capacitances distort ZVS operation under certain conditions.

[0162] Figure 47 is a circuit diagram of a DC power converter 116DC in some embodiments that may be used in the hybrid energy device 102 shown in Figure 27. The power converter 116 has a parallel inductor L connected to the output of the HF transformer 322.p to effectively compensate for the above parasitic capacitances and provide soft switching for the DC power converter 116DC. Those skilled in the art will appreciate that a similar design can be applied to the AC power converter 116AC shown in FIG.

[0163] Thermoelectric Recycling Several components of the hybrid energy device 102 may generate heat. For example, the solar panel 112 and the power electronics (e.g., the electronic power converter 116) are the primary sources of heat in the hybrid energy device 102.

[0164] In some embodiments, the heat generated can be reused and converted into electricity by using a thermoelectric unit (also called a "thermoelectric generator" (TEG)).

[0165] 48 is a schematic diagram illustrating a thermoelectric unit 620 coupled to a heat source 622, such as a solar panel 112 or an electronic power converter 116. The thermoelectric unit 620 comprises, in order from the heat source 622, a hot plate 624, a thermoelectric layer 626, and a cold plate 628.

[0166] Hot plate 624 is made of a suitable thermally conductive material, such as a metallic material, for receiving the heat generated by heat source 622. In some embodiments, hot plate 624 may be the substrate of heat source 622. In some other embodiments, hot plate 624 may be a separate plate coupled to the substrate of heat source 622 using suitable means such as thermally conductive adhesive, screws, bolts, and / or the like. Cold plate 628 is made of a suitable material, such as a metal.

[0167] The thermoelectric layer 626 includes a suitable thermoelectric material with low thermal conductivity (or substantially thermally non-conductive or thermally insulating) and high electron and hole mobility (i.e., electron and hole transportability), such as a two-dimensional (2D) perovskite or other suitable 2D material, to convert the temperature gradient between the hot plate 624 and the cold plate 628 into an electric current. Here, the 2D material is a material that efficiently transports electrons and holes but has poor heat transfer capabilities. In these embodiments, the 2D material may be any suitable 2D material type and may be different from the 2D perovskite used in the active layer of the solar cell. 3D materials may transport both electricity and heat and therefore may not be preferred in these embodiments.

[0168] Hot plate 624, thermoelectric layer 626, and cold plate 628 have good electronic conductivity. Additionally, thermoelectric layer 626 has low thermal conductivity, and therefore hot plate 624, thermoelectric layer 626, and cold plate 628 form a structure for receiving heat from heat source 622 and confining the received heat near hot plate 624 to convert it into electricity.

[0169] 49A and 49B, the thermoelectric layer 626 in these embodiments comprises one or more 2D material sublayers 632, such as a 2D perovskite sublayer, extending between a hot plate 624 and a cold plate 628. The one or more 2D material sublayers 632 can be a continuous 2D material sheet or multiple 2D material sheet segments or columns spaced apart from one another or separated by multiple spacers or fillers, such as membranes 634. For example, the thermoelectric layer 626 of one embodiment can be made of multiple 2D perovskite sheets interleaved with multiple membrane sheets. In another embodiment, the thermoelectric layer 626 can be made by stacking 2D perovskite sheets with membrane sheets and rolling the stacked sheets into a cylinder to form the thermoelectric layer 626.

[0170] During operation, the hot plate 624 receives heat from the heat source 622, creating a temperature gradient within the thermoelectric unit 620, which causes electrons 636 to move toward the cold plate 628, thereby generating an electric current.

[0171] Thus, thermoelectric unit 620 may provide useful redundancy to solar energy collection system 100 and may effectively reuse a portion of the thermal energy generated by heat source 622.

[0172] In some embodiments, one of the solar panel 112 or the electronic power converter 116 is coupled to the thermoelectric unit 620 .

[0173] In some embodiments, each of the solar panel 112 or the electronic power converter 116 is coupled to a thermoelectric unit 620 .

[0174] FIG. 50 shows an exemplary implementation of a PV panel 112 integrated or otherwise coupled with a thermoelectric unit, or TEG 620. In this arrangement, wavelengths of solar radiation (typically in the 300-800 nm range) are absorbed through the PV panel 112, and longer wavelengths are absorbed through the thermoelectric unit 620. By combining the PV panel 112 and TEG 620, their power output is greater than that of the PV panel 112 alone. Additionally, the TEG 620 also functions as a heat sink, reducing the operating temperature of the PV panel 112, thereby extending the life of the PV panel 112.

[0175] 51A and 51B are schematic diagrams illustrating a photovoltaic thermoelectric unit 650 according to some embodiments of the present disclosure. As shown, the photovoltaic thermoelectric unit 650 includes a light collection layer 652 and a TEG 620 coupled thereto. The TEG 620 is similar to that shown in FIGS. 48-50 and includes, in order from the light collection layer 652, a hot plate 624, a thermoelectric layer 626, and a cold plate 628.

[0176] The light harvesting layer 652 comprises a first sublayer having a plurality of solar cells 654 mixed with a plurality of metasurfaces 656 (which are a plurality of nanocolumns as shown in Figure 47C), and a second sublayer having a plurality of nanowires 658 coupled to the first sublayer.

[0177] As one skilled in the art will appreciate, solar cells 654 are only capable of collecting energy in a particular frequency spectrum. In a conventional solar panel, uncollected light energy is typically wasted as heat.

[0178] In these embodiments, metasurface 656 is designed to further improve the use of solar energy by utilizing energy in the light spectrum that cannot be used by solar cell 654. Specifically, metasurface 656 can be designed to conduct light having specific frequencies that cannot be used by solar cell 654. This light conducted through metasurface 656 is converted to heat by nanowires 658 and then converted to electricity by TEG 620.

[0179] As shown in FIG. 51D, nanowires 658 can be embedded in hotplate 624 and directly transfer the converted heat to thermoelectric layer 626 for conversion into electricity.

[0180] FIG. 52 illustrates a thermoelectric unit or TEG 700 according to some embodiments of the present disclosure. In these embodiments, the TEG 700 includes a hot plate 624 and a cold plate 628 similar to those described above, and a nanochannel layer 702 sandwiched between the hot plate 624 and the cold plate 628. The nanochannel layer 702 includes multiple nanochannels 704 in parallel. The nanochannels are made of a suitable conductive material, such as carbon (e.g., graphene), gold, and / or the like, and have one or more sub-wavelength dimensions. For example, in some embodiments, the nanochannel layer 702 may have a sub-wavelength thickness (the dimension between the hot plate 624 and the cold plate 628) of about 10 nm, such as to allow quantum effects to be significant and electrons to move (see FIG. 49B).

[0181] In these embodiments, nanochannels 704 are used to confine heat to the hotplate side and provide a channel for the flow of electrons 706. In other words, nanochannel layer 702 is conductive, allowing electrons 706 to flow, while impeding heat transfer and maintaining a temperature gradient.

[0182] In some similar embodiments, the nanochannel layer 702 may comprise multiple nanochannels 704 arranged in series or a mixture of parallel and series. See FIG.

[0183] Super Capacitor Technology Because real-world sunlight conditions are usually unstable, energy storage is important in the solar energy collection system 100. Given the intermittent nature of solar energy, an energy storage unit can be an essential part of the hybrid energy device 102.

[0184] Various methods can be used to store energy, among which batteries and supercapacitors are the most popular solutions due to their superior performance. For example, in some embodiments, high-density lithium-ion (LI) batteries can be used to store energy.

[0185] In some embodiments, such as those in which PV panels 112 with large sizes are used, supercapacitors may be used to store energy.

[0186] Supercapacitors are a relatively new class of energy storage system, offering fast power delivery and a lifespan of over thousands of charge-discharge cycles at high current densities. Electrochemical double-layer capacitors (EDLCs) store opposite charges at the interface between the anode and cathode through physical adsorption, a mechanism distinct from batteries (energy storage occurs through redox reactions). As a result, supercapacitors can offer faster ion exchange rates and longer operating cycles compared to batteries. Supercapacitors are particularly attractive for use in high-power applications such as hybrid electric vehicles and power plants.

[0187] 54A and 54B illustrate the structure of a supercapacitor 740. As shown, the supercapacitor 740 comprises multiple stacked capacitor layers 742 coupled to a pair of conductors or electrical terminals 744 and 746.

[0188] Each capacitor layer 742 comprises a pair of thin film sublayers 752 separated by an electrically insulating membrane sublayer 754, and a pair of conductor sublayers 756 and 758 sandwiching the thin film sublayer 752 (and membrane sublayer 754) between them. The thin film sublayers 752 are made of a conductive thin film material such as activated carbon, graphene, graphite, and / or a mixture of the like. The membrane sublayers 754 are coated with an ionic liquid material or by immersing the membrane in the ionic liquid and removing excess liquid by suspending the membrane for several minutes.

[0189] Each of the conductor sublayers 756 and 758 is electrically connected to a respective terminal 744 or 746. For example, as shown in FIG. 54A, the conductor sublayer 756 is electrically connected to terminal 744, and the conductor sublayer 758 is electrically connected to terminal 746.

[0190] When multiple capacitor layers 742 are stacked together, adjacent capacitor layers 742 may share a conductor sublayer. For example, as shown in FIG. 54A, adjacent capacitor layers 742-1 and 742-2 share a conductor sublayer 762, which is effectively conductor sublayer 758-1 of capacitor layer 742-1 and conductor sublayer 758-2 of capacitor layer 742-2. Similarly, adjacent capacitor layers 742-2 and 742-3 share a conductor sublayer 764, and adjacent capacitor layers 742-3 and 742-4 (not shown) share a conductor sublayer 766.

[0191] This structure allows the supercapacitor 740 to have a large area and a small thickness. Multiple supercapacitors 740 can be integrated together to provide sufficient storage capacity required for the hybrid energy device 102. The supercapacitor 740 has several key advantages.

[0192] For example, the use of thin film materials facilitates the construction of high energy density supercapacitors 740 .

[0193] The supercapacitor 740 has fast dynamic behavior, i.e., the charging and discharging of the supercapacitor 740 can be much faster than that of a battery. Such fast dynamic behavior is important for the solar energy collection system 100 due to the unstable nature of solar energy.

[0194] Another advantage of the supercapacitor 740 is its lifespan. Unlike batteries, there is no electrochemical reaction in the supercapacitor 740. Therefore, the lifespan of the supercapacitor 740 can be extended for many years with minimal degradation in performance.

[0195] Yet another advantage of the supercapacitor 740 is its wide temperature range, making it ideal for outdoor applications.

[0196] Below, symmetric supercapacitors and their fabrication processes are described. A supercapacitor may comprise one or more supercapacitor cells, each of which comprises a separator such as a membrane, an electrolyte (i.e., an ionic liquid), a cathode, an anode, and a pair of current collectors.

[0197] In some embodiments, the membrane may be a cellulose fiber, hi some other embodiments, the membrane may be a high density pore polymer membrane and / or a suitable separator provided by Celgard LLC of Charlotte, North Carolina, United States.

[0198] The electrolyte ionic liquid may be 1-ethyl-3-methylimidazolium tetrafluoroborate (EMIMBF4), which is stable in air and water, making it a good candidate for supercapacitors operating at extremely high or low temperatures.

[0199] The cathode and anode may include a thin film of conductive material coated on the surface of a separator.

[0200] In some embodiments, silver nanoparticles dissolved in xylene or other suitable solvent may be used to form the current collector. In some other embodiments, thin foils of metal or graphene-based sheets may be used as the current collector. In yet some other embodiments, a combination of coated silver ink and thin foil may be used to form the current collector.

[0201] Each supercapacitor cell may be formed by a membrane coated with an ionic liquid, a conductive ink, and a current collector. The conductive ink may include activated carbon, graphene, a binder, and a volatile solvent. In some embodiments, both the cathode and anode can be fabricated using the same conductive ink, while in other embodiments, the components in the ink can be different for the electrodes.

[0202] The supercapacitor cells may be fabricated using suitable printing or coating techniques, such as a combination of slot die coating, spray coating printing, and doctor blading. The ink used to print the cathode and anode contains activated carbon, graphene, carbon nanotubes, and a binder dispersed in a volatile solvent such as acetone.

[0203] 55 shows the structure of a supercapacitor 800 according to some embodiments of the present disclosure. The supercapacitor 800 in these embodiments is a symmetric supercapacitor having an anode 802 and a cathode 804 separated by a membrane 806, and a pair of current collectors 808 and 810 that sandwich the combination of anode 802, membrane 806, and cathode 804. The supercapacitor 800 also includes an ionic liquid (not shown) between the anode 802 and membrane 806, and between the cathode 804 and membrane 806.

[0204] In these embodiments, the anode 802, cathode 804, and current collectors 808 and 810 are coated films coated with a suitable conductive material. The membrane 806 may be a cellulose or polymer with high porosity. The ionic liquid may be EMIMBF4 or a similar electrolyte. The cathode and anode are made of similar materials with sufficient electrical conductivity.

[0205] With this construction, the supercapacitor 800 is a flexible supercapacitor.

[0206] In some embodiments, the supercapacitor 800 may be formed by one or more supercapacitor cells 800', each supercapacitor cell 800' having a structure as shown in FIG.

[0207] 56 is a schematic diagram illustrating a fabrication process 820 for a supercapacitor cell 800' using spray coating techniques. The fabrication process 820 is suitable for large scale fabrication of the supercapacitor cell 800'.

[0208] In various embodiments, a slot die coater or doctor blade method may be used as the printing tool. In some embodiments, in addition to the spray-coated current collector, a thin foil of metal or GRAFOIL® flexible graphite (GRAFOIL is a registered trademark of Neograf Solutions, LLC, Lakewood, Ohio, USA) may be used to reduce the cell's resistivity. The thin foil of metal may be aluminum, nickel, or other materials, depending on the selection of ionic liquid and conductive ink compounds. In some embodiments, PMMA may be used as the insulator and encapsulant.

[0209] In these embodiments, the ink compound has a high concentration of activated carbon and graphene mixed with stabilizers and volatile solvents to facilitate the fabrication process 820. In some embodiments, the ink may be made with carbon nanotubes or carbon fibers mixed with activated carbon and graphene. In some embodiments, the supercapacitor cell 800' may be fabricated using different cathode and anode materials or different concentrations of compounds in the ink.

[0210] As shown in Figure 56, in the ink preparation stage 822, the conductive ink is processed using a ball mill 842 to grind materials 844, such as activated carbon, graphene, binders, and suitable media, into fine-sized particles. All powders and solvents are added to the ball mill in this step and allowed to mix for several hours. The processed ink is then filtered and transported to the printing station (not shown).

[0211] In the coating step 824, solutions 848 of ionic liquid, conductive ink, and current collector are applied sequentially to opposite sides of the membrane 806 using two spray coaters 846, followed by a suitable annealing procedure to remove the volatile solvent.

[0212] In the encapsulation step 826, two spray coaters 856 are used to apply a thin layer of PMMA insulator 858 to the supercapacitor cells 800' to prevent shorting of the stacked supercapacitor cells. In the packaging step 828, the supercapacitor cells 800' are transferred to a vacuum chamber for final encapsulation and packaging to create the supercapacitor 800.

[0213] 57 shows a supercapacitor 800 formed by stacking multiple supercapacitor cells 800' with a suitable insulator 872, such as a PMMA insulator, sandwiched between each pair of adjacent supercapacitor cells 800' for electrical isolation. In these embodiments, the supercapacitor cells 800' may be stacked in series or parallel. The PMMA insulator may be coated onto the supercapacitor cells 800'.

[0214] This construction of the supercapacitor 800 allows for an extended lifespan for each cell 800', as PMMA is a good encapsulation material that prevents air and moisture from entering the supercapacitor cells 800'.

[0215] Although embodiments have been described with reference to the accompanying drawings, those skilled in the art will appreciate that variations and modifications can be made without departing from the scope of the invention as defined by the appended claims.

Claims

1. 1. A power circuit comprising: a first input circuit for coupling to a photovoltaic (PV) source; a second input circuit for coupling to an energy storage source; a third circuit coupled to the first input circuit and the second input circuit for processing and outputting electrical energy received from at least one of the first circuit and the second circuit; a control circuit coupled to the first circuit, the second circuit, and the third circuit for optimizing the output of the third circuit by controlling power flow between the circuits based on output voltages of the PV source and the energy storage source, outputs of the first input circuit and the second input circuit coupled to the third circuit, and an output voltage of the third circuit.

2. 2. The power circuit of claim 1, wherein the third circuit is coupled to the first input circuit and the second input circuit via a transformer, the first input circuit and the second input circuit being on an input side of the transformer, and the third circuit being on an output side of the transformer.

3. 3. The power circuit of claim 1, wherein the first circuit, the second circuit, and the third circuit each comprise one or more semiconductors for power conversion.

4. 4. The power circuit of claim 3, wherein the control circuit is configured to optimize the output of the third circuit by adjusting gate signals applied to gate terminals of the semiconductors of the first circuit, the second circuit, and the third circuit based on the output voltages of the PV source and the energy storage source, the outputs of the first input circuit and the second input circuit coupled to the third circuit, and the output voltage of the third circuit.

5. the outputs of the first input circuit and the second input circuit are output currents of the first input circuit and the second input circuit; 5. The power circuit of claim 1, further comprising one or more current sensors for sensing the output currents of the first input circuit and the second input circuit.

6. 6. The power circuit of claim 1, wherein the control circuit is configured to optimize the output of the third circuit further based on at least one of an output current of the PV source and the energy storage source, and an input current of the third circuit.

7. the output of the third circuit is a direct current (DC) output; the power circuit further comprising a DC-to-AC inverter circuit coupled to the third circuit for converting the DC output of the third circuit to an alternating current (AC) output; 7. The power circuit of claim 1, wherein the control circuit is configured to optimize the output of the DC-AC inverter circuit based on the output voltages of the PV source and the energy storage source, the output currents of the first input circuit and the second input circuit coupled to the third circuit, the output voltage of the third circuit, the output voltage of the DC-AC inverter circuit, and the output current of the DC-AC inverter circuit.

8. the outputs of the first input circuit and the second input circuit are output voltages of the first input circuit and the second input circuit; 5. The power circuit of claim 4, further comprising one or more current estimators for estimating the output currents of the first input circuit and the second input circuit based on the output voltages of the PV source, the energy storage source, and the third circuit, and the gate signals of the semiconductors of the first circuit, the second circuit, and the third circuit.

9. the one or more semiconductors of at least one of the first circuit, the second circuit, and the third circuit are gallium nitride (GaN) gates; The power circuit according to claim 3 or any one of claims 4 to 8 dependent on claim 3, wherein the power circuit further comprises a GaN gate driver circuit for preventing the GaN gate from shoot-through, the GaN gate driver circuit comprising a level shifter circuit.

10. 10. The power circuit of claim 9, wherein the level shifter circuit comprises a Zener diode and a capacitor coupled in parallel and in series with a resistor.

11. The power circuit according to claim 2, or any one of claims 3 to 10 depending on claim 2, wherein the third circuit comprises a parallel inductor on the output side of the transformer to compensate for parasitic capacitance.

12. 1. An energy device comprising: a transparent or translucent substrate; a solar cell layer coupled to the substrate, the solar cell layer comprising a plurality of solar cells for receiving light through the substrate and converting energy of the received light into a first electrical energy; an energy storage layer coupled to the solar cell layer, the energy storage layer comprising one or more energy storage units for storing a second electrical energy; a converter layer coupled to the solar cell layer and the energy storage layer for receiving and processing electrical energy therefrom and outputting the processed energy via an output; An energy device, wherein the converter layer comprises a power circuit according to any one of claims 1 to 11, and uses the solar cell layer and the energy storage layer as the PV source and the energy storage source, respectively.

13. A thermoelectric recycling structure, a thermally conductive first component for engaging a heat source and receiving heat generated from said heat source; a second component spaced apart from the first component; and a thermally non-conductive, electron-hole transporting thermoelectric layer sandwiched between the first component and the second component for receiving the heat from the first component and converting the received heat into electrical power.

14. a light collection layer coupled to one of the first components opposite the thermoelectric layer for engaging the first component with the heat source through the light collection layer; a metasurface for collecting light; 14. The thermoelectric recycling structure of claim 13, further comprising: a light collection layer comprising: a nanowire layer coupled to the metasurface for converting the collected light into converted heat and transferring the converted heat to the thermoelectric layer.

15. The thermoelectric recycling structure of claim 13 or 14, wherein the thermoelectric layer comprises one or more thermoelectric components made of one or more two-dimensional (2D) materials.

16. 16. The thermoelectric recycling structure of claim 15, wherein the one or more 2D materials comprise a 2D perovskite.

17. 17. The thermoelectric recycling structure of claim 15 or 16, wherein the one or more thermoelectric components comprise a continuous thermoelectric sheet made of the one or more 2D materials.

18. The thermoelectric recycling structure of claim 15 or 16, wherein the thermoelectric layer comprises a plurality of thermoelectric components separated from one another.

19. 15. The thermoelectric recycling structure of claim 13 or 14, wherein the thermoelectric layer comprises a plurality of conductive nanochannels having one or more sub-wavelength dimensions thereof.

20. 20. The thermoelectric recycling structure of claim 19, wherein the thermoelectric layer has a thickness of about 10 nanometers (nm).

21. 1. An energy device comprising: a transparent or translucent substrate; a solar cell layer coupled to the substrate, the solar cell layer comprising a plurality of solar cells for receiving light through the substrate and converting energy of the received light into a first electrical energy; an energy storage layer coupled to the solar cell layer, the energy storage layer comprising one or more energy storage units for storing a second electrical energy; a converter layer coupled to the solar cell layer and the energy storage layer for receiving and processing electrical energy therefrom and outputting the processed energy via an output; and at least one of the thermoelectric recycling structures according to claims 13 to 20 coupled to at least one of the solar cell layer and the converter layer for receiving the heat generated therefrom.

22. A supercapacitor, one or more capacitor layers; a first electrical terminal and a second electrical terminal; Each capacitor layer a pair of electrically conductive thin film sublayers sandwiching an electrically insulating membrane sublayer; a conductive medium between each of the thin film sublayers and the membrane sublayer; a first conductor sublayer and a second conductor sublayer sandwiching the pair of thin film sublayers and the membrane sublayer, the first conductor sublayer being coupled to the first electrical terminal and the second conductor sublayer being coupled to the second electrical terminal.

23. 23. The supercapacitor of claim 22, wherein the thin film sublayer comprises at least one of activated carbon, graphene, and graphite.

24. 24. The supercapacitor of claim 22 or 23, wherein the conductive medium comprises at least one of an ionic liquid, a conductive ink, and a current collector.

25. 24. The supercapacitor of claim 22 or 23, wherein the conductive medium is coated onto the membrane sublayer.

26. The ionic liquid is 1-ethyl-3-methylimidazolium tetrafluoroborate (EMIMBF ４ 26. The supercapacitor of claim 25, comprising:

27. The supercapacitor of any one of claims 22 to 26, wherein the conductive thin film sublayer, the membrane sublayer, and the first and second conductor sublayers are flexible.

28. 28. The supercapacitor of any one of claims 22 to 27, wherein the conductive thin film sublayer, and the first conductor sublayer and the second conductor sublayer are coated onto the membrane sublayer using at least one of slot die coating, spray coating printing, and doctor blade.

29. 1. An energy device comprising: a transparent or translucent substrate; a solar cell layer coupled to the substrate, the solar cell layer comprising a plurality of solar cells for receiving light through the substrate and converting energy of the received light into a first electrical energy; an energy storage layer coupled to the solar cell layer, the energy storage layer comprising one or more energy storage units for storing a second electrical energy; a converter layer coupled to the solar cell layer and the energy storage layer for receiving and processing electrical energy therefrom and outputting the processed energy via an output; An energy device, wherein the energy storage layer comprises one or more supercapacitors according to any one of claims 22 to 28.

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