Signal processing circuit, acceleration sensor, and electronic device

The signal processing circuit with variable capacitors and switches simplifies failure analysis in MEMS sensor devices by enabling multiple test modes to quickly identify assembly defects and failures.

JP2025144806APending Publication Date: 2025-10-03ROHM CO LTD
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Patent Information

Application Number
JP2024044658
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-21
Publication Date
2025-10-03

AI Technical Summary

Technical Problem

Existing MEMS sensor devices face assembly defects and failures during production, which are difficult to analyze due to time-consuming and labor-intensive identification processes, and communication challenges between manufacturers complicate failure analysis.

Method used

A signal processing circuit connected to a sensor element with variable capacitors and switches, allowing for multiple test modes to easily identify failure causes by analyzing detection signals.

Benefits of technology

Facilitates rapid and efficient identification of sensor device failures by distinguishing between various fault patterns through distinct detection signals in different test modes.

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Abstract

To make it easy to identify the cause of malfunction.SOLUTION: A signal processing circuit (6), which is a signal processing circuit to be able to connect with a sensor element (5) including a first variable capacitor (C1) and a second variable capacitor (C2), comprises: a first to third terminals (T4, T5, T6); a first drive circuit (D1) for providing a first driving signal to a first end of the first variable capacitor through the first terminal; a second drive circuit (D2) for providing a second driving signal to a first end of the second variable capacitor through the third terminal; and a detection circuit (OP1, C5) that is connected to a second end of the first variable capacitor and a second end of the second variable capacitor through the second terminal for generating a detection signal according to the difference between the first variable capacitor and the second variable capacitor; a first switch (S1) arranged between the first terminal and the first drive circuit; a second switch (S2) arranged between the second terminal and the detection circuit; and a third switch (S3) arranged between the third terminal and the second drive circuit.SELECTED DRAWING: Figure 2
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Description

[Technical Field]

[0001] The present disclosure relates to a signal processing circuit, an acceleration sensor, and an electronic device. [Background technology]

[0002] In recent years, MEMS sensor elements have been manufactured using MEMS (Micro Electro Mechanical Systems) technology, which is manufactured using semiconductor manufacturing processes (see, for example, Patent Document 1). The sensor device includes a MEMS sensor element and a signal processing device connected to the MEMS sensor element. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2023-020325

[0004] [overview] Sensor device assembly defects and failures caused by damage during assembly are detected by the final test. From the perspective of production management, it is necessary to identify the cause of the detected failure. Identifying the cause of the detected failure requires analyzing the sensor device in which the failure was detected using a jig, etc., which is time-consuming and labor-intensive.

[0005] Furthermore, when the signal processing device is shipped at the wafer stage, communication between the shipper and the manufacturer that assembles the signal processing device and the MEMS sensor element to produce the sensor device occurs, which may make the analysis work even more complicated.

[0006] A signal processing circuit according to the present disclosure is connectable to a sensor element including a first variable capacitor and a second variable capacitor, the signal processing circuit comprising: a first terminal, a second terminal, a third terminal, a first drive circuit configured to supply a first drive signal to a first end of the first variable capacitor via the first terminal, a second drive circuit configured to supply a second drive signal to the first end of the second variable capacitor via the third terminal, a detection circuit connected to a second end of the first variable capacitor and a second end of the second variable capacitor via the second terminal and configured to generate a detection signal corresponding to a difference between the first variable capacitor and the second variable capacitor, a first switch provided between the first terminal and the first drive circuit, a second switch provided between the second terminal and the detection circuit, and a third switch provided between the third terminal and the second drive circuit.

[0007] An acceleration sensor according to the present disclosure includes the signal processing circuit configured as described above and the sensor element.

[0008] An electronic device according to the present disclosure includes an acceleration sensor having the above-described configuration. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram schematically illustrating a cross-sectional structure of a sensor device according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a diagram illustrating a schematic configuration of a sensor device according to an embodiment of the present disclosure. [Figure 3] FIG. 3 is a diagram showing the state of the sensor device in the first test mode. [Figure 4] FIG. 4 is a diagram showing the state of the sensor device in the second test mode. [Figure 5] FIG. 5 is a diagram showing the state of the sensor device in the third test mode. [Figure 6] FIG. 6 is a diagram showing the state of the sensor device in the fourth test mode. [Figure 7] FIG. 7 is a diagram showing the state of the sensor device in the fifth test mode. [Figure 8]FIG. 8 is a diagram showing the state of the sensor device in the sixth test mode. [Figure 9] FIG. 9 is a diagram showing the state of the sensor device in the first test mode in the cases of the first failure pattern and the second failure pattern. [Figure 10] FIG. 10 is a diagram showing the state of the sensor device in the third test mode in the cases of the first failure pattern and the second failure pattern. [Figure 11] FIG. 11 is a diagram showing the state of the sensor device in the fourth test mode in the cases of the first failure pattern and the second failure pattern. [Figure 12] FIG. 12 is a diagram showing the state of the sensor device in the second test mode in the cases of the third and fourth failure patterns. [Figure 13] FIG. 13 is a diagram showing the state of the sensor device in the third test mode in the cases of the third and fourth failure patterns. [Figure 14] FIG. 14 is a diagram showing the state of the sensor device in the fourth test mode in the cases of the third and fourth failure patterns. [Figure 15] FIG. 15 is a diagram showing the state of the sensor device in the first test mode in the cases of the fifth and sixth failure patterns. [Figure 16] FIG. 16 is a diagram showing the state of the sensor device in the second test mode in the cases of the fifth and sixth failure patterns. [Figure 17] FIG. 17 is a diagram showing the state of the sensor device in the first test mode in the case of the seventh failure pattern. [Figure 18] FIG. 18 is a diagram showing the state of the sensor device in the third test mode in the case of the seventh failure pattern. [Figure 19] FIG. 19 is a diagram showing the state of the sensor device in the fourth test mode in the case of the seventh failure pattern. [Figure 20] FIG. 20 is a diagram showing the state of the sensor device in the second test mode in the case of the eighth failure pattern. [Figure 21]FIG. 21 is a diagram showing the state of the sensor device in the third test mode in the case of the eighth failure pattern. [Figure 22] FIG. 22 is a diagram showing the state of the sensor device in the fourth test mode in the case of the eighth failure pattern. [Figure 23] FIG. 23 is a diagram showing the state of the sensor device in the first test mode in the case of the ninth failure pattern. [Figure 24] FIG. 24 is a diagram showing the state of the sensor device in the third test mode in the case of the ninth failure pattern. [Figure 25] FIG. 25 is a diagram showing the state of the sensor device in the fourth test mode in the case of the ninth failure pattern. [Figure 26] FIG. 26 is a diagram showing the state of the sensor device in the first test mode in the case of the tenth failure pattern. [Figure 27] FIG. 27 is a diagram showing the state of the sensor device in the third test mode in the case of the tenth failure pattern. [Figure 28] FIG. 28 is a diagram showing the state of the sensor device in the fourth test mode in the case of the tenth failure pattern. [Figure 29] FIG. 29 is a diagram showing the state of the sensor device in the first test mode in the case of the eleventh failure pattern. [Figure 30] FIG. 30 is a diagram showing the state of the sensor device in the second test mode in the case of the eleventh failure pattern. [Figure 31] FIG. 31 is a diagram showing the state of the sensor device in the first test mode in the case of the twelfth failure pattern. [Figure 32] FIG. 32 is a diagram showing the state of the sensor device in the third test mode in the case of the twelfth failure pattern. [Figure 33] FIG. 33 is a diagram showing the state of the sensor device in the fourth test mode in the case of the twelfth failure pattern. [Figure 34] FIG. 34 is a diagram showing the state of the sensor device in the fifth test mode in the case of the twelfth failure pattern. [Figure 35]FIG. 35 is a diagram showing the state of the sensor device in the second test mode in the case of the thirteenth failure pattern. [Figure 36] FIG. 36 is a diagram showing the state of the sensor device in the third test mode in the case of the thirteenth failure pattern. [Figure 37] FIG. 37 is a diagram showing the state of the sensor device in the fourth test mode in the case of the thirteenth failure pattern. [Figure 38] FIG. 38 is a diagram showing the state of the sensor device in the sixth test mode in the case of the thirteenth failure pattern. [Figure 39] FIG. 39 is a diagram showing the state of the sensor device in the first test mode in the case of the fourteenth failure pattern. [Figure 40] FIG. 40 is a diagram showing the state of the sensor device in the second test mode in the case of the fourteenth failure pattern. [Figure 41] FIG. 41 is a diagram showing the state of the sensor device in the third test mode in the case of the fourteenth failure pattern. [Figure 42] FIG. 42 is a diagram showing the state of the sensor device in the fourth test mode in the case of the fourteenth failure pattern. [Figure 43] FIG. 43 is a diagram showing the state of the sensor device in the fifth test mode in the case of the fourteenth failure pattern. [Figure 44] FIG. 44 is a diagram showing the state of the sensor device in the sixth test mode in the case of the fourteenth failure pattern. [Figure 45] FIG. 45 is a diagram showing the relationship between the first to fourteenth failure patterns and the detection signals. [Figure 46] FIG. 46 is a block diagram showing an example of the configuration of a smartphone.

[0010] [Detailed explanation] 1 is a diagram schematically illustrating a cross-sectional structure of a sensor device 10 according to an embodiment of the present disclosure. The sensor device 10 is an acceleration sensor device that detects acceleration. The sensor device 10 includes a substrate 1, a lid 2, a semiconductor chip 3, a resin 4, and bonding wires W1 to W3.

[0011] A part of the upper surface of the substrate 1 is covered with a lid portion 2. A sensor element 5 is provided on the part of the substrate 1 covered with the lid portion 2.

[0012] The sensor element 5 is a capacitance-type acceleration sensor element that uses MEMS (Micro Electro Mechanical System) technology. The sensor element 5 has a fixed electrode, a movable electrode, and a spring, each made of, for example, silicon. When no acceleration is applied to the sensor element 5, the distance between the fixed electrode and the movable electrode does not change. On the other hand, when acceleration is applied to the sensor element 5, the movable electrode is displaced relative to the fixed electrode, and the capacitance between the fixed electrode and the movable electrode changes. In other words, the capacitance of the sensor element 5 changes depending on the acceleration applied to the sensor element 5.

[0013] The semiconductor chip 3 is placed on the upper surface of the lid portion 2. The bonding wire W1 is a connecting wire that electrically connects the connection point (terminal) of the substrate 1 to the bonding wire W1 and the connection point (terminal) of the semiconductor chip 3 to the bonding wire W1. The bonding wire W2 is a connecting wire that electrically connects the connection point (terminal) of the substrate 1 to the bonding wire W2 and the connection point (terminal) of the semiconductor chip 3 to the bonding wire W2. The bonding wire W3 is a connecting wire that electrically connects the connection point (terminal) of the substrate 1 to the bonding wire W3 and the connection point (terminal) of the semiconductor chip 3 to the bonding wire W3.

[0014] The substrate 1, the lid portion 2, the semiconductor chip 3, and the bonding wires W1 to W3 are sealed by the resin 4 and the upper surface of the substrate 1.

[0015] 2 is a diagram showing a schematic configuration of the sensor device 10. The sensor device 10 includes a signal processing circuit 6 mounted on a semiconductor chip 3 (see FIG. 1). The signal processing circuit 6 is connected to the sensor element 5 by bonding wires W1 to W3.

[0016] The sensor element 5 includes variable capacitors C1 and C2, signal lines LN1 to LN5, and terminals T1 to T3. A first terminal of the variable capacitor C1 is connected to terminal T1 via signal line LN1. A second terminal of the variable capacitor C2 is connected to terminal T3 via signal line LN2. A second terminal of the variable capacitor C1 is connected to a first terminal of signal line LN3. A second terminal of the variable capacitor C2 is connected to a first terminal of signal line LN4. A second terminal of signal line LN3 and a second terminal of signal line LN4 are connected to terminal T2 via signal line LN5. When acceleration in a predetermined direction is applied to the sensor element 2, the variable capacitors C1 and C2 change in polarity opposite to each other. That is, when the variable capacitor C1 (the capacitance value of the variable capacitor C1) increases, the variable capacitor C2 (the capacitance value of the variable capacitor C2) decreases by the amount of increase in the variable capacitor C1. Conversely, when the variable capacitor C1 decreases, the variable capacitor C2 increases by the amount of decrease in the variable capacitor C1.

[0017] The signal processing circuit 6 includes terminals T4 to T6, switches S1 to S3, a series circuit including a capacitor C3 and a switch S4, a series circuit including a capacitor C4 and a switch S5, switches S6 and S7, drive circuits D1 and D2, a detection circuit including an operational amplifier OP1 and a capacitor C5, and a control unit CTL1.

[0018] Terminal T4 is connected to terminal T1 by bonding wire W1, terminal T5 is connected to terminal T2 by bonding wire W2, and terminal T6 is connected to terminal T3 by bonding wire W3.

[0019] The drive circuit D1 supplies a first drive signal to a first end of the variable capacitor C1 via a terminal T4. The drive circuit D1 can select, as the first drive signal, one of voltage VREF, voltage MID lower than voltage VREF, ground voltage GND lower than voltage MID, and a high impedance state.

[0020] The drive circuit D2 supplies a second drive signal to the first end of the variable capacitor C2 via a terminal T6. The drive circuit D2 can select, as the second drive signal, one of voltage VREF, voltage MID lower than voltage VREF, ground voltage GND lower than voltage MID, and a high impedance state.

[0021] A detection circuit including an operational amplifier OP1 and a capacitor C5 is connected to the second end of the variable capacitor C1 and the second end of the variable capacitor C2 via a terminal T5, and generates a detection signal OUT1 according to the difference between the variable capacitors C1 and C2.

[0022] The switch S1 is provided between the terminal T4 and the drive circuit D1. The switch S2 is provided between the terminal T5 and the detection circuit including the capacitor C4 and the switch S5. The switch S3 is provided between the terminal T6 and the drive circuit D2.

[0023] A first end of a series circuit including the capacitor C3 and the switch S4 is connected to the connection node between the switch D1 and the drive circuit D1. A second end of the series circuit including the capacitor C3 and the switch S4 is connected to the connection node between the switch S2 and the detection circuit including the operational amplifier OP1 and the capacitor C5. The arrangement of the capacitor C3 and the switch S4 may be reversed from that shown in FIG.

[0024] A first end of a series circuit including capacitor C4 and switch S5 is connected to a connection node between switch S2 and a detection circuit including operational amplifier OP1 and capacitor C5. A second end of the series circuit including capacitor C4 and switch S5 is connected to a connection node between switch S3 and drive circuit D2. The arrangement of capacitor C5 and switch S6 may be reversed from that shown in FIG.

[0025] A first terminal of switch S6 is connected to the connection node between switch S1 and drive circuit D1. A second terminal of switch S6 is connected to the connection node between switch S2 and the series circuit including capacitor C3 and switch S4. A first terminal of switch S7 is connected to the connection node between switch S2 and the series circuit including capacitor C3 and switch S4. A second terminal of switch S7 is connected to the connection node between switch S3 and drive circuit D2.

[0026] The control unit CTL1 controls the switches S1 to S7 and the drive circuits D1 and D2. The control unit CTL1 includes first to sixth test modes TM1 to TM6 and a normal mode NM1 as modes of the signal processing circuit 6.

[0027] In the normal mode NM1 (non-test mode), the control unit CTL1 turns on the switches S1 to S3 and turns off the switches S4 to S7.

[0028] 3, in the first test mode TM1, the control unit CTL1 turns on the switches S1 and S2, turns off the switch S3, turns off the switches S4 to S7, sets the first drive signal to voltage VREF, and sets the second drive signal to a high impedance state. If there is no failure in the sensor device 10, in the first test mode TM1, the detection signal OUT1 becomes a signal corresponding to the variable capacitance C1.

[0029] 4, in the second test mode TM2, the control unit CTL1 turns the switch S1 off, turns the switches S2 and S3 on, turns the switches S4 to S7 off, puts the first drive signal in a high impedance state, and sets the second drive signal to voltage VREF. If there is no failure in the sensor device 10, in the second test mode TM2, the detection signal OUT1 becomes a signal corresponding to the variable capacitor C2.

[0030] 5, in the third test mode TM3, the control unit CTL1 turns on switch S1, turns off switch S2, turns on switch S3, turns off switches S4 and S5, turns on switch D6, turns off switch S7, puts the first drive signal in a high impedance state, and sets the second drive signal to voltage VREF. If there is no failure in the sensor device 10, in the third test mode TM3, the detection signal OUT1 becomes a signal corresponding to the combined capacitance of the variable capacitors C1 and C2.

[0031] 6, in the fourth test mode TM4, the control unit CTL1 turns on switch S1, turns off switch S2, turns on switch S3, turns off switches S4 and S5, turns off switch S6, turns on switch S7, sets the first drive signal to voltage VREF, and sets the second drive signal to a high impedance state. If there is no failure in the sensor device 10, in the fourth test mode TM4, the detection signal OUT1 becomes a signal corresponding to the combined capacitance of the variable capacitors C1 and C2.

[0032] 7, in the fifth test mode TM5, the control unit CTL1 turns on switches S1 to S3, turns on switch S4, turns off switches S5 to S7, sets the first drive signal to voltage VREF, and sets the second drive signal to a high impedance state. If there is no failure in the sensor device 10, in the fifth test mode TM5, the detection signal OUT1 becomes a signal corresponding to the capacitance C3.

[0033] 8, in the sixth test mode TM6, the control unit CTL1 turns on switches S1 to S3, turns off switch S4, turns on switch S5, turns off switches S6 and S7, puts the first drive signal in a high impedance state, and sets the second drive signal to voltage VREF. If there is no failure in the sensor device 10, in the sixth test mode TM6, the detection signal OUT1 becomes a signal corresponding to the capacitance C4.

[0034] In the case of a first fault pattern PT1 in which the bonding wire W1 comes off and a second fault pattern PT2 in which the signal line LN1 or LN3 is broken, the detection signal OUT1 becomes abnormal (no detection signal OUT1 is output) in the first test mode TM1 shown in FIG. 9, the third test mode TM3 shown in FIG. 10, and the fourth test mode TM4 shown in FIG. 11.

[0035] In the case of a third fault pattern PT3 in which the bonding wire W3 comes off and a fourth fault pattern PT4 in which the signal line LN2 or LN4 is broken, the detection signal OUT1 becomes abnormal (no detection signal OUT1 is output) in the second test mode TM2 shown in FIG. 12, the third test mode TM3 shown in FIG. 13, and the fourth test mode TM4 shown in FIG. 14.

[0036] In the case of a fifth fault pattern PT5 in which the bonding wire W2 comes off and a sixth fault pattern PT6 in which the signal line LN5 is broken, the detection signal OUT1 becomes abnormal (no detection signal OUT1 is output) in the first test mode TM1 shown in Figure 15 and the second test mode TM2 shown in Figure 16.

[0037] In the case of the seventh failure pattern PT7, in which a low impedance path is formed between the first and second terminals of the variable capacitor C1, the variable capacitor C2 appears large, and the detection signal OUT1 becomes abnormal in the first test mode TM1 shown in FIG. 17, the third test mode TM3 shown in FIG. 18, and the fourth test mode TM4 shown in FIG. 19. In the first test mode TM1, the detection signal OUT1 sticks to the first drive signal. In the third test mode TM3, the detection signal OUT1 becomes large. In the fourth test mode TM4, the detection signal OUT1 is not output.

[0038] In the case of the eighth failure pattern PT8, in which a low impedance path is formed between the first and second terminals of the variable capacitor C2, the variable capacitor C1 appears large, and the detection signal OUT1 becomes abnormal in the second test mode TM2 shown in FIG. 20, the third test mode TM3 shown in FIG. 21, and the fourth test mode TM4 shown in FIG. 22. In the second test mode TM2, the detection signal OUT1 sticks to the second drive signal. In the third test mode TM3, the detection signal OUT1 is not output. In the fourth test mode TM4, the detection signal OUT1 becomes large.

[0039] In the case of the ninth fault pattern PT9 in which a low impedance path is formed between the bonding wire W1 and ground potential, the detection signal OUT1 becomes abnormal in the first test mode TM1 shown in FIG. 23, the third test mode TM3 shown in FIG. 24, and the fourth test mode TM4 shown in FIG. 25. In the first test mode TM1, the detection signal OUT1 is not output. In the third test mode TM3, the detection signal OUT1 is stuck at ground potential. In the fourth test mode TM4, the detection signal OUT1 becomes small.

[0040] In the case of a tenth fault pattern PT10 in which a low impedance path is formed between the bonding wire W3 and ground potential, the detection signal OUT1 becomes abnormal in the second test mode TM2 shown in FIG. 26, the third test mode TM3 shown in FIG. 27, and the fourth test mode TM4 shown in FIG. 28. In the second test mode TM2, the detection signal OUT1 is not output. In the third test mode TM3, the detection signal OUT1 becomes small. In the fourth test mode TM4, the detection signal OUT1 remains at ground potential.

[0041] In the case of an eleventh fault pattern PT11 in which a low impedance path is formed between the bonding wire W2 and ground potential, the detection signal OUT1 becomes abnormal (the detection signal OUT1 is stuck at ground potential) in the first test mode TM1 shown in FIG. 29 and the second test mode TM2 shown in FIG. 30.

[0042] In the case of a twelfth failure pattern PT12 in which the drive circuit D1 breaks down and the first drive signal is stuck at ground potential, the detection signal OUT1 becomes abnormal in the first test mode TM1 shown in FIG. 31, the third test mode TM3 shown in FIG. 32, the fourth test mode TM4 shown in FIG. 33, and the fifth test mode TM5 shown in FIG. 34. In the first test mode TM1, the detection signal OUT1 is not output. In the third test mode TM3, the detection signal OUT1 is stuck at ground potential. In the fourth test mode TM4, the detection signal OUT1 becomes small. In the fifth test mode TM5, the detection signal OUT1 is not output.

[0043] In the case of a thirteenth failure pattern PT13 in which the drive circuit D2 breaks down and the second drive signal is stuck at ground potential, the detection signal OUT1 becomes abnormal in the second test mode TM2 shown in FIG. 35, the third test mode TM3 shown in FIG. 36, the fourth test mode TM4 shown in FIG. 37, and the sixth test mode TM6 shown in FIG. 38. In the second test mode TM2, the detection signal OUT1 is not output. In the third test mode TM3, the detection signal OUT1 becomes small. In the fourth test mode TM4, the detection signal OUT1 is stuck at ground potential. In the sixth test mode TM6, the detection signal OUT1 is not output.

[0044] In the case of a 14th fault pattern PT14 in which the input terminal of the detection circuit including the operational amplifier OP1 and the capacitor C5 breaks down and becomes stuck at ground potential, the detection signal OUT1 becomes abnormal (the detection signal OUT1 becomes stuck at ground potential) in the first test mode TM1 shown in FIG. 39, the second test mode TM2 shown in FIG. 40, the third test mode TM3 shown in FIG. 41, the fourth test mode TM4 shown in FIG. 42, the fifth test mode TM5 shown in FIG. 43, and the sixth test mode TM6 shown in FIG. 44.

[0045] 45 is a diagram showing the relationship between the first to fourteenth failure patterns PT1 to PT14 and the detection signal OUT1. By checking the detection signal OUT1 in the test mode, the cause of the failure of the sensor device 10 can be easily identified.

[0046] By checking the detection signal OUT1 in the first test mode TM1 and the second test mode TM2, the first, second, ninth, and twelfth failure patterns PT1, PT2, PT9, and PT12 cannot be distinguished, the third, fourth, tenth, and thirteenth failure patterns PT3, PT4, PT10, and PT13 cannot be distinguished, and the eleventh and fourteenth failure patterns PT11 and PT14 cannot be distinguished, but other failure patterns can be distinguished.

[0047] By also checking the detection signal OUT1 in the third test mode TM3 and the fourth test mode TM4, the first and second failure patterns PT1, PT2 can be distinguished from the ninth and twelfth failure patterns PT9, PT12, the third and fourth failure patterns PT3, PT4 can be distinguished from the tenth and thirteenth failure patterns PT10, PT13, and the eleventh failure pattern PT11 can be distinguished from the fourteenth failure pattern PT14.

[0048] By checking the detection signal OUT1 in the fifth test mode TM5 and the sixth test mode TM6, the ninth failure pattern PT9 and the twelfth failure pattern PT12 can be distinguished, and the tenth failure pattern PT10 and the thirteenth failure pattern PT13 can be distinguished.

[0049] In other words, by checking the detection signal OUT1 in the first to sixth test modes TM1 to TM6, it is possible to distinguish between the first to fourteenth failure patterns PT1 to PT14, in addition to distinguishing between the first failure pattern PT1 and the second failure pattern PT2 and between the third failure pattern PT3 and the fourth failure pattern PT4.

[0050] <Application example> Here, an example in which the sensor device 10 is applied to a smartphone will be described. Note that a smartphone is an example of an electronic device. Naturally, the sensor device 10 may be applied to electronic devices other than smartphones. Examples of electronic devices other than smartphones include a wearable watch and a wearable camera.

[0051] 46 is a block diagram showing an example of the configuration of a smartphone 20. The smartphone 20 includes a communication unit 21, a camera unit 22, a display unit 23, an audio input / output unit 24, an acceleration sensor 25, an operation unit 26, a storage unit 27, and a control unit 28.

[0052] The communication unit 21 performs wireless communication with a base station in a mobile communication network. Using this wireless communication, it transmits and receives audio data, video data, e-mail data, etc., and receives web data, streaming data, etc.

[0053] The camera unit 22 takes electronic images using an imaging element such as a CMOS (Complementary Metal-Oxide-Semiconductor) image sensor, and can compress the captured images in, for example, JPEG (Joint Photographic Experts Group) format and store the compressed data in the memory unit 27.

[0054] The display unit 23 is, for example, a liquid crystal display device or an organic EL (Electro Luminescence) display device. The display unit 23 displays various images. The audio input / output unit 24 includes a microphone that collects input ambient audio and converts it into an electrical signal, and a speaker that converts the input audio signal into audio and outputs it to the outside.

[0055] The acceleration sensor 25 is a motion sensor that detects the movement of the person carrying the smartphone 20, and the sensor device 10 described above can be used.

[0056] The operation unit 26 includes keys arranged on the housing of the smartphone 20 for various operations such as power operation and volume operation, a touch panel arranged on the display screen of the display unit 23, and the like.

[0057] The storage unit 27 stores control programs and control data for the control unit 28, address data that associates names and telephone numbers of communication partners, sent and received e-mail data, web data downloaded by web browsing, downloaded content data, etc., and also temporarily stores streaming data, etc. The storage unit 27 is configured by, for example, a flash memory, a RAM (Random Access Memory), a ROM (Read Only Memory), etc.

[0058] The control unit 28 operates in accordance with the control program and control data stored in the storage unit 27, and controls each unit of the smartphone 20 in an integrated manner.

[0059] Such a smartphone 20 can use the detection result of the acceleration sensor 25, for example, as a pedometer.

[0060] <Other> The above-described embodiments should be considered to be illustrative in all respects and not restrictive. The technical scope of the present disclosure is indicated by the claims, not by the description of the above-described embodiments, and should be understood to include all modifications that fall within the meaning and scope equivalent to the claims.

[0061] <Additional Notes> A supplementary note will be provided for the present disclosure, the specific configuration examples of which have been shown in the above-described embodiments.

[0062] The signal processing circuit (6) of the present disclosure is a signal processing circuit connectable to a sensor element (5) including a first variable capacitance (C1) and a second variable capacitance (C2), and has a configuration (first configuration) including a first terminal (T4), a second terminal (T5), a third terminal (T6), a first driving circuit (D1) configured to supply a first driving signal to a first end of the first variable capacitance via the first terminal, a second driving circuit (D2) configured to supply a second driving signal to a first end of the second variable capacitance via the third terminal, a detection circuit (OP1, C5) connected to a second end of the first variable capacitance and a second end of the second variable capacitance via the second terminals and configured to generate a detection signal corresponding to the difference between the first variable capacitance and the second variable capacitance, a first switch (S1) provided between the first terminal and the first driving circuit, a second switch (S2) provided between the second terminal and the detection circuit, and a third switch (S3) provided between the third terminal and the second driving circuit.

[0063] According to the signal processing circuit of the first configuration, it is possible to set test modes equivalent to the first test mode TM1 and the second test mode TM2 described above, making it easier to identify the cause of a failure.

[0064] The signal processing circuit of the first configuration may be configured (second configuration) to include a first series circuit having a first end connected to a connection node between the first switch and the first drive circuit and a second end connected to a connection node between the second switch and the detection circuit, and a second series circuit having a first end connected to a connection node between the second switch and the detection circuit and a second end connected to a connection node between the third switch and the second drive circuit, wherein the first series circuit is a series circuit including a fourth switch (S4) and a first capacitance (C3), and the second series circuit is a series circuit including a fifth switch (S5) and a second capacitance (C4).

[0065] According to the signal processing circuit of the second configuration, it is also possible to set test modes equivalent to the third test mode T31 and the fourth test mode TM4, respectively, making it even easier to identify the cause of a failure.

[0066] In the signal processing circuit of the first or second configuration, a configuration (third configuration) may be provided which includes a sixth switch (S6) having a first end connected to the connection node between the first switch and the first drive circuit and a second end connected to the connection node between the second switch and the detection circuit, and a seventh switch (S7) having a first end connected to the connection node between the second switch and the detection circuit and a second end connected to the connection node between the third switch and the second drive circuit.

[0067] According to the signal processing circuit of the second configuration, it is also possible to set test modes equivalent to the fifth test mode TM5 and the sixth test mode TM6 described above, making it even easier to identify the cause of a failure.

[0068] In the signal processing circuit of any of the above first to third configurations, the first drive circuit may be configured to be able to select, as the first drive signal, one of a first voltage, a second voltage lower than the first voltage, a third voltage lower than the second voltage, or a high-impedance state, and the second drive circuit may be configured to be able to select, as the second drive signal, one of the first voltage, the second voltage, the third voltage, or the high-impedance state (fourth configuration).

[0069] An acceleration sensor (10) of the present disclosure has a configuration (fifth configuration) including the signal processing circuit of any one of the first to fourth configurations and the sensor element.

[0070] The electronic device (20) of the present disclosure has a configuration (sixth configuration) including the acceleration sensor of the fifth configuration. [Explanation of symbols]

[0071] 1 board 2 Lid 3. Semiconductor chips 4. Resin 5 Sensor element 6. Signal Processing Circuit 10 Sensor device 20. Smartphone 21 Communications Department 22 Camera Department 23 Display section 24 Audio input / output section 25 Accelerometer 26 Control section 27 Memory section 28 Control Unit C1, C2 variable capacitance C3~C5 capacity CTL1 control unit D1, D2 drive circuit LN1~LN5 Signal line OP1 operational amplifier S1~S7 switches T1~T6 terminals W1~W3 Bonding wire

Claims

1. A signal processing circuit connectable to a sensor element including a first variable capacitor and a second variable capacitor, A first terminal; A second terminal; A third terminal; a first drive circuit configured to supply a first drive signal to a first end of the first variable capacitor via the first terminal; a second drive circuit configured to supply a second drive signal to a first end of the second variable capacitor via the third terminal; a detection circuit connected to the second end of the first variable capacitance and the second end of the second variable capacitance via the second terminal, and configured to generate a detection signal according to a difference between the first variable capacitance and the second variable capacitance; a first switch provided between the first terminal and the first drive circuit; a second switch provided between the second terminal and the detection circuit; a third switch provided between the third terminal and the second drive circuit; A signal processing circuit comprising:

2. a first series circuit having a first end connected to a connection node between the first switch and the first drive circuit and a second end connected to a connection node between the second switch and the detection circuit; a second series circuit having a first end connected to a connection node between the second switch and the detection circuit and a second end connected to a connection node between the third switch and the second drive circuit; Equipped with the first series circuit is a series circuit including a fourth switch and a first capacitor, 2. The signal processing circuit according to claim 1, wherein the second series circuit is a series circuit including a fifth switch and a second capacitor.

3. a sixth switch having a first end connected to a connection node between the first switch and the first drive circuit and a second end connected to a connection node between the second switch and the detection circuit; a seventh switch having a first end connected to a connection node between the second switch and the detection circuit and a second end connected to a connection node between the third switch and the second drive circuit; The signal processing circuit of claim 1 , comprising:

4. the first drive circuit is configured to be able to select, as the first drive signal, any one of a first voltage, a second voltage lower than the first voltage, a third voltage lower than the second voltage, and a high impedance state; 2. The signal processing circuit according to claim 1, wherein the second drive circuit is configured to be able to select, as the second drive signal, any one of the first voltage, the second voltage, the third voltage, and the high impedance state.

5. An acceleration sensor comprising: the signal processing circuit according to any one of claims 1 to 4; and the sensor element.

6. An electronic device comprising the acceleration sensor according to claim 5 .

Citation Information

Patent Citations

  • MEMS sensor

    JP2023020325A