Semiconductor device and manufacturing method thereof

The semiconductor device addresses mounting reliability issues by incorporating leads with curved connecting surfaces and a specific manufacturing process, effectively distributing stress and enhancing structural integrity.

JP2025145847APending Publication Date: 2025-10-03ROHM CO LTD
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Patent Information

Application Number
JP2024046305
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-22
Publication Date
2025-10-03

AI Technical Summary

Technical Problem

Semiconductor devices with QFN packages experience reduced mounting reliability at corners due to stress concentration from differing linear expansion coefficients, particularly in wettable flank packages where overlapping recesses at corners exacerbate the issue.

Method used

A semiconductor device design featuring conductive members with leads that include a first back surface, a second back surface closer to the first side, and a connecting surface that is a curved surface, along with a manufacturing process involving element bonding, resin forming, groove forming, and cutting to enhance structural integrity.

Benefits of technology

Improves mounting reliability by distributing stress more evenly, reducing the concentration at corners and enhancing the structural integrity of the semiconductor device when mounted on a wiring board.

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Abstract

To provide a semiconductor device capable of improving the mounting reliability when mounted on a wiring board.SOLUTION: A semiconductor device A10 includes a semiconductor element 3 facing in the thickness direction z and having an element main surface 305 on which electrodes 33 are arranged, a conductive member 1 electrically connected to the semiconductor element 3, and a sealing resin 4 having a resin top surface 41 facing a first side z1 in the thickness direction z and a resin bottom surface 42 facing a second side z2 in the thickness direction z, and covering a portion of the conductive member 1 and the semiconductor element 3. The conductive member 1 includes a lead 25 located at a corner of the sealing resin 4 as viewed in the thickness direction z. The lead 25 includes a back surface 252 facing the second side z2 in the thickness direction z, a displaceable back surface 255 facing the second side z2 in the thickness direction z and positioned closer to the first side z1 in the thickness direction z than the back surface 252, and a connecting surface 256 connecting the back surface 252 and the displaceable back surface 255. The connecting surface 256 is curved as viewed in the thickness direction z.SELECTED DRAWING: Figure 14
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Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]

[0002] Various configurations have been proposed for semiconductor devices including semiconductor elements. Patent Document 1 discloses an example of an electronic device in a QFN (Quad Flat Non-Lead Package) package. The electronic device disclosed in this document includes multiple leads, an electronic component, and a resin member. The electronic component is supported by the multiple leads. The resin member covers a portion of each lead and the electronic component. The electronic device disclosed in this document is a so-called wettable flank package, and each lead has a recess that is recessed from the back surface and connects to the end face. When the electronic device is mounted on a wiring board via solder, a solder fillet is formed in the recess, increasing joint strength and facilitating visual inspection.

[0003] On the other hand, when a semiconductor device (referred to as an electronic device in the patent document) is mounted on a wiring board via solder, the leads arranged at each corner have lower mounting reliability than other leads because stress due to differences in linear expansion coefficients is concentrated on the solder joined to the backside.When the semiconductor device is a wettable flank package, stress is particularly concentrated at the corners where two recesses of the leads arranged at each corner overlap. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2023-42910

[0005] [overview] The present disclosure has been made in light of the above circumstances, and a main object of the present disclosure is to provide a semiconductor device that can improve the mounting reliability when mounted on a wiring board.

[0006] A semiconductor device provided by a first aspect of the present disclosure comprises: a semiconductor element facing a thickness direction and having an element main surface on which electrodes are arranged; a conductive member electrically connected to the semiconductor element; and a sealing resin having a resin top surface facing a first side in the thickness direction and a resin bottom surface facing a second side in the thickness direction, and covering a portion of the conductive member and the semiconductor element, wherein the conductive member includes a first lead located at a corner of the sealing resin when viewed in the thickness direction, and the first lead has a first back surface facing the second side in the thickness direction, a second back surface facing the second side in the thickness direction and located closer to the first side in the thickness direction than the first back surface, and a connecting surface connecting the first back surface and the second back surface, and the connecting surface is a curved surface when viewed in the thickness direction.

[0007] A manufacturing method of a semiconductor device provided by a second aspect of the present disclosure includes an element bonding process for bonding a semiconductor element to a main surface of a lead frame facing a first side in the thickness direction of the lead frame; a resin forming process for forming an encapsulating resin that covers a portion of the lead frame and the semiconductor element; a groove forming process for forming a groove that is recessed from a back surface of the lead frame facing a second side in the thickness direction of the lead frame to halfway through the thickness direction of the lead frame; and a cutting process for removing the lead frame and the encapsulating resin throughout the thickness direction along the groove in a removal area that is narrower than the groove as viewed in the thickness direction and whose entire width overlaps the groove, wherein the groove includes a first groove extending in a first direction perpendicular to the thickness direction, a second groove extending in a second direction perpendicular to the thickness direction and the first direction, and a connecting surface that is connected to the first groove and the second groove at a position where the first groove and the second groove intersect and that is a curved surface as viewed in the thickness direction.

[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0009] [Figure 1]FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a plan view (through a sealing resin) showing the semiconductor device according to the first embodiment of the present disclosure. [Figure 3] FIG. 3 is a plan view (with the sealing resin and semiconductor element transparent) showing the semiconductor device according to the first embodiment of the present disclosure. [Figure 4] FIG. 4 is a bottom view showing the semiconductor device according to the first embodiment of the present disclosure. [Figure 5] FIG. 5 is a front view showing the semiconductor device according to the first embodiment of the present disclosure. [Figure 6] FIG. 6 is a rear view showing the semiconductor device according to the first embodiment of the present disclosure. [Figure 7] FIG. 7 is a right side view showing the semiconductor device according to the first embodiment of the present disclosure. [Figure 8] FIG. 8 is a left side view showing the semiconductor device according to the first embodiment of the present disclosure. [Figure 9] FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. [Figure 10] FIG. 10 is a cross-sectional view taken along line XX in FIG. [Figure 11] FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. [Figure 12] FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. [Figure 13] FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. [Figure 14] FIG. 14 is a partially enlarged perspective view showing the semiconductor device according to the first embodiment of the present disclosure. [Figure 15] FIG. 15 is a bottom view showing a process according to the method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. [Figure 16] FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. [Figure 17] FIG. 17 is a bottom view showing a process according to the method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. [Figure 18]FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. [Figure 19] FIG. 19 is a bottom view showing a semiconductor device according to a first modification of the first embodiment. [Figure 20] FIG. 20 is a partially enlarged perspective view showing a semiconductor device according to a first modification of the first embodiment. [Figure 21] FIG. 21 is a bottom view showing a semiconductor device according to a second modification of the first embodiment. [Figure 22] FIG. 22 is a partially enlarged perspective view showing a semiconductor device according to a second modification of the first embodiment. [Figure 23] FIG. 23 is a front view showing a semiconductor device according to a third modification of the first embodiment. [Figure 24] FIG. 24 is a plan view (through a sealing resin) showing a semiconductor device according to a second embodiment of the present disclosure. [Figure 25] FIG. 25 is a bottom view showing the semiconductor device according to the second embodiment of the present disclosure. [Figure 26] FIG. 26 is a cross-sectional view taken along line XXVI-XXVI in FIG. [Figure 27] FIG. 27 is a plan view (through the sealing resin) showing a semiconductor device according to a first modified example of the second embodiment.

[0010] [Detailed explanation] The details of the present disclosure will be described with reference to the accompanying drawings.

[0011] Terms such as "first," "second," and "third" in this disclosure are used merely as labels and are not necessarily intended to dictate any ordering of their objects.

[0012] In this disclosure, unless otherwise specified, the terms "a certain object A is formed on an object B" and "a certain object A is formed on an object B" include "a certain object A is formed directly on an object B" and "a certain object A is formed on an object B with another object interposed between the objects A and B." Similarly, the terms "a certain object A is disposed on an object B" and "a certain object A is disposed on an object B" include "a certain object A is disposed directly on an object B" and "a certain object A is disposed on an object B with another object interposed between the objects A and B," unless otherwise specified. Similarly, the term "a certain object A is located on an object B" includes "a certain object A is located on an object B in contact with the object B" and "a certain object A is located on an object B with another object interposed between the objects A and B," unless otherwise specified. Furthermore, unless otherwise specified, the phrase "an object A overlaps an object B when viewed in a certain direction" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B." Furthermore, in this disclosure, "a surface A faces (one side or the other side of) direction B" is not limited to the case where the angle of surface A with respect to direction B is 90°, but also includes the case where surface A is tilted with respect to direction B.

[0013] First Embodiment A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 14. The semiconductor device A10 of this embodiment includes a conductive member 1, a semiconductor element 3, and a sealing resin 4. As shown in FIG. 1, the semiconductor device A10 is packaged in a QFN (Quad Flat Non-Lead Package). The specific configuration of the semiconductor element 3 is not particularly limited. In this embodiment, the semiconductor element 3 is, for example, a flip-chip LSI (Large Scale Integration) having a switching circuit 321 and a control circuit 322 (each of which will be described in detail later) configured therein. In the semiconductor device A10, DC power (voltage) is converted into AC power (voltage) by the switching circuit 321. The semiconductor device A10 is used, for example, as one element constituting a circuit of a DC / DC converter. The functions and uses of the semiconductor device A10 are not limited.

[0014] FIG. 1 is a perspective view showing the semiconductor device A10. FIG. 2 is a plan view showing the semiconductor device A10. FIG. 3 is a plan view showing the semiconductor device A10. FIG. 4 is a bottom view showing the semiconductor device A10. FIG. 5 is a front view showing the semiconductor device A10. FIG. 6 is a rear view showing the semiconductor device A10. FIG. 7 is a right side view showing the semiconductor device A10. FIG. 8 is a left side view showing the semiconductor device A10. FIG. 9 is a cross-sectional view of FIG. 3 taken along line IX-IX in FIG. 3. FIG. 10 is a cross-sectional view of FIG. 3 taken along line XX in FIG. 3. FIG. 11 is a cross-sectional view of FIG. 3 taken along line XI-XI in FIG. 3. FIG. 12 is a cross-sectional view of FIG. 3 taken along line XII-XII in FIG. 3. FIG. 13 is a cross-sectional view of FIG. 3 taken along line XIII-XIII in FIG. 2. For ease of understanding, FIG. 2 shows the sealing resin 4 transparently. For ease of understanding, FIG. 3 shows the semiconductor element 3 and the sealing resin 4 transparently. In these figures, the semiconductor element 3 and the sealing resin 4 are shown by imaginary lines (two-dot chain lines). Fig. 14 is a partially enlarged perspective view showing the semiconductor device A10.

[0015] The semiconductor device A10 has a rectangular shape when viewed in the thickness direction (plan view). For ease of explanation, the thickness direction (plan view) of the semiconductor device A10 is referred to as the thickness direction z, the direction along one side of the semiconductor device A10 perpendicular to the thickness direction z (the left-right direction in FIGS. 2 and 3) is referred to as the first direction x, and the direction perpendicular to the thickness direction z and the first direction x (the up-down direction in FIGS. 2 and 3) is referred to as the second direction y. Furthermore, one side of the thickness direction z (the upper side in FIGS. 5 to 8) is referred to as the first side z1, and the other side (the lower side in FIGS. 5 to 8) is referred to as the second side z2. One side of the first direction x (the right side in FIGS. 2 and 3) is referred to as the first side x1, and the other side (the left side in FIGS. 2 and 3) is referred to as the second side x2. One side of the second direction y (the upper side in FIGS. 2 and 3) is referred to as the first side y1, and the other side (the lower side in FIGS. 2 and 3) is referred to as the second side y2. The dimensions of the semiconductor device A10 are not limited.

[0016] 2, the conductive member 1 includes a plurality of leads 11, 12, 13, 14, a lead 15, a lead 16, a pair of leads 17, a lead 18, a plurality of leads 19, a lead 20, a plurality of leads 21, a lead 22, a lead 23, and a plurality of leads 25. The conductive member 1 supports the semiconductor element 3 and serves as a terminal for mounting the semiconductor device A10 on a wiring board. The plurality of leads 11 to 14, the lead 15, the lead 16, the pair of leads 17, the lead 18, the plurality of leads 19, the lead 20, the plurality of leads 21, the lead 22, the lead 23, and the plurality of leads 25 are all formed from the same lead frame. The lead frame is made of, for example, copper or a copper alloy. As shown in Figures 2 to 4 and Figures 9 to 13, each of the multiple leads 11 to 14, lead 15, lead 16, a pair of leads 17, lead 18, multiple leads 19, lead 20, multiple leads 21, lead 22, lead 23 and multiple leads 25 is partially covered with sealing resin 4.

[0017] As shown in FIGS. 3 and 4, the multiple leads 11, 12, 13, and 14 are arranged on a first side x1 in the first direction x and a second side x2 in the first direction x in the semiconductor device A10. In this embodiment, two (a pair of) leads 11, 12 are arranged on the first side x1 in the first direction x, and the other two (a pair of) leads 13, 14 are arranged on the second side x2 in the first direction x. In this embodiment, the multiple leads 11 to 14 each extend approximately in the first direction x. The pair of leads 11, 12 located on the first side x1 in the first direction x are arranged spaced apart in the second direction y. Furthermore, the pair of leads 13, 14 located on the second side x2 in the first direction x are arranged spaced apart in the second direction y. Each of the multiple leads 11 to 14 outputs AC power (voltage) converted by a switching circuit 321 configured in the semiconductor element 3.

[0018] 3, 4, and 9, each of the multiple leads 11, 12, 13, and 14 has a main surface 111, a back surface 112, a back surface 113, a concave surface 114, an end surface 115, a displaced back surface 116, and a connecting surface 117. The main surface 111 faces a first side z1 in the thickness direction z and faces the semiconductor element 3. The main surface 111 is covered with a sealing resin 4. The semiconductor element 3 is supported by the main surface 111.

[0019] The back surface 112, the back surface 113, and the concave surface 114 face the side opposite to the main surface 111 (the second side z2 in the thickness direction z). The back surfaces 112 and 113 are located apart in the first direction x with the concave surface 114 in between, and are exposed from the sealing resin 4. The concave surface 114 is located closer to the first side z1 in the thickness direction z than the back surfaces 112 and 113, and is located closer to the main surface 111 than the back surfaces 112 and 113. The concave surface 114 is covered with the sealing resin 4. The end surface 115 is connected to the main surface 111, and faces the first side x1 in the first direction x or the second side x2 in the first direction x. The end surface 115 is exposed from the sealing resin 4.

[0020] The displaceable back surface 116 faces the opposite side to the main surface 111 (the second side z2 in the thickness direction z). The displaceable back surface 116 is located closer to the first side z1 in the thickness direction z than the back surface 112 and closer to the main surface 111 than the back surface 112. The displaceable back surface 116 is connected to the end surface 115 and exposed from the sealing resin 4. The connecting surface 117 is connected to the back surface 112 and the displaceable back surface 116 and exposed from the sealing resin 4. In this embodiment, the connecting surface 117 is approximately perpendicular to the back surface 112. As shown in FIG. 4 , the lead 14 has two back surfaces 112, two end surfaces 115, two displaceable back surfaces 116, and two connecting surfaces 117. The back surface 112, end surface 115, displaceable back surface 116, and connecting surface 117 on one side are spaced apart from the back surface 112, end surface 115, displaceable back surface 116, and connecting surface 117 on the other side in the second direction y.

[0021] In each of the plurality of leads 11 to 14, the rear surface 112, rear surface 113, displaceable rear surface 116, and connecting surface 117 exposed from the sealing resin 4 are plated with, for example, tin. Note that instead of tin plating, a plurality of metal platings, for example, nickel, palladium, and gold laminated in this order, may be used. Furthermore, the main surface 111 on which the semiconductor element 3 is supported may be plated with, for example, silver.

[0022] 3 and 4, the lead 15 extends in the first direction x. In this embodiment, the lead 15 is located at the middle of the semiconductor device A10 in the second direction y. The lead 15 is an input terminal to which DC power (voltage) to be converted into power is input in the semiconductor device A10. The lead 15 is a positive terminal (P terminal).

[0023] 11 , lead 15 has a main surface 151, a back surface 152, a back surface 153, a concave surface 154, an end surface 155, an end surface 156, a displaced back surface 157, a displaced back surface 158, a connecting surface 159, and a connecting surface 150. Main surface 151 faces the same side as main surfaces 111 of leads 11 to 14 in the thickness direction z, and faces the semiconductor element 3. Main surface 151 is covered with sealing resin 4. The semiconductor element 3 is supported by main surface 151.

[0024] The back surface 152, the back surface 153, and the concave surface 154 face the side opposite to the main surface 151 (the second side z2 in the thickness direction z). The back surface 152 and the back surface 153 are located apart in the first direction x with the concave surface 154 sandwiched therebetween and are exposed from the sealing resin 4. The back surface 152 is located on the second side x2 in the first direction x, and the back surface 153 is located on the first side x1 in the first direction x. The concave surface 154 is located closer to the first side z1 in the thickness direction z than the back surfaces 152 and 153, and is located closer to the main surface 151 than the back surfaces 152 and 153. The concave surface 154 is covered with the sealing resin 4. The end surface 155 is connected to the main surface 151 and faces the second side x2 in the first direction x. The end surface 156 is connected to the main surface 151 and faces the first side x1 in the first direction x. The end surface 155 and the end surface 156 are exposed from the sealing resin 4 .

[0025] The displaceable back surfaces 157, 158 face the side opposite to the main surface 111 (the second side z2 in the thickness direction z). The displaceable back surfaces 157, 158 are located closer to the first side z1 in the thickness direction z than the back surfaces 152, 153, and closer to the main surface 151 than the back surfaces 152, 153. The displaceable back surface 157 is connected to the end surface 155 and exposed from the sealing resin 4. The displaceable back surface 158 is connected to the end surface 156 and exposed from the sealing resin 4. The connecting surface 159 is connected to the back surface 152 and the displaceable back surface 157 and exposed from the sealing resin 4. In this embodiment, the connecting surface 159 is approximately perpendicular to the back surface 152. The connecting surface 150 is connected to the back surface 153 and the displaceable back surface 158 and exposed from the sealing resin 4. In this embodiment, the connecting surface 150 is approximately perpendicular to the back surface 153.

[0026] In lead 15, back surface 152, back surface 153, displaceable back surface 157, displaceable back surface 158, connecting surface 159, and connecting surface 150 exposed from sealing resin 4 are plated with, for example, tin. Note that instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold laminated in this order, may be used. Furthermore, main surface 151 on which semiconductor element 3 is supported may be plated with, for example, silver.

[0027] 3 and 4, the lead 16 extends in the first direction x. In this embodiment, the lead 16 is located at the middle of the semiconductor device A10 in the second direction y. The lead 16 is an input terminal to which DC power (voltage) to be converted into power is input in the semiconductor device A10. The lead 16 is a negative electrode (N terminal).

[0028] 10 , lead 16 has a main surface 161, a back surface 162, an end surface 163, an end surface 164, a displaceable back surface 165, a displaceable back surface 166, a connecting surface 167, and a connecting surface 168. Main surface 161 faces the same side as main surfaces 111 of leads 11 to 14 in the thickness direction z, and faces the semiconductor element 3. Main surface 161 is covered with sealing resin 4. The semiconductor element 3 is supported by main surface 161.

[0029] The back surface 162 faces the opposite side to the main surface 161 (the second side z2 in the thickness direction z). The back surface 162 is exposed from the sealing resin 4. In this embodiment, the main surface 161 and the back surface 162 are arranged over the entire length of the semiconductor device A10 in the first direction x. The end surface 163 is connected to the main surface 161 and faces the second side x2 in the first direction x. The end surface 164 is connected to the main surface 161 and faces the first side x1 in the first direction x. The end surfaces 163 and 164 are exposed from the sealing resin 4.

[0030] The displaceable back surfaces 165, 166 face the side opposite to the main surface 161 (the second side z2 in the thickness direction z). The displaceable back surfaces 165, 166 are located closer to the first side z1 in the thickness direction z than the back surface 162, and closer to the main surface 161 than the back surface 162. The displaceable back surface 165 is connected to the end surface 163 and exposed from the sealing resin 4. The displaceable back surface 166 is connected to the end surface 164 and exposed from the sealing resin 4. The connecting surface 167 is connected to the back surface 162 and the displaceable back surface 165 and exposed from the sealing resin 4. In this embodiment, the connecting surface 167 is approximately perpendicular to the back surface 162. The connecting surface 168 is connected to the back surface 162 and the displaceable back surface 166 and exposed from the sealing resin 4. In this embodiment, the connecting surface 168 is approximately perpendicular to the back surface 162.

[0031] In the lead 16, the back surface 162, the displaceable back surface 165, the displaceable back surface 166, the connecting surface 167, and the connecting surface 168 exposed from the sealing resin 4 are plated with, for example, tin. Note that instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold laminated in this order, may be used. Furthermore, the main surface 161 on which the semiconductor element 3 is supported may be plated with, for example, silver.

[0032] 3 and 4, the pair of leads 17 are disposed at the middle of the semiconductor device A10 in the first direction x. Each of the pair of leads 17 extends in the second direction y. One lead 17 is located on a first side y1 in the second direction y, and the other lead 17 is located on a second side y2 in the second direction y. Each of the pair of leads 17 receives, for example, power (voltage) for driving the control circuit 322 or an electrical signal to be transmitted to the control circuit 322.

[0033] 12, each of the pair of leads 17 has a main surface 171, a back surface 172, an end surface 173, a displaced back surface 174, and a connecting surface 175. The main surface 171 faces the same side as the main surfaces 111 of the leads 11 to 14 in the thickness direction z, and faces the semiconductor element 3. The main surface 171 is covered with a sealing resin 4. The semiconductor element 3 is supported by the main surface 171.

[0034] The back surface 172 faces the opposite side to the main surface 171 (the second side z2 in the thickness direction z). The back surface 172 is exposed from the sealing resin 4. The end surface 173 is connected to the main surface 171 and faces the second direction y. More specifically, the end surface 173 of one lead 17 faces the first side y1 in the second direction y, and the end surface 173 of the other lead 17 faces the second side y2 in the second direction y. The end surfaces 173 are exposed from the sealing resin 4.

[0035] The displaceable back surface 174 faces the opposite side to the main surface 171 (the second side z2 in the thickness direction z). The displaceable back surface 174 is located closer to the first side z1 in the thickness direction z than the back surface 172, and closer to the main surface 171 than the back surface 172. The displaceable back surface 174 is connected to the end surface 173 and exposed from the sealing resin 4. The connecting surface 175 is connected to the back surface 172 and the displaceable back surface 174 and exposed from the sealing resin 4. In this embodiment, the connecting surface 175 is approximately perpendicular to the back surface 172.

[0036] In each of the pair of leads 17, the back surface 172 exposed from the sealing resin 4, the displaced back surface 174, and the connecting surface 175 are plated with, for example, tin. Note that instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold laminated in this order, may be used. Furthermore, the main surface 171 on which the semiconductor element 3 is supported may be plated with, for example, silver.

[0037] As shown in FIGS. 3 and 4, the multiple leads 19 are arranged on a second side y2 in the second direction y in the semiconductor device A10. The multiple leads 19 are arranged at intervals from one another in the first direction x. An electrical signal is input to each of the multiple leads 19 to be transmitted to, for example, the control circuit 322. As shown in FIGS. 3, 4, and 13, each of the multiple leads 19 has a main surface 191, a back surface 192, an end surface 193, a displaceable back surface 194, and a connecting surface 195. The main surface 191 faces the same side as the main surfaces 111 of the leads 11 to 14 in the thickness direction z and faces the semiconductor element 3. The main surface 191 is covered with the sealing resin 4. The semiconductor element 3 is supported by the main surface 191. The back surface 192 faces the opposite side to the main surface 191 (the second side z2 in the thickness direction z). The back surface 192 is exposed from the sealing resin 4. The end surface 193 is connected to the main surface 191 and faces the second side y2 in the second direction y. The end surface 193 is exposed from the sealing resin 4.

[0038] The displaceable back surface 194 faces the opposite side to the main surface 191 (the second side z2 in the thickness direction z). The displaceable back surface 194 is located closer to the first side z1 in the thickness direction z than the back surface 192, and closer to the main surface 191 than the back surface 192. The displaceable back surface 194 is connected to the end surface 193 and exposed from the sealing resin 4. The connecting surface 195 is connected to the back surface 192 and the displaceable back surface 194 and exposed from the sealing resin 4. In this embodiment, the connecting surface 195 is approximately perpendicular to the back surface 192.

[0039] In each of the plurality of leads 19, a back surface 192 exposed from the sealing resin 4, a displaced back surface 194, and a connecting surface 195 are plated with, for example, tin. Note that instead of tin plating, a plurality of metal platings, for example, nickel, palladium, and gold laminated in this order, may be used. Furthermore, the main surface 191 on which the semiconductor element 3 is supported may be plated with, for example, silver.

[0040] As shown in FIGS. 3 and 4, the lead 20 is disposed on the second side x2 in the first direction x of the semiconductor device A10. The lead 20 is disposed in the second direction y, closer to the first side y1 in the second direction y. An electrical signal is input to the lead 20 to be transmitted to, for example, the control circuit 322. The lead 20 has a main surface 201, a back surface 202, an end surface 203, a displaceable back surface 204, and a connecting surface 205. The main surface 201 faces the same side as the main surfaces 111 of the leads 11 to 14 in the thickness direction z and faces the semiconductor element 3. The main surface 201 is covered with the sealing resin 4. The semiconductor element 3 is supported by the main surface 201. The back surface 202 faces the opposite side to the main surface 201 (the second side z2 in the thickness direction z). The back surface 202 is exposed from the sealing resin 4. The end surface 203 is connected to the main surface 201 and faces the second side x2 in the first direction x. The end surface 203 is exposed from the sealing resin 4.

[0041] The displaceable back surface 204 faces the opposite side to the main surface 201 (second side z2 in the thickness direction z). The displaceable back surface 204 is located closer to the first side z1 in the thickness direction z than the back surface 202, and closer to the main surface 201 than the back surface 202. The displaceable back surface 204 is connected to the end surface 203 and exposed from the sealing resin 4. The connecting surface 205 is connected to the back surface 202 and the displaceable back surface 204 and exposed from the sealing resin 4. In this embodiment, the connecting surface 205 is approximately perpendicular to the back surface 202.

[0042] In the lead 20, the back surface 202 exposed from the sealing resin 4, the displaced back surface 204, and the connecting surface 205 are plated with, for example, tin. Note that instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold laminated in this order, may be used. Furthermore, the main surface 201 on which the semiconductor element 3 is supported may be plated with, for example, silver.

[0043] As shown in FIGS. 3 and 4, the multiple leads 21 are arranged on a first side y1 in the second direction y in the semiconductor device A10. The multiple leads 21 are arranged at intervals from one another in the first direction x. An electrical signal is input to each of the multiple leads 21 to transmit to, for example, a control circuit 322. As shown in FIGS. 3, 4, and 13, each of the multiple leads 21 has a main surface 211, a back surface 212, an end surface 213, a displaceable back surface 214, and a connecting surface 215. The main surface 211 faces the same side as the main surfaces 111 of the leads 11 to 14 in the thickness direction z and faces the semiconductor element 3. The main surface 211 is covered with a sealing resin 4. The semiconductor element 3 is supported by the main surface 211. The back surface 212 faces the opposite side to the main surface 211 (the second side z2 in the thickness direction z). The back surface 212 is exposed from the sealing resin 4. The end surface 213 is connected to the main surface 211 and faces the first side y1 in the second direction y. The end surface 213 is exposed from the sealing resin 4.

[0044] The displaceable back surface 214 faces the opposite side to the main surface 211 (the second side z2 in the thickness direction z). The displaceable back surface 214 is located closer to the first side z1 in the thickness direction z than the back surface 212, and is located closer to the main surface 211 than the back surface 212. The displaceable back surface 214 is connected to the end surface 213 and exposed from the sealing resin 4. The connecting surface 215 is connected to the back surface 212 and the displaceable back surface 214 and is exposed from the sealing resin 4. In this embodiment, the connecting surface 215 is approximately perpendicular to the back surface 212.

[0045] In each of the plurality of leads 21, the back surface 212 exposed from the sealing resin 4, the displaceable back surface 214, and the connecting surface 215 are plated with, for example, tin. Note that instead of tin plating, a plurality of metal platings, for example, nickel, palladium, and gold laminated in this order, may be used. Furthermore, the main surface 211 on which the semiconductor element 3 is supported may be plated with, for example, silver.

[0046] As shown in FIGS. 3 and 4, the lead 22 is arranged on a first side y1 in the second direction y in the semiconductor device A10. The lead 22 is also arranged in the first direction x, closer to the first side x1 in the first direction x. An electrical signal is input to the lead 22 to be transmitted to, for example, a control circuit 322. The lead 22 has a main surface 221, a back surface 222, an end surface 223, a displaceable back surface 224, and a connecting surface 225. The main surface 221 faces the same side as the main surfaces 111 of the leads 11 to 14 in the thickness direction z and faces the semiconductor element 3. The main surface 221 is covered with a sealing resin 4. The semiconductor element 3 is supported by the main surface 221. The back surface 222 faces the opposite side to the main surface 221 (the second side z2 in the thickness direction z). The back surface 222 is exposed from the sealing resin 4. The end surface 223 is connected to the main surface 221 and faces the first side y1 in the second direction y. The end surface 223 is exposed from the sealing resin 4.

[0047] The displaceable back surface 224 faces the opposite side to the main surface 221 (the second side z2 in the thickness direction z). The displaceable back surface 224 is located closer to the first side z1 in the thickness direction z than the back surface 222, and is located closer to the main surface 221 than the back surface 222. The displaceable back surface 224 is connected to the end surface 223 and exposed from the sealing resin 4. The connecting surface 225 is connected to the back surface 222 and the displaceable back surface 224 and is exposed from the sealing resin 4. In this embodiment, the connecting surface 225 is approximately perpendicular to the back surface 222.

[0048] In the lead 22, the back surface 222 exposed from the sealing resin 4, the displaced back surface 224, and the connecting surface 225 are plated with, for example, tin. Note that instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold laminated in this order, may be used. Furthermore, the main surface 221 on which the semiconductor element 3 is supported may be plated with, for example, silver.

[0049] As shown in FIGS. 3 and 4, the lead 23 is arranged on a first side x1 in the first direction x in the semiconductor device A10. The lead 23 is also arranged in the second direction y, closer to the first side y1 in the second direction y. An electrical signal is input to the lead 23 to be transmitted to, for example, the control circuit 322. The lead 23 has a main surface 231, a back surface 232, an end surface 233, a displaceable back surface 234, and a connecting surface 235. The main surface 231 faces the same side as the main surfaces 111 of the leads 11 to 14 in the thickness direction z and faces the semiconductor element 3. The main surface 231 is covered with the sealing resin 4. The semiconductor element 3 is supported by the main surface 231. The back surface 232 faces the opposite side to the main surface 231 (the second side z2 in the thickness direction z). The back surface 232 is exposed from the sealing resin 4. The end surface 233 is connected to the main surface 231 and faces the first side x1 in the first direction x. The end surface 233 is exposed from the sealing resin 4.

[0050] The displaceable back surface 234 faces the opposite side to the main surface 231 (the second side z2 in the thickness direction z). The displaceable back surface 234 is located closer to the first side z1 in the thickness direction z than the back surface 232, and is located closer to the main surface 231 than the back surface 232. The displaceable back surface 234 is connected to the end surface 233 and exposed from the sealing resin 4. The connecting surface 235 is connected to the back surface 232 and the displaceable back surface 234 and is exposed from the sealing resin 4. In this embodiment, the connecting surface 235 is approximately perpendicular to the back surface 232.

[0051] In the lead 23, the back surface 232 exposed from the sealing resin 4, the displaced back surface 234, and the connecting surface 235 are plated with, for example, tin. Note that instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold laminated in this order, may be used. Furthermore, the main surface 231 on which the semiconductor element 3 is supported may be plated with, for example, silver.

[0052] As shown in FIGS. 3 and 4, each of the leads 25 is disposed at one of the four corners of the semiconductor device A10 when viewed in the thickness direction z (in a plan view). In this embodiment, three leads 25 are disposed. These three leads 25 are disposed at a corner of the semiconductor device A10 on a first side x1 in the first direction x and a first side y1 in the second direction y, a corner of a second side x2 in the first direction x and a first side y1 in the second direction y, and a corner of a second side x2 in the first direction x and a second side y2 in the second direction y. Each of the leads 25 is not electrically connected to the semiconductor element 3 and is a so-called dummy terminal. Each of the leads 25 has a main surface 251, a back surface 252, an end surface 253, an end surface 254, a displaced back surface 255, and a connecting surface 256. The main surface 251 faces the same side as the main surfaces 111 of the leads 11 to 14 in the thickness direction z. The main surface 251 is covered with the sealing resin 4. The back surface 252 faces the opposite side to the main surface 251 (the second side z2 in the thickness direction z). The back surface 252 is exposed from the sealing resin 4. The end surface 253 is connected to the main surface 251 and faces the first direction x. The end surface 254 is connected to the main surface 251 and faces the second direction y. The end surfaces 253 and 254 are exposed from the sealing resin 4.

[0053] The displaceable back surface 255 faces the opposite side to the main surface 251 (the second side z2 in the thickness direction z). The displaceable back surface 255 is located closer to the first side z1 in the thickness direction z than the back surface 252, and closer to the main surface 251 than the back surface 252. The displaceable back surface 255 is connected to the end surface 253 and the end surface 254, and is exposed from the sealing resin 4. The connecting surface 256 is connected to the back surface 252 and the displaceable back surface 255, and is exposed from the sealing resin 4. In this embodiment, the connecting surface 256 is approximately perpendicular to the back surface 252.

[0054] Each of the multiple leads 25 is located at a corner of the sealing resin 4 when viewed in the thickness direction z. The back surface 252 of each lead 25 is substantially fan-shaped, and the corner side of the corresponding sealing resin 4 is arc-shaped. Therefore, the connecting surface 256 connected to the arc-shaped portion of the back surface 252 is a curved surface when viewed in the thickness direction z, and has an outwardly convex shape.

[0055] In this embodiment, as shown in the manufacturing method described later, the displaceable back surface 255 and the connecting surface 256 of the multiple leads 25 are formed by irradiating with a laser. The laser is irradiated with a pulse output that is periodically turned on and off. The repeated on-off of the pulse output forms irregularities as traces of the laser irradiation. The irregularities extend in a direction perpendicular to the laser scanning direction. Therefore, as shown in FIG. 14 , the displaceable back surface 255 has a plurality of protrusions 291 that extend in a direction perpendicular to the thickness direction z, which are regularly arranged. Furthermore, the connecting surface 256 has a plurality of protrusions 292 that extend in the thickness direction z, which are regularly arranged. The same applies to the other leads 11 to 23.

[0056] In each of the plurality of leads 25, the back surface 252, the displaceable back surface 255, and the connecting surface 256 exposed from the sealing resin 4 are plated with, for example, tin. Note that instead of tin plating, a plurality of metal platings, for example, nickel, palladium, and gold laminated in this order, may be used.

[0057] As shown in FIGS. 3 and 4 , the lead 18 is disposed near a corner of the semiconductor device A10 on a first side x1 in the first direction x and a second side y2 in the second direction y. An electrical signal is input to the lead 18 to transmit to, for example, the control circuit 322. The lead 18 has a main surface 181, back surfaces 182a, 182b, and 182c, end surfaces 183a, 183b, 184b, and 183c, movable back surfaces 185a, 185b, and 185c, and connecting surfaces 186a, 186b, and 186c. The main surface 181 faces the same side as the main surfaces 111 of the leads 11 to 14 in the thickness direction z and faces the semiconductor element 3. The main surface 181 is covered with a sealing resin 4. The semiconductor element 3 is supported by the main surface 181. The back surfaces 182a, 182b, and 182c face the side opposite to the main surface 181 (the second side z2 in the thickness direction z). Each of the back surfaces 182a, 182b, and 182c is exposed from the sealing resin 4. The back surface 182b is disposed at a corner of the semiconductor device A10 on a first side x1 in the first direction x and on a second side y2 in the second direction y. The back surface 182a is disposed adjacent to the back surface 182b on the first side y1 in the second direction y. The back surface 182c is disposed adjacent to the back surface 182b on the second side x2 in the first direction x. The end surface 183a is connected to the main surface 181 and faces the first side x1 in the first direction x. The end surface 183b is connected to the main surface 181 and faces the first side x1 in the first direction x. The end face 184b is connected to the main surface 181 and faces the second side y2 in the second direction y. The end face 183c is connected to the main surface 181 and faces the second side y2 in the second direction y. The end faces 183a, 183b, 184b, and 183c are exposed from the sealing resin 4.

[0058] The displaceable back surfaces 185a, 185b, and 185c face the side opposite to the main surface 181 (the second side z2 in the thickness direction z). The displaceable back surfaces 185a, 185b, and 185c are located closer to the first side z1 in the thickness direction z than the back surfaces 182a, 182b, and 182c, and are closer to the main surface 181 than the back surfaces 182a, 182b, and 182c. The displaceable back surface 185a is connected to the end surface 183a and exposed from the sealing resin 4. The displaceable back surface 185b is connected to the end surface 183b and the end surface 184b and exposed from the sealing resin 4. The displaceable back surface 185c is connected to the end surface 183c and exposed from the sealing resin 4. The connecting surface 186a is connected to the back surface 182a and the displaceable back surface 185a and exposed from the sealing resin 4. In this embodiment, the connecting surface 186a is approximately perpendicular to the back surface 182a. The coupling surface 186c is connected to the back surface 182c and the displaceable back surface 185c, and is exposed from the sealing resin 4. In this embodiment, the coupling surface 186c is approximately perpendicular to the back surface 182c. The coupling surface 186b is connected to the back surface 182b and the displaceable back surface 185b, and is exposed from the sealing resin 4. In this embodiment, the coupling surface 186b is approximately perpendicular to the back surface 182b.

[0059] The lead 18 is located at a corner of the sealing resin 4 when viewed in the thickness direction z. The back surface 182b of the lead 18 is substantially fan-shaped, and the corresponding corner side of the sealing resin 4 is arc-shaped. Therefore, the connecting surface 186b connected to the arc-shaped portion of the back surface 182b is a curved surface when viewed in the thickness direction z, and has an outwardly convex shape.

[0060] In the lead 18, the back surfaces 182a, 182b, and 182c exposed from the sealing resin 4, the displaced back surfaces 185a, 185b, and 185c, and the connecting surfaces 186a, 186b, and 186c are plated with, for example, tin. Note that instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold stacked in this order, may be used. Furthermore, the main surface 181 on which the semiconductor element 3 is supported may be plated with, for example, silver.

[0061] 4, the multiple leads 21, the one lead 17 (on the first side y1 in the second direction y), and the lead 22 have their respective back surfaces 212, 172, and 222 aligned along the edge of the first side y1 in the second direction y of a bottom surface 42 (described later) of the sealing resin 4. The multiple leads 19, the other lead 17 (on the second side y2 in the second direction y), and the lead 18 have their respective back surfaces 192, 172, and 182c aligned along the edge of the second side y2 in the second direction y of the bottom surface 42. The leads 18, 12, 15, 16, 11, and 23 have their respective back surfaces 182a, 112, 153, 162, 112, and 232 aligned along the edge of the first side x1 in the first direction x of the bottom surface 42. The back surfaces 112, 152, 162, 112, 202 of the leads 14, 15, 16, 13, and 20 are aligned along the edge of the second side x2 in the first direction x of the bottom surface 42. The leads 25 each have an end face 253 facing the first direction x and an end face 254 facing the second direction y. Each lead 25 is a dummy terminal that is not electrically connected to the semiconductor element 3. The lead 18 has an end face 183b facing the first direction x and an end face 184b facing the second direction y. The lead 18 is electrically connected to the semiconductor element 3.

[0062] There are no limitations on the arrangement, shape, and function of the leads 11 to 25. The conductive member 1 does not have to include all of the leads 11 to 25, and may include other leads. The layout of the conductive member 1 is designed as appropriate.

[0063] The sealing resin 4 covers a portion of the conductive member 1 and the semiconductor element 3. The sealing resin 4 is made of an insulating material, such as a black epoxy resin. The sealing resin 4 is rectangular when viewed in the thickness direction z. In this embodiment, the outer shape of the sealing resin 4 matches the outer shape of the semiconductor device A10 when viewed in the thickness direction z. As shown in FIGS. 5 to 8 , the sealing resin 4 has a top surface 41, a bottom surface 42, a first side surface 431, a second side surface 432, a third side surface 433, a fourth side surface 434, a displaceable bottom surface 44, and a connecting surface 45.

[0064] 9 to 13, the top surface 41 faces the same side as the main surfaces 111 of the leads 11 to 14 in the thickness direction z (first side z1 in the thickness direction z). As shown in FIGS. 5 to 8, the bottom surface 42 faces the opposite side to the top surface 41 (second side z2 in the thickness direction z). The top surface 41 and the bottom surface 42 are rectangular. As shown in Figures 4 and 9 to 13, the following are exposed from the bottom surface 42 so as to be flush with the bottom surface 42: the back surfaces 112 and 113 of each of the multiple leads 11 to 14, the back surfaces 152 and 153 of lead 15, the back surface 162 of lead 16, the back surfaces 172 of each of the pair of leads 17, the back surfaces 182a, 182b and 182c of lead 18, the back surfaces 192 of each of the multiple leads 19, the back surface 202 of lead 20, the back surface 212 of each of the multiple leads 21, the back surface 222 of lead 22, the back surface 232 of lead 23 and the back surface 252 of each of the multiple leads 25.

[0065] The first side surface 431, the second side surface 432, the third side surface 433, and the fourth side surface 434 are all connected to the top surface 41 and are perpendicular to the top surface 41 and the bottom surface 42. As shown in FIGS. 5 and 6, the first side surface 431 and the second side surface 432 are spaced apart from each other in the first direction x and face opposite each other. The first side surface 431 faces a first side x1 in the first direction x. The second side surface 432 faces a second side x2 in the first direction x. As shown in FIGS. 4, 7, 9 to 11, the end faces 115 of the leads 11 and 12, the end face 156 of the lead 15, the end face 164 of the lead 16, the end faces 183a and 183b of the lead 18, the end face 233 of the lead 23, and the end face 253 of the lead 25 are exposed from the first side surface 431 so as to be flush with the first side surface 431. As shown in Figures 4, 8, and 9 to 11, end faces 115 of leads 13 and 14, end face 155 of lead 15, end face 163 of lead 16, end face 203 of lead 20, and end faces 253 of each of the multiple leads 25 are exposed from second side face 432 so as to be flush with second side face 432.

[0066] The third side surface 433 and the fourth side surface 434 are each connected to both the first side surface 431 and the second side surface 432. As shown in FIGS. 7 and 8 , the third side surface 433 and the fourth side surface 434 are spaced apart in the second direction y and face opposite each other. The third side surface 433 faces a first side y1 in the second direction y. The fourth side surface 434 faces a second side y2 in the second direction y. As shown in FIGS. 4 , 6 , 12 , and 13 , the end face 173 of one lead 17, the end face 213 of each of the multiple leads 21, the end face 223 of each of the multiple leads 22, and the end face 254 of each of the multiple leads 25 are exposed from the third side surface 433 so as to be flush with the third side surface 433. As shown in Figures 4, 5, 12, and 13, the end face 173 of the other lead 17, the end face 184b and the end face 183c of the lead 18, the end face 193 of each of the multiple leads 19, and the end face 254 of the lead 25 are exposed from the fourth side face 434 so as to be flush with the fourth side face 434.

[0067] The displaceable bottom surface 44 faces the opposite side (second side z2 in the thickness direction z) to the top surface 41. The displaceable bottom surface 44 is located closer to the first side z1 in the thickness direction z than the bottom surface 42, and is located closer to the top surface 41 than the bottom surface 42. The displaceable bottom surface 44 is connected to the first side surface 431, the second side surface 432, the third side surface 433, and the fourth side surface 434, and surrounds the periphery of the bottom surface 42 when viewed in the thickness direction z. As shown in FIG. 4, the displacement back surface 116 of each of the plurality of leads 11 to 14, the displacement back surface 157 and the displacement back surface 158 of lead 15, the displacement back surface 165 and the displacement back surface 166 of lead 16, the displacement back surface 174 of each of the pair of leads 17, the displacement back surface 185a, the displacement back surface 185b and the displacement back surface 185c of lead 18, the displacement back surface 194 of each of the plurality of leads 19, the displacement back surface 204 of lead 20, the displacement back surface 214 of each of the plurality of leads 21, the displacement back surface 224 of lead 22, the displacement back surface 234 of lead 23, and the displacement back surface 255 of each of the plurality of leads 25 are exposed from the displacement bottom surface 44 so as to be flush with the displacement bottom surface 44.

[0068] 4 to 8 , coupling surface 45 exposes coupling surfaces 117 of leads 11 to 14, coupling surfaces 159 and 150 of lead 15, coupling surfaces 167 and 168 of lead 16, coupling surface 175 of lead 17, coupling surfaces 186a, 186b, and 186c of lead 18, coupling surfaces 195 of each of the plurality of leads 19, coupling surface 205 of lead 20, coupling surfaces 215 of each of the plurality of leads 21, coupling surface 225 of lead 22, coupling surface 235 of lead 23, and coupling surface 256 of each of the plurality of leads 25.

[0069] In this embodiment, as shown in the manufacturing method described later, the displacement bottom surface 44 and the connecting surface 45 are formed by irradiating a laser. Therefore, as shown in Fig. 14, a plurality of protrusions 48 extending in a direction perpendicular to the thickness direction z are formed on the displacement bottom surface 44. Furthermore, a plurality of protrusions 49 extending in the thickness direction z are formed on the connecting surface 45.

[0070] 2 and 9 to 13, the semiconductor element 3 is supported by a plurality of leads 11 to 14, a lead 15, a lead 16, a pair of leads 17, a lead 18, a plurality of leads 19, a lead 20, a plurality of leads 21, a lead 22, and a lead 23. The semiconductor element 3 is covered with a sealing resin 4. The semiconductor element 3 has a semiconductor substrate 31, a semiconductor layer 32, a plurality of electrodes 33, and a plurality of electrodes 34.

[0071] 9 to 13, semiconductor substrate 31 supports semiconductor layer 32, a plurality of electrodes 33, and a plurality of electrodes 34. The constituent material of semiconductor substrate 31 is, for example, Si (silicon) or silicon carbide (SiC).

[0072] The semiconductor layer 32 is stacked in the thickness direction z on the side of the semiconductor substrate 31 facing the main surfaces 111 of the leads 11 to 14. The semiconductor layer 32 includes multiple types of p-type and n-type semiconductors based on differences in the amount of doped elements. The semiconductor layer 32 includes a switching circuit 321 and a control circuit 322 that is connected to the switching circuit 321. The switching circuit 321 is, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT). In the example of the semiconductor device A10, the switching circuit 321 is divided into two regions: a high-voltage region (upper arm circuit) and a low-voltage region (lower arm circuit). Each region is composed of one n-channel MOSFET. The control circuit 322 includes a gate driver for driving the switching circuit 321 and a bootstrap circuit corresponding to the high-voltage region of the switching circuit 321, and performs control to ensure that the switching circuit 321 is operated normally. A wiring layer (not shown) is further formed on the semiconductor layer 32. The switching circuit 321 and the control circuit 322 are electrically connected to each other by the wiring layer.

[0073] 9 to 13, the plurality of electrodes 33 and the plurality of electrodes 34 are provided on the side of the semiconductor layer 32 facing the main surfaces 111 of the leads 11 to 14 in the thickness direction z. The plurality of electrodes 33 and the plurality of electrodes 34 are in contact with the semiconductor layer 32.

[0074] The plurality of electrodes 33 are electrically connected to a switching circuit 321 of the semiconductor layer 32. Each of the plurality of electrodes 33 is electrically connected to one of the main surface 111 of each of the plurality of leads 11 to 14, the main surface 151 of lead 15, and the main surface 161 of lead 16. This electrically connects the plurality of leads 11 to 14, the lead 15, and the lead 16 to the switching circuit 321. In this embodiment, at least one electrode 33 overlaps with the back surface 113 of each of the plurality of leads 11 to 14 when viewed in the thickness direction z.

[0075] The plurality of electrodes 34 are electrically connected to a control circuit 322 of the semiconductor layer 32. Each of the plurality of electrodes 34 is electrically connected to one of the main surfaces 171 of the pair of leads 17, the main surface 181 of the lead 18, the main surface 191 of the plurality of leads 19, the main surface 201 of the lead 20, the main surface 211 of the plurality of leads 21, the main surface 221 of the lead 22, and the main surface 231 of the lead 23. As a result, the pair of leads 17, the lead 18, the plurality of leads 19, the lead 20, the plurality of leads 21, the lead 22, and the lead 23 are electrically connected to the control circuit 322. The constituent material of the plurality of electrodes 33 and the plurality of electrodes 34 includes, for example, copper.

[0076] 2 and 3, the semiconductor element 3 has a rectangular shape when viewed in the thickness direction z. The semiconductor element 3 has an element main surface 305, an element back surface 306, and element side surfaces 301-304.

[0077] As shown in FIGS. 9 to 13, the element main surface 305 and the element back surface 306 face opposite each other in the thickness direction z. The element main surface 305 is the surface of the semiconductor layer 32 on which the plurality of electrodes 33 and the plurality of electrodes 34 are arranged. In this embodiment, the element main surface 305 faces the second side z2 and faces the main surfaces 111 of the leads 11 to 14. The element back surface 306 is the surface of the semiconductor substrate 31 opposite to the side on which the semiconductor layer 32 is stacked. In this embodiment, the element back surface 306 faces the first side z1. The element main surface 305 and the element back surface 306 are rectangular.

[0078] The element side surfaces 301 to 304 are all connected to the element principal surface 305 and the element rear surface 306 and are perpendicular to the element principal surface 305 and the element rear surface 306. As shown in FIGS. 2 and 3, the element side surfaces 301 and 302 are spaced apart from each other in the first direction x and face opposite directions. The element side surface 301 faces the x1 side in the first direction x. The element side surface 302 faces the x2 side in the first direction x. The element side surfaces 303 and 304 are each connected to both the element side surfaces 301 and 302. The element side surfaces 303 and 304 are spaced apart from each other in the second direction y and face opposite directions. The element side surface 303 faces the y1 side in the second direction y. The element side surface 304 faces the y2 side in the second direction y. In this embodiment, the outer peripheries of the semiconductor substrate 31 and the semiconductor layer 32 form element side surfaces 301 to 304 when viewed in the thickness direction z.

[0079] Next, an example of a method for manufacturing the semiconductor device A10 will be described below with reference to FIGS. 15 to 18. FIGS. 15 and 17 are bottom views showing steps in the method for manufacturing the semiconductor device A10, and correspond to FIG. 4. FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 15, and corresponds to FIG. 9. FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 17, and corresponds to FIG. 9. The first direction x, second direction y, and thickness direction z shown in these figures indicate the same directions as those in FIGS. 1 to 14.

[0080] First, the lead frame 81 is prepared. The lead frame 81 is a plate-shaped material that will become the leads 11 to 25. In this embodiment, the base material of the lead frame 81 is Cu. The lead frame 81 may be formed by etching a metal plate or by punching a metal plate. The lead frame 81 includes many portions that will become the semiconductor device A10. It also includes an outer frame (not shown) that connects the portions that will become the leads 11 to 25 and does not constitute the semiconductor device A10. The lead frame 81 has a main surface 81A facing a first side z1 in the thickness direction z and a back surface 81B facing a second side z2. Next, the element main surface 305 is placed opposite the lead frame 81, and the electrodes 33 and 34 are conductively joined at predetermined positions on the main surface 81A of the lead frame 81, thereby mounting the semiconductor element 3 on the main surface 81A of the lead frame 81 (element bonding process). Next, sealing resin 4 is formed to cover part of lead frame 81 and semiconductor element 3 (resin formation process). Sealing resin 82 has a top surface 82A facing a first side z1 in thickness direction z and a bottom surface 82B facing a second side z2. As a result, as shown in FIGS. 15 and 16, lead frame 81 has semiconductor element 3 mounted thereon and is mostly covered with sealing resin 82. Part of back surface 81B of lead frame 81 (the part that becomes the back surface of each lead 11-25) is exposed from bottom surface 82B of sealing resin 82.

[0081] Next, as shown in FIGS. 17 and 18, grooves 83 are formed (groove forming step). The grooves 83 are formed across the lead frame 81 and the sealing resin 82, and include a plurality of grooves 81C formed in the lead frame 81 and a plurality of grooves 82C formed in the sealing resin 82. The grooves 81C are recessed from the back surface 81B of the lead frame 81 to partway toward the first side z1 in the thickness direction z. The grooves 82C are recessed from the bottom surface 82B of the sealing resin 82 to partway toward the first side z1 in the thickness direction z. The bottom surfaces of the grooves 81C and 82C are flush with each other. The grooves 83 include a plurality of grooves 831 extending in the first direction x, a plurality of grooves 832 extending in the second direction y, and a plurality of connecting surfaces 833 connecting the grooves 831 and 832 at positions where the grooves 831 and 832 intersect. The multiple coupling surfaces 833 are located in portions of the lead frame 81 that will become the lead 18 and the multiple leads 25. Each coupling surface 833 is a curved surface when viewed in the thickness direction z, and will later become the coupling surface 186b of the lead 18 or each coupling surface 256 of the multiple leads 25. Among the grooves 83, the bottom surface of groove 81C becomes the displaced back surface of each of the leads 11 to 25, and the bottom surface of groove 82C becomes the displaced bottom surface 44 of the sealing resin 4. Among the grooves 83, the side surface of groove 81C becomes the coupling surface of each of the leads 11 to 25, and the side surface of groove 82C becomes the coupling surface 45 of the sealing resin 4.

[0082] In this embodiment, the groove 83 is formed by irradiating a laser in the groove forming process. In a half-cut dicing process using a blade, the groove 83 can only be formed linearly, and the connecting surface 833 cannot be formed. In this embodiment, the groove 83 is formed by irradiating a laser, and the connecting surface 833 is curved when viewed in the thickness direction z. The laser is irradiated with a pulse output that is periodically turned on and off. The repeated on-off of the pulse output forms irregularities as traces of the laser irradiation. The irregularities extend in a direction perpendicular to the laser scanning direction. Therefore, a plurality of protrusions extending in a direction perpendicular to the thickness direction z and the laser scanning direction are formed regularly on the bottom surface of the groove 83 (see the protrusions 291 on the displaced back surface 255 and the protrusions 48 on the displaced bottom surface 44 in FIG. 14). Furthermore, a plurality of protrusions extending in the thickness direction z are regularly arranged on the side surface of the groove 83 (see the protrusions 292 on the connecting surface 256 and the protrusions 49 on the connecting surface 45 in FIG. 14). Note that the method for forming the groove 83 in the groove forming step is not limited to laser irradiation. For example, the groove 83 may be formed by other methods such as etching.

[0083] Next, plating is performed on the rear surface 81B of the lead frame 81 exposed from the bottom surface 82B of the sealing resin 82 and the surface of the groove 81C exposed from the groove 82C. In this embodiment, for example, tin plating is formed.

[0084] Next, the lead frame 81 and the sealing resin 82 are cut along the cutting lines CL shown in FIGS. 17 and 18 to separate the lead frame 81 and the sealing resin 82 (cutting process). In this embodiment, the cutting process is performed by a full-cut dicing process using a blade. The thickness of the blade is smaller than the width of the groove portion 83 (the dimension in the direction perpendicular to the thickness direction z and the direction of the cutting line CL). First, along the groove 831 of the groove portion 83, the lead frame 81 and the sealing resin 82 are removed throughout the thickness direction z in a removal region (the region outside the cutting line CL in FIGS. 17 and 18) that is narrower than the groove 831 as viewed in the thickness direction z (the dimension in the second direction y) and that entirely overlaps the groove 831. This forms a cut surface in the lead frame 81 and the sealing resin 82 facing the second direction y. Next, along the groove 832 of the groove portion 83, in a removal region (region outside the cutting line CL in FIGS. 17 and 18 ) that is narrower than the groove 832 in the thickness direction z (dimension in the first direction x) and that entirely overlaps the groove 832, the lead frame 81 and the sealing resin 82 are removed throughout the thickness direction z. As a result, cut surfaces facing the first direction x are formed in the lead frame 81 and the sealing resin 82. The cut surfaces of the lead frame 81 become end faces of the leads 11 to 25, and the cut surfaces of the sealing resin 82 become the first side surface 431, the second side surface 432, the third side surface 433, and the fourth side surface 434. Note that the cutting method in the cutting step is not limited to cutting with a blade. For example, cutting may be performed by other methods, such as laser irradiation.

[0085] By going through the steps described above, the semiconductor device A10 is manufactured.

[0086] Next, the effects of the semiconductor device A10 will be described.

[0087] According to this embodiment, the multiple leads 25 and the leads 18 are located at corners of the sealing resin 4 as viewed in the thickness direction z. The back surface 252 of each lead 25 has a generally fan-shaped configuration, with the corresponding corner of the sealing resin 4 being arc-shaped. Therefore, the connecting surface 256 connected to the arc-shaped portion of the back surface 252 is curved and convex outward as viewed in the thickness direction z. Similarly, the back surface 182b of each lead 18 located at a corner of the sealing resin 4 as viewed in the thickness direction z also has a generally fan-shaped configuration, with the corresponding corner of the sealing resin 4 being arc-shaped. Therefore, the connecting surface 186b connected to the arc-shaped portion of the back surface 182b is also curved and convex outward as viewed in the thickness direction z. This allows the semiconductor device A10, when mounted on a wiring board via solder, to distribute stress concentrated on the solder bonded to each back surface 252, 182b. Therefore, the semiconductor device A10 can improve the mounting reliability compared to when each of the rear surfaces 252, 182b is rectangular.

[0088] Furthermore, according to this embodiment, in the manufacturing method of the semiconductor device A10, the groove forming step forms the groove 83 by irradiating with a laser. Therefore, it is possible to form the coupling surface 833, which is a curved surface when viewed in the thickness direction z, in the groove 83. This makes it possible to form the coupling surface 256 of each lead 25 and the coupling surface 186b of the lead 18 in the semiconductor device A10.

[0089] <First Modification of First Embodiment> 19 and 20 show a semiconductor device A11 according to a first modified example of the first embodiment. Fig. 19 is a bottom view showing the semiconductor device A11 and corresponds to Fig. 4. Fig. 20 is a partially enlarged perspective view showing the semiconductor device A11 and corresponds to Fig. 14. In Fig. 19 and subsequent figures, elements that are the same as or similar to those in the semiconductor device A10 of the above embodiment are given the same reference numerals as in the above embodiment, and descriptions thereof will be omitted where appropriate.

[0090] In the semiconductor device A11 of this modification, the coupling surfaces of the leads 11-25 and the coupling surface 45 of the sealing resin 4 are inclined with respect to the thickness direction z. For example, as shown in Fig. 20, each coupling surface 256 of the multiple leads 25 is inclined with respect to the thickness direction z. Similarly, each coupling surface 117 of the multiple leads 11-14, coupling surfaces 159 and 150 of lead 15, coupling surfaces 167 and 168 of lead 16, each coupling surface 175 of the pair of leads 17, coupling surfaces 186a, 186b, and 186c of lead 18, each coupling surface 195 of the multiple leads 19, coupling surface 205 of lead 20, each coupling surface 215 of the multiple leads 21, coupling surface 225 of lead 22, and coupling surface 235 of lead 23 are also inclined with respect to the thickness direction z. In the multiple leads 25 and leads 18 located at the corners of the sealing resin 4 when viewed in the thickness direction z, each connecting surface 256, 186b is inclined with respect to the thickness direction z, which allows for better distribution of stress concentrated on the solder joined to each back surface 252, 182b compared to when each connecting surface 256, 186b is parallel to the thickness direction z (perpendicular to the bottom surface 42 of the sealing resin 4).

[0091] <Second Modification of First Embodiment> Figures 21 and 22 show a semiconductor device A12 according to a second modified example of the first embodiment. Figure 21 is a bottom view showing the semiconductor device A12 and corresponds to Figure 4. Figure 22 is a partially enlarged perspective view showing the semiconductor device A12 and corresponds to Figure 14.

[0092] In the semiconductor device A12 of this modification, the shapes of the multiple leads 25 and the leads 18 are different from those of the semiconductor device A10. As shown in Fig. 22, the end face 253 of the lead 25 is connected to the end face 254. Similarly, the end face 183b of the lead 18 is connected to the end face 184b.

[0093] <Third Modification of First Embodiment> 23 shows a semiconductor device A13 according to a third modification of the first embodiment. Fig. 23 is a front view showing the semiconductor device A13, and corresponds to Fig. 5.

[0094] In the semiconductor device A13 of this modified example, the back surfaces of the leads 11 to 25 are not flush with the bottom surface 42 of the sealing resin 4. For example, as shown in FIG. 23 , the back surface 172 of the lead 17, the back surfaces 192 of the leads 19, the back surfaces 182b and 182c of the lead 18, and the back surface 252 of the lead 25 are not flush with the bottom surface 42 but protrude from the bottom surface 42 to the second side z2 in the thickness direction z. Similarly, the back surfaces 112 and 113 of the leads 11 to 14, the back surfaces 152 and 153 of the lead 15, the back surface 162 of the lead 16, the back surface 182a of the lead 18, the back surface 202 of the lead 20, the back surfaces 212 of the leads 21, the back surface 222 of the lead 22, and the back surface 232 of the lead 23 are not flush with the bottom surface 42 but protrude from the bottom surface 42 to the second side z2 in the thickness direction z. As can be seen from the third modification, the back surfaces of the leads 11 to 25 only need to be exposed from the sealing resin 4, and there is no restriction as to whether they are flush with the bottom surface .

[0095] Second Embodiment 24 to 26 show a semiconductor device A20 according to a second embodiment of the present disclosure. FIG. 24 is a plan view of the semiconductor device A20, corresponding to FIG. 2. FIG. 25 is a bottom view of the semiconductor device A20, corresponding to FIG. 4. FIG. 26 is a cross-sectional view taken along line XXVI-XXVI in FIG. 24, corresponding to FIG. 9 and the like. Note that FIG. 24 shows the sealing resin 4 through perspective for ease of understanding. In FIG. 24, the transparent sealing resin 4 is indicated by an imaginary line (two-dot chain line). The semiconductor device A20 of this embodiment differs from the first embodiment in the orientation of the semiconductor element 3 in the thickness direction z. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment. Note that the parts of the first embodiment and the modifications described above may be combined in any desired manner.

[0096] In the semiconductor device A20 of this embodiment, the conductive member 1 includes a lead 27, four leads 28, and a plurality of leads 26. The lead 27 is a die pad and is located at the center of the semiconductor device A20 when viewed in the thickness direction z. A semiconductor element 3 is mounted on the lead 27. The semiconductor element 3 is bonded to the lead 27 (die pad) with the element main surface 305 facing the first side z1 in the thickness direction z.

[0097] Each of the four leads 28 is disposed at one of the four corners of the semiconductor device A20 when viewed in the thickness direction z. Each lead 28 is connected to a lead 27. Each lead 28 has a main surface 281, a back surface 282, an end surface 283, an end surface 284, a displaced back surface 285, and a connecting surface 286. The main surface 281 faces a first side z1 in the thickness direction z. The main surface 281 is covered with the sealing resin 4. The back surface 282 faces the opposite side to the main surface 281 (a second side z2 in the thickness direction z). The back surface 282 is exposed from the sealing resin 4. The end surface 283 is connected to the main surface 281 and faces the first direction x. The end surface 284 is connected to the main surface 281 and faces the second direction y. The end surfaces 283 and 284 are exposed from the sealing resin 4.

[0098] The displaceable back surface 285 faces the opposite side to the main surface 281 (the second side z2 in the thickness direction z). The displaceable back surface 285 is located closer to the first side z1 in the thickness direction z than the back surface 282, and is located closer to the main surface 281 than the back surface 282. The displaceable back surface 285 is connected to the end surface 283 and the end surface 284, and is exposed from the sealing resin 4. The connecting surface 286 is connected to the back surface 282 and the displaceable back surface 285, and is exposed from the sealing resin 4. In this embodiment, the connecting surface 286 is approximately perpendicular to the back surface 282.

[0099] Each of the four leads 28 is located at a corner of the sealing resin 4 when viewed in the thickness direction z. The back surface 282 of each lead 28 is substantially fan-shaped, and the corner side of the corresponding sealing resin 4 is arc-shaped. Therefore, the connecting surface 286 connected to the arc-shaped portion of the back surface 282 is curved when viewed in the thickness direction z and has an outwardly convex shape. In this embodiment, the displaceable back surfaces 285 and connecting surfaces 286 of the four leads 28 are also formed by laser irradiation. Therefore, similar to the displaceable back surfaces 255 of the lead 25 according to the first embodiment, the displaceable back surfaces 285 of the lead 28 have a plurality of protrusions 291 regularly arranged and extending in a direction perpendicular to the thickness direction z. Furthermore, the connecting surface 286 has a plurality of protrusions 292 regularly arranged and extending in the thickness direction z.

[0100] In each of the four leads 28, the back surface 282, the displaceable back surface 285, and the connecting surface 286 exposed from the sealing resin 4 are plated with, for example, tin. Note that instead of tin plating, multiple metal platings, for example, nickel, palladium, and gold laminated in this order, may be used.

[0101] The multiple leads 26 are arranged at both ends of the semiconductor device A20 in the first direction x and at both ends in the second direction y. Each electrode 33 of the semiconductor element 3 is conductively connected to one of the multiple leads 26 by a wire 5. Each of the multiple leads 26 has a main surface 261, a back surface 262, an end surface 263, a displaceable back surface 264, and a connecting surface 265. The main surface 261 faces a first side z1 in the thickness direction z. The main surface 261 is covered with the sealing resin 4. The back surface 262 faces the opposite side to the main surface 261 (a second side z2 in the thickness direction z). The back surface 262 is exposed from the sealing resin 4. The end surface 263 is connected to the main surface 261 and faces outward. The end surface 263 is exposed from the sealing resin 4.

[0102] The displaceable back surface 264 faces the opposite side to the main surface 261 (the second side z2 in the thickness direction z). The displaceable back surface 264 is located closer to the first side z1 in the thickness direction z than the back surface 262, and is located closer to the main surface 261 than the back surface 262. The displaceable back surface 264 is connected to the end surface 263 and exposed from the sealing resin 4. The connecting surface 265 is connected to the back surface 262 and the displaceable back surface 264 and is exposed from the sealing resin 4. In this embodiment, the connecting surface 265 is approximately perpendicular to the back surface 262.

[0103] In each of the plurality of leads 26, the back surface 262 exposed from the sealing resin 4, the displaced back surface 264, and the connecting surface 265 are plated with, for example, tin. Note that instead of tin plating, a plurality of metal platings, for example, nickel, palladium, and gold laminated in this order, may be used. Furthermore, the main surface 261 to which the wire 5 is bonded may be plated with, for example, silver.

[0104] According to this embodiment, the four leads 28 are located at corners of the sealing resin 4 as viewed in the thickness direction z. The rear surface 282 of each lead 28 has a generally fan-shaped configuration, with the corresponding corner of the sealing resin 4 being arc-shaped. Therefore, the connecting surface 286 connected to the arc-shaped portion of the rear surface 282 is curved as viewed in the thickness direction z and has an outwardly convex shape. This allows the semiconductor device A20, when mounted on a wiring board via solder, to disperse stress concentrated on the solder joined to each rear surface 282. Therefore, the semiconductor device A20 can achieve improved mounting reliability compared to a case in which each rear surface 282 is rectangular. Furthermore, the semiconductor device A20 and the manufacturing method for the semiconductor device A20 share a common configuration with the semiconductor device A10 and the manufacturing method for the semiconductor device A10, thereby achieving the same effects as the semiconductor device A10.

[0105] <First Modification of Second Embodiment> Fig. 27 shows a semiconductor device A21 according to a first modified example of the second embodiment. Fig. 27 is a plan view showing the semiconductor device A21, and corresponds to Fig. 2. For ease of understanding, Fig. 27 shows the sealing resin 4 through which light is transmitted. In Fig. 27, the transmitted sealing resin 4 is indicated by an imaginary line (two-dot chain line).

[0106] In the semiconductor device A21 of this modified example, the leads 27 are not connected to the leads 28 located at the four corners of the semiconductor device A21, but are fixed by hanging leads exposed from the first side 431, the second side 432, the third side 433 and the fourth side 434 of the sealing resin 4.

[0107] In the first and second embodiments, the semiconductor device A10 (A11, A12, A13, A20, A21) is described as having a QFN package format, but this is not limiting. The semiconductor device A10 (A11, A12, A13, A20, A21) may also have a DFN (Dual Flat Non-Lead Package) package format. Furthermore, the package format to which the present invention is applicable is not limited to QFN or DFN. The present invention is applicable to various package formats.

[0108] In the first and second embodiments, the first side surface 431, the second side surface 432, the third side surface 433, and the fourth side surface 434 of the sealing resin 4 are all perpendicular to the top surface 41 and the bottom surface 42. However, this is not limiting. At least one of the first side surface 431, the second side surface 432, the third side surface 433, and the fourth side surface 434 does not have to be perpendicular to the top surface 41 and the bottom surface 42. At least one of the first side surface 431, the second side surface 432, the third side surface 433, and the fourth side surface 434 is divided into a plurality of portions in the thickness direction z, and any of the portions does not have to be perpendicular to the top surface 41 and the bottom surface 42.

[0109] In the first and second embodiments, the semiconductor element 3 has been described as having all of the element side surfaces 301 to 304 perpendicular to the element main surface 305 and the element back surface 306. However, this is not limiting. At least one of the element side surfaces 301 to 304 does not have to be perpendicular to the element main surface 305 and the element back surface 306.

[0110] The semiconductor device and the method for manufacturing the semiconductor device according to the present disclosure are not limited to the above-described embodiments. The specific configuration of each part of the semiconductor device according to the present disclosure and the specific processing of each step of the method for manufacturing the semiconductor device can be freely designed in various ways.

[0111] The present disclosure includes the embodiments described in the appendix below. [Appendix 1] a semiconductor element (3) having an element main surface (305) facing in the thickness direction (z) and on which an electrode (33) is arranged; A conductive member (1) that is electrically connected to the semiconductor element; a sealing resin (4) having a resin top surface (41) facing a first side (z1) in the thickness direction and a resin bottom surface (42) facing a second side (z2) in the thickness direction, and covering a part of the conductive member and the semiconductor element; Equipped with the conductive member includes a first lead (25) located at a corner of the sealing resin when viewed in the thickness direction, the first lead includes a first back surface (252) facing the second side in the thickness direction, a second back surface (255) facing the second side in the thickness direction and positioned closer to the first side in the thickness direction than the first back surface, and a connecting surface (256) connecting the first back surface and the second back surface, The connecting surface is a curved surface when viewed in the thickness direction. Semiconductor device. [Appendix 2] The connecting surface has an outwardly convex shape when viewed in the thickness direction. 2. The semiconductor device according to claim 1. [Appendix 3] the first rear surface, the second rear surface, and the connecting surface are exposed from the sealing resin; The first back surface is flush with the resin bottom surface. 3. The semiconductor device according to claim 1 or 2. [Appendix 4] The connecting surface is approximately perpendicular to the first back surface. 4. The semiconductor device according to any one of claims 1 to 3. [Appendix 5] The connecting surface is inclined with respect to the thickness direction. 4. The semiconductor device according to any one of claims 1 to 3. [Appendix 6] The first lead is a main surface (251) facing the first side in the thickness direction and covered with the sealing resin; a first end surface (253) facing a first direction (x) perpendicular to the thickness direction and connected to the main surface and the second back surface; a second end surface (254) facing a second direction (y) perpendicular to the thickness direction and the first direction and connected to the main surface and the second back surface; Furthermore, the first end surface and the second end surface are exposed from the sealing resin. 6. The semiconductor device according to any one of appendices 1 to 5. [Appendix 7, Figure 14] A plurality of first protrusions (291) extending in a direction perpendicular to the thickness direction are formed on the second back surface. 7. The semiconductor device according to any one of appendices 1 to 6. [Appendix 8, Figure 14] A plurality of second protrusions (292) extending in the thickness direction are formed on the connecting surface. 8. The semiconductor device according to any one of appendices 1 to 7. [Appendix 9] The first lead is not electrically connected to the semiconductor element. 9. The semiconductor device according to any one of appendices 1 to 8. [Appendix 10] the first lead is electrically connected to the semiconductor element; 9. The semiconductor device according to any one of appendices 1 to 8. [Appendix 11] the semiconductor element has a main surface facing a second side in the thickness direction; The electrode is conductively joined to the conductive member. 11. The semiconductor device according to any one of claims 1 to 10. (Appendix 12, Second embodiment, Figs. 24 to 26) Further provided is a connection member (5) that electrically connects the semiconductor element and the conductive member, The conductive member includes a die pad (27) on which the semiconductor element is mounted, the semiconductor element has a main surface facing a first side in the thickness direction; the connecting member is electrically connected to the electrode and the conductive member; 11. The semiconductor device according to any one of claims 1 to 10. [Appendix 13] The conductive member includes a second lead (21) spaced apart from the first lead, the second lead includes a third back surface (212) facing the second side in the thickness direction, a fourth back surface (214) facing the second side in the thickness direction and positioned closer to the first side in the thickness direction than the third back surface, and a second connecting surface (215) connecting the third back surface and the fourth back surface, the third rear surface, the fourth rear surface, and the second connecting surface are exposed from the sealing resin; The third back surface is flush with the resin bottom surface. 9. The semiconductor device according to any one of appendices 1 to 8. [Appendix 14, Figures 15 to 18] an element bonding step of bonding a semiconductor element to a lead frame main surface (81A) facing a first side in the thickness direction of the lead frame (81); a resin forming step of forming a sealing resin (82) that covers a part of the lead frame and the semiconductor element; a groove forming step of forming a groove (83) recessed from a back surface (81B) of the lead frame facing a second side in the thickness direction of the lead frame to a middle of the lead frame in the thickness direction; a cutting step of removing the lead frame and the sealing resin from an entire area in the thickness direction along the groove, the removal area having a width narrower than that of the groove as viewed in the thickness direction and entirely overlapping with the groove; Equipped with The groove portion is a first groove (831) extending in a first direction perpendicular to the thickness direction; a second groove (832) extending in a second direction perpendicular to the thickness direction and the first direction; a connecting surface (833) that is connected to the first groove and the second groove at a position where the first groove and the second groove intersect and that is a curved surface when viewed in the thickness direction; Equipped with A method for manufacturing a semiconductor device. [Appendix 15] In the groove forming step, the groove is formed by irradiating a laser. 15. A method for manufacturing a semiconductor device according to claim 14. [Explanation of symbols]

[0112] A10, A11, A12, A13, A20, A21: Semiconductor device 1: Conductive material 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 25, 26, 27, 28: Lead 111,151,161,171,181,191,201,211,221,231,251,261,281: Main surfaces 112,113,152,153,162,172,182a,182b,182c,192,202,212,222,232,252,262,282: Back side 114,154: Concave 115,155,156,163,164,173,183a,183b,184b,183c,193,203,213,223,233,253,254,263,283,284: End surface 116, 157, 158, 165, 166, 174, 185a, 185b, 185c, 194, 204, 214, 224, 234, 255, 264, 285: Displacement backside 117,159,150,167,168,175,186a,186b,186c,195,205,215,225,235,256,265,286: Connection surface 291, 292: Convex 3: Semiconductor elements 305: Main surface of element 306: Back side of element 301, 302, 303, 304: Side of element 31: Semiconductor substrate 32: Semiconductor layer 321: Switching circuit 322: Control circuit 33,34: Electrode 4: Sealing resin 41:Top surface 42: Bottom 431 :1st side 432:Second side 433:Third side 434: 4th side 44: Displacement bottom 45: Connecting surface 48,49: Convex 5: Wire 81: Lead frame 81A: Main surface 81B: Back 81C:Groove 82: Sealing resin 82A:Top surface 82B: Bottom 82C:Groove 83: Groove 831: Groove 832: Groove 833: Connecting surface

Claims

1. a semiconductor element having a main surface facing in the thickness direction and on which electrodes are arranged; a conductive member electrically connected to the semiconductor element; a sealing resin having a resin top surface facing a first side in the thickness direction and a resin bottom surface facing a second side in the thickness direction, the sealing resin covering a portion of the conductive member and the semiconductor element; Equipped with the conductive member includes a first lead located at a corner of the sealing resin when viewed in the thickness direction, the first lead includes a first back surface facing a second side in the thickness direction, a second back surface facing the second side in the thickness direction and positioned closer to the first side in the thickness direction than the first back surface, and a connecting surface connecting the first back surface and the second back surface, The connecting surface is a curved surface when viewed in the thickness direction. Semiconductor device.

2. The connecting surface has an outwardly convex shape when viewed in the thickness direction. The semiconductor device according to claim 1 .

3. the first rear surface, the second rear surface, and the connecting surface are exposed from the sealing resin; The first back surface is flush with the resin bottom surface. The semiconductor device according to claim 1 .

4. The connecting surface is approximately perpendicular to the first back surface. The semiconductor device according to claim 1 .

5. The connecting surface is inclined with respect to the thickness direction. The semiconductor device according to claim 1 .

6. The first lead is a main surface facing the first side in the thickness direction and covered with the sealing resin; a first end surface that faces a first direction perpendicular to the thickness direction and is connected to the main surface and the second back surface; a second end surface that faces a second direction perpendicular to the thickness direction and the first direction and is connected to the main surface and the second back surface; Furthermore, the first end surface and the second end surface are exposed from the sealing resin. The semiconductor device according to claim 1 .

7. a plurality of first protrusions extending in a direction perpendicular to the thickness direction are formed on the second rear surface; 7. The semiconductor device according to claim 1.

8. A plurality of second protrusions extending in the thickness direction are formed on the connecting surface. The semiconductor device according to claim 1 .

9. the first lead is not electrically connected to the semiconductor element; The semiconductor device according to claim 1 .

10. the first lead is electrically connected to the semiconductor element; The semiconductor device according to claim 1 .

11. the semiconductor element has a main surface facing a second side in the thickness direction; The electrode is conductively joined to the conductive member. The semiconductor device according to claim 1 .

12. a connecting member that electrically connects the semiconductor element and the conductive member; the conductive member includes a die pad on which the semiconductor element is mounted, the semiconductor element has a main surface facing a first side in the thickness direction; the connecting member is electrically connected to the electrode and the conductive member; The semiconductor device according to claim 1 .

13. the conductive member includes a second lead spaced apart from the first lead; the second lead includes a third back surface facing a second side in the thickness direction, a fourth back surface facing the second side in the thickness direction and positioned closer to a first side in the thickness direction than the third back surface, and a second connecting surface connecting the third back surface and the fourth back surface, the third rear surface, the fourth rear surface, and the second connecting surface are exposed from the sealing resin; the third back surface is flush with the resin bottom surface; The semiconductor device according to claim 1 .

14. an element bonding step of bonding a semiconductor element to a main surface of the lead frame facing a first side in a thickness direction of the lead frame; a resin forming step of forming a sealing resin that covers a portion of the lead frame and the semiconductor element; a groove forming step of forming a groove recessed from a rear surface of the lead frame facing a second side in the thickness direction of the lead frame to a middle of the lead frame in the thickness direction; a cutting step of removing the lead frame and the sealing resin from an entire area in the thickness direction along the groove, the removal area having a width narrower than that of the groove as viewed in the thickness direction and entirely overlapping with the groove; Equipped with The groove portion is a first groove extending in a first direction perpendicular to the thickness direction; a second groove extending in a second direction perpendicular to the thickness direction and the first direction; a connecting surface that is connected to the first groove and the second groove at a position where the first groove and the second groove intersect, and that is a curved surface when viewed in the thickness direction; Equipped with A method for manufacturing a semiconductor device.

15. In the groove forming step, the groove is formed by irradiating a laser. The method for manufacturing a semiconductor device according to claim 14.

Citation Information

Patent Citations

  • Electronic apparatus

    JP2023042910A