Circuit board

Abstract

To provide a circuit board in which a signal line pair with a broadside coupling structure is arranged on an inner layer of the circuit board, and which can reduce skew between two points where the signal line pair is connected while making effective use of one surface of the circuit board.SOLUTION: A circuit board on which a transmission line consisting of a signal line pair 3 is formed, the signal line pair 3 being first signal lines 3a1, 3a2 and second signal lines 3b1, 3b2 in a broadside coupling configuration arranged on at least two or more inner layers, the first signal lines 3a1, 3a2 and second signal lines 3b1, 3b2 each connecting two points P1, P2 and having an intersection 4 that alternates one or more times between the two points P1, P2.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a circuit board in which a signal line pair with a broadside coupling structure is arranged on an inner layer of the circuit board, and which can reduce skew between the two points where the signal line pair is connected while making effective use of one surface of the circuit board. [Background technology]

[0002] In recent years, signal transmission speeds have increased, and GHz-band signals are now being used for such signal transmission. When designing circuit boards equipped with transmission lines for transmitting such high-speed signals, differential wiring signal transmission, which has high common-mode noise resistance, is useful and widely used. For example, differential wiring signal transmission is used in circuit boards such as switch devices in optical communication devices equipped with optical transceivers, as described in Patent Document 1.

[0003] A differential signal is ideally characterized by the fact that data with a 180-degree phase difference or reversed polarity are transmitted over two transmission paths, canceling out common-mode noise. In differential transmission, signals with a 180-degree phase difference or reversed polarity are transmitted over two signal paths. However, if there is a difference in the signal path length, even if the signals are synchronized at the transmitting end, there will be a difference in the arrival timing of the positive and negative data at the receiving end, resulting in an increase in common-mode components and a deterioration in signal quality. Therefore, adjusting the skew (phase difference) between the positive and negative signals is important in differential wiring. Differential signal structures include strip, microstrip, and broadside coupling. Patent Document 2 uses a strip structure. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2020-027147 [Patent Document 2] Japanese Patent Publication No. 2022-007340 [Patent Document 3] International Publication No. 2022 / 003904 Summary of the Invention [Problem to be solved by the invention]

[0005] In differential transmission using striplines, the signal line pair spreads out in the surface direction of the circuit board, which increases the area of ​​the circuit board in the surface direction. In addition, when the signal line pair is bent and wired, the transmission path lengths differ, which causes skew. To prevent this skew, it is necessary to provide a redundant line on the side of the shorter signal line.

[0006] On the other hand, if the signal line pair is configured with a broadside coupling structure, skew does not occur even if the signal line is bent, and only one signal line occupies the surface area of ​​the circuit board, allowing for a high-density wiring structure.

[0007] However, since the signal line pairs in a broadside coupling structure are formed at different depths in the thickness direction of the circuit board, skew inevitably occurs when connecting electronic components formed on the surface of the circuit board.

[0008] Patent Document 3 describes a technique for suppressing skew between differential signal pairs by connecting one end of a differential signal pair formed on an inner layer of a circuit board to an external conductor formed on the front surface of the circuit board and the other end to an external conductor formed on the back surface of the circuit board. However, if the external conductor connecting one end of the differential signal pair is formed on the front surface and the external conductor connecting the other end is formed on the back surface, for example, mounting of heat dissipation components, power supply components, etc. on the back surface is limited, and the back surface cannot be used effectively.

[0009] The present invention has been made in view of the above, and aims to provide a circuit board in which a signal line pair having a broadside coupling structure is arranged on an inner layer of the circuit board, and which can reduce skew between two points where the signal line pair is connected while making effective use of one surface of the circuit board. [Means for solving the problem]

[0010] In order to solve the above-mentioned problems and achieve the object, the circuit board of the present invention is a circuit board on which a transmission line consisting of a signal line pair is formed, the signal line pair being a first signal line and a second signal line of a broadside coupling configuration arranged on at least two or more inner layers, the first signal line and the second signal line each connecting two points and having one or more interchangeable crossings between the two points.

[0011] Furthermore, in the circuit board of the present invention, in the above invention, the intersection has a third signal line formed on one side of the circuit board and a fourth signal line formed on the one side of the circuit board, the third signal line is connected to the first signal line via a pair of vias of different heights, and the fourth signal line is connected to the second signal line via a pair of vias of different heights.

[0012] Furthermore, in the circuit board according to the present invention, the third signal line and / or the fourth signal line are arranged on an inner layer.

[0013] In addition, in the circuit board according to the present invention, the third signal line and the fourth signal line each have an electrode pattern on which an electronic component is mounted. [Effects of the Invention]

[0014] According to the present invention, a signal line pair having a broadside coupling structure is arranged on an inner layer of a circuit board, and the skew between the two points where the signal line pair is connected can be reduced while making effective use of one surface of the circuit board. [Brief explanation of the drawings]

[0015] [Figure 1] FIG. 1 is a plan view of an optical communication device equipped with a switch device using a circuit board according to an embodiment of the present invention. [Figure 2] FIG. 2 is a plan view of the switch device. [Figure 3] FIG. 3 is a diagram showing the wiring structure of a signal line pair on a circuit board. [Figure 4] FIG. 4 is a schematic diagram illustrating the line length when a switch ASIC and an optical transceiver are connected by a signal line pair via an AC coupling capacitor. [Figure 5] FIG. 5 is a schematic diagram illustrating the line length when the AC coupling capacitors are not disposed at the intersections of FIG. 4 and the lines are directly connected. [Figure 6] FIG. 6 is a perspective view showing the configuration of the optical transceiver. [Figure 7] FIG. 7 is a cross-sectional view of the optical transceiver shown in FIG. 9 taken along line AA. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

[0017] <Overall structure> Fig. 1 is a plan view of an optical communication device 200 equipped with a switch device 100 using a circuit board 1 according to an embodiment of the present invention. As shown in Fig. 1, the optical communication device 200 includes a motherboard 201, an IC 202, and a plurality of switch devices 100. In addition to these, the optical communication device 200 may also include a power supply module, a cooling fan, and the like (none of which are shown).

[0018] The motherboard 201 has a substantially constant thickness in the Z direction and extends in a direction intersecting the Z direction. The motherboard 201 is formed with a surface 201a and a surface 201b. The surface 201a faces the Z direction and intersects with the Z direction. The surface 201b faces in the opposite direction to the Z direction on the opposite side to the surface 201a and intersects with the Z direction.

[0019] The plurality of switch devices 100 are mounted on the surface 201a, and the IC 202 is mounted on the surface 201b. The IC 202 may also be mounted on the surface 201a.

[0020] The IC 202 controls the operation of the multiple switch devices 100 and transmits communication signals between the multiple switch devices 100. The IC 202 is an example of a signal processing circuit.

[0021] Conductors (not shown) of the motherboard 201 and conductors (not shown) of the switch device 100 are electrically connected via conductors such as connectors or solder bumps.

[0022] Fig. 2 is a plan view of the switch device 100. As shown in Fig. 2, the switch device 100 includes a daughter board 10, a plurality of optical transceivers 30, a switch ASIC (application specific integrated circuit) 20, and a plurality of AC coupling capacitors 2. The optical transceiver 30, the switch ASIC 20, and the plurality of AC coupling capacitors 2 are examples of electronic components. The switch device 100 also includes a board assembly configuration including the daughter board 10 and the electronic components.

[0023] The daughter board 10 has a square (quadrilateral) shape. The daughter board 10 has a plate-like shape that intersects the Z direction and extends perpendicularly. The daughter board 10 has a surface 10a facing the Z direction and a surface 10b opposite to the surface 10a and facing the opposite direction of the Z direction. The surfaces 10a and 10b intersect the Z direction and extend perpendicularly. The daughter board 10 is, for example, a multilayer printed wiring board and is an example of a circuit board 1. The surface 10a is an example of one surface 1a of the circuit board 1, and the surface 10b is an example of the other surface 1b opposite to the surface 1a.

[0024] The optical transceivers 30 are arranged along each of the four sides 10c of the daughter board 10. An optical fiber (not shown) extends from each optical transceiver 30. The optical fiber may extend from the optical transceiver 30 substantially along the Z direction, or may extend substantially along a direction intersecting the Z direction.

[0025] The optical transceiver 30 is mounted on a surface 10a of the daughter board 10. The optical transceiver 30 is attached to and detached from a socket (not shown) in a direction intersecting the Z direction, for example, but is not limited to this.

[0026] The switch ASIC 20 is flip-chip mounted on the surface 10a at a position away from each of the sides 10c of the daughter board 10, e.g., approximately in the center of the daughter board 10 in this embodiment. The switch ASIC 20 controls the operation of each optical transceiver 30 and transmits communication signals between the optical transceivers 30. The switch ASIC 20 is an example of a semiconductor integrated circuit and may also be referred to as a signal processing IC. The switch ASIC 20 may be mounted on the daughter board 10 using a method other than flip-chip mounting.

[0027] The optical transceivers 30 and the switch ASIC 20 are connected by a plurality of signal line pairs 3. For example, 16 pairs of signal line pairs 3 for transmitting and receiving are connected between one optical transceiver 30 and the switch ASIC 20, resulting in high-density wiring on the daughter board 10. The signal line pairs 3 are, for example, high-speed transmission lines of differential signal line pairs, and each signal line is arranged on at least two or more inner layers of the daughter board 10, forming a broadside coupling configuration. AC coupling capacitors 2 (2a, 2b) are connected to each of the signal lines of the signal line pairs 3. The AC coupling capacitor 2a arranged on one signal line (e.g., a positive-phase signal line) is connected on the surface 10a, and the AC coupling capacitor 2b arranged on the other signal line (e.g., a negative-phase signal line) is connected on the surface 10b.

[0028] <Wiring structure> FIG. 3 illustrates the wiring structure of a signal line pair on a circuit board 1. FIG. 3(a) illustrates a cross-sectional view of the circuit board 1, and FIG. 3(b) illustrates a plan view of the circuit board 1. As illustrated in FIG. 3, the signal line pair 3 includes a first signal line 3a (3a1, 3a2) and a second signal line 3b (3b1, 3b2) arranged in a broadside coupling configuration on at least two inner layers. The first signal line 3a is, for example, a positive-phase signal line, and the second signal line 3b is a negative-phase signal line. The first signal line 3a and the second signal line 3b each connect two points P1 and P2, and have crossing points 4 (4a, 4b) that alternate between points P1 and P2 one or more times.

[0029] That is, the first signal line 3a1 formed in the upper layer in the Y direction is connected to the first signal line 3a2 formed in the lower layer in the Y direction via the intersection 4a, thereby switching layers, and the second signal line 3b1 formed in the lower layer in the Y direction is connected to the second signal line 3b2 formed in the upper layer in the Y direction via the intersection 4b, thereby switching layers. Note that a plurality of intersections 4a and 4b may be provided on the signal line pair 3.

[0030] As a result, even when AC coupling capacitors 2a and 2b are connected at the intersections 4a and 4b, the line length between the first signal lines 3a1 and 3a2 and the line length between the second signal lines 3b1 and 3b2 are substantially the same, thereby virtually eliminating skew. Furthermore, even if both the electronic component connecting the first signal line 3a1 and the second signal line 3b1 at point P1 and the electronic component connecting the first signal line 3a2 and the second signal line 3b2 at point P2 are mounted on surface 10a, the line difference in the thickness direction between the first signal line 3a1 and the second signal line 3b1 at point P1 and the line difference in the thickness direction between the first signal line 3a2 and the second signal line 3b2 at point P2 are offset by the line swap at the intersections 4a and 4b. This allows for effective use of surface 10b.

[0031] Specifically, AC coupling capacitors 2a and 2b are arranged on surface 10a. AC coupling capacitor 2a is mounted across electrode pattern 13a connected to first signal line 3a1 and electrode pattern 14a connected to first signal line 3a2. Meanwhile, AC coupling capacitor 2b is mounted across electrode pattern 13b connected to second signal line 3b1 and electrode pattern 14b connected to second signal line 3b2. Note that electrode pattern 13a, AC coupling capacitor 2a, and electrode pattern 14a form a third signal line, and electrode pattern 13b, AC coupling capacitor 2b, and electrode pattern 14b form a fourth signal line.

[0032] The electrode patterns 13a and 14a are connected to the first signal lines 3a1 and 3a2 through the vias 11a and 12a, respectively, but the vias 11a and 12a are shifted in the +Y direction from the signal line pair extending in the X direction for interlayer connection. Note that, since the vias 11a and 12a are shifted in the +Y direction, connection wirings 15a and 16a are provided to connect the first signal line 3a1 to the bottom of the via 11a and the first signal line 3a2 to the bottom of the via 12a, respectively.

[0033] Similarly, electrode patterns 13b and 14b are connected to second signal lines 3b1 and 3b2 through vias 11b and 12b, respectively, but vias 11b and 12b are shifted in the -Y direction from the signal line pair extending in the X direction for interlayer connection. Note that, because vias 11b and 12b are shifted in the -Y direction, connection wirings 15b and 16b are provided to connect second signal line 3b1 to the bottom of via 11b and second signal line 3b2 to the bottom of via 12b, respectively.

[0034] The lengths of vias 11a and 12a differ by the distance between layers, and the lengths of vias 11b and 12b also differ by the distance between layers. The total length of vias 11a and 12a is the same as the total length of vias 11b and 12b. The lengths of connecting wirings 15a, 16a, 15b, and 16b are also the same. As a result, the line length between first signal line 3a1 and first signal line 3a2 is the same as the line length between second signal line 3b1 and second signal line 3b2. Therefore, the line lengths between two points P1 and P2 where signal line pair 3 is connected are equal, and skew is virtually eliminated.

[0035] <Specific line length> FIG. 4 is a schematic diagram illustrating the line length when the switch ASIC 20 and the optical transceiver 30 are connected by a signal line pair 3 via AC coupling capacitors 2 (2a, 2b).

[0036] As shown in Figure 4, x1: length of the first signal line 3a2 in the x direction x1': length of the second signal line 3b2 in the x direction x2: length of the second signal line 3b1 in the x direction x2': length of the first signal line 3a1 in the x direction z1: Length of vias 11a and 12b z1´: length of vias 11b and 12a Δx: the distance between the terminal in the switch ASIC 20 that connects the first signal line 3a1 and the terminal in the switch ASIC 20 that connects the second signal line 3b1, or the distance between the terminal in the optical transceiver 30 that connects the first signal line 3a2 and the terminal in the optical transceiver 30 that connects the second signal line 3b2 Then, The line length LL1 of the first signal line 3a excluding the horizontal length of the intersection 4 is LL1 =z1+x1+z1+z1´+x2´+z1´ =2z1´+2z1+x1+x2´ =2z1´+2z1+x1´+Δx+x2´ The line length LL2 of the first signal line 3a excluding the horizontal length of the intersection 4 is LL2 =z1´+x1´+z1´+z1+x2+z1 =2z1´+2z1+x1´+x2 =2z1´+2z1+x1´+x2´+Δx Therefore, LL1=LL2. Therefore, since the horizontal lengths of the intersections 4 are the same, the lengths between the terminals of the first signal line 3a and the second signal line 3b are equal, and skew is almost completely eliminated, keeping the skew within the allowable range.

[0037] 5 is a schematic diagram illustrating the line lengths when the AC coupling capacitors 2 (2a, 2b) are not placed at the intersection 4 in FIG. 4 and the lines are directly connected. In this case, as in FIG. 4, the lengths between the terminals of the first signal line 3a and the second signal line 3b are equal, and skew is virtually eliminated, keeping the skew within the allowable range.

[0038] In this case, the intersection 4 does not need to be exposed on the surface 10a, and may be folded back via another inner layer. In this case, the third signal line is the electrode pattern 13a, the electrode pattern 14a, and a line connecting the electrode pattern 13a and the electrode pattern 14a. The fourth signal line is the electrode pattern 13b, the electrode pattern 14b, and a line connecting the electrode pattern 13b and the electrode pattern 14b.

[0039] In this embodiment, by providing the intersection 4, it is possible to effectively suppress skew and also to effectively utilize the surface 10b, which is the back surface of the circuit board 1. For example, heat dissipation components, power supply components, etc. can be mounted on surface 10b. In addition, by making surface 10b a solid GND, the noise suppression effect can be further improved.

[0040] In the above embodiment and modifications, the daughter board 10 is described as the circuit board 1, but it can also be applied to other circuit boards. For example, the substrate of an interposer in the optical transceiver 30 can also be applied as the circuit board 1.

[0041] Fig. 6 is a perspective view showing the configuration of the optical transceiver 30. Fig. 7 is a cross-sectional view of the optical transceiver 30 shown in Fig. 6 taken along line AA. As shown in Figs. 6 and 7, the optical transceiver 30 has a substrate 33 serving as the circuit board 1 sandwiched in the Z direction between an upper body 31B and a lower body 31A, and is fixed in place by fasteners 36 such as screws.

[0042] The optical fiber 32 extends in the Z direction from the optical transceiver 30. Lens assemblies 37 are attached to the connector 34 adjacent to each other in the -Z direction. The lens assemblies 37 have a lens array, such as a collimating lens array or a focusing lens array, attached to a holder. The positioning pins 35 position the connector 34 and the lens assembly 37 in a direction intersecting the Z direction.

[0043] A through hole 33BB is formed in the approximate center of the upper body 31B, and the connector 34 and at least a part of the lens assembly 37 are housed therein.

[0044] The substrate 33 is, for example, a substrate similar to the circuit board 1. The substrate 33 has a surface 33a in the +Z direction and a surface 33b in the −Z direction.

[0045] An optical element 301, an electronic component 302, and the like are mounted on the surface 33a. The optical element 301 is, for example, a light receiving unit such as a photodiode array, or a light emitting unit such as a VCSEL array. The optical element 301 is an example of an active optical component. The electronic component 302 is, for example, an IC that operates in response to the light receiving unit or the light emitting unit. On the other hand, the surface 33b faces the socket 52.

[0046] Furthermore, a recess recessed in the +Z direction is provided in the portion of upper body 31B facing surface 33a to ensure a mounting area for optical element 301 and electronic component 302. As a result, an accommodation chamber R for components such as optical element 301 and electronic component 302 is formed between substrate 33 and upper body 33B.

[0047] The electronic components 302 generate heat in response to their operation, and the heat dissipation material 303 dissipates the heat generated by the electronic components 302 to the upper body 31B side.

[0048] A through-hole 33AA is formed in the lower body 31A. A socket 52 passes through the through-hole 33AA. The socket 52 has an insulator 52a and multiple connection conductors 52b. The insulator 52a supports the multiple connection conductors 52b. Each connection conductor 52b passes through the socket 52 in the Z direction and electrically connects the conductors of the substrate 33 and the conductors of the daughter board 10. The connection conductors 52b can be configured as contact terminals having elastically expandable pins extending in the Z direction. In this configuration, the conductors of the electronic component 302 are electrically connected to the conductors of the switch ASIC 20 via the conductors of the substrate 33 of the optical transceiver 30, the connection conductors 52b, and the conductors of the daughter board 10. The provision of socket 52 has the advantage of making it easier to establish a configuration that ensures the required positioning accuracy between the conductors of substrate 33 of detachable optical transceiver 30 and the conductors of daughter board 10, compared to, for example, providing an electrical interface directly on daughter board 10. Furthermore, by configuring connection conductor 52b as a contact terminal with an extendable pin, it becomes easier to ensure the required surface pressure and required contact area between the conductors of substrate 33 and connection conductor 52b, and between the conductors of daughter board 10 and connection conductor 52b, and this has the advantage of being able to suppress an increase in contact resistance.

[0049] Here, the substrate 33 can have a wiring structure similar to that of the daughter board 10 of the above embodiment.

[0050] The electronic components are not limited to AC coupling capacitors, but may also be resistors for impedance adjustment or drivers for signal amplification, etc. The impedance of differential signal wiring is usually set to, for example, 100Ω or 90Ω.

[0051] Furthermore, ground planes are formed on the upper surface 10a and the lower surface 10b on which the first signal line and the second signal line are formed.

[0052] Although the present invention has been described above with reference to the embodiments and modifications thereof, the present invention is not limited to the descriptions and drawings that form part of the disclosure of the present invention. In other words, all other embodiments, examples, and operational techniques that are made by those skilled in the art based on the present embodiments are included in the scope of the present invention. [Explanation of symbols]

[0053] 1 circuit board 1a,1b,10a,10b,33a,33b,201a,201b side 2, 2a, 2b AC coupling capacitors 3 signal line pairs 3a, 3a1, 3a2 First signal line 3b, 3b1, 3b2 Second signal line 4, 4a, 4b intersection 10 Daughterboard 10c side 11a, 11b, 12a, 12b vias 13a, 13b, 14a, 14b Electrode patterns 15a, 16a, 15b, 16b connection wiring 20 Switch ASIC 30 Optical Transceiver 31A Lower Body 31B upper body 32 Optical Fiber 33 PCB 33AA,33BB through hole 33B upper body 34 Connector 35 Locating pin 36 Fixtures 37 Lens Assembly 52 sockets 52a Insulator 52b Connecting conductor 100 Switching Device 200 Optical communication device 201 Motherboard 301 Optical Elements 302 Electronic Components 303 Heat dissipation material LL1, LL2 line length P1,P2 points R Containment Room

Claims

1. A circuit board on which a transmission line consisting of a signal line pair is formed, The signal line pair is a first signal line and a second signal line in a broadside coupling configuration arranged on at least two or more inner layers; The circuit board is characterized in that the first signal line and the second signal line each connect two points and have one or more alternating crossings between the two points.

2. 2. The circuit board according to claim 1, wherein the intersection has a third signal line formed on one surface of the circuit board and a fourth signal line formed on the one surface of the circuit board, the third signal line being connected to the first signal line via a pair of vias at different heights, and the fourth signal line being connected to the second signal line via a pair of vias at different heights.

3. The circuit board according to claim 2 , wherein the third signal line and / or the fourth signal line is arranged on an inner layer.

4. 3. The circuit board according to claim 2, wherein the third signal line and the fourth signal line each have an electrode pattern on which an electronic component is mounted.

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