Semiconductor device and communication system

Abstract

To provide a semiconductor device capable of effectively configuring a communication system with a device having different protocol from that of the device.SOLUTION: A first receiving part (11) and a first transmission part (12) included in a semiconductor device (1) are configured to through output data (DDT) corresponding to protocol of the device (10) and included in reception data (RX) to a second bus (BS2). It is allowed that a first bit number which is a bit number of data bits between a start bit and a stop bit in a frame (SYN, RWD, ND1, ND2) before the through output included in the reception data is different from a second bit number which is a bit number of data bits between a start bit and a stop bit in a frame (DDTF) of data to be outputted by the through output to the device.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] Semiconductor devices having a serial communication function are used in a variety of applications.

[0003] An example of circuit technology relating to serial communication is disclosed in Patent Document 1. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2017-224946

[0005] [overview] In some applications, a communication system may be constructed using a semiconductor device that performs serial communication using a protocol different from that of the semiconductor device itself, in addition to the semiconductor device itself.

[0006] An object of the present disclosure is to provide a semiconductor device that can effectively build a communication system together with a device that uses a protocol different from that of the semiconductor device itself.

[0007] A semiconductor device according to one embodiment of the present disclosure includes: A semiconductor device connectable to an external transmitting device via a first bus and connectable to an external device via a second bus, a first receiving unit configured to be able to receive reception data, which is serial data, from the transmitting device via the first bus; a first transmission unit configured to be connectable to the device via the second bus, the first receiving unit and the first transmitting unit are configured to, when bridge selection data included in the received data indicates that a through output is on, which outputs bit data as is between the first bus and the second bus, through output data corresponding to a protocol of the device included in the received data to the second bus; a first bit number, which is the number of data bits between a start bit and a stop bit in a frame before the through output included in the received data; The second number of bits, which is the number of data bits between the start bit and the stop bit in the frame of data output to the device by the through output, can be made different. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram showing a configuration of a communication system according to a first comparative example. [Figure 2] FIG. 2 is a diagram illustrating a configuration of a communication system according to a second comparative example. [Figure 3] FIG. 3 is a diagram illustrating a configuration of a communication system according to an exemplary embodiment of the present disclosure. [Figure 4] FIG. 4 is a block diagram of a semiconductor device according to an exemplary embodiment of the present disclosure. [Figure 5] FIG. 5 is a diagram showing the data structure of received data RX when writing or reading is performed with the semiconductor device 1 as the target device. [Figure 6] FIG. 6 is a diagram illustrating a configuration example of a communication system according to an embodiment of the present disclosure. [Figure 7] FIG. 7 is a diagram showing the data structure of received data RX when writing or reading is performed with the device 10 as the target device. [Figure 8] FIG. 8 is a diagram showing an example of the bridge mode information BRMODE. [Figure 9] FIG. 9 is a timing chart showing communication control when writing to the device 10. In FIG. [Figure 10] FIG. 10 is a timing chart showing communication control when reading from the device 10. In FIG. [Figure 11] FIG. 11 is a diagram illustrating a configuration example of a communication system according to a modification of the present disclosure. [Figure 12] FIG. 12 is an external view showing an example of a vehicle.

[0009] [Detailed explanation] Hereinafter, exemplary embodiments of the present disclosure will be described with reference to the drawings.

[0010] <1. Communication Systems> 1 is a diagram showing the configuration of a communication system 501 according to a first comparative example for comparison with an embodiment of the present disclosure. The communication system 501 includes an MCU (Micro Controller Unit) 20, a CAN (Controller Area Network) transceiver 30, a CAN transceiver 40, a semiconductor device 1, and n (n is an integer equal to or greater than 1) devices 10. The communication system 501 is, as an example, for use in a vehicle, and the same applies to the other communication systems described below.

[0011] Communication between the MCU 20 and the CAN transceiver 30 is performed using UART (Universal Asynchronous Receiver / Transmitter). UART is a format for exchanging serial data between two devices. With UART, bidirectional communication is performed between the sender and receiver using two lines.

[0012] Communication is performed between the CAN transceivers 30 and 40 via a CAN bus 35. CAN is a serial communication protocol standardized by international standards such as ISO11898. Communication is performed between the CAN transceiver 40 and the semiconductor device 1 and the n devices 10 via UART.

[0013] The CAN transceiver 30 has a TXD (transmit data input) terminal 30A and an RXD (receive data output) terminal 30B. The CAN transceiver 30 outputs data input to the TXD terminal 30A to the CAN bus 35, and outputs data input from the CAN bus 35 from the RXD terminal 30B.

[0014] The CAN transceiver 40 has an RXD terminal 40A and a TXD terminal 40B. The CAN transceiver 40 outputs data input to the TXD terminal 40B to the CAN bus 35, and outputs data input from the CAN bus 35 from the RXD terminal 40A.

[0015] The semiconductor device 1 is an IC (integrated circuit) in which circuits with predetermined functions are integrated, and is configured as, for example, an LED (light emitting diode) driver IC. The n devices 10 are ICs in which circuits with predetermined functions are integrated, and are configured as, for example, matrix switch ICs.

[0016] The semiconductor device 1 has an RX (receive data input) terminal 1A and a TX (transmit data output) terminal 1B. The device 10 has an RX terminal 10A and a TX terminal 10B. The RX terminal 1A and the n RX terminals 10A are commonly connected to an RXD terminal 40A. The TX terminal 1B and the n TX terminals 10B are commonly connected to a TXD terminal 40B.

[0017] 1, the semiconductor device 1 and the n devices 10 support the same protocol, so the semiconductor device 1 and the n devices 10 can be commonly connected to the same CAN transceiver 40. Received data RX output from the RXD terminal 40A is input to the RX terminal 1A and the n RX terminals 10A. The received data RX specifies the device address of one of the semiconductor device 1 and the n devices 10. Transmitted data TX output from the TX terminal 1B and the n TX terminals 10B is input to the TXD terminal 40B.

[0018] However, if the protocols supported by the semiconductor device 1 and the n devices 10 are different, it becomes difficult to deal with the configuration of the first comparative example shown in Fig. 1. In such a case, the configuration of the second comparative example shown in Fig. 2 can be adopted.

[0019] 2 differs from the first comparative example in that CAN transceivers 301 and 302 are used instead of CAN transceiver 30, and CAN transceivers 401 and 402 are used instead of CAN transceiver 40. A semiconductor device 1 is connected to MCU 20 via CAN transceiver 301 and CAN transceiver 401, and n devices 10 are connected to MCU 20 via CAN transceiver 302 and CAN transceiver 402. CAN transceivers 401 and 402 perform CAN communication with CAN transceivers 301 and 302, respectively.

[0020] In this way, by grouping devices with different protocols (a group of semiconductor device 1 and a group of n devices 10), communication control can be performed using devices with different protocols. However, an increase in the number of CAN transceivers, such as CAN transceivers 301, 302, 401, and 402, and an increase in the amount of wiring pose a problem of increased costs.

[0021] Therefore, in order to solve such problems, the embodiment of the present disclosure is implemented as described below. Figure 3 is a diagram showing the configuration of a communication system 50 according to an exemplary embodiment of the present disclosure.

[0022] In the configuration shown in FIG. 3, communication is performed by UART between the CAN transceiver 40, the semiconductor device 1, and n devices 10. That is, both buses BS1 and BS2 correspond to UART. In addition to an RX terminal 1A and a TX terminal 1B, the semiconductor device 1 has an RXD (receive data output) terminal 1C and a TXD (transmit data input) terminal 1D. The RX terminal 1A is connected to the RXD terminal 40A of the CAN transceiver 40. The TX terminal 1B is connected to the TXD terminal 40B of the CAN transceiver 40. That is, the RX terminal 1A and the TX terminal 1B are connected to the RXD terminal 40A and the TXD terminal 40B by the bus BS1. Communication of receive data RX and transmit data TX is possible via the bus BS1. The receive data RX and transmit data TX are serial data.

[0023] The RXD terminal 1C is connected to the RX terminals 10A of the n devices 10. The TXD terminal 1D is connected to the TX terminals 10B of the n devices 10. That is, the RXD terminal 1C and the TXD terminal 1D are connected to the RX terminals 10A and TX terminals 10B by a bus (local bus) BS2. Communication of receive data BRX and transmit data BTX is possible via the bus BS2. The receive data BRX and transmit data BTX are serial data.

[0024] In the configuration according to the embodiment of the present disclosure shown in FIG. 3, the semiconductor device 1 and the n devices 10 support different protocols. When the CAN transceiver 40 writes or reads to the semiconductor device 1, the received data RX output from the RXD terminal 40A to the RX terminal 1A consists only of data that supports the protocol of the semiconductor device 1. Note that "write" refers to the process of writing data to the target device, and "read" refers to the process of reading data from the target device. In the case of a read, the semiconductor device 1 receives the received data RX and then outputs the transmitted data TX from the TX terminal 1B to the TXD terminal 40B.

[0025] On the other hand, when the CAN transceiver 40 writes to or reads from the device 10, the receive data RX output from the RXD terminal 40A to the RX terminal 1A includes data corresponding to the protocol of the device 10. At this time, the semiconductor device 1 turns on the bridge function and through-outputs the data included in the receive data RX and corresponding to the protocol of the device 10 as receive data BRX from the RXD terminal 1C. Through-output means outputting bit data as is. The device address of the device 10 is specified in the receive data BRX.

[0026] In the case of a read, the device 10, which is the target device (the device specified by the device address), outputs transmission data BTX from the TX terminal 10B to the TXD terminal 1D. Since the bridge function of the semiconductor device 1 is on, the transmission data BTX is output as transmission data TX from the TX terminal 1B.

[0027] As described above, according to the embodiment of the present disclosure, even if the protocols of the semiconductor device 1 and the device 10 are different, the CAN transceiver 40 can write and read to and from the semiconductor device 1 and the device 10. Compared to the second comparative example (FIG. 2), the number of CAN transceivers can be reduced, and the amount of wiring can be reduced, thereby reducing costs.

[0028] <2. Configuration of semiconductor device> 4 is a block diagram of a semiconductor device 1 according to an embodiment of the present disclosure. The semiconductor device 1 includes functional blocks including a first receiving unit 11, a first transmitting unit 12, a second receiving unit 13, a second transmitting unit 14, and a control unit 15. Note that FIG. 4 illustrates only functional blocks related to communication functions, and other functional blocks may also be included. For example, if the semiconductor device 1 is an LED driver, it includes functional blocks related to LED driving.

[0029] The first receiver 11 receives reception data RX via an RX terminal 1A. The first transmitter 12 outputs reception data BRX via an RXD terminal 1C. The second receiver 13 receives transmission data BTX via a TXD terminal 1D. The second transmitter 14 outputs transmission data TX via a TX terminal 1B.

[0030] The control unit 15 controls the first receiving unit 11, the first transmitting unit 12, the second receiving unit 13, and the second transmitting unit 14. The control unit 15 includes a register 151.

[0031] <3. Structure of received data> 5 is a diagram showing the data structure of received data RX when writing or reading is performed using the semiconductor device 1 as the target device (i.e., when the bridge function is not used). The received data RX shown in FIG. 5 is composed only of data corresponding to the protocol of the semiconductor device 1.

[0032] In UART, communication is carried out in data units called frames. As shown in Figure 5, a frame FR is made up of bit data from a start bit S to a stop bit P. The start bit S is at low level, and the stop bit P is at high level. A predetermined number of bits of bit data are placed between the start bit S and the stop bit P. In the example of Figure 5, 8 bits of bit data are placed. In other words, the frame FR is made up of 10 bits of bit data.

[0033] As shown in FIG. 5, the received data RX includes, from the beginning, a synchronization frame SYN, a read / write etc. frame RWD, a data number frame ND, a register address frame AD, a data frame DT, and CRC (Cyclic Redundancy Check) frames CR1 and CR2.

[0034] The synchronization frame SYN is bit data for setting the baud rate in the semiconductor device 1 .

[0035] The Read / Write etc. frame RWD includes a device address DA, a bridge bit BR, a broadcast / parity bit B / PA, and a Read / Write bit RW. The device address DA is bit data indicating the address of the target device (semiconductor device 1) (5-bit data in the example of Figure 5). The bridge bit BR is bit data indicating the on / off of the bridge function of the semiconductor device 1. The broadcast / parity bit B / PA is bit data indicating the on / off of the broadcast of the semiconductor device 1 or the parity of the data address DA. The Read / Write bit RW is bit data indicating Read or Write.

[0036] Here, the bridge bit BR=0 indicates that the bridge function is off, i.e., normal mode (the bridge function is off in the received data RX shown in Figure 5). In this case, the broadcast / parity bit B / PA indicates whether broadcast is on or off. When the broadcast / parity bit B / PA=0, it indicates that broadcast is off, and when the broadcast / parity bit B / PA=1, it indicates that broadcast is on.

[0037] When broadcasting the semiconductor device 1, multiple semiconductor devices 1 are connected to the CAN transceiver 40 as shown in Fig. 6. Each semiconductor device 1 is connected to a device 10. When broadcasting is on, all of the multiple semiconductor devices 1 become target devices.

[0038] The bridge bit BR=1 indicates that the bridge function is on (the bridge function is on in the received data RX shown in FIG. 7, which will be described later). In this case, the broadcast / parity bit B / PA becomes the parity of the device address DA. This makes it possible to detect errors in the device address DA. In the configuration shown in FIG. 6, if the protocols differ for each group of devices 10 connected to each of the multiple semiconductor devices 1, turning on the broadcast of the semiconductor device 1 will result in the same received data RX being sent as received data BRX to devices 10 with different protocols, making the protocols incompatible with some of the devices 10. Therefore, when the bridge function is turned on, broadcasting is not performed.

[0039] The data number frame ND1 is bit data indicating the number of frames in the data frame DT.

[0040] The register address frame AD is bit data indicating an address in the register 151. The data frame DT is bit data indicating the data body to be transmitted by the received data RX. The CRC frames CR1 and CR2 are bit data indicating an error detection code added to the frames RWD, ND, AD, and DT as the target for error detection. Note that although the data frame DT is one frame in the example of FIG. 5, two or more frames may be included in the received data RX. In this case, the CRC frames CR1 and CR2 follow two or more data frames DT.

[0041] 7 is a diagram showing the data structure of the received data RX when writing or reading to the device 10 as the target device (i.e., when using the bridge function). The synchronization frame SYN and the read / write etc. frame RWD in the received data RX shown in FIG. 7 are as described above.

[0042] 7, a first data number frame ND1 and a second data number frame ND2 follow a read / write etc. frame RWD. The first data number frame ND1 is bit data indicating the total number of frames. The second data number frame ND2 is bit data indicating the number of frames of write data for the target device (device 10 when the bridge function is used). In the case of a write process for the target device, the number of frames indicated by the second data number frame ND2 matches the number of frames indicated by the first data number frame ND1. In the case of a read process for the target device, the number of frames obtained by subtracting the number of frames indicated by the second data number frame ND2 from the number of frames indicated by the first data number frame ND1 is the number of frames of data (read data) returned from the target device to the semiconductor device 1.

[0043] 7, the second data number frame ND2 is followed by device data DDT. The device data DDT is data that conforms to the protocol of the device 10 and is the target for through-output as the received data BRX. The device data DDT includes a device data frame DDTF.

[0044] 7, the device data frame DDTF has 9 data bits DDT between the start bit S and the stop bit P. That is, this is different from the number of bits (=8) between the start bit S and the stop bit P in each frame (SYN, RWD, ND1, ND2) preceding the device data DDT in the received data RX. In this way, it is possible to accommodate cases where the number of bits between the start bit and the stop bit in a frame differs between the device 10 and the semiconductor device 1. Such differences in the number of corresponding bits are included in the differences in the corresponding protocols.

[0045] The number of bits corresponding to the device 10 and the semiconductor device 1 does not necessarily have to be different, and may be the same. For example, both the device 10 and the semiconductor device 1 may support 8 bits. Furthermore, for example, if the number of bits between the start bit and the stop bit in the device data frame DDTF is set to 9 bits, two stop bits may be added after the start bit and 8 data bits in each frame (SYN, RWD, ND1, ND2) before the device data DDT (header portion). In this way, the MCU 20 can treat the header portion frame and the device data frame DDTF as having the same number of bits between the start bit and the stop bit, 9 bits. Furthermore, the semiconductor device 1 can treat the header portion as 8 bits (the stop bit can be ignored) because it synchronizes with the start bit after the stop bit.

[0046] In the device data DDT, any one of the device data frames DDTF corresponds to a device address. This device address indicates the address of the target device, the device 10. The location where this device address is placed in the device data DDT is determined according to the protocol of the device 10.

[0047] <4. Bit depth setting> In this embodiment, the number of data bits between the start bit S and the stop bit P in the device data frame DDTF supported by the device 10 can be set in the register 151 of the semiconductor device 1. FIG. 8 shows bridge mode information BRMODE, which is setting information for such a corresponding number of bits. The bridge mode information BRMODE is used to detect the length of one frame of the device data frame DDTF. In the example of FIG. 8, the bridge mode information BRMODE is 2-bit data, and the number of data bits in the device data frame DDTF (also referred to as bridge data) is set according to the value of BRMODE. In the example of FIG. 8, when BRMODE=0, the number of bits is set to 8 bits, when BRMODE=1, the number of bits is set to 9 bits, and when BRMODE=2 or 3, the number of bits is set to 10 bits. FIG. 8 shows an example in which the number of bits between the start bit and the stop bit in the frame for the semiconductor device 1 is 8 bits. That is, when BRMODE=0, the number of corresponding bits is the same between the semiconductor device 1 and the device 10, and when BRMODE=1, 2, or 3, the number of corresponding bits is different between the semiconductor device 1 and the device 10.

[0048] <5. Through output control> Here, the through output control by the semiconductor device 1, that is, the control when the bridge function is on, will be described.

[0049] 9 is a timing chart showing communication control when writing to the device 10. From the top to bottom of FIG. 9, receive data RX, receive data output selection signal (RX output select), transmit data output selection signal (TX output select), receive data BRX, transmit data BTX, and transmit data TX are shown (the same applies to FIG. 10, which will be described later). The receive data RX has the configuration shown in FIG. 7.

[0050] The received data RX is received by the first receiving unit 11 (FIG. 4). Upon receiving the start bit S1 (low level) at the beginning of the received data RX, the control unit 15 recognizes the start of reception of the received data RX. Thereafter, the control unit 15 recognizes that the bridge function is on from the bridge bit BR included in the received data RX, and also recognizes that it is a write from the read / write bit RW.

[0051] Thereafter, when the second data number frame ND2 is received, the control unit 15 changes the received data output selection signal in the register 151 from low to high at the stop bit P1 of the second data number frame ND2 (timing t1). This starts the through output of the received data RX, and the first receiving unit 11 and the first transmitting unit 12 output the received data RX as is as received data BRX. That is, the device data DDT (FIG. 7) is through output.

[0052] When the received data output selection signal goes high, the control unit 15 starts counting the number of frames of the received data RX (i.e., the number of frames of device data frames DDTF in the device data DDT). The number of frames of the device data frames DDTF is counted as one frame, which is the total number of bits set by the bridge mode information BRMODE described above plus the start bit and stop bit. For example, in the example of Figure 8, when BRMODE = 1, the total number of bits = 9 bits + 1 bit + 1 bit = 11 bits.

[0053] When the counted number of frames reaches the number of frames indicated by the received second data number frame ND2, the control unit 15 switches the received data output selection signal to low level and stops the through output (timing t2). Thereafter, the received data BRX is fixed to high level. In this case, the number of frames indicated by the second data number frame ND2 and the number of frames indicated by the first data number frame ND1 are the same.

[0054] In this way, in the write process, the device data frame DDTF corresponding to the number of bits set in the bridge mode information BRMODE is sent to the device 10 by the through output of the device data DDT.

[0055] 10 is a timing chart showing communication control when performing a read from the device 10. In this case, the received data RX has the structure shown in FIG.

[0056] After receiving the start bit S1 (low level) at the beginning of the received data RX, the control unit 15 recognizes that the bridge function is on from the bridge bit BR included in the received data RX, and also recognizes that it is a read from the read / write bit RW.

[0057] Thereafter, when the second data number frame ND2 is received, the control unit 15 changes both the receive data output selection signal and the transmit data output selection signal in the register 151 from low to high at the stop bit P1 of the second data number frame ND2 (timing t1). This initiates through-output of the receive data RX and the transmit data BTX. The first receive unit 11 and the first transmit unit 12 output the receive data RX as it is as receive data BRX, i.e., through-output of the device data DDT (FIG. 7) is performed. After completing output of the receive data BRX, the second receive unit 13 and the second transmit unit 14 through-output the transmit data BTX sent from the device 10 as transmit data TX.

[0058] When the reception data output selection signal and the transmission data output selection signal go high, the control unit 15 starts counting the number of frames of the reception data RX that are received. When the sum of the number of counted frames of the reception data RX and the number of counted frames of the transmission data BTX that are received thereafter reaches the number of frames indicated by the first data number frame ND1, the control unit 15 switches both the reception data output selection signal and the transmission data output selection signal to low, stopping the through output (timing t2). Thereafter, the transmission data TX is fixed to Hi-z (high impedance).

[0059] The number of frames of the received data RX and the transmitted data BTX is counted with the total number of bits, which is the sum of the number of bits set by the bridge mode information BRMODE described above, plus the start bit and stop bit, counted as one frame.

[0060] In this way, in the read process, the device data DDT is output through, and the device data frame DDTF corresponding to the number of bits set in the bridge mode information BRMODE is sent to the device 10. Furthermore, the transmission data BTX including the frame corresponding to this number of bits is output through as the transmission data TX.

[0061] Furthermore, the condition for ending the through output can be determined by the number of frames received by the semiconductor device 1. In particular, in this embodiment, even if transmission of the received data RX from the MCU 20 is interrupted due to interrupt processing in the MCU 20, the frame count does not advance during the interruption, so it is possible to avoid erroneously interrupting the through output. In other words, since interruption of the through output can be avoided regardless of the interrupt time, it is less subject to restrictions imposed by the specifications of the MCU 20.

[0062] <6.Conversion between UART and SPI> 11 is a diagram showing the configuration of a communication system 55 according to a modification of the present disclosure. The communication system 55 includes a semiconductor device 1 and an SPI device 100 that supports SPI (Serial Peripheral Interface). The SPI device 100 is configured as a semiconductor device having various functions, such as a motor driver.

[0063] The semiconductor device 1 in the communication system 55 has a CS terminal 1E and an SCK terminal 1F in addition to an RXD terminal 1C and a TXD terminal 1D. The SPI device 100 has an RX terminal 100A, a TX terminal 100B, a CS terminal 100C, and an SCK terminal 100D.

[0064] The RXD terminal 1C of the semiconductor device 1 is connected to the RX terminal 100A. The TXD terminal 1D of the semiconductor device 1 is connected to the TX terminal 100B. The received data BRX output from the RXD terminal 1C is input to the RX terminal 100A. The transmitted data BTX output from the TX terminal 100B is input to the TXD terminal 1D.

[0065] The CS terminal 1E of the semiconductor device 1 is connected to the CS terminal 100C. The SCK terminal 1F of the semiconductor device 1 is connected to the SCK terminal 100D. The chip select signal CS output from the CS terminal 1E is input to the CS terminal 100C. The clock signal SCK output from the SCK terminal 1F is input to the SCK terminal 100D. In other words, communication is performed between the semiconductor device 1 and the SPI device 100 using the signals BRX, BTX, CS, and SCK via the second bus BS2. In other words, the second bus BS2 corresponds to SPI.

[0066] The semiconductor device 1 operates as a master, and the SPI device 100 operates as a slave. When transmitting reception data BRX from the semiconductor device 1 to the SPI device 100, the semiconductor device 1 transmits a clock signal SCK to the SPI device 100. The semiconductor device 1 transmits the reception data BRX in synchronization with the clock signal SCK. The SPI device 100 receives the reception data BRX in synchronization with the clock signal SCK.

[0067] When transmitting data from the SPI device 100 to the semiconductor device 1, the semiconductor device 1 also transmits a clock signal SCK to the SPI device 100. The SPI device 100 transmits the clock signal SCK and transmission data BTX in synchronization with each other. The semiconductor device 1 receives the clock signal SCK and transmission data BTX in synchronization with each other.

[0068] The chip select signal CS can take on various levels indicating active and inactive states.

[0069] In this embodiment, the received data RX is directly output as received data BRX. The number of bits between the start bit and the stop bit of the frame included in the received data BRX is the number of bits set by the bridge mode information BRMODE. Furthermore, the semiconductor device 1 adds a start bit and a stop bit to the data of the number of bits set by the bridge mode information BRMODE included in the transmitted data BTX to form a frame, which is then output as transmitted data TX.

[0070] As described above, the semiconductor device 1 of this embodiment enables conversion between the UART format and the SPI format, and the MCU 20 can write or read data to or from the SPI device 100 via the semiconductor device 1.

[0071] <7. Vehicles> A vehicle will be described as an example of an application of the present disclosure. Fig. 12 is an external view showing a configuration example of a vehicle X. The vehicle X of this configuration example is equipped with various electronic devices X11 to X19 that operate by receiving power supply from a battery (not shown). Note that the installation positions of the electronic devices X11 to X19 in Fig. 12 may differ from the actual positions for convenience of illustration.

[0072] The electronic device X11 is an engine control unit that performs engine-related controls (injection control, electronic throttle control, idling control, oxygen sensor heater control, auto-cruise control, etc.).

[0073] The electronic device X12 is a lamp control unit that controls the turning on and off of HID (high intensity discharged lamp) and DRL (daytime running lamp).

[0074] The electronic device X13 is a transmission control unit that controls transmission-related functions.

[0075] The electronic device X14 is a body control unit that performs control related to the movement of the vehicle X (ABS [anti-lock brake system] control, EPS [electric power steering] control, electronic suspension control, etc.).

[0076] The electronic device X15 is a security control unit that controls the operation of door locks, burglar alarms, and other devices.

[0077] The electronic device X16 is an electronic device that is installed in the vehicle X at the time of shipment from the factory as a standard equipment or a manufacturer option, such as a wiper, an electric door mirror, a power window, a damper (shock absorber), an electric sunroof, and an electric seat.

[0078] The electronic device X17 is an electronic device that is optionally installed in the vehicle X as a user option, such as an in-vehicle A / V (audio / visual) device, a car navigation system, and an ETC (electronic toll collection system).

[0079] The electronic device X18 is an electronic device equipped with a high-voltage motor, such as an in-vehicle blower, oil pump, water pump, or battery cooling fan.

[0080] The electronic device X19 is a lamp control unit that controls the turning on and off of tail lamps, stop lamps, turn lamps, etc.

[0081] When the communication system 50 including the semiconductor device 1 and device 10 described above is applied to the vehicle X, for example, if the device 10 is a matrix switch IC, it can be applied to, for example, the electronic device X12 or X19. When the communication system 55 including the semiconductor device 1 and SPI device 100 described above is applied to the vehicle X, for example, if the SPI device 100 is a motor driver, it can be used to drive any of the electronic devices X11 to X18. When the vehicle X is an electric vehicle or a hybrid vehicle, the motor driver can also be used as a means for controlling a motor for driving the wheels.

[0082] <8.Other> In addition to the above-described embodiments, various modifications can be made to the various technical features disclosed in this specification without departing from the spirit of the technical creation. In other words, the above-described embodiments should be considered to be illustrative and not restrictive in all respects, and the technical scope of the present disclosure should not be limited to the above-described embodiments, but should be understood to include all modifications that fall within the meaning and scope equivalent to the claims.

[0083] <9. Notes> As described above, the semiconductor device (1) according to one embodiment of the present disclosure is A semiconductor device connectable to an external transmitting device (20) via a first bus (BS1) and connectable to an external device (10) via a second bus (BS2), a first receiving unit (11) configured to be able to receive received data (RX), which is serial data, from the transmitting device via the first bus; a first transmission unit (12) configured to be connectable to the device via the second bus, the first receiving unit and the first transmitting unit are configured to, when bridge selection data (BR) included in the received data indicates ON of a through output that outputs bit data as is between the first bus and the second bus, through output data (DDT) corresponding to a protocol of the device that is included in the received data to the second bus; a first bit number, which is the number of data bits between a start bit and a stop bit in a frame (SYN, RWD, ND1, ND2) before the through output included in the received data; The second number of bits, which is the number of data bits between the start bit and the stop bit in the frame (DDTF) of data output to the device by the through output, can be made different (first configuration).

[0084] In the first configuration, the second number of bits may be variably set to be different from or the same as the first number of bits (second configuration).

[0085] Furthermore, the second configuration may be configured to include a register (151) capable of setting information (BRMODE) for setting the second number of bits (third configuration).

[0086] In any one of the first to third configurations, the first bus and the second bus may both be configured to support UART (fourth configuration).

[0087] In any one of the first to third configurations, the first bus may be compatible with UART, and the second bus may be compatible with a communication format different from UART (fifth configuration).

[0088] In the fifth configuration, the communication format may be SPI (sixth configuration).

[0089] In addition, in any one of the first to sixth configurations, a second receiving unit (13) configured to be connectable to the device via the second bus; a second transmission unit (14) configured to be connectable to the first bus, The second receiving unit and the second transmitting unit may be configured to directly output transmission data (BTX) including a frame including a start bit, a stop bit, and the second number of data bits to the first bus (seventh configuration).

[0090] A communication system (50) according to an embodiment of the present disclosure includes the semiconductor device (1) of any one of the first to seventh configurations, the transmitting device, and the device (eighth configuration).

[0091] The communication system of the eighth configuration may be mountable on a vehicle (ninth configuration). [Industrial Applicability]

[0092] The present disclosure can be used, for example, in communication systems for various applications. [Explanation of symbols]

[0093] 1. Semiconductor device 1A RX terminal 1B TX terminal 1C RXD terminal 1D TXD terminal 1E CS terminal 1F SCK terminal 10 devices 10A RX terminal 10B TX terminal 11 First receiving unit 12 First transmission unit 13 Second receiving unit 14 Second transmission unit 15 Control Unit 30,40 CAN transceiver 30A TXD terminal 30B RXD terminal 35 CAN bus 40A RXD terminal 40B TXD terminal 50 Communication Systems 55 Communication Systems 100 SPI devices 100A RX terminal 100B TX terminal 100C CS terminal 100D SCK terminal 151 registers 301,302 CAN transceiver 401,402 CAN transceiver 501,502 Communication Systems BS1 Bus BS2 2nd bus X vehicle X11~X19 Electronic equipment

Claims

1. A semiconductor device connectable to an external transmitting device via a first bus and connectable to an external device via a second bus, a first receiving unit configured to be able to receive reception data, which is serial data, from the transmitting device via the first bus; a first transmission unit configured to be connectable to the device via the second bus, the first receiving unit and the first transmitting unit are configured to, when bridge selection data included in the received data indicates that a through output is on, in which bit data is output as is between the first bus and the second bus, through output data corresponding to a protocol of the device included in the received data to the second bus; a first bit number, which is the number of data bits between a start bit and a stop bit in a frame before the through output included in the received data; The semiconductor device, wherein the second number of bits, which is the number of data bits between a start bit and a stop bit in a frame of data output to the device by the through output, can be made different.

2. 2. The semiconductor device according to claim 1, wherein said second number of bits is variably settable to be different from or the same as said first number of bits.

3. The semiconductor device according to claim 2 , further comprising a register capable of setting information for setting said second number of bits.

4. 2. The semiconductor device according to claim 1, wherein said first bus and said second bus both support UART.

5. 2. The semiconductor device according to claim 1, wherein said first bus corresponds to a UART, and said second bus corresponds to a communication format different from the UART.

6. 6. The semiconductor device according to claim 5, wherein said communication format is SPI.

7. a second receiving unit configured to be connectable to the device via the second bus; a second transmitting unit configured to be connectable to the first bus, 2. The semiconductor device according to claim 1, wherein said second receiving section and said second transmitting section are configured to through-output to said first bus transmission data including a frame including a start bit, a stop bit, and said second number of data bits.

8. 8. A communication system comprising: the semiconductor device according to claim 1; the transmitting apparatus; and the device.

9. 9. The communication system according to claim 8, which is mountable in a vehicle.

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