Semiconductor device, power conversion device, and method for manufacturing semiconductor device

Abstract

To provide a technology that can suppress warping of a substrate in a semiconductor device including a substrate and a case, even when a large-area semiconductor element for large current is mounted.SOLUTION: A semiconductor device 202 includes a ceramic substrate 2 including a substrate pattern 5 carrying a circuit, a semiconductor element 6 mounted on the substrate pattern 5, a resin case 9 provided to surround the ceramic substrate 2 in a top view, a plurality of case patterns 14 carrying a circuit and provided around the ceramic substrate 2 on the resin case 9, terminals 11 provided on the outer edge of the resin case 9, and an internal wiring 7 electrically connecting the semiconductor element 6, the substrate pattern 5, and the plurality of case patterns 14. Some of the plurality of case patterns 14 and the terminals 11 are electrically connected.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device, a power conversion device, and a method for manufacturing a semiconductor device. [Background technology]

[0002] Semiconductor devices are mounted in inverters installed in electric railways, automobiles, and factory automation equipment. In a semiconductor device, a resin case is fixed to a ceramic substrate on which semiconductor elements and wiring are mounted, and the semiconductor elements are sealed with silicone gel.

[0003] When a ceramic substrate is used as the substrate for a semiconductor device, the substrate warps when the semiconductor element is soldered onto the circuit. If the warping is large, there is a concern that the warping of the substrate will be corrected when the semiconductor device is mounted on an external heat dissipation component, causing the substrate to crack. For this reason, it is desirable for the warping of the substrate to be as small as possible.

[0004] In Patent Document 1, a method is adopted in which a dummy circuit is formed on the surface of the substrate opposite to the circuit surface, and distortions on the top and bottom surfaces of the substrate are matched to suppress warping. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-100966 Summary of the Invention [Problem to be solved by the invention]

[0006] However, even when a dummy circuit is provided, when a semiconductor element is soldered to the circuit, the influence of the semiconductor element and solder causes the board directly below the semiconductor element to warp slightly. When multiple semiconductor elements are mounted, the warping directly below the semiconductor elements accumulates, and the board warping can become larger. Semiconductor elements for large currents in particular have a large surface area, so the impact of board warping is greater. For this reason, the larger the semiconductor element, the more difficult it becomes to control the warping of the entire board with a dummy circuit.

[0007] Therefore, the present disclosure aims to provide a technology that can suppress warping of a substrate in a semiconductor device having a substrate and a case, even when a large-area semiconductor element for high current is mounted. [Means for solving the problem]

[0008] The semiconductor device according to the present disclosure comprises a substrate including a substrate pattern carrying a circuit, a semiconductor element mounted on the substrate pattern, a case arranged to surround the substrate in a top view, a plurality of case patterns arranged around the substrate on the case and carrying the circuit, terminals arranged on the outer edge of the case, and internal wiring electrically connecting the semiconductor element, the substrate pattern, and the plurality of case patterns, and some of the plurality of case patterns are electrically connected to the terminals. [Effects of the Invention]

[0009] According to the present disclosure, by carrying circuits not only on the board pattern but also on the case pattern, the area of ​​the board pattern can be reduced, and therefore the area of ​​the board can be reduced, thereby suppressing warping of the board. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a top view of a semiconductor device according to a first embodiment. [Figure 2] FIG. 2 is a cross-sectional view taken along line AA in FIG. [Figure 3]2 is a top view of a resin case included in the semiconductor device according to the first embodiment. FIG. [Figure 4] 3 is a flowchart showing a method for manufacturing the semiconductor device according to the first embodiment. [Figure 5] FIG. 10 is a top view of a resin case included in the semiconductor device according to the second embodiment. [Figure 6] FIG. 10 is a diagram corresponding to FIG. 2 of the second embodiment. [Figure 7] FIG. 10 is a top view of a semiconductor device according to a third embodiment. [Figure 8] FIG. 10 is a top view of a substrate case included in a semiconductor device according to a fourth embodiment. [Figure 9] FIG. 10 is a top view of a terminal case included in the semiconductor device according to the fourth embodiment. [Figure 10] FIG. 10 is a cross-sectional view of the periphery of a signal terminal included in a semiconductor device according to a fourth embodiment. [Figure 11] 10 is a cross-sectional view showing a process of inserting a signal terminal into a socket provided in a terminal case in the fourth embodiment. FIG. [Figure 12] FIG. 10 is a block diagram showing a configuration of a power conversion system to which a power conversion device according to a fifth embodiment is applied. DETAILED DESCRIPTION OF THE INVENTION

[0011] <First Embodiment> The first embodiment will be described below with reference to the drawings. Fig. 1 is a top view of a semiconductor device 202 according to the first embodiment. Fig. 2 is a cross-sectional view taken along line AA in Fig. 1. Fig. 3 is a top view of a resin case 9 included in the semiconductor device 202 according to the first embodiment. Note that in Fig. 1, the sealing material 15 is omitted to make the internal structure easier to see.

[0012] First, we will explain the configuration of the semiconductor device 202. As shown in Figures 1 and 2, the semiconductor device 202 includes a plurality of ceramic substrates 2 (corresponding to substrates), a plurality of semiconductor elements 6, a resin case 9 (corresponding to a case), a plurality of case patterns 14, a plurality of signal terminals 11 (corresponding to terminals), internal wiring 7, and a sealing material 15.

[0013] The ceramic substrate 2 is an integrated component that includes a ceramic plate 4, a metal plate 3 provided on the back surface of the ceramic plate 4, and a substrate pattern 5 that carries a circuit and is provided on the top surface of the ceramic plate 4. The ceramic plate 4 is made of an inorganic material such as silicon dioxide (SiO2), alumina (Al2O3), aluminum nitride (AlN), silicon nitride (Si4N4), or magnesium oxide (MgO). The substrate pattern 5 is made of, for example, a metal.

[0014] The semiconductor element 6 is mounted on each substrate pattern 5 via a bonding material 8. The bonding material 8 has electrical conductivity. The bonding material 8 is, for example, solder, Ag paste, or sintering paste.

[0015] The semiconductor element 6 is a power semiconductor element, a control IC (Integrated Circuit) for controlling the power semiconductor element, etc. The semiconductor element 6 is, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a Schottky barrier diode, or a freewheeling diode, etc. Alternatively, the semiconductor element 6 may be an RC-IGBT (Reverse-Conducting IGBT) in which an IGBT and a freewheeling diode are formed within a single semiconductor substrate.

[0016] The semiconductor element 6 is made of silicon (Si) or a wide bandgap semiconductor. The wide bandgap semiconductor includes any one of silicon carbide (SiC), a material containing gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor element 6 made of a wide bandgap semiconductor reduces power loss of the semiconductor device 202.

[0017] 1 to 3, the resin case 9 is provided so as to surround the plurality of ceramic substrates 2 in top view. The resin case 9 is formed of a thermoplastic resin such as PPS (Polyphenylene Sulfide), ABS resin, or PBT (Polybutylene Terephthalate), or a thermosetting resin such as epoxy resin. The resin case 9 includes a case main body 10a that is substantially rectangular in top view, and a frame body 10b that surrounds the case main body 10a in top view.

[0018] The case body 10a is provided with a plurality of substrate mounting portions 20 for respectively mounting the plurality of ceramic substrates 2. The plurality of substrate mounting portions 20 are through-holes that are rectangular in top view and formed to penetrate the vertical surfaces of the case body 10a. A plurality of case patterns 14 that support circuits are provided around the plurality of ceramic substrates 2 on the case body 10a (in other words, around the plurality of substrate mounting portions 20).

[0019] A plurality of signal terminals 11 and a plurality of screw hole terminals 16 are provided on the top surface of the frame body 10b. Four screw holes 12 are formed in each of the portions of the frame body 10b corresponding to the four corners of the resin case 9. The screw holes 12 are used when attaching the semiconductor device 202 to an external heat dissipation member (not shown) with screws. When the semiconductor device 202 is electrically connected to an external board (not shown), the signal terminals 11 carry electrical signals, and the screw hole terminals 16 carry large currents.

[0020] The case patterns 14 are made of metal. A portion of the case patterns 14 is integral with the signal terminals 11 and the screw hole terminals 16.

[0021] As shown in FIG. 2, the ceramic substrate 2 is attached to the resin case 9 by fixing the outer edge of the ceramic plate 4 to the peripheral edge of the substrate attachment portion 20 on the back surface of the case body 10a via adhesive 13.

[0022] The adhesive 13 is a material containing resin or ceramic. The resin is, for example, a silicone resin, an epoxy resin, or an acrylic resin. The ceramic is, for example, a material containing silicon dioxide (SiO2). It is desirable that the adhesive 13 be made of a material with a lower elastic modulus than the resin case 9.

[0023] 1, the internal wiring 7 is an aluminum wire, and forms a circuit by electrically connecting the board pattern 5, the semiconductor element 6, and the case pattern 14. The internal wiring 7 is not limited to an aluminum wire, and may be a metal frame (direct lead) made from a processed thin metal plate, or a metal ribbon.

[0024] Generally, a substrate pattern has a die bond portion for mounting a semiconductor element 6 and a heat diffusion portion for spreading the heat of the semiconductor element 6, but as shown in Figures 1 and 2, the substrate pattern 5 does not include anything other than the die bond portion for mounting the semiconductor element 6.

[0025] As shown in FIG. 2, the inside of the frame body 10b, i.e., on the case main body 10a, is filled with a sealing material 15, and the semiconductor element 6, ceramic substrate 2, internal wiring 7, and case pattern 14 are covered with the sealing material 15.

[0026] Some of the multiple case patterns 14 are electrically connected to the signal terminals 11 or screw hole terminals 16, while the rest are not electrically connected to the signal terminals 11 or screw hole terminals 16. The case patterns 14 are formed by insert molding at the same time as the resin case 9 is manufactured. Alternatively, a plate-shaped case pattern 14 may be fixed onto the resin case 9 when the semiconductor device 202 is manufactured. Since the bonding strength between the resin and the insert part is generally low in insert molding, when the case pattern 14 is incorporated, it is desirable to cover and fix the side surfaces of the case pattern 14 with the resin case 9. On the other hand, when the semiconductor device 202 is manufactured, sufficient bonding strength can be obtained even if the resin case 9 does not contact the side surfaces of the case pattern 14. To fix the case pattern 14, for example, an adhesive 13 is used.

[0027] Next, a method for manufacturing the semiconductor device 202 according to the first embodiment will be described with reference to Fig. 4. Fig. 4 is a flowchart showing the method for manufacturing the semiconductor device 202 according to the first embodiment.

[0028] 4, in a preparation step, a ceramic substrate 2 on which a semiconductor element 6 is mounted is prepared by die bonding or the like (step S1). In a resin case fixing step, a resin case 9 and the ceramic substrate 2 are fixed together with an adhesive 13 (step S2).

[0029] Next, in a case pattern fixing process, the resin case 9 and the case pattern 14 are fixed together with adhesive 13 (step S3). In a wire bonding process, the internal wiring 7 connected to the semiconductor element 6 mounted on the substrate pattern 5, the internal wiring 7 connected to the substrate pattern 5, and the internal wiring 7 connected to the case pattern 14 are joined (step S4).

[0030] Next, in a sealing process (not shown), the case body 10a in the frame 10b is filled with a sealant 15. If the sealant 15 has a hardening property, the sealant 15 is then hardened to seal the semiconductor element 6, the internal wiring 7, etc., and the semiconductor device 202 is completed.

[0031] Next, the effects of embodiment 1 will be described. Semiconductor device 202 according to embodiment 1 includes ceramic substrate 2 including substrate pattern 5 carrying a circuit, semiconductor element 6 mounted on substrate pattern 5, resin case 9 provided to surround ceramic substrate 2 in top view, multiple case patterns 14 carrying a circuit and provided around ceramic substrate 2 on resin case 9, signal terminals 11 provided on the outer edge of resin case 9, and internal wiring 7 electrically connecting semiconductor element 6, substrate pattern 5, and multiple case patterns 14. Some of the multiple case patterns 14 and signal terminals 11 are electrically connected.

[0032] Therefore, by having the circuit carried not only by the board pattern 5 but also by the case pattern 14, the area of ​​the board pattern 5 can be reduced, and therefore the area of ​​the ceramic substrate 2. This makes it possible to suppress warping of the ceramic substrate 2.

[0033] Furthermore, since the substrate pattern 5 does not include any portion other than the die bond portion for mounting the semiconductor element 6, the area of ​​the ceramic substrate 2 can be reduced to the minimum necessary size, thereby further suppressing warping of the ceramic substrate 2.

[0034] Furthermore, since the semiconductor device 202 includes a plurality of ceramic substrates 2, it is possible to reduce the size of each ceramic substrate 2. This makes it possible to further suppress warping of the ceramic substrates 2.

[0035] Furthermore, when driving a three-phase motor in the power semiconductor device 202, six semiconductor elements 6 of the same type, for example, IGBTs, may be used. By allocating one ceramic substrate 2 of the same shape to each of the six semiconductor elements 6, the overall area of ​​the ceramic substrate 2 can be minimized. In this case, since the ceramic substrates 2 have the same shape, the time required for setup when changing substrates can be reduced, thereby improving productivity.

[0036] Furthermore, because case pattern 14 is directly connected to signal terminals 11 or screw hole terminals 16, there is no need for internal wiring 7 for connecting to signal terminals 11 or screw hole terminals 16. This reduces the number of internal wirings 7, improving productivity during wire bonding.

[0037] Furthermore, when the case pattern 14 is attached during the resin case fixing process, the arrangement and shape of the case pattern 14 can be changed as appropriate to make it easier to connect the internal wiring 7, which also has the effect of reducing poor connections of the internal wiring 7.

[0038] Furthermore, the semiconductor element 6 is made of a wide bandgap semiconductor material. The wide bandgap semiconductor material is any one of silicon carbide, gallium nitride-based materials, and diamond. This makes it possible to reduce power loss in the semiconductor device 202. Furthermore, wide bandgap semiconductors are used at high temperatures, but stable heat dissipation can be ensured even in such cases, resulting in high reliability in the semiconductor device 202.

[0039] <Embodiment 2> Next, a semiconductor device 202 according to embodiment 2 will be described. Fig. 5 is a top view of a resin case 9 included in the semiconductor device 202 according to embodiment 2. Fig. 6 is a view corresponding to Fig. 2 of embodiment 2. Note that in embodiment 2, the same components as those described in embodiment 1 are denoted by the same reference numerals, and description thereof will be omitted.

[0040] 5 and 6, the second embodiment differs from the first embodiment in the shape of the rear surface of the resin case 9. The semiconductor device 202 according to the second embodiment further includes a case heat sink 30 provided on the rear surface side of the resin case 9. The case heat sink 30 is fixed to the rear surface of the case main body 10a.

[0041] The case heat sink 30 is attached to the case body 10a by fixing the outer edge of the case heat sink 30 to the peripheral edge of the substrate mounting portion 20 on the back surface of the case body 10a. The ceramic substrate 2 is fixed to the top surface of the case heat sink 30 with a substrate bonding material 31 such as solder. The case heat sink 30 is provided directly below the substrate mounting portion 20, and the back surface of the case heat sink 30 is located lower than the back surface of the case body 10a. The case heat sink 30 is integrated with the case body 10a by insert molding, which is used to form the resin case 9. By attaching the ceramic substrate 2 to the case heat sink 30, the heat dissipation performance of the ceramic substrate 2 is improved.

[0042] By providing the case heat sink 30, even if the ceramic substrate 2 warps, the back surface of the case heat sink 30 does not warp, so even when the semiconductor device 202 is attached to an external heat dissipation member, the stress on the ceramic substrate 2 is reduced. For example, when solder is used as the substrate bonding material 31, the larger the volume of the soldering, the more likely shrinkage cavities are to occur. As in the second embodiment, by having the case pattern 14 also carry a circuit and reducing the area of ​​the ceramic substrate 2, the volume of the substrate bonding material 31 is reduced, thereby suppressing shrinkage cavities.

[0043] One case heat sink 30 may be provided for each board mounting portion 20, or one large case heat sink 30 may be provided to cover all of the board mounting portions 20. In either case, the same effect can be obtained.

[0044] Furthermore, the case heat sink 30 may be attached later during the manufacturing process of the semiconductor device 202, other than when the resin case 9 is insert-molded. For example, the case heat sink 30 may be fixed to the resin case 9 with adhesive 13 in the resin case fixing process.

[0045] <Third Embodiment> Next, a semiconductor device 202 according to a third embodiment will be described. Fig. 7 is a top view of the semiconductor device 202 according to the third embodiment. In Fig. 7, the sealing material 15 is omitted to make the internal structure easier to see. In the third embodiment, the same components as those described in the first and second embodiments are denoted by the same reference numerals, and description thereof will be omitted.

[0046] As shown in FIG. 7, in the third embodiment, a dummy pattern 40 is further provided in comparison with the first and second embodiments. The semiconductor device 202 according to the third embodiment further includes a dummy pattern 40 provided around the ceramic substrate 2 on the resin case 9, and the dummy pattern 40 and a plurality of case patterns 14 coexist. The material of the dummy pattern 40 is preferably the same as that of the case pattern 14, but may be different. The dummy pattern 40 is formed by the same method as that of the case pattern 14. Furthermore, the internal wiring 7 is not connected to the dummy pattern 40.

[0047] By arranging dummy patterns 40 in parts of the resin case 9 where no case patterns 14 are arranged, it is possible to prevent the resin case 9 from being distorted by the case patterns 14. When components arranged inside the resin case 9 are joined with adhesive or solder, the resin case 9 may be exposed to high temperatures. If the linear expansion coefficients of the resin case 9 and the case patterns 14 differ, distortion may occur due to temperature changes at high temperatures, causing the entire resin case 9 to distort. Since the distortion differs between parts where the case patterns 14 are arranged and parts where they are not arranged, the amount of deformation differs and appears as distortion. By providing dummy patterns 40 in parts where the case patterns 14 are not arranged, distortion is generated evenly within the surface of the resin case 9, making it possible to prevent distortion of the entire resin case 9.

[0048] Furthermore, by providing the dummy pattern 40, a temporary bond can be made on the dummy pattern 40 in the wire bonding process, and the bonding quality of the internal wiring 7 can be checked, thereby improving the yield in the wire bonding process.

[0049] <Fourth Embodiment> Next, a semiconductor device 202 according to a fourth embodiment will be described. Fig. 8 is a top view of a board case 51 provided in the semiconductor device 202 according to the fourth embodiment. Fig. 9 is a top view of a terminal case 52 provided in the semiconductor device 202 according to the fourth embodiment. Fig. 10 is a cross-sectional view of the periphery of a signal terminal 11 provided in the semiconductor device 202 according to the fourth embodiment. Note that in the fourth embodiment, the same components as those described in the first to third embodiments are designated by the same reference numerals, and description thereof will be omitted.

[0050] 8 to 10, the fourth embodiment differs from the first to third embodiments in the structure of the resin case. A semiconductor device 202 according to the fourth embodiment includes a resin case 50 instead of the resin case 9. The resin case 50 includes a board case 51 and a terminal case 52 that can be attached to the outer edge of the board case 51 so as to surround the board case 51 in a top view.

[0051] The terminal case 52 is provided with a plurality of sockets 53 penetrating the upper and lower surfaces of the terminal case 52. The signal terminals 11 are inserted into the sockets 53. One end of the signal terminals 11 protrudes upward from the front surface of the terminal case 52, and the other end of the signal terminals 11 is exposed from the back surface of the terminal case 52. The board case 51 is provided with a plurality of case patterns 14, some of which are provided around the signal terminals 11. The other end of the signal terminals 11 and some of the case patterns 14 provided around the signal terminals 11 are joined with a bonding material 54. When the terminal case 52 is not attached to the board case 51, the case patterns 14 are not electrically connected to the signal terminals 11 and the screw hole terminals 16.

[0052] The terminal case 52 is attached to the board case 51, and the board case 51 and the terminal case 52 are integrated to form the resin case 50. The case pattern 14 of the board case 51 is joined to the signal terminals 11 and the screw hole terminals 16 of the terminal case 52 by a bonding material 54. A conductive bonding material such as solder, Ag sintering agent, or Ag paste is used as the bonding material 54. In addition, a dam material 55 covers the space between the board case 51 and the terminal case 52 along the inner periphery of the terminal case 52.

[0053] Next, differences between the manufacturing method of semiconductor device 202 according to the fourth embodiment and the first embodiment will be described with reference to Fig. 4 and Fig. 11. Fig. 11 is a cross-sectional view showing a step of inserting signal terminal 11 into socket 53 provided in terminal case 52 in the fourth embodiment.

[0054] 4 and 11, in a preparation step (step S1), signal terminals 11 are inserted from below sockets 53 of terminal case 52. In a resin case fixing step (step S2), signal terminals 11 of terminal case 52 and case patterns 14 of board case 51 are joined with joining material 54.

[0055] When filling the sealing material 15 in a sealing process (not shown), there is a possibility that the sealing material 15 may leak to the outside from gaps between the board case 51 and the terminal case 52 other than the portion joined by the bonding material 54. Therefore, a dam material 55 with high viscosity is placed in the relevant area. If the viscosity of the sealing material 15 is high, it will not leak from the gap. Therefore, if a sealing material that hardens quickly and has high viscosity is used, for example, there is no problem in filling the sealing material 15 as is without placing the dam material 55. In this case, the viscosity is, for example, 50 Pa s or more.

[0056] Dividing the resin case 50 into a substrate case 51 and a terminal case 52 and providing sockets 53 in the terminal case 52 provides the following advantages. When the number of models of the semiconductor device 202 increases, it becomes necessary to change the positions of the signal terminals 11. However, the position can be changed by inserting the signal terminals 11 into any of the sockets 53. Furthermore, by changing the arrangement and shape of the case pattern 14 to match the positions of the signal terminals 11, the electrical connections within the substrate case 51 can also be changed. Therefore, since it is not necessary to create a new mold for the resin case 50 when expanding the number of models, the production period is shortened and productivity is improved, and the size of the ceramic substrate 2 can be reduced, thereby suppressing warping of the ceramic substrate 2.

[0057] <Fifth Embodiment> In this embodiment, the semiconductor device 202 according to the above-described embodiments 1 to 4 is applied to a power conversion device. Although the application of the semiconductor device 202 according to the embodiments 1 to 4 is not limited to a specific power conversion device, the following will describe a case where the semiconductor device 202 according to the embodiments 1 to 4 is applied to a three-phase inverter as the fourth embodiment.

[0058] FIG. 12 is a block diagram showing a configuration of a power conversion system to which a power conversion device 200 according to the fifth embodiment is applied.

[0059] The power conversion system shown in Fig. 12 is composed of a power supply 100, a power conversion device 200, and a load 300. The power supply 100 is a DC power supply and supplies DC power to the power conversion device 200. The power supply 100 can be configured from a variety of sources, such as a DC system, a solar cell, or a storage battery, or it may be configured from a rectifier circuit or an AC / DC converter connected to an AC system. The power supply 100 may also be configured from a DC / DC converter that converts DC power output from a DC system into a predetermined power.

[0060] The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300, and converts DC power supplied from the power source 100 into AC power and supplies the AC power to the load 300. As shown in Fig. 12 , the power conversion device 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal to the main conversion circuit 201 to control the main conversion circuit 201.

[0061] The load 300 is a three-phase electric motor driven by AC power supplied from the power conversion device 200. The load 300 is not limited to a specific application, but is an electric motor mounted on various electrical devices, and is used as an electric motor for, for example, a hybrid vehicle, an electric vehicle, a railroad car, an elevator, or an air conditioning device.

[0062] The power conversion device 200 will be described in detail below. The main conversion circuit 201 includes switching elements (not shown) and freewheeling diodes (not shown). By switching the switching elements, DC power supplied from the power supply 100 is converted into AC power and supplied to the load 300. There are various specific circuit configurations for the main conversion circuit 201, but the main conversion circuit 201 according to this embodiment is a two-level three-phase full-bridge circuit that can be configured with six switching elements and six freewheeling diodes connected in anti-parallel to each switching element. At least one of the switching elements and freewheeling diodes of the main conversion circuit 201 is configured with the semiconductor device 202 according to any one of the above-mentioned first to fourth embodiments. Two of the six switching elements are connected in series to form upper and lower arms, and each upper and lower arm forms one phase (U phase, V phase, W phase) of the full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0063] The main conversion circuit 201 also includes a drive circuit (not shown) that drives each switching element, but the drive circuit may be built into the semiconductor device 202, or may be provided separately from the semiconductor device 202. The drive circuit generates drive signals that drive the switching elements of the main conversion circuit 201 and supplies them to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, in accordance with control signals from a control circuit 203 (described later), the drive circuit outputs to the control electrodes of each switching element a drive signal that turns the switching element on and a drive signal that turns the switching element off. When maintaining a switching element in the on state, the drive signal is a voltage signal (on signal) that is equal to or greater than the threshold voltage of the switching element, and when maintaining a switching element in the off state, the drive signal is a voltage signal (off signal) that is equal to or less than the threshold voltage of the switching element.

[0064] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that the desired power is supplied to the load 300. Specifically, it calculates the time (on time) that each switching element of the main conversion circuit 201 should be in the on state based on the power to be supplied to the load 300. For example, the main conversion circuit 201 can be controlled by PWM control, which modulates the on time of the switching elements according to the voltage to be output. Then, it outputs a control command (control signal) to a drive circuit provided in the main conversion circuit 201 so that an on signal is output to a switching element that should be in the on state at each time point, and an off signal is output to a switching element that should be in the off state at each time point. In accordance with this control signal, the drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switching element.

[0065] In the power conversion device 200 according to this embodiment, the semiconductor device 202 according to any one of the first to fourth embodiments is applied as the switching element and the free wheel diode of the main conversion circuit 201, thereby achieving an improvement in productivity.

[0066] In the present embodiment, an example has been described in which the semiconductor device 202 according to the first to fourth embodiments is applied to a two-level three-phase inverter, but the application of the semiconductor device 202 according to the first to fourth embodiments is not limited to this, and the semiconductor device 202 can be applied to various power conversion devices. In the present embodiment, the two-level power conversion device is described, but a three-level or multi-level power conversion device may also be used, and when power is supplied to a single-phase load, the semiconductor device 202 according to the first to fourth embodiments may be applied to a single-phase inverter. Furthermore, when power is supplied to a DC load or the like, the semiconductor device 202 according to the first to fourth embodiments can also be applied to a DC / DC converter or an AC / DC converter.

[0067] Furthermore, the power conversion device to which the semiconductor device 202 according to any one of the first to fourth embodiments is applied is not limited to the case where the load is an electric motor, but can also be used, for example, as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a contactless power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, etc.

[0068] It should be noted that the embodiments can be freely combined, and each embodiment can be modified or omitted as appropriate.

[0069] Various aspects of the present disclosure are summarized below as appendices.

[0070] (Appendix 1) a substrate including a substrate pattern carrying a circuit; a semiconductor element mounted on the substrate pattern; a case provided to surround the substrate in a top view; a plurality of case patterns provided around the substrate on the case and carrying the circuit; a terminal provided on an outer edge of the case; and internal wiring electrically connecting the semiconductor element, the substrate pattern, and a plurality of the case patterns, The semiconductor device, wherein some of the case patterns and the terminals are electrically connected to each other.

[0071] (Appendix 2) 2. The semiconductor device according to claim 1, wherein the substrate pattern does not include anything other than a die bond portion for mounting the semiconductor element.

[0072] (Appendix 3) 3. The semiconductor device according to claim 1, further comprising a plurality of the substrates.

[0073] (Appendix 4) Further, a case heat sink is provided on the rear surface side of the case, 4. The semiconductor device according to claim 1, wherein the case heat sink is fixed to a rear surface of the substrate.

[0074] (Appendix 5) The circuit board further includes a dummy pattern provided on the case around the substrate, the dummy pattern and the plurality of case patterns coexist, 5. The semiconductor device according to claim 1, wherein the internal wiring is not connected to the dummy pattern.

[0075] (Appendix 6) the case includes a board case and a terminal case that can be attached to an outer edge of the board case so as to surround the board case in a top view, The substrate case is provided with a plurality of the case patterns, Some of the case patterns are provided around the terminals, The terminal case is provided with the terminal, which has one end protruding upward from a surface of the terminal case and the other end exposed from a back surface of the terminal case, 6. The semiconductor device according to claim 1, wherein the other end of the terminal and some of the case patterns arranged around the terminal are joined by a bonding material.

[0076] (Appendix 7) The terminal case has a plurality of sockets penetrating the upper and lower surfaces of the terminal case, 7. The semiconductor device according to claim 6, wherein the terminals are inserted into some of the sockets.

[0077] (Appendix 8) 8. The semiconductor device according to claim 1, wherein the semiconductor element is made of a wide bandgap semiconductor material.

[0078] (Appendix 9) 9. The semiconductor device according to claim 8, wherein the wide bandgap semiconductor material is any one of silicon carbide, a gallium nitride-based material, and diamond.

[0079] (Appendix 10) a main conversion circuit including the semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 9, which converts input power and outputs the converted power; a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit; A power conversion device comprising:

[0080] (Appendix 11) A manufacturing method for manufacturing the semiconductor device according to any one of claims 1 to 5, a preparation step of mounting the semiconductor element on the substrate pattern; a resin case fixing step of integrally fixing the case and the substrate; a case pattern fixing step of integrally fixing the case and the case pattern; a wire bonding process for joining the internal wiring connected to the semiconductor element mounted on the substrate pattern, the internal wiring connected to the substrate pattern, and the internal wiring connected to the case pattern; A method for manufacturing a semiconductor device, comprising:

[0081] (Appendix 12) A manufacturing method for manufacturing the semiconductor device according to Supplementary Note 7, comprising: a preparation step of mounting the semiconductor element on the substrate pattern; a resin case fixing step of integrally fixing the case and the substrate; a case pattern fixing step of integrally fixing the case and the case pattern; a wire bonding process of joining the internal wiring connected to the semiconductor element mounted on the substrate pattern, the internal wiring connected to the substrate pattern, and the internal wiring connected to the case pattern, the preparing step includes inserting the terminal into the socket; The resin case fixing step includes a step of joining the terminal and the case pattern. [Explanation of symbols]

[0082] 2 ceramic substrate, 5 substrate pattern, 6 semiconductor element, 7 internal wiring, 9 resin case, 11 signal terminal, 14 case pattern, 30 case heat sink, 40 dummy pattern, 50 resin case, 51 substrate case, 52 terminal case, 53 socket, 54 bonding material, 200 power conversion device, 201 main conversion circuit, 202 semiconductor device, 203 control circuit.

Claims

1. a substrate including a substrate pattern carrying a circuit; a semiconductor element mounted on the substrate pattern; a case provided to surround the substrate in a top view; a plurality of case patterns provided around the substrate on the case and carrying the circuit; a terminal provided on an outer edge of the case; and internal wiring electrically connecting the semiconductor element, the substrate pattern, and the plurality of case patterns, The semiconductor device, wherein some of the case patterns and the terminals are electrically connected to each other.

2. 2. The semiconductor device according to claim 1, wherein said substrate pattern does not include anything other than a die bond portion for mounting said semiconductor element.

3. The semiconductor device according to claim 1 , comprising a plurality of said substrates.

4. Further, a case heat sink is provided on the rear surface side of the case, 2. The semiconductor device according to claim 1, wherein said case heat sink is fixed to a rear surface of said substrate.

5. The circuit board further includes a dummy pattern provided on the case around the substrate, the dummy pattern and the plurality of case patterns coexist, 2. The semiconductor device according to claim 1, wherein said internal wiring is not connected to said dummy pattern.

6. the case includes a board case and a terminal case that can be attached to an outer edge of the board case so as to surround the board case in a top view, The substrate case is provided with a plurality of the case patterns, some of the case patterns are provided around the terminals, The terminal case is provided with the terminal, which has one end protruding upward from a surface of the terminal case and the other end exposed from a back surface of the terminal case, 2. The semiconductor device according to claim 1, wherein the other end of the terminal and a part of the plurality of case patterns provided around the terminal are joined by a joining material.

7. The terminal case has a plurality of sockets penetrating the upper and lower surfaces of the terminal case, 7. The semiconductor device according to claim 6, wherein the terminals are inserted into some of the sockets.

8. 2. The semiconductor device according to claim 1, wherein the semiconductor element is made of a wide bandgap semiconductor material.

9. 9. The semiconductor device according to claim 8, wherein the wide bandgap semiconductor material is any one of silicon carbide, a gallium nitride-based material, and diamond.

10. a main conversion circuit including the semiconductor device according to any one of claims 1 to 9, which converts input power and outputs the converted power; a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit; A power conversion device comprising:

11. A method for manufacturing the semiconductor device according to claim 1, comprising: a preparation step of mounting the semiconductor element on the substrate pattern; a resin case fixing step of integrally fixing the case and the substrate; a case pattern fixing step of integrally fixing the case and the case pattern; a wire bonding process for joining the internal wiring connected to the semiconductor element mounted on the substrate pattern, the internal wiring connected to the substrate pattern, and the internal wiring connected to the case pattern; A method for manufacturing a semiconductor device, comprising:

12. A method for manufacturing the semiconductor device according to claim 7, comprising the steps of: a preparation step of mounting the semiconductor element on the substrate pattern; a resin case fixing step of integrally fixing the case and the substrate; a case pattern fixing step of integrally fixing the case and the case pattern; a wire bonding process of joining the internal wiring connected to the semiconductor element mounted on the substrate pattern, the internal wiring connected to the substrate pattern, and the internal wiring connected to the case pattern, the preparing step includes inserting the terminal into the socket; The resin case fixing step includes a step of joining the terminal and the case pattern.

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