Power conversion device
By mixing semiconductor modules with different numbers of signal terminals, the power conversion device addresses the issue of circuit board size expansion by enhancing wiring flexibility and efficiency.
Patent Information
- Application Number
- JP2024059529
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-04-02
- Publication Date
- 2025-10-15
AI Technical Summary
The existing power conversion devices face an increase in circuit board size due to the need for extensive wiring connections between semiconductor modules and their corresponding circuits, which are arranged in different directions.
The power conversion device incorporates a mix of semiconductor modules with varying numbers of signal terminals, specifically using fewer signal terminals in some modules to enhance wiring flexibility and prevent board size expansion.
This approach reduces the number of signal terminals, thereby minimizing the circuit board's physical size and improving wiring efficiency.
Smart Images

Figure 2025156822000001_ABST
Abstract
Description
[Technical Field]
[0001] The disclosure herein relates to power conversion devices. [Background technology]
[0002] Patent Document 1 discloses a power conversion device including a circuit board (control board) and multiple semiconductor modules (power modules). The semiconductor modules have multiple signal terminals (signal lines) arranged in a predetermined direction. The signal terminals are mounted on the circuit board. The multiple semiconductor modules are stacked in a direction perpendicular to the direction in which the signal terminals are arranged. The contents of the prior art documents are incorporated by reference as explanations of the technical elements in this specification. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-163446 Summary of the Invention [Problem to be solved by the invention]
[0004] The circuit board is provided with circuits such as a gate drive circuit (driver) for each semiconductor module. The signal terminals mounted on the circuit board are electrically connected to the corresponding circuits via wiring. In the stacking direction, the area where the circuits corresponding to each semiconductor module are formed is larger than the area where the signal terminals are mounted. Therefore, it is necessary to pull out wiring, for example in a fan shape, from the signal terminals of the multiple semiconductor modules arranged in the stacking direction and connect them to the circuits. As such, since it is necessary to route the wiring in the stacking direction and the direction in which the signal terminals are arranged to connect to the circuits, there is a risk that the physical size of the circuit board will increase. In the above-mentioned perspectives and in other perspectives not mentioned, further improvements are required in power conversion devices.
[0005] One object of the present disclosure is to provide a power conversion device that can suppress an increase in the size of a circuit board. [Means for solving the problem]
[0006] One aspect of the disclosure is A power conversion device constituting a power conversion circuit, a circuit board (23) having wiring; a plurality of semiconductor modules (21) each including at least one semiconductor element (40) and a plurality of signal terminals (84) electrically connected to the semiconductor element and mounted on a circuit board arranged in a predetermined direction, the semiconductor modules (21) being stacked in a direction perpendicular to the predetermined direction; Equipped with The plurality of semiconductor modules include a first semiconductor module (21A) and a second semiconductor module (21B) having a smaller number of signal terminals than the first semiconductor module.
[0007] According to the disclosed power conversion device, instead of using only a plurality of first semiconductor modules, the first semiconductor modules are mixed with second semiconductor modules having fewer signal terminals than the first semiconductor modules. This reduces the number of signal terminals compared to a configuration using only the first semiconductor modules, improving wiring flexibility. This prevents the increase in the size of the circuit board.
[0008] The various aspects disclosed in this specification employ different technical means to achieve their respective objectives. The reference numerals in parentheses in the claims are intended to exemplarily indicate the corresponding parts of the embodiments described below, and are not intended to limit the technical scope. The objectives, features, and advantages disclosed in this specification will become more apparent by reference to the following detailed description and the accompanying drawings. [Brief explanation of the drawings]
[0009] [Figure 1] 1 is a diagram showing a power conversion circuit and a drive system to which a power conversion device according to a first embodiment is applied. [Figure 2] FIG. 2 is a plan view showing the power conversion device. [Figure 3] FIG. 3 is a plan view seen from the X1 direction in FIG. 2. [Figure 4] FIG. 2 is a plan view showing a first semiconductor module. [Figure 5] FIG. 2 is a plan view showing a second semiconductor module. [Figure 6] 4 is a plan view showing a portion of the first semiconductor module covered with a sealing body. FIG. [Figure 7] 10 is a plan view showing a portion of the second semiconductor module covered with a sealing body. FIG. [Figure 8] FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. [Figure 9] FIG. 2 is a plan view showing the substrate on the drain electrode side. [Figure 10] FIG. 2 is a plan view showing the substrate on the source electrode side. [Figure 11] FIG. 10 is a diagram showing connections between pads and signal terminals in the first semiconductor module. [Figure 12] FIG. 10 is a diagram showing connections between pads and signal terminals in the second semiconductor module. [Figure 13] FIG. [Figure 14] FIG. 10 is a diagram showing a comparison with a reference example. [Figure 15] 10 is a diagram showing connections between pads of a second semiconductor module and signal terminals in a power conversion device according to a second embodiment. FIG. [Figure 16] 10 is a diagram showing connections between pads of a second semiconductor module and signal terminals in a power conversion device according to a third embodiment. FIG. [Figure 17] FIG. 10 is a diagram showing a stack of semiconductor modules and coolers in a power conversion device according to a fourth embodiment. [Figure 18] FIG. [Figure 19] FIG. 10 is a diagram showing a stack of semiconductor modules and coolers in a power converter according to a fifth embodiment. [Figure 20] FIG. DETAILED DESCRIPTION OF THE INVENTION
[0010] Hereinafter, several embodiments will be described with reference to the drawings. Note that in each embodiment, corresponding components are designated by the same reference numerals, and redundant description may be omitted. When only a portion of the configuration is described in each embodiment, the configuration of another embodiment previously described may be applied to the remaining portion of the configuration. Furthermore, in addition to the combinations of configurations explicitly stated in the description of each embodiment, configurations of several embodiments may be partially combined together even if not explicitly stated, provided that there is no particular problem with the combination.
[0011] (First embodiment) The semiconductor device of this embodiment is applied to, for example, a mobile object using a rotating electric machine as a drive source. The mobile object may be, for example, an electric vehicle such as a battery electric vehicle (BEV), a hybrid electric vehicle (HEV), or a plug-in hybrid electric vehicle (PHEV), an electric flying object such as a drone or an electric vertical take-off and landing aircraft (eVTOL), a ship, a construction machine, or an agricultural machine. An example of application to a vehicle will be described below.
[0012] <Vehicle drive system> 1 shows an example of a drive system provided in a vehicle. The drive system 1 includes a DC power supply 2, a rotating electric machine 3, and a power conversion circuit 4.
[0013] The DC power supply 2 is a DC voltage source configured with a rechargeable secondary battery. The DC power supply 2 may be, for example, a rechargeable secondary battery such as a lithium ion battery or a nickel-metal hydride battery. The DC power supply 2 may also convert AC power to DC and output it.
[0014] The rotating electric machines 3 are three-phase AC rotating electric machines. At least one of the rotating electric machines 3 functions as a driving source for the vehicle, that is, as an electric motor. The rotating electric machines 3 generate torque for driving drive wheels (not shown). At least one of the rotating electric machines 3 may function as a generator. At least one of the rotating electric machines 3 may be a motor generator that functions as both an electric motor and a generator. For example, the rotating electric machine 3 may be operated as a generator by transmitting the rotation of the axle to the rotating electric machine 3 while the vehicle is traveling. If the vehicle is equipped with an engine, the rotating electric machine 3 may be operated as a generator by rotating the rotor of the rotating electric machine 3 with the engine.
[0015] The illustrated rotating electric machine 3 includes three rotating electric machines 3A, 3B, and 3C. The rotating electric machines 3A and 3B drive the front wheels of the vehicle. The rotating electric machine 3C drives the rear wheels of the vehicle. The rotating electric machines 3A, 3B, and 3C operate as generators during traveling and perform regenerative power generation (regenerative braking).
[0016] The power conversion circuit 4 performs power conversion between the DC power supply 2 and the rotating electric machine 3. The power generated by the rotating electric machine 3 is supplied to, for example, the DC power supply 2 via the power conversion circuit 4. This causes the DC power supply 2 to be charged.
[0017] The drive system 1 may include a power supply switch (not shown), such as an SMR, between the DC power supply 2 and the power conversion circuit 4. SMR is an abbreviation for System Main Relay. For example, turning on the power supply switch enables power supply from the DC power supply 2 to the rotating electric machine 3, and turning off the power supply switch cuts off the power supply from the DC power supply 2 to the rotating electric machine 3.
[0018] <Power conversion circuit> Fig. 1 shows an example of a power conversion circuit 4. The illustrated power conversion circuit 4 includes a filter capacitor 5, a smoothing capacitor 6, a converter 7, an inverter 8, a control circuit 9, and drive circuits 10. For convenience, connection lines between the control circuit 9 and each drive circuit 10 are omitted from Fig. 1. For multiple elements, only one is given a symbol to represent each element.
[0019] The power conversion circuit 4 includes power lines. The P line, which is a high-potential power line, includes a VL line 11L and a VH line 11H. The VL line 11L is connected to the positive terminal of the DC power supply 2. The converter 7 is provided between the VL line 11L and the VH line 11H. The potential of the VH line 11H is set to be equal to or higher than the potential of the VL line 11L. The N line 12 is a low-potential power line connected to the negative terminal of the DC power supply 2. The N line 12 is sometimes referred to as a ground line.
[0020] The filter capacitor 5 is connected between the VL line 11L and the N line 12. The positive electrode of the filter capacitor 5 is connected to the VL line 11L between the DC power supply 2 and the converter 7. The negative electrode of the filter capacitor 5 is connected to the N line 12 between the DC power supply 2 and the converter 7. The filter capacitor 5 is connected in parallel to the DC power supply 2. The filter capacitor 5 removes power supply noise from the DC power supply 2, for example. The filter capacitor 5 is arranged on the lower voltage side than the smoothing capacitor 6, and is therefore sometimes referred to as a low-voltage side capacitor.
[0021] Smoothing capacitor 6 is connected between VH line 11H and N line 12. The positive electrode of smoothing capacitor 6 is connected to VH line 11H between converter 7 and inverter 8. The negative electrode of smoothing capacitor 6 is connected to N line 12 between converter 7 and inverter 8. Smoothing capacitor 6 is connected in parallel to upper and lower arm circuits 7HL, 8AHL, 8BHL, and 8CHL, which will be described later. Smoothing capacitor 6 smoothes, for example, the DC voltage boosted by converter 7. The voltage across smoothing capacitor 6 becomes a high DC voltage for driving rotating electric machine 3. The voltage across smoothing capacitor 6 is set to be equal to or higher than the voltage across filter capacitor 5. Smoothing capacitor 6 is sometimes referred to as a high-voltage side capacitor because it is located on the higher-voltage side of filter capacitor 5.
[0022] The converter 7 is a DC-DC conversion circuit. The converter 7 converts, for example, a DC voltage into a DC voltage of a different value in accordance with switching control by a control circuit 9. The converter 7 has a function of boosting the DC voltage supplied from the DC power supply 2. The illustrated converter 7 also has a step-down function of charging the DC power supply 2 using the charge of the smoothing capacitor 6. The converter 7 has upper and lower arm circuits 7HL and a reactor R1.
[0023] The upper and lower arm circuit 7HL has an upper arm 7H and a lower arm 7L. The upper arm 7H and the lower arm 7L are connected in series between the VH line 11H and the N line 12, with the upper arm 7H on the VH line 11H side. One terminal of the reactor R1 is connected to the connection point between the upper arm 7H and the lower arm 7L. The other terminal of the reactor R1 is connected to the VL line 11L. The illustrated converter 7 has only one phase of the upper and lower arm circuit 7HL and the reactor R1. Alternatively, the upper and lower arm circuit 7HL and the reactor R1 may be provided in multiple phases.
[0024] The inverter 8 is an AC-DC conversion circuit. The inverter 8 converts a DC voltage into a three-phase AC voltage under switching control by the control circuit 9 and outputs the voltage to the rotating electric machine 3. This drives the rotating electric machine 3 to generate a predetermined torque. For example, during regenerative braking of a vehicle, the inverter 8 converts the three-phase AC voltage generated by the rotating electric machine 3 upon receiving rotational force from the wheels into a DC voltage under switching control by the control circuit 9. In this way, the inverter 8 performs bidirectional power conversion between the DC power source 2 and the rotating electric machine 3. The inverter 8 is configured with upper and lower arm circuits for three phases. The illustrated inverter 8 includes an inverter 8A corresponding to the rotating electric machine 3A, an inverter 8B corresponding to the rotating electric machine 3B, and an inverter 8C corresponding to the rotating electric machine 3C.
[0025] The inverter 8A is configured with upper and lower arm circuits 8AHL for three phases. The upper and lower arm circuit 8AHL has an upper arm 8AH and a lower arm 8AL. The upper arm 8AH and the lower arm 8AL are connected in series between the VH line 11H and the N line 12, with the upper arm 8AH on the VH line 11H side. The connection point between the upper arm 8AH and the lower arm 8AL is connected to the winding of the corresponding phase in the rotating electric machine 3A via an output line 13A.
[0026] The inverter 8B is configured with upper and lower arm circuits 8BHL for three phases. The upper and lower arm circuit 8BHL has an upper arm 8BH and a lower arm 8BL. The upper arm 8BH and the lower arm 8BL are connected in series between the VH line 11H and the N line 12, with the upper arm 8BH on the VH line 11H side. The connection point between the upper arm 8BH and the lower arm 8BL is connected to the winding of the corresponding phase in the rotating electric machine 3B via an output line 13B.
[0027] The inverter 8C is configured with upper and lower arm circuits 8CHL for three phases. The upper and lower arm circuit 8CHL has an upper arm 8CH and a lower arm 8CL. The upper arm 8CH and the lower arm 8CL are connected in series between the VH line 11H and the N line 12, with the upper arm 8CH on the VH line 11H side. The connection point between the upper arm 8CH and the lower arm 8CL is connected to the winding of the corresponding phase in the rotating electric machine 3C via an output line 13C. Hereinafter, the upper arms 7H, 8AH, 8BH, and 8CH and the lower arms 7L, 8AL, 8BL, and 8CL may be simply referred to as arms 7H, 7L, 8AH, 8AL, 8BH, 8BL, 8CH, and 8CL.
[0028] The upper and lower arm circuits 7HL, 8AHL, 8BHL, and 8CHL are sometimes referred to as legs. An upper and lower arm circuit for one phase has one upper arm and one lower arm, i.e., two arms. An upper and lower arm circuit for three phases has six arms. Each arm 7H, 7L, 8AH, 8AL, 8BH, 8BL, 8CH, and 8CL is configured with a switching element. The number of switching elements constituting each arm 7H, 7L, 8AH, 8AL, 8BH, 8BL, 8CH, and 8CL is not particularly limited. There may be one or more. In the case of multiple switching elements, the multiple switching elements connected in parallel are turned on and off at the same timing by a common gate drive signal (drive voltage).
[0029] In the illustrated power conversion circuit 4, the upper arm 7H and the lower arm 7L of the upper / lower arm circuit 7HL each have a switching element Q1 and a freewheeling diode D1 connected in anti-parallel to the switching element Q1. The upper arm 8AH and the lower arm 8AL of the upper / lower arm circuit 8AHL each have a switching element Q2 and a freewheeling diode D2 connected in anti-parallel to the switching element Q2. The upper arm 8BH and the lower arm 8BL of the upper / lower arm circuit 8BHL each have a switching element Q3 and a freewheeling diode D3 connected in anti-parallel to the switching element Q3. The upper arm 8CHL and the lower arm 8CL of the upper / lower arm circuit 8CHL each have a switching element Q4 and a freewheeling diode D4 connected in anti-parallel to the switching element Q4.
[0030] The switching elements Q1, Q2, Q3, and Q4 may have the same specifications. Some specifications of the switching elements Q1, Q2, Q3, and Q4 may differ from some specifications of the other switching elements. The illustrated switching elements Q1, Q2, Q3, and Q4 are all n-channel MOSFETs. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. The diode may be a parasitic diode (body diode) of the MOSFET, or may be provided separately from the parasitic diode. The anode terminal of the diode is connected to the source terminal of the corresponding MOSFET, and the cathode terminal is connected to the drain terminal.
[0031] The switching element is not limited to a MOSFET. For example, an IGBT (Insulated Gate Bipolar Transistor) may be used. Even in the case of an IGBT, a freewheeling diode is connected in inverse parallel.
[0032] In the upper and lower arm circuit 7HL, the drain terminal of the switching element Q1 on the upper arm 7H side is connected to the VH line 11H, and the source terminal of the switching element Q1 on the lower arm 7L side is connected to the N line 12. The source terminal of the switching element Q1 on the upper arm 7H side and the drain terminal of the switching element Q1 on the lower arm 7L side are connected to each other. The upper and lower arm circuits 8AHL, 8BHL, and 8CHL have the same circuit configuration as the upper and lower arm circuit 7HL.
[0033] The control circuit 9 generates drive commands for operating the switching elements Q1, Q2, Q3, and Q4 and outputs them to the drive circuit 10. The control circuit 9 generates the drive commands based on, for example, a torque request input from a higher-level ECU (not shown) and signals detected by various sensors. ECU is an abbreviation for Electronic Control Unit.
[0034] The various sensors include, for example, a current sensor, a rotation angle sensor, a voltage sensor, and a temperature sensor. One of the current sensors detects the phase current flowing through the windings of each phase of the rotating electric machine 3. Another current sensor detects the current flowing through the reactor R1. The rotation angle sensor detects the rotation angle of the rotor of the rotating electric machine 3. One of the voltage sensors detects the voltage across the smoothing capacitor 6. The other voltage sensor detects the voltage across the filter capacitor 5. The control circuit 9 outputs, for example, a PWM signal as a drive command. PWM is an abbreviation for Pulse Width Modulation.
[0035] The control circuit 9 may be configured to include, for example, a processor, a memory, a storage, and the like. The processor executes various processes by accessing the memory. The memory is, for example, a rewritable volatile storage medium such as RAM. RAM is an abbreviation for Random Access Memory. The storage is a non-transitory physical recording medium that stores the programs executed by the processor. The storage is, for example, a rewritable non-volatile storage medium such as ROM or flash. The processes executed by the control circuit 9 may be realized by software processing in which the processor executes the above-mentioned programs, or may be realized by hardware processing using dedicated electronic circuits. They may also be realized by a combination of software processing and hardware processing.
[0036] Based on a drive command from the control circuit 9, the drive circuits 10 supply drive voltages to the gates of the switching elements Q1, Q2, Q3, and Q4 of the corresponding arms 7H, 7L, 8AH, 8AL, 8BH, 8BL, 8CH, and 8CL. By applying the drive voltage, the drive circuits 10 drive the corresponding switching elements Q1, Q2, Q3, and Q4, i.e., turn them on and off. The drive circuits are sometimes referred to as drivers. In the illustrated power conversion circuit 4, the drive circuits 10 are individually provided for the arms 7H, 7L, 8AH, 8AL, 8BH, 8BL, 8CH, and 8CL.
[0037] <Power conversion device> FIG. 2 is a plan view showing an example of a power conversion device. In FIG. 2, for convenience, the circuit board located above the semiconductor module and the cooler is shown by a dashed line. For convenience, the hanging leads and remaining terminals are omitted. FIG. 3 is a plan view seen from the X1 direction shown in FIG. 2. For convenience, the exhaust pipe is omitted in FIG. 3. For convenience, the circuit board is shown in a simplified form, with electronic components omitted, for example.
[0038] In the following, the stacking direction of the semiconductor modules is referred to as the Z direction. The direction perpendicular to the Z direction is referred to as the X direction. The direction perpendicular to both the Z direction and the Y direction is referred to as the Y direction. The X direction, Y direction, and Z direction are mutually perpendicular. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X and Y directions, is referred to as the planar shape. The planar view from the Z direction is sometimes simply referred to as the planar view.
[0039] The power conversion device 20 includes a plurality of semiconductor modules 21, a plurality of coolers 22, and a circuit board 23. The plurality of semiconductor modules 21 are stacked in the Z direction. The semiconductor modules 21 and the coolers 22 are stacked alternately along the Z direction. The semiconductor modules 21 and the coolers 22 are arranged side by side in the Z direction. Each of the semiconductor modules 21 is sandwiched between the coolers 22 in the Z direction.
[0040] The semiconductor module 21 includes a first semiconductor module 21A and a second semiconductor module 21B, which have different numbers of signal terminals 84. The illustrated semiconductor modules 21 are each configured to provide upper and lower arm circuits for one phase. The first semiconductor module 21A has five signal terminals 84 corresponding to the upper arm and five signal terminals 84 corresponding to the lower arm. The second semiconductor module 21B has three signal terminals 84 corresponding to the upper arm and three signal terminals 84 corresponding to the lower arm. In each semiconductor module 21, the multiple signal terminals 84 are aligned in the X direction.
[0041] The illustrated power conversion device 20 includes three first semiconductor modules 21A and seven second semiconductor modules 21B. One of the first semiconductor modules 21A constitutes an upper / lower arm circuit 7HL, i.e., the converter 7. The other first semiconductor module 21A and two second semiconductor modules 21B constitute an upper / lower arm circuit 8AHL, i.e., the inverter 8A. The other first semiconductor module 21A and the other two second semiconductor modules 21B constitute an upper / lower arm circuit 8BHL, i.e., the inverter 8B. The other three second semiconductor modules 21B constitute an upper / lower arm circuit 8CHL, i.e., the inverter 8C.
[0042] The multiple semiconductor modules 21 are arranged in the Z direction in the following order: components of the converter 7, components of the inverter 8, components of the inverter 8B, and components of the inverter 8C. More specifically, from the end on the converter 7 side, the first semiconductor module 21A of the converter 7, the two second semiconductor modules 21B of the inverter 8A, the first semiconductor module 21A of the inverter 8A, the first semiconductor module 21A of the inverter 8B, the two second semiconductor modules 21B of the inverter 8B, and the three second semiconductor modules 21B of the inverter 8C are arranged in this order.
[0043] The circuit board 23 is disposed above a stack including a plurality of semiconductor modules 21 and a plurality of coolers 22. The circuit board 23 is disposed on the signal terminal 84 side of the semiconductor module 21 in the Y direction. The signal terminals 84 of all the semiconductor modules 21 are connected to the circuit board 23. The illustrated signal terminals 84 are inserted into and mounted on the circuit board 23. The circuit board 23 is disposed so as to include all the semiconductor modules 21 in a plan view from the Y direction. The illustrated circuit board 23 is disposed so as to include the stack. The structures of the semiconductor modules 21 and the circuit board 23 will be described later.
[0044] The cooler 22 is made of a metal material with excellent thermal conductivity, such as Al or Cu. The cooler 22 may have a flow path therein through which a refrigerant flows. The cooler 22 may be a heat dissipation member such as a heat sink. A heat sink is sometimes called a heat dissipation plate or a cooling plate.
[0045] The illustrated cooler 22 has a flow path inside. The cooler 22 is a tubular body with a flat shape overall. The cooler 22 is made, for example, by pressing at least one of a pair of plates (thin metal plates) into a shape that expands in the Z direction. Thereafter, the outer peripheral edges of the pair of plates are fixed to each other by crimping or the like, and are joined to each other around the entire circumference by brazing or the like. This forms a flow path between the pair of plates through which a refrigerant can flow, making it possible to use the cooler 22.
[0046] The power conversion device 20 includes an inlet pipe 24 and an outlet pipe 25. Each of the inlet pipe 24 and the outlet pipe 25 may be formed of a single (single) member, or may be formed by connecting a plurality of members into an integrated structure. The inlet pipe 24 and the outlet pipe 25 are connected to each of the coolers 22. A refrigerant is supplied to the inlet pipe 24 by a pump (not shown), causing the refrigerant to flow through the flow path in each of the coolers 22. This cools each of the semiconductor modules 21. The refrigerant that has flowed through each of the coolers 22 is discharged via the outlet pipe 25.
[0047] The refrigerant may be a phase-change refrigerant such as water or ammonia, or a non-phase-change refrigerant such as an ethylene glycol-based refrigerant. An example refrigerant is LLC, which stands for Long Life Coolant.
[0048] If electrical insulation between the semiconductor module 21 and the cooler 22 is not required, the power conversion device 20 may include a bonding material interposed between the semiconductor module 21 and the cooler 22. The bonding material may be solder, sintered Ag, or the like. If electrical insulation between the semiconductor module 21 and the cooler 22 is required, the power conversion device 20 may include an insulating member interposed between the semiconductor module 21 and the cooler 22. The insulating member may include a ceramic plate, or may include a thermally conductive member such as a TIM. TIM is an abbreviation for Thermal Interface Material.
[0049] <Semiconductor module> FIG. 4 is a plan view showing an example of a first semiconductor module. FIG. 5 is a plan view showing an example of a second semiconductor module. FIG. 6 is a plan view showing a portion of the first semiconductor module covered by the sealing body. FIG. 7 is a plan view showing a portion of the second semiconductor module covered by the sealing body. In FIGS. 6 and 7, the sealing body is indicated by a dashed line, and the substrate and conductor pattern on the source electrode side are indicated by dashed lines. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 4. FIG. 9 is a plan view showing the substrate on the drain electrode side. FIG. 10 is a plan view showing the substrate on the source electrode side. In FIGS. 9 and 10, a surface metal body is shown.
[0050] The illustrated semiconductor module 21 constitutes one of the upper and lower arm circuits, i.e., one phase's worth of upper and lower arm circuits. The semiconductor module 21 may also be referred to as a power module, a semiconductor device, or the like. The semiconductor modules 21 (21A, 21B) include a sealing body 30, a semiconductor element 40, substrates 50, 60, a conductive spacer 70, a joint portion 75, and an external connection terminal 80. The first semiconductor module 21A and the second semiconductor module 21B differ from each other in the number of signal terminals 84 and the connection structure between the pads 43 and the signal terminals 84. The other configurations are the same.
[0051] The encapsulant 30 encapsulates some of the other elements that make up the semiconductor module 21. The remaining parts of the other elements are exposed to the outside of the encapsulant 30. The encapsulant 30 is formed using, for example, a resin material. The encapsulant 30 shown in the example is molded using an epoxy resin by a transfer molding method. Such an encapsulant 30 may be referred to as a molded resin, a resin molded body, or the like.
[0052] The encapsulant 30 has a generally rectangular shape in plan view. The encapsulant 30 has one surface 301, a back surface 302, and side surfaces 303, 304, 305, and 306 as surfaces that form the outer periphery. The back surface 302 is the surface opposite to the one surface 301 in the Z direction. The one surface 301 and the back surface 302 are, for example, flat surfaces. The side surface 304 is the surface opposite to the side surface 303 in the Y direction. The side surface 306 is the surface opposite to the side surface 305 in the X direction.
[0053] The semiconductor element 40 is formed by forming a switching element on a semiconductor substrate made of silicon (Si) or a wide bandgap semiconductor with a wider bandgap than silicon. Examples of wide bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor element 40 is sometimes called a power element or a semiconductor chip.
[0054] The illustrated semiconductor element 40 is formed by forming an n-channel MOSFET on a semiconductor substrate made of SiC. The MOSFET has a vertical structure so that the main current flows in the thickness direction of the semiconductor element 40 (semiconductor substrate), i.e., in the Z direction. The semiconductor element 40 has main electrodes of a switching element on both sides in the thickness direction, i.e., in the Z direction. Specifically, the main electrodes include a drain electrode 41 on one side and a source electrode 42 on the back side. One semiconductor element 40 provides one arm.
[0055] If the diode is a parasitic diode, the source electrode 42 also serves as the anode electrode, and the drain electrode 41 also serves as the cathode electrode. The diode may be formed on a chip separate from the MOSFET. The drain electrode 41 is the main electrode on the high potential side, and the source electrode 42 is the main electrode on the low potential side.
[0056] The semiconductor element 40 has a generally rectangular shape in plan view. The semiconductor element 40 has a pad 43 formed on the back surface at a position different from the source electrode 42. The source electrode 42 and the pad 43 are exposed from a protective film (not shown) formed on the back surface of the semiconductor substrate. The drain electrode 41 is formed on almost the entire surface of one side of the semiconductor element 40. The source electrode 42 is formed on a portion of the back surface of the semiconductor element 40. The pad 43 is a signal electrode. The pad 43 is formed at the end opposite the region where the source electrode 42 is formed in the Y direction. The illustrated semiconductor element 40 has a plurality of pads 43. The plurality of pads 43 are lined up in the X direction on the semiconductor element 40.
[0057] Each semiconductor module 21 includes a plurality of semiconductor elements 40. The plurality of semiconductor elements 40 may include a plurality of types of semiconductor elements with different specifications. As in the illustrated semiconductor module 21, all of the semiconductor elements 40 may have a common configuration. The plurality of semiconductor elements 40 include a semiconductor element 40H that constitutes an upper arm and a semiconductor element 40L that constitutes a lower arm. The semiconductor element 40H is sometimes referred to as an upper arm element, and the semiconductor element 40L is sometimes referred to as a lower arm element. The semiconductor elements 40H and 40L are aligned in the X direction. The semiconductor elements 40H and 40L are disposed at approximately the same position as each other in the Z direction. The drain electrodes 41 of the semiconductor elements 40H and 40L face the substrate 50. The source electrodes 42 of the semiconductor elements 40H and 40L face the substrate 60.
[0058] The substrates 50 and 60 are wiring members that electrically connect the semiconductor elements 40 and the main terminals. The substrates 50 and 60 are arranged to sandwich the multiple semiconductor elements 40 in the Z direction. The substrates 50 and 60 are arranged so that at least a portion of each substrate faces the other in the Z direction. The substrates 50 and 60 contain all of the multiple semiconductor elements 40 in a planar view. The substrate 50 is arranged on the drain electrode 41 side. The substrate 60 is arranged on the source electrode 42 side. The substrate 50 is electrically connected to the drain electrode 41 and provides a wiring function. The substrate 60 is electrically connected to the source electrode 42 and provides a wiring function. The substrates 50 and 60 provide a heat dissipation function that dissipates heat generated by the semiconductor elements 40.
[0059] The substrate 50 includes an insulating base material 51, a front surface metal body 52, and a back surface metal body 53. The substrate 60 includes an insulating base material 61, a front surface metal body 62, and a back surface metal body 63. The insulating base materials 51, 61 may be made of resin or ceramic. The insulating base material 51 electrically separates the front surface metal body 52 and the back surface metal body 53. The insulating base material 61 electrically separates the front surface metal body 62 and the back surface metal body 63.
[0060] The front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 are provided as metal plates or metal foils. The front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 are made of a metal with good electrical and thermal conductivity, such as Cu or Al. The front surface metal bodies 52, 62 are patterned. The front surface metal bodies 52, 62 may have a plating film of Ni, Au, or the like on the metal surface. The front surface metal body 52 has a P wiring 521 and a relay wiring 522. The P wiring 521 and the relay wiring 522 are electrically separated by a predetermined gap. The gap is filled with the sealing body 30.
[0061] The P wiring 521 is connected to the P terminal 81 and the drain electrode 41 of the semiconductor element 40H. The P wiring 521 electrically connects the P terminal 81 and the drain electrode 41 of the semiconductor element 40H. The P wiring 521 has a rectangular shape with its longitudinal direction extending in the Y direction in a plan view. The relay wiring 522 is connected to the drain electrode 41 of the semiconductor element 40L, the joint portion 75, and the O terminal 83. The relay wiring 522 electrically connects the O terminal 83 and the drain electrode 41 of the semiconductor element 40L. The relay wiring 522 has a substantially L-shape in plan view. The relay wiring 522 has a substantially rectangular base portion in plan view and an extension portion connected to the base portion.
[0062] The P wiring 521 and the relay wiring 522 are arranged side by side in the X direction. The relay wiring 522 is arranged so that its extended portion is adjacent to the P wiring 521. The relay wiring 522 is arranged so that its base is closer to the side surface 305 than to the side surface 306. The drain electrode 41 of the semiconductor element 40L is connected to the relay wiring 522. The joint portion 75 is connected to the extended portion of the relay wiring 522. The P terminal 81 is connected to the P wiring 521 near one end in the Y direction. The O terminal 83 is connected to the relay wiring 522 near one end in the Y direction. The P terminal 81 and the O terminal 83 are arranged on the same side in the Y direction with respect to the semiconductor element 40.
[0063] The surface metal body 62 has an N wiring 621 and a relay wiring 622. The N wiring 621 and the relay wiring 622 are electrically separated by a predetermined gap. This gap is filled with a sealing body 30. The N wiring 621 is connected to the N terminal 82 and the source electrode 42 of the semiconductor element 40L. The N wiring 621 electrically connects the N terminal 82 and the source electrode 42 of the semiconductor element 40L. The relay wiring 622 is connected to the source electrode 42 of the semiconductor element 40H and the joint 75. The relay wiring 622 electrically connects the source electrode 42 of the semiconductor element 40H and the drain electrode 41 of the semiconductor element 40L via the joint 75.
[0064] The N wiring 621 has a substantially L-shape in plan view. The relay wiring 622 also has a substantially L-shape in plan view. The N wiring 621 and the relay wiring 622 each have a substantially rectangular base in plan view and an extended portion continuing to the base. The N wiring 621 and the relay wiring 622 are arranged to interdigitate with each other. The N wiring 621 and the relay wiring 622 are arranged so that the extended portion of the N wiring 621 is located on the side surface 303 side and the extended portion of the relay wiring 622 is located on the side surface 304 side. The base of the N wiring 621 and the base of the relay wiring 622 are aligned in the X direction. The extended portion of the N wiring 621 and the extended portion of the relay wiring 622 are aligned in the Y direction.
[0065] The source electrode 42 of the semiconductor element 40L is connected to the base of the N wiring 621. The N terminal 82 is connected to the extended portion of the N wiring 621. The source electrode 42 of the semiconductor element 40H is connected to the base of the relay wiring 622. The joint portion 75 is connected to the extended portion of the relay wiring 622.
[0066] The back surface metal bodies 53, 63 are electrically isolated from the front surface metal bodies 52, 62 by the insulating base materials 51, 61. The illustrated back surface metal bodies 53, 63 are so-called solid conductors arranged over almost the entire back surface of the insulating base materials 51, 61. The back surface metal body 53 is exposed from one surface 301 of the encapsulant 30, and the back surface metal body 63 is exposed from the back surface 302. The exposed surface 53a of the back surface metal body 53 is approximately flush with the one surface 301. The exposed surface 63a of the back surface metal body 63 is approximately flush with the back surface 302.
[0067] The wiring members that electrically connect the semiconductor element 40 and the main terminals are not limited to the substrates 50 and 60. For example, a heat sink (metal plate material) may be used instead of the substrates 50 and 60. The heat sink may be provided as part of the lead frame.
[0068] The conductive spacer 70 functions as a spacer to ensure a predetermined distance between the semiconductor element 40 and the substrate 60. The conductive spacer 70 ensures a height required for electrically connecting the corresponding signal terminal 84 to the pad 43 of the semiconductor element 40, for example. The conductive spacer 70 is located midway along the electrical and thermal conduction path between the source electrode 42 of the semiconductor element 40 and the substrate 60, providing wiring and heat dissipation functions. The conductive spacer 70 includes a metal material with good electrical and thermal conductivity, such as Cu. The conductive spacer 70 may have a plating film on its surface. The illustrated conductive spacer 70 is a generally rectangular columnar body having approximately the same size as the source electrode 42 in a planar view.
[0069] The conductive spacers 70 may be referred to as terminals, terminal blocks, metal blocks, etc. The semiconductor module 21 includes the same number of conductive spacers 70 as the semiconductor elements 40. Specifically, one semiconductor module 21 includes two conductive spacers 70. One of the conductive spacers 70 electrically connects the source electrode 42 of the semiconductor element 40H to the relay wiring 622. The other conductive spacer 70 electrically connects the source electrode 42 of the semiconductor element 40L to the N wiring 621.
[0070] The joint portion 75 electrically connects the relay wirings 522, 622. In other words, the joint portion 75 electrically connects the upper arm and the lower arm that constitute the upper and lower arm circuits. The joint portion 75 is provided between the semiconductor element 40H and the semiconductor element 40L in the X direction. The joint portion 75 is disposed in the overlapping region of the extended portions of the relay wirings 522, 622 in a plan view. The illustrated joint portion 75 is a metal columnar body provided separately from the surface metal bodies 52, 62. The joint portion 75 extends in the Z direction. One end of the joint portion 75 is connected to the relay wiring 522, and the other end is connected to the relay wiring 622.
[0071] The joint portion 75 may be integrally connected to the surface metal bodies 52, 62. In other words, the joint portion 75 may be provided integrally with the surface metal bodies 52, 62 as part of the substrates 50, 60. A part of the joint portion 75 may be provided as part of the substrate 50, and another part of the joint portion 75 may be provided as part of the substrate 60.
[0072] The external connection terminals 80 are terminals for electrically connecting the semiconductor module 21 to an external device. The external connection terminals 80 are formed using a metal material with good conductivity, such as Cu. The external connection terminals 80 are, for example, a plate material. The external connection terminals 80 are sometimes referred to as leads. The external connection terminals 80 include a P terminal 81, an N terminal 82, an O terminal 83, and a signal terminal 84. The P terminal 81, the N terminal 82, and the O terminal 83 are sometimes referred to as main terminals because they are electrically connected to main electrodes of the semiconductor element 40. The P terminal 81 and the N terminal 82 are sometimes referred to as power supply terminals.
[0073] The P terminal 81 is connected to the P wiring 521 near one end in the Y direction. A part of the P terminal 81 is covered by the sealing body 30, and another part protrudes outside the sealing body 30. The connection part of the P terminal 81 with the P wiring 521 is covered by the sealing body 30. The illustrated P terminal 81 extends approximately in the Y direction. The P terminal 81 protrudes from the side surface 303.
[0074] The N terminal 82 is connected to an extending portion of the N wiring 621. A portion of the N terminal 82 is covered by the sealing body 30, and another portion protrudes outside the sealing body 30. The portion of the N terminal 82 that is connected to the N wiring 621 is covered by the sealing body 30. The illustrated N terminal 82 extends generally in the Y direction, which is the same direction as the P terminal 81. The N terminal 82 protrudes from the side surface 303.
[0075] The O terminal 83 is connected near one end in the Y direction at the base of the relay wiring 522. A portion of the O terminal 83 is covered by the sealing body 30, and another portion protrudes outside the sealing body 30. The connection portion of the O terminal 83 with the relay wiring 522 is covered by the sealing body 30. The illustrated O terminal 83 extends generally in the Y direction, in the same direction as the P terminal 81 and the N terminal 82. The O terminal 83 protrudes from the side surface 303. The P terminal 81, the N terminal 82, and the O terminal 83 are aligned in the X direction. The P terminal 81, the N terminal 82, and the O terminal 83 are arranged in this order in the X direction.
[0076] The signal terminals 84 are electrically connected to the pads 43 of the corresponding semiconductor elements 40. The signal terminals 84 include a signal terminal connected to the pads 43 of the semiconductor element 40H and a signal terminal connected to the pads 43 of the semiconductor element 40L. The illustrated signal terminals 84 are connected to the corresponding pads 43 via bonding wires 90. The signal terminals 84 extend generally in the Y direction in plan view. A portion of the signal terminals 84, including the connection portion with the pads 43, is covered by the encapsulant 30, and another portion protrudes from the encapsulant 30. The signal terminals 84 protrude from the side surface 304 to the outside of the encapsulant 30.
[0077] The external connection terminals 80 are provided as, for example, part of a lead frame. During the manufacturing process of the semiconductor module 21, unnecessary parts of the lead frame, such as tie bars, are removed. The semiconductor module 21 includes suspension leads 85. Before the unnecessary parts are removed, the suspension leads 85 hold the signal terminals 84 in place via the tie bars. One of the suspension leads 85 is connected to the P wiring 521, and the other is connected to the relay wiring 522. The suspension leads 85 extend generally in the Y direction in a plan view. The two suspension leads 85 are arranged in the X direction to sandwich the signal terminal 84 corresponding to the semiconductor element 40H and the signal terminal 84 corresponding to the semiconductor element 40L. A portion of the suspension lead 85, including the connection portion with the front surface metal body 52, is covered by the sealing body 30, and the remaining portion protrudes from the side surface 304 of the sealing body 30.
[0078] The semiconductor module 21 includes a bonding material 91. The bonding material 91 may be solder or a sintered material. The drain electrode 41 of the semiconductor element 40 is connected to the surface metal body 52 via the bonding material 91. The source electrode 42 of the semiconductor element 40 is connected to the conductive spacer 70 via the bonding material 91. The conductive spacer 70 is connected to the surface metal body 62 via the bonding material 91. The joint portion 75 is connected to the surface metal bodies 52, 62 via the bonding material 91. The multiple bonding materials 91 may be made of a common material, or the material of some of the bonding materials 91 may be different from the material of the other bonding materials 91.
[0079] The P terminal 81, the N terminal 82, the O terminal 83, and the suspension lead 85 may be connected to the corresponding surface metal bodies 52, 62 by the above-mentioned bonding material 91. The P terminal 81, the N terminal 82, the O terminal 83, and the suspension lead 85 may be solid-state bonded to the corresponding surface metal bodies 52, 62. Examples of solid-state bonding include ultrasonic bonding, room-temperature bonding, friction stir bonding, diffusion bonding, and friction welding.
[0080] As described above, in each semiconductor module 21, the sealing body 30 seals the multiple semiconductor elements 40 that constitute the upper and lower arm circuits for one phase. The sealing body 30 integrally seals the multiple semiconductor elements 40, part of the substrate 50, part of the substrate 60, the multiple conductive spacers 70, the joint portion 75, and part of the external connection terminals 80. The sealing body 30 seals the insulating base materials 51, 61 and the surface metal bodies 52, 62 of the substrates 50, 60.
[0081] The semiconductor element 40 is disposed between the substrates 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched between the substrates 50 and 60, which are disposed opposite each other. This allows heat from the semiconductor element 40 to be dissipated to both sides in the Z direction. The semiconductor module 21 has a double-sided heat dissipation structure. The exposed surface 53a of the rear surface metal body 53 is substantially flush with one surface 301 of the sealing body 30. The exposed surface 63a of the rear surface metal body 63 is substantially flush with the rear surface 302 of the sealing body 30. The exposed surfaces 53a and 63a can improve heat dissipation.
[0082] <Connection structure between pads and signal terminals> Fig. 11 is a diagram showing an example of a connection structure between pads and signal terminals in a first semiconductor module, and Fig. 12 is a diagram showing an example of a connection structure between pads and signal terminals in a second semiconductor module.
[0083] The illustrated semiconductor element 40 has five pads 43. The pads 43 include a gate pad 43G, a Kelvin source pad 43KS, a current sense pad 43SE, an anode pad 43A, and a cathode pad 43K. The five pads 43 are aligned in the X direction. The five pads 43 are aligned in the order of the Kelvin source pad 43KS, the current sense pad 43SE, the gate pad 43G, the anode pad 43A, and the cathode pad 43K from the side surface 305. The Kelvin source pad 43KS is arranged at the end of the semiconductor element 40H on the semiconductor element 40L side, and the cathode pad 43K is arranged at the end of the semiconductor element 40L on the semiconductor element 40H side.
[0084] The gate pad 43G is a pad 43 for applying a drive voltage to the gate electrode of a switching element (MOSFET) configured in the semiconductor element 40. The gate pad 43G is electrically connected to the gate electrode. The Kelvin source pad 43KS is a pad 43 for monitoring the potential (source potential) of the source electrode 42 of the switching element. The Kelvin source pad 43KS is electrically connected to the source electrode 42.
[0085] The current sense pad 43SE is a pad 43 for monitoring the current flowing through the switching element. The current sense pad 43SE is electrically connected to a sense element formed on the semiconductor element 40 (semiconductor substrate). The anode pad 43A and cathode pad 43K are pads for monitoring the temperature of the semiconductor element 40. The anode pad 43A is electrically connected to the anode of a temperature sensing diode formed on the semiconductor element 40 (semiconductor substrate), and the cathode pad 43K is electrically connected to the cathode of the temperature sensing diode. The anode pad 43A and cathode pad 43K correspond to temperature sense pads.
[0086] The first semiconductor module 21A has five signal terminals 84 corresponding to the semiconductor element 40H and five signal terminals 84 corresponding to the semiconductor element 40L. The five signal terminals 84 corresponding to one semiconductor element 40 include a gate terminal 84G, a Kelvin source terminal 84KS, a current sense terminal 84SE, an anode terminal 84A, and a cathode terminal 84K. The five signal terminals 84 are aligned in the X direction. From the side surface 305, the five signal terminals 84 are aligned in the following order: the Kelvin source terminal 84KS, the current sense terminal 84SE, the gate terminal 84G, the anode terminal 84A, and the cathode terminal 84K. The anode terminal 84A and the cathode terminal 84K correspond to temperature sense terminals.
[0087] In the first semiconductor module 21A, the pads 43 of the semiconductor element 40H are electrically connected to the corresponding signal terminals 84 via bonding wires 90. The Kelvin source pad 43KS is electrically connected to the Kelvin source terminal 84KS. The current sense pad 43SE is electrically connected to the current sense terminal 84SE. The gate pad 43G is electrically connected to the gate terminal 84G. The anode pad 43A is electrically connected to the anode terminal 84A. The cathode pad 43K is electrically connected to the cathode terminal 84K.
[0088] In the first semiconductor module 21A, the pads 43 of the semiconductor element 40L, like the pads 43 of the semiconductor element 40H, are electrically connected to the corresponding signal terminals 84 via bonding wires 90. The length between the terminal center of the Kelvin source terminal 84KS corresponding to the semiconductor element 40L and the terminal center of the cathode terminal 84K corresponding to the semiconductor element 40H is L1. In other words, the length L1 is the distance between the centers of the signal terminals 84 located at both ends of the signal terminals 84 lined up in the X direction.
[0089] The second semiconductor module 21B has three signal terminals 84 corresponding to the semiconductor element 40H and three signal terminals 84 corresponding to the semiconductor element 40L. The three signal terminals 84 corresponding to one semiconductor element 40 include a gate terminal 84G, a Kelvin source terminal 84KS, and a current sense terminal 84SE. In other words, the second semiconductor module 21B does not have an anode terminal 84A and a cathode terminal 84K, which are temperature sense terminals.
[0090] The second semiconductor module 21B has terminal remnants 86 instead of the anode terminal 84A and the cathode terminal 84K. The terminal remnants 86 are remnants of the signal terminals 84, with the tip portions removed (cut) from tie bars (not shown). The terminal remnants 86 do not have a portion that is inserted into and mounted on the circuit board 23. The terminal remnants 86 protrude slightly from the side surface 304 of the sealing body 30. The second semiconductor module 21B has four terminal remnants 86. The three signal terminals 84 and two terminal remnants 86 that correspond to one semiconductor element 40 are lined up in the X direction.
[0091] The three signal terminals 84 and two remaining terminal portions 86 corresponding to the semiconductor element 40H are arranged in the following order from the side surface 305: the Kelvin source terminal 84KS, the current sense terminal 84SE, the gate terminal 84G, and the two remaining terminal portions 86. The three signal terminals 84 and two remaining terminal portions 86 corresponding to the semiconductor element 40L are arranged in the following order from the side surface 305: the two remaining terminal portions 86, the Kelvin source terminal 84KS, the current sense terminal 84SE, and the gate terminal 84G.
[0092] In the second semiconductor module 21B, the pads 43 of the semiconductor element 40H are electrically connected to the corresponding signal terminals 84 via bonding wires 90. The bonding wires 90 include bonding wires 901 and 902. The Kelvin source pad 43KS is electrically connected to the Kelvin source terminal 84KS. The current sense pad 43SE is electrically connected to the current sense terminal 84SE. The gate pad 43G is electrically connected to the gate terminal 84G via a bonding wire 902. At least one of the anode pad 43A and the cathode pad 43K is electrically connected to another pad 43. The illustrated anode pad 43A is not connected to any signal terminals 84. The cathode pad 43K is electrically connected to the gate terminal 84G via a bonding wire 901. The cathode pad 43K is electrically connected to the gate pad 43G via the bonding wires 901 and 902 and the gate terminal 84G.
[0093] In the second semiconductor module 21B, the pads 43 of the semiconductor element 40L are electrically connected to the corresponding signal terminals 84 via bonding wires 90, similar to the pads 43 of the semiconductor element 40H. In the second semiconductor module 21B, the anode pad 43A and the cathode pad 43K correspond to first pads, and the other pads 43 correspond to second pads. As shown in FIG. 12, the length between the terminal center of the Kelvin source terminal 84KS corresponding to the semiconductor element 40L and the terminal center of the gate terminal 84G corresponding to the semiconductor element 40H is L2. In other words, the length L2 is the distance between the centers of the signal terminals 84 located at both ends of the signal terminals 84 aligned in the X direction. The length L2 is shorter than the length L1.
[0094] <Circuit board> Fig. 13 is a plan view showing an example of a circuit board. Fig. 13 shows wiring (conductor patterns) on a predetermined layer of a multilayer board. For convenience, only signal wiring within the high-voltage circuit area is shown. In Fig. 13, electronic components arranged within the high-voltage circuit area are indicated by dashed lines.
[0095] The circuit board 23 includes a printed circuit board, electronic components mounted on the printed circuit board, connectors, etc. The above-described drive circuit 10 is formed on the circuit board 23. In addition to the drive circuit 10, a control circuit 9 may be formed on the circuit board 23. The illustrated circuit board 23 includes the control circuit 9 and the drive circuit 10. The printed circuit board is a multilayer board. The circuit board 23 includes a through hole 231, an insulating portion 232, a high-voltage circuit region 233, a low-voltage circuit region 234, signal wiring 235S, and electronic components 236.
[0096] The through holes 231 are through holes that penetrate an insulating base material that constitutes the circuit board 23 in the Y direction. Signal terminals 84 of the semiconductor modules 21 are inserted into the through holes 231. The through holes 231 are provided corresponding to a plurality of semiconductor modules 21. The plurality of through holes 231 corresponding to one semiconductor module 21 are lined up along the X direction. The circuit board 23 has multiple rows of through holes. In the circuit board 23, through hole lands 231L are formed on the wall surfaces and around the openings of the through holes 231. The signal terminals 84 are connected to the through hole lands 231L via a bonding material such as solder.
[0097] 13, the semiconductor modules and the power conversion circuit are indicated by symbols corresponding to the through holes 231. As described above, from the end on the converter 7 side, the first semiconductor module 21A of the converter 7, the two second semiconductor modules 21B of the inverter 8A, the first semiconductor module 21A of the inverter 8A, the first semiconductor module 21A of the inverter 8B, the two second semiconductor modules 21B of the inverter 8B, and the three second semiconductor modules 21B of the inverter 8C are arranged in this order.
[0098] Five through holes 231 corresponding to the five signal terminals 84 on the upper arm side and five through holes 231 corresponding to the five signal terminals 84 on the lower arm side are provided at a position corresponding to the first semiconductor module 21A. The five through holes 231 are aligned in the X direction at a predetermined pitch. Three through holes 231 corresponding to the three signal terminals 84 on the upper arm side and three through holes 231 corresponding to the three signal terminals 84 on the lower arm side are provided at a position corresponding to the second semiconductor module 21B. The circuit board 23 has three through hole rows of ten through holes 231 each and seven through hole rows of six through holes 231 each.
[0099] The insulating section 232 electrically separates a high-voltage circuit area 233 to which a high voltage is applied from a low-voltage circuit area 234 to which a low voltage is applied. The insulating section 232 electrically separates the high-voltage circuit area 233 for each arm. The insulating section 232 is a section defined as an area where no wiring is placed. The insulating section 232 is set in consideration of the creepage distance required to ensure insulation. The insulating section 232 is sometimes referred to as an insulating area, etc.
[0100] The high-voltage circuit region 233 is surrounded by an insulating portion 232. The high-voltage circuit region 233 is located inside the insulating portion 232, and the low-voltage circuit region 234 is located outside the insulating portion 232. The high-voltage circuit region 233 is divided into arms by the insulating portion 232. The high-voltage circuit region 233 includes a high-voltage circuit region 233H on the upper arm side and a high-voltage circuit region 233L on the lower arm side. The insulating portion 232 includes insulating portions 232H and 232L. The insulating portion 232H insulates and separates adjacent high-voltage circuit regions 233H. The insulating portion 232L insulates and separates adjacent high-voltage circuit regions 233L. The width of the insulating portion 232H is wider than the width of the insulating portion 232L. The width is the length in the direction perpendicular to the extension direction of the insulating portion 232.
[0101] The above-described through holes 231, signal wiring 235S, and electronic components 236 are arranged in each of the high-voltage circuit regions 233. The signal wiring 235S is a wiring electrically connected to the through-hole land 231L among the wirings 235 provided on the circuit board 23. The signal wiring 235S includes a conductor pattern, a via hole connecting conductor patterns on different layers, and the like. FIG. 13 shows a conductor pattern arranged on a predetermined layer, i.e., a portion of the signal wiring 235S. At least one of the signal wirings 235S electrically connects the through-hole land 231L and the electronic component 236.
[0102] The electronic components 236 are components that constitute the gate drive circuit and the like. In the region where the circuit board temperature sense terminal is mounted, the electronic components 236 also include components that constitute the temperature sense circuit. In FIG. 13, the electronic components 236 are shown in a simplified form. In the high-voltage circuit region 233 where the first semiconductor module 21A is mounted, the electronic components 236 that constitute the gate drive circuit, temperature sense circuit, and the like are mounted. In the high-voltage circuit region 233 where the second semiconductor module 21B is mounted, the electronic components 236 that constitute the temperature sense circuit are not mounted, but the electronic components 236 that constitute the gate drive circuit and the like are mounted.
[0103] The circuits formed in the high-voltage circuit region 233 can communicate with the circuits formed in the low-voltage circuit region 234 via built-in insulating components (not shown). The built-in insulating components include, for example, optically insulating, magnetically insulating, or capacitively insulating isolators. For example, one built-in insulating component is provided for each high-voltage circuit region 233. The built-in insulating components are connected to the high-voltage circuit region 233 and the low-voltage circuit region 234 across the insulating section 232. For example, a microcomputer constituting the control circuit 9 is mounted in the low-voltage circuit region 234.
[0104] In the high-voltage circuit region 233, the mounting portion of the electronic component 236 is longer in the Z direction than the mounting portion of the signal terminal 84. Therefore, the further away from the reference position in the stacking direction (Z direction) of the semiconductor module 21 is, the greater the deviation in the Z direction between the through-hole land 231L and the corresponding electronic component 236. Therefore, it is necessary to pull out the signal wiring 235S from the signal terminal 84, for example, in a fan shape, and connect it to the electronic component 236. In this way, it is necessary to pull out the signal wiring 235S in the Z direction and the X direction and connect it to the electronic component 236.
[0105] The circuit board 23 has a first region 237 and a second region 238 as regions for arranging the signal wiring 235S. The second region 238 is a region including the signal wiring 235S that is longer in the Z direction than the signal wiring 235S arranged in the first region 237. The second region 238 is a region of the high-voltage circuit region 233 that is longer in the Z direction than the first region 237. In the illustrated power conversion device 20, the boundary between the inverters 8A and 8B is used as the reference position. The further away from the boundary in the Z direction is, the longer the length of the signal wiring 235S in the Z direction. The dashed line in FIG. 13 encircles a portion of the signal wiring 235S arranged in the second region 238. The high-voltage circuit region 233 including the signal wiring 235S surrounded by the dashed line is the second region 238. The second semiconductor module 21B is mounted in at least one of the second regions 238.
[0106] The first semiconductor module 21A constituting the inverters 8A and 8B is mounted in the first region 237. The second semiconductor module 21B constituting the inverters 8A, 8B, and 8C is mounted in the second region 238. The first semiconductor module 21A constituting the converter 7 is mounted in the second region 238. The first semiconductor module 21A constituting the converter 7 is disposed in a position closest to the inlet and outlet of the refrigerant.
[0107] <Summary of the First Embodiment> The power conversion device 20 of this embodiment includes a circuit board 23 and a plurality of semiconductor modules 21 stacked in the Z direction. The semiconductor modules 21 are electrically connected to the semiconductor elements 40 and have a plurality of signal terminals 84 mounted on the circuit board 23 and aligned in the X direction (a predetermined direction). The plurality of semiconductor modules 21 includes a first semiconductor module 21A and a second semiconductor module 21B having a smaller number of signal terminals 84 than the first semiconductor module 21A.
[0108] In this way, instead of using only a plurality of first semiconductor modules 21A, the first semiconductor modules 21A are mixed with the second semiconductor modules 21B, which have fewer signal terminals 84 than the first semiconductor modules 21A. This reduces the number of signal terminals 84 compared to a configuration using only the first semiconductor modules 21A, and improves the degree of freedom in wiring on the circuit board 23. This prevents the circuit board 23 from becoming larger in size, and ultimately prevents the power conversion device 20 from becoming larger in size.
[0109] FIG. 14 compares the circuit board 23 shown in FIG. 13 with a reference example circuit board 23R using only the first semiconductor module. In the reference example, the reference symbols of related elements shown in this embodiment are denoted by adding an R to the end. Like the circuit board 23, the circuit board 23R has ten high-voltage circuit regions 233R arranged on both the upper arm and lower arm sides. Five through-holes 231R are provided in each high-voltage circuit region 233R. Therefore, a mounting area corresponding to length L1 is required in all high-voltage circuit regions 233R. Furthermore, in all high-voltage circuit regions 233R except for the high-voltage circuit regions 233R at both ends, an insulating portion 232R must be provided to avoid the five through-holes 231R. This increases the size of the high-voltage circuit region 233R in the X direction. In other words, the size of the circuit board 23R in the Z direction increases.
[0110] Furthermore, if the arrangement pitch of the electronic components 236R is the same as the arrangement pitch of the electronic components 236, the width of the high-voltage circuit region 233R will be locally narrower than the width of the high-voltage circuit region 233. This narrowing occurs particularly in the portion where the signal wiring 235R is routed in the Z direction. As a result, in the high-voltage circuit region 233R corresponding to the second region, the signal wiring 235SR of adjacent high-voltage circuit regions 233R will be closer to each other. In other words, the density (wiring density) of the signal wiring 235SR will be higher. As shown in the example, the density of the signal wiring 235SR corresponding to the second region is higher than the density of the signal wiring 235SR corresponding to the first region. The density of the signal wiring 235SR corresponding to the second region in the circuit board 23R is higher than the density of the signal wiring 235S in the second region 238 in the circuit board 23. This, for example, reduces the degree of freedom in wiring.
[0111] It is also possible to prevent the density of signal wiring 235SR corresponding to the second region on circuit board 23R from becoming high by moving electronic components 236R away from through-holes 231R and by making the arrangement pitch of electronic components 236R wider than the arrangement pitch of electronic components 236. In this case, the size of high-voltage circuit region 233R in the Z direction and the X direction becomes large.
[0112] According to this embodiment, since the first semiconductor module 21A and the second semiconductor module 21B are mounted together, the length of the mounting portion may be L2 for part of the high-voltage circuit area 233. Therefore, an increase in the size of the circuit board 23 can be suppressed.
[0113] As illustrated, the circuit board 23 may have a first region 237 as an arrangement region for the signal wiring 235S, and a second region 238 including the signal wiring 235S that is longer in the Z direction than the signal wiring 235S arranged in the first region 237. The second semiconductor module 21B may be mounted in at least one of the second regions 238. This makes it possible to reduce the number of signal wiring 235S arranged in the second region 238. For example, this makes it easier to route (route) the signal wiring 235S. It is possible to prevent the wiring density from increasing. It is possible to prevent the physical size of the circuit board 23 from increasing.
[0114] As illustrated, at least one of the first semiconductor modules 21A may be disposed in the center of the stacked semiconductor modules 21. In the illustrated power conversion device 20, two first semiconductor modules 21A are disposed in the center. At the center, the Z-direction misalignment between the through-hole lands 231L and the corresponding electronic components 236 is not as large as at the ends. Therefore, even if a first semiconductor module 21A with a large number of signal terminals 84 is disposed, it is easy to route the signal wiring 235S. An increase in wiring density can be suppressed. An increase in the physical size of the circuit board 23 can be suppressed. The center refers to the portion sandwiched between the ends and their surroundings in the stacking direction.
[0115] As illustrated, the first semiconductor module 21A may have a temperature sensing terminal electrically connected to a temperature sensing pad as the signal terminal 84, while the second semiconductor module 21B may have no temperature sensing terminal. The anode pad 43A and the cathode pad 43K correspond to the temperature sensing pad. The anode terminal 84A and the cathode terminal 84K correspond to the temperature sensing terminal. This simplifies the configuration and prevents the circuit board 23 from becoming larger.
[0116] As illustrated, one phase of the first inverter is configured to include a first semiconductor module 21A, and the remaining two phases of the first inverter are configured to include a second semiconductor module 21B. One phase of the second inverter may be configured to include first semiconductor module 21A, and the remaining two phases of the second inverter may be configured to include second semiconductor module 21B. Inverter 8A corresponds to the first inverter, and inverter 8B corresponds to the second inverter. By detecting the temperature of one phase of the inverter, it is possible to suppress an increase in the size of circuit board 23 while ensuring controllability based on temperature.
[0117] As illustrated, the semiconductor element 40 may have, as pads 43, a first pad serving as a temperature sense pad and a second pad provided separately from the first pad. In the second semiconductor module 21B, at least one of the first pads may be electrically connected to the second pad. The anode pad 43A and the cathode pad 43K correspond to the first pads. The Kelvin source pad 43KS, the current sense pad 43SE, and the gate pad 43G correspond to the second pads. In the illustrated second semiconductor module 21B, the cathode pad 43K is electrically connected to the gate pad 43G. The first pad is fixed to the potential of the second pad. This puts the temperature sense pad into a floating state, preventing high voltage from occurring in the temperature sense pad during AC drive or testing. For example, this can prevent damage to the semiconductor element 40 due to high voltage.
[0118] As illustrated, the second semiconductor module 21B may have a first bonding wire connected to a first pad and a second bonding wire connected to a second pad. The second pad may be connected to a signal terminal 84 corresponding to the second pad via the second bonding wire, and at least one of the first pads may be connected via the first bonding wire. The cathode pad 43K corresponds to the first pad, and the bonding wire 901 corresponds to the first bonding wire. The gate pad 43G corresponds to the second pad, and the bonding wire 902 corresponds to the second bonding wire. By connecting the first pad to another signal terminal 84 via the first bonding wire, the first pad and the second pad can be fixed at the same potential.
[0119] <Modification> Although an example in which the cathode pad 43K is electrically connected to the gate pad 43G has been shown, the present invention is not limited to this. For example, the anode pad 43A may be electrically connected to the gate pad 43G. Both the anode pad 43A and the cathode pad 43K may be electrically connected to the gate pad 43G. As the second pad, a Kelvin source pad 43KS or a current sense pad 43SE may be used instead of the gate pad 43G. It is preferable to electrically connect to a second pad located next to the current sense pad (first pad).
[0120] Although the number of signal terminals 84 of the first semiconductor module 21A and the second semiconductor module 21B is varied depending on whether or not the anode terminal 84A and the cathode terminal 84K, which are temperature sensing terminals, are present, the present invention is not limited to this. For example, the number of signal terminals 84 may be varied depending on whether or not the current sensing terminal 84SE is present.
[0121] (Second embodiment) This embodiment is a modification based on the previous embodiment, and the description of the previous embodiment can be used. In the previous embodiment, the signal terminal corresponding to the second pad and the first pad are connected by the first bonding wire. Alternatively, the bonding wire may include a portion that connects the first pad and the second pad.
[0122] FIG. 15 shows an example of a connection structure between the pads of the second semiconductor module and the signal terminals in the power conversion device according to this embodiment. In FIG. 15, the upper arm side is shown enlarged. The bonding wire 90 includes a bonding wire 903. The bonding wire 903 electrically connects the cathode pad 43K of the semiconductor element 40H to the gate terminal 84G. The bonding wire 903 electrically connects the cathode pad 43K to the gate terminal 84G via the gate pad 43G. The bonding wire 903 includes a portion that electrically connects the cathode pad 43K to the gate pad 43G.
[0123] Although not shown, the pads 43 on the semiconductor element 40L side have a similar connection structure to the signal terminals 84. The other configurations are the same as those described in the preceding embodiment.
[0124] <Summary of the second embodiment> As illustrated, the second semiconductor module 21B may have a bonding wire 903 that electrically connects at least one of the first pads to a signal terminal 84 corresponding to the second pad. The bonding wire 903 may include a portion that connects at least one of the first pads to a second pad. In the illustrated second semiconductor module 21B, the cathode pad 43K corresponds to the first pad, and the gate pad 43G corresponds to the second pad.
[0125] According to this, as the bonding wire 90, only the bonding wire 903 is connected to the signal terminal 84 corresponding to the second pad. Therefore, with a simple configuration, it is possible to prevent a high voltage from occurring in the temperature sensing pad, while also suppressing an increase in the size of the circuit board 23.
[0126] <Modification> The bonding wire 903 may electrically connect the gate pad 43G and the gate terminal 84G via, for example, the cathode pad 43K. In one of the semiconductor elements 40H, 40L, the bonding wire 903 may electrically connect the cathode pad 43K and the gate terminal 84G via the gate pad 43G, and in the other of the semiconductor elements 40H, 40L, the bonding wire 903 may electrically connect the gate pad 43G and the gate terminal 84G via, for example, the cathode pad 43K.
[0127] (Third embodiment) This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be used. In the preceding embodiment, the first pad and the second pad are electrically connected by connecting the first pad to a corresponding signal terminal using a bonding wire. Instead, the first pad and the second pad may be electrically connected using a terminal remnant and a tie bar remnant.
[0128] Fig. 16 shows an example of a connection structure between the pads of the second semiconductor module and the signal terminal in the power conversion device according to this embodiment. Fig. 16 corresponds to Fig. 15. The bonding wire 90 includes bonding wires 904 and 905. The bonding wire 904 electrically connects the cathode pad 43K of the semiconductor element 40H to the terminal remainder 86. The bonding wire 905 electrically connects the gate pad 43G to the gate terminal 84G.
[0129] The second semiconductor module 21B has a tie bar remnant 87 that is connected to the signal terminal 84 located adjacent to the terminal remnant 86 and the terminal remnant 86. In FIG. 16, the boundary between the tie bar remnant 87 and the signal terminal 84 and the boundary between the tie bar remnant 87 and the terminal remnant 86 are indicated by dashed lines. The illustrated tie bar remnant 87 is connected to the gate terminal 84G and the terminal remnant 86 located adjacent to the gate terminal 84G. The tie bar remnant 87 is a portion of the tie bar that is intentionally left without being removed. The cathode pad 43K is electrically connected to the gate pad 43G via a bonding wire 904, the terminal remnant 86, the tie bar remnant 87, the gate terminal 84G, and a bonding wire 905.
[0130] Although not shown, the pad 43 and signal terminal 84 on the semiconductor element 40L side also have a similar connection structure. The signal terminal 84 on the semiconductor element 40L side has terminal remnants 86 at both ends in the X direction, for example. A tie bar remnant 87 connects the terminal remnant 86 located at the end on the semiconductor element 40H side to the gate terminal 84G located adjacent to it. The cathode pad 43K is electrically connected to the gate pad 43G via a bonding wire 904, the terminal remnant 86, the tie bar remnant 87, the gate terminal 84G, and a bonding wire 905. The other configurations are the same as those described in the preceding embodiment.
[0131] <Summary of the third embodiment> As illustrated, the second semiconductor module 21B may have a terminal remnant 86 that has a length shorter than the signal terminal 84 and is not mounted on the circuit board 23, and a tie bar remnant 87 that corresponds to the second pad and is connected to the signal terminal 84 located adjacent to the terminal remnant 86 and the terminal remnant 86. At least one of the first pads may be electrically connected to the second pad via the terminal remnant 86, the tie bar remnant 87, and the signal terminal 84. In the illustrated second semiconductor module 21B, the cathode pad 43K corresponds to the first pad, and the gate pad 43G corresponds to the second pad.
[0132] This electrically connects the first pad and the second pad using the terminal remainder 86 and the tie bar remainder 87. Therefore, with a simple configuration, it is possible to prevent a high voltage from occurring in the temperature sensing pad, while also preventing the size of the circuit board 23 from increasing.
[0133] (Fourth embodiment) This embodiment is a modification based on the previous embodiment, and the description of the previous embodiment can be used. In the previous embodiment, the first semiconductor module constituting the first inverter and the first semiconductor module constituting the second inverter are arranged side by side. Alternatively, the first inverter constituting the converter may be arranged between the first semiconductor module constituting the first inverter and the first semiconductor module constituting the second inverter.
[0134] Fig. 17 is a diagram showing a stack of semiconductor modules and coolers in a power conversion device according to this embodiment. Fig. 17 corresponds to Fig. 2. The circuit board is omitted from Fig. 17. Fig. 18 is a plan view showing the circuit board. Fig. 18 corresponds to Fig. 13. As in Fig. 13, the reference symbols for the semiconductor modules and the power conversion circuit are shown corresponding to the through holes 231.
[0135] The illustrated power conversion device 20, like the preceding embodiment, includes three first semiconductor modules 21A and seven second semiconductor modules 21B. One of the first semiconductor modules 21A constitutes the converter 7. Another of the first semiconductor modules 21A and two of the second semiconductor modules 21B constitute the inverter 8A. Another of the first semiconductor modules 21A and the other two of the second semiconductor modules 21B constitute the inverter 8B. The other three of the second semiconductor modules 21B constitute the inverter 8C.
[0136] The multiple semiconductor modules 21 are arranged in the Z direction in the following order: components of the inverter 8, components of the converter 7, components of the inverter 8B, and components of the inverter 8C. More specifically, from the end on the inverter 8A side, they are arranged in the following order: two second semiconductor modules 21B of the inverter 8A, a first semiconductor module 21A of the inverter 8A, a first semiconductor module 21A of the converter 7, a first semiconductor module 21A of the inverter 8B, two second semiconductor modules 21B of the inverter 8B, and three second semiconductor modules 21B of the inverter 8C.
[0137] The through holes 231, through hole lands 231L, insulating portions 232, high-voltage circuit regions 233, signal wiring 235S, etc. of the circuit board 23 are arranged to match the semiconductor module 21. As in the preceding embodiment, the circuit board 23 has three through hole rows of ten through holes 231 each and seven through hole rows of six through holes 231 each. The through hole rows of ten through holes 231 are arranged continuously in the Z direction. In the Z direction, two through hole rows of six through holes 231, three through hole rows of ten through holes 231, and five through hole rows of six through holes 231 are arranged in this order. The other configurations are the same as those described in the preceding embodiment.
[0138] <Summary of the Fourth Embodiment> As illustrated, the first semiconductor module 21A of the first inverter, the first semiconductor module 21A of the second inverter, and the first semiconductor module 21A of the converter may be configured to be continuously lined up in the center of the multiple semiconductor modules 21. The first semiconductor module 21A of the converter 7 may be disposed between the first semiconductor module 21A of the first inverter and the first semiconductor module 21A of the second inverter. In the illustrated power conversion device 20, the inverter 8A corresponds to the first inverter, and the inverter 8B corresponds to the second inverter.
[0139] As described above, the Z-direction misalignment between the through-hole lands 231L and the corresponding electronic components 236 is not as large at the center as it is at the ends. By arranging all of the first semiconductor modules 21A, which have a large number of signal terminals 84, in the center, it is easy to route the corresponding signal wiring 235S. This makes it possible to prevent the size of the circuit board 23 from increasing.
[0140] (Fifth embodiment) This embodiment is a modification based on the previous embodiment, and the description of the previous embodiment can be used. In the previous embodiment, the number of signal terminals is the same for the upper arm and the lower arm that constitute one upper / lower arm circuit. Alternatively, the number of signal terminals may be different for the upper arm and the lower arm.
[0141] Fig. 19 is a diagram showing a stack of semiconductor modules and coolers in a power conversion device according to this embodiment. Fig. 19 corresponds to Fig. 17. Fig. 20 is a plan view showing a circuit board. Fig. 20 corresponds to Fig. 18. As in Fig. 18, the reference symbols for the semiconductor modules and power conversion circuits are shown corresponding to the through holes 231.
[0142] The illustrated power conversion device 20, like the preceding embodiment, includes three first semiconductor modules 21A and seven second semiconductor modules 21B. The multiple semiconductor modules 21 are arranged in the Z direction in the following order: components of converter 7, components of inverter 8, components of inverter 8B, and components of inverter 8C. More specifically, from the end on the converter 7 side, the first semiconductor module 21A of converter 7, two second semiconductor modules 21B of inverter 8A, first semiconductor module 21A of inverter 8A, first semiconductor module 21A of inverter 8B, two second semiconductor modules 21B of inverter 8B, and three second semiconductor modules 21B of inverter 8C are arranged in this order.
[0143] The first semiconductor module 21A has three signal terminals 84 corresponding to the upper arm (semiconductor element 40H) and five signal terminals 84 corresponding to the lower arm (semiconductor element 40L). The second semiconductor module 21B has three signal terminals 84 corresponding to the upper arm and three signal terminals 84 corresponding to the lower arm. The configuration of the upper arm side of the first semiconductor module 21A is similar to that of the second semiconductor module 21B illustrated in FIG. 12, for example.
[0144] In the first semiconductor module 21A, the three signal terminals 84 corresponding to the semiconductor element 40H include a gate terminal 84G, a Kelvin source terminal 84KS, and a current sense terminal 84SE. The signal terminals 84 do not include an anode terminal 84A or a cathode terminal 84K. The gate pad 43G is electrically connected to the gate terminal 84G via a bonding wire 902. The cathode pad 43K is electrically connected to the gate terminal 84G via a bonding wire 901. The cathode pad 43K is electrically connected to the gate pad 43G via bonding wires 901 and 902 and the gate terminal 84G. The five signal terminals 84 corresponding to the semiconductor element 40L have the same configuration as that shown in FIG. 11.
[0145] The through holes 231, through hole lands 231L, insulating portions 232, high-voltage circuit regions 233, signal wiring 235S, etc. of the circuit board 23 are arranged to match the semiconductor modules 21. The circuit board 23 has three through hole rows of eight through holes 231, three in the upper arm and five in the lower arm, and seven through hole rows of six through holes 231. The through hole row of eight through holes 231 is arranged to correspond to the first semiconductor module 21A. In the Z direction, one through hole row of eight through holes 231, two through hole rows of six through holes 231, two through hole rows of eight through holes 231, and five through hole rows of six through holes 231 are arranged in this order. The other configurations are the same as those described in the preceding embodiment.
[0146] <Summary of the Fifth Embodiment> As illustrated, the first semiconductor module 21A may be configured such that the temperature sensing terminal is connected to the lower arm element, but not to the upper arm element. The second semiconductor module 21B may be configured such that the temperature sensing terminal is not connected to either the upper or lower arm element. In the illustrated power conversion device 20, the semiconductor element 40H corresponds to the upper arm element, and the semiconductor element 40L corresponds to the lower arm element. The anode terminal 84A and the cathode terminal 84K correspond to the temperature sensing terminals.
[0147] As described above, due to the need for insulation and separation, the width of the insulating portion 232H on the upper arm side is wider than the width of the insulating portion 232L on the lower arm side. In other words, the area available for arranging the signal wiring 235S is smaller in the high-voltage circuit region 233H on the upper arm side than in the high-voltage circuit region 233L on the lower arm side. By configuring the first semiconductor module 21A so that the temperature sensing terminal is connected to the lower arm element but not to the upper arm element, the signal wiring 235S can be routed efficiently while ensuring temperature-based controllability. The size of the circuit board 23 can be suppressed.
[0148] (Other embodiments) The disclosure in this specification and drawings, etc. is not limited to the exemplified embodiments. The disclosure encompasses the exemplified embodiments and modifications thereto by those skilled in the art. For example, the disclosure is not limited to the combinations of parts and / or elements shown in the embodiments. The disclosure can be implemented in various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure encompasses the omission of parts and / or elements from the embodiments. The disclosure encompasses the substitution or combination of parts and / or elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. Some disclosed technical scopes are defined by the claims, and should be interpreted as including all modifications within the meaning and scope equivalent to the claims.
[0149] The disclosure in the specification, drawings, etc. is not limited by the claims. The disclosure in the specification, drawings, etc. encompasses the technical ideas described in the claims, and extends to more diverse and broader technical ideas than the technical ideas described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification, drawings, etc. without being bound by the claims.
[0150] When an element or layer is referred to as being "on," "coupled," "connected," or "bonded," it may be directly on, coupled, connected, or bonded to another element or layer, and intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly coupled," "directly connected," or "directly bonded" to another element or layer, no intervening elements or layers are present. Other terms used to describe relationships between elements should be construed in a similar manner (e.g., "between" vs. "directly between," "adjacent" vs. "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations of one or more of the associated listed items. That is, reference to A and / or B means at least one of A and B.
[0151] Spatially relative terms such as "inside," "outside," "back," "below," "low," "top," "top," and the like are used herein to facilitate the description of one element or feature's relationship to other elements or features, as illustrated. Spatially relative terms may be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures were turned over, elements described as "below" or "directly below" other elements or features would then be oriented "above" the other elements or features. Thus, the term "bottom" can encompass both an orientation of top and bottom. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used in this specification would be interpreted accordingly.
[0152] Although an example of a 2-in-1 package that provides upper and lower arm circuits for one phase has been shown as the semiconductor module 21, the present invention is not limited to this. The semiconductor module 21 may also be a 1-in-1 package that provides one arm, for example. Two semiconductor modules 21 with a 1-in-1 package structure that configure upper and lower arm circuits for one phase may be arranged on the same layer, that is, between adjacent coolers 22. Of the semiconductor modules 21 on the same layer, the upper arm side may be a second semiconductor module with three terminals, and the lower arm side may be a first semiconductor module with five terminals.
[0153] (Disclosure of technical ideas) This specification discloses multiple technical ideas described in the following multiple clauses. Some clauses may be written in a multiple dependent form, with the subsequent clause referring to the preceding clause as an alternative. Furthermore, some clauses may be written in a multiple dependent form, referring to another multiple dependent clause. These multiple dependent clauses define multiple technical ideas.
[0154] <Technical philosophy 1> A power conversion device constituting a power conversion circuit, a circuit board (23) having wiring; a plurality of semiconductor modules (21) each including at least one semiconductor element (40) and a plurality of signal terminals (84) electrically connected to the semiconductor element and mounted on the circuit board in a predetermined direction, the semiconductor modules (21) being stacked in a direction perpendicular to the predetermined direction; Equipped with The power conversion device, wherein the plurality of semiconductor modules include a first semiconductor module (21A) and a second semiconductor module (21B) having a smaller number of signal terminals than the first semiconductor module.
[0155] <Technical philosophy 2> The wiring includes a signal wiring (235S) electrically connected to the signal terminal, The circuit board has a first region (237) as an arrangement region for the signal wiring, and a second region (238) including the signal wiring that is longer in a direction perpendicular to the predetermined direction than the signal wiring arranged in the first region, The power conversion device according to Technical Concept 1, wherein the second semiconductor module is mounted in at least one of the second regions.
[0156] <Technical philosophy 3> The power conversion device according to Technical Idea 1 or 2, wherein at least one of the first semiconductor modules is disposed in the center of the plurality of stacked semiconductor modules.
[0157] <Technical philosophy 4> the semiconductor element has temperature sense pads (43A, 43K) as signal pads, the first semiconductor module has, as the signal terminal, a temperature sense terminal (84A, 84K) electrically connected to the temperature sense pad; The power conversion device according to any one of Technical Concepts 1 to 3, wherein the second semiconductor module does not have the temperature sensing terminal.
[0158] <Technical philosophy 5> the power conversion circuit includes a first inverter (8A) corresponding to a first rotating electric machine and a second inverter (8B) corresponding to a second rotating electric machine; one phase of the first inverter is configured to include the first semiconductor module, and the remaining two phases of the first inverter are configured to include the second semiconductor module; A power conversion device according to Technical Idea 4, wherein one phase of the second inverter is configured to include the first semiconductor module, and the remaining two phases of the second inverter are configured to include the second semiconductor module.
[0159] <Technical philosophy 6> The power conversion circuit includes a converter (7) having at least a boost function, the converter is configured to include the first semiconductor module, A power conversion device according to Technical Idea 5, wherein the first semiconductor module of the first inverter, the first semiconductor module of the second inverter, and the first semiconductor module of the converter are arranged consecutively in the center of the stacked semiconductor modules so that the first semiconductor module of the converter is located between the first semiconductor module of the first inverter and the first semiconductor module of the second inverter.
[0160] <Technical philosophy 7> the semiconductor module has, as the semiconductor elements, an upper arm element (40H) constituting an upper arm of an upper and lower arm circuit for one phase, and a lower arm element (40L) constituting a lower arm of the upper and lower arm circuit, In the first semiconductor module, the temperature sensing terminal is connected to the lower arm element, and the temperature sensing terminal is not connected to the upper arm element; The power conversion device according to any one of Technical Concepts 4 to 6, wherein in the second semiconductor module, the temperature sense terminal is not connected to either the upper arm element or the lower arm element.
[0161] <Technical philosophy 8> the semiconductor element has, as the pads, a first pad which is the temperature sense pad and a second pad (43G) provided separately from the first pad, The power converter according to any one of Technical Concepts 4 to 7, wherein in the second semiconductor module, at least one of the first pads is electrically connected to the second pad.
[0162] <Technical philosophy 9> the second semiconductor module has a first bonding wire (901) connected to the first pad and a second bonding wire (902) connected to the second pad; A power conversion device as described in Technical Idea 8, wherein the second pad is connected to the signal terminal corresponding to the second pad via the second bonding wire, and at least one of the first pads is connected via the first bonding wire.
[0163] <Technical Thought 10> the second semiconductor module has a bonding wire (903) that electrically connects at least one of the first pads to the signal terminal corresponding to the second pad; The power conversion device according to Technical Concept 8, wherein the bonding wire includes a portion that connects at least one of the first pads to the second pad.
[0164] <Technical Thought 11> the second semiconductor module has a terminal remainder (86) that has a length shorter than the signal terminal and is not mounted on the circuit board, and a tie bar remainder (87) that corresponds to the second pad and is connected to the signal terminal located adjacent to the terminal remainder and the terminal remainder, The power conversion device according to Technical Idea 8, wherein at least one of the first pads is electrically connected to the second pad via the terminal remainder, the tie bar remainder, and the signal terminal.
[0165] <Technical Thought 12> The power conversion device according to any one of Technical Ideas 1 to 11, further comprising a plurality of coolers (22) stacked alternately with the semiconductor modules. [Explanation of symbols]
[0166] 1... drive system, 2... DC power supply, 3, 3A, 3B, 3C... rotating electric machine, 4... power conversion circuit, 5... filter capacitor, 6... smoothing capacitor, 7... converter, 7HL... upper and lower arm circuit, 7H... upper arm, 7L... lower arm, 8, 8A, 8B, 8C... inverter, 8AHL, 8BHL, 8CHL... upper and lower arm circuit, 8AH, 8BH, 8CH... upper arm, 8AL, 8BL, 8CL... lower arm, 9... control circuit, 10... drive circuit, 11H... VL line, 11L... VH line, 12... N line 13...output line, 20...power conversion device, 21...semiconductor module, 21A...first semiconductor module, 21B...second semiconductor module, 22...cooler, 23...circuit board, 231...through hole, 231L...through hole land, 232, 232H, 232L...insulating portion, 233, 233H, 233L...high voltage circuit area, 234...low voltage circuit area, 235...wiring, 235S...signal wiring, 236...electronic component, 237...first area, 238...second area, 24...inlet pipe, 25...exhaust pipe, 30... Sealing body, 301... one surface, 302... rear surface, 303, 304, 305, 306... side surfaces, 40, 40H, 40L... semiconductor elements, 41, 42... main electrodes, 43... pads, 43A... anode pad, 43G... gate pad, 43K... cathode pad, 43KS... Kelvin source pad, 43SE... current sense pad, 50, 60... substrate, 51, 61... insulating base material, 52, 62... surface metal body, 521... P wiring, 522, 622... relay wiring, 621... N wiring, 53, 63... rear metal body, 70... conductive strip Spacer, 75...joint portion, 80...external connection terminal, 81...P terminal, 82...N terminal, 83...O terminal, 84...signal terminal, 84A...anode terminal, 84G...gate terminal, 84K...cathode terminal, 84KS...Kelvin source terminal, 84SE...current sense terminal, 85...hanging lead, 86...remaining terminal portion, 87...remaining tie bar portion, 90, 901, 902, 903, 904, 905...bonding wire, 91...bonding material, D1, D2, D3, D4...diode, Q1, Q2, Q3, Q4...switching element
Claims
1. A power conversion device constituting a power conversion circuit, a circuit board (23) having wiring; a plurality of semiconductor modules (21) each having at least one semiconductor element (40) and a plurality of signal terminals (84) electrically connected to the semiconductor element and mounted on the circuit board in a line in a predetermined direction, the plurality of semiconductor modules (21) being stacked in a direction perpendicular to the predetermined direction; Equipped with The power conversion device, wherein the plurality of semiconductor modules include a first semiconductor module (21A) and a second semiconductor module (21B) having a smaller number of signal terminals than the first semiconductor module.
2. The wiring includes a signal wiring (235S) electrically connected to the signal terminal, The circuit board has a first region (237) as an arrangement region for the signal wiring, and a second region (238) including the signal wiring that is longer in a direction perpendicular to the predetermined direction than the signal wiring arranged in the first region, The power conversion device according to claim 1 , wherein the second semiconductor module is mounted in at least one of the second regions.
3. The power conversion device according to claim 1 , wherein at least one of the first semiconductor modules is disposed at a center of the plurality of stacked semiconductor modules.
4. The semiconductor element has temperature sense pads (43A, 43K) as signal pads, the first semiconductor module has, as the signal terminal, a temperature sense terminal (84A, 84K) electrically connected to the temperature sense pad, 4. The power conversion device according to claim 1, wherein the second semiconductor module does not have the temperature sense terminal.
5. the power conversion circuit includes a first inverter (8A) corresponding to a first rotating electric machine and a second inverter (8B) corresponding to a second rotating electric machine; one phase of the first inverter is configured to include the first semiconductor module, and the remaining two phases of the first inverter are configured to include the second semiconductor module; 5. The power conversion device according to claim 4, wherein one phase of the second inverter is configured to include the first semiconductor module, and the remaining two phases of the second inverter are configured to include the second semiconductor module.
6. The power conversion circuit includes a converter (7) having at least a boost function, the converter is configured to include the first semiconductor module, 6. The power conversion device according to claim 5, wherein the first semiconductor module of the first inverter, the first semiconductor module of the second inverter, and the first semiconductor module of the converter are arranged consecutively at the center of the stacked plurality of semiconductor modules so that the first semiconductor module of the converter is located between the first semiconductor module of the first inverter and the first semiconductor module of the second inverter.
7. The semiconductor module includes, as the semiconductor elements, an upper arm element (40H) constituting an upper arm of an upper and lower arm circuit for one phase, and a lower arm element (40L) constituting a lower arm of the upper and lower arm circuit, In the first semiconductor module, the temperature sensing terminal is connected to the lower arm element, and the temperature sensing terminal is not connected to the upper arm element; 5. The power conversion device according to claim 4, wherein in said second semiconductor module, said temperature sense terminal is not connected to either said upper arm element or said lower arm element.
8. The semiconductor element has, as the pads, a first pad which is the temperature sensing pad and a second pad (43G) provided separately from the first pad, The power conversion device according to claim 4 , wherein in the second semiconductor module, at least one of the first pads is electrically connected to the second pad.
9. The second semiconductor module has a first bonding wire (901) connected to the first pad and a second bonding wire (902) connected to the second pad, 9. The power conversion device according to claim 8, wherein the second pad is connected to the signal terminal corresponding to the second pad via the second bonding wire, and at least one of the first pads is connected to the signal terminal corresponding to the second pad via the first bonding wire.
10. the second semiconductor module has a bonding wire (903) that electrically connects at least one of the first pads and the signal terminal corresponding to the second pad; The power conversion device according to claim 8 , wherein the bonding wire includes a portion that connects at least one of the first pads to the second pad.
11. the second semiconductor module has a terminal remainder (86) that has a length shorter than the signal terminal and is not mounted on the circuit board, and a tie bar remainder (87) that corresponds to the second pad and is connected to the signal terminal located adjacent to the terminal remainder and the terminal remainder, The power conversion device according to claim 8 , wherein at least one of the first pads is electrically connected to the second pad via the terminal remainder, the tie bar remainder, and the signal terminal.
12. The power conversion device according to any one of claims 1 to 3, further comprising a plurality of coolers (22) stacked alternately with the semiconductor modules.
Citation Information
Patent Citations
Power conversion device
JP2016163446A