Semiconductor device

Abstract

To provide a semiconductor device capable of suppressing occurrence of current collapse.SOLUTION: A semiconductor device comprises a first semiconductor layer, a second semiconductor layer, a first electrode, a second electrode, a gate electrode, and a third semiconductor layer. The first semiconductor layer contains Alx1Ga1-x1N (0≤x1<1). The second semiconductor layer contains Alx2Ga1-x2N (0<x2<1, x1<x2). The second semiconductor layer includes a first portion and a second portion which is separated from the first portion in a second direction that is vertical to a first direction from the first semiconductor layer toward the second semiconductor layer. The first electrode is provided on the first portion. The second electrode is provided on the second portion. The gate electrode is provided between the first electrode and the second electrode. The third semiconductor layer is positioned between the gate electrode and the second electrode and contains carbon and gallium nitride. The third semiconductor layer has a carbon concentration that is higher than 5.0×1017 cm-3.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] There are semiconductor devices containing gallium nitride, and there is a demand for technology that can suppress the occurrence of current collapse in these semiconductor devices. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-207748 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a semiconductor device capable of suppressing the occurrence of current collapse. [Means for solving the problem]

[0005] The semiconductor device according to the embodiment includes a first semiconductor layer, a second semiconductor layer, a first electrode, a second electrode, a gate electrode, and a third semiconductor layer. The first semiconductor layer is made of Al x1 Ga 1-x1 The second semiconductor layer contains N (0≦x1<1). The second semiconductor layer is provided on the first semiconductor layer. The second semiconductor layer contains Al x2 Ga 1-x2It contains N(0 < x2 < 1, x1 < x2). The second semiconductor layer includes a first portion and a second portion that is separated from the first portion in a second direction perpendicular to a first direction from the first semiconductor layer toward the second semiconductor layer. The first electrode is provided on the first portion. The second electrode is provided on the second portion. The gate electrode is provided between the first electrode and the second electrode. The third semiconductor layer is located between the gate electrode and the second electrode and contains carbon and gallium nitride. The third semiconductor layer has a carbon concentration higher than 5.0×10 17 cm -3 More specifically, it has a carbon concentration higher than 5.0×10

Brief Description of the Drawings

[0006] [Figure 1] FIG. 1 is a cross-sectional view showing a semiconductor device according to an embodiment. [Figure 2] FIGS. 2(a) and 2(b) are cross-sectional views showing a method of manufacturing a semiconductor device according to an embodiment. [Figure 3] FIGS. 3(a) and 3(b) are cross-sectional views showing a method of manufacturing a semiconductor device according to an embodiment. [Figure 4] FIG. 4 is a schematic diagram showing the structure of the third semiconductor layer. [Figure 5] FIG. 5 is a cross-sectional view showing a semiconductor device according to a first modification of an embodiment. [Figure 6] FIG. 6 is a cross-sectional view showing a semiconductor device according to a second modification of an embodiment. [Figure 7] FIG. 7 is a cross-sectional view showing a semiconductor device according to a third modification of an embodiment. [Figure 8] FIG. 8 is a cross-sectional view showing a semiconductor device according to a fourth modification of an embodiment.

Embodiments for Carrying Out the Invention

[0007] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationships between the thickness and width of each part, the ratio of the sizes between parts, etc. are not necessarily the same as those in reality. Also, even when representing the same part, there may be cases where their dimensions or ratios are represented differently in the drawings. In the specification of this application and each figure, the same reference numerals are assigned to elements that are the same as those already described, and detailed descriptions will be omitted as appropriate.

[0008] FIG. 1 is a cross-sectional view showing a semiconductor device according to an embodiment. As shown in FIG. 1, a semiconductor device 100 according to an embodiment includes a semiconductor substrate 10, a first semiconductor layer 11, a second semiconductor layer 12, a third semiconductor layer 13, a source electrode 21 (first electrode), a drain electrode 22 (second electrode), and a gate electrode 23.

[0009] In the description of the embodiment, an XYZ orthogonal coordinate system is used. The direction from the first semiconductor layer 11 toward the second semiconductor layer 12 is defined as the Z direction (first direction). Two directions that are perpendicular to the Z direction and orthogonal to each other are defined as the X direction (second direction) and the Y direction. Also, for the sake of explanation, the direction from the first semiconductor layer 11 toward the second semiconductor layer 12 is referred to as "up", and the opposite direction is referred to as "down". These directions are independent of the direction of gravity based on the relative positional relationship between the first semiconductor layer 11 and the second semiconductor layer 12.

[0010] The first semiconductor layer 11 is provided on the semiconductor substrate 10 and contains Al x1 Ga 1-x1 N (0 ≦ x1 < 1). The semiconductor substrate 10 is, for example, a Si substrate. A buffer layer (not shown) may be provided between the semiconductor substrate 10 and the first semiconductor layer 11. The second semiconductor layer 12 is provided on the first semiconductor layer 11 and contains Al x2 Ga 1-x2 N (0 < x2 < 1, x1 < x2). As an example, the first semiconductor layer 11 is a GaN layer substantially free of Al, and the second semiconductor layer 12 is an AlGaN layer.

[0011] The second semiconductor layer 12 includes a first portion 12a and a second portion 12b. The first portion 12a and the second portion 12b are spaced apart from each other in the X direction. The source electrode 21 is provided on the first portion 12a. The drain electrode 22 is provided on the second portion 12b. The source electrode 21 and the drain electrode 22 are electrically connected to the second semiconductor layer 12. The source electrode 21 and the drain electrode 22 are spaced apart from each other in the X direction.

[0012] The gate electrode 23 is provided on the second semiconductor layer 12 via a gate insulating layer 23a, and is located between the source electrode 21 and the drain electrode 22 in the X direction. The gate electrode 23 is spaced apart from the source electrode 21 and the drain electrode 22. For example, the distance between the drain electrode 22 and the gate electrode 23 is longer than the distance between the source electrode 21 and the gate electrode 23. The source electrode 21, the drain electrode 22, and the gate electrode 23 include a metal material such as titanium, copper, or aluminum.

[0013] The third semiconductor layer 13 is provided on the second semiconductor layer 12 and is located between the drain electrode 22 and the gate electrode 23 in the X direction. The third semiconductor layer 13 contains carbon and gallium nitride. For example, the third semiconductor layer 13 is separated from the gate electrode 23 and in contact with the drain electrode 22. A portion of the drain electrode 22 is provided on the third semiconductor layer 13.

[0014] The operation of the semiconductor device 100 will be described. The semiconductor device 100 is a normally-on type device. Two-dimensional electron gas (2DEG) is generated at the interface between the first semiconductor layer 11 and the second semiconductor layer 12. When a positive voltage is applied to the drain electrode 22 relative to the source electrode 21, electrons contained in the two-dimensional electron gas move from the source electrode 21 to the drain electrode 22. This causes a current to flow between the source electrode 21 and the drain electrode 22. When a negative voltage is applied to the gate electrode 23, electrons in the region directly below the gate electrode 23 are repelled, and this region is depleted. This causes the semiconductor device 100 to enter an off state.

[0015] 2(a), 2(b), 3(a), and 3(b) are cross-sectional views showing a method for manufacturing a semiconductor device according to the embodiment. First, a semiconductor substrate 10 is prepared. As shown in FIG. 2(a), a first semiconductor layer 11, a second semiconductor layer 12, and a third semiconductor layer 13 are sequentially formed on the semiconductor substrate 10 by metalorganic chemical vapor deposition (MOCVD). Carbon is added when the third semiconductor layer 13 is formed. A portion of the third semiconductor layer 13 is removed by reactive ion etching (RIE). As a result, a portion of the upper surface of the second semiconductor layer 12 is exposed, as shown in FIG. 2(b).

[0016] A gate insulating layer 23a is formed by chemical vapor deposition (CVD) on the exposed upper surface of the second semiconductor layer 12. As shown in FIG. 3(a), a portion of the gate insulating layer 23a is removed by RIE. As shown in FIG. 3(b), a gate electrode 23 is formed at a position away from the third semiconductor layer 13, and a source electrode 21 and a drain electrode 22 are formed on the exposed upper surface of the second semiconductor layer 12. A portion of the drain electrode 22 is also formed on the third semiconductor layer 13. Through the above steps, the semiconductor device 100 according to the embodiment is manufactured.

[0017] The advantages of the embodiment will be described. Current collapse in a semiconductor device is caused by crystal defects in the semiconductor layer, electron traps at the interface of the semiconductor layer, etc. In an embodiment of the present invention, in order to suppress the occurrence of current collapse, the semiconductor device 100 includes a third semiconductor layer 13. The third semiconductor layer 13 contains carbon and gallium nitride, and the carbon concentration is 5.0×10 17 cm -3 Higher than.

[0018] FIG. 4 is a schematic diagram showing the structure of the third semiconductor layer. As shown in FIG. 4, most of the third semiconductor layer 13 has a crystal structure of gallium and nitrogen. Some of the nitrogen is substituted with carbon. Nitrogen is a group V element, and carbon is a group IV element. When nitrogen is substituted with carbon, the carbon functions as an acceptor in the third semiconductor layer 13. That is, the third semiconductor layer 13 functions as a p-type semiconductor layer. Holes are supplied from the third semiconductor layer 13 to the interface between the second semiconductor layer 12 and the third semiconductor layer 13. The supply of holes neutralizes electrons trapped at the interface between the second semiconductor layer 12 and the third semiconductor layer 13. As a result, current collapse in the semiconductor device 100 is suppressed. In particular, when the carbon concentration is 5.0×10 17 cm -3 By increasing the concentration of the second semiconductor layer 12 to more than 100%, a sufficient number of holes are supplied from the third semiconductor layer 13 to the interface between the second semiconductor layer 12 and the third semiconductor layer 13, and current collapse can be suitably suppressed.

[0019] In addition to carbon, other possible acceptors for gallium nitride include calcium, zinc, beryllium, magnesium, and the like. However, calcium, zinc, and beryllium are considered more difficult to activate as p-type impurities than carbon. Furthermore, when magnesium is used, a large amount of hydrogen is incorporated into the semiconductor layer along with the magnesium. Therefore, a process for desorbing hydrogen from the semiconductor layer is required. The incorporation of a large amount of hydrogen can also affect the reliability of the semiconductor device. Therefore, carbon is more preferable than elements such as calcium, zinc, beryllium, and magnesium.

[0020] To incorporate carbon as an acceptor into the third semiconductor layer 13, carbon can be added to the film during gallium nitride crystal growth by autodoping or external doping. The autodoping method uses carbon derived from organometallic gases as a raw material, and the amount of carbon added must be controlled by the growth temperature and growth rate, which presents a technical challenge in that it limits the growth conditions. On the other hand, adding carbon by external doping using acetylene (C2H2) gas or other dopant gases increases the flexibility of epitaxial process parameters such as growth temperature and growth rate, making external doping more preferable. More detailed methods are discussed, for example, in Xun Li et al., "Precursors for carbon doping of GaN in chemical vapor deposition," Journal of Vacuum Science & Technology B, 2015, Vol. 33, No. 2. Alternatively, Yoshio Honda et al., "DAP emission band in a carbon doped (1-101)GaN grown on a (001)Si substrate," Physica Status Solidi C, 2009, Vol. S2, pp. S772-S775 may be referenced.

[0021] The upper limit of the carbon concentration in the third semiconductor layer 13 is not particularly limited, but is preferably 1.0×10 20 cm -3 It is preferable that the carbon concentration is less than 1.0×10 20 cm -3 If the carbon concentration in the gallium nitride layer is above the solubility limit, dislocations or crystal defects such as surface pits appear, causing degradation of device characteristics such as current leakage. Therefore, from the viewpoint of ensuring crystal quality and device characteristics, the carbon concentration in the third semiconductor layer 13 is set to 5.0×10 17 cm -3 higher than 1.0×10 20 cm -3 More preferably, the carbon concentration in the third semiconductor layer 13 is less than 1.0×10 18 cm-3 That's it, 1.0 x 10 20 cm -3 is less than.

[0022] The carbon concentration in the first semiconductor layer 11 and the carbon concentration in the second semiconductor layer 12 are preferably lower than that in the third semiconductor layer 13. For example, the carbon concentration in the first semiconductor layer 11 and the carbon concentration in the second semiconductor layer 12 are preferably 5.0×10 17 cm -3 More preferably, the carbon concentration in the first semiconductor layer 11 is 1.0×10 or less. 16 cm -3 That's it, 3.0 x 10 16 cm -3 The carbon concentration in the second semiconductor layer 12 is 1.0×10 15 cm -3 That's it, 1.0 x 10 17 cm -3 The following is the result.

[0023] The third semiconductor layer 13 is preferably spaced apart from the gate electrode 23. If the third semiconductor layer 13 were in contact with the gate electrode 23, carriers generated in the third semiconductor layer 13 would cause electrical conduction between the gate electrode 23 and the drain electrode 22. Therefore, electrical isolation is necessary. For example, the distance D1 between the gate electrode 23 and the third semiconductor layer 13 is 0.5 times or more the distance D2 between the gate electrode 23 and the drain electrode 22. More preferably, the distance D1 is 0.6 times or more the distance D2, and most preferably, the distance D1 is 0.8 times or more the distance D2.

[0024] (First Modification) FIG. 5 is a cross-sectional view showing a semiconductor device according to a first modification of the embodiment. The semiconductor device 110 shown in FIG. 5 differs from the semiconductor device 100 in that the gate electrode 23 is in contact with the second semiconductor layer 12. The gate electrode 23 contains a metal with a high work function, and a Schottky junction is formed between the second semiconductor layer 12 and the gate electrode 23. For example, the gate electrode 23 contains one or more elements selected from the group consisting of Ni, Au, Pd, V, and Pt. According to the semiconductor device 110, the second semiconductor layer 12 is in Schottky contact with the gate electrode 23, and therefore, a gate function is realized by controlling the width of a depletion layer formed in the region of the first semiconductor layer 11 and the second semiconductor layer 12 directly below the gate electrode 23 using a gate voltage.

[0025] (Second Modification) FIG. 6 is a cross-sectional view showing a semiconductor device according to a second modification of the embodiment. 6, the second semiconductor layer 12 includes a third portion 12c located between the first portion 12a and the second portion 12b. The fluorine concentration in the third portion 12c is higher than the fluorine concentration in the first portion 12a and higher than the fluorine concentration in the second portion 12b. The gate electrode 23 is provided on the third portion 12c and is in contact with the third portion 12c.

[0026] The third portion 12c is formed by forming the first semiconductor layer 11, the second semiconductor layer 12, and the third semiconductor layer 13, then etching away a portion of the third semiconductor layer, and injecting fluorine ions into a portion of the second semiconductor layer 12 (third portion 12c) or irradiating it with fluorine plasma.

[0027] The fluorine concentration in the third portion 12c is 1.0×10 19 (atm / cm 3 ) or more. The fluorine concentration in the third portion 12c is preferably equal to or higher than the fluorine concentration (atm / cm 3 ) in the first portion 12a or the second portion 12b. 3 ) is preferably 40 times or more and 2000 times or less.

[0028] According to the semiconductor device 120, the third portion 12c having a higher fluorine concentration is provided in the second semiconductor layer 12, so that the gate current value is kept low and the controllability of the threshold voltage value is improved.

[0029] (Third Modification) FIG. 7 is a cross-sectional view showing a semiconductor device according to a third modification of the embodiment. 7 differs from the semiconductor device 100 in that a fourth semiconductor layer 14 is provided between the second semiconductor layer 12 and the gate electrode 23. The fourth semiconductor layer 14 is a p-type semiconductor layer and is in contact with the second semiconductor layer 12 and the gate electrode 23. The fourth semiconductor layer 14 is spaced apart from the third semiconductor layer 13 and the source electrode 21 in the X direction. The fourth semiconductor layer 14 contains one or more p-type impurities selected from the group consisting of carbon and magnesium.

[0030] By providing the fourth semiconductor layer 14, the region immediately below the gate electrode 23 in the second semiconductor layer 12 is depleted when no voltage is applied to the gate electrode 23. When a voltage equal to or greater than the threshold is applied to the gate electrode 23, holes are injected from the gate electrode 23 into the region immediately below, and the semiconductor device 130 is turned on. In other words, the semiconductor device 130 is a normally-off device.

[0031] (Fourth Modification) FIG. 8 is a cross-sectional view showing a semiconductor device according to a fourth modification of the embodiment. 8 differs from the semiconductor device 100 in that a gate electrode 23 is located between the first portion 12a and the second portion 12b. The gate electrode 23 faces the first semiconductor layer 11 in the Z direction with the gate insulating layer 23a interposed therebetween. The gate electrode 23 faces the second semiconductor layer 12 in the X direction with the gate insulating layer 23a interposed therebetween. The semiconductor device 140 has a recessed gate structure.

[0032] In the semiconductor device 140, the 2DEG generated directly under the source electrode 21 and the 2DEG generated directly under the drain electrode 22 are separated by the gate insulating layer 23a. Therefore, the semiconductor device 140 is a normally-off type device. When a voltage equal to or higher than the threshold value is applied to the gate electrode 23, a channel is formed in the region near the gate insulating layer 23a in the first semiconductor layer 11. As a result, a current flows between the source electrode 21 and the drain electrode 22.

[0033] In the manufacturing method of the semiconductor device 140, after forming the third semiconductor layer 13 by executing the process shown in FIG. 2(b), a part of the second semiconductor layer 12 and a part of the first semiconductor layer 11 are removed to form a trench. By forming the gate insulating layer 23a and the gate electrode 23 inside this trench, the semiconductor device 140 is manufactured.

[0034] In any of the semiconductor devices 110, 120, 130, or 140 described above, by providing the third semiconductor layer 13, the occurrence of current collapse can be suppressed.

[0035] Embodiments of the present invention include the following features. (Feature 1) Al x1 Ga 1-x1 A first semiconductor layer containing N (0 ≦ x1 < 1), Provided on the first semiconductor layer, Al x2 Ga 1-x2 A second semiconductor layer containing N (0 < x2 < 1, x1 < x2), the second semiconductor layer including a first portion and a second portion separated from the first portion in a second direction perpendicular to a first direction from the first semiconductor layer toward the second semiconductor layer, A first electrode provided on the first portion, A second electrode provided on the second portion, A gate electrode provided between the first electrode and the second electrode, Located between the gate electrode and the second electrode, containing carbon and gallium nitride, 5.0×10 17 cm -3a third semiconductor layer having a carbon concentration higher than A semiconductor device comprising: (Feature 2) 2. The semiconductor device according to claim 1, wherein the third semiconductor layer is spaced apart from the gate electrode in the second direction. (Feature 3) 3. The semiconductor device according to feature 1 or 2, wherein the distance in the second direction between the gate electrode and the third semiconductor layer is 0.5 times or more the distance in the second direction between the gate electrode and the second electrode. (Feature 4) 4. The semiconductor device according to any one of Features 1 to 3, wherein the third semiconductor layer is p-type. (Feature 5) 5. The semiconductor device according to any one of Features 1 to 4, wherein the third semiconductor layer is in contact with the second electrode. (Feature 6) 6. The semiconductor device according to any one of Features 1 to 5, wherein a portion of the second electrode is provided on the third semiconductor layer. (Feature 7) the second semiconductor layer includes a third portion located between the first portion and the second portion, the gate electrode is located on and in contact with the third portion; 7. The semiconductor device according to any one of Features 1 to 6, wherein the fluorine concentration in the third portion is higher than the fluorine concentration in the first portion and higher than the fluorine concentration in the second portion.

[0036] Although several embodiments of the present invention have been described above, these embodiments are presented by way of example only and are not intended to limit the scope of the invention. These novel embodiments may be embodied in various other forms, and various omissions, substitutions, modifications, etc. may be made without departing from the spirit of the invention. These embodiments and their modifications are within the scope and spirit of the invention, and are also within the scope of the invention and its equivalents as set forth in the claims. Furthermore, the above-described embodiments may be implemented in combination with each other. [Explanation of symbols]

[0037] 10: semiconductor substrate, 11: first semiconductor layer, 12: second semiconductor layer, 12a: first portion, 12b: second portion, 12c: third portion, 13: third semiconductor layer, 14: fourth semiconductor layer, 21: source electrode, 22: drain electrode, 23: gate electrode, 23a: gate insulating layer, 100, 110, 120, 130, 140: semiconductor device, D1, D2: distance

Claims

1. Al ｘ１ Ga １－ｘ１ a first semiconductor layer containing N (0≦x1<1); provided on the first semiconductor layer, ｘ２ Ga １－ｘ２ a second semiconductor layer containing N (0<x2<1, x1<x2), the second semiconductor layer including a first portion and a second portion spaced apart from the first portion in a second direction perpendicular to a first direction from the first semiconductor layer toward the second semiconductor layer; a first electrode disposed on the first portion; a second electrode disposed on the second portion; a gate electrode provided between the first electrode and the second electrode; a gallium nitride film between the gate electrode and the second electrode, the gallium nitride film containing carbon and gallium nitride, and a 5.0×10 １７ cm －３ a third semiconductor layer having a carbon concentration higher than A semiconductor device comprising:

2. The semiconductor device according to claim 1 , wherein the third semiconductor layer is spaced apart from the gate electrode in the second direction.

3. 3. The semiconductor device according to claim 1, wherein the distance in the second direction between the gate electrode and the third semiconductor layer is 0.5 times or more the distance in the second direction between the gate electrode and the second electrode.

4. 3. The semiconductor device according to claim 1, wherein the third semiconductor layer is a p-type semiconductor layer.

5. The semiconductor device according to claim 1 , wherein the third semiconductor layer is in contact with the second electrode.

6. The semiconductor device according to claim 1 , wherein a portion of the second electrode is provided on the third semiconductor layer.

7. the second semiconductor layer includes a third portion located between the first portion and the second portion, the gate electrode is located above and in contact with the third portion; 3. The semiconductor device according to claim 1, wherein the fluorine concentration in the third portion is higher than the fluorine concentration in the first portion and higher than the fluorine concentration in the second portion.

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