Semiconductor device

Abstract

To provide a semiconductor device with good electrical characteristics, and to provide a semiconductor device with high reliability.SOLUTION: A semiconductor device has a first transistor, a second transistor, a first insulating layer, and a second insulating layer. The first transistor has a first semiconductor layer, a first gate insulating layer, and a first gate electrode. The first semiconductor layer contains a metal oxide. The second transistor has a second semiconductor layer, a second gate insulating layer, and a second gate electrode. The second semiconductor layer contains crystalline silicon. The first insulating layer has a region overlapping with the first transistor via the second insulating layer. The second insulating layer has a region overlapping with the second transistor via the first insulating layer. The film density of the second insulating layer is higher than that of the first insulating layer.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] 1. Field of the Invention One embodiment of the present invention relates to a semiconductor device. One embodiment of the present invention relates to a display device. One embodiment relates to a method for manufacturing a semiconductor device or a display device.

[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical fields. In one embodiment of the technical field of the present invention, there are provided a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, Electronic device, lighting device, input device, input / output device, driving method thereof, or manufacturing method thereof For example, a semiconductor device functions by utilizing the semiconductor properties. This refers to all devices that can be used. [Background technology]

[0003] Oxide semiconductors using metal oxides are attracting attention as semiconductor materials that can be used in transistors. For example, in Patent Document 1, a plurality of oxide semiconductor layers are stacked, and the plurality of oxide semiconductor layers are Among the oxide semiconductor layers, an oxide semiconductor layer serving as a channel contains indium and gallium, and By increasing the ratio of indium to that of gallium, the field effect mobility (simply called mobility) can be improved. A semiconductor device with enhanced mobility, or μFE, is disclosed.

[0004] Metal oxides that can be used in the semiconductor layer can be formed using a sputtering method or the like. Therefore, it can be used for the semiconductor layer of a transistor that constitutes a large display device. By improving some of the production facilities for transistors using polycrystalline silicon and amorphous silicon, This allows for the use of metal oxide transistors, which reduces capital investment. The capacitor has a higher field effect mobility than amorphous silicon, so it can be used in the drive circuit. A high-performance display device can be realized.

[0005] In display devices, the screen size is becoming larger, with diagonal sizes of 60 inches or more. The development is also underway with a view to screen sizes of 120 inches or more diagonally. The screen resolution is also full HD (1920 x 1080 pixels, also known as "2K"). ), Ultra Hi-Vision (pixel count 3840 x 2160, or "4K" ), Super Hi-Vision (7680 x 4320 pixels, or "8K" It is also said that there is a trend towards higher resolution.

[0006] Larger screen sizes and higher resolutions tend to increase the wiring resistance within the display. In the literature 2, in a liquid crystal display device using amorphous silicon transistors, an increase in wiring resistance In order to suppress the increase in resistance, a technique for forming a low-resistance wiring layer using copper (Cu) has been disclosed. do. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-7399 [Patent Document 2] Japanese Patent Application Laid-Open No. 2004-163901 Summary of the Invention [Problem to be solved by the invention]

[0008] An object of one embodiment of the present invention is to provide a semiconductor device with favorable electrical characteristics. Another object of one embodiment of the present invention is to provide a highly reliable semiconductor device. Another object of one embodiment of the present invention is to provide a small-sized semiconductor device. An object of one embodiment of the present invention is to provide a semiconductor device with low power consumption. An object of one embodiment of the present invention is to provide a novel semiconductor device.

[0009] Another object of one embodiment of the present invention is to provide a high-resolution display device. An object of one embodiment of the present invention is to provide a display device with high operating speed. An object of one embodiment of the present invention is to provide a highly reliable display device. An object of one embodiment of the present invention is to provide a display device with a narrow frame. An object of one embodiment of the present invention is to provide a display device with low power consumption. An object of one embodiment of the present invention is to provide a novel display device.

[0010] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter can be extracted from the description, drawings, claims, etc. [Means for solving the problem]

[0011] One embodiment of the present invention is a semiconductor device including a first transistor, a second transistor, a first insulating layer, and The semiconductor device has a first insulating layer. The first transistor has a first semiconductor layer and a second insulating layer. The first semiconductor layer has a first gate insulating layer and a first gate electrode. The first gate electrode overlaps the first semiconductor layer via the first gate insulating layer. The second transistor has a second semiconductor layer, a second gate insulating layer, and a second and a gate electrode of the second semiconductor layer. The second semiconductor layer comprises crystalline silicon. The electrode has a region overlapping the second semiconductor layer with the second gate insulating layer interposed therebetween. The layer has a region that overlaps with the first transistor through a second insulating layer. The first insulating layer has a region overlapping with the second transistor through the first insulating layer. It is preferable that the film density is higher than that of the insulating layer 1.

[0012] In the semiconductor device, the first gate electrode is connected to the second insulating layer via the first semiconductor layer. It is preferred to have an area of ​​overlap with the layer.

[0013] In the semiconductor device described above, the first transistor includes a third gate insulating layer and a third gate insulating layer. The third gate electrode is preferably connected to the second gate electrode via a third gate insulating layer. The second insulating layer preferably has a region overlapping the first semiconductor layer. It is preferable that the third gate insulating layer has a region overlapping the third gate insulating layer via the electrode.

[0014] In the semiconductor device, the first transistor may have a third gate electrode. Preferably, the third gate electrode is connected to the first semiconductor layer via the first insulating layer and the second insulating layer. It is preferable that the region overlaps with the region.

[0015] In the above-mentioned semiconductor device, the third gate electrode is formed by applying the same conductive film as the second gate electrode. It is preferable that the film is formed by processing.

[0016] In the semiconductor device described above, the second semiconductor layer includes a first region and a pair of second semiconductor layers sandwiching the first region. and a second region, wherein the first region has a region overlapping with the second gate electrode. Preferably, the third gate electrode comprises crystalline silicon. and the third gate electrode are made of boron, aluminum, gallium, indium, phosphorus, It is preferable to have one or more selected from arsenic, antimony, and bismuth.

[0017] In the semiconductor device described above, the first semiconductor layer is connected to the second insulating layer via the first gate electrode. It is preferred to have an area of ​​overlap with the layer.

[0018] One aspect of the present invention is a semiconductor device including a first transistor and a second transistor. The first transistor includes a first semiconductor layer, a first gate insulating layer, and a first gate The first semiconductor layer includes a metal oxide. The first gate electrode includes: The second transistor has a region overlapping with the first semiconductor layer via the first gate insulating layer. The second gate electrode has a second semiconductor layer, a second gate insulating layer, and a second gate electrode. The semiconductor layer has crystalline silicon. The second gate electrode is connected to the semiconductor layer through a second gate insulating layer. The first gate insulating layer has a region overlapping with the second semiconductor layer. and a second insulating layer on the first insulating layer. The second insulating layer is connected to the second insulating layer via the first insulating layer. The second insulating layer has a region overlapping with the transistor. The second insulating layer has a film density higher than that of the first insulating layer. High is preferable.

[0019] In the above-mentioned semiconductor device, the first gate electrode is formed by applying the same conductive film as the second gate electrode. It is preferable that the film is formed by processing.

[0020] In the semiconductor device described above, the second semiconductor layer includes a first region and a pair of second semiconductor layers sandwiching the first region. and a second region, wherein the first region has a region overlapping with the second gate electrode. Preferably, the first gate electrode comprises crystalline silicon. and the first gate electrode are made of boron, aluminum, gallium, indium, phosphorus, It is preferable to have one or more selected from arsenic, antimony, and bismuth.

[0021] In the semiconductor device described above, the second semiconductor layer is connected to the first insulating layer via the second gate electrode. It is preferred to have an area of ​​overlap with the layer.

[0022] In the semiconductor device, the second gate electrode is connected to the first insulating layer via the second semiconductor layer. It is preferred to have an area of ​​overlap with the layer.

[0023] One embodiment of the present invention is a semiconductor device including a first semiconductor layer having crystalline silicon, a first gate insulating layer, and a and a first gate electrode. a first insulating layer is formed, and a second insulating layer having a film density higher than that of the first insulating layer is formed on the first insulating layer; forming an insulating layer, forming a second semiconductor layer having a metal oxide on the second insulating layer, forming a second gate insulating layer on the insulating layer and the second semiconductor layer; A conductive film is formed on the semiconductor layer, and the conductive film is processed to form a semiconductor layer including a second semiconductor layer and a second gate insulating layer. a second gate electrode of the second transistor, and a second gate electrode electrically connected to the first semiconductor layer; The present invention relates to a method for manufacturing a semiconductor device in which wiring is formed. [Effects of the Invention]

[0024] According to one embodiment of the present invention, a semiconductor device with favorable electrical characteristics can be provided. It is possible to provide a semiconductor device with high efficiency. It is also possible to provide a small semiconductor device. A low-power semiconductor device or a novel semiconductor device can be provided.

[0025] According to one embodiment of the present invention, a high-definition display device can be provided. A display device with high speed can be provided. Alternatively, a display device with high reliability can be provided. A picture-frame display device or a display device with low power consumption can be provided.

[0026] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. can be extracted from descriptions in the specification, drawings, claims, etc. [Brief explanation of the drawings]

[0027] [Figure 1] 1A, 1B, and 1C are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 2] 2A, 2B, and 2C are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 3] 3A and 3B are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 4] 4A and 4B are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 5] FIG. 5 is a cross-sectional view showing an example of the configuration of a semiconductor device. [Figure 6] 6A, 6B, and 6C are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 7] 7A and 7B are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 8] 8A and 8B are cross-sectional views showing configuration examples of a semiconductor device. [Figure 9]9A, 9B, and 9C are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 10] 10A, 10B, and 10C are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 11] 11A, 11B, and 11C are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 12] 12A, 12B, and 12C are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 13] 13A, 13B, and 13C are cross-sectional views showing examples of the configuration of a semiconductor device. [Figure 14] FIG. 14 is a cross-sectional view showing an example of the configuration of a semiconductor device. [Figure 15] 15A and 15B are cross-sectional views showing configuration examples of a semiconductor device. [Figure 16] 16A and 16B are cross-sectional views showing configuration examples of a semiconductor device. [Figure 17] 17A and 17B are cross-sectional views showing configuration examples of a semiconductor device. [Figure 18] 18A and 18B are cross-sectional views showing configuration examples of a semiconductor device. [Figure 19] 19A and 19B are cross-sectional views showing configuration examples of a semiconductor device. [Figure 20] 20A and 20B are cross-sectional views showing configuration examples of a semiconductor device. [Figure 21] 21A and 21B are cross-sectional views showing configuration examples of a semiconductor device. [Figure 22] 22A, 22B, 22C, 22D, and 22E are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 23] 23A, 23B, and 23C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 24] 24A, 24B, and 24C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 25] 25A, 25B, and 25C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 26] 26A and 26B are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 27] Fig. 27A is a diagram illustrating a laser processing device, and Figs. 27B and 27C are diagrams illustrating an irradiation method of the laser processing device. [Figure 28] 28A, 28B and 28C are top views of the display device. [Figure 29] FIG. 29 is a cross-sectional view of the display device. [Figure 30] FIG. 30 is a cross-sectional view of the display device. [Figure 31] FIG. 31 is a cross-sectional view of the display device. [Figure 32] FIG. 32 is a cross-sectional view of the display device. [Figure 33] FIG. 33 is a cross-sectional view of the display device. [Figure 34] Fig. 34A is a block diagram of a display device, and Fig. 34B and Fig. 34C are circuit diagrams of the display device. [Figure 35] Figures 35A, 35C and 35D are circuit diagrams of the display device, and Figure 35B is a timing chart of the display device. [Figure 36] Fig. 36A is a diagram showing a configuration example of a display module, and Fig. 36B is a schematic cross-sectional view of the display module. [Figure 37] Fig. 37A is a diagram showing a configuration example of an electronic device, and Fig. 37B is a schematic cross-sectional view of the electronic device. [Figure 38] 38A, 38B, 38C, 38D, and 38E are diagrams showing configuration examples of electronic devices. [Figure 39] 39A, 39B, 39C, 39D, 39E, 39F, and 39G are diagrams showing configuration examples of electronic devices. [Figure 40] 40A, 40B, 40C, and 40D are diagrams showing configuration examples of electronic devices. DETAILED DESCRIPTION OF THE INVENTION

[0028] Hereinafter, embodiments will be described with reference to the drawings. It is understood that the present invention may be embodied in various different forms without departing from its spirit and scope. It will be readily apparent to those skilled in the art that various modifications may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0029] In each figure described in this specification, the size of each component, layer thickness, or area is not clearly indicated. May be exaggerated for clarity.

[0030] The ordinal numbers "first," "second," and "third" used in this specification are intended to avoid confusion of constituent elements. This is added to avoid any inconvenience and is not intended to limit the number.

[0031] In this specification, the terms "above" and "below" that indicate the position of components are used to indicate the position of components. The positional relationship is used for convenience in describing the drawings. The positional relationship changes depending on the direction in which each component is depicted. The terms are not limited to those described above, but may be rephrased appropriately depending on the situation.

[0032] In this specification and the like, the functions of the source and drain of a transistor are defined as those of different polarities. When using a transistor or when the direction of current changes during circuit operation, For this reason, the terms source and drain can be used interchangeably. It shall be possible.

[0033] In this specification, the channel length direction of a transistor is defined as the direction of the channel length between the source region and the drain region. The channel length direction is one of the directions parallel to the line connecting the two points at the shortest distance. , which corresponds to one of the directions of current flowing through the semiconductor layer when the transistor is in the on state. The channel width direction is the direction perpendicular to the channel length direction. Depending on the structure and shape of the transistor, the channel length direction and channel width direction are not fixed. There are cases where this happens.

[0034] In this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a wire. There are no particular restrictions as long as it allows electrical signals to be transmitted between the connected devices. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. switching elements, resistor elements, inductors, capacitors, and other elements with various functions This includes children, etc.

[0035] In this specification, the terms "film" and "layer" are interchangeable. For example, the terms "conductive layer" and "insulating layer" can be used interchangeably with "conductive film" and "insulating film." The terms "membrane" and "membrane" may be interchangeable.

[0036] In this specification, the term "top surface shapes are roughly the same" means that the top surface shapes of the stacked layers are at least This refers to the overlapping of parts of the contours. For example, the upper and lower layers may have the same mask pattern, or This includes cases where parts are processed using the same mask pattern. However, strictly speaking, the outlines overlap. The edges of the upper layer are positioned inside the edges of the lower layer, and the edges of the upper layer are positioned inside the edges of the lower layer. In some cases, the upper surface shape is located outside the upper surface, and in this case, it is also said that the upper surface shape roughly matches.

[0037] Unless otherwise specified, in this specification and the like, the off-state current is the current that flows when a transistor is in an off state ( The drain current when the device is in a non-conducting state (also called a cut-off state). Unless otherwise specified, for n-channel transistors, the voltage between the gate and source, V gs but Threshold voltage V th (For p-channel transistors, V th (higher than It refers to one's attitude.

[0038] In this specification, a display panel, which is one aspect of a display device, displays (outputs) an image or the like on a display surface. Therefore, a display panel is one aspect of an output device.

[0039] In this specification, for example, an FPC (Flexible Printed Circuit) is attached to the substrate of the display panel. ed Circuit) or TCP (Tape Carrier Package) or a board with a COG (Chip On Glass) connector. ss) method, etc., are called display panel modules, display modules, It may also be simply called a display panel.

[0040] In this specification and the like, a touch panel, which is one aspect of a display device, is a device for displaying images and the like on a display surface. The function of displaying the information and detecting when a detectable object such as a finger or stylus touches, presses, or approaches the display surface. It also functions as a touch sensor to detect when something is touching the screen. A rule is one form of input / output device.

[0041] The touch panel is, for example, a display panel (or display device) with a touch sensor, A touch panel can also be called a display panel (or display device) with a touch function. Alternatively, the display panel may have a touch sensor panel. It may also be configured to have a touch sensor function inside or on the surface.

[0042] In this specification, a touch panel substrate on which a connector and an IC are mounted is referred to as a touch panel. It may be called a touch panel module, a display module, or simply a touch panel.

[0043] (Embodiment 1) In this embodiment, a semiconductor device according to one embodiment of the present invention and a manufacturing method thereof will be described. .

[0044] One embodiment of the present invention is a semiconductor device including a first transistor, a second transistor, a first insulating layer, and The semiconductor device has a first insulating layer. The first transistor has a first semiconductor layer and a second insulating layer. The first gate electrode has a first gate insulating layer and a first gate electrode. The second transistor has a region overlapping with the first semiconductor layer via a gate insulating layer. The second gate electrode has a second semiconductor layer, a second gate insulating layer, and a second gate electrode. The electrode has a region overlapping the second semiconductor layer with the second gate insulating layer interposed therebetween. The layer preferably has a region that overlaps with the first transistor via the second insulating layer. The second insulating layer may have a region overlapping with the second transistor through the first insulating layer. It is also preferable that the second insulating layer has lower hydrogen permeability than the first insulating layer. By using a film with a higher film density than the first insulating layer for the second insulating layer, Therefore, it is possible to prevent hydrogen from permeating to the first transistor side.

[0045] One aspect of the present invention is a semiconductor device including a first transistor and a second transistor. The first transistor includes a first semiconductor layer, a first gate insulating layer, and a first gate The first gate electrode is connected to the first semiconductor via the first gate insulating layer. The second transistor has a region overlapping the second semiconductor layer and a second gate insulating layer. The second gate electrode is connected to the second gate insulating layer via the second gate insulating layer. The first gate insulating layer has a region overlapping with the second semiconductor layer. and a second insulating layer on the insulating layer of the first insulating layer. It is preferable that the second transistor has a region overlapping with the second transistor via the second insulating layer. The second insulating layer preferably has a lower hydrogen permeability than the first insulating layer. By using a film with a higher film density than the first insulating layer, hydrogen is transferred from the first insulating layer side to the first transistor side. It is possible to suppress the penetration of

[0046] The first transistor is a transistor including a metal oxide (hereinafter also referred to as an oxide semiconductor). An OS transistor can be used. The field-effect mobility is extremely high compared to transistors using amorphous silicon. The S transistor has a leakage current between the source and drain in the off state (hereinafter referred to as the off current). (also called "transistor") is extremely small, and the charge stored in the capacitor connected in series with the transistor The use of OS transistors reduces power consumption. Therefore, a semiconductor device having a high resistance can be obtained.

[0047] The second transistor is a transistor having silicon (hereinafter also referred to as a Si transistor). In particular, low temperature polysilicon (LTPS) can be used. Transistors with low-temperature polysilicon (LTPS transistors) An LTPS transistor is a field-effect transistor. High mobility and good frequency characteristics. By using LTPS transistors, the operating speed This makes it possible to provide a semiconductor device with high speed.

[0048] The semiconductor device according to one embodiment of the present invention includes a Si Applying the OS transistor to transistors that require low leakage By arranging these on the same board, component costs and mounting costs can be reduced. Furthermore, the semiconductor device according to one embodiment of the present invention can reduce the cost. By incorporating silicon transistors and silicon MOSFETs, this semiconductor achieves both low power consumption and high speed operation. Furthermore, the semiconductor device can have good electrical characteristics and high reliability. It is possible.

[0049] The semiconductor device according to one embodiment of the present invention can be applied to a display device. The OS transistor is a transistor that functions as a switch to control the conduction or non-conduction of It is possible to apply Si transistors to transistors that control current. In particular, applying LTPS transistors to transistors that control current By adopting such a configuration, it is possible to provide a display device that achieves both low power consumption and high speed operation. Furthermore, a display device having good electrical characteristics and high reliability can be obtained. Cut.

[0050] The first insulating layer has a region located between the OS transistor and the Si transistor. The first insulating layer has a region overlapping with the OS transistor and is also overlapped with the Si transistor. The first insulating layer preferably has an overlapping region. The first insulating layer releases hydrogen when heat is applied. The hydrogen desorbed from the first insulating layer is absorbed into the silicon of the Si transistor. The dangling bonds of the silicon are terminated to provide a silicon transistor with good electrical characteristics. Moreover, a highly reliable Si transistor can be obtained.

[0051] However, when hydrogen desorbed from the first insulating layer diffuses into the OS transistor, Hydrogen takes away oxygen from the metal oxide, creating oxygen vacancies (hereinafter referred to as V O Also written ) may be generated. Also, oxygen vacancies (V O ) with hydrogen (hereafter referred to as V O H and In particular, when hydrogen diffuses into the channel formation region, The carrier concentration in the channel formation region increases, and the electrical characteristics of the OS transistor deteriorate. In one embodiment of the present invention, a semiconductor device includes a first insulating layer and an OS transistor. By providing a second insulating layer with low hydrogen permeability between the first and second insulating layers, hydrogen can penetrate the OS transistor. Therefore, the OS transistor can have good electrical characteristics. Moreover, a highly reliable OS transistor can be obtained.

[0052] In the semiconductor device according to one embodiment of the present invention, after forming a Si transistor, an OS transistor is formed. OS transistors can be fabricated at low temperatures. Therefore, OS transistors can be formed without deteriorating the electrical characteristics and reliability of Si transistors. As a result, a semiconductor device having both good electrical characteristics and high reliability can be obtained.

[0053] A more specific configuration example will be described below with reference to the drawings.

[0054] <Configuration example 1> [Configuration Example 1-1] A schematic cross-sectional view of a semiconductor device 10 according to one embodiment of the present invention is shown in FIG. 1A. has a transistor 20 and a transistor 30. In FIG. 1A, transistor 20 1 shows a schematic cross-sectional view of a transistor 30 in the channel length direction.

[0055] The semiconductors used in the transistors 20 and 30 are each selected from Group 14 semiconductors (silicon, germanium, etc.), compound semiconductors such as gallium arsenide, and organic semiconductors The semiconductor used in the transistor 20 may be a metal oxide. The semiconductors used in the transistor 30 are non-single-crystal semiconductors (amorphous semiconductors, The semiconductor may be a microcrystalline semiconductor, a polycrystalline semiconductor, or a single crystal semiconductor. In addition, the semiconductor used in the transistor 20 and the semiconductor used in the transistor 30 are the same. They may be made of the same type of material or different types of materials.

[0056] For example, the semiconductor used in the transistors 20 and 30 is amorphous silicon. Amorphous silicon (A-Si) can be used. Amorphous silicon is particularly suitable for mass production. It has excellent properties and can be easily provided on a substrate with a large area. The amorphous silicon used in this process contains a lot of hydrogen. It is sometimes called "amorphous silicon:H" or "a-Si:H." Since amorphous silicon can be formed at a lower temperature than polycrystalline silicon, the maximum temperature during the manufacturing process can be reduced. Therefore, it is possible to use materials with low heat resistance for the substrate, conductive layer, and insulating layer. It can be used.

[0057] For example, the semiconductor used in the transistor 20 and the transistor 30 is a microcrystalline silicon. It is also possible to use silicon with crystallinity, such as silicon, polycrystalline silicon, or single crystal silicon. In particular, low temperature polysilicon (LTPS) Polycrystalline silicon, also known as y silicon, is formed at a lower temperature than single-crystal silicon. It has higher field-effect mobility and higher reliability than amorphous silicon.

[0058] For example, the semiconductor used in the transistors 20 and 30 may be a metal oxide. Typically, an oxide semiconductor containing indium or the like can be used. Metal oxide transistors are superior to amorphous silicon transistors. It can achieve higher field effect mobility and higher reliability than transistors using metal oxides. Transistors are suitable for mass production and can be easily provided on a substrate with a large area.

[0059] The transistor 20 includes a semiconductor layer 108, an insulating layer 110, and a conductive layer 112. The insulating layer 110 functions as a gate insulating layer. The conductive layer 112 is connected to the semiconductor layer 112 via the insulating layer 110. The transistor 20 has a region overlapping with the conductor layer 108 and functions as a gate electrode. The gate electrode is provided on the conductor layer 108, which is a so-called top-gate transistor. For example, a metal oxide can be suitably used as the semiconductor layer .

[0060] The transistor 30 includes a semiconductor layer 308, an insulating layer 135, and a conductive layer 306. The edge layer 135 functions as a gate insulating layer. The conductive layer 306 is connected to the semiconductor via the insulating layer 135. The transistor 30 has a region overlapping with the conductor layer 308, which functions as a gate electrode. The gate electrode is provided on the conductor layer 308, which is a so-called top-gate transistor. For example, silicon can be suitably used as the semiconductor layer 308. Crystalline silicon can be preferably used as the insulating film 08, and in particular low-temperature polysilicon (LTP S) can be preferably used.

[0061] The semiconductor device 10 according to one embodiment of the present invention includes a semiconductor layer 108 of the transistor 20 and a transistor Different materials can be used for the semiconductor layer 308 of the transistor 30. By using transistors with different materials for the body layers, the advantages of each transistor can be maximized. In addition, a transistor is provided above the transistor 30, and a high-performance semiconductor device can be obtained by utilizing the transistor. By providing the transistor 20, the semiconductor device 10 can be made compact. By using the semiconductor device according to one embodiment of the present invention in a display device, a high-definition display device can be obtained. It is possible.

[0062] The transistor 20 will now be described in detail.

[0063] The semiconductor layer 108 has a region 108i and a pair of regions 108n. The insulating layer 110 is formed between the conductive layer 112 and the insulating layer 110. ... overlaps with the conductive layer 112 via the insulating layer 110. The insulating layer 110 functions as a channel forming region. The higher the electrical resistance of the region 108i in a state where no channel is formed, the better. For example, the sheet resistance value of the region 108i is preferably 1×10 7 Ω / □ or more is preferable, Then 1×10 8 Ω / □ or more is preferable, and 1×10 9 Ω / □ or higher is preferable.

[0064] The pair of regions 108n are provided with the region 108i therebetween. The resistance of the region 108n is lower than that of the region 8i, and the region 108n functions as a source region and a drain region. The lower the air resistance, the more preferable. For example, the sheet resistance of the region 108n is 1 Ω / □ or more and 1× 10 3 Preferably less than Ω / □, more preferably 1Ω / □ or more and 8×10 2 Ω / □ or less is preferable. The above upper and lower limits can be combined in any manner.

[0065] The electrical resistance of the region 108i in the state where no channel is formed is 1 x 10 of electrical resistance 6 1×10 times more 12 times or less is preferable, and even more preferably 1 × 10 6 more than twice 1×10 11 times or less is preferable, and even more preferably 1 × 10 6 1×10 times more 10 Preferably less than 2 times The above upper and lower limits can be combined in any way.

[0066] By using the resistance value mentioned above, a high on-current and a low off-current are achieved. The transistor 20 may have a switching characteristic.

[0067] The lower the carrier concentration in the region 108i that functions as a channel forming region, the more preferable. 1×1018 cm -3 Preferably, it is 1×10 or less. 17 cm -3 is It is more preferable to use 1 x 10 16 cm -3 More preferably, it is 1×10 or less. 13 cm -3 More preferably, it is 1×10 or less. 12 cm -3 The following is true: It is more preferable that the lower limit of the carrier concentration of the region 108i is not particularly limited. However, for example, 1×10 -9 cm -3 It can be said that:

[0068] On the other hand, the carrier concentration in the region 108n is, for example, 5×10 18 cm -3 Above, I like Or 1 x 10 19 cm -3 More preferably, 5 × 10 19 cm -3 That's all The upper limit of the carrier concentration in the region 108n is not particularly limited, but For example, 5 x 10 21 cm -3 , or 1 × 10 22 cm -3 etc.

[0069] By setting the carrier concentration to the value mentioned above, a high on-current and a low off-current are achieved. It may be a transistor 20 having switching properties.

[0070] The region 108n is a region containing a first element. The first element may be, for example, hydrogen or boron. Carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, magnesium, helium, One or more of neon, argon, krypton, and xenon may be used. As the first element, one or more of hydrogen, boron, nitrogen, and phosphorus are preferably used. can be done.

[0071] The concentration of the first element in the semiconductor layer 108 can be measured by, for example, secondary ion mass spectroscopy (SIMS). Secondary Ion Mass Spectrometry and X-ray photoelectron spectroscopy Optical method (XPS:X-ray Photoelectron Spectroscopy) When using XPS analysis, the analysis can be performed from the front or back side. By combining ion sputtering and XPS analysis, it is possible to determine the concentration distribution in the depth direction. In addition, when the concentration of the first element is low, the first element is not detected in the analysis. In particular, the concentration of the first element in the region 108i is low. Therefore, the first element may not be detected in the analysis or may be below the detection limit.

[0072] The semiconductor layer 108 contains a metal oxide (hereinafter also referred to as an oxide semiconductor) that exhibits semiconductor properties. The semiconductor layer 108 preferably contains at least indium and oxygen. When 108 contains indium oxide, the carrier mobility can be increased. For example, a transistor that can pass a larger current than one that uses amorphous silicon. Furthermore, the semiconductor layer 108 is made of a metal oxide containing at least zinc and oxygen. By including zinc oxide, carrier mobility can be increased.

[0073] The crystallinity of the semiconductor material used for the semiconductor layer 108 is not particularly limited, and may be an amorphous semiconductor. , single crystal semiconductors, or semiconductors with crystallinity other than single crystal (microcrystalline semiconductors, polycrystalline semiconductors) A single-crystal semiconductor or a semiconductor having a crystalline region in a part thereof may be used. It is preferable to use a crystalline semiconductor because it can suppress the deterioration of transistor characteristics. .

[0074] The semiconductor layer 108 preferably includes a metal oxide. Alternatively, the semiconductor layer 108 includes The silicon may be amorphous silicon or crystalline silicon. Examples include silicon (polycrystalline silicon, microcrystalline silicon, single crystal silicon, etc.).

[0075] When a metal oxide is used as the semiconductor layer 108, for example, a metal oxide containing indium and an element M (M are gallium, aluminum, silicon, boron, yttrium, tin, copper, and vanadium. , beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum of tantalum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium Preferably, the element M comprises one or more of aluminum and zinc. Preferably, the element is one or more of gallium, yttrium, and tin. More preferably, the element M contains either or both of gallium and tin.

[0076] The semiconductor layer 108 may be formed of, for example, indium (In), gallium (Ga), and zinc ( An oxide containing Zn (hereinafter also referred to as IGZO) can be suitably used. 108, for example, when the atomic ratio of metal elements is In:Ga:Zn=1:1:1 or The oxides in the vicinity can be preferably used.

[0077] The semiconductor layer 108 may contain aluminum, silicon, in addition to indium, gallium, and zinc. Silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel Kel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium oxides containing one or more of tungsten, tantalum, magnesium, or In particular, in addition to indium, gallium, and zinc, The use of oxides containing tin, aluminum, or silicon results in high field-effect mobility. This is preferable because it can be used as a realized transistor.

[0078] When the semiconductor layer 108 is an In-M-Zn oxide, in order to form an In-M-Zn oxide film, The sputtering target used in this method has an atomic ratio of In to element M of 1 or more. The atomic ratio of the metal elements in such a sputtering target is preferably In :M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1: 3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4: 2:4.1, In:M:Zn=5:1:3, In:M:Zn=5:1:4, In:M:Z n=5:1:5, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M :Zn=5:1:8, In:M:Zn=6:1:6, In:M:Zn=5:2:5, In :M:Zn=10:1:3, In:M:Zn=10:1:4, In:M:Zn=10:1 :5, In:M:Zn=10:1:6, In:M:Zn=10:1:7, In:M:Zn In the above, the element M may be two or more elements. When the metal element M is contained, the ratio of the element M in the atomic ratio is the sum of the number of atoms of the two or more metal elements. It shall correspond to:

[0079] When a sputtering target containing a polycrystalline oxide is used, the crystallinity is improved. In addition, the atomic ratio of the semiconductor layer to be formed is preferably is the atomic ratio of the metal elements contained in the sputtering target mentioned above plus or minus 4 For example, if the composition of the sputtering target used for the semiconductor layer is In: When the atomic ratio of M:Zn is 4:2:4.1, the composition of the semiconductor layer formed is In:M Zn:Zn=4:2:3 [atomic ratio] may be close.

[0080] When the atomic ratio is described as In:M:Zn=4:2:3 or in the vicinity, In is When the element M is 1 or more and 3 or less, and the element Zn is 2 or more and 4 or less, the element M may be 1 or more and 3 or less. In addition, when describing that the atomic ratio is In:M:Zn=5:1:6 or in the vicinity, When M is greater than 0.1 and less than 2, and Zn is greater than 5 and less than 7, The atomic ratio is described as In:M:Zn=1:1:1 or in the vicinity. In this case, when In is 1, the element M is greater than 0.1 and less than 2, and Zn is greater than 0.1. This includes cases where the number is greater than or equal to 2.

[0081] Here, the composition of the semiconductor layer 108 will be described. The semiconductor layer 108 is made of at least an insulator. It is preferable that the semiconductor layer 108 contains a metal oxide containing sodium and oxygen. In addition, the semiconductor layer 108 may contain zinc. stomach.

[0082] For example, the semiconductor layer 108 may have an atomic ratio of metal elements of In:Ga:Zn=1:1: 1, In:Ga:Zn=1:1:1.2, In:Ga:Zn=2:1:3, In:Ga: Zn=3:1:2, In:Ga:Zn=4:2:3, In:Ga:Zn=4:2:4.1 , In:Ga:Zn=5:1:3, In:Ga:Zn=5:1:4, In:Ga:Zn= 5:1:5, In:Ga:Zn=5:1:6, In:Ga:Zn=5:1:7, In:G a:Zn=5:1:8, In:Ga:Zn=6:1:6, In:Ga:Zn=5:2:5 , In:Ga:Zn=10:1:3, In:Ga:Zn=10:1:4, In:Ga:Z n=10:1:5, In:Ga:Zn=10:1:6, In:Ga:Zn=10:1:7 In:Ga:Zn=10:1:8 or a metal oxide film having a ratio of these values ​​is used. This can be done.

[0083] The composition of the semiconductor layer 108 significantly affects the electrical characteristics and reliability of the transistor 20. For example, by increasing the content of indium in the semiconductor layer 108, the carrier mobility can be increased. This improves the conductivity of the transistor, making it possible to realize a transistor with high field-effect mobility.

[0084] Here, one of the indicators for evaluating the reliability of a transistor is the gate voltage when an electric field is applied to the gate. Gate Bias Stress Test (GBT) Among them, there is a test to check the gate potential against the source and drain potentials. A test in which a positive potential is applied and the material is kept at a high temperature is called PBTS (Positive Bias Test). s Temperature Stress) test, with a negative potential applied to the gate, The test held at high temperature is called NBTS (Negative Bias Temperature Test). It is also called the PB Stress test, which is performed under the condition of irradiating light such as white LED light. The TS test and NBTS test were performed using PBTIS (Positive Bias Test Indicator) mperature Illumination Stress) test, NBTIS(N egative Bias Temperature Illumination St This is called a ress test.

[0085] In particular, in an n-type transistor using an oxide semiconductor, When the gate is placed in the state where current flows, a positive potential is applied to the gate. The amount of variation in threshold voltage is one of the important indicators of transistor reliability. This becomes:

[0086] The semiconductor layer 108 is a metal oxide film that does not contain gallium or has a low gallium content. By using this, it is possible to reduce the amount of variation in threshold voltage in the PBTS test. When gallium is contained, the composition of the semiconductor layer 108 has a higher content of gallium than the content of indium. It is preferable to reduce the gallium content, which results in a highly reliable transistor. This can be achieved.

[0087] One of the factors that causes the threshold voltage fluctuation in the PBTS test is the difference between the semiconductor layer and the gate insulating layer. The defect level at or near the interface is one of the causes. The higher the defect level density, the higher the PB Degradation in the TS test becomes significant. Gallium oxide in the area of ​​the semiconductor layer that contacts the gate insulating layer By reducing the content of Zn, it is possible to suppress the generation of the defect levels.

[0088] Gallium-free or low gallium content suppresses PBTS degradation The reason why this is possible is thought to be, for example, as follows: Sodium has a tendency to attract oxygen more easily than other metal elements (e.g., indium and zinc). Therefore, the metal oxide film containing a large amount of gallium and the insulating layer 110 containing oxide At the interface with the insulating layer 110, gallium combines with excess oxygen in the insulating layer 110, and the carriers ( It is assumed that electron trap sites are more likely to occur here. When a positive potential is applied to the gate, carriers are trapped at the interface between the semiconductor layer and the gate insulating layer. This may cause the threshold voltage to fluctuate.

[0089] More specifically, when an In-Ga-Zn oxide is used for the semiconductor layer 108, the In atoms A metal oxide film having a higher atomic ratio than that of Ga can be applied to the semiconductor layer 108. In addition, a metal oxide film in which the atomic ratio of Zn is higher than the atomic ratio of Ga can be used. In other words, the atomic ratio of the metal elements is In>Ga and Zn>Ga. Preferably, a filling metal oxide film is applied to the semiconductor layer 108 .

[0090] When a metal oxide film containing indium and gallium is used as the semiconductor layer 108, The ratio of the number of gallium atoms to the number of atoms of the metal element contained in the metal oxide (atomic ratio) is , greater than 0 and less than 50%, preferably 0.05% or more and 30% or less, more preferably 0. It can be 1% or more and 15% or less, more preferably 0.1% or more and 5% or less. By including gallium in the semiconductor layer 108, oxygen vacancies (hereinafter referred to as V O (also written as This has the effect of making it less likely to occur.

[0091] A metal oxide film that does not contain gallium may be used as the semiconductor layer 108. For example, In Zn oxide can be applied to the semiconductor layer 108. At this time, the metal oxide film By increasing the atomic ratio of In to the atomic number of the metal element, the field effect of the transistor can be improved. On the other hand, the number of atoms of the metal element contained in the metal oxide can be increased. By increasing the atomic ratio of Zn, a metal oxide film with high crystallinity is obtained, which allows for the formation of a transistor. The semiconductor layer 108 has a structure in which the fluctuation of the electrical characteristics is suppressed, and the reliability is improved. A gallium- and zinc-free metal oxide film, such as indium oxide, may also be applied. By using a metal oxide film that does not contain gallium, the threshold value in the PBTS test is The fluctuation of the voltage can be made extremely small.

[0092] For example, the semiconductor layer 108 can be made of an oxide containing indium and zinc. When the atomic ratio of metal elements is, for example, In:Zn=2:3, In:Zn=4:1, or Alternatively, a metal oxide film in the vicinity of these can be used.

[0093] In particular, the semiconductor layer 108 contains a metal oxide in which the atomic ratio of In is higher than the atomic ratio of the element M. It is preferable to apply a film of Zn. It is preferable to apply an oxide film.

[0094] The semiconductor layer 108 is preferably formed using a crystalline metal oxide film. For example, CAAC (c-axis aligned crystal) structure, nc (na A metal oxide film having a (no crystal) structure, a polycrystalline structure, a microcrystalline structure, etc. is used. By using a crystalline metal oxide film for the semiconductor layer 108, The defect level density in the semiconductor layer 108 can be reduced, and a highly reliable semiconductor device can be realized.

[0095] As the semiconductor layer 108 has higher crystallinity, the density of defect states in the film can be reduced. A transistor that can pass a large current by using a metal oxide film with low crystallinity This can be achieved.

[0096] The semiconductor layer 108 may be a layer having different compositions, different crystallinity, or different impurity concentrations. Alternatively, a laminated structure may be formed by laminating the above layers.

[0097] When forming a metal oxide film by sputtering, the substrate temperature (stage temperature) during film formation The higher the crystallinity, the more highly crystalline the metal oxide film can be formed. The higher the ratio of the flow rate of oxygen gas to the total deposition gas used (also called the oxygen flow rate ratio), the better the deposition efficiency. A metal oxide film with high crystallinity can be formed. The crystallinity of the film can be controlled by the substrate temperature and the oxygen flow rate ratio in the deposition gas.

[0098] The insulating layer 110 functions as a gate insulating layer for the transistor 20. The insulating layer 110 in contact with the insulating layer 110 preferably comprises an oxide or an oxynitride. 110 may have a region containing oxygen in excess of the stoichiometric composition. The insulating layer 110 may have an insulating film capable of releasing oxygen. The insulating layer 110 is formed in an oxygen atmosphere, and after the insulating layer 110 is formed, the insulating layer 110 is heat-treated in an oxygen atmosphere. After the insulating layer 110 is formed, a plasma treatment or the like is performed in an oxygen atmosphere. For example, an oxide film or an oxynitride film may be formed over the insulating layer 110 in an oxygen atmosphere. In this way, oxygen can be supplied into the insulating layer 110. In place of or in addition to oxygen, an oxidizing gas (e.g., nitrous oxide or Zone, etc.) may also be used.

[0099] In this specification, the term "oxynitride" refers to a compound having a higher oxygen content than nitrogen content. Nitride oxide refers to a material that contains more nitrogen than oxygen in its composition. For example, when it is written as silicon oxynitride, it means that the composition contains more oxygen than nitrogen. It refers to a material with a high content of silicon dioxide, and when it is written as silicon nitride oxide, it means that the composition contains more silicon dioxide than oxygen. This refers to materials with a higher nitrogen content than steel.

[0100] The insulating layer 110 is formed by, for example, a sputtering method, a chemical vapor deposition (CVD) method, or the like. Vapor Deposition (Vapor Deposition), Vacuum Evaporation, Pulsed Laser Deposition (PLD) :Pulsed Laser Deposition) method, atomic layer deposition (ALD: Ato It can be formed by using a method such as Micro Layer Deposition. The CVD method is called Plasma Enhanced Chemical Vapor Deposition (PECVD). In particular, the insulating layer 110 is formed by PECVD (plasma chemical vapor deposition). It is preferable to form it by the VD method.

[0101] For example, the insulating layer 110 may be a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film. , silicon nitride film, aluminum oxide film, hafnium oxide film, yttrium oxide film, oxide Zirconium film, gallium oxide film, tantalum oxide film, magnesium oxide film, lanthanum oxide An insulating film containing one or more of a cerium oxide film, a cerium oxide film, and a neodymium oxide film can be used. The insulating layer 110 may have a stacked structure of two layers or three or more layers.

[0102] The insulating layer 110 is made of silicon oxide, which has a higher dielectric constant than silicon oxide or silicon oxynitride. Materials such as fluorine can also be used. This allows the insulating layer 110 to be thicker and the tunnel In particular, hafnium oxide, which has crystallinity, can suppress leakage current due to amorphous It is preferable because it has a higher relative dielectric constant than hafnium oxide.

[0103] The conductive layer 112 functions as a gate electrode of the transistor 20. It is preferable to use a low-resistance material for the conductive layer 112. The resistivity can be reduced to provide a transistor having a high on-state current. For example, the conductive layer 112 may be a conductive layer containing a metal or an alloy. The conductive film is preferably used because it can reduce the electrical resistance. A conductive film containing an oxide may be used. Reducing the wiring resistance suppresses signal delay and enables high-speed driving.

[0104] The conductive layer 112 may be made of chromium, copper, aluminum, gold, silver, zinc, niobium, molybdenum, or titanium. One or more selected from the group consisting of tantalum, titanium, tungsten, manganese, nickel, iron, and cobalt The conductive layer 112 may be made of an alloy containing the above-mentioned metal element or Alternatively, an alloy of the above-mentioned metal elements may be used. In particular, copper has low resistance. In addition, it is preferable because it is excellent in mass productivity.

[0105] The conductive layer 112 may have a layered structure. When the conductive layer 112 has a layered structure, a low resistance A second conductive layer is provided on top of or underneath the first conductive layer, or both. The conductive layer is made of a conductive material that is less susceptible to oxidation (has oxidation resistance) than the first conductive layer. It is also preferable that the second conductive layer suppresses the diffusion of the components of the first conductive layer. For the second conductive layer, it is preferable to use a material such as indium oxide or indium monoxide. Silicon-containing zinc oxide, indium tin oxide (ITO), silicon-containing indium stannate Metal oxides such as titanium nitride, tantalum nitride, and molybdenum nitride are used. Metal nitrides such as tungsten nitride and tungsten nitride can be suitably used.

[0106] The conductive layer 112 may be formed of In—Sn oxide, In—W oxide, In—W—Zn oxide, In- Ti oxide, In-Ti-Sn oxide, In-Zn oxide, In-Sn-Si oxide, I An oxide conductor such as n-Ga-Zn oxide or a metal oxide film can also be used.

[0107] Here, an oxide conductor (OC) will be described. For example, oxygen vacancies are formed in a metal oxide having semiconductor properties, and hydrogen is supplied to the oxygen vacancies. When the metal oxide is heated, a donor level is formed near the conduction band. As a result, the metal oxide becomes highly conductive. The metal oxide that has been made conductive can be called an oxide conductor.

[0108] The conductive layer 112 is a conductive film containing an oxide conductor (metal oxide) and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, wiring The resistance can be reduced. It is preferable to apply a conductive film containing an oxide conductor to the side.

[0109] The semiconductor device 10 preferably further includes an insulating layer 118. The insulating layer 118 is The insulating layer 11 functions as a protective insulating layer to protect the transistor 20 and the transistor 30. 8 is made of an inorganic insulating material such as oxide, oxynitride, oxynitride, or nitride. More specifically, the insulating layer 118 can be made of silicon oxide or silicon oxynitride. , silicon nitride, silicon oxide nitride, aluminum oxide, aluminum oxide nitride, aluminum nitride Use inorganic insulating materials such as aluminum, hafnium oxide, and hafnium aluminate. The insulating layer 118 may have a stacked structure of two or more layers.

[0110] In this specification, oxynitrides and nitride oxides containing the same elements are described. In this case, the oxynitride has a higher oxygen content than the nitride oxide, and the nitrogen content is The term "nitrogen" includes materials that satisfy either one or both of the following conditions: Oxide oxides have a lower oxygen content and a higher nitrogen content than oxynitrides. The material may satisfy either one or both of the above requirements. For example, silicon oxynitride When silicon oxynitride and silicon nitride are mentioned, silicon oxynitride includes silicon nitride. Also included are materials with a higher oxygen content and a lower nitrogen content than nitride. Silicon oxide contains less oxygen than silicon oxynitride and has a higher nitrogen content. Contains a lot of material.

[0111] The insulating layer 118 may act as a source of the first element for the region 108n. For example, insulating layer 118 can act as a source of hydrogen for region 108n. By supplying the first element to the region 108n, the resistance of the region 108n can be reduced. Since the region 108i has the conductive layer 112 between it and the insulating layer 118, Therefore, the first element is less likely to be supplied, and the resistance of the region 108i can be prevented from decreasing.

[0112] When hydrogen is used as the first element, the insulating layer 118 is formed using a mixed gas containing hydrogen. This allows the insulating layer 118 to be formed in the exposed region 108. Hydrogen can be effectively supplied to the region 108n, and the resistance of the region 108n can be lowered. Examples of gases that contain hydrogen include hydrogen (H2), ammonia (NH3), and silane (SiH4). etc. can be used.

[0113] The transistor 20 has a high resistance in the region 108i and a low resistance in the region 108n. Therefore, a transistor with excellent electrical characteristics can be obtained.

[0114] The semiconductor device 10 includes an insulating layer 11 that covers a semiconductor layer 108, an insulating layer 110, and a conductive layer 112. 8. The insulating layer 118 functions as a protective insulating layer for the transistor 20.

[0115] A conductive layer 120a and a conductive layer 120b are provided over the insulating layer 118. The conductive layers 120a and 120b are formed through openings in the insulating layers 110 and 118, respectively. The conductive layer 120a is electrically connected to the source of the transistor 20. The conductive layer 120b serves as one of the source and drain electrodes. It functions as the other side of the pole.

[0116] The conductive layer 120a and the conductive layer 120b are formed using a material that can be used for the conductive layer 112. The conductive layer 120a and the conductive layer 120b may be made of titanium, tungsten, or tantalum. One or more selected from aluminum, niobium and molybdenum may also be suitably used. In particular, it is preferable to use a tantalum nitride film for the conductive layer 112. The tantalum nitride film has a conductive property. It has high barrier properties against copper, oxygen, and hydrogen, and is also Since hydrogen is released little, the conductive film in contact with the semiconductor layer 108 or the vicinity of the semiconductor layer 108 The conductive film can be suitably used as the conductive film.

[0117] Next, the transistor 30 will be described in detail.

[0118] The semiconductor layer 308 includes a region 308i and a pair of regions 308n. The insulating layer 135 is formed between the conductive layer 306 and the insulating layer 135, and the conductive layer 306 overlaps the insulating layer 135. It works.

[0119] The pair of regions 308n are provided with the region 308i therebetween. It has a lower resistance than 8i and functions as a source region and a drain region.

[0120] The region 308n is a region containing a second element. The second element may be a Group 13 element or The second element may be, for example, boron, aluminum, or a group 15 element. one selected from gallium, indium, phosphorus, arsenic, antimony, or bismuth; When the transistor 30 is an n-channel transistor, In the case of the second element, one or more of phosphorus and arsenic can be preferably used. When the transistor 30 is a p-channel transistor, the second element is boron or One or more of the following materials can be preferably used: In order to control the threshold voltage of 0, the first The element 2 may be added.

[0121] For the analysis of the concentration of the second element in the semiconductor layer 308, please refer to the description of the first element above. Therefore, detailed explanation will be omitted.

[0122] The semiconductor layer 308 preferably contains silicon. The crystallinity of the material is not particularly limited, and may be an amorphous semiconductor, a single crystal semiconductor, or a semiconductor having more than a single crystal. Other crystalline semiconductors (microcrystalline semiconductors, polycrystalline semiconductors, or semiconductors with partially crystalline regions) Either a single crystal semiconductor or a crystalline semiconductor may be used. This is preferable because it can suppress the deterioration of transistor characteristics. Silicon, crystalline silicon (low-temperature polysilicon, single-crystal silicon, etc.) do.

[0123] The insulating layer 135 functions as a gate insulating layer for the transistor 30. The insulating layer 135 preferably comprises an oxide or an oxynitride. The insulating layer 110 can be made of any material that can be used for the insulating layer 110 .

[0124] The conductive layer 306 can be made of any of the materials that can be used for the conductive layer 112 .

[0125] The semiconductor device 10 includes an insulating layer 100 covering the semiconductor layer 308, the insulating layer 135, and the conductive layer 306. 3, insulating layer 110 and insulating layer 118. The layer 18 functions as a protective insulating layer for the transistor 30 .

[0126] The insulating layer 103, which functions as a protective insulating layer for the transistor 30, is formed by sputtering, C It can be formed by using a VD method, a vapor deposition method, a pulsed laser deposition (PLD) method, or the like. The edge layer 103 may be, for example, an oxide insulating film, an oxynitride insulating film, a nitride oxide insulating film, or a nitride The insulating layer 103 can be formed by a single layer or a laminated layer of an insulating material. Silicon oxynitride, silicon nitride, silicon oxynitride, aluminum oxide, aluminum oxynitride one selected from hafnium, aluminum nitride, hafnium oxide, and hafnium aluminate Alternatively, a plurality of inorganic insulating materials can be used.

[0127] In order to improve the interface characteristics with the semiconductor layer 108, at least the semiconductor layer 108 is The region in contact with the insulating layer 108 is preferably formed of an oxide film or an oxynitride film. The layer 103 is provided on the side in contact with the semiconductor layer 108 with an oxide film or an oxynitride film such as a silicon nitride film. When a film other than the above is used, the surface in contact with the semiconductor layer 108 is subjected to oxygen plasma treatment or the like. It is preferable to carry out a pretreatment to oxidize the surface or the vicinity of the surface.

[0128] The insulating layer 103 preferably has a laminated structure. In FIG. 1A, the insulating layer 103 is From the insulating layer 306 side, the insulating layer 103a, the insulating layer 103b, the insulating layer 103c, and the insulating layer 103 The insulating layer 103a is a conductive layer 103b. The insulating layer 103d has a region in contact with the semiconductor layer 108.

[0129] The insulating layer 103a, the insulating layer 103b, the insulating layer 103c, and the insulating layer 103d are, for example, For example, inorganic insulating materials such as oxides, oxynitrides, oxynitrides, or nitrides are preferably used. More specifically, the insulating layer 103a, the insulating layer 103b, the insulating layer 103c, and the insulating layer 103d can be formed. The edge layer 103d may be formed of silicon oxide, silicon oxynitride, silicon nitride, or silicon nitride. Silicon oxide, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide The insulating layer 103 can be made of inorganic insulating materials such as SiO2, hafnium aluminate, etc. a. The insulating layer 103b, the insulating layer 103c, and the insulating layer 103d may be made of different materials. It may even be the same material.

[0130] The insulating layer 103a located on the surface to be formed of the insulating layer 103 is made of an insulating film containing oxygen. The insulating layer 103a is preferably an insulating film containing at least silicon and oxygen, typically Typically, a silicon oxide film or a silicon oxynitride film can be used.

[0131] The insulating layer 103b is made of an insulating film that contains hydrogen and releases hydrogen when heated. It is preferable that the hydrogen released from the insulating layer 103b is transferred to the silicon of the semiconductor layer 308. By terminating the dangling bonds of the The insulating layer 103b can be an insulating film containing nitrogen. 3b is an insulating film containing at least silicon and nitrogen, typically a silicon nitride film; Alternatively, a silicon nitride oxide film can be used.

[0132] The insulating layer 103c is a dense film that can suppress the diffusion of impurities from below. It is preferable that the insulating layer 103c is formed on a member (such as a substrate) on the surface on which the insulating layer 103c is to be formed. It is preferable that the film be capable of blocking impurities including metal elements and hydrogen contained in the silicon dioxide (SiO 2 , etc.). The impurities containing hydrogen include hydrogen and water. It is preferable that the insulating layer 103c is a film that can block impurities contained therein. An insulating layer formed under conditions where the deposition rate is slower than that of the insulating layer 103b can be used.

[0133] The insulating layer 103c can be an insulating film containing nitrogen. For example, silicon nitride film, silicon nitride oxide film, aluminum nitride film, hafnium nitride film, etc. Insulating film containing nitrogen or insulating film containing oxide such as aluminum oxide or hafnium oxide In particular, a film formed by using a plasma CVD apparatus can be used as the insulating layer 103c. It is preferable to use a dense silicon nitride film formed by using such a nitrogen-containing insulating film. By using an insulating film, even if the thickness is thin, impurities can be prevented from diffusing from the surface on which the film is formed. can be suppressed.

[0134] The insulating layer 103c preferably has lower hydrogen permeability than the insulating layer 103b. The insulating layer 103c is preferably an insulating film that is denser than the insulating layer 103b. It is preferable that the insulating layer 103c is an insulating film having a higher film density than the insulating layer 103b. By using an insulating film as the insulating layer 103c, hydrogen contained in the insulating layer 103b is absorbed into the insulating layer 103c. Therefore, the hydrogen contained in the insulating layer 103b can be efficiently released. The semiconductor layer 308 can be supplied with silicon dangling particles. The resulting transistor 30 has good electrical properties.

[0135] The film density was evaluated using X-ray reflectivity (XRR), or transmission electron microscope (TEM) For example, a cross-sectional image of the insulating layer 103b and the insulating layer 103c can be used. When the film density is different, a transmission electron microscope (TEM) image of a cross section of the insulating layer 103 In some cases, these can be distinguished by observing the difference in contrast. When the compositions or film densities are similar, the boundary between them may become unclear.

[0136] By providing the insulating layer 103c, hydrogen contained in the insulating layer 103b is absorbed into the transistor 20. When a metal oxide is used for the semiconductor layer 108, the diffusion of the metal oxide into the semiconductor layer 108 can be suppressed. In this case, hydrogen diffused into the semiconductor layer 108 takes away oxygen from the semiconductor layer 108, Oxygen deficiency (V O ) is generated. In addition, this oxygen vacancy (V O ) with hydrogen (Hereinafter, V O H) can be a carrier supply source. When hydrogen diffuses into the region 108i, the carrier concentration in the region 108i increases, and the transistor The semiconductor device 10 according to one aspect of the present invention uses a large amount of hydrogen. By providing the insulating layer 103c between the insulating layer 103b containing the insulating material and the semiconductor layer 108, The diffusion of hydrogen from the layer 103b to the semiconductor layer 108 can be suppressed, and the resulting semiconductor layer 108 has good electrical properties. The transistor 20 may be a transistor having a gate resistance.

[0137] The insulating layer 103c preferably has a lower hydrogen concentration than the insulating layer 103b. By using an insulating film for the insulating layer 103c, hydrogen released from the insulating layer 103c itself is reduced. The oxygen vacancies (V O ) and V O The increase in H can be suppressed.

[0138] In the semiconductor device 10, at least the semiconductor layer 308 is formed on the insulating layer 103 via the insulating layer 103b. It is preferable that the region overlaps with the region c. By adopting such a structure, good electrical characteristics are obtained. Furthermore, the semiconductor device 10 has the following features: At least the semiconductor layer 108 has a region overlapping with the insulating layer 103b via the insulating layer 103c. It is preferable to do so.

[0139] For example, a silicon nitride film may be used for each of the insulating layer 103b and the insulating layer 103c. When the insulating layer 103b is formed using a plasma CVD apparatus, for example, The gas may be a mixture of silane, nitrogen, and ammonia. By using the plasma, the insulating layer 103b can contain a large amount of hydrogen. When the insulating layer 103c is formed using a CVD apparatus, for example, silane, nitrogen, etc. are used as the film forming gas. The insulating layer 103c can be formed by the same method as that for forming the insulating layer 103a. It is preferable to make the ammonia flow rate lower than that of insulating layer 103b. By reducing the flow rate, the insulating layer 103c can have low hydrogen permeability. The amount of hydrogen contained in the insulating layer 103c is reduced, and the amount of hydrogen released from the insulating layer 103c is reduced. It is possible to reduce the amount of ammonia used in forming the insulating layer 103c. For example, a mixed gas of silane and nitrogen is used as a deposition gas when forming the insulating layer 103c. Good too.

[0140] The transistor 20 is provided on the insulating layer 103, and the insulating layer 103d is in contact with the semiconductor layer 108. The insulating layer 103d in contact with the semiconductor layer 108 is made of an oxide or an oxynitride. In particular, the insulating layer 103d is preferably formed of an insulating film containing an oxide film. Alternatively, it is preferable to use an oxynitride film. It is preferable to use a dense insulating film that is difficult for impurities to be adsorbed. It is preferable to use an insulating film with few defects and reduced impurities such as water and hydrogen.

[0141] The insulating layer 103d preferably has a region containing oxygen in excess of the stoichiometric composition. In other words, the insulating layer 103d is an insulating material that can release oxygen when heated. For example, the insulating layer 103d is formed in an oxygen atmosphere. The insulating layer 103d after deposition is subjected to a heat treatment in an oxygen atmosphere. After the film formation, plasma treatment or the like is performed in an oxygen atmosphere. By forming an oxide film or an oxynitride film under an atmosphere, an oxide film is formed in the insulating layer 103d. In each of the above-described processes in which oxygen is supplied, the following may be used instead of oxygen: Alternatively, in addition to oxygen, an oxidizing gas (such as nitrous oxide or ozone) may be used. Alternatively, an insulating layer capable of releasing oxygen when heat is applied may be provided on the insulating layer 103d. A film is formed, and then heat is applied to supply oxygen from the insulating film into the insulating layer 103d. You may do so.

[0142] A metal oxide film that will become the semiconductor layer 108 is formed by sputtering in an atmosphere containing oxygen. When the insulating layer 103d is formed, oxygen can be supplied into the insulating layer 103d. After forming the metal oxide film, heat treatment is performed to convert oxygen in the insulating layer 103d to the corresponding The oxygen vacancies (V O ) can be reduced.

[0143] The insulating layer 103d is, for example, a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film. film, aluminum oxide film, aluminum oxynitride film, aluminum nitride oxide, hafnium oxide um film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, One or more of magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film In particular, a silicon oxide film can be preferably used as the insulating layer 103d. Alternatively, it is preferable to use a silicon oxynitride film.

[0144] The insulating layer 103d is preferably made of an insulating film that releases as little hydrogen and water as possible. By using such an insulating film, the insulating layer 10 3d to the semiconductor layer 108, and the carrier in the region 108i is prevented from diffusing. The concentration of α can be reduced.

[0145] Furthermore, it is preferable that the insulating layer 103c is made of an insulating film that does not easily diffuse oxygen. As a result, the insulating layer 103d is turned into the semiconductor layer 108 (or the metal oxide film that will become the semiconductor layer 108). When a heat treatment is performed to supply oxygen to the insulating layer 103d, the insulating layer 103b The amount of oxygen supplied to the semiconductor layer 108 decreases due to the diffusion of oxygen to the side. can be suppressed.

[0146] The thickness of the insulating layer 103 is determined based on the relative dielectric constant required for the insulating layer 103 and the thickness of the insulating layer 10 3, the insulating layers 103a to 103d are That is, the dielectric constant and thickness of the insulating layer 103a can be determined based on the dielectric constant and thickness of the insulating layer 103b. The thicknesses of the insulating layers 103a and 103b can be adjusted to each other within a range that satisfies the above requirements. Cut.

[0147] It is preferable to use a dense insulating film for the insulating layer 103c. When using an insulating film with high stress, the substrate may be warped or the film may peel off. Therefore, the insulating layer 103c is not required to be formed on the insulating layer 103b. The thickness of the film is sufficient to block hydrogen diffusion from the side to the semiconductor layer 108. The thickness of the insulating layer 103c is, for example, 10 nm to 200 nm. Preferably, the thickness is 20 nm or more and 150 nm or less, more preferably, 30 nm or more and 150 nm or less. Preferably, the thickness is 30 nm or more and 100 nm or less, more preferably 50 nm or more. The thickness is preferably from 100 nm to 100 nm. The upper and lower limits may be arbitrarily combined. It can be done.

[0148] The four insulating films of the insulating layer 103 are each formed in the atmosphere using a plasma CVD apparatus. For example, the insulating layer 103b is formed by It is preferable to perform the process in the same chamber as that for forming the insulating layer 103a. The processing chamber for forming the insulating layer 103b is connected to the processing chamber for forming the insulating layer 103b via a gate valve or the like. After forming the layer 103a, a process of forming an insulating layer 103b under reduced pressure without exposing to the atmosphere is carried out. Alternatively, the insulating layer 103a and the insulating layer 103b may be formed at the same time. When the processes are performed successively in the same processing chamber in the same apparatus, the formation of the insulating layer 103a and the insulating layer 103b is performed as follows. It is preferable to perform the process at the same temperature. Similarly, it is preferable that the edge layer 103d is also formed continuously without being exposed to the air.

[0149] In FIG. 1A, the insulating layer 103 is made up of insulating layers 103a, 103b, and 103c. and insulating layer 103d. However, one embodiment of the present invention is not limited to this. The insulating layer 103 includes an insulating layer 103b and an insulating layer 103c on the insulating layer 103b. It is preferable that the insulating layer 103a is not provided, and the insulating layer 103a may not be provided. The insulating layer 103b may have a two-layer structure of an insulating layer 103c. When the semiconductor layer 108 is provided on the insulating layer 103, the insulating layer 103d is provided. It is preferable that the insulating layer 103b and the semiconductor layer 108 are in contact with each other. There may be a different layer between layer 103c.

[0150] A conductive layer 312a and a conductive layer 312b are provided over the insulating layer 110. The conductive layer 312a and the conductive layer 312b are formed through openings in the insulating layer 110 and the insulating layer 103, respectively. The conductive layer 312a is electrically connected to the source of the transistor 30. The conductive layer 312b serves as one of the source and drain electrodes. It functions as the other side of the pole.

[0151] The conductive layer 312a and the conductive layer 312b are formed using a material that can be used for the conductive layer 112. Furthermore, the conductive layer 312a, the conductive layer 312b, and the conductive layer 112 may be made of the same material. In addition, the conductive layer 312a, the conductive layer 312b, and the conductive layer 112 are preferably formed using the same It is preferable to form the same conductive film by processing it. This reduces manufacturing costs and increases production yields.

[0152] The insulating layer 118 is provided over the conductive layer 312a and the conductive layer 312b. The insulating layer 103 can be made of any material that can be used for the insulating layer 103.

[0153] A conductive layer 320a and a conductive layer 320b are provided over the insulating layer 118. The conductive layer 31a and the conductive layer 320b are respectively connected to the conductive layer 31a through openings provided in the insulating layer 118. 1A, the conductive layer 320a is electrically connected to the conductive layer 312b. The conductive layer 320b is electrically connected to the region 308n through the conductive layer 312a. 3 shows an example in which the area is electrically connected to the area 308n via b.

[0154] The conductive layer 320a and the conductive layer 320b are made of a material that can be used for the conductive layer 112. Furthermore, the conductive layer 320a, the conductive layer 320b, the conductive layer 120a, and the conductive layer It is preferable that the conductive layers 320a, 320b, and 120b are made of the same material. The conductive layers 120a and 120b are preferably formed by processing the same conductive film. By processing and forming the same conductive film, the manufacturing cost can be reduced and the production yield can be improved. This can increase the quality of the product.

[0155] [Configuration Example 1-2] An example of a configuration different from the semiconductor device 10 described above is shown in FIG. 1B. A includes transistor 20A and transistor 30. In FIG. 20A and a schematic cross-sectional view of a transistor 30 in the channel length direction. A differs from the semiconductor device 10 mainly in that the insulating layer 110 has a different configuration.

[0156] In the semiconductor device 10A, the insulating layer 110 has a top surface shape that is substantially the same as that of the conductive layer 112. The insulating layer 110a is processed as follows. The insulating layer 110a is connected to the conductive layer 312a and the conductive layer 312b. The insulating layer 110a is processed so that the top surface shapes thereof are approximately the same. By using the same material, the insulating layer 110 and the insulating layer Since 110a can be produced through the same process, the manufacturing cost can be reduced and the The insulating layer 110 and the insulating layer 110a are, for example, conductive layers. 112, a resist mask is used to process the conductive layer 312a and the conductive layer 312b. It can be done.

[0157] As shown in FIG. 1B, the insulating layer 118 has a region that contacts the region 108n. By adopting such a configuration, the first element can be supplied from the insulating layer 118 to the region 108n. For example, hydrogen contained in the insulating layer 118 diffuses into the region 108n, The region 108i has a conductive layer 112 between it and the insulating layer 118. Therefore, less hydrogen diffuses into the region 108i than into the region 108n. 8n, i.e., the self-aligned low resistance region 108n can be formed.

[0158] In FIG. 1A, the top surface shapes of the insulating layer 110 and the conductive layer 112 are roughly the same, and the insulating layer 11 10A, the conductive layer 312a, and the conductive layer 312b have substantially the same top surface shape. However, one embodiment of the present invention is not limited to this. Similarly, the end of the insulating layer 110a may be located outside the conductive layer 312a and the conductive layer 312b. The end of the insulating layer 110 may be located outside the end of the semiconductor layer 10b. It is preferable that the position is more inward than the end of 8.

[0159] [Configuration Example 1-3] An example of a configuration different from the semiconductor device 10 described above is shown in FIG. 1C. B includes transistor 20 and transistor 30A. 1 shows a schematic cross-sectional view of the semiconductor device 10 and the transistor 30A in the channel length direction. The semiconductor device B differs from the semiconductor device 10 mainly in that the insulating layer 135 has a different configuration.

[0160] In the transistor 30A, the insulating layer 135 has a top surface shape that is approximately the same as that of the conductive layer 306. The insulating layer 135 is processed so as to form, for example, a resist for processing the conductive layer 306. It can be processed using a mask.

[0161] 1C, the insulating layer 103 has a region that contacts the region 308n. For example, The insulating layer 103 is doped with the second element, and the semiconductor layer 108 in contact with the insulating layer 103 is doped with the second element. The region 308n may be formed by diffusing . In this way, a low resistance region 308n can be formed.

[0162] [Configuration Example 1-4] An example of a configuration different from the semiconductor device 10 described above is shown in FIG. 2A. C includes transistor 20 and transistor 30. In FIG. 10C shows a schematic cross-sectional view of the semiconductor device 10C in the channel length direction of the transistor 30. The main difference from the semiconductor device 10 is that the semiconductor device 10 does not have the conductive layer 312a and the conductive layer 312b. do.

[0163] The conductive layer 320a and the conductive layer 320b are the insulating layer 135, the insulating layer 103, and the insulating layer 104, respectively. 110 and the insulating layer 118 through an opening formed therein. The conductive layer 320a serves as one of the source and drain electrodes of the transistor 30. The conductive layer 320b serves as the other of the source and drain electrodes. Furthermore, by not providing the conductive layer 312b, manufacturing costs can be reduced.

[0164] The openings where the conductive layers 120a and 120b are to be formed, the conductive layers 320a and 320b are to be formed, and the conductive layers 320a and 320b are to be formed. The openings in which 20b are formed may be formed in different processes or in the same process. By forming these openings in the same process, the manufacturing cost can be reduced. do.

[0165] [Configuration Example 1-5] An example of a configuration different from the semiconductor device 10 described above is shown in FIG. 2B. D includes transistor 20B and transistor 30. In FIG. 20B and a schematic cross-sectional view of the semiconductor device 10 in the channel length direction of the transistor 30. D is a point where the conductive layer 151a and the conductive layer 151b are provided, and the conductive layer 312a and the conductive layer 312 The semiconductor device 10 differs mainly from the semiconductor device 10 in that it has conductive layers 351a and 351b instead of conductive layers 351b. It's wrong.

[0166] Transistor 20B has conductive layer 151a and conductive layer 151b on region 108n. The conductive layer 151a and the conductive layer 151b each have a region that contacts the region 108n. The conductive layer 151a serves as one of the source and drain electrodes of the transistor 20B. The conductive layer 151b serves as the other of the source and drain electrodes. and conductive layer 120b are connected to region 1 through conductive layer 151a or conductive layer 151b, respectively. 08n.

[0167] The semiconductor device 10D has a conductive layer 351a and a conductive layer 351b on the insulating layer 103. The conductive layer 351a and the conductive layer 351b are provided on the insulating layer 135 and the insulating layer 103, respectively. The conductive layer 351a is electrically connected to the region 308n through the opening. The conductive layer 351b functions as one of the source and drain electrodes of the semiconductor device 30. The conductive layer 320a and the conductive layer 320b each serve as the other of the drain and gate electrodes. It is electrically connected to the region 308n via the conductive layer 351a or the conductive layer 351b.

[0168] The conductive layer 151a, the conductive layer 151b, the conductive layer 351a, and the conductive layer 351b are conductive layers. The conductive layer 151a may be made of any material that can be used for the conductive layer 112. It is preferable that the conductive layer 151b, the conductive layer 351a, and the conductive layer 351b are made of the same material. In addition, the conductive layer 151a, the conductive layer 151b, the conductive layer 351a, and the conductive layer 351b are the same. It is preferable to form the conductive film by processing the conductive film. This allows for lower manufacturing costs and increased production yields.

[0169] [Configuration Example 1-6] An example of a configuration different from the semiconductor device 10 described above is shown in FIG. 2C. In FIG. 2C, transistors 20C and 30B are shown. 10A and 10B are cross-sectional views of a semiconductor device according to the present invention. 10E has the conductive layer 153 and the insulating layer 137, and the conductive layer 312a and the conductive layer 312b. The semiconductor device 10 differs from the semiconductor device 10 in that it has a conductive layer 315 and an insulating layer 133 instead of the semiconductor device 10b. are.

[0170] The transistor 20C includes a conductive layer 153 and an insulating layer 137. The conductive layer 153 is an insulating layer. The insulating layer 110 and the conductive layer 112 are overlapped with each other through the insulating layer 137. In the transistor 20C, the conductive layer 153 is a first gate electrode (back gate The insulating layer 137 functions as a first gate insulating layer. At this time, the conductive layer 112 serves as a second gate electrode (also called a top gate electrode), and the insulating layer 11 0 functions as the second gate insulating layer.

[0171] For example, the transistor 20C is configured such that the conductive layer 112 and the conductive layer 153 are applied with the same potential. This allows a larger current to flow when the transistor is on. The transistor 20C has a threshold voltage control layer for one of the conductive layers 112 and 153. and the other applies a potential for controlling the on and off states of the transistor 20C. In addition, one of the conductive layers 112 and 153 and the source may be electrically connected to the source. By connecting it to the transistor 20C, the electrical characteristics of the transistor 20C can be stabilized.

[0172] The insulating layer 137 that functions as a first gate insulating layer is formed by It is preferable that the conductive layer 108 functions as a barrier layer that prevents impurities from diffusing into the conductive layer 108 and the like. The impurities include, for example, metal components contained in the conductive layer 153. 137 has high pressure resistance, low film stress, and is less likely to release hydrogen and water. It is preferable that the material satisfies one or more of the following requirements: It is more preferable that all of these requirements are satisfied. The insulating layer 137 can be formed by the same method as the insulating layer 110. Therefore, detailed description will be omitted.

[0173] 2C shows an example in which the end of the conductive layer 153 is approximately aligned with the end of the conductive layer 112. However, one embodiment of the present invention is not limited to this. The end of the conductive layer 153 may be located outside the end of the conductive layer 112. It may be located on the inner side.

[0174] The transistor 30B includes a conductive layer 315 and an insulating layer 133. The conductive layer 315 is an insulating layer. The insulating layer 135 and the conductive layer 306 overlap with each other through the insulating layer 133. In the transistor 20C, the conductive layer 315 is a first gate electrode (back gate The insulating layer 133 functions as a first gate insulating layer. The conductive layer 306 is a second gate electrode (top gate electrode), and the insulating layer 135 is a second gate electrode. It functions as an insulating layer.

[0175] For example, transistor 30B is configured such that conductive layer 306 and conductive layer 315 are applied with the same potential. This allows a larger current to flow when the transistor is on. The transistor 30B has a threshold voltage control layer for one of the conductive layers 306 and 315. and the other applies a potential for controlling the on and off states of the transistor 30B. In addition, one of the conductive layers 306 and 315 and the source may be electrically connected. By connecting it to the ground, the electrical characteristics of the transistor 30B can be stabilized.

[0176] The insulating layer 133 functioning as the first gate insulating layer is formed by a semiconductor layer from the surface on which the insulating layer 133 is to be formed. It is preferable that the layer functions as a barrier layer that prevents impurities from diffusing into the conductor layer 308 and the like. The impurities include, for example, metal components contained in the conductive layer 315. 133 has high pressure resistance, low film stress, and is less likely to release hydrogen and water. It is preferable that the material satisfies one or more of the following requirements: It is more preferable that all of these requirements are satisfied. An insulating film that can do this can be used.

[0177] The conductive layer 315 can be formed using any of the materials that can be used for the conductive layer 112 .

[0178] 2C shows an example in which the end of the conductive layer 315 is approximately aligned with the end of the conductive layer 306. However, one embodiment of the present invention is not limited to this. The end of the conductive layer 315 may be located outside the end of the conductive layer 306. It may be located on the inner side.

[0179] The conductive layer 353a and the conductive layer 353b are provided over the insulating layer 135 and the insulating layer 103, respectively. The conductive layer 353a is electrically connected to the region 308n through the opening. The conductive layer 353b functions as one of the source and drain electrodes of the capacitor 30B. The conductive layer 320a and the conductive layer 320b each serve as the other of the electrode and the drain electrode. and electrically connected to the region 308n via the conductive layer 353a or the conductive layer 353b. .

[0180] The conductive layer 353a, the conductive layer 353b, and the conductive layer 153 are the same as those used for the conductive layer 112. Furthermore, the conductive layer 353a, the conductive layer 353b, and the conductive layer 353c can be formed of a material that can be used. The conductive layer 153 is preferably made of the same material. It is preferable that the conductive layer 3b and the conductive layer 153 are formed by processing the same conductive film. By forming the wiring board by this process, it is possible to reduce the manufacturing cost and increase the production yield. This can be done.

[0181] [Configuration Example 1-7] An example of a configuration different from the semiconductor device 10E described above is shown in FIG. 3A. 0F includes transistor 20C and transistor 30B. 1 shows a schematic cross-sectional view of a semiconductor device in the channel length direction of a transistor 20C and a transistor 30B. The device 10F differs from the semiconductor device 10E mainly in that it does not have the insulating layer 103d.

[0182] The conductive layer 1 functions as the first gate electrode (back gate electrode) of the transistor 20C. The source electrode and the drain electrode of the transistor 30B are connected to the insulating layer 103c. The conductive layer 353a and the conductive layer 353b functioning as drain electrodes are in contact with the insulating layer 103c. The semiconductor device 10F does not have the insulating layer 103d, and therefore the manufacturing This can reduce manufacturing costs.

[0183] In FIG. 3A, the insulating layer 103 is made up of insulating layers 103a, 103b, and 10 3c shows an example of a three-layer structure, but one embodiment of the present invention is not limited to this. 103 preferably has an insulating layer 103b and an insulating layer 103c on the insulating layer 103b. For example, the insulating layer 103 may be formed by the insulating layer 103a. It can have a two-layer structure of the insulating layer 3b and the insulating layer 103c.

[0184] [Configuration Example 1-8] An example of a configuration different from the semiconductor device 10E described above is shown in FIG. 3B. 0G includes transistor 20D and transistor 30B. 1A and 1B are schematic cross-sectional views of the transistor 20D and the transistor 30B in the channel length direction. The device 10G does not have the insulating layer 137, and has the conductive layer 106 instead of the conductive layer 153. This is the main difference from the semiconductor device 10E.

[0185] In the transistor 20D, the conductive layer 106 is connected to the semiconductor layer 108 via the insulating layer 103. , and has a region overlapping with the insulating layer 110 and the conductive layer 112. The conductive layer 106 functions as a first gate electrode (back gate electrode). 3 functions as a first gate insulating layer. At this time, the conductive layer 112 functions as a second gate electrode. (top gate electrode), the insulating layer 110 functions as the second gate insulating layer.

[0186] For example, transistor 20D can be configured by applying the same potential to conductive layer 112 and conductive layer 106. This allows a larger current to flow when the transistor is on. The transistor 20D controls the threshold voltage of one of the conductive layers 112 and 106. and the other applies a potential for controlling the on and off states of the transistor 20D. In addition, one of the conductive layer 112 and the conductive layer 106 and the source may be electrically connected. By connecting it to the transistor 20D, the electrical characteristics of the transistor 20D can be stabilized.

[0187] The insulating layer 103 preferably includes an insulating layer 103d. An insulating layer 103d is provided on the side in contact with the semiconductor layer 108, and a semiconductor layer 108 is provided in contact with the insulating layer 103d. It is preferable that the insulating layer 103d containing oxide or oxynitride is in contact with the semiconductor layer 108. By adopting this structure, oxygen vacancies (V O ) and V O H can be reduced can.

[0188] The conductive layer 106 can be made of a material that can be used for the conductive layer 112. In addition, it is preferable that the conductive layer 106 and the conductive layer 306 are made of the same material. It is preferable that the conductive layer 306 and the conductive layer 306 are formed by processing the same conductive film. By forming the wiring board by this process, it is possible to reduce the manufacturing cost and increase the production yield. This can be done.

[0189] 3B shows an example in which the end of the conductive layer 106 is approximately aligned with the end of the conductive layer 112. However, one embodiment of the present invention is not limited to this. The end of the conductive layer 106 may be located outside the end of the conductive layer 112. It may be located on the inner side.

[0190] [Configuration Example 1-9] An example of a configuration different from the semiconductor device 10G described above is shown in FIG. 4A. OH includes transistor 20D and transistor 30B. 10A and 10B are cross-sectional views of a semiconductor device according to the present invention. The semiconductor device 10H mainly differs from the semiconductor device 10G in that it does not have the conductive layer 312a and the conductive layer 312b. They are different.

[0191] The conductive layer 320a and the conductive layer 320b are the insulating layer 135, the insulating layer 103, and the insulating layer 104, respectively. 110 and the insulating layer 118 through an opening formed therein. The conductive layer 320a serves as one of the source and drain electrodes of the transistor 30B. The conductive layer 320b serves as the other of the source and drain electrodes. By not providing the conductive layer 312a and the conductive layer 312b, the manufacturing cost can be reduced.

[0192] [Configuration Example 1-10] An example of a configuration different from the semiconductor device 10E described above is shown in FIG. 4B. 01 includes transistor 20E and transistor 30B. 1 shows a schematic cross-sectional view of a semiconductor device in the channel length direction of a transistor 20E and a transistor 30B. The device 10I differs from the semiconductor device 10E in that it has a conductive layer 105 instead of the conductive layer 153. is different from.

[0193] In the transistor 20E, the conductive layer 105 is connected to the insulating layer 135 and the insulating layer 103 via the insulating layer 135. The semiconductor layer 108, the insulating layer 110, and the conductive layer 112 overlap with each other. In the transistor 20E, the conductive layer 105 functions as a first gate electrode (back gate electrode). The insulating layer 135 and the insulating layer 103 function as a first gate insulating layer. The conductive layer 112 is a second gate electrode (top gate electrode), and the insulating layer 110 is a second gate electrode. It functions as an insulating layer.

[0194] For example, the transistor 20E can be configured by applying the same potential to the conductive layer 112 and the conductive layer 105. This allows a larger current to flow when the transistor is on. The transistor 20E controls the threshold voltage of one of the conductive layers 112 and 105. and the other applies a potential for controlling the on and off states of the transistor 20E. In addition, one of the conductive layer 112 and the conductive layer 105 and the source may be electrically connected. By connecting it to the transistor 20E, the electrical characteristics of the transistor 20E can be stabilized.

[0195] The conductive layer 105 can be made of a material that can be used for the semiconductor layer 308. Furthermore, the conductive layer 105 preferably contains a second element. It has crystalline silicon and contains boron, aluminum, gallium, indium, phosphorus, arsenic, It is preferable to have one or more selected from antimony and bismuth. The conductive layer 105 preferably has the same second element as the region 308n. and region 308n can be fabricated through the same process, thereby reducing manufacturing costs. At the same time, the production yield can be increased.

[0196] 4B shows an example in which the end of the conductive layer 105 is approximately aligned with the end of the conductive layer 112. However, one embodiment of the present invention is not limited to this. The end of the conductive layer 105 may be located outside the end of the conductive layer 112. It may be located on the inner side.

[0197] [Configuration Example 1-11] An example of a configuration different from the semiconductor device 10E described above is shown in FIG. 5. In FIG. 5, the transistor 2 1A and 1B are schematic cross-sectional views of the semiconductor device 10 and the transistor 30B in the channel length direction. The semiconductor device 10J differs from the semiconductor device 10E mainly in that it has a conductive layer 107 instead of the conductive layer 153. is doing.

[0198] In the transistor 20F, the conductive layer 107 is connected to the insulating layer 133, the insulating layer 135, and the insulating layer 136. The insulating layer 110 and the conductive layer 112 overlap with each other through the insulating layer 110 and the conductive layer 112. In the transistor 20F, the conductive layer 107 is a first gate electrode (a back gate electrode). The insulating layer 133, the insulating layer 135, and the insulating layer 103 function as a first gate insulating layer. At this time, the conductive layer 112 functions as a second gate electrode (top gate electrode). , the insulating layer 110 functions as a second gate insulating layer.

[0199] For example, the transistor 20F is configured such that the conductive layer 112 and the conductive layer 107 are applied with the same potential. This allows a larger current to flow when the transistor is on. The transistor 20F controls the threshold voltage of one of the conductive layers 112 and 107. and the other applies a potential for controlling the on and off states of the transistor 20F. In addition, one of the conductive layer 112 and the conductive layer 107 and the source may be electrically connected. By connecting it to the transistor 20F, the electrical characteristics of the transistor 20F can be stabilized.

[0200] The conductive layer 107 and the conductive layer 315 are made of materials that can be used for the conductive layer 112. Furthermore, the conductive layer 107 and the conductive layer 315 may be made of the same material. It is preferable that the conductive layer 107 and the conductive layer 315 are formed by processing the same conductive film. By forming the same conductive film by processing it, the manufacturing cost can be reduced and This can increase production yields.

[0201] 5 shows an example in which the end of the conductive layer 107 is approximately aligned with the end of the conductive layer 112. However, one embodiment of the present invention is not limited thereto. The end of the conductive layer 107 may be located outside the end of the conductive layer 112. It may be located inside.

[0202] <Configuration example 2> An example of a configuration different from the semiconductor devices 10 to 10J described above will be described.

[0203] [Configuration Example 2-1] A cross-sectional schematic diagram of the semiconductor device 12 is shown in FIG. and transistor 30. In FIG. 6A, transistor 22 and transistor 30 1 shows a schematic cross-sectional view in the channel length direction.

[0204] The transistor 22 includes a semiconductor layer 108, an insulating layer 110, and a conductive layer 112. The insulating layer 110 functions as a gate insulating layer. The conductive layer 112 functions as a gate electrode. The transistor 22 is a so-called bottom transistor, in which a gate electrode is provided under the semiconductor layer 108. The semiconductor layer 108 is preferably made of, for example, a metal oxide. Compared with the above-mentioned transistor 20, which is a top gate type, The transistor 22, which is a gate type, requires fewer manufacturing steps, reducing the manufacturing cost of the semiconductor device 12. It can be lowered.

[0205] Transistor 22 has conductive layer 120a and conductive layer 120b on region 108n. The conductive layer 120a and the conductive layer 120b each have a region that contacts the region 108n. The conductive layer 120a functions as one of the source and drain electrodes of the transistor 22. The electrode layer 120b functions as the other of the source and drain electrodes.

[0206] The transistor 30 includes a semiconductor layer 308, an insulating layer 135, and a conductive layer 306. The edge layer 135 functions as a gate insulating layer. The conductive layer 306 functions as a gate electrode. The transistor 30 is a so-called top-type transistor in which a gate electrode is provided on the semiconductor layer 308. The semiconductor layer 308 is preferably made of silicon, for example. It is possible.

[0207] The semiconductor device 12 includes an insulating layer 118 that covers the transistors 22 and 30. The insulating layer 118 functions as a protective insulating layer for the transistor 22 and the transistor 30. It has.

[0208] [Configuration Example 2-2] An example of a configuration different from the semiconductor device 12 described above is shown in FIG. 6B. A has transistor 22 and transistor 30. In FIG. 2 and a schematic cross-sectional view of a transistor 30 in the channel length direction. The semiconductor device 10 differs from the semiconductor device 12 mainly in that it does not have the insulating layer 103d.

[0209] The conductive layer 112 functioning as the gate electrode of the transistor 22 is in contact with the insulating layer 103c. A conductive layer serving as a source electrode and a drain electrode of the transistor 30. The conductive layer 312a and the conductive layer 312b have a region in contact with the insulating layer 103c. In the case of A, the manufacturing cost can be reduced by adopting a configuration in which the insulating layer 103d is not provided.

[0210] In FIG. 6B, the insulating layer 103 is made up of insulating layers 103a, 103b, and 10 3c shows an example of a three-layer structure, but one embodiment of the present invention is not limited to this. 103 preferably has an insulating layer 103b and an insulating layer 103c on the insulating layer 103b. For example, the insulating layer 103 may be formed by the insulating layer 103a. It can have a two-layer structure of the insulating layer 3b and the insulating layer 103c.

[0211] [Configuration Example 2-3] An example of a configuration different from the semiconductor device 12 described above is shown in FIG. 6C. B has transistor 22 and transistor 30. In FIG. 2 and a schematic cross-sectional view of the transistor 30 in the channel length direction. The main difference from the semiconductor device 12 is that the semiconductor device 12 does not have the conductive layer 312a and the conductive layer 312b. do.

[0212] The conductive layer 320a and the conductive layer 320b are the insulating layer 135, the insulating layer 103, and the insulating layer 104, respectively. The conductive layer 320 is electrically connected to the region 308n through an opening in the layer 110. a serves as one of the source and drain electrodes of the transistor 30, and the conductive layer 320 The conductive layer 312a and the conductive layer 31b function as the other of the source electrode and the drain electrode. By not providing 2b, the manufacturing cost can be reduced.

[0213] [Configuration Example 2-4] An example of a configuration different from the semiconductor device 12B described above is shown in FIG. 7A. 2C includes transistor 22A and transistor 30. In FIG. 1 shows a schematic cross-sectional view of the transistor 22A and the transistor 30 in the channel length direction. 2C has a conductive layer 106 instead of the conductive layer 112 and does not have the insulating layer 110. , which differs mainly from the semiconductor device 12B.

[0214] In the transistor 22A, the conductive layer 106 is connected to the semiconductor layer 108 via the insulating layer 103. In the transistor 22A, the conductive layer 106 has a region overlapping with the gate electrode. The insulating layer 103 functions as a gate insulating layer.

[0215] An insulating layer 103d is provided on the side of the insulating layer 103 that contacts the semiconductor layer 108. It is preferable to provide a semiconductor layer 108 in contact with the insulating layer 1 containing oxide or oxynitride. By configuring the semiconductor layer 108 to be in contact with the oxygen vacancies (V O ) and V O H can be reduced.

[0216] The conductive layer 106 and the conductive layer 306 are made of materials that can be used for the conductive layer 112. Furthermore, the conductive layer 106 and the conductive layer 306 may be made of the same material. It is preferable that the conductive layer 106 and the conductive layer 306 are formed by processing the same conductive film. By forming the same conductive film by processing it, the manufacturing cost can be reduced and This can increase production yields.

[0217] [Configuration Example 2-5] An example of a configuration different from the semiconductor device 12B described above is shown in FIG. 7B. 2D includes transistor 22B and transistor 30. In FIG. 1 shows a schematic cross-sectional view of the transistor 22B and the transistor 30 in the channel length direction. 2D has a conductive layer 105 instead of the conductive layer 112 and does not have the insulating layer 110. , which differs mainly from the semiconductor device 12B.

[0218] In the transistor 22B, the conductive layer 105 is connected to the insulating layer 135 and the insulating layer 103 via the insulating layer 135. In the transistor 22B, the conductive layer 105 has a region overlapping with the semiconductor layer 108. The insulating layer 135 and the insulating layer 103 function as a gate electrode. It works.

[0219] An insulating layer 103d is provided on the side of the insulating layer 103 that contacts the semiconductor layer 108. It is preferable to provide a semiconductor layer 108 in contact with the insulating layer 1 containing oxide or oxynitride. By configuring the semiconductor layer 108 to be in contact with the oxygen vacancies (V O ) and V O H can be reduced.

[0220] [Configuration Example 2-6] An example of a configuration different from the semiconductor device 12C described above is shown in FIG. 8A. 2E includes transistor 22A and transistor 30B. 1 shows a schematic cross-sectional view of a transistor 22A and a transistor 30B in the channel length direction. The device 12E differs from the semiconductor device 12C mainly in that it has a conductive layer 315 and an insulating layer 133. is doing.

[0221] The transistor 30B includes a conductive layer 315 and an insulating layer 133. The conductive layer 315 is an insulating layer. The insulating layer 135 and the conductive layer 306 overlap with each other through the insulating layer 133. In the transistor 30B, the conductive layer 315 is a first gate electrode (back gate The insulating layer 133 functions as a first gate insulating layer. The conductive layer 306 is a second gate electrode (top gate electrode), and the insulating layer 135 is a second gate electrode. It functions as an insulating layer.

[0222] For example, transistor 30B is configured such that conductive layer 306 and conductive layer 315 are applied with the same potential. This allows a larger current to flow when the transistor is on. The transistor 30B has a threshold voltage control layer for one of the conductive layers 306 and 315. and the other applies a potential for controlling the on and off states of the transistor 30B. In addition, one of the conductive layers 306 and 315 and the source may be electrically connected. By connecting it to the ground, the electrical characteristics of the transistor 30B can be stabilized.

[0223] 8A shows an example in which the end of the conductive layer 315 is approximately aligned with the end of the conductive layer 306. However, one embodiment of the present invention is not limited to this. The end of the conductive layer 315 may be located outside the end of the conductive layer 306. It may be located on the inner side.

[0224] [Configuration Example 2-7] An example of a configuration different from the semiconductor device 12E described above is shown in FIG. 8B. 2F includes transistor 22C and transistor 30B. 1 shows a schematic cross-sectional view of a semiconductor device in the channel length direction of a transistor 22C and a transistor 30B. The device 12F differs from the semiconductor device 12E in that it has a conductive layer 107 instead of the conductive layer 106. is different from.

[0225] In the transistor 22C, the conductive layer 107 is connected to the insulating layer 133, the insulating layer 135, and the insulating layer 136. The transistor 22C has a region overlapping with the semiconductor layer 108 with the layer 103 interposed therebetween. The conductive layer 107 functions as a gate electrode. 103 functions as a gate insulating layer.

[0226] The conductive layer 107 and the conductive layer 315 are made of materials that can be used for the conductive layer 112. Furthermore, the conductive layer 107 and the conductive layer 315 may be made of the same material. It is preferable that the conductive layer 107 and the conductive layer 315 are formed by processing the same conductive film. By forming the same conductive film by processing it, the manufacturing cost can be reduced and This can increase production yields.

[0227] <Configuration example 3> The above-mentioned semiconductor devices 10 to 10J, semiconductor devices 12 to 12F, Different configuration examples will be described.

[0228] [Configuration Example 3-1] A cross-sectional schematic diagram of the semiconductor device 14 is shown in FIG. 9A. The semiconductor device 14 includes a transistor 20 and transistor 34. In FIG. 9A, transistor 20 and transistor 34 1 shows a schematic cross-sectional view in the channel length direction.

[0229] The transistor 20 includes a semiconductor layer 108, an insulating layer 110, and a conductive layer 112. The insulating layer 110 functions as a gate insulating layer. The conductive layer 112 functions as a gate electrode. The transistor 20 is a so-called top-type transistor in which a gate electrode is provided on the semiconductor layer 108. The semiconductor layer 108 is preferably made of, for example, a metal oxide. For the transistor 20, see the description of the transistor 20 above. Therefore, detailed explanations will be omitted.

[0230] The transistor 34 includes a semiconductor layer 308, an insulating layer 135, and a conductive layer 306. The edge layer 135 functions as a gate insulating layer. The conductive layer 306 functions as a gate electrode. The transistor 34 is a so-called bottom transistor, in which a gate electrode is provided under the semiconductor layer 308. The semiconductor layer 308 is preferably made of silicon, for example. It is possible.

[0231] Transistor 34 has conductive layers 317a and 317b on region 308n. The conductive layer 317a and the conductive layer 317b each have a region that contacts the region 308n. The conductive layer 317a functions as one of the source and drain electrodes of the transistor 34. The electrode layer 317b serves as the other of the source and drain electrodes.

[0232] The semiconductor device 14 includes a semiconductor layer 308, an insulating layer 135, a conductive layer 306, a conductive layer 317a, and a The insulating layer 103, the insulating layer 110, and the insulating layer 118 cover the conductive layer 317b. 103, insulating layer 110, and insulating layer 118 function as protective insulating layers for transistor 34. It has.

[0233] The insulating layer 103 can be described in detail above, and therefore will not be described in detail here.

[0234] A conductive layer 312a and a conductive layer 312b are provided over the insulating layer 110. The conductive layer 312a and the conductive layer 312b are formed through openings in the insulating layer 110 and the insulating layer 103, respectively. As a result, it is electrically connected to the region 308n.

[0235] The conductive layer 312a and the conductive layer 312b are formed using a material that can be used for the conductive layer 112. Furthermore, the conductive layer 312a, the conductive layer 312b, and the conductive layer 112 can be made of the same material. In addition, the conductive layer 312a, the conductive layer 312b, and the conductive layer 112 are preferably formed using the same It is preferable to form the same conductive film by processing it. This reduces manufacturing costs and increases production yields.

[0236] A conductive layer 320a and a conductive layer 320b are provided over the insulating layer 118. The conductive layer 31a and the conductive layer 320b are respectively connected to the conductive layer 31a through openings provided in the insulating layer 118. 9A, the conductive layer 320a is electrically connected to the conductive layer 312a or the conductive layer 312b. The conductive layer 320b is electrically connected to the region 308n through the conductive layer 312a. 3 shows an example in which the area is electrically connected to the area 308n via b.

[0237] An insulating layer 103d is provided on the side of the insulating layer 103 that contacts the semiconductor layer 108. It is preferable to provide a semiconductor layer 108 in contact with the insulating layer 1 containing oxide or oxynitride. By configuring the semiconductor layer 108 to be in contact with the oxygen vacancies (V O ) and V O H can be reduced.

[0238] [Configuration Example 3-2] An example of a configuration different from the semiconductor device 14 described above is shown in FIG. 9B. 9B, transistor 20 and transistor 34A are shown. 20 and a transistor 34A are shown in cross section in the channel length direction. A is different from the semiconductor device 14 mainly in that it does not have the conductive layer 317a and the conductive layer 317b. are.

[0239] The conductive layer 312a and the conductive layer 312b are provided on the insulating layer 103 and the insulating layer 110, respectively. The conductive layer 312a is electrically connected to the region 308n through the opening. The conductive layer 312b functions as one of the source and drain electrodes of the capacitor 34A. The conductive layer 317a and the conductive layer 317b function as the other of the electrode and the drain electrode. This allows for lower manufacturing costs.

[0240] [Configuration Example 3-3] An example of a configuration different from the semiconductor device 14A described above is shown in FIG. 9C. 4B includes transistor 20 and transistor 34A. 1 shows a schematic cross-sectional view of the semiconductor device 1 in the channel length direction of the transistor 20 and the transistor 34A. 4B differs from the semiconductor device 14A mainly in that it does not have the conductive layer 312a and the conductive layer 312b. It's wrong.

[0241] The conductive layer 320a and the conductive layer 320b are the insulating layer 103, the insulating layer 110, and the insulating layer 111, respectively. The conductive layer 320 is electrically connected to the region 308n through an opening in the layer 118. a serves as one of the source and drain electrodes of the transistor 34A, and the conductive layer 32 The conductive layer 312a and the conductive layer 30b serve as the other of the source and drain electrodes. By not providing 12b, the manufacturing cost can be reduced.

[0242] [Configuration Example 3-4] An example of a configuration different from the semiconductor device 14A described above is shown in FIG. 10A. The transistor 14C includes a transistor 20C and a transistor 34A. 1 shows a schematic cross-sectional view of the transistor 20C and the transistor 34A in the channel length direction. The conductor device 14C has a conductive layer 153 and an insulating layer 137, and a conductive layer 312a and a conductive The semiconductor device 14 has conductive layers 353a and 353b instead of the layer 312b. It differs mainly from A.

[0243] The transistor 20C can be referred to in the above description, and therefore a detailed description thereof will be omitted. .

[0244] The conductive layer 353a and the conductive layer 353b are each formed through an opening in the insulating layer 103. The conductive layer 353a is electrically connected to the source of the transistor 34A. The conductive layer 353b serves as one of the source and drain electrodes. It functions as the other side of the pole.

[0245] The conductive layer 153, the conductive layer 353a, and the conductive layer 353b are the same as those used for the conductive layer 112. Furthermore, the conductive layer 153, the conductive layer 353a, and the conductive layer 353b can be made of a material that can be used. The conductive layer 153 and the conductive layer 353a are preferably made of the same material. The conductive layer 353b is preferably formed by processing the same conductive film. By forming the semiconductor device in this manner, the manufacturing cost can be reduced and the production yield can be increased. can be done.

[0246] [Configuration Example 3-5] An example of a configuration different from the semiconductor device 14C described above is shown in FIG. 10B. The transistor 14D includes a transistor 20C and a transistor 34A. 1 shows a schematic cross-sectional view of the transistor 20C and the transistor 34A in the channel length direction. The semiconductor device 14D differs from the semiconductor device 14C mainly in that it does not have the insulating layer 103d. do.

[0247] The conductive layer 1 functions as the first gate electrode (back gate electrode) of the transistor 20C. The source electrode and the drain electrode of the transistor 34A are connected to the insulating layer 103c. The conductive layer 353a and the conductive layer 353b functioning as drain electrodes are in contact with the insulating layer 103c. The semiconductor device 14D does not have the insulating layer 103d, and therefore the manufacturing process is simplified. This can reduce manufacturing costs.

[0248] In FIG. 10B, the insulating layer 103 is made up of an insulating layer 103a, an insulating layer 103b, and an insulating layer 103b. 03c shows an example of a three-layer structure, but one embodiment of the present invention is not limited to this. The layer 103 preferably has an insulating layer 103b and an insulating layer 103c on the insulating layer 103b. For example, the insulating layer 103 may be formed by the insulating layer 103a. The insulating layer 103b and the insulating layer 103c may have a two-layer structure.

[0249] [Configuration Example 3-6] An example of a configuration different from the semiconductor device 14C described above is shown in FIG. 10C. The transistor 14E includes a transistor 24 and a transistor 34A. 1 shows a schematic cross-sectional view of the transistor 24 and the transistor 34A in the channel length direction. Device 14E does not have insulating layer 137, and has conductive layer 105 instead of conductive layer 153. In this respect, the conductive layers 312a and 312b are used instead of the conductive layers 353a and 353b. The semiconductor device 14C differs from the semiconductor device 14C mainly in that it has the following.

[0250] For details of the transistor 24, please refer to the description of the transistor 20E. A detailed explanation will be omitted.

[0251] The conductive layer 312a and the conductive layer 312b are provided on the insulating layer 103 and the insulating layer 110, respectively. The conductive layer 312a is electrically connected to the region 308n through the opening. The conductive layer 312b functions as one of the source and drain electrodes of the capacitor 34A. The gate electrode functions as the other of the gate and drain electrodes.

[0252] The conductive layer 312a and the conductive layer 312b are formed using a material that can be used for the conductive layer 112. Furthermore, the conductive layer 112, the conductive layer 312a, and the conductive layer 312b can be made of the same material. In addition, the conductive layer 112, the conductive layer 312a, and the conductive layer 312b are preferably formed using the same It is preferable to form the same conductive film by processing it. This reduces manufacturing costs and increases production yields.

[0253] [Configuration Example 3-7] An example of a configuration different from the semiconductor device 14E described above is shown in FIG. 11A. The transistor 14F includes a transistor 24 and a transistor 34A. 1 shows a schematic cross-sectional view of the transistor 24 and the transistor 34A in the channel length direction. Device 14F is different from semiconductor device 14E in that it does not have conductive layer 312a and conductive layer 312b. The main difference is:

[0254] For the transistor 24 and the transistor 34A, please refer to the above description. , detailed explanation will be omitted.

[0255] [Configuration Example 3-8] An example of a configuration different from the semiconductor device 14E described above is shown in FIG. 11B. The transistor 14G includes a transistor 24A and a transistor 34A. 1 shows a schematic cross-sectional view of a transistor 24A and a transistor 34A in the channel length direction. The semiconductor device 14G is different from the semiconductor device 14 in that it has a conductive layer 106 instead of the conductive layer 105. It differs mainly from E.

[0256] For the transistor 24A, the description of the transistor 20D can be referred to. Detailed explanation will be omitted.

[0257] [Configuration Example 3-9] An example of a configuration different from the semiconductor device 14G described above is shown in FIG. 11C. The transistor 14H includes a transistor 24A and a transistor 34A. 1 shows a schematic cross-sectional view of a transistor 24A and a transistor 34A in the channel length direction. The semiconductor device 14H is different from the semiconductor device 14 in that it does not have the conductive layer 312a and the conductive layer 312b. The main difference is with G.

[0258] For the transistors 24A and 34A, please refer to the above description. Therefore, detailed explanation will be omitted.

[0259] <Configuration Example 4> The above-mentioned semiconductor devices 10 to 10J, semiconductor devices 12 to 12F, An example of a configuration different from the semiconductor devices 14 to 14H will be described.

[0260] [Configuration Example 4-1] A cross-sectional schematic diagram of the semiconductor device 16 is shown in FIG. 12A. The semiconductor device 16 includes a transistor 2 2 and transistor 34. In FIG. 12A, transistor 22 and transistor 3 4 shows a cross-sectional schematic view of the channel length direction.

[0261] The transistor 22 includes a semiconductor layer 108, an insulating layer 110, and a conductive layer 112. The insulating layer 110 functions as a gate insulating layer. The conductive layer 112 functions as a gate electrode. The transistor 22 is a so-called bottom transistor, in which a gate electrode is provided under the semiconductor layer 108. The semiconductor layer 108 is preferably made of, for example, a metal oxide. For the transistor 22, see the description of the transistor 22 above. Therefore, detailed explanations will be omitted.

[0262] The transistor 34 includes a semiconductor layer 308, an insulating layer 135, and a conductive layer 306. The edge layer 135 functions as a gate insulating layer. The conductive layer 306 functions as a gate electrode. The transistor 34 is a so-called bottom transistor, in which a gate electrode is provided under the semiconductor layer 308. The semiconductor layer 308 is preferably made of silicon, for example. For the transistor 34, please refer to the above description of the transistor 34. Therefore, detailed explanation will be omitted.

[0263] Semiconductor device 16 includes an insulating layer 118 covering transistor 22 and transistor 34. The insulating layer 118 functions as a protective insulating layer for the transistor 22 and the transistor 34. It has.

[0264] [Configuration Example 4-2] An example of a configuration different from the semiconductor device 16 described above is shown in FIG. 12B. 16A includes transistor 22 and transistor 34. In FIG. 1 shows a schematic cross-sectional view of the semiconductor device 1 in the channel length direction of the transistor 22 and the transistor 34. The semiconductor device 6A differs from the semiconductor device 16 mainly in that it does not have the insulating layer 103d.

[0265] The conductive layer 112 functioning as the gate electrode of the transistor 22 is in contact with the insulating layer 103c. The conductive layer 312a and the conductive layer 312b have a region in contact with the insulating layer 103c. The semiconductor device 16A does not have the insulating layer 103d, which reduces the manufacturing cost. can be lowered.

[0266] In FIG. 12B, the insulating layer 103 is made up of an insulating layer 103a, an insulating layer 103b, and an insulating layer 103b. 03c shows an example of a three-layer structure, but one embodiment of the present invention is not limited to this. The layer 103 preferably has an insulating layer 103b and an insulating layer 103c on the insulating layer 103b. For example, the insulating layer 103 may be formed by the insulating layer 103a. The insulating layer 103b and the insulating layer 103c may have a two-layer structure.

[0267] [Configuration Example 4-3] An example of a configuration different from the semiconductor device 16 described above is shown in FIG. 12C. 16B includes transistor 22 and transistor 34A. 1 shows a schematic cross-sectional view of a transistor 22 and a transistor 34A in the channel length direction. The device 16B differs mainly from the semiconductor device 16 in that it does not have the conductive layer 317a and the conductive layer 317b. They are different.

[0268] The conductive layer 312a and the conductive layer 312b are each formed through an opening in the insulating layer 103. The conductive layer 312a is electrically connected to the source of the transistor 34A. The conductive layer 312b serves as one of the source and drain electrodes. The conductive layer 317a and the conductive layer 317b are not provided, so that the manufacturing cost can be reduced. This can lower the cost.

[0269] [Configuration Example 4-4] An example of a configuration different from the semiconductor device 16B described above is shown in FIG. 13A. The device 16C includes a transistor 22 and a transistor 34A. 1 shows a schematic cross-sectional view of the transistor 22 and the transistor 34A in the channel length direction. Device 16C is similar to semiconductor device 16B in that it does not have conductive layer 312a and conductive layer 312b. The main difference is:

[0270] The conductive layer 320a and the conductive layer 320b are provided on the insulating layer 103 and the insulating layer 110, respectively. The conductive layer 320a is electrically connected to the region 308n through the opening. The conductive layer 320b functions as one of the source and drain electrodes of the capacitor 34A. The conductive layer 312a and the conductive layer 312b function as the other of the electrode and the drain electrode. This allows for lower manufacturing costs.

[0271] [Configuration Example 4-5] An example of a configuration different from the semiconductor device 16 described above is shown in FIG. 13B. 16D includes transistor 26 and transistor 34. In FIG. 1 shows a schematic cross-sectional view of the semiconductor device 1 in the channel length direction of the transistor 26 and the transistor 34. 6D has a conductive layer 109 instead of the conductive layer 112, and a conductive layer 312a and a conductive layer 3 The main difference from the semiconductor device 16 is that it does not have the semiconductor device 12b.

[0272] In the transistor 26, the conductive layer 109 is connected to the semiconductor layer 108 via the insulating layer 103. In the transistor 26, the conductive layer 109 serves as a gate electrode. The insulating layer 103 functions as a gate insulating layer.

[0273] An insulating layer 103d is provided on the side of the insulating layer 103 that contacts the semiconductor layer 108. It is preferable to provide a semiconductor layer 108 in contact with the insulating layer 1 containing oxide or oxynitride. By configuring the semiconductor layer 108 to be in contact with the oxygen vacancies (V O ) and V O H can be reduced.

[0274] The conductive layer 109, the conductive layer 317a, and the conductive layer 317b are used for the conductive layer 112. Furthermore, the conductive layer 109, the conductive layer 317a, and the conductive layer 317b can be made of a material that can be used. The conductive layer 109 and the conductive layer 317a are preferably made of the same material. The conductive layer 317b is preferably formed by processing the same conductive film. By forming the semiconductor device in this manner, the manufacturing cost can be reduced and the production yield can be increased. can be done.

[0275] The conductive layer 320a and the conductive layer 320b are respectively connected to each other through openings provided in the insulating layer 103. The conductive layer 317a is electrically connected to the conductive layer 317b. The conductive layer 317b functions as one of the source and drain electrodes of the transistor 34A. The conductive layer 312a and the conductive layer 312b function as the other of the source electrode and the drain electrode. By not providing it, the manufacturing cost can be reduced.

[0276] [Configuration Example 4-6] An example of a configuration different from the semiconductor device 16 described above is shown in FIG. 13C. The semiconductor device shown in FIG. 16E includes transistor 26A and transistor 34A. 1 shows a schematic cross-sectional view of a semiconductor transistor 26A and a semiconductor transistor 34A in the channel length direction. The body device 16E has conductive layer 105 instead of conductive layer 112, conductive layer 317a, conductive layer 317b, conductive layer 317c, conductive layer 317d, conductive layer 317e, conductive layer 317f ...b, conductive layer 317c, conductive layer 317b, conductive layer 317b, The semiconductor device 16 is different from the semiconductor device 16 in that it does not have the conductive layer 317b, the conductive layer 312a, and the conductive layer 312b. is different from.

[0277] In the transistor 26A, the conductive layer 105 is connected to the semiconductor layer 108 via the insulating layer 103. In the transistor 26A, the conductive layer 105 has a region overlapping with the gate electrode. The insulating layer 103 functions as a gate insulating layer.

[0278] An insulating layer 103d is provided on the side of the insulating layer 103 that contacts the semiconductor layer 108. It is preferable to provide a semiconductor layer 108 in contact with the insulating layer 1 containing oxide or oxynitride. By configuring the semiconductor layer 108 to be in contact with the oxygen vacancies (V O ) and V O H can be reduced.

[0279] The conductive layer 320a and the conductive layer 320b are respectively connected to each other through openings provided in the insulating layer 103. The conductive layer 320a is electrically connected to the source of the transistor 34A. The conductive layer 320b serves as one of the source and drain electrodes. The conductive layer 317a, the conductive layer 317b, the conductive layer 312a, and the conductive layer 312b function as the other of the electrodes. By not providing 312b, the manufacturing cost can be reduced.

[0280] [Configuration Example 4-7] An example of a configuration different from the semiconductor device 16E described above is shown in FIG. 14. 6F includes transistor 26B and transistor 34A. 1 shows a schematic cross-sectional view of the transistor 26B and the transistor 34A in the channel length direction. The device 16F differs from the semiconductor device 16E in that it has a conductive layer 106 instead of the conductive layer 105. is different from.

[0281] In the transistor 26B, the conductive layer 106 is connected to the insulating layer 135 and the insulating layer 103 via the insulating layer 135. In the transistor 26B, the conductive layer 106 The insulating layer 135 and the insulating layer 103 function as a gate electrode. It works.

[0282] An insulating layer 103d is provided on the side of the insulating layer 103 that contacts the semiconductor layer 108. It is preferable to provide a semiconductor layer 108 in contact with the insulating layer 1 containing oxide or oxynitride. By configuring the semiconductor layer 108 to be in contact with the oxygen vacancies (V O ) and V O H can be reduced.

[0283] The conductive layer 106 and the conductive layer 306 are made of materials that can be used for the conductive layer 112. Furthermore, the conductive layer 106 and the conductive layer 306 may be made of the same material. It is preferable that the conductive layer 106 and the conductive layer 306 are formed by processing the same conductive film. By processing and forming the same conductive film, the manufacturing cost can be reduced and , the production yield can be increased.

[0284] (Embodiment 2) In this embodiment mode, a more specific example of a structure and manufacturing method of the semiconductor device shown in the previous embodiment will be described. The method will be explained.

[0285] <Configuration example 5> [Configuration Example 5-1] A cross-sectional schematic diagram of the semiconductor device 600 is shown in FIG. 15A. The semiconductor device 600 is a top gate The transistor 620 is a bottom-gate transistor, and the transistor 630 is a top-gate transistor. In A, a cross-sectional schematic diagram of a transistor 620 and a transistor 630 in the channel length direction is shown. The semiconductor device 600 corresponds to the semiconductor device 10E shown in the first embodiment.

[0286] The transistor 620 includes a semiconductor layer 108, an insulating layer 110, an insulating layer 137, and a conductive layer 112. The conductive layer 153 is connected to the semiconductor substrate 110 via the insulating layer 137. The conductive layer 112 has an area overlapping with the semiconductor layer 108 via the insulating layer 110. 8 and has an overlapping area.

[0287] In the transistor 620, the conductive layer 153 is a first gate electrode (bottom gate electrode). The conductive layer 112 functions as a second gate electrode (top gate electrode). In addition, a part of the insulating layer 137 functions as a first gate insulating layer, and the insulating layer 11 A portion of 0 functions as the second gate insulating layer.

[0288] A portion of the semiconductor layer 108 overlapping with at least one of the conductive layer 112 and the conductive layer 153 , which functions as a channel forming region. The portion of the conductive layer 112 of the conductive film 8 is sometimes called a channel forming region. A channel can also be formed in a portion that does not overlap with the layer 112 but overlaps with the conductive layer 153 .

[0289] The conductive layer 112 is formed through openings (not shown) provided in the insulating layer 110 and the insulating layer 137. The conductive layer 112 may be electrically connected to the conductive layer 153. Layer 153 can be placed at the same potential.

[0290] Note that the conductive layer 153 and the conductive layer 112 may not be electrically connected to each other. A constant potential is applied to one of the pair of gate electrodes, and the other is applied to drive the transistor 620. At this time, the potential applied to one of the gate electrodes It is also possible to control the threshold voltage when driving 620 with the other gate electrode.

[0291] The insulating layer 137 can have a stacked structure. Therefore, detailed explanation will be omitted.

[0292] When a metal film or an alloy film that is difficult to diffuse into the insulating layer 137 is used for the conductive layer 153, Alternatively, the insulating layer 137 may have a single layer structure.

[0293] The semiconductor device according to one embodiment of the present invention includes a transistor 620 and a transistor 630. Planarization treatment is not required in the manufacturing process. The device may not have a planarization film. This reduces manufacturing costs and increases production yields.

[0294] In FIG. 15A, the transistor 620 and the transistor 630 do not have an overlapping region. At least, the conductive layer 306 and the conductive layer 112 do not have an overlapping area. It is preferable that the transistor 620 and the transistor 630 have an overlapping region. The unevenness of the transistor 630 may cause poor coverage during the fabrication of the transistor 620. By configuring the transistor 620 and the transistor 630 so that they do not overlap with each other, This can prevent the coverage from decreasing during manufacturing of the transistor 620.

[0295] The conductive layer 353a, the conductive layer 353b, and the conductive layer 153 are formed by processing the same conductive film. However, in the manufacturing process of the transistor 620 and the transistor 630, By not performing a thermal treatment or providing a planarizing film, the conductive layer 353a and the conductive layer 3 53b and the conductive layer 153 may have different heights. The conductive layers 20b, 320a, and 320b can be formed by processing the same conductive film. However, the conductive layers 120a and 120b and the conductive layers 320a and 320b The length may vary.

[0296] In FIG. 15A, the transistor 620 and the transistor 630 do not have an overlapping region. However, one embodiment of the present invention is not limited to this. The transistor 620 and the transistor 630 may have an overlapping area. By having an overlapping region, the transistor 620 and the transistor 630 occupying the semiconductor device 600 The area of ​​the resistor 630 can be reduced, and the semiconductor device 600 can be made smaller. For example, when the semiconductor device 600 is applied to a display device, the transistors in the pixel The area of ​​the transistor 620 and the transistor 630 can be reduced, resulting in a high-resolution display device. In addition, the area of ​​the driver circuit portion can be reduced, and a display device with a small frame can be obtained. It can be said that:

[0297] Here, the semiconductor layer 108 and oxygen vacancies that may be formed in the semiconductor layer 108 will be described. and explain.

[0298] The oxygen vacancies formed in the channel formation region of the semiconductor layer 108 affect the transistor characteristics. For example, when oxygen vacancies are formed in the semiconductor layer 108, the oxygen Hydrogen bonds to the vacancies and can become a carrier source. When this occurs, the electrical characteristics of the transistor 620 change, typically the threshold voltage shift. Therefore, the oxygen vacancies in the region 108i, which is the channel formation region, are small. Very preferable.

[0299] Therefore, in one embodiment of the present invention, the insulating film in the vicinity of the channel formation region of the semiconductor layer 108 Specifically, the insulating layer 110 located above the channel forming region and the insulating layer 111 located below the channel forming region are The edge layer 137 includes an oxide film or an oxynitride film. By this, oxygen is transferred from the insulating layer 137 and the insulating layer 110 to the channel forming region, and the channel This makes it possible to reduce oxygen vacancies in the channel formation region.

[0300] The semiconductor layer 108 may have a region where the atomic ratio of In to the element M is greater than 1. It is preferable that the higher the In content, the more the field effect mobility of the transistor can be improved. can.

[0301] In the case of metal oxides containing In, Ga, and Zn, the bonding strength between In and oxygen is greater than that between Ga and oxide. Since the bonding strength is weaker than that of the element, when the In content is high, oxygen vacancies occur in the metal oxide film. The same tendency is observed when element M is used instead of Ga. If there are many oxygen vacancies in the oxide film, the electrical characteristics of the transistor may be deteriorated and the reliability may be reduced. Below occurs.

[0302] However, in one embodiment of the present invention, the channel formation region of the semiconductor layer 108 containing a metal oxide A metal oxide material with a high In content is used because it can supply an extremely large amount of oxygen into the region. This makes it possible to achieve extremely high field-effect mobility, stable electrical properties, and high This makes it possible to realize a transistor that combines high reliability with high reliability.

[0303] For example, the atomic ratio of In to element M is 1.5 or more, or 2 or more, or 3 or more, Alternatively, metal oxides having a molecular weight of 3.5 or more, or 4 or more can be suitably used.

[0304] In particular, the atomic ratio of In, M, and Zn in the semiconductor layer 108 is In:M:Zn=4:2. It is preferable that the ratio of the number of In, M, and Zn atoms is 3 or about 3. It is preferable that the composition of the semiconductor layer 1 is In:M:Zn=5:1:6 or in the vicinity thereof. The composition of the semiconductor layer 108 is such that the ratio of the number of atoms of In, element M, and Zn in the semiconductor layer 108 is approximately equal. That is, the atomic ratio of In, element M, and Zn may be In:M:Zn=1: It may contain materials at or near a 1:1 ratio.

[0305] For example, the above-mentioned high field effect mobility transistor is used as a gate driver for generating a gate signal. By using this as a driver, it is possible to provide a display device with a narrow frame width (also called a narrow frame). The above-mentioned high field effect mobility transistor is used as a source driver (especially when the source driver is By using it in a display A display device with a small number of wires connected to the device can be provided.

[0306] The semiconductor layer 108 has a region where the atomic ratio of In to the element M is greater than 1. However, if the semiconductor layer 108 has high crystallinity, the field-effect mobility may be reduced. The crystallinity of the conductor layer 108 can be determined by, for example, X-ray diffraction (XRD). on) or by analyzing using a transmission electron microscope (TEM) It can be analyzed with.

[0307] Here, the channel forming region of the semiconductor layer 108 has a low impurity concentration and a low defect level density. By reducing the oxygen vacancies, the carrier concentration in the film can be reduced. A transistor using such a metal oxide film in the channel formation region of the semiconductor layer has a threshold The electrical characteristics where the voltage is negative (also called normally on) are rare. In addition, a transistor using such a metal oxide film has the characteristic of having a significantly small off-state current. It is possible.

[0308] When a metal oxide film with high crystallinity is used for the semiconductor layer 108, the semiconductor layer 108 is easily processed. Damage to the insulating layer 110 during film formation can be suppressed, and a highly reliable transistor can be realized. On the other hand, by using a metal oxide film with a relatively low crystallinity for the semiconductor layer 108, This improves the electrical conductivity and allows for the realization of a transistor with high field-effect mobility.

[0309] The semiconductor layer 108 is formed by CAAC (c-axis aligned crystal) which will be described later. l) Metal oxide film having a nanocrystalline structure, metal oxide film having a nanocrystalline structure It is preferable to use a metal oxide film having a mixed structure of a CAAC structure and an nc structure. stomach.

[0310] The semiconductor layer 108 may have a stacked structure of two or more layers.

[0311] For example, the semiconductor layer 108 may be formed by stacking two or more metal oxide films having different compositions. For example, when an In-M-Zn oxide is used, the atoms of In, element M, and Zn are The ratio of the number is In:M:Zn=5:1:6, In:M:Zn=4:2:3, In:M:Zn =1:1:1, In:M:Zn=2:2:1, In:M:Zn=1:3:4, In:M: Zn=1:3:2 or a sputtering target with a ratio of 1:3:2 or a ratio of 2:3 ... It is preferable to use two or more of them in a laminated form.

[0312] The semiconductor layer 108 may be formed by stacking two or more metal oxide films with different crystallinity. In this case, the same oxide target is used, but the deposition conditions are changed to prevent exposure to air. It is preferable that the layers are formed continuously without any gaps.

[0313] At this time, the semiconductor layer 108 is made of a metal oxide film having an nc structure and a metal oxide film having a CAAC structure. Alternatively, a metal oxide film having an nc structure may be formed. The metal oxide film may have a laminated structure of a metal oxide film having an nc structure. The functions of metal oxides suitable for use in the film and the structure of the material are described in the CAC (Cloud-Aligned Composite) can be cited.

[0314] For example, the oxygen flow rate during the deposition of the first metal oxide film is set to be equal to the oxygen flow rate during the deposition of the second metal oxide film. The oxygen flow rate ratio during the formation of the first metal oxide film is set to be larger than that during the formation of the second metal oxide film. By increasing the oxygen flow rate, oxygen can be effectively supplied to the insulating layer 103d. The oxygen supplied to 103d diffuses into the semiconductor layer 108 by the heat application process, and the semiconductor layer Oxygen vacancies in 108 (V O ) can be reduced. If excessive oxygen exists at the interface between the insulating layer 110 and the semiconductor layer 108, reliability will be deteriorated. By reducing the oxygen flow rate during the deposition of the second metal oxide film, Excess oxygen is generated at the interface between the insulating layer 110, which functions as a protective insulating layer, and the semiconductor layer 108. This can prevent this from happening and improve reliability.

[0315] More specifically, the oxygen flow rate ratio during the formation of the first metal oxide film is set to 5% or more and 100% or less. , preferably 10% or more and 80% or less, more preferably 15% or more and 70% or less, and even more preferably More preferably, the ratio is 20% or more and 70% or less, more preferably 25% or more and 60% or less, and even more preferably 30% or more. % or more and 60% or less, more preferably 30% or more and 50% or less, and typically 40%. The oxygen flow rate ratio during the formation of the second metal oxide film is set to be higher than the oxygen flow rate ratio during the formation of the first metal oxide film. and is 5% or more and 70% or less, preferably 5% or more and 60% or less, and more preferably 5% or more and 60% or less. % or more and 50% or less, more preferably 5% or more and 40% or less, and even more preferably 10% or more 40% or less, more preferably 15% to 40%, and even more preferably 20% to 40%. % or less, typically 30%. Alternatively, the film-forming gas used in forming the first metal oxide film may be The first metal oxide film and the second metal oxide film may be formed under conditions that do not use oxygen. The conditions of pressure, temperature, power, etc. during film formation may be varied, but the conditions other than the oxygen flow rate ratio are the same. This is preferable because it reduces the time required for the film formation process.

[0316] By adopting such a structure, the transistor 620 has excellent electrical characteristics and high reliability. This can be achieved.

[0317] As shown in FIG. 15A, the transistor 620 includes a conductive layer 120a and a conductive layer 120b on an insulating layer 118. The conductive layer 120a may be a source or drain electrode. The conductive layer 120b serves as the other of the source and drain electrodes. The conductive layer 120a and the conductive layer 120b are formed through the opening 118 provided in the insulating layer 118. It is electrically connected to the region 108n through 41a or opening 141b.

[0318] The transistor 630 is provided over the substrate 102 and includes a semiconductor layer 308, an insulating layer 135, an insulating layer 136, an insulating layer 138, an insulating layer 139, an insulating layer 139a, an insulating layer 139b, an insulating layer 139c, an insulating layer 139d, an insulating layer 139e, an insulating layer 139f, an insulating layer 139g, an insulating layer 139 The insulating layer 133 is connected to the conductive layer 315, and the conductive layer 306. The conductive layer 306 has a region overlapping with the semiconductor layer 308 with the insulating layer 135 interposed therebetween. It has an area that overlaps with the conductor layer 308 .

[0319] In the transistor 630, the conductive layer 315 is the first gate electrode (bottom gate electrode). The conductive layer 306 functions as a second gate electrode (top gate electrode). In addition, a part of the insulating layer 133 functions as a first gate insulating layer, and the insulating layer 13 A part of 5 functions as the second gate insulating layer.

[0320] A portion of the semiconductor layer 308 overlapping with at least one of the conductive layer 306 and the conductive layer 315 , which functions as a channel forming region. For ease of explanation, the semiconductor layer 30 The portion of the conductive layer 306 of the insulating film 8 is sometimes called a channel forming region. A channel can also be formed in a portion that does not overlap with the layer 306 but overlaps with the conductive layer 315 .

[0321] The conductive layer 306 is formed through openings (not shown) provided in the insulating layer 135 and the insulating layer 133. The conductive layer 306 may be electrically connected to the conductive layer 315. Layer 315 can be placed at the same potential.

[0322] Note that the conductive layer 306 and the conductive layer 315 may not be electrically connected to each other. A constant potential is applied to one of the pair of gate electrodes, and the other is applied to drive the transistor 630. At this time, the potential applied to one of the gate electrodes It is also possible to control the threshold voltage when driving 630 with the other gate electrode.

[0323] As shown in FIG. 15A, the transistor 630 includes a conductive layer 353a and a conductive layer 353b on the insulating layer 103. The conductive layer 353a serves as one of a source electrode and a drain electrode. The conductive layer 353b functions as the other of the source and drain electrodes. The conductive layer 353a and the conductive layer 353b are openings provided in the insulating layer 103 and the insulating layer 135, respectively. Electrical connection is made to region 308n via mouth 343a or opening 343b.

[0324] The transistor 630 includes the conductive layer 320a and the conductive layer 320b on the insulating layer 118. The conductive layer 320a and the conductive layer 320b are respectively the insulating layer 118, the insulating layer 110, and the insulating layer 116. The conductive layer 353a or the conductive layer 353b is formed through the opening 341a or the opening 341b in the layer 137. Alternatively, it is electrically connected to the conductive layer 353b.

[0325] Below, we will explain a configuration example of a transistor that has a partially different configuration from the above-mentioned configuration example 5-1. In the following, explanations of parts that overlap with the above-mentioned configuration example 5-1 may be omitted. In the drawings shown below, parts having the same functions as the above-mentioned configuration example are indicated as follows. In some cases, the hatching pattern is the same and no reference numeral is given.

[0326] [Configuration Example 5-2] An example of a configuration different from the semiconductor device 600 described above is shown in FIG. 15B. The device 600A includes a transistor 620A and a transistor 630A. 1 shows a schematic cross-sectional view of a transistor 620A and a transistor 630A in the channel length direction. The semiconductor device 600A includes a conductive layer 153, a conductive layer 353a, and a conductive layer 353b stacked together. The main difference from the semiconductor device 600 is that it has a layer structure.

[0327] An enlarged view of the area P surrounded by the dashed line in FIG. 15B is shown in FIG. 16A. An enlarged view of the area Q enclosed by the dashed line is shown in FIG. 16B.

[0328] The conductive layer 353a and the conductive layer 353b are the conductive layer 353A and the conductive layer 353B, respectively. The conductive layer 153 has a laminated structure of the conductive layer 153A and the conductive layer 353B. It has a laminated structure with a conductive layer 153B on top of 53A.

[0329] The conductive layer 153A and the conductive layer 353A are made of a material that can be used for the conductive layer 112. In the openings 343a and 343b, the insulating layer 103b is in contact with the insulating layer 103b. The conductive layer 353A having the region is preferably made of a material that has low permeability to hydrogen in particular. By using a material with low hydrogen permeability for the conductive layer 353A, the water contained in the insulating layer 103b The diffusion of the element into the semiconductor layer 108 through the openings 343a and 343b is suppressed. It can be controlled.

[0330] The conductive layer 153B and the conductive layer 353B are made of a material that can be used for the conductive layer 112. It is possible.

[0331] It is preferable that the conductive layer 153A and the conductive layer 353A are made of the same material. The layer 153A and the conductive layer 353A are preferably formed by processing the same conductive film. It is preferable that the conductive layer 153B and the conductive layer 353B are made of the same material. B and the conductive layer 353B are preferably formed by processing the same conductive film. By forming the wiring board by this process, it is possible to reduce the manufacturing cost and increase the production yield. This can be done.

[0332] [Configuration Example 5-3] An example of a configuration different from the semiconductor device 600 described above is shown in FIG. 17A. The device 600B includes a transistor 620B and a transistor 630B. 1 shows a schematic cross-sectional view of a transistor 620B and a transistor 630B in the channel length direction. The semiconductor device 600B has a conductive layer 106 instead of the conductive layer 153. The semiconductor device 600 differs mainly from the semiconductor device 600 in that it does not have the layer 353a and the conductive layer 353b. The semiconductor device 600B corresponds to the semiconductor device 10H shown in the first embodiment.

[0333] The transistor 620B includes a semiconductor layer 108, an insulating layer 110, an insulating layer 103, and a conductive layer 11. 2, a conductive layer 106, an insulating layer 118, etc. The conductive layer 106 is connected to a semiconductor via an insulating layer 103. The conductive layer 112 has an area overlapping with the conductor layer 108. The conductive layer 112 is connected to the semiconductor layer 1 through the insulating layer 110. It has an overlapping area with 08.

[0334] In transistor 620B, conductive layer 106 is the first gate electrode (bottom gate electrode ) and the conductive layer 112 functions as a second gate electrode (top gate electrode). A part of the insulating layer 103 functions as a first gate insulating layer, and the insulating layer 1 A part of 10 functions as a second gate insulating layer.

[0335] The portion of the semiconductor layer 108 that overlaps with at least one of the conductive layer 112 and the conductive layer 106 , which functions as a channel forming region. The portion of the conductive layer 112 of the conductive film 8 is sometimes called a channel forming region. A channel can also be formed in a portion that does not overlap with the layer 112 but overlaps with the conductive layer 106 .

[0336] The conductive layer 112 is formed through the openings ( The conductive layer 106 may be electrically connected to the conductive layer 106 via a conductive layer (not shown). Layer 112 and conductive layer 106 can be provided with the same electrical potential.

[0337] The conductive layer 106 and the conductive layer 112 may not be electrically connected to each other. A constant potential is applied to one of the pair of gate electrodes, and a potential to drive the transistor 620B is applied to the other. At this time, the potential applied to one of the gate electrodes It is also possible to control the threshold voltage when driving the transistor 620B with the other gate electrode.

[0338] In transistor 630B, conductive layer 315 is the first gate electrode (bottom gate electrode ) and the conductive layer 306 functions as a second gate electrode (top gate electrode). A part of the insulating layer 133 functions as a first gate insulating layer, and the insulating layer 1 A part of 35 functions as a second gate insulating layer.

[0339] A portion of the semiconductor layer 308 overlapping with at least one of the conductive layer 306 and the conductive layer 315 , which functions as a channel forming region. For ease of explanation, the semiconductor layer 30 The portion of the conductive layer 306 of the insulating film 8 is sometimes called a channel forming region. A channel can also be formed in a portion that does not overlap with the layer 306 but overlaps with the conductive layer 315 .

[0340] The conductive layer 306 is formed through openings (not shown) provided in the insulating layer 135 and the insulating layer 133. The conductive layer 306 may be electrically connected to the conductive layer 315. Layer 315 can be placed at the same potential.

[0341] Note that the conductive layer 306 and the conductive layer 315 may not be electrically connected to each other. A constant potential is applied to one of the pair of gate electrodes, and a potential is applied to the other to drive the transistor 630B. At this time, the potential applied to one of the gate electrodes It is also possible to control the threshold voltage when driving the transistor 630B with the other gate electrode.

[0342] As shown in FIG. 17A, transistor 630B includes conductive layers 320a and 320b on insulating layer 118. The conductive layer 320a serves as either a source electrode or a drain electrode. The conductive layer 320b functions as the other of the source and drain electrodes. The layer 320a and the conductive layer 320b are the insulating layer 118, the insulating layer 110, and the insulating layer 103, respectively. and through the opening 341a or the opening 341b provided in the insulating layer 135, the region 30 8n.

[0343] The semiconductor device according to one embodiment of the present invention includes a transistor 620B and a transistor 630. The conductive layer 106 and the conductive layer 306 are not necessarily subjected to a planarization treatment in the manufacturing process of B. The conductive layer 106 and the conductive layer 306 can be formed by processing the same conductive film. may be different.

[0344] Similarly, the conductive layer 120a, the conductive layer 120b, the conductive layer 320a, and the conductive layer 320b are the same. The conductive layer 120a and the conductive layer 120b can be formed by processing the same conductive film. The heights of the conductive layers 320a and 320b may be different.

[0345] [Configuration Example 5-4] An example of a configuration different from the semiconductor device 600B described above is shown in FIG. 17B. Device 600C includes transistor 620C and transistor 630C. 6 shows a schematic cross-sectional view of a transistor 620C and a transistor 630C in the channel length direction. The semiconductor device 600C includes the conductive layer 120a, the conductive layer 120b, the conductive layer 320a, and the conductive layer 320b. The semiconductor device 600B differs mainly in that the conductive layer 320b and the conductive layer 320c have a laminated structure.

[0346] An enlarged view of the region R surrounded by the dashed line in FIG. 17B is shown in FIG. 18A. An enlarged view of the area S enclosed by the dashed line is shown in FIG. 18B.

[0347] The conductive layer 320a and the conductive layer 320b are the conductive layer 320A and the conductive layer 320B, respectively. The conductive layer 120a and the conductive layer 120b have a laminated structure with each other. The conductive layer 120 has a laminated structure of a conductive layer 120A and a conductive layer 120B on the conductive layer 120A.

[0348] The conductive layer 120A and the conductive layer 320A are made of a material that can be used for the conductive layer 112. In the openings 341a and 341b, the insulating layer 103b is in contact with the insulating layer 103b. The conductive layer 320A having the region is preferably made of a material that has low permeability, particularly to hydrogen. The conductive layer 320A may be made of, for example, tantalum, tantalum nitride, titanium, titanium nitride, or ruthenium. One or more selected from the group consisting of ruthenium oxide, molybdenum oxide, and ruthenium carbide can be suitably used. The conductive layer 320A is made of an alloy containing the above-mentioned metal elements or a material containing the above-mentioned metal elements. A material with low hydrogen permeability may be used for the conductive layer 320A. As a result, hydrogen contained in the insulating layer 103b is absorbed through the openings 341a and 341b. Therefore, diffusion into the semiconductor layer 108 can be suppressed.

[0349] The conductive layer 120B and the conductive layer 320B are made of a material that can be used for the conductive layer 112. It is possible.

[0350] The conductive layer 120A and the conductive layer 320A are preferably made of the same material. It is preferable that the conductive layers 120A and 320B are made of the same material. It is preferable that the conductive layers 120B and 320A are formed by processing the same conductive film. The conductive layer 320B is preferably formed by processing the same conductive film. Forming the conductive layer 120a, the conductive layer 120b, the conductive layer 320a, and the conductive layer 320b This reduces the manufacturing cost and increases the production yield.

[0351] [Configuration Example 5-5] A cross-sectional schematic diagram of the semiconductor device 602 is shown in FIG. 19A. The semiconductor device 602 has a bottom gate. 19. The transistor 622 is a bottom-gate transistor, and the transistor 632 is a top-gate transistor. A schematic cross-sectional view of the transistor 622 and the transistor 632 in the channel length direction is shown. The semiconductor device 602 corresponds to the semiconductor device 12E shown in the first embodiment.

[0352] The semiconductor layer 108 can have a stacked structure of two or more layers. The oxygen flow rate ratio during the formation of the first metal oxide film is set to be the same as that during the formation of the second metal oxide film to be formed later. Alternatively, oxygen is not supplied during the formation of the first metal oxide film. This allows oxygen to be effectively supplied during the formation of the second metal oxide film. In addition, the first metal oxide film has lower crystallinity than the second metal oxide film and has high electrical conductivity. On the other hand, the second metal oxide film provided on the upper side can be made to be a thin film. By using a film having higher crystallinity than a silicon film, the conductive layer 120a and the conductive layer 120b can be formed more easily. Can limit damage.

[0353] More specifically, the oxygen flow rate ratio during the formation of the first metal oxide film is set to 0% or more and less than 70%. Preferably, the ratio is 5% or more and 60% or less, more preferably, 5% or more and 50% or less, and more preferably, 5% or more and 50% or less. % or more and 40% or less, more preferably 5% or more and 30% or less, more preferably 5% or more and 20% or less The second metal oxide is preferably 5% or more and 15% or less, and typically 10%. The oxygen flow rate ratio during the formation of the first metal oxide film is higher than the oxygen flow rate ratio during the formation of the second metal oxide film, and 0% or more and 100% or less, preferably 60% or more and 100% or less, more preferably 80% or more It is 100% or less, more preferably 90% to 100%, and typically 100%. In addition, the conditions of pressure, temperature, power, etc. during film formation for the first metal oxide film and the second metal oxide film are different. However, by keeping the conditions other than the oxygen flow rate ratio the film deposition process can be performed. This is preferable because it can shorten the time.

[0354] By adopting such a structure, the transistor 622 has excellent electrical characteristics and high reliability. This can be achieved.

[0355] [Configuration Example 5-6] An example of a configuration different from the semiconductor device 602 described above is shown in FIG. 19B. The device 602A includes a transistor 622A and a transistor 632A. 1 shows a schematic cross-sectional view of a transistor 622A and a transistor 632A in the channel length direction. The semiconductor device 602A includes the conductive layer 120a, the conductive layer 120b, the conductive layer 320a, and the conductive layer 320b. The main difference from the semiconductor device 602 is that the conductive layer 320b has a laminated structure.

[0356] An enlarged view of the area T surrounded by the dashed line in FIG. 19B is shown in FIG. 20A. An enlarged view of the area U enclosed by the dashed line is shown in FIG. 20B.

[0357] The conductive layer 320a and the conductive layer 320b are the conductive layer 320A and the conductive layer 320B, respectively. The conductive layer 120a and the conductive layer 120b have a laminated structure with each other. The conductive layer 120 has a laminated structure of a conductive layer 120A and a conductive layer 120B on the conductive layer 120A.

[0358] The conductive layer 120A and the conductive layer 320A are made of a material that can be used for the conductive layer 112. In the openings 341a and 341b, the insulating layer 103b is in contact with the insulating layer 103b. The conductive layer 320A having the region is preferably made of a material that has low permeability, particularly to hydrogen. By using a material with low hydrogen permeability for the conductive layer 320A, the hydrogen contained in the insulating layer 103b The diffusion of the element into the semiconductor layer 108 through the openings 341a and 341b is suppressed. It can be controlled.

[0359] The conductive layer 120B and the conductive layer 320B are made of a material that can be used for the conductive layer 112. It is possible.

[0360] The conductive layer 120A and the conductive layer 320A are preferably made of the same material. It is preferable that the conductive layers 120A and 320B are made of the same material. It is preferable that the conductive layers 120B and 320A are formed by processing the same conductive film. The conductive layer 320B is preferably formed by processing the same conductive film. Forming the conductive layer 120a, the conductive layer 120b, the conductive layer 320a, and the conductive layer 320b This reduces the manufacturing cost and increases the production yield.

[0361] [Configuration Example 5-7] A cross-sectional schematic diagram of the semiconductor device 604 is shown in FIG. 21A. The semiconductor device 604 is a top gate 21 has a top-gate transistor 624 and a bottom-gate transistor 634. In A, a cross-sectional schematic diagram of the transistor 624 and the transistor 634 in the channel length direction is shown. The semiconductor device 604 corresponds to the semiconductor device 14F shown in the first embodiment.

[0362] [Configuration Example 5-8] An example of a configuration different from the semiconductor device 604 described above is shown in FIG. 21B. The device 604A includes a transistor 624A and a transistor 634A. 1 shows a schematic cross-sectional view of a transistor 624A and a transistor 634A in the channel length direction. The semiconductor device 604A is different from the semiconductor device 604A in that it has a conductive layer 106 instead of the conductive layer 105. The semiconductor device 604A is different from the semiconductor device 604 in the first embodiment. This corresponds to the semiconductor device 14H.

[0363] <Example of manufacturing method> A manufacturing method of a semiconductor device according to one embodiment of the present invention will be described below with reference to the drawings. Here, the semiconductor device 600 illustrated in the above-mentioned configuration example will be taken as an example for explanation. As an example, crystalline silicon is used for the conductor layer 308 and metal oxide is used for the semiconductor layer 108. explain.

[0364] The thin films (insulating films, semiconductor films, conductive films, etc.) that constitute the semiconductor device are formed by sputtering. method, chemical vapor deposition (CVD) method, vacuum evaporation method, pulsed laser deposition (PLD) method, atomic layer The CVD method can be used to form the film using plasma enhanced chemical vapor deposition (PECVD). D) method and thermal CVD method. One of the thermal CVD methods is metal organic chemical vapor deposition. (MOCVD: Metal Organic CVD) method.

[0365] Thin films (insulating films, semiconductor films, conductive films, etc.) that make up semiconductor devices are formed by spin coating, dip coating, etc. Spray coating, inkjet, dispensing, screen printing, offset printing, For doctor knives, slit coats, roll coats, curtain coats, knife coats, etc. It can be formed by law.

[0366] When processing the thin films that make up semiconductor devices, photolithography and other methods can be used. In addition, thin films can be produced by nanoimprinting, sandblasting, lift-off, etc. Alternatively, the film may be processed by a film forming method using a shielding mask such as a metal mask. Alternatively, a thin film having a shape similar to that of the silicon dioxide may be formed directly.

[0367] There are two typical photolithography methods: A resist mask is formed on the film, and the thin film is processed by etching or the like. The other method is to remove the photosensitive film by exposing and developing it after forming the photosensitive thin film. and processing the thin film into a desired shape.

[0368] In photolithography, the light used for exposure is, for example, i-line (wavelength 365 nm), It uses g-ray (wavelength 436 nm), h-ray (wavelength 405 nm), or a mixture of these. In addition, ultraviolet light, KrF laser light, ArF laser light, etc. can be used. The exposure may also be performed by immersion exposure. Using extreme ultraviolet (EUV) light and X-rays, Also, instead of light used for exposure, an electron beam can be used. The use of light, X-rays or electron beams is preferred because it allows for extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, the photomask It is unnecessary.

[0369] There are three methods for etching thin films: dry etching, wet etching, and sandblasting. Methods such as these can be used.

[0370] [Formation of Conductive Layer 315, Insulating Layer 133, and Semiconductor Layer 308] A conductive film is formed on the substrate 102 and processed by etching to form a transistor 63. A conductive layer 315 is formed to function as a first gate electrode of the gate insulating film 310. It is preferable to process the end of the insulating film so that it has a tapered shape. The step coverage of the edge layer 133 can be improved. It is preferable to form the film by a sputtering method using a sputtering target.

[0371] Subsequently, the insulating layer 133 is formed to cover the substrate 102 and the conductive layer 315. can be formed by using a PECVD method, an ALD method, a sputtering method, or the like.

[0372] Next, an amorphous film 308a that will become the semiconductor layer 308 is formed to cover the insulating layer 133 ( As the amorphous film 308a, for example, amorphous silicon can be used. The amorphous film 308a is formed by a PECVD method, an LPCVD (Low Pressure CVD) method, or the like. The film can be formed by a deposition method, a sputtering method, or the like.

[0373] Subsequently, the amorphous film 308a is crystallized to form a semiconductor film 308p (FIG. 22B). As a crystallization method, for example, a solid phase growth method, laser crystallization, etc. can be used. The growth methods are thermal crystallization using an electric furnace, lamp annealing crystallization using infrared light, and catalytic A crystallization method using a metal can be used. For example, after the amorphous film 308a is crystallized by using a solid phase growth method, the amorphous film 308a is crystallized by further irradiating it with laser light. By irradiating the semiconductor film 308p with the ion beam, it is possible to form a semiconductor film 308p having few defects and high crystallinity. As the laser light, for example, an excimer laser light using XeCl, a YAG laser The second harmonic or the third harmonic may be used.

[0374] Here, the amorphous film 308a is crystallized to form a crystalline semiconductor film 308p. However, one embodiment of the present invention is not limited to this. Alternatively, the amorphous film 308a may be formed without crystallizing it. The amorphous semiconductor film may be used in the subsequent process. The number of manufacturing steps can be reduced, and manufacturing costs can be reduced.

[0375] Subsequently, an impurity element that imparts p-type conductivity or n-type conductivity is added to the semiconductor film 308p. Channel doping is performed by adding impurity elements at low concentration. This may be performed on the entire semiconductor film 308p, or may be performed selectively on a portion of the semiconductor film 308p. The impurity element that imparts p-type conductivity is one or more selected from boron, aluminum, and gallium. The impurity element that gives the n-type conductivity is one or more of phosphorus and arsenic. For example, if boron is used as an impurity element and the boron is 1× 10 16 atoms / cm 3 5x10 or more 17 atoms / cm 3 Included in the following concentrations: Add as follows.

[0376] Subsequently, the semiconductor film 308p is processed to form island-shaped semiconductor layers 308 (FIG. 22C).

[0377] [Formation of insulating layer 135 and conductive layer 306] An insulating layer 135 is formed to cover the insulating layer 133 and the semiconductor layer 108. The insulating layer 135 is The film can be formed by using a PECVD method, an ALD method, a sputtering method, or the like.

[0378] Next, a conductive film is formed on the insulating layer 135 and processed by etching to form a transistor. A conductive layer 306 is formed to function as the second gate electrode of the transistor 630 (FIG. 22D). In this case, it is preferable to process the conductive layer 306 so that the end portion thereof has a tapered shape. This can improve the step coverage of the insulating layer 103 to be formed next. Deposition by sputtering using a metal or alloy sputtering target is preferred.

[0379] By using a conductive film containing copper as the conductive layer 306, the wiring resistance can be reduced. For example, the semiconductor device according to one embodiment of the present invention can be applied to a large display device. When the display device is applied to a display device having a high resolution, it is preferable to use a conductive film containing copper. Even when a conductive film containing copper is used for the conductive layer 306, the insulating layer 103 This prevents copper from diffusing into the semiconductor layer 108, resulting in a highly reliable transistor. This can be achieved.

[0380] Next, the second element is supplied to the semiconductor layer 308 (FIG. 22E). The second element is supplied as follows: Plasma ion doping, ion implantation, etc. can be used. The supply of the second element is indicated by an arrow. By supplying the second element using the conductive layer 306 as a mask, As a result, a region 308i is formed in the semiconductor layer 308 in the region overlapping with the conductive layer 306, and a region 308b is formed in the semiconductor layer 308 in the region overlapping with the conductive layer 306. The region 308n can be formed in a self-aligned manner in the semiconductor layer 308 in the region where the semiconductor layer 308 does not have a lattice structure (see FIG. 2). 3A). Although an example in which the second element is supplied using the conductive layer 306 as a mask has been shown, The embodiment is not limited to this. A resist mask is formed over the insulating layer 135 or the conductive layer 306. The second element may be supplied to the resist mask. An LDD (Lightly Doped Drain) region is formed between the region 308n and the region 308n. The LDD region preferably has a lower concentration of the second element than the region 308n. By providing an LDD region, hot carrier degradation can be suppressed.

[0381] Subsequently, a heat treatment or laser light irradiation may be performed. This allows activation of the second element added to the region 308n. The treatment can repair defects in the semiconductor layer 308 that occurred when the second element was added, and can also restore the crystallinity. Recovery can be carried out.

[0382] The heat treatment can be performed in an atmosphere containing a rare gas or nitrogen. Or dry air (CDA: Clean Dry Air) is used as an oxygen-containing atmosphere. The heat treatment may be carried out using an electric furnace, a rapid thermal annealing (RTA) furnace, or the like. By using an RTA device, the heat treatment can be The temperature of the heat treatment is preferably 300°C or higher and lower than the distortion point of the substrate. More preferably, the temperature is 350°C or higher and 650°C or lower, and even more preferably, 400°C or higher and 600°C or lower. The temperature is preferably 450°C or higher and more preferably 600°C or lower. It is possible to combine the above with the above. After the addition of the second element, activation treatment is not required. The activation treatment may be carried out at any stage after the addition of the second element. The activation treatment may be performed in combination with the heat treatment or the step of applying heat. The irradiation of ultraviolet light may be combined with the irradiation of ultraviolet light.

[0383] [Formation of insulating layer 103, conductive layer 353a, conductive layer 353b, and conductive layer 153] Subsequently, the insulating layer 103 is formed to cover the insulating layer 135 and the conductive layer 306. O3 can be formed using a PECVD method, an ALD method, a sputtering method, etc. (Figure 23B) Here, the insulating layer 103 includes an insulating layer 103a, an insulating layer 103b, an insulating layer 103c, and The insulating layer 103 is formed by laminating an insulating layer 103b and an insulating layer 103c. It is preferable to form the insulating layer 103 by a CVD method. Therefore, detailed explanation will be omitted.

[0384] Subsequently, heat treatment may be performed. By the heat treatment, hydrogen is removed from the insulating layer 103c and converted into a semiconductor. The hydrogen diffuses into the semiconductor layer 308, and terminates the dangling bonds of the semiconductor layer 308 (hereinafter referred to as hydrogen This can be called "encoding."

[0385] The heat treatment can be carried out in an atmosphere containing hydrogen, a rare gas, or nitrogen. The heat treatment is preferably carried out in an atmosphere containing the above-mentioned metal. Preferably, the temperature is less than the melting point, more preferably 250°C or more and 500°C or less, and even more preferably 300°C or more. The temperature is preferably 350°C or higher and 450°C or lower, and more preferably 350°C or higher and 450°C or lower. The upper and lower limit values ​​can be arbitrarily combined. After the addition of the second element, Heat treatment is not necessary. Heat treatment can be performed at any stage after the addition of the second element. This step may also be combined with a subsequent heat treatment or heat application step.

[0386] Next, a portion of the insulating layer 103 and the insulating layer 135 is removed to reach the region 308n. An opening 343a and an opening 343b are formed.

[0387] Subsequently, a conductive film is formed on the insulating layer 103 so as to cover the openings 343a and 343b. The conductive film is formed and processed to form the conductive layers 353a and 353b. Together, they form a conductive layer 153 that functions as a first gate electrode of the transistor 620. At this time, the conductive layers 353a, 353b, and the end portions of the conductive layer 153 are It is preferable to process the insulating layer 137 so that it has a hole shape. This can improve the step coverage.

[0388] [Formation of insulating layer 137] Subsequently, the insulating layer 103, the conductive layer 353a, the conductive layer 353b and the conductive layer 153 are covered with an insulating film. An insulating layer 137 is formed (FIG. 24A). The insulating layer 137 can be formed by a PECVD method, an ALD method, a sputtering method, or the like. It can be formed by using a tarring method or the like.

[0389] After the insulating layer 137 is formed, a treatment for supplying oxygen to the insulating layer 137 may be performed. For example, plasma treatment or heat treatment in an oxygen atmosphere can be performed. Alternatively, oxygen is supplied to the insulating layer 137 by plasma ion doping or ion implantation. That's fine.

[0390] [Formation of Semiconductor Layer 108] Next, a metal oxide film 108f that will become the semiconductor layer 108 is formed on the insulating layer 137 ( Figure 24C).

[0391] The metal oxide film 108f is formed by a sputtering method using a metal oxide target. 24B shows the state when the metal oxide film 108f is formed on the insulating layer 137. The figure shows a cross-sectional view of the inside of the sputtering device. A target 193 is placed, and a plasma 194 is formed below the target 193. For example, when oxygen gas is used in forming the metal oxide film 108f, In this case, oxygen can be suitably supplied into the insulating layer 137. The arrow indicates the oxygen supplied to 137.

[0392] It is preferable that the metal oxide film 108f be a dense film with as few defects as possible. In addition, the metal oxide film 108f is a high-purity film in which impurities such as hydrogen and water are reduced as much as possible. In particular, it is preferable that the metal oxide film 108f is a crystalline metal oxide. It is preferred to use a membrane.

[0393] When forming the metal oxide film 108f, oxygen gas and an inert gas (for example, helium gas) are mixed. In addition, when forming a metal oxide film, a gas such as argon gas or xenon gas may be mixed. The higher the ratio of oxygen gas to the total deposition gas (hereinafter referred to as the oxygen flow ratio), The crystallinity of the metal oxide film can be improved, and a highly reliable transistor can be realized. On the other hand, the lower the oxygen flow rate ratio, the lower the crystallinity of the metal oxide film, resulting in an increase in the on-current. It can be a transistor.

[0394] When the semiconductor layer 108 has a laminated structure, the same sputtering target is used to form the same composition. By continuously forming the films in the film chamber, it is possible to obtain a good interface, which is preferable. The deposition conditions for each metal oxide film were varied under different conditions such as pressure, temperature, and power during deposition. However, by keeping the conditions other than the oxygen flow rate the same, the time required for the film formation process can be shortened. In addition, when metal oxide films of different compositions are laminated, it is preferable to expose the film to the atmosphere. It is preferable to form the films continuously without any additional steps.

[0395] The metal oxide film 108f may be a metal oxide film having a CAAC structure, a metal oxide film having an nc structure, or the like. The film is formed to be an oxide film or a metal oxide film with a mixture of CAAC structure and nc structure. It is preferable to set the conditions. The film conditions and the film formation conditions for the nc structure depend on the sputtering target used. Since it differs depending on the composition, the substrate temperature, oxygen flow rate, pressure, power, etc. must be adjusted according to the composition. can be set appropriately.

[0396] The substrate temperature during the deposition of the metal oxide film 108f is preferably from room temperature to 450° C. The temperature is preferably from room temperature to 300°C, more preferably from room temperature to 200°C, and even more preferably from room temperature to 200°C. For example, the substrate 102 may be a large glass substrate or a resin substrate. When a plate is used, it is preferable to set the substrate temperature to be above room temperature and below 140°C, as this increases productivity. In addition, the metal oxide film is formed at room temperature or without heating the substrate. By doing so, the crystallinity can be reduced. It can be adjusted.

[0397] Before forming the metal oxide film 108f, water, hydrogen, and organic compounds adsorbed on the surface of the insulating layer 137 are removed. It is preferable to perform a treatment for removing substances or the like and a treatment for supplying oxygen into the insulating layer 137. For example, heat treatment can be performed at a temperature of 70°C or higher and 200°C or lower in a reduced pressure atmosphere. Alternatively, the plasma treatment may be performed in an atmosphere containing oxygen. For example, the insulating layer 137 is formed by plasma treatment in an atmosphere containing nitrous oxide gas. In addition, the plasma treatment can be performed in an atmosphere containing nitrous oxide gas. By carrying out this treatment, organic substances on the surface of the insulating layer 137 can be suitably removed. The metal oxide film 108f is continuously formed without exposing the surface of the metal oxide film 137 to the atmosphere. is preferred.

[0398] Subsequently, the metal oxide film 108f is processed to form an island-shaped semiconductor layer 108 (FIG. 25A ).

[0399] The metal oxide film 108f can be processed by either a wet etching method or a dry etching method. In this case, the insulating layer 1 that does not overlap with the semiconductor layer 108 may be used. A part of the insulating layer 110 may be removed. By removing a part of the insulating layer 110, the semiconductor layer 10 The thickness of the insulating layer 110 in the region that does not overlap with the semiconductor layer 108 is It will be thinner than 0 thickness.

[0400] After the metal oxide film 108f is formed, or after the metal oxide film 108f is processed into the semiconductor layer 108 After that, in order to remove hydrogen or water in the metal oxide film 108f or the semiconductor layer 108, Heat treatment may be performed. It is possible to remove hydrogen or water contained in or adsorbed on the surface. The treatment improves the film quality of the metal oxide film 108f or the semiconductor layer 108 (e.g., reduces defects). reduction, improvement of crystallinity, etc.

[0401] By the heat treatment, the oxide film 108f or the semiconductor layer 108 is transferred from the insulating layer 137 to the metal oxide film 108f. When oxygen is supplied from the insulating layer 137, the semiconductor layer 108 is oxidized. It is more preferable to carry out a heat treatment before the application.

[0402] The temperature of the heat treatment is typically 150° C. or higher but lower than the strain point of the substrate, or 250° C. or higher. The temperature can be 450°C or lower, or 300°C or higher and 450°C or lower. After the film 108f is formed or after the metal oxide film 108f is processed into the semiconductor layer 108, The heat treatment may not be performed. The heat treatment may be performed after the formation of the metal oxide film 108f. Alternatively, this step may be carried out at the stage of the subsequent heat treatment or heat application step.

[0403] The heat treatment can be performed in an atmosphere containing a rare gas or nitrogen. After heating in an atmosphere containing oxygen, heating in an atmosphere containing nitrogen or an atmosphere containing oxygen may be performed. Dry air (CDA: Clean Dry Air) may be used as the atmosphere. It is preferable that the atmosphere for the heat treatment does not contain hydrogen, water, etc. °C or less, preferably with a dew point of -60°C or less, and more preferably -100°C or less By using the condensed gas, hydrogen, water, etc. are taken into the semiconductor layer 108 as much as possible. The heat treatment can be carried out in an electric furnace, a rapid thermal annealing (RTA) furnace, or the like. By using an RTA device, , the heat treatment time can be shortened.

[0404] Note that it is preferable to form the insulating layer 110 immediately after forming the semiconductor layer 108. When the surface of the conductor layer 108 is exposed, water may be adsorbed onto the surface of the semiconductor layer 108. When water is adsorbed on the surface of the semiconductor layer 108, the semiconductor layer 108 is decomposed by a subsequent heat treatment or the like. Hydrogen diffuses into the V O H may be formed. V O H can be a carrier generation source Therefore, it is preferable that the amount of adsorbed water on the semiconductor layer 108 is small.

[0405] [Formation of insulating layer 110 and conductive layer 112] Subsequently, the insulating layer 110 is formed to cover the insulating layer 137 and the semiconductor layer 108 (FIG. 25). B) The insulating layer 110 can be formed by using a PECVD method, an ALD method, a sputtering method, or the like. do.

[0406] Before forming the insulating layer 110, the surface of the semiconductor layer 108 may be subjected to plasma treatment. This plasma treatment is preferable because it removes impurities such as water adsorbed on the surface of the semiconductor layer 108. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 110 can be reduced. Since the amount of material can be reduced, a highly reliable transistor can be realized. When the surface of the semiconductor layer 108 is exposed to the atmosphere during the period from the formation to the deposition of the insulating layer 110, The plasma treatment may be carried out using, for example, oxygen, ozone, nitrogen, nitrous oxide, argon, etc. The plasma treatment and the formation of the insulating layer 110 can be carried out in any atmosphere. It is preferable that the heating and drying be carried out continuously without exposure to heat.

[0407] Heat treatment may be performed after the insulating layer 110 is formed. The heat treatment can remove impurities in the insulating layer 110 and adsorbed water on the surface of the insulating layer 110. The process is carried out in an atmosphere containing one or more rare gases at a temperature of 200°C to 400°C. Note that heat treatment does not necessarily have to be performed after the insulating layer 110 is formed. The treatment may be carried out at any stage after the formation of the insulating layer 110. This step may also be performed as a step in which heat is applied.

[0408] After forming the insulating layer 110, or after the heat treatment for removing hydrogen or water as described above is performed, After that, a process for supplying oxygen to the insulating layer 110 may be performed. For example, a plasma The treatment or heat treatment can be carried out in an oxygen-containing atmosphere. Oxygen may be supplied to the insulating layer 110 by ion doping, ion implantation, or the like. For example, a PECVD apparatus can be suitably used for the plasma treatment. When the insulating layer 110 is formed using the apparatus, after the insulating layer 110 is formed, It is preferable to perform plasma treatment. The formation of the insulating layer 110 and the plasma treatment are performed in vacuum. By doing this continuously, productivity can be increased.

[0409] When the heat treatment is performed after the treatment for supplying oxygen to the insulating layer 110, the insulating layer 110 The heat treatment may be performed after a film (for example, a metal oxide film) is formed on the insulating layer 11. When heat treatment is performed with the insulating layer 110 exposed, the oxygen supplied to the insulating layer 110 is When a film (for example, a metal oxide film) is formed on the insulating layer 110, By performing heat treatment after the insulating layer 110 is removed, the oxygen supplied to the insulating layer 110 is removed from the insulating layer 110. This can prevent the particles from being released.

[0410] Next, a conductive film is formed on the insulating layer 110 and processed by etching to form a transistor. A conductive layer 112 is formed to function as the second gate electrode of the transistor 620 (FIG. 25B). The conductive film is formed by a sputtering method using a metal or alloy sputtering target. It is preferable to form the film by the method described above.

[0411] The conductive layer 112 can be preferably formed by wet etching. For example, an etchant containing hydrogen peroxide can be used in the etching method. For example, an etchant having one or more of phosphoric acid, acetic acid, nitric acid, hydrochloric acid, or sulfuric acid may be used. In particular, when a material containing copper is used for the conductive layer 112, a solution of phosphoric acid, acetic acid, etc. An etchant containing nitric acid can be suitably used.

[0412] Next, using the conductive layer 112 as a mask, a first layer is applied to the semiconductor layer 108 via the insulating layer 110. The first element is supplied (FIG. 25C). The first element is supplied by plasma treatment, plasma ion doping, In FIG. 25C, the first element is supplied by a method such as a dipping method or an ion implantation method. The conductive layer 112 is formed by supplying the first element to the mask. The semiconductor layer 108 has a region 108i in the region overlapping with the conductive layer 112, and the semiconductor layer 108 has a region 108i in the region not overlapping with the conductive layer 112. Regions 108n can be formed in a self-aligned manner in layer 108 (FIG. 26A).

[0413] The first element can be preferably supplied by plasma treatment. When using the plasma generating method, plasma is generated in a gas atmosphere containing the first element to be supplied. By carrying out the treatment, the first element can be supplied. Equipment includes dry etching equipment, ashing equipment, plasma CVD equipment, and high density plasma A CVD apparatus or the like can be used.

[0414] After the first element is supplied, the insulating layer 118 may be formed continuously without exposure to the atmosphere. For example, a plasma CVD apparatus can be used to supply the first element and form the insulating layer 118. After the supply of the first element, the insulating layer 118 can be formed continuously without exposure to the atmosphere. By performing the steps continuously, the productivity of semiconductor devices can be improved.

[0415] When performing plasma processing, a gas containing the first element is used as a gas for supplying the first element. It is particularly preferable to use a gas containing hydrogen, and the hydrogen is The resistance value can be controlled by supplying the gas containing the first element. For example, hydrogen (H2), ammonia (NH3), and silane (SiH4) can be suitably used. can.

[0416] The substrate temperature during plasma treatment is preferably from room temperature to 450°C, and more preferably from 150°C to 450°C. The temperature is preferably in the range of 200°C to 350°C, more preferably in the range of 200°C to 350°C. By setting the substrate temperature at this value, the reaction between the material constituting the semiconductor layer 108 and the first element is promoted. This can reduce the resistance of the semiconductor layer 108. The upper and lower limits are as follows: Any combination is possible.

[0417] The pressure in the processing chamber during plasma processing is preferably 50 Pa or more and 1500 Pa or less, and The pressure is preferably 100 Pa or more and 1000 Pa or less, and more preferably 120 Pa or more and 500 Pa or less. The pressure in the above range is preferably 150 Pa or more and more preferably 300 Pa or less. By doing so, it is possible to generate plasma stably. Any combination of values ​​can be used.

[0418] By appropriately selecting the conditions for the plasma treatment, the first element supplied to the semiconductor layer 108 can be The amount of the first element can be adjusted to control the resistance value. 110 to the semiconductor layer 108. The thickness may be adjusted.

[0419] Alternatively, the first element may be supplied by thermal diffusion using a gas containing the first element. The above treatment may also be used.

[0420] Alternatively, the first element may be supplied by plasma ion doping or ion implantation. These methods may be used to obtain a concentration profile in the depth direction by using the ion acceleration voltage and the dopant. It can be controlled with high precision by adjusting the amount of deviation, etc. Plasma ion doping is used. By using mass separation, the productivity can be improved. Therefore, the purity of the first element to be supplied can be increased. Preferably one or more of boron, phosphorus, aluminum, magnesium, or silicon It can be used.

[0421] In the supplying process of the first element, the interface between the semiconductor layer 108 and the insulating layer 110 or the semiconductor layer The portion of the dielectric layer 108 near the interface or the portion of the insulating layer 110 near the interface is the most It is preferable to control the treatment conditions so that the concentration is as high as possible. This allows the first element to be supplied at an optimum concentration to both the semiconductor layer 108 and the insulating layer 110. Cut.

[0422] When using the plasma ion doping method or the ion implantation method, the first element is supplied. A gas containing the first element can be used as the gas to be supplied. Typically, B2H6 gas or BF3 gas can be used. For this purpose, PH3 gas can be used as a typical example. A diluted mixed gas may be used. Other examples of the gas that supplies the first element include CH4, N2, NH3, AlH3, AlCl3, SiH4, Si2H6, F2, HF, H2, (C 5H5)2Mg and rare gases can be used. The ion source is not limited to gases. Alternatively, a solid or liquid may be heated and vaporized to be used.

[0423] The first element is supplied in consideration of the composition, density, thickness, etc. of the insulating layer 110 and the semiconductor layer 108. This can be controlled by setting conditions such as acceleration voltage and dose.

[0424] For example, boron ions are supplied by ion implantation or plasma ion doping. In this case, the acceleration voltage is, for example, 5 kV or more and 100 kV or less, preferably 7 kV or more and 70 kV or less. More preferably, the voltage can be in the range of 10 kV to 50 kV. , e.g. 1×10 13 ions / cm 2 More than 1×10 17 ions / cm 2 The following is preferred: 1×10 14 ions / cm 2 5x10 or more 16 ions / cm 2 The following is more preferred: 1×10 15 ions / cm 2 That's it, 3 x 10 16 ions / cm 2 The range is as follows: It is possible.

[0425] When phosphorus ions are supplied by ion implantation or plasma ion doping, the acceleration The voltage is, for example, 10 kV or more and 100 kV or less, preferably 30 kV or more and 90 kV or less, more preferably More preferably, the voltage can be in the range of 40 kV to 80 kV. For example, 1 x 10 13 ions / cm 2 More than 1×10 17 ions / cm 2 Below, preferably 1×10 14 ions / cm 2 5x10 or more 16 ions / cm 2 Below, more preferably 1×10 15 ions / cm 2 3x10 or more 16 ions / cm 2 The following range should be met: can be done.

[0426] In one embodiment of the present invention, the first element is supplied to the semiconductor layer 108 through the insulating layer 110. Therefore, even if the semiconductor layer 108 has crystallinity, the first element can be The damage to the semiconductor layer 108 during supply is reduced, and the crystallinity is not impaired. Therefore, in cases where the electrical resistance increases due to a decrease in crystallinity, It is suitable.

[0427] [Formation of insulating layer 118] Subsequently, an insulating layer 118 is formed to cover the insulating layer 110 and the conductive layer 112 (FIG. 26B). The insulating layer 118 can be formed by using a PECVD method, an ALD method, a sputtering method, or the like. .

[0428] When the insulating layer 118 is formed by the plasma CVD method, if the film formation temperature is too high, the region 1 Depending on the impurities contained in the region 108n, the impurities may diffuse to the surrounding area including the region 108i. As a result, the resistance of the region 108i may decrease, and the resistance of the region 108n may increase. The temperature for forming the insulating layer 118 is, for example, 150° C. or higher and 40° C. or lower. 0°C or less, preferably 180°C or more and 360°C or less, more preferably 200°C or more and 250°C or less By forming the insulating layer 118 at a low temperature, the channel length can be shortened. Even a small transistor can have good electrical characteristics.

[0429] After the insulating layer 118 is formed, heat treatment may be performed.

[0430] [Formation of Openings 141a, 141b, 341a, and 341b] Next, a portion of the insulating layer 118 and the insulating layer 110 is removed to reach the region 108n. In addition, the insulating layer 118, the insulating layer 110, and the insulating layer 141a are formed. By removing a part of the insulating layer 137, an opening reaching the conductive layer 353a and the conductive layer 353b is formed. A mouth portion 341a and an opening portion 341b are formed.

[0431] [Formation of Conductive Layer 120a, Conductive Layer 120b, Conductive Layer 320a, and Conductive Layer 320b] Next, the openings 141a, 141b, 341a, and 341b are covered. In this way, a conductive film is formed on the insulating layer 118 and processed to form the conductive layer 120. a, a conductive layer 120b, a conductive layer 320a, and a conductive layer 320b are formed (FIG. 15A).

[0432] Through the above steps, the semiconductor device 600 can be fabricated.

[0433] <Components of semiconductor device> Next, the components included in the semiconductor device of this embodiment will be described in detail.

[0434] 〔substrate〕 There is no particular restriction on the material of the substrate 102, but it should be strong enough to withstand the subsequent heat treatment. For example, single crystals made of silicon or silicon carbide are Semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI substrates The substrate 102 may be a plate, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like. In addition, a substrate having a semiconductor element formed thereon may be referred to as the substrate 102. It may be used.

[0435] A flexible substrate is used as the substrate 102, and the transistor 30 and the like are formed directly on the flexible substrate. Alternatively, a separation layer may be provided between the substrate 102 and the transistor 30 or the like. The release layer is used to separate the semiconductor device from the substrate 102 after a part or all of the semiconductor device is completed thereon. The transistor 30 and the like can be transferred to another substrate. It can be transferred to substrates with poor hardness or flexibility.

[0436] [Semiconductor layer 108] The semiconductor layer 108 is made of gold having an energy gap of 2 eV or more, preferably 2.5 eV or more. It is preferable to use a metal oxide. By using a thin metal oxide, the off-state current of a transistor can be reduced.

[0437] The semiconductor layer 108 is preferably made of a metal oxide having a low carrier concentration. When the carrier concentration of the oxide is reduced, the impurity concentration in the metal oxide is reduced. In this specification and the like, the impurity concentration is low and the defect level density is low. The impurities in the metal oxide are called high purity or substantially high purity. For example, hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, etc. be.

[0438] In particular, hydrogen contained in metal oxides reacts with oxygen that bonds with metal atoms to form water. In this case, oxygen vacancies may be formed in the metal oxide. If an element defect is included, the transistor may have normally-on characteristics. The defect where hydrogen has entered the oxygen vacancy acts as a donor, generating electrons as carriers. In addition, some of the hydrogen atoms may bond with oxygen atoms that bond with metal atoms, forming electron carriers. Therefore, transistors using metal oxides containing a large amount of hydrogen The starter tends to have normally-on characteristics.

[0439] The defect where hydrogen has entered the oxygen vacancy can function as a donor for the metal oxide. However, it is difficult to quantitatively evaluate the defects. Therefore, in this specification, metal As a parameter of the oxide, instead of donor concentration, we use the capacitance assuming a state where no electric field is applied. In other words, the "carrier concentration" described in this specification and the like is This can sometimes be rephrased as "energy concentration."

[0440] Therefore, it is preferable that the amount of hydrogen in the metal oxide is reduced as much as possible. In the metal oxide, the hydrogen concentration obtained by secondary ion mass spectrometry (SIMS) is 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than , more preferably 5 × 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 The metal oxide with sufficiently reduced impurities such as hydrogen is used as a transistor. By using it in the channel formation region of a transistor, stable electrical characteristics can be achieved. .

[0441] The carrier concentration of the metal oxide in the channel formation region is 1×10 18 cm -3 The following is and preferably 1×10 17 cm -3 More preferably, it is less than 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 Less than 1×10 12 cm -3 It is more preferable that the channel forming region is less than 1000 nm. The lower limit of the carrier concentration of the metal oxide in the region is not particularly limited. For example, 0 -9 cm -3 It can be said that:

[0442] The semiconductor layer 108 preferably has a non-single crystal structure. This includes the CAAC structure, polycrystalline structure, microcrystalline structure, or amorphous structure described above. In this case, the amorphous structure has the highest defect level density, and the CAAC structure has the lowest defect level density. stomach.

[0443] Below, we explain about CAAC (c-axis aligned crystal). CAAC represents an example of a crystal structure.

[0444] The CAAC structure has multiple nanocrystals (crystalline regions with a maximum diameter of less than 10 nm). It is one of the crystalline structures of thin films, etc., and each nanocrystal has a c-axis oriented in a specific direction and a-axis and The b-axis and b-axis do not have any orientation, and the nanocrystals are continuously connected without forming grain boundaries. In particular, thin films with a CAAC structure have the following characteristics: The c-axis of the thin film is oriented in the thickness direction, the normal direction to the surface on which it is formed, or the normal direction to the surface of the thin film. It has the characteristic of being easy to use.

[0445] CAAC-OS (Oxide Semiconductor) is a highly crystalline oxide semiconductor. On the other hand, CAAC-OS has no clear grain boundaries, It can be said that the decrease in electron mobility caused by the grain boundaries is unlikely to occur. Crystallinity can be reduced by the inclusion of impurities or the generation of defects. It can be said that CAAC- is an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Oxide semiconductors containing an OS have stable physical properties. Oxide semiconductors are heat resistant and highly reliable.

[0446] In crystallography, the three axes that make up the unit cell, the a-axis, the b-axis, and the c-axis (crystal It is common to take a unit cell with a specific axis as the c-axis for the layer structure. In a crystal with this structure, the two axes parallel to the plane direction of the layers are the a-axis and the b-axis, and the axis intersecting the layers is the The c-axis is generally defined as the plane of the crystal. Graphite is classified as a hexagonal crystal, and the a-axis and b-axis of the unit cell are parallel to the cleavage plane. The c-axis is perpendicular to the cleavage plane. For example, the layered structure of YbFe2O4 type crystal structure The crystal of InGaZnO4 can be classified as a hexagonal system, and the a-axis and The a and b axes are parallel to the plane direction of the layer, and the c axis is perpendicular to the layer (i.e., the a and b axes).

[0447] An oxide semiconductor film with a microcrystalline structure (microcrystalline oxide semiconductor film) is observed by TEM. In some cases, it may not be possible to clearly identify the crystal parts in the microcrystalline oxide semiconductor film. The crystal part to be formed has a size of 1 nm or more and 100 nm or less, or 1 nm or more and 10 nm or less. In particular, microcrystals of 1 nm to 10 nm or 1 nm to 3 nm are often An oxide semiconductor film having nanocrystals (nc) is called nc-OS. (nanocrystalline oxide semiconductor) film In addition, the grain boundaries of the nc-OS film can be clearly seen in the TEM image. It may not be possible.

[0448] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analytical method. For example, XRD, which uses X-rays with a diameter larger than that of the crystal part, is used for nc-OS films. When structural analysis is performed using the device, the crystal plane is analyzed using the out-of-plane method. In addition, the peaks shown in the figure are not detected in the nc-OS film because the probe diameter is larger than that of the crystalline part. Electron beam diffraction (also called selected area electron beam diffraction) using an electron beam (for example, 50 nm or larger) When the diffraction pattern is changed to nc-OS film, a halo-like diffraction pattern is observed. The probe diameter is close to or smaller than the size of the crystal part (for example, 1 nm or more and 30 nm or less). When electron beam diffraction (also called nanobeam electron diffraction) is performed using the electron beam (bottom), a circle is drawn. A bright area (ring-shaped) is observed, and multiple spots are observed within that area. This may be the case.

[0449] The nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the S film, there is no regularity in the crystal orientation between different crystal parts. Therefore, the nc-OS film The defect density of the nc-OS film is higher than that of the CAAC-OS film. Compared to the OS film, the carrier concentration is higher and the electron mobility may be higher. A transistor including an -OS film can exhibit high field-effect mobility.

[0450] The nc-OS film can be formed with a smaller oxygen flow rate than the CAAC-OS film. In addition, the nc-OS film can be formed at a lower substrate temperature during film formation than the CAAC-OS film. For example, the nc-OS film can be formed by lowering the substrate temperature (for example, The film can be formed even when the substrate is heated (for example, at a temperature of 130°C or less) or without heating. It is suitable for use with large glass substrates or resin substrates, and can increase productivity. do.

[0451] An example of the crystal structure of a metal oxide will be described below. Sputtering was performed using a Zn oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]). A metal oxide film formed by the ring method will be described as an example. Using the above target, The substrate temperature was set to 100°C or higher and 130°C or lower, and the metal oxide was formed by sputtering. The material has either the nc (nano crystal) structure or the CAAC structure. On the other hand, if the substrate temperature is set to room temperature (RT), Therefore, metal oxides formed by sputtering tend to have an nc crystal structure. Here, room temperature (RT) includes the temperature when the substrate is not heated.

[0452] [Metal oxide composition] Hereinafter, a CAC (C This paper explains the structure of the Cloud-Aligned Composite OS.

[0453] In this specification, CAAC (c-axis aligned crystal) l), and when written as CAC (Cloud-Aligned Composite) CAAC represents an example of a crystal structure, and CAC represents a function or a material configuration. Represents an example.

[0454] CAC-OS or CAC-metal oxide is a material that has a conductive function in some parts. The material has insulating properties in some parts and semiconductor properties in the whole material. Note that CAC-OS or CAC-metal oxide is used as the active material for the transistor. When used in a layer, the conductive function is to allow electrons (or holes) to flow as carriers. The insulating function is to prevent the flow of electrons, which act as carriers. By making the functions of the two complementary to each other, the switching function (On / Off) is realized. The function of activating the CAC-OS or CAC-metal oxide can be added. In CAC-OS or CAC-metal oxide, each function is separated. By combining these, the functions of both can be maximized.

[0455] CAC-OS or CAC-metal oxide is a conductive and insulating material. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. In addition, the conductive and insulating regions in the material are formed at the nanoparticle level. In addition, the conductive and insulating regions may be unevenly distributed within the material. In addition, the conductive area may appear as a cloud-like connected area with a blurred periphery. There is a match.

[0456] In CAC-OS or CAC-metal oxide, conductive regions and insulating regions The region is 0.5 nm or more and 10 nm or less, preferably 0.5 nm or more and 3 nm or less. They may be dispersed throughout the material in sizes of

[0457] CAC-OS or CAC-metal oxide has different band gaps. For example, CAC-OS or CAC-metal oxide The component has a wide gap due to the insulating region and a narrow gap due to the conductive region. In this configuration, when a carrier is flowed, Carriers mainly flow in the low-gap component. The component with a wide gap acts complementary to the component with a narrow gap. In conjunction with this, carriers also flow into the wide-gap component. C-OS or CAC-metal oxide is used for the channel formation region of the transistor. When the transistor is turned on, the current driving force is high, that is, the on-state current is large, and Therefore, a high field effect mobility can be obtained.

[0458] That is, CAC-OS or CAC-metal oxide is a matrix composite. matrix composite, or metal matrix composite It can also be called a matrix composite.

[0459] This concludes the description of the components.

[0460] <Laser processing equipment> Next, a laser processing apparatus that can be used in a manufacturing process of a semiconductor device according to one embodiment of the present invention will be described. The laser processing device emits a laser beam shaped into a linear beam onto a workpiece. Light irradiation can be performed.

[0461] The laser processing device irradiates an amorphous film provided on a substrate with laser light, and It can be used for purposes such as crystallizing a film.

[0462] The laser processing device described here is a device for applying a laser beam to a structure formed on a substrate via a resin layer. Use in applications such as separating substrates by irradiating them with light, or in technologies for peeling substrates. Specifically, the laser beam is transmitted through the substrate and strikes the resin layer or a layer in the vicinity of the resin layer. (for example, an amorphous silicon layer or a metal layer) may be irradiated.

[0463] For example, a resin layer such as polyimide is provided on a substrate, and a structure is formed on the resin layer. Then, the laser light that has passed through the substrate is irradiated onto the resin layer or the vicinity of the resin layer, thereby forming a bond between the substrate and the resin. This weakens the adhesive strength with the oil layer, allowing the substrate to be separated.

[0464] FIG. 27A is a perspective view illustrating the main configuration of a laser processing device. , the moving mechanism 812, the moving mechanism 813 and the stage 81 which are components of the XY stage. 5. Also, a laser oscillator 820 for shaping a linear beam 827, an optical system unit The optical system includes a nozzle 821, a mirror 822, a condenser lens 823, and the like.

[0465] The moving mechanism 812 and the moving mechanism 813 have the function of performing reciprocating linear motion in the horizontal direction. The mechanism that provides power to the moving mechanism 812 and the moving mechanism 813 is, for example, a motor-driven mechanism. A ball screw mechanism 816 or the like can be used. Since the movement directions of the stages 81 and 82 are perpendicular to each other, the stage 81 is fixed to the movement mechanism 813. 5 can be freely moved in the X and Y directions.

[0466] The laser oscillator 820 may be any device that can output light of a wavelength and intensity suitable for the purpose of processing. Pulsed lasers are preferred, but CW lasers (Continuous wave lasers) are also Typically, wavelengths of 351-353 nm (XeF), 308 nm (XeC An excimer laser capable of irradiating ultraviolet light such as 1) can be used. Laser (YAG laser, fiber laser, etc.) double wave (515nm, 532nm, etc.) Alternatively, a triple wave (343 nm, 355 nm, etc.) may be used. may be plural.

[0467] The optical system unit 821 includes, for example, a beam expander, a beam homogenizer, and The laser beam 825 output from the laser oscillator 820 is The laser light 825 can be expanded while the in-plane energy distribution is made uniform.

[0468] The mirror 822 may be, for example, a dielectric multilayer mirror. The condenser lens 823 is installed so that the angle is approximately 45°. Lenses can be used.

[0469] First, the laser beam 825 output from the laser oscillator 820 enters the optical system unit 821. The laser beam 826 expanded into a rectangular shape by the optical system unit 821 is incident on the mirror 822. It is incident.

[0470] The laser beam 826 reflected by the mirror 822 is incident on the condenser lens 823 and focused on the workpiece 8 A linear beam 827 is formed at a desired position (height) in 40. 827 is irradiated onto the workpiece 840, the stage 815 is moved in the horizontal direction. 8B, the desired area of ​​the workpiece 840 can be laser machined.

[0471] Next, the workpiece 840 and the method for processing it will be described.

[0472] FIG. 27B illustrates a method of irradiating an amorphous film with a linear beam to crystallize the amorphous film. In FIG. 27B, the workpiece 840 is a glass substrate 841 and a glass substrate An amorphous silicon layer 842 is shown disposed on a plate 841 .

[0473] The glass substrate 841 side is placed on the stage 815, and the amorphous silicon layer 842 side is placed on the upper surface. The laser light 826 incident on the condenser lens 823 is incident on the amorphous silicon layer 842. The height of the stage and the light source are adjusted so that a linear beam 827 is formed on or near the surface where the light source is placed. Adjust academic departments, etc.

[0474] The output of the laser oscillator 820 is set so that the energy density of the linear beam 827 is appropriate. The stage is moved in the direction of the arrow while irradiating the laser beam, and the polycrystalline silicon A conductive layer 843 can be formed.

[0475] FIG. 27C shows a method for separating a resin layer from a substrate by irradiating the resin layer with a linear beam through the substrate. In FIG. 27C, a glass substrate 845 is used as the workpiece 840. The stack of resin layer 846 and structure 847 is shown.

[0476] The structure 847 side is placed on the stage 815, with the glass substrate 845 side facing up. The laser light 826 incident on the optical lens 823 is incident on the glass substrate 84 through the glass substrate 845. The stay 5 is fixed to the resin layer 846 so that a linear beam 827 is formed at or near the interface between the stay 5 and the resin layer 846. Adjust the height of the camera and the optical system.

[0477] Since the laser beam is irradiated to the processing position through the glass substrate 845, It is preferable that the laser beam has a short wavelength and a relatively high transmittance. It is preferable to use a laser beam in the wavelength range of 400 nm.

[0478] The output of the laser oscillator 820 is set so that the energy density of the linear beam 827 is appropriate. By moving the stage in the direction of the arrow while irradiating the laser beam, the processing area 84 8 can be formed.

[0479] In the processed region 848, the interface between the resin layer 846 and the glass substrate 845 or the vicinity of the interface This causes the resin layer 846 to be altered or decomposed by light or heat. Therefore, the bonding strength between the resin layer 846 and the glass substrate 845 is weakened, and the resin layer 846 and the glass substrate 845 The glass substrate 845 can be separated. At the separation surface, a part of the resin layer 846 In some cases, it may remain on the glass substrate 845 side.

[0480] If the structure includes a display unit, a flexible substrate may be attached. By doing so, a flexible display device can be formed.

[0481] The two uses of the linear beam have been described above. The device can also be used in other applications. The linear beams are moved in one direction relative to each other. This allows irradiation of a large area, which allows for high throughput processing of workpieces. This can be done.

[0482] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0483] (Embodiment 3) In this embodiment, an example of a display device including the transistor described in the above embodiment will be described. We will explain about this.

[0484] <Configuration example> FIG. 28A shows a top view of the display device 700. The display device 700 is made of a sealing material 712. The first substrate 701 and the second substrate 705 are bonded together. In the region sealed with the second substrate 705 and the sealant 712, A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 706 are provided in the The pixel portion 702 is provided with a plurality of display elements.

[0485] An FPC 716 (FPC: F FPC terminal portion 708 to which the flexible printed circuit (FPC) is connected is The FPC 716 is provided via the FPC terminal portion 708 and the signal line 710. , the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706. Various signals are supplied to each of them.

[0486] A plurality of gate driver circuit sections 706 may be provided. The path section 706 and the source driver circuit section 704 are separately formed on a semiconductor substrate or the like. The IC chip may be in the form of a packaged IC chip. The IC chip is mounted on the first substrate 70. It can be mounted on a 1 or FPC716.

[0487] The pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 have The transistor which is a semiconductor device of one embodiment of the present invention can be used as the transistor.

[0488] Examples of the display element provided in the pixel portion 702 include a liquid crystal element and a light-emitting element. As the liquid crystal element, a transmissive liquid crystal element, a reflective liquid crystal element, a semi-transmissive liquid crystal element, etc. are used. In addition, LEDs (Light Emitting Diodes) can be used as light emitting elements. de), OLED (Organic LED), QLED (Quantum-dot L Examples of self-luminous light-emitting elements include EDs and semiconductor lasers. or optical interference-based MEMS (Micro Electro Mechanical Systems) systems), microcapsule method, electrophoresis method, electrowetting It is also possible to use display elements that use the RGB method or the electronic liquid powder method. Cut.

[0489] The display device 700A shown in FIG. 28B has a flexible resin substrate instead of the first substrate 701. Example of a display device to which layer 743 is applied and which can be used as a flexible display is.

[0490] In the display device 700A, the pixel section 702 is not rectangular, but has arc-shaped corners. As shown in the region P1 in FIG. 28B, the pixel section 702 and a part of the resin layer 743 The pair of gate driver circuit portions 706 are connected to the pixel portion 702. The gate driver circuit section 706 is provided on both sides of the pixel section 702. The grooves are provided along an arc-shaped contour.

[0491] The resin layer 743 has a protruding shape at the portion where the FPC terminal portion 708 is provided. A part of the resin layer 743 including the FPC terminal portion 708 is folded backward in a region P2 in FIG. 28B. By folding back a part of the resin layer 743, the FPC 716 can be attached to the pixel section 70. The display device 700A can be mounted on the back of the electronic device. This allows for space saving for electronic devices.

[0492] An IC 717 is mounted on an FPC 716 connected to the display device 700A. 717 has a function as, for example, a source driver circuit. The source driver circuit section 704 in A includes a protection circuit, a buffer circuit, a demultiplexer, The configuration may include at least one of a circuit, etc.

[0493] The display device 700B shown in FIG. 28C is suitable for use in electronic devices with large screens. The display device 700B is a display device that can Personal computers (including laptops and desktops), tablets, It can be suitably used for digital signage and the like.

[0494] The display device 700B includes a plurality of source driver ICs 721 and a pair of gate driver circuits. It has a section 722.

[0495] The plurality of source driver ICs 721 are attached to respective FPCs 723. In addition, the plurality of FPCs 723 have terminals on one side connected to the first substrate 701 and terminals on the other side connected to the printed circuit board. The FPC 723 is bent to connect the printed circuit board 7 24 can be disposed on the back side of the pixel section 702 and mounted on the electronic device, thereby reducing the space required for the electronic device. It is possible to pace things up.

[0496] On the other hand, the gate driver circuit section 722 is formed on the first substrate 701. This makes it possible to realize electronic devices with narrow frames.

[0497] By adopting such a configuration, a large-sized and high-resolution display device can be realized. The surface size is 30 inches or more, 40 inches or more, 50 inches or more, or 60 inches or more diagonally. In addition, it is possible to realize display devices with extremely high resolutions such as 4K2K or 8K4K. This makes it possible to realize a high-resolution display device.

[0498] <Example of cross-sectional configuration> Below, we will discuss configurations using liquid crystal elements and EL elements as display elements. 29 to 33. Note that FIGS. 29 to 32 are the same as those in FIG. 28A. 33 is a cross-sectional view taken along the dashed line QR shown in FIG. 29 and 30 are cross-sectional views taken along the dashed line ST in FIG. This is a configuration using liquid crystal elements, while FIGS. 32 and 33 are configurations using EL elements.

[0499] [Explanation of common parts of the display device] The display device shown in FIGS. 29 to 33 includes a pixel portion 702, a source driver circuit portion 704, and a , and an FPC terminal portion 708. The pixel portion 702 includes a transistor 751 and a capacitor The pixel portion 702 of the display device shown in FIGS. The source driver circuit portion 704 includes a transistor 750. The source driver circuit portion 704 includes a transistor 752. 30 shows a case where the capacitive element 790 is not provided.

[0500] The transistors 750, 751, and 752 are the same as those in the first embodiment. The transistors shown as examples can be applied. For example, an OS transistor can be used as the transistor 751. It is preferable to use Si transistors for the transistors 750 and 752. .

[0501] The OS transistor used in this embodiment is made of a highly purified oxide in which the formation of oxygen vacancies is suppressed. The OS transistor has a low off-state current. This allows the retention time of electrical signals such as image signals to be extended, and the interval between writing image signals etc. can also be set to be longer. This reduces the frequency of refresh operations, thereby reducing power consumption.

[0502] The Si transistor used in this embodiment has a relatively high field-effect mobility. For example, a Si transistor capable of high-speed driving is shown. By using this in a device, the switching transistor in the pixel section and the driver used in the driver circuit section can be In other words, the driver transistor can be formed on the same substrate as the silicon wafer. It is also possible to configure the display device without using the driver circuit, thereby reducing the number of components. Even in the pixel section, high-speed driving Si transistors are used to produce high-quality images. We can provide it.

[0503] The capacitor 790 shown in FIGS. 29, 31, 32, and 33 is a lower electrode formed through the same process as the low resistance region of the semiconductor layer; and a second gate electrode. and an upper electrode formed through the same process as the lower electrode. A part of the insulating film that functions as a second gate insulating layer of the transistor 752 is provided. That is, the capacitor element 790 has an insulating film sandwiched between a pair of electrodes, which functions as a dielectric film. The upper electrode is a source electrode and a drain electrode of the transistor 752. The inner electrode is connected to a wiring obtained by processing the same film as the inner electrode.

[0504] Note that a capacitor that can be used in one embodiment of the present invention has a structure shown in the capacitor 790. The lower electrode and the upper electrode may be formed by combining layers having any conductivity. In addition, one or more conductive layers can be disposed between the upper electrode and the lower electrode. The electrodes may have an insulating film between them.

[0505] A planarization insulating film 7 is formed over the transistor 751, the transistor 752, and the capacitor 790. 70 are provided.

[0506] The transistor 751 included in the pixel portion 702 and the transistor 752 included in the source driver circuit portion 704 are A transistor having a different structure from the transistor 752 may be used. A top-gate transistor is applied to one side, and a bottom-gate transistor is applied to the other side. The gate driver circuit section 706 may also be configured using a source driver. This is similar to the driver circuit section 704.

[0507] The FPC terminal portion 708 includes wiring 760, a part of which functions as a connection electrode, an anisotropic conductive film 78, and a The wiring 760 is connected to the FPC 71 through an anisotropic conductive film 780. Here, the wiring 760 is electrically connected to a terminal of the transistor 752. It is formed from the same conductive film as the source electrode, drain electrode, and the like.

[0508] 29 to 33 show the connection portion 711, the connection portion 713, and the connection portion 715.

[0509] The connection portion 711 is formed by processing the same conductive film as the first gate electrode of the transistor 751. The first wiring is formed by processing the same conductive film as the second gate electrode. The source electrode and the drain electrode are electrically connected through wiring formed by processing the same conductive film. The first wiring is electrically connected to the first gate electrode of the transistor 751. The second wiring may be electrically connected to the second gate electrode of the transistor 751. That's fine.

[0510] The connection portion 713 is formed by processing the same conductive film as the first gate electrode of the transistor 752. a third wiring formed by processing the same conductive film as the second gate electrode; and a fourth wiring formed by processing the same conductive film as the second gate electrode. The wiring formed by processing the same conductive film as the source electrode and the drain electrode is electrically connected. The third wiring may be electrically connected to the first gate electrode of the transistor 750. The fourth wiring may be electrically connected to the second gate electrode of the transistor 750. stomach.

[0511] The connection portion 715 is formed by processing the same conductive film as the second gate electrode of the transistor 752. and a wiring formed by processing the same conductive film as the source electrode and the drain electrode. The fifth wiring is electrically connected to the second gate electrode of the transistor 751. They may also be electrically connected.

[0512] Note that the connecting portions that can be used in one embodiment of the present invention are the connecting portion 711, the connecting portion 713, and The configuration is not limited to that shown in the connection portion 715. The connection can be configured.

[0513] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate or a plastic substrate. A flexible substrate such as a plastic substrate can be used as the first substrate 701. When a substrate having a thickness of 100 μm or less is used, a layer of water or hydrogen is formed between the first substrate 701 and the transistor 752 or the like. It is preferable to provide an insulating layer having a barrier property against the above-mentioned.

[0514] On the second substrate 705 side, there are a light-shielding layer 738, a colored layer 736, and an insulating layer 738 in contact with these. 34 and are provided.

[0515] [Configuration example of a display device using a liquid crystal element] The display device 700 shown in FIG. 29 includes a liquid crystal element 775 and a spacer 778. The element 775 has a conductive layer 772, a conductive layer 774, and a liquid crystal layer 776 therebetween. The electrode layer 774 is provided on the second substrate 705 side and functions as a common electrode. The conductive layer 772 is electrically connected to a source electrode or a drain electrode of the transistor 751. The conductive layer 772 is formed over the planarization insulating film 770 and functions as a pixel electrode. do.

[0516] The conductive layer 772 can be formed using a material that transmits or reflects visible light. The transparent material may be an oxide material containing, for example, indium, zinc, tin, etc. The reflective material may be, for example, a material containing aluminum, silver, or the like.

[0517] If a reflective material is used for the conductive layer 772, the display device 700 becomes a reflective liquid crystal display device. On the other hand, when a light-transmitting material is used for the conductive layer 772, the liquid crystal display device becomes a transmissive type. In the case of a transmissive liquid crystal display device, a polarizing plate is provided on the viewing side. A pair of polarizing plates is provided to sandwich the liquid crystal element.

[0518] The display device 700 shown in FIG. 30 includes a liquid crystal element 77 of a horizontal electric field type (for example, FFS mode). 5 is used as a common electrode. A conductive layer 774 is provided. An electric field generated between the conductive layer 772 and the conductive layer 774 causes the liquid The orientation of the crystal layer 776 can be controlled.

[0519] In FIG. 30, a holding container is formed by a laminated structure of a conductive layer 774, an insulating layer 773, and a conductive layer 772. Therefore, there is no need to provide a separate capacitance element, and the aperture ratio can be increased. Cut.

[0520] Although not shown in FIGS. 29 and 30, an alignment film in contact with the liquid crystal layer 776 may be provided. In addition, optical members (optical substrates) such as polarizing members, phase difference members, and anti-reflection members, Light sources such as backlights and sidelights can be provided as appropriate.

[0521] The liquid crystal layer 776 may include a thermotropic liquid crystal, a low molecular weight liquid crystal, a high molecular weight liquid crystal, a polymer dispersion liquid, or the like. Crystal (PDLC: Polymer Dispersed Liquid Crystal) , Polymer Network Liquid Crystal (PNLC) d Crystal), ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. When the in-plane switching system is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used.

[0522] The liquid crystal element mode is TN (Twisted Nematic) mode, VA (Ver tical Alignment mode, IPS (In-Plane-Switching ng) mode, FFS (Fringe Field Switching) mode, AS M(Axially Symmetric aligned Micro-cell) model OCB (Optically Compensated Birefringen) ce) mode, ECB (Electrically Controlled Biref You can use modes such as ringence mode and guest-host mode.

[0523] Scattering type using polymer dispersed liquid crystal or polymer network liquid crystal for liquid crystal layer 776 In this case, the colored layer 736 is not provided, and a black and white display is performed. Alternatively, a colored layer 736 may be used to perform color display.

[0524] A time division table that displays color based on the sequential additive color mixing method as a driving method for liquid crystal elements. A display method (also called a field sequential driving method) may be applied. The color layer 736 may not be provided. There is no need to provide sub-pixels that exhibit the respective colors R (red), G (green), and B (blue). This has the advantage of improving the pixel aperture ratio and increasing the definition.

[0525] The liquid crystal display device 700 shown in FIG. 30 is a display device using a horizontal electric field method (for example, FFS mode). An example using a child 775 is shown in FIG.

[0526] The display device 700 shown in FIG. 31 has a transistor between a first substrate 701 and a second substrate 705. The first substrate 701 and the second substrate 702 are connected to each other. The second substrate 705 is bonded to the first substrate 704 by a sealing layer 732 .

[0527] The liquid crystal element 767 includes a conductive layer 761, a liquid crystal layer 765, and a conductive layer 733. 733 is provided on the first substrate 701. One or more insulating layers are provided on the conductive layer 733. A conductive layer 761 is provided over the insulating layer. The conductive layer 733 is electrically connected to the wiring 764. The conductive layer 761 is electrically connected to the transistor 751 and serves as a common electrode. The wiring 764 functions as a pixel electrode. A common potential is applied to the wiring 764.

[0528] The liquid crystal element 767 shown in FIG. 31 is a liquid crystal element to which a horizontal electric field method (for example, an FFS mode) is applied. The conductive layer 761 has a comb-like shape or a slit-like shape on the top surface. The liquid crystal element 767 is caused to move in the liquid crystal layer 76 by an electric field generated between the conductive layer 761 and the conductive layer 733. The orientation state of 5 is controlled.

[0529] The conductive layer 761, the conductive layer 733, and one or more insulating layers sandwiched therebetween form a laminated structure. Therefore, a capacitor element 790 that functions as a storage capacitor is formed. Therefore, it is not necessary to provide a hole.

[0530] The conductive layer 761 and the conductive layer 733 are each made of a material that transmits or reflects visible light. Examples of the light-transmitting material include indium, zinc, tin, etc. The reflective material may include, for example, aluminum, silver, etc. It is a good idea to use materials.

[0531] A reflective material is used for either the conductive layer 761 or the conductive layer 733, or both. On the other hand, when the conductive layer 761 or the conductive layer 7 If a light-transmitting material is used for both the first and second electrodes 33, the display device 700 becomes a transmissive liquid crystal display device. In the case of a reflective liquid crystal display device, a polarizing plate is provided on the viewing side. In this case, a pair of polarizing plates is provided to sandwich the liquid crystal element.

[0532] 31 shows an example of a transmission type liquid crystal display device. , a polarizing plate 755, and a light source 757 are provided outside the second substrate 705. 6 is provided. A light source 757 functions as a backlight.

[0533] The second substrate 705 has a light-shielding layer 738 and a colored layer 736 on the surface facing the first substrate 701. The light-shielding layer 738 and the coloring layer 736 are covered with a layer that functions as a planarizing layer. An insulating layer 734 is provided. A spacer is provided on the surface of the insulating layer 734 on the first substrate 701 side. 727 is provided.

[0534] The liquid crystal layer 765 is made up of an alignment film 725 covering the conductive layer 761 and an alignment film 722 covering the insulating layer 734. 6. The alignment film 725 and the alignment film 726 may be omitted if they are not necessary. It's okay.

[0535] Although not shown in FIG. 31, a retardation film, an anti-reflection film, etc. may be provided on the outer side of the second substrate 705. Optical components such as films (optical films), protective films, antifouling films, etc. are provided as appropriate. Anti-reflection films are classified into AG (Anti Glare) film and AR (Anti-reflection) film. Anti Reflection film.

[0536] The liquid crystal layer 765 may include a thermotropic liquid crystal, a low molecular weight liquid crystal, a high molecular weight liquid crystal, a polymer dispersion liquid, or the like. Crystal (PDLC: Polymer Dispersed Liquid Crystal) , Polymer Network Liquid Crystal (PNLC) d Crystal), ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. When the in-plane switching system is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used.

[0537] The liquid crystal element mode is TN (Twisted Nematic) mode, VA (Ver tical Alignment mode, IPS (In-Plane-Switching ng) mode, FFS (Fringe Field Switching) mode, AS M(Axially Symmetric aligned Micro-cell) model OCB (Optically Compensated Birefringen) ce) mode, ECB (Electrically Controlled Biref You can use modes such as ringence mode and guest-host mode.

[0538] Scattering type using polymer dispersed liquid crystal or polymer network type liquid crystal for liquid crystal layer 765 In this case, the colored layer 736 is not provided, and a black and white display is performed. Alternatively, a colored layer 736 may be used to perform color display.

[0539] A time division table that displays color based on the sequential additive color mixing method as a driving method for liquid crystal elements. A display method (also called a field sequential driving method) may be applied. The color layer 736 may not be provided. There is no need to provide sub-pixels that exhibit the respective colors R (red), G (green), and B (blue). This has the advantage of improving the pixel aperture ratio and increasing the definition.

[0540] The display device 700 shown in FIG. 31 includes a conductive layer 761 that functions as a pixel electrode and a common electrode. An organic insulating film functioning as a planarizing layer must be provided on the surface on which the conductive layer 733 functioning as a planarizing layer is to be formed. The wiring 764 and the like can be formed without adding any special process steps using a transistor or a liquid crystal display. By using such a configuration, it can be manufactured using the same manufacturing process as that for the crystal element. A display device that can reduce manufacturing costs and increase manufacturing yield and has high reliability. can be provided at low cost.

[0541] [Display device using light-emitting elements] In the display device 700 shown in FIG. 32, a pixel portion 702 includes a transistor 750, a transistor The source driver circuit portion 704 includes a transistor 751 and a capacitor 790. It has a 752.

[0542] The transistors 750, 751, and 752 are the same as those in the first embodiment. The transistors shown as examples can be applied. For example, an OS transistor can be used as the transistor 751. It is preferable to use Si transistors for the transistors 750 and 752. .

[0543] The display device 700 includes a light-emitting element 782. The light-emitting element 782 includes a conductive layer 772, an EL The EL layer 786 includes an organic compound or a quantum dot. It has inorganic compounds such as

[0544] Materials that can be used for the organic compound include fluorescent materials and phosphorescent materials. In addition, colloidal quantum dot materials can be used as quantum dots. , alloy-type quantum dot materials, core-shell-type quantum dot materials, core-type quantum dot materials, etc. Examples include:

[0545] In the display device 700 shown in FIG. 32, a conductive layer 772 is formed on a planarization insulating film 770. An insulating film 730 is provided. Here, the light-emitting element 782 has a light-transmitting conductive film 788. The light-emitting element 782 emits light toward the conductive layer 772. a bottom emission structure in which light is emitted from the bottom of the conductive layer 772 and the conductive film 788; It may also be a dual emission structure.

[0546] The colored layer 736 is provided at a position overlapping the light emitting element 782, and the light blocking layer 738 is provided at a position overlapping the insulating film 730. and the source driver circuit portion 704. The light-emitting element 782 and the light-shielding layer 738 are covered with the insulating layer 734. The gap between the EL layers 786 is filled with a sealing layer 732. The EL layer 786 is formed in an island shape for each pixel or When the colored layers are formed in stripes for each row, that is, when the colored layers are formed by coloring, the colored layers 736 It is also possible to adopt a configuration in which this is not provided.

[0547] FIG. 33 shows the configuration of a display device that can be suitably applied to a flexible display. FIG. 33 is a cross-sectional view taken along dashed line ST in display device 700A shown in FIG. 28B. be.

[0548] A display device 700A shown in FIG. 33 includes a support substrate instead of the first substrate 701 shown in FIG. It has a structure in which a plate 745, an adhesive layer 742, a resin layer 743, and an insulating layer 744 are laminated. The transistor 750, the capacitor 790, and the like are formed on an insulating layer 744 provided on a resin layer 743. It is set up in.

[0549] The support substrate 745 is a substrate containing organic resin, glass, or the like, and is thin enough to be flexible. The resin layer 743 is a layer containing an organic resin such as polyimide or acrylic. The resin layer 74 includes an inorganic insulating film such as silicon oxide, silicon oxynitride, or silicon nitride. 3 and a support substrate 745 are bonded together by an adhesive layer 742. The resin layer 743 is It is preferably thinner than the support substrate 745 .

[0550] A display device 700A shown in FIG. 33 includes a protective insulating substrate instead of the second substrate 705 shown in FIG. The protective insulating layer 740 is attached to the sealing layer 732. The protective insulating layer 740 may be a glass substrate or a resin film. 40 may be an optical member such as a polarizing plate or a scattering plate, an input device such as a touch sensor panel, or Alternatively, a configuration in which two or more of these are stacked may be applied.

[0551] The EL layer 786 of the light-emitting element 782 is provided in an island shape over the insulating film 730 and the conductive layer 772. By creating the EL layer 786 so that each sub-pixel emits a different color, A color display can be realized without using the color layer 736. Also, the light emitting element 782 is covered with a protective insulating layer. The protective insulating layer 741 prevents impurities such as water from diffusing into the light emitting element 782. The protective insulating layer 741 preferably uses an inorganic insulating film. In addition, it may have a laminated structure including one or more inorganic insulating films and one or more organic insulating films. More preferable.

[0552] 33 shows a bendable region P2. In the region P2, a support substrate 745, In addition to the adhesive layer 742, there are also portions where no inorganic insulating film such as the insulating layer 744 is provided. In addition, in the region P2, a resin layer 746 is provided to cover the wiring 760. an inorganic insulating film is not provided as much as possible in the region P2 where the insulating film can be formed, and a conductive layer containing a metal or an alloy is provided; By using a laminated structure consisting only of layers containing organic materials, cracks are prevented from occurring when the material is bent. Furthermore, by not providing the support substrate 745 in the region P2, extremely small bending can be prevented. The radius of curvature allows a portion of the display device 700A to bend.

[0553] [Configuration example in which an input device is provided on a display device] An input device may be provided in the display devices shown in FIGS. For example, a touch sensor may be used.

[0554] For example, the sensor types are capacitance type, resistive film type, surface acoustic wave type, infrared type, optical type, Various methods can be used, such as optical and pressure sensitive methods, or a combination of two or more of these. They may also be used in combination.

[0555] The touch panel has a so-called in-cell structure in which the input device is formed between a pair of substrates. touch panel, an input device formed on a display device, a so-called on-cell type touch panel, or or a so-called out-cell type touch panel which is attached to a display device.

[0556] The configuration examples exemplified in this embodiment and the corresponding drawings etc. are at least partly This can be implemented in appropriate combination with other configuration examples or drawings, etc.

[0557] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0558] (Fourth embodiment) In this embodiment, a display device including a semiconductor device of one embodiment of the present invention will be described with reference to FIG. This will be used to explain.

[0559] The display device shown in FIG. 34A includes a pixel portion 502, a driver circuit portion 504, and a protection circuit 506. , and a terminal portion 507. Note that the protection circuit 506 may not be provided.

[0560] The transistors included in the pixel portion 502 and the driver circuit portion 504 are the transistors of one embodiment of the present invention. In addition, the protection circuit 506 can also be formed by using a transistor of one embodiment of the present invention. Good too.

[0561] The pixel section 502 is a plurality of pixels arranged in X rows and Y columns (X and Y are each independently a natural number of 2 or more). The display device has a plurality of pixel circuits 501 for driving a number of display elements.

[0562] The driving circuit unit 504 is a gate driver that outputs scanning signals to the gate lines GL_1 to GL_X. a source driver 504a that supplies data signals to the data lines DL_1 to DL_Y; The gate driver 504a includes a driver circuit such as a shift register The source driver 504b may be configured to have, for example, a plurality of analog switches. Also, the source driver 504 is configured using a shift register or the like. b may be configured.

[0563] The terminal unit 507 is used to input power, control signals, image signals, etc. from an external circuit to the display device. This refers to the part where terminals for connecting the power supply to the power source are provided.

[0564] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit 506 The protection circuit 506 shown in FIG. For example, the gate lines GL_1 to GL_G, which are wirings between the gate driver 504a and the pixel circuit 501, L_X, or the data line DL which is the wiring between the source driver 504b and the pixel circuit 501 It is connected to various wiring such as DL_1 to DL_Y.

[0565] The gate driver 504a and the source driver 504b are based on the same circuit as the pixel section 502. The gate driver circuit or the source driver circuit may be provided on the board. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor or a polycrystalline semiconductor) Mounted on the board using COG or TAB (Tape Automated Bonding) The configuration may be such that:

[0566] The plurality of pixel circuits 501 shown in FIG. 34A may have the configuration shown in FIGS. 34B and 34C, for example. It is possible.

[0567] The pixel circuit 501 shown in FIG. 34B includes a liquid crystal element 570, a transistor 550, and a capacitance element The pixel circuit 501 also includes a data line DL_n, a gate line GL_m, and a , potential supply line VL, etc. are connected to the terminals.

[0568] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 included in each of the pixel circuits 501. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 501 in each row. One of the electrodes may be given a different potential.

[0569] The pixel circuit 501 shown in FIG. 34C includes a transistor 552, a transistor 554, and a capacitor The pixel circuit 501 includes a data line DL_ n, gate line GL_m, potential supply line VL_a, potential supply line VL_b, etc. are connected.

[0570] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. The other terminal is supplied with a low power supply potential VSS. The current flowing through the light-emitting element 572 is controlled in accordance with the potential applied to the light-emitting element 572. The brightness of the light emitted from 72 is controlled.

[0571] The configuration examples exemplified in this embodiment and the corresponding drawings etc. are at least partly This can be implemented in appropriate combination with other configuration examples or drawings, etc.

[0572] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0573] (Embodiment 5) In the following, a pixel circuit having a memory for correcting the gradation displayed in the pixel and a The transistors exemplified in Embodiment 1 will be described below. The present invention can be applied to transistors used in pixel circuits.

[0574] <Circuit configuration> 35A shows a circuit diagram of the pixel circuit 400. The pixel circuit 400 includes a transistor M1, The pixel circuit 400 includes a transistor M2, a capacitor C1, and a circuit 401. S1, the wiring S2, the wiring G1, and the wiring G2 are connected.

[0575] The transistor M1 has a gate connected to a wiring G1, a source and a drain connected to a wiring S1, and The other of the source and drain is connected to one electrode of the capacitor C1. M2 has a gate connected to the wiring G2, one of the source and drain connected to the wiring S2, and one of the source and drain connected to the wiring S3. The other end of the input is connected to the other electrode of the capacitor C1 and the circuit 401, respectively.

[0576] The circuit 401 is a circuit including at least one display element. Representative examples include light-emitting elements such as organic EL elements and LED elements, and liquid crystal elements. MEMS (Micro Electro Mechanical Systems) ms) elements, etc. can be applied.

[0577] The node connecting the transistor M1 and the capacitor C1 is connected to the node N1, and the transistor M2 is connected to the node N2. The node connecting to the path 401 is node N2.

[0578] The pixel circuit 400 maintains the potential of the node N1 by turning off the transistor M1. In addition, by turning off the transistor M2, the potential of the node N2 can be maintained. In addition, when the transistor M2 is in the off state, the node By writing a predetermined potential to node N1, the voltage at node N1 is increased by capacitive coupling via capacitor C1. The potential of the node N2 can be changed in accordance with the change in potential.

[0579] Here, one or both of the transistors M1 and M2 may be The transistor using an oxide semiconductor, as exemplified in 1, can be used. The low off-state current allows the potentials of the nodes N1 and N2 to be maintained for a long period of time. When the period for which the potential of each node is held is short (specifically, when the frame frequency is 30 Hz or less), In the above cases, a transistor using a semiconductor such as silicon may be used.

[0580] <Driving method example> Next, an example of an operation method of the pixel circuit 400 will be described with reference to FIG. 1 is a timing chart relating to the operation of the pixel circuit 400. Therefore, various resistances such as wiring resistance, parasitic capacitance of transistors and wiring, and The influence of the threshold voltage of the transistor is not taken into consideration.

[0581] In the operation shown in Figure 35B, one frame period is divided into periods T1 and T2. Period T1 is a period during which a potential is written to the node N2, and period T2 is a period during which a potential is written to the node N1. is.

[0582] [Period T1] In the period T1, a potential that turns on the transistor is applied to both the wiring G1 and the wiring G2. In addition, the wiring S1 is connected to a fixed potential V ref The first data is supplied to the wiring S2. Voltage V w supply.

[0583] The node N1 is connected to the line S1 via the transistor M1. ref is given. The node N2 is supplied with a first data potential V w is given Therefore, the potential difference V w -V ref is maintained.

[0584] [Period T2] Subsequently, in a period T2, a potential that turns on the transistor M1 is applied to the wiring G1. A potential that turns off the transistor M2 is applied to the line G2. Data potential V data A predetermined constant potential is applied to the wiring S2, or a floating potential is applied to the wiring S3. It may be in a locking state.

[0585] The node N1 receives a second data potential V data but At this time, the second data potential V data In response In other words, the circuit 401 stores the first data Potential V w The potential obtained by adding the potential dV to the potential dV is input. Although the second data potential is shown as being a positive value, it may also be a negative value. V data is the potential V ref It may be lower.

[0586] Here, the potential dV is roughly determined by the capacitance value of the capacitor C1 and the capacitance value of the circuit 401. When the capacitance value of the capacitor C1 is sufficiently larger than the capacitance value of the circuit 401, the potential dV is Data potential V data The potential is close to

[0587] In this way, the pixel circuit 400 is a circuit including a display element that combines two types of data signals. Since the potential to be supplied to the circuit 401 can be generated, the gradation can be corrected within the pixel circuit 400. It becomes possible.

[0588] The pixel circuit 400 generates a potential that exceeds the maximum potential that can be supplied to the wiring S1 and the wiring S2. For example, when light-emitting elements are used, it is possible to achieve high dynamic range (HD) In addition, when a liquid crystal element is used, overdrive It is possible to realize movements such as

[0589] <Application example> [Example using liquid crystal element] The pixel circuit 400LC shown in Figure 35C includes a circuit 401LC. It has a liquid crystal element LC and a capacitor C2.

[0590] The liquid crystal element LC has one electrode connected to the other electrode of the capacitor C1, the source of the transistor M2, and The other electrode of the drain is connected to one electrode of the capacitor C2, and the other electrode is connected to the potential V co m2 The capacitor C2 is connected to the wiring where the other electrode is at potential V com1 is given Connect it to the wiring.

[0591] The capacitor C2 functions as a storage capacitor. Note that the capacitor C2 can be omitted if not required.

[0592] The pixel circuit 400LC can supply a high voltage to the liquid crystal element LC, so that, for example, By realizing high-speed display through live driving and applying liquid crystal materials with high driving voltage, In addition, by supplying a correction signal to the wire S1 or wire S2, it is possible to adjust the operating temperature and liquid temperature. The gradation can also be corrected depending on the deterioration state of the liquid crystal element LC.

[0593] [Example using light-emitting element] The pixel circuit 400EL shown in Figure 35D includes a circuit 401EL. The device includes a light-emitting element EL, a transistor M3, and a capacitor C2.

[0594] The transistor M3 has a gate connected to one electrode of the capacitor C2 and a source and a drain connected to one of the electrodes. Potential V H The other end is connected to one electrode of the light-emitting element EL. The capacitance C2 is the capacitance when the other electrode is at potential V com The light-emitting element EL is connected to a wiring that is given a , the other electrode is at potential V L Connect with the wiring given.

[0595] The transistor M3 has a function of controlling the current supplied to the light-emitting element EL. functions as a storage capacitor. Capacitor C2 can be omitted if not required.

[0596] In this example, the anode side of the light-emitting element EL is connected to the transistor M3. However, a transistor M3 may be connected to the cathode side. H and potential V L You can change the value accordingly.

[0597] The pixel circuit 400EL generates a light-emitting element by applying a high potential to the gate of the transistor M3. Since a large current can be passed through the child EL, for example, HDR display can be realized. , by supplying a correction signal to the wiring S1 or the wiring S2, the transistor M3 and the light-emitting element E It is also possible to correct for variations in the electrical characteristics of L.

[0598] The circuit is not limited to the circuits illustrated in FIGS. 35C and 35D, and may include additional transistors, capacitors, etc. may be added.

[0599] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0600] (Sixth embodiment) In this embodiment, a display module that can be manufactured using one embodiment of the present invention will be described. do.

[0601] The display module 6000 shown in FIG. 36A includes an upper cover 6001 and a lower cover 6002. Between them, a display device 6006 connected to an FPC 6005, a frame 6009, a printed circuit board It has a board 6010 and a battery 6011.

[0602] For example, a display device manufactured according to one embodiment of the present invention can be used as the display device 6006. The display device 6006 can realize a display module with extremely low power consumption. do.

[0603] The upper cover 6001 and the lower cover 6002 are designed to fit the size of the display device 6006. The shape and dimensions can be changed as appropriate.

[0604] The display device 6006 may have a function as a touch panel.

[0605] The frame 6009 has a function of protecting the display device 6006 and a function of preventing the display device 6006 from being damaged by the operation of the printed circuit board 6010. The insulating film may have a function of blocking electromagnetic waves generated by the insulating film, a function as a heat sink, etc.

[0606] The printed circuit board 6010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. It has a signal processing circuit, a battery control circuit, etc.

[0607] FIG. 36B is a schematic cross-sectional view of a display module 6000 equipped with an optical touch sensor. do.

[0608] The display module 6000 includes a light emitting section 6015 and a receiving section 6016 provided on a printed circuit board 6010. The optical unit 6016 is enclosed by an upper cover 6001 and a lower cover 6002. The region has a pair of light guide portions (light guide portion 6017a, light guide portion 6017b).

[0609] The display device 6006 is connected to a printed circuit board 6010 and a battery via a frame 6009. The display device 6006 and the frame 6009 are provided so as to overlap with the light guide unit 6011. 017a and fixed to the light guiding portion 6017b.

[0610] Light 6018 emitted from the light emitting unit 6015 is guided to the display device 600 by the light guiding unit 6017a. 6, and reaches the light receiving part 6016 through the light guiding part 6017b. When the light 6018 is blocked by a detection object such as an illustration, the touch operation can be detected. do.

[0611] A plurality of light emitting sections 6015 are provided along two adjacent sides of the display device 6006, for example. A plurality of light receiving sections 6016 are provided at positions facing the light emitting sections 6015. Information on the location where the touch operation was performed can be obtained.

[0612] The light emitting unit 6015 can use a light source such as an LED element, and in particular, can emit infrared light. The light receiving unit 6016 receives the light emitted by the light emitting unit 6015. A photoelectric element that receives light and converts it into an electrical signal can be used. A photodiode such as a photodiode can be used.

[0613] The light emitting section 6015 and the light guiding section 6017a and the light guiding section 6017b transmit light 6018. The light receiving unit 6016 can be disposed below the display device 6006, and external light is received by the light receiving unit 601. 6 and prevent the touch sensor from malfunctioning. Using a resin that allows wires to pass through can more effectively prevent malfunctions of the touch sensor.

[0614] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0615] (Embodiment 7) In this embodiment, examples of electronic devices to which the display device of one embodiment of the present invention can be applied will be described. Reveal.

[0616] The electronic device 6500 shown in FIG. 37A is a portable information device that can be used as a smartphone. It is a news terminal.

[0617] The electronic device 6500 includes a housing 6501, a display unit 6502, a power button 6503, a button 6504, and a 504, a speaker 6505, a microphone 6506, a camera 6507, and a light source 6508. The display unit 6502 has a touch panel function.

[0618] The display device of one embodiment of the present invention can be applied to the display portion 6502.

[0619] FIG. 37B is a schematic cross-sectional view including the end of the housing 6501 on the microphone 6506 side.

[0620] A light-transmitting protective member 6510 is provided on the display surface side of the housing 6501. The space surrounded by the protective member 6510 is provided with a display panel 6511, an optical member 6512, a tab The touch sensor panel 6513, printed circuit board 6517, battery 6518, etc. are arranged. There are.

[0621] The protective member 6510 includes a display panel 6511, an optical member 6512, and a touch sensor panel. The flannel 6513 is fixed by an adhesive layer (not shown).

[0622] In the area outside the display portion 6502, a part of the display panel 6511 is folded back. In addition, FPC6515 is connected to the folded part. FPC651 5 is mounted with IC6516. FPC6515 is mounted with printed circuit board 6517. The power supply is connected to a terminal provided on the power supply.

[0623] The flexible display panel of one embodiment of the present invention can be applied to the display panel 6511. Therefore, an extremely lightweight electronic device can be realized. Because it is thin, it can be equipped with a large-capacity battery 6518 while keeping the thickness of the electronic device small. In addition, a part of the display panel 6511 is folded back and the FPC 6515 is attached to the back of the pixel area. By arranging the connection portion, an electronic device with a narrow frame can be realized.

[0624] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0625] (Embodiment 8) In this embodiment, electronic devices including a display device manufactured using one embodiment of the present invention will be described. and explain.

[0626] The electronic devices exemplified below include a display device according to one embodiment of the present invention in a display portion. Therefore, it is an electronic device that has achieved high resolution. Also, high resolution and a large screen It is possible to make an electronic device that is compatible with both.

[0627] The display unit of the electronic device according to one embodiment of the present invention may be configured to display, for example, full high-definition, 4K2K, 8K4 It can display images with resolutions of 16K, 16K, 8K, or higher.

[0628] Examples of electronic devices include television sets, notebook personal computers, Equipped with relatively large screens such as monitors, digital signage, pachinko machines, and game machines In addition to electronic devices, digital cameras, digital video cameras, digital photo frames, mobile phones Examples include telephones, portable game machines, personal digital assistants, and sound reproducing devices.

[0629] An electronic device to which one aspect of the present invention is applied may be installed on the interior or exterior walls of a house or building, or the interior of a car or the like. It can be incorporated along a flat or curved surface of the packaging or exterior.

[0630] FIG. 38A is a diagram showing the appearance of the camera 8000 with the viewfinder 8100 attached. is.

[0631] The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, and a shutter. The camera 8000 has a button 8004 and the like. The camera 8000 also has a detachable lens 8006. It is attached.

[0632] The camera 8000 may have the lens 8006 and the housing integrated together.

[0633] The camera 8000 can be operated by pressing the shutter button 8004 or by using the touch panel. An image can be captured by touching the display unit 8002.

[0634] The housing 8001 has a mount with electrodes, and is equipped with a finder 8100 and a strobe. It is possible to connect devices such as

[0635] The finder 8100 includes a housing 8101, a display unit 8102, buttons 8103, etc. .

[0636] The housing 8101 is configured to mount the camera 8000 by a mount that engages with the mount of the camera 8000. The finder 8100 is attached to the camera 8000. It can be displayed on the display unit 8102.

[0637] The button 8103 has a function such as a power button.

[0638] The display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100 are The display device according to one embodiment of the present invention can be applied to a camera 8000 having a built-in finder. may be.

[0639] FIG. 38B is a diagram showing the appearance of the head mounted display 8200.

[0640] The head-mounted display 8200 includes a mounting part 8201, a lens 8202, and a main body 82 8203, a display unit 8204, a cable 8205, etc. It has a built-in 8206 battery.

[0641] A cable 8205 supplies power from a battery 8206 to the main body 8203. 203 is equipped with a wireless receiver and the like, and can display received video information on a display unit 8204. The main body 8203 is also equipped with a camera, and can input information on the movements of the user's eyes and eyelids. It can be used as a step.

[0642] The attachment part 8201 has a position where it touches the user, and a current flows in accordance with the movement of the user's eyeball. A plurality of electrodes capable of detecting the line of sight may be provided, and the device may have a function of recognizing the line of sight. The device may have a function of monitoring the pulse of the user by the current flowing through the electrodes. The mounting part 8201 has various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor. The display unit 8204 may have a function to display the user's biological information, and the display unit 8204 may have a function to detect the movement of the user's head. In addition, the display unit 8204 may have a function of changing the image displayed thereon.

[0643] The display device of one embodiment of the present invention can be applied to the display portion 8204.

[0644] 38C, 38D, and 38E show the appearance of the head mounted display 8300. The head-mounted display 8300 includes a housing 8301 and a display unit 8302. , a band-shaped fixture 8304, and a pair of lenses 8305.

[0645] The user can view the display on the display unit 8302 through the lens 8305. The curved arrangement of the portion 8302 is preferred because it allows the user to feel a high sense of realism. In addition, different images displayed in different areas of the display unit 8302 can be projected through the lens 8305. By viewing the image from the display unit 83, it is possible to perform a three-dimensional display using parallax. The present invention is not limited to a configuration in which one display unit 8302 is provided, but two display units 8302 may be provided, one for each eye of the user. One display unit may be provided.

[0646] Note that the display device of one embodiment of the present invention can be applied to the display portion 8302. Since the display device having the semiconductor device has extremely high definition, the lens 83 as shown in FIG. Even when enlarged using 05, the pixels are not visible to the user, providing a more realistic image. You can display the video.

[0647] The electronic device shown in FIGS. 39A to 39G includes a housing 9000, a display unit 9001, a speaker 9002, and a 003, operation keys 9005 (including a power switch or an operation switch), connection terminal 900 6. Sensor 9007 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, Magnetic, temperature, chemical, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity (including functions to measure degree, gradient, vibration, smell or infrared), microphone 900 8, etc.

[0648] The electronic devices shown in FIGS. 39A to 39G have various functions. For example, Still images, videos, text images, etc.) on the display, touch panel function, calendar Functions that display date, time, etc., and various software (programs) Functions for controlling processing, wireless communication functions, programs or data recorded on recording media The functions of the electronic device are not limited to these. The electronic device may have multiple display units. It is also possible to provide a camera or the like in the electronic device to take still images or videos and store them on a recording medium (external or It has functions such as saving the captured image to a memory card (built into the camera) and displaying the captured image on the display. Good too.

[0649] The electronic devices shown in FIGS. 39A to 39G will be described in detail below.

[0650] 39A is a perspective view showing a television device 9100. 0 is equipped with a display unit 9001 having a large screen, for example, 50 inches or more, or 100 inches or more. It is possible to incorporate this.

[0651] FIG. 39B is a perspective view showing a mobile information terminal 9101. The mobile information terminal 9101 is, for example, For example, the portable information terminal 9101 can be used as a smartphone. A connector 9003, a connection terminal 9006, a sensor 9007, etc. may also be provided. The 9101 can display text and image information on its multiple sides. In Figure 39B, three icons 9050 is displayed on the display unit 90. 01. Examples of information 9051 include email, SNS, etc. , notifications of incoming calls, etc., subject of emails and SNS, sender name, date and time, time, The remaining battery level, antenna reception strength, etc. Or, information 9051 is displayed. An icon 9050 or the like may be displayed at the position.

[0652] FIG. 39C is a perspective view showing a mobile information terminal 9102. The mobile information terminal 9102 has a display. The display unit 9001 has a function of displaying information on three or more surfaces. 9053 and information 9054 are displayed on different surfaces. , with the mobile information terminal 9102 stored in the breast pocket of the clothes, The user can also check the information 9053 displayed in a position that can be observed from above. The display can be checked without taking the mobile information terminal 9102 out of the pocket, and for example, a call can be answered. It is possible to determine whether or not

[0653] 39D is a perspective view showing a wristwatch-type mobile information terminal 9200. 00 can be used as, for example, a smart watch (registered trademark). The display surface of the display device 9001 is curved, and the display can be performed along the curved display surface. In addition, the mobile information terminal 9200 can communicate with, for example, a headset capable of wireless communication. By doing so, hands-free conversati...

Claims

1. a first semiconductor layer, a second semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, and a fifth insulating layer; the first semiconductor layer comprises a metal oxide; the second semiconductor layer comprises crystalline silicon; the fourth conductive layer and the second semiconductor layer have a region where they overlap with each other via the fifth insulating layer, the second conductive layer and the second semiconductor layer have a region where they overlap with each other via the fourth insulating layer, the first insulating layer is located on the second semiconductor layer, on the second conductive layer, and on the fourth insulating layer; the second insulating layer is located on the first insulating layer; the first semiconductor layer is located on the second insulating layer; the third conductive layer and the first semiconductor layer have a region where they overlap with each other with the first insulating layer and the second insulating layer interposed therebetween; the first conductive layer and the first semiconductor layer have a region where they overlap with each other via the third insulating layer; The second insulating layer contains nitrogen and has a function of blocking impurities.

2. a first semiconductor layer, a second semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, a second insulating layer, a third insulating layer, and a fourth insulating layer; the first semiconductor layer comprises a metal oxide; the second semiconductor layer comprises crystalline silicon; the second conductive layer and the second semiconductor layer have a region where they overlap with each other via the fourth insulating layer, the first insulating layer is located on the second semiconductor layer, on the second conductive layer, and on the fourth insulating layer; the second insulating layer is located on the first insulating layer; the first semiconductor layer is located on the second insulating layer; the third conductive layer and the first semiconductor layer have a region where they overlap with each other with the first insulating layer and the second insulating layer interposed therebetween; the first conductive layer and the first semiconductor layer have a region where they overlap with each other via the third insulating layer; The second insulating layer contains nitrogen and has a function of blocking impurities.

3. a first semiconductor layer, a second semiconductor layer, a first conductive layer, a second conductive layer, a first insulating layer, a second insulating layer, a third insulating layer, and a fourth insulating layer; the first semiconductor layer comprises a metal oxide; the second semiconductor layer comprises crystalline silicon; the second conductive layer and the second semiconductor layer have a region where they overlap with each other via the fourth insulating layer, the first insulating layer is located on the second semiconductor layer, on the second conductive layer, and on the fourth insulating layer; the second insulating layer is located on the first insulating layer; the first semiconductor layer is located on the second insulating layer; the first conductive layer and the first semiconductor layer have a region where they overlap with each other via the third insulating layer; The second insulating layer contains nitrogen and has a function of blocking impurities.

4. In any one of claims 1 to 3, The semiconductor device, wherein the first semiconductor layer contains indium and oxygen.

Images