SiGe SUBSTRATE MANUFACTURING METHOD
By initiating SiGe layer growth on silicon substrates at temperatures below the transition point of the silicon surface structure and raising the temperature during growth, the method stabilizes the structure, reducing defect density and producing high-quality SiGe substrates.
Patent Information
- Application Number
- JP2024067505
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-04-18
- Publication Date
- 2025-10-30
AI Technical Summary
Existing methods for growing SiGe substrates on silicon substrates fail to consider the stable structure of the silicon outermost surface, leading to crystallinity issues due to structural transitions during film formation, despite the use of buffer structures.
Initiate SiGe layer growth at a temperature above room temperature but below the lowest transition temperature of the silicon substrate's most stable structure, and then raise the temperature during growth to stabilize the structure.
This method reduces surface defect density by two orders of magnitude, enabling the production of high-quality SiGe substrates with a high-quality SiGe layer on silicon substrates.
Smart Images

Figure 2025163888000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a method for producing a SiGe substrate. [Background technology]
[0002] SiGe is a material that is widely used in various devices, including electronic, optical, and RF devices. Recently, instead of the fin structure currently used in logic ICs, GAA (Gate All Around) and CFET (Complementary Field Effect Transistor), which stacks NMOS and CMOS, have been proposed for next-generation semiconductors, and SiGe plays an important role in the manufacturing process of these devices (Non-Patent Document 1). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-329664 [Patent Document 2] Special Publication No. 2008-513979 [Patent Document 3] Special Publication No. 2004-531889 [Non-patent literature]
[0004] [Non-Patent Document 1] The 1st Workshop of the Industry-Academia Collaboration Committee on Crystal Growth, Processing, and Evaluation of Semiconductors of the Japan Society of Applied Physics: "Crystal Technology Supporting the Revival of Semiconductors" [Non-patent document 2] Yonenaga, "Growth of high-quality SiGe crystals and elucidation of their fundamental properties," Material, 47(1), 3(2008) [Non-patent document 3] Sato, "Fundamentals and Challenges of Heteroepitaxy: 1st Workshop on 3C-SiC Technology for IoT in Harsh Environments" (2019) [Non-patent document 4] Wong, LH “Strain relaxation in SiGe / Si heteroepitaxy.” Doctoral thesis, Nanyang Technological University, Singapore, (2007). [Non-patent document 5] EAFitgerald, et.al., “Totally relaxed GexSi1-x layers with low threading dislocation densities grows on Si substrares”, App. Phys. Lett., 59, 811 (1991). [Non-patent document 6] FKLeGeues, et.al., “Mechanism and conditions for anomalous strain relaxation in graded thin films and superlattices”, App.Phys.Lett., 71, 4230 (1992). [Non-Patent Document 7] T.Taniguchi,et.al.,Abst.of SAP Spring Meeting.,17a-F102-9(2018). [Non-patent document 8] T.Taniguchi,et.al.,Abst.of JSAP Autumn Meeting.,20p-234-10(2018). [Non-Patent Document 9] Ueba, "Fundamentals of epitaxial growth - strain, diffusion, and step motion -", Journal of the Japanese Society for Crystal Growth, 43(4), 213(2016) Summary of the Invention [Problem to be solved by the invention]
[0005] However, in the equilibrium phase diagram, the liquidus and solidus of SiGe are far apart, and the distribution coefficient is 2 to 5, which is greater than 1, making it known that it is prone to polycrystallization. Even if single crystals can be grown, the growth rate is slow and it is difficult to grow them consistently (Non-Patent Document 2).
[0006] Therefore, for semiconductor devices, SiGe is grown on Si substrates, sometimes referred to as virtual SiGe substrates. In this SiGe growth (heteroepitaxial), the key issue is how to mitigate the difference in lattice constants between Si and Ge. The lattice constant of Si crystals is 0.5431 nm, while that of Ge crystals is 0.56754 nm, resulting in a difference of approximately 4.5%. To mitigate this difference in lattice constants, SiGe uses a SiGe alloy. If the Ge composition ratio is x, the lattice constant of the SiGe alloy is 0.5431 nm + x × 0.02 nm + x squared × 0.0027 nm. For example, if x is 0.3, the lattice constant is 0.5493 nm, resulting in a minimal lattice mismatch of 0.14%. This lattice mismatch can cause dislocations and defects to develop in the subsequently grown epitaxial layer, resulting in degradation of quality. However, it is believed that there is a critical thickness, and even if there is lattice mismatch, defects will not occur unless the critical thickness is exceeded (Non-Patent Document 3).
[0007] Therefore, various intermediate layers have been proposed that utilize this critical thickness to form a buffer layer. For example, there is a method in which the Ge concentration is varied from the silicon substrate to a SiGe layer with a predetermined Ge concentration, which is called a graded buffer layer (Non-Patent Documents 4, 5, 6). Another method has been proposed, which involves stacking multiple layers with thicknesses below the critical thickness, called a superlattice buffer layer (Non-Patent Documents 6, 7, 8).
[0008] In addition to these techniques, various techniques have been disclosed for growing a SiGe layer epitaxially on a silicon substrate. Patent Document 1 discloses a method for growing a SiGe layer epitaxially on a wafer in a perfect region that is free of vacancy-type point defects and interstitial Si-type point defects.
[0009] Patent Document 2 discloses a method for growing Si-Ge materials on Si(100), using a new hydride with direct Si-Ge bonds to grow uniform, relayed, highly planar films with low defect densities at low temperatures of approximately 300-450°C, completely eliminating the need for thick, compositionally graded buffer layers and lift-off techniques. At temperatures of approximately 500-700°C, a method for producing Si-Ge materials is disclosed, allowing precise control of morphology, composition, structure, and strain by growing SiGe quantum dots with narrow diameter distribution, defect-free microstructures, and highly uniform elemental content at the atomic level.
[0010] Patent Document 3 discloses a manufacturing method in which an initial layer of germanium is formed on a silicon substrate, rounded SK ridges are formed due to lattice mismatch, silicon dioxide is formed between the ridges by oxidation, and the peaks of the ridges are exposed by a subsequent reduction step, which are almost completely released and free of strain, and these peaks become nucleation sites for the subsequent growth of a final layer of germanium, which is formed as single crystals extending from the nucleation sites.
[0011] Although various methods have been investigated, none of them take into consideration the stable structure of the silicon outermost surface. It is known that the most stable structure and its temperature range for the silicon outermost surface differ depending on the plane orientation (Non-Patent Document 9). In other words, if film formation is initiated at a temperature higher than the temperature range in which the most stable structure is formed, when the substrate surface passes through the transition temperature during subsequent cooling, the structure will transition to the most stable structure, causing disturbances in the crystallinity, and no improvement in crystallinity can be expected no matter how many buffer structures or other measures are used.
[0012] The present invention has been made to solve the above problems, and has an object to provide a method for producing a high-quality SiGe substrate in which a high-quality SiGe layer is formed on a silicon substrate. [Means for solving the problem]
[0013] The present invention has been made to achieve the above-mentioned object, and provides a method for producing a SiGe substrate by growing a SiGe layer on a silicon substrate, characterized in that growth of the SiGe layer is initiated at a temperature above room temperature and below the lowest transition temperature of the most stable structure of the silicon substrate surface, depending on the crystal plane orientation of the surface of the silicon substrate, and the temperature is raised to a temperature higher than the lowest transition temperature during growth to grow the SiGe layer.
[0014] According to this method for producing a SiGe substrate, a high-quality SiGe substrate can be produced in which a high-quality SiGe layer is formed on a silicon substrate.
[0015] In this case, the crystal plane orientation of the surface of the silicon substrate can be {110}.
[0016] This makes it possible to fabricate a high-quality SiGe substrate in which a high-quality SiGe layer is formed on a silicon substrate with a surface crystal plane orientation of {110}.
[0017] In this case, the growth of the SiGe layer can be started at a temperature of 540° C. or lower.
[0018] This makes it possible to more stably fabricate a high-quality SiGe substrate in which a good-quality SiGe layer is formed on a silicon {110} substrate.
[0019] In this case, the growth of the SiGe layer can be started at a temperature of 510° C. or lower.
[0020] This makes it possible to more stably fabricate a high-quality SiGe substrate in which a good-quality SiGe layer is formed on a silicon {110} substrate. [Effects of the Invention]
[0021] As described above, according to the method for producing a SiGe substrate of the present invention, it is possible to produce a high-quality SiGe substrate in which a high-quality SiGe layer is formed on a silicon substrate. [Brief explanation of the drawings]
[0022] [Figure 1] FIG. 1 is a schematic diagram showing the relationship between the surface temperature of a silicon (110) substrate and the most stable surface structure. [Figure 2] 1 is a schematic diagram of a SiGe substrate obtained by a method for producing a SiGe substrate according to the present invention; DETAILED DESCRIPTION OF THE INVENTION
[0023] The present invention will be described in detail below, but the present invention is not limited thereto.
[0024] As described above, there has been a demand for a method for producing a high-quality SiGe substrate in which a high-quality SiGe layer is formed on a silicon substrate.
[0025] As a result of extensive research into the above-mentioned problems, the inventors have found that a high-quality SiGe substrate having a good-quality SiGe layer formed on a silicon substrate can be produced by a method for producing a SiGe substrate by growing a SiGe layer on a silicon substrate, the method comprising starting growth of the SiGe layer at a temperature above room temperature and below the lowest transition temperature of the most stable structure of the surface of the silicon substrate, depending on the crystal plane orientation of the surface of the silicon substrate, and raising the temperature to a temperature higher than the lowest transition temperature during growth to grow the SiGe layer, and have completed the present invention.
[0026] 2 is a schematic diagram of a SiGe substrate obtained by the SiGe substrate manufacturing method according to the present invention. A SiGe substrate 1 in which a SiGe layer 3 is formed on a silicon single crystal substrate 2 is sometimes called a virtual SiGe substrate. The composition of the SiGe layer 3 is not particularly limited, but the Ge content can be 10 to 35 atomic %.
[0027] The low-index faces of silicon (100), (110), and (111) each have a surface structure transition temperature. Si(100) does not undergo a surface phase transition at temperatures above room temperature, but Si(110) changes from a 16x2 structure to a more complex structure such as 17x2 at 540°C, as shown in Figure 1. Furthermore, Si(111) changes from a 7x7 structure to a 1x1 structure at 860°C (Non-Patent Document 9).
[0028] In other words, for a surface orientation other than Si(100), film formation (growth) is initiated at a temperature below the lowest transition temperature of this stable structure, and the temperature is raised to a temperature higher than the lowest transition temperature during growth. When the temperature is returned to room temperature after film formation, the interface distortion due to the structural change disappears. By growing the film across the transition temperature in this way, it is possible to reduce the surface defect density by about two orders of magnitude.
[0029] When a CVD apparatus is used, the growth temperature of SiGe is often in the range of 600°C to 700°C. Si(100) has a low transition temperature, and the transition temperature of Si(111) is 860°C, which is higher than the growth temperature range. However, as mentioned above, the transition occurs in Si(110) at 540°C. Therefore, a silicon substrate with a {110} crystal plane orientation on the surface can be suitably applied to the SiGe substrate fabrication method according to the present invention.
[0030] The starting temperature for growing the SiGe layer is set lower than the temperature (540°C) at which the most stable structure of the substrate surface with a Si{110} orientation is achieved, and while growing the SiGe film, the temperature is raised to a temperature higher than the transition temperature. After growth is complete, the temperature is returned to room temperature, and there is no distortion at the interface due to the structural change. Therefore, a high-quality SiGe substrate can be produced in which a high-quality SiGe layer is formed on a silicon substrate with a surface crystal plane orientation of {110}.
[0031] In the present invention, a plane orientation of {110} includes a plane equivalent to (110) and also includes a plane having an off-angle of 1 degree or less from the {110} plane (just plane).
[0032] In this case, the growth of the SiGe layer can be started at a temperature of 540° C. or lower. This makes it possible to more stably fabricate a high-quality SiGe substrate in which a good-quality SiGe layer is formed on a silicon {110} substrate.
[0033] The growth start temperature should be lower than the transition temperature, but it is preferable to start film formation at a temperature 30° C. lower than the transition temperature, since there is naturally some variability in the transition phenomenon.
[0034] That is, in the case of a silicon substrate with a surface crystal plane orientation of {110}, it is preferable to start the growth of the SiGe layer at a temperature of 510° C. or less. This makes it possible to more stably fabricate a high-quality SiGe substrate in which a good-quality SiGe layer is formed on a silicon {110} substrate.
[0035] In one embodiment, SiH2Cl2 and GeH4, which are gases required for SiGe growth, are introduced into the reactor from a temperature of 510°C or less, and the temperature is raised while introducing the gases until the growth temperature reaches around 600°C, at which point growth can be carried out.
[0036] There are no particular restrictions on the rate of temperature rise, but it can be set within the range that allows for sufficient temperature control in a typical growth device. If the temperature rises too rapidly, the temperature will overshoot when it reaches the specified growth temperature. Generally, the rate is between 1°C / sec and 0.1°C / sec. [Example]
[0037] The present invention will be specifically explained below with reference to examples, but the present invention is not limited to these examples.
[0038] (Example) A boron-doped single-crystal silicon substrate with a surface crystal orientation of (110), a diameter of 300 mm, and a resistivity of 10 Ω·cm was prepared and placed in a reactor for epitaxial growth.
[0039] SiH2Cl2 gas and GeH4 gas were used as raw materials, and were introduced into an epitaxial growth reactor evacuated to 1333 Pa (10 Torr) at 1000 sccm each. When forming a film on a silicon substrate, the growth temperature (substrate temperature) was raised from 510°C to 610°C at 0.5°C / sec while flowing the above gases, and then held at 610°C for 60 minutes to grow a SiGe layer (Ge concentration = 30 atomic %), producing a SiGe substrate.
[0040] The SiGe substrate was cooled to room temperature, and the surface was etched with a fluorine-nitric acid mixture. The defect density on the surface was evaluated using an optical microscope. The defect density was 1×10 5 / cm 2 It was.
[0041] (Comparative Example) The SiGe layer was formed under the same conditions as in the example, except that the growth gas was introduced into the epitaxial growth reactor at 610° C. to start growth.
[0042] The SiGe substrate was cooled to room temperature, and the surface was etched with a fluorine-nitric acid mixture. The defect density on the surface was evaluated using an optical microscope. The defect density was 1×10 7 / cm 2 It was.
[0043] As described above, according to the examples of the present invention, it was possible to form a SiGe layer on a silicon substrate, the surface defect density of which was two orders of magnitude lower than that of the comparative example.
[0044] The present specification includes the following aspects. [1]: A method for producing a SiGe substrate by growing a SiGe layer on a silicon substrate, the method comprising: starting growth of the SiGe layer at a temperature above room temperature and below the lowest transition temperature of the most stable structure of the silicon substrate surface, depending on the crystal plane orientation of the surface of the silicon substrate; and, during the growth, increasing the temperature to a temperature higher than the lowest transition temperature to continue growing the SiGe layer. [2]: The method for producing a SiGe substrate according to [1] above, which comprises orienting the crystal plane of the surface of the silicon substrate in {110}. [3]: The method for producing a SiGe substrate according to [1] or [2] above, which comprises starting the growth of the SiGe layer at a temperature of 540° C. or lower. [4]: The method for producing a SiGe substrate according to [1], [2] or [3] above, which comprises starting the growth of the SiGe layer at a temperature of 510° C. or less.
[0045] The present invention is not limited to the above-described embodiments. The above-described embodiments are merely examples, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits similar effects is included within the technical scope of the present invention. [Explanation of symbols]
[0046] 1...SiGe substrate (virtual SiGe substrate), 2...silicon single crystal substrate, 3...SiGe layer.
Claims
1. A method for producing a SiGe substrate by growing a SiGe layer on a silicon substrate, the method comprising the steps of: starting growth of the SiGe layer at a temperature above room temperature and below the lowest transition temperature of the most stable structure of the silicon substrate surface, depending on the crystal plane orientation of the surface of the silicon substrate; and raising the temperature during growth to a temperature higher than the lowest transition temperature to grow the SiGe layer.
2. 2. The method for producing a SiGe substrate according to claim 1, wherein the crystal plane orientation of the surface of said silicon substrate is {110}.
3. 3. The method for producing a SiGe substrate according to claim 2, wherein the growth of the SiGe layer is started at a temperature of 540[deg.] C. or lower.
4. 4. The method for producing a SiGe substrate according to claim 2, wherein the growth of the SiGe layer is started at a temperature of 510[deg.] C. or lower.
Citation Information
Patent Citations
Method for forming silicon / Germanium layer, method for forming distorted si layer using the same, method for manufacturing field-effect transistor, semiconductor wafer, si wafer using the same and field-effect transistor
JP2002329664A
Method for forming a germanium layer
JP2004531889A
Methods of growing si-ge semiconductor materials and devices on substrates
JP2008513979A