Photoelectric conversion device and apparatus

Abstract

To provide a technique advantageous for improving redundancy of a photoelectric conversion device.SOLUTION: A photoelectric conversion device comprises: first and second signal lines for reading signals from a pixel array; first to fourth reading circuits; and a switching circuit that switches connection between the first and second signal lines and the first to fourth reading circuits. The first reading circuit can output signals based on signals supplied to the first reading circuit and the second reading circuit. The third reading circuit can output signals based on signals supplied to the third reading circuit and the fourth reading circuit. The switching circuit can switch settings between first settings for connecting the first signal line to the first reading circuit and connecting the second signal line to the second reading circuit, and second settings for connecting the first signal line to the third reading circuit and connecting the second signal line to the fourth reading circuit.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a photoelectric conversion device and an apparatus. [Background technology]

[0002] Photoelectric conversion devices are used in image input devices such as digital cameras. Patent Document 1 shows that by configuring multiple analog circuits arranged in a column processing unit in a redundant configuration, defects in the analog circuits can be repaired and the yield caused by defects can be improved. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-213012 Summary of the Invention [Problem to be solved by the invention]

[0004] There are cases where analog signals read out between multiple analog circuits are subjected to arithmetic processing such as addition or subtraction in the analog circuits. Patent Document 1 shows switching the connection from a faulty analog circuit to a normal analog circuit, but does not consider switching of analog circuits when analog signals read out by multiple analog circuits are supplied to one analog circuit for arithmetic processing.

[0005] An object of the present invention is to provide a technique that is advantageous for improving the redundancy of a photoelectric conversion device. [Means for solving the problem]

[0006] In view of the above-described problems, a photoelectric conversion device according to an embodiment of the present invention is a photoelectric conversion device including: a pixel array including a plurality of pixels arranged to form a plurality of rows and a plurality of columns; a plurality of signal lines for reading out signals from the pixel array; a plurality of readout circuits arranged in greater number than the plurality of signal lines; and a switching circuit for switching connections between the plurality of signal lines and the plurality of readout circuits, wherein the plurality of readout circuits include a first readout circuit, a second readout circuit, a third readout circuit, and a fourth readout circuit, and the first readout circuit outputs signals to the first readout circuit and the second readout circuit, respectively. the third readout circuit is configured to be able to output a signal based on a signal supplied to the third readout circuit and the fourth readout circuit, respectively; the plurality of signal lines include a first signal line and a second signal line; and the switching circuit is configured to be able to switch between a first setting in which the first signal line is connected to the first readout circuit and the second signal line is connected to the second readout circuit, and a second setting in which the first signal line is connected to the third readout circuit and the second signal line is connected to the fourth readout circuit. [Effects of the Invention]

[0007] According to the present invention, it is possible to provide a technique that is advantageous for improving the redundancy of a photoelectric conversion device. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a photoelectric conversion device according to an embodiment of the present invention. [Figure 2] FIG. 2 is a diagram for explaining default settings of the photoelectric conversion device of FIG. 1. [Figure 3] FIG. 2 is a diagram showing an example of the configuration of a switching circuit of the photoelectric conversion device of FIG. 1. [Figure 4] 2 is a diagram for explaining arithmetic processing between readout circuits of the photoelectric conversion device of FIG. 1; [Figure 5] 2 is a diagram showing an example of a redundant setting of the photoelectric conversion device of FIG. 1; [Figure 6] 2 is a diagram showing an example of a redundant setting of the photoelectric conversion device of FIG. 1; [Figure 7]FIG. 2 is a diagram showing a modification of the photoelectric conversion device of FIG. [Figure 8] FIG. 2 is a diagram showing a modification of the photoelectric conversion device of FIG. [Figure 9] FIG. 2 is a diagram showing a modification of the photoelectric conversion device of FIG. [Figure 10] FIG. 2 is a diagram showing an example of the configuration of a device incorporating the photoelectric conversion device of FIG. 1. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.

[0010] A photoelectric conversion device according to an embodiment of the present disclosure will be described with reference to Figures 1 to 9. Figure 1 is a diagram showing an example of the configuration of a photoelectric conversion device 100 according to this embodiment. The photoelectric conversion device 100 includes a pixel array 101, a plurality of signal lines 301, a plurality of readout circuits 401, and a switching circuit 106. The photoelectric conversion device 100 also includes a vertical scanning circuit 102, a counter circuit 105, a horizontal scanning circuit 107, and a digital processing circuit 108.

[0011] The pixel array 101 is arranged with a plurality of pixels 111, each of which includes a photoelectric conversion element and outputs an analog signal, in a plurality of rows and a plurality of columns. In the configuration shown in FIG. 1, the pixels 111 are arranged in 10 rows and 16 columns in the pixel array 101 for the sake of simplicity. However, in reality, a greater number of pixels 111 may be arranged in the pixel array 101. In addition, in the configuration shown in FIG. 1, the pixels 111 arranged in odd-numbered columns and the pixels 111 arranged in even-numbered columns will be described as being sensitive to light of different colors. For example, the pixels 111 arranged in odd-numbered columns will be described as including pixels 111 with color filters that transmit red light, and the pixels 111 arranged in even-numbered columns will be described as including pixels 111 with color filters that transmit blue light.

[0012] The vertical scanning circuit 102 selects the pixels 111 from which to output signals. More specifically, the vertical scanning circuit 102 selects a row of pixels 111 from which to output signals, and analog signals are output to the signal lines 301 from the pixels 111 in the selected row.

[0013] Multiple signal lines 301 are arranged to read out signals from the pixel array 101. In the configuration shown in FIG. 1 , the signal lines 301 are shared by the pixels 111 arranged in the column direction. Since there are 16 pixel columns, 16 signal lines 301 are arranged horizontally. Although not shown in FIG. 1 , the signal lines 301 may be provided with constant current circuits for obtaining output signals from the pixels 111. Furthermore, the signal lines 301 may be provided with circuits that turn off the constant current circuits at predetermined timing to reduce power consumption of the photoelectric conversion device 100. The signal lines 301 may also be provided with circuits that clip the upper and lower limits of the voltage of the analog signal supplied to the signal lines 301 in order to limit the input range to the downstream readout circuit 401. Hereinafter, when referring to a specific signal line among the multiple signal lines 301, a subscript will be added after the reference number, such as signal line 301 “a.” When referring to either signal line, the signal line will simply be referred to as “signal line 301.” The same applies to other components.

[0014] The readout circuit 401 is a circuit that processes signals (analog signals) output from the pixels 111 to the signal lines 301 within a column. In this embodiment, the readout circuit 401 also includes circuits for performing arithmetic processing on signals supplied from different columns of pixels 111. As will be described in detail later, for example, the readout circuit 401f is configured to be able to output a signal based on a signal supplied to the readout circuit 401f or a signal supplied to the readout circuit 401f and the readout circuit 401h. Such a combination, such as the readout circuit 401f and the readout circuit 401, is shown as a "pair" in FIG. 1. The readout circuit 401 includes, for example, an AD converter and a memory, and converts the analog signals supplied from the pixels 111 into digital signals.

[0015] 1, 16 signal lines 301 are provided, while 20 readout circuits 401 are provided. That is, the number of the readout circuits 401 is greater than the number of the signal lines 301. For example, among the readout circuits 401, readout circuits 401a to 401d are provided as redundant circuits for relieving a defect when a defect occurs in one of the readout circuits 401. FIG. 1 shows the connection relationship between the signal lines 301 and the readout circuits 401 when a defect occurs in the readout circuit 401k and the readout circuits 401a to 401d set as redundant circuits are used.

[0016] 1, the above-mentioned pairs are respectively combined: a read circuit 401e and a read circuit 401g, a read circuit 401f and a read circuit 401h, a read circuit 401i and a read circuit 401k, a read circuit 401j and a read circuit 401l, a read circuit 401m and a read circuit 401o, a read circuit 401n and a read circuit 401p, a read circuit 401q and a read circuit 401s, and a read circuit 401r and a read circuit 401t.Furthermore, with respect to the read circuits 401a to 401d arranged as redundant circuits, a read circuit 401a and a read circuit 401c, and a read circuit 401b and a read circuit 401d are also paired. Hereinafter, a pair of readout circuits 401 between odd-numbered columns, such as readout circuit 401e and readout circuit 401g, may be referred to as an odd-numbered column pair, and a pair of readout circuits 401 between even-numbered columns, such as readout circuit 401f and readout circuit 401h, may be referred to as an even-numbered column pair. The reason why readout circuits 401 to which signals are supplied from pixels 111 in even-numbered columns are arranged between odd-numbered column pairs is because, as described above, pixels 111 sensitive to light of different colors are included between odd-numbered columns and even-numbered columns. In other words, this is to prevent each readout circuit 401 from performing calculations within the circuit based on multiple signals supplied from pixels 111 sensitive to light of different colors and outputting a signal corresponding to the calculation result.

[0017] Here, the arithmetic processing performed within the circuit includes addition and subtraction of analog signal voltages. For example, the readout circuit 401f performs addition and subtraction based on the analog signal supplied to the readout circuit 401f and the analog signal supplied to the readout circuit 401h. While the configuration of the readout circuit 401 will be described in detail later, in this embodiment, the readout circuit 401 is configured to add analog signals by capacitive coupling at the input position of the readout circuit 401. The readout circuit 401 also includes an AD converter, and temporarily stores digital data after digital conversion in a memory within the readout circuit 401. The transfer timing of the digital data stored in the memory within the readout circuit 401 is controlled by the horizontal scanning circuit 107. The digital data stored in the readout circuit 401 for each column is sequentially transferred to the digital processing circuit 108 located downstream. After the digital processing circuit 108, additional processing, data compression, and the like may be performed on the transferred digital data.

[0018] Next, a method for improving the yield of the photoelectric conversion device 100 by improving redundancy by repairing defective readout circuits 401 including analog circuits will be described. The characteristics of a readout circuit 401 may be locally inferior to those of other surrounding readout circuits 401 due to manufacturing variations in the transistors and capacitances included in the circuit. Furthermore, there may be readout circuits 401 that clearly exhibit a functional defect due to open or short circuits in the wiring pattern caused by foreign matter contamination. Furthermore, even if the characteristics of the readout circuits 401 are within the expected variation range, the driving force of transistors that have a greater impact on the analog characteristics may be weaker (or stronger) in a certain row of readout circuits 401 compared to adjacent readout circuits 401. In such cases, thin, visible scratches may appear in the obtained image. When an image test is performed and noticeable scratches are found, the photoelectric conversion device 100 cannot be considered a non-defective product, which may result in a decrease in yield.

[0019] Therefore, in the photoelectric conversion device 100 of this embodiment, when a readout circuit 401 has deteriorated in characteristics and is determined to be defective due to a line scratch or the like caused by the readout circuit 401, the switching circuit 106 switches the connection relationship between the signal line 301 and the readout circuit 401. At that time, both the readout circuit 401 with the deteriorated characteristics and the readout circuit 401 paired with the readout circuit 401 with the deteriorated characteristics are simultaneously made unused, and the readout circuit 401 arranged as a redundant circuit is used.

[0020] The gist of this embodiment will be described with reference to FIGS. 1 and 2. FIG. 2 shows a default setting configuration in which the readout circuits 401a to 401d set as redundant circuits are not used. On the other hand, FIG. 1 shows a redundant setting configuration in which the readout circuits 401a to 401d set as redundant circuits are used. In FIGS. 1 and 2, it is assumed that the readout circuit 401k among the readout circuits 401a to 401t is determined not to satisfy predetermined characteristics. In the default setting shown in FIG. 2, the readout circuits 401a to 401d in the four leftmost columns among the readout circuits 401a to 401t are not used as redundant circuits, with none of the multiple signal lines 301 connected. The arrangement of the readout circuits 401 set as redundant circuits is not limited to the example shown in FIGS. 1 and 2, and may be arranged in any appropriate position.

[0021] The switching circuit 106 is disposed between the plurality of signal lines 301 and the plurality of readout circuits 401, and switches the connection between the plurality of signal lines 301 and the plurality of readout circuits 401. In FIGS. 1 and 2, solid lines drawn above the switching circuit 106 visually indicate to which of the 20 readout circuits 401a to 401t the 16 signal lines are connected. For example, in FIG. 2, the signal line 301 is not connected to the readout circuits 401a to 401d, indicating that the four readout circuits 401a to 401d (redundant circuits) on the left side are unused. If a test is performed with the default settings shown in FIG. 2 and it is confirmed that there are no problems with the characteristics of the 16 readout circuits 401 in use, the photoelectric conversion device 100 is treated as a non-defective product with no problems. On the other hand, if it is determined that there is a readout circuit 401 with a deteriorated characteristic in the default setting, for example, if there is a problem with the readout circuit 401 in Fig. 2, the switching circuit 106 is controlled to switch to the redundant setting as shown in Fig. 1 and use the photoelectric conversion device 100. This makes it possible to improve the quality of the photoelectric conversion device 100.

[0022] 1 and 2, the signal supplied from signal line 301a and the signal supplied from signal line 301c of signal line 301 are subjected to arithmetic processing within readout circuit 401. Therefore, in the default setting shown in FIG. 2, switching circuit 106 connects signal line 301a to readout circuit 401i and connects signal line 301 to readout circuit 401k. Here, if a test reveals a line defect (a brightness difference that can be seen as an output difference from surrounding columns) in a pixel column using readout circuit 401k, it can be said that the characteristics of readout circuit 401k are inferior to those of the surrounding readout circuits 401.

[0023] Therefore, an external input register or the like is used to control the switching circuit 106, which switches the setting from the default setting to a redundant setting for relieving the defect in the readout circuit 401k as shown in FIG. 1. By controlling the switching circuit 106, the connection relationship between the signal line 301 and the readout circuit 401 is switched, thereby realizing relieving the defect using the redundant circuit. The switching circuit 106 connects the signal line 301a to the readout circuit 401e and connects the signal line 301c to the readout circuit 401g. The switching circuit 106 controls the connection destination of the signal line 301 not only to the readout circuit 401k with degraded characteristics but also to disable the readout circuit 401i paired with the readout circuit 401k, thereby sequentially shifting the readout circuit 401 to which the signal line 301 is connected. As a result, the signal line 301 is connected to the readout circuits 401a to 401d arranged as redundant circuits in the four leftmost columns of the readout circuit 401, thereby compensating for the unused readout circuits 401i to 401l in the four columns. If a test is performed again in the redundant setting shown in Fig. 1 and it is confirmed that there are no problems with the image, it is possible to make the photoelectric conversion device 100 a good product, assuming that the redundant setting is used.

[0024] 2, in the default setting, the switching circuit 106 connects the signal line 301b to the read circuit 401j and the signal line 301d to the read circuit 401l. Here, the read circuit 401j is arranged between the read circuit 401k with degraded characteristics and the read circuit 401i paired with the read circuit 401k. Here, as in the redundant setting shown in FIG. 1, not only the pair including the defective read circuit 401 but also the pair including the read circuit 401 sandwiched between the pair including the defective read circuit 401 may be unused in the redundant setting. Therefore, the switching circuit 106 connects the signal line 301b to the read circuit 401f and the signal line 301d to the read circuit 401h. 1, when the readout circuits 401 for four columns, ie, the readout circuits 401i to 401l, are collectively disabled, the switching circuit 106 may be configured to shift the connection destinations of the signal lines 301 and the readout circuits 401 in units of four columns. This allows a common control pulse for switching the connection destinations of the signal lines 301 and the readout circuits 401, which is advantageous in that it is possible to reduce the circuit scale of the switching circuit 106 and the like. Furthermore, the layout of the readout circuits 401 has the advantage of avoiding the risk that a wiring pattern connecting the readout circuits 401 constituting a pair including a readout circuit 401 with degraded characteristics will couple with and affect the analog signal of the readout circuit 401 sandwiched between the pair including the readout circuit 401 with degraded characteristics.

[0025] In the redundant setting, the connections of the read circuits 401e to 401h arranged closer to the read circuits 401a to 401d arranged as redundant circuits than the pair including the defective read circuit 401k and the pair including the read circuit 401j sandwiched between the pair including the read circuit 401k are sequentially shifted. On the other hand, the connections of the read circuits 401m to 401t arranged on the opposite side of the read circuits 401a to 401d than the pair including the defective read circuit 401k and the pair including the read circuit 401j sandwiched between the pair including the read circuit 401k, and the signal line 301 remain unchanged from the default setting. It can be said that the read circuit 401k with degraded characteristics is arranged between the read circuit 401j and the read circuits 401m to 401t sandwiched between the pair including the read circuit 401k.

[0026] FIG. 3 illustrates an example of the circuit configuration of the switching circuit 106 for implementing the default setting and redundant setting described above. A pair of readout circuits 401, each performing an internal operation based on signals supplied from multiple signal lines, is set as a set, and the connection relationship between the signal lines 301 and the readout circuits 401 can be controlled in units of four columns. Switching between the default setting and redundant setting can be controlled using an external input register. A decoder (not shown) in the switching circuit 106 receives the external input register value and generates a control pulse in units of four columns, thereby realizing different connections in units of four columns. When a degradation in the characteristics of a readout circuit 401 is observed, the switching circuit 106 having such a circuit configuration disables the four readout circuits 401 in the combination described above, including the readout circuit 401 with the degraded characteristics. Then, the four readout circuits 401 including the readout circuit 401 with the degraded characteristics can be skipped, and the connection relationship between the signal lines 301 and the readout circuits 401 can be switched. 3 shows the switching circuits 106 corresponding to the readout circuits 401e to 401l. Although the switching circuits 106 corresponding to the other readout circuits 401 are not shown, they have a similar control configuration grouped in units of four columns.

[0027] First, in the default setting, the control signals SIG-11, SIG-12, and SIG-13 are set to Lo level, and their inverted signals, the control signals SIG-11B, SIG-12B, and SIG-13B, are set to Hi level. As a result, the switches 30 and 33 are turned off (non-conductive), and the switches 31 and 34 are turned on (conductive). At the same time, the control signals SIG-21, SIG-22, and SIG-23 are set to Lo level, and their inverted signals, the control signals SIG-21B, SIG-22B, and SIG-23B, are set to Hi level. As a result, the switches 32 and 35 are turned off. Here, in FIG. 3 and FIG. 4 described below, signals with a "B" suffix following the reference number of a control signal indicate inverted signals of control signals without a suffix, and in the following explanation, explanation of the states of the inverted signals will be omitted.

[0028] Next, in the case where a deterioration in the characteristics of the readout circuit 401k is detected, the control signals SIG-11 and SIG-12 are set to Hi level, turning on the switches 30 and 33 and turning off the switches 31 and 34. This allows the connection of the readout circuit 401 to the signal line 301 to be shifted four columns to the left.

[0029] That is, in the default setting, the switching circuit 106 connects the signal line 301a to the readout circuit 401i, the signal line 301b to the readout circuit 401j, the signal line 301c to the readout circuit 401k, and the signal line 301d to the readout circuit 401l. The switching circuit 106 also connects the signal line 301e to the readout circuit 401e, the signal line 301f to the readout circuit 401f, the signal line 301g to the readout circuit 401g, and the signal line 301d to the readout circuit 401h. Although not shown in FIG. 3, the signal line 301 is not connected to the readout circuits 401a to 401d that are provided as redundant circuits.

[0030] On the other hand, in the redundant setting, the connection destination of the signal line 301 is shifted four columns to the left, and the switching circuit 106 connects the signal line 301a to the readout circuit 401e, the signal line 301b to the readout circuit 401f, the signal line 301c to the readout circuit 401g, and the signal line 301d to the readout circuit 401h. Although not shown in FIG. 3 (shown in FIG. 1), the signal lines 301e to 301h are connected to the readout circuits 401a to 401d arranged as redundant circuits four columns to the left.

[0031] In addition, in the configuration shown in FIG. 3 , by setting the control signal SIG-22 to a Hi level during redundancy, the switch 35 is turned on. As a result, the input signal levels to the readout circuits 401i to 401l that are not connected to the signal line 301 during redundancy are fixed to the GND level. The inputs of the readout circuits 401 that are not connected to any of the signal lines 301 among the multiple readout circuits 401 are connected to a fixed potential, not just the GND level. This can prevent the occurrence of through currents and the like that can result from the inputs being in a floating state. Furthermore, when the input level is fixed, it may be possible to operate the unused readout circuits 401 without affecting the characteristics of the photoelectric conversion device 100. Here, operating the unused readout circuits 401 means that, in this embodiment, the unused readout circuits 401 perform AD conversion even on GND-level inputs. By saving power only in the four unused readout circuits 401, it is conceivable that unevenness in the current flowing through the power supply lines or the like will occur, affecting nearby readout circuits 401. By operating the unused readout circuits 401 in the redundant setting, such a risk can be avoided. Similarly, in the default setting, the inputs of the readout circuits 401a to 401d arranged as redundant circuits may be connected to a fixed potential. Similarly, in the default setting, the readout circuits 401a to 401d may be operated.

[0032] Fig. 4 is a circuit diagram showing an example of the configuration of the readout circuit 401. Fig. 4 shows readout circuits 401i to 401l as an example, but the other readout circuits 401 may have a similar configuration. Furthermore, signals input from the pixels 111 to the readout circuit 401 are shown as input lines IN1 to IN4 that connect the switching circuit 106 and the readout circuit 401.

[0033] The readout circuits 401i to 401l shown in FIG. 4 are configured to be capable of outputting digital signals based on analog signals supplied to the respective readout circuits 401. A mode in which the readout circuits 401 perform AD conversion on the signals supplied to the respective readout circuits 401 may hereinafter be referred to as a normal mode. On the other hand, the readout circuit 401i is configured to be capable of outputting not only digital signals based on the analog signals supplied to the readout circuit 401i but also digital signals based on analog signals supplied to the readout circuit 401i and its paired readout circuit 401k. Similarly, the readout circuit 401j is configured to be capable of outputting not only digital signals based on the analog signals supplied to the readout circuit 401j but also digital signals based on analog signals supplied to the readout circuit 401j and its paired readout circuit 401l. A mode in which the readout circuit 401 performs AD conversion on the signals supplied to the readout circuit 401 and its paired readout circuit 401 may hereinafter be referred to as a thinning-out mode. The photoelectric conversion device 100 (readout circuit 401) of this embodiment can operate by switching the setting between a normal mode and a thinning mode.

[0034] In normal mode, the image quality of the obtained image is high, but the amount of image data is large. Therefore, in order to reduce the amount of image data, a specification that allows switching to a mode (thinning mode) in which the number of readout circuits performing AD conversion is thinned out, for example, by half, may be required. Therefore, in order to maintain good image quality even in thinning mode, the readout circuit 401 reads out all columns of signals from the pixels 111 without thinning them out. Meanwhile, FIG. 4 shows an example configuration in which the readout circuits 401i and 401j perform addition processing on analog voltages, which are signals supplied from the pixels 111.

[0035] The readout circuit 401 also includes an AD converter and a memory MEM. The AD converter is, for example, a slope-type AD converter that uses a ramp wave output from a comparator COMP, a counter circuit 105, and a ramp waveform generating circuit (not shown). In the AD converter, the comparator COMP compares the ramp wave with the input voltage level, counts clocks supplied from the counter circuit 105 that are synchronized with the ramp wave, and the count value at the time when the input voltage level crosses the ramp wave is written to the memory MEM. The AD converter may also be another AD converter, such as a successive approximation type or a delta-sigma type.

[0036] In this embodiment, signals supplied to the readout circuits 401i and 401k, respectively, and signals supplied to the readout circuits 401j and 401l, respectively, can be added together. The readout circuits 401 are configured in units of four columns, each consisting of two pairs of two readout circuits 401, and the same circuit configuration is repeated for the other readout circuits 401. Therefore, FIG. 4 shows the readout circuits 401 for four columns, 401i to 401l.

[0037] The readout circuit 401 is provided with two types of input capacitance: input capacitance C11 and input capacitance C21. In normal mode, by setting the control signal SIG-3 to Lo level, the switches 41, 42, 43, and 44 are turned on and the switches 45 and 46 are turned off. As a result, in each readout circuit 401, a signal supplied via the input line IN is input to both the input capacitance C11 and the input capacitance C21. In other words, a signal input from one signal line 301 is supplied to the readout circuit 401 of a corresponding column, resulting in closed processing within the same column.

[0038] On the other hand, in the thinning mode, by setting the control signal SIG-3 to a Hi level, the switches 41, 42, 43, and 44 are turned off and the switches 45 and 46 are turned on. As a result, a signal supplied via input line IN1 is input to the input capacitance C11 of the readout circuit 401i, and a signal supplied via input line IN3 is input to the input capacitance C21 of the readout circuit 401i. Similarly, a signal supplied via input line IN2 is input to the input capacitance C11 of the readout circuit 401j, and a signal supplied via input line IN4 is input to the input capacitance C21 of the readout circuit 401j. As a result, a signal obtained by combining the signals supplied via input lines IN1 and IN3 appears at the negative input of the comparator COMP1 of the readout circuit 401i. Similarly, a signal obtained by combining the signals supplied via input lines IN2 and IN4 appears at the negative input of the comparator COMP2 of the readout circuit 401j. As a result, the readout circuits 401i and 401j perform addition processing.

[0039] In this embodiment, the analog signal level appearing on the negative input side of the comparator COMP is compared by supplying a ramp wave as a reference voltage to the positive input side of the comparator COMP. When the signal levels on the positive and negative input sides of the comparator COMP are inverted, the comparator COMP outputs an inverted signal, and the counter value at the time the inverted signal was output is written to the memory MEM. In this way, the analog signal supplied from the pixel 111 is converted into a digital signal.

[0040] Furthermore, by changing the capacitance ratio between the input capacitor C11 and the input capacitor C21, it is possible to weight the signals supplied to the two readout circuits 401 in the thinning mode. That is, in the configuration shown in FIG. 4, weighted addition processing is possible in the readout circuits 401i and 401j. For example, when the capacitance ratio between the input capacitor C11 and the input capacitor C21 is set to 2:1, calculation processing can be realized in the readout circuit 401i such that the signal supplied via the signal line IN1 has twice as much influence on the output value after AD conversion as the signal supplied via the input line IN3. When performing weighted addition, switching the connection destination of a pair of readout circuits 401 as a set can maintain a relationship in which the input line IN corresponding to the left column always has a weight of "2," such as input line IN1:input line IN3=2:1, making switching easier. Therefore, as in the normal setting and redundant setting described above, switching the connection between the signal line 301 and the readout circuit 401 for each pair of readout circuits 401 may make circuit design easier than switching without considering the pair of readout circuits 401.

[0041] 4, the comparators COMP3 and COMP4 of the readout circuits 401k and 401l are not used during the thinning mode, but they may be used instead. For example, comparator COMP3 receives a signal obtained by combining a signal supplied via input line IN1 with a signal supplied via input line IN3, similar to comparator COMP1. Similarly, comparator COMP4 receives a signal obtained by combining a signal supplied via input line IN2 with a signal supplied via input line IN4, similar to comparator COMP2. At this time, a ramp waveform input having a different slope from the ramp wave supplied to comparators COMP1 and COMP2 of the readout circuits 401i and 401j is supplied to the positive input side of comparators COMP3 and COMP4. This allows AD conversion to be performed simultaneously between the readout circuits 401i and 401j and the readout circuits 401k and 401l with different AD conversion gains. Also, for example, different arithmetic processing may be performed in the readout circuits 401i and 401j and in the readout circuits 401k and 401l. For example, a signal obtained by subtracting a signal supplied via input line IN3 from a signal supplied via input line IN1 may be supplied to the comparator COMP3 of the readout circuit 401k. Similarly, a signal obtained by subtracting a signal supplied via input line IN4 from a signal supplied via input line IN2 may be supplied to the comparator COMP4 of the readout circuit 401l. As a result, It is also possible to simultaneously perform AD of addition and subtraction by applying the same to each of the readout circuits 401i and 401j and the readout circuits 401k and 401l. Digital data based on the analog signals that have been subjected to the addition processing and digital data based on the analog signals that have been subjected to the subtraction processing can be obtained.

[0042] As described above, when performing arithmetic processing using a signal supplied to another readout circuit 401, rather than disabling only the readout circuit 401 with degraded characteristics, the paired readout circuit 401 is also disabled and switched to a redundant circuit. As described above, when the characteristics of one of a pair of readout circuits 401 are degraded, even if only the readout circuit 401 with degraded characteristics is isolated using a switch or the like, the influence of this degraded circuit may remain in the analog circuit. When the paired readout circuit 401 with undegraded characteristics is used instead of being disabled, for example, in a redundant setting, the destination of the connection line NET1 shown in FIG. 4 is switched to the readout circuit 401 of another column using a switch or the like. However, the control pulse of the switch for switching the destination to the readout circuit 401 of another column changes between high and low levels. Due to coupling between the control pulse of the switch and the analog signal in the readout circuit 401, this change in control pulse may affect the accuracy of AD conversion. Furthermore, the more complex the arithmetic processing performed by the readout circuits 401, the more complex the control of continuing to use only one of the pair of readout circuits 401 and switching the other becomes. Therefore, when transferring signals supplied between readout circuits 401 and performing arithmetic processing, the pair of readout circuits 401 including the defective readout circuit 401 with degraded characteristics is not used, and the connection destination of the signal line 301 is switched collectively. Such a configuration reduces the complexity of circuit design and realizes a photoelectric conversion device 100 with excellent redundancy.

[0043] In the above-described embodiment, one readout circuit 401 is arranged in the column direction and multiple readout circuits 401 are arranged in the row direction to form one block. However, this is not limited to this. For example, multiple readout circuits 401 may also be arranged in the column direction. In the above description, each signal line 301 is arranged to correspond to each column of multiple pixels 111. However, for example, there may be cases where a predetermined number of multiple signal lines 301 are arranged to correspond to each column of multiple pixels 111, thereby simultaneously reading out signals from pixels 111 arranged in multiple rows at high speed. In such a case, multiple readout circuits 401 may be arranged in the column direction and the row direction.

[0044] 5(a) to 5(c) are diagrams illustrating variations in redundancy settings for the readout circuits 401. In the configurations shown in FIGS. 5(a) to 5(c), for example, an arrangement of the readout circuits 401 in a 2-row by 20-column array is shown in order to simultaneously read out signals from 2-row by 16-column pixels 111. Also, similar to FIG. 1 and other figures, pairs of readout circuits 401 related to arithmetic processing are shown. In FIGS. 5(a) to 5(c), the readout circuits 401 filled with dots indicate readout circuits 401 that are not connected to the signal lines 301 and are therefore unused, and do not necessarily represent the positions of the readout circuits 401 arranged as redundant circuits. Furthermore, the readout circuits 401 with diagonal lines indicate the positions of readout circuits 401 that have deteriorated characteristics and are therefore unused.

[0045] FIG. 5(a) shows an example of default settings. The readout circuits 401 in the leftmost 2-row x 4-column array are unused and assigned to redundant circuits. If no degradation in performance is observed in any of the readout circuits 401, there is no problem in using the photoelectric conversion device 100 in the default settings. FIG. 5(b) shows an example of a usage pattern of the readout circuits 401 in redundant settings. As described above, four readout circuits are unused: a pair of readout circuits 401 including a readout circuit 401 with a degradation in performance, and a pair of readout circuits 401 including a readout circuit 401 sandwiched between the pair of readout circuits 401 including the degraded performance. In this case, the readout circuit 401 arranged as a redundant circuit in the same row as the degraded performance readout circuit 401 is used. An example of the switching circuit 106 that switches the connection between the signal line 301 and the readout circuit 401 from the default setting to the redundant setting is as described above. Fig. 5(c) shows an example of a usage pattern of the readout circuits 401 in a redundant setting, which is different from the usage pattern shown in Fig. 5(b). The unused readout circuits 401 in the usage pattern shown in Fig. 5(b) are also expanded in the column direction, so that all of the readout circuits 401 in the ninth to twelfth columns from the left are unused, and redundant circuits arranged in the first to fourth columns are used.

[0046] 6(a) and 6(b) are diagrams illustrating variations in redundancy settings for the readout circuits 401, similar to FIGS. 5(a) to 5(c). In the above-described embodiments, examples have been described in which redundant circuits are arranged in the horizontal direction and the switching circuit 106 switches the connection between the signal line 301 and the readout circuit 401 in the column direction. However, a configuration having a redundant circuit in the vertical direction is also possible. However, when redundant circuits are arranged in the vertical direction compared to the horizontal direction, the layout in the column direction becomes longer in the vertical direction, so this is effective when there is sufficient room in the layout size. Even when a redundant circuit is arranged in the vertical direction, as described above, instead of disabling only the readout circuit 401 whose characteristics have deteriorated, both readout circuits 401 of a pair related to arithmetic processing are disabled, and a setting is switched to use the readout circuit 401 arranged as a redundant circuit. When redundant circuits are arranged vertically, the distance between the readout circuits 401 that transfer signals becomes longer than when redundant circuits are arranged horizontally, unless a pair of readout circuits 401 is simultaneously put into disuse and switched over, and, for example, noise is more likely to be carried over the signal. For this reason, as described above, a pair of readout circuits 401 with degraded characteristics is put into disuse as a set and switched over to a redundant circuit.

[0047] FIG. 6(a) is a diagram illustrating an example of default settings. In FIG. 6(a), the readout circuits 401 arranged in the bottom column are unused and assigned to redundant circuits. If no degradation in performance is observed in any of the readout circuits 401, there is no problem in using the photoelectric conversion device 100 in the default setting. FIG. 6(b) is an example of a usage pattern of readout circuits 401 in redundant setting. Four readout circuits 401 are unused: a pair of readout circuits 401 including a readout circuit 401 with a degradation in performance, and a pair of readout circuits 401 including a readout circuit 401 sandwiched between the pair of readout circuits 401 including the degraded performance. In addition, a readout circuit 401 arranged as a redundant circuit and located in the same column as the unused readout circuit 401 is used. An example of the switching circuit 106 that switches the connection between the signal line 301 and the readout circuit 401 from the default setting to the redundant setting is as described above.

[0048] In this way, even when signals are transferred between readout circuits 401 including analog circuits and calculations are performed, a photoelectric conversion device 100 can be realized that achieves both image quality and improved redundancy by repairing defective circuits.

[0049] FIG. 7 is a diagram showing a modified example of the photoelectric conversion device 100 described above. In the configuration shown in FIG. 7, the switching circuits 106 are arranged separately for odd-numbered columns and even-numbered columns of pixels 111. The switching circuits 106a correspond to the pixels 111 arranged in the odd-numbered columns, and the switching circuits 106b correspond to the pixels 111 arranged in the even-numbered columns. The switching circuits 106a and 106b each switch the connection relationship between the signal line 301 and the readout circuit 401 using an individual external input register. The other configuration may be the same as in the above-described embodiment, and therefore description thereof will be omitted here as appropriate.

[0050] In the configuration shown in FIG. 7 , 18 readout circuits 401 are arranged horizontally for 16 signal lines 301. The readout circuits 401a and 401b in the two leftmost columns are configured as redundant circuits. In the configuration shown in FIG. 7 , the connection between the readout circuits 401 and the signal lines 301 arranged corresponding to the pixels 111 in odd-numbered columns of the pixel array 101 is controlled by a switching circuit 106a. The connection between the readout circuits 401 and the signal lines 301 arranged corresponding to the pixels 111 in even-numbered columns of the pixel array 101 is controlled by a switching circuit 106b. As described above, if the pixels 111 arranged in odd-numbered columns and the pixels 111 arranged in even-numbered columns are sensitive to light of different colors, it is conceivable that signals corresponding to light of different colors will rarely be processed. Therefore, in the configuration shown in FIG. 7 , the switching circuits 106 are arranged separately for the odd-numbered columns and the even-numbered columns of the pixel array 101, allowing for individual control. 7, the readout circuits 401a and 401b arranged as redundant circuits are configured to be shared by odd-numbered columns and even-numbered columns. That is, the switching circuits 106a and 106b are configured so that the destination of the signal line 301 can be connected to the readout circuits 401a and 401b.

[0051] In FIG. 7, the readout circuit 401i indicated by diagonal lines is experiencing a degradation in performance. In the default setting of the switching circuit 106a, the signal line 301c connected to the readout circuit 401i is in an odd-numbered column, so the switching circuit 106a switches to a redundant setting, and the readout circuits 401a and 401b arranged as redundant circuits in the two leftmost columns are used. The switching circuit 106b is left in its default setting, assuming that the degradation in performance of the readout circuit 401 is not a problem. The solid lines drawn on the switching circuit 106a in FIG. 7 visually represent the connection between the signal lines 301 corresponding to the pixels 111 in the odd-numbered columns and the readout circuit 401. The dotted lines drawn on the switching circuit 106a indicate that the signal lines 301 corresponding to the pixels 111 in the even-numbered columns are not controlled by the switching circuit 106a, and therefore the connection is not switched. Similarly, the solid lines drawn on the switching circuit 106b visually represent the connection between the signal lines 301 corresponding to the pixels 111 in the even columns and the readout circuit 401. Furthermore, the dotted lines drawn on the switching circuit 106b indicate that the signal lines 301 corresponding to the pixels 111 in the odd columns are not controlled by the switching circuit 106b and the connection is not switched. The connection between the signal lines 301 and the readout circuit 401 in the default setting is not shown, and may be similar to the configuration in which two of the readout circuits 401a to 401d in the four leftmost columns are deleted from FIG. 2.

[0052] The redundancy setting shown in FIG. 7 will be described in more detail. When a characteristic degradation occurs in the readout circuit 401i, the switching circuit 106a connects the signal line 301a to the readout circuit 401i in the default setting. However, the switching circuit 106a, which can shift the connection destination of the signal line 301 corresponding to the pixel 111 in the odd-numbered column, is controlled using an external input register. The readout circuit 401i with the degraded characteristic and the readout circuit 401g paired with the readout circuit 401i are not used, and the readout circuits 401a and 401b arranged as redundant circuits in the two leftmost columns are used. By configuring the readout circuits 401a and 401b arranged as redundant circuits to be shareable between the switching circuits 106a and 106b, the number of readout circuits 401 arranged as redundant circuits can be reduced. This allows for a smaller circuit size than the embodiment shown in FIG. 1, resulting in advantages such as a reduced layout area. 7 illustrates an example in which the readout circuit 401 arranged as a redundant circuit is shared between the switching circuits 106a and 106b, but this is not limiting. For example, four columns of readout circuits 401 may be arranged as redundant circuits, without sharing the readout circuit 401 arranged as a redundant circuit between the switching circuits 106a and 106b. In the configuration illustrated in FIG. 7, it is important that the connection relationship between the signal lines 301 and the readout circuits 401 corresponding to the pixels 111 arranged in odd-numbered columns and the connection relationship between the signal lines 301 and the readout circuits 401 corresponding to the pixels 111 arranged in even-numbered columns can be controlled independently. Even with this configuration, a photoelectric conversion device 100 can be realized that achieves both high image quality and improved redundancy by repairing defective circuits, even when signals are transferred between the readout circuits 401 including analog circuits for calculation.

[0053] FIG. 8 is a diagram illustrating a modified example of the photoelectric conversion device 100. In the configuration illustrated in FIG. 8, the signal lines 301, the switching circuit 106, and the readout circuits 401 form one group, and the photoelectric conversion device 100 includes multiple groups. More specifically, the photoelectric conversion device 100 includes a first group including the signal lines 301, the switching circuit 106a, and the readout circuits 401, and a second group including the signal lines 311, the switching circuit 106b, and the readout circuits 411. In this case, the pixel array 101 is disposed between a block 104a of the readout circuits 401 belonging to the first group and a block 104b of the readout circuits 411 belonging to the second group. Furthermore, counter circuits 105a and 105b, horizontal scanning circuits 107a and 107b, and digital processing circuits 108a and 108b are disposed corresponding to these groups. 8 shows a configuration including two groups, but three or more groups may be arranged in the photoelectric conversion device 100. Other configurations may be similar to the configuration shown in Fig. 1 described above, so the following description will focus on different configurations, and descriptions of configurations that may be similar will be omitted as appropriate.

[0054] In the configuration shown in Fig. 8, the readout circuits 401, 411 of each group include a redundant circuit, and redundancy can be set for each group by the switching circuits 106a, 106b. In a group including a signal line 301, a switching circuit 106a, and a readout circuit 401, 16 columns of signal lines 301 are arranged. In addition, 20 readout circuits 401 are arranged, and the readout circuits 401a to 401b of the leftmost four columns are set as redundant circuits. In the example shown in Fig. 8, there is a deterioration in the characteristics of the readout circuit 401k, and the switching circuit 106a is controlled using an external input register or the like to change the setting from the default setting to the redundant setting, thereby using the readout circuits 401a to 401d arranged as redundant circuits. 8, in the default setting, the switching circuit 106a connects the signal line 301a to the read circuit 401i, the signal line 301b to the read circuit 401j, the signal line 301c to the read circuit 401k, and the signal line 301d to the read circuit 401l. On the other hand, in the redundant setting, the read circuit 401k with degraded characteristics and the read circuit 401i paired with the read circuit 401k are not used. Also, as described above, the pair (read circuits 401j, 401l) including the read circuit 401j sandwiched between the pair including the defective read circuit 401k are not used. The switching circuit 106a connects the signal line 301a to the read circuit 401e, the signal line 301b to the read circuit 401f, the signal line 301c to the read circuit 401g, and the signal line 301d to the read circuit 401h. Accordingly, the signal lines 301 arranged on the left side of the signal line 301a in FIG. 8 are connected to the read circuits 401a to 401d arranged as redundant circuits, respectively.

[0055] Furthermore, in a group including a signal line 311, a switching circuit 106b, and a readout circuit 411, 16 columns of signal lines 311 are arranged. Also, 20 readout circuits 411 are arranged, with the readout circuits 411a to 411b in the four leftmost columns being set as redundant circuits. In the example shown in FIG. 8, in addition to the readout circuit 401k described above, the readout circuit 411e also has a performance degradation, and the switching circuit 106b is controlled to change the setting from the default setting to the redundant setting, thereby using the readout circuits 411a to 411d arranged as redundant circuits. Although not shown in FIG. 8, in the default setting, the switching circuit 106b connects the signal line 311a to the readout circuit 411e, the signal line 311b to the readout circuit 411f, the signal line 311c to the readout circuit 411g, and the signal line 311d to the readout circuit 411h. On the other hand, in the redundant setting, the read circuit 411e with degraded characteristics and the read circuit 411g paired with the read circuit 411e are not used. Also, as described above, the pair including the read circuit 411f sandwiched between the pair including the defective read circuit 411e (read circuits 411f, 411h) are not used. The switching circuit 106b connects the signal line 311a to the read circuit 411a, the signal line 311b to the read circuit 411b, the signal line 311c to the read circuit 411c, and the signal line 311d to the read circuit 411d. That is, in the default setting, the signal lines 311a to 311d are connected to the read circuits 411a to 411b arranged as redundant circuits and not connected to any signal line 311.

[0056] As shown in FIG. 8 , when the readout circuits 401, 411 are arranged separately above and below the pixel array 101, a redundant circuit is provided for each readout circuit 401, 411, and the switching circuits 106a, 106b corresponding to each readout circuit 401, 411 are controlled independently. As shown in FIG. 8 , when the readout circuits 401, 411 are arranged on either side of the pixel array 101, the readout circuits 401, 411 are physically spaced apart. For this reason, it is difficult to share a redundant circuit between the readout circuits 401, 411, and therefore a redundant circuit is provided for each readout circuit 401, 411. Furthermore, by independently controlling the switching circuits 106a, 106b, the number of readout circuits 401 that can be repaired increases, which can improve the yield of the photoelectric conversion device 100. Even in the configuration shown in Figure 8, even when signals are transferred between readout circuits 401 and 411 including analog circuits and calculations are performed, it is possible to realize a photoelectric conversion device 100 that achieves both image quality and improved redundancy by repairing defective circuits.

[0057] FIG. 9 is a diagram illustrating a modified example of the photoelectric conversion device 100 described above. Similar to the configuration illustrated in FIG. 9, the photoelectric conversion device 100 includes a first group including a plurality of signal lines 301, a switching circuit 106a, and a plurality of readout circuits 401, and a second group including a plurality of signal lines 311, a switching circuit 106b, and a plurality of readout circuits 411. Unlike the configuration illustrated in FIG. 9, a block 104a of a plurality of readout circuits 401 belonging to the first group and a block 104b of a plurality of readout circuits 411 belonging to the second group are arranged in a row direction that intersects with the column direction in which the plurality of signal lines 301 and 311 extend. Furthermore, the counter circuit 105 is shared by both groups. While the configuration illustrated in FIG. 9 includes two groups, the photoelectric conversion device 100 may include three or more groups. Other configurations may be the same as those shown in Figures 1 and 8 described above, so the following description will focus on the different configurations, and descriptions of configurations that may be the same will be omitted as appropriate.

[0058] FIG. 9 shows an example in which pixels 111 are arranged in 10 rows and 32 columns. 32 signal lines 301, 311 are arranged corresponding to the 32 columns of pixels. 40 readout circuits 401, 411 are also arranged. Of the 40 readout circuits 401, 411, 20 shown on the left side of FIG. 9 are readout circuits 401 belonging to a first group, and 20 on the right side are readout circuits 411 belonging to a second group. Of the readout circuits 401 belonging to the first group, readout circuits 401a to 401d in the leftmost four columns are arranged as redundant circuits, and of the readout circuits 411 belonging to the second group, readout circuits 411a to 411b in the leftmost four columns are arranged as redundant circuits. The switching circuit 106a switches the connection relationship between the signal lines 301 and readout circuits 401 corresponding to the 16 pixel columns on the left. The switching circuit 106b switches the connection relationship between the signal lines 311 corresponding to the 16 columns of pixels on the right side and the readout circuits 411. The switching circuits 106a and 106b can be controlled independently using an external input register or the like. If the use of the redundant circuits in the first and second groups can be controlled individually, as in the configuration shown in Fig. 8, the number of readout circuits 401, 411 that can be repaired can be increased, and the yield can be improved.

[0059] The digital data held in the memory MEM of the readout circuit 401 belonging to the first group is sequentially read out under timing control by the horizontal scanning circuit 107a. Similarly, the digital data held in the memory MEM of the readout circuit 411 belonging to the second group is sequentially read out under timing control by the horizontal scanning circuit 107b. By arranging the horizontal scanning circuits 107a and 107b for each group, digital data can be read out independently. Therefore, the digital data read time can be shortened compared to when a single horizontal scanning circuit 107 is used to read signals from the readout circuit 401 and the readout circuit 411. Here, when multiple horizontal scanning circuits 107 are arranged, a redundant circuit can be arranged for each of the readout circuits 401 and 411, in units of regions scanned by the horizontal scanning circuit 107. In other words, a horizontal scanning circuit 107 may be arranged corresponding to each group to which the readout circuits 401 and 411 belong. For example, consider a case where a redundant circuit is not configured in the readout circuit 411 belonging to the second group, and the four leftmost readout circuits 401a-401d of the readout circuits 401 belonging to the first group are shared as redundant circuits by both groups. In this case, in the default setting, the horizontal scanning circuit 107a transfers digital data for the left 16 pixel columns to the digital processing circuit 108a. On the other hand, if the characteristics of one of the readout circuits 411 belonging to the second group deteriorate and the above-described redundant setting is enabled, the horizontal scanning circuit 107a transfers digital data for the left 20 pixel columns to the digital processing circuit 108a. Therefore, if data is not exchanged between the digital processing circuits 108a and 108b after the digital data transfer, it may be impossible to perform the expected digital processing. Therefore, it is preferable to arrange the configuration so that the horizontal scanning circuit 107a always scans the data for the left 16 pixel columns, and the horizontal scanning circuit 107b always scans the data for the right 16 pixel columns.

[0060] 9 shows an example in which performance degradation occurs in two readout circuits 401, 411, readout circuit 401k and readout circuit 411e, and illustrates a connection state in which a redundancy setting is applied. Although not shown in FIG. 9, in the default setting, switching circuit 106a connects signal line 301a to readout circuit 401i, signal line 301b to readout circuit 401j, signal line 301c to readout circuit 401k, and signal line 301d to readout circuit 401l. Also, in the default setting, switching circuit 106b connects signal line 311a to readout circuit 411e, signal line 311b to readout circuit 411f, signal line 311c to readout circuit 411g, and signal line 311d to readout circuit 411h.

[0061] On the other hand, in the redundant setting, the read circuit 401k with degraded characteristics and the read circuit 401i paired with the read circuit 401k are not used. Also, as described above, the pair including the read circuit 401j sandwiched between the pair including the defective read circuit 401k (read circuits 401j and 401l) are not used. The switching circuit 106a connects the signal line 301a to the read circuit 401e, the signal line 301b to the read circuit 401f, the signal line 301c to the read circuit 401g, and the signal line 301d to the read circuit 401h. Accordingly, the signal lines 301 arranged on the left side of the signal line 301a in FIG. 8 are connected to the read circuits 401a to 401d arranged as redundant circuits, respectively. In addition, in the redundant setting, the read circuit 411e with degraded characteristics and the read circuit 411g paired with the read circuit 411e are not used. As described above, the pair including the read circuit 411f sandwiched between the pair including the defective read circuit 411e (read circuits 411f, 411h) is not used. The switching circuit 106b connects the signal line 311a to the read circuit 411a, the signal line 311b to the read circuit 411b, the signal line 311c to the read circuit 411c, and the signal line 311d to the read circuit 411d. In other words, in the default setting, the signal lines 311a to 311d are connected to the read circuits 411a to 411b arranged as redundant circuits and not connected to any signal line 311.

[0062] 9, even when signals are transferred between the readout circuits 401 and 411 including analog circuits to perform calculations, it is possible to realize a photoelectric conversion device 100 that achieves both image quality and improved redundancy by repairing defective circuits. As a result, the yield of the photoelectric conversion device 100 can be improved.

[0063] An application example of the photoelectric conversion device 100 of this embodiment will now be described with reference to Fig. 10. Fig. 10 is a schematic diagram of an apparatus 9191 including the photoelectric conversion device 100. As shown in Fig. 10, the photoelectric conversion device 100 is housed in a package 920. The package 920 can include a base to which the photoelectric conversion device 100 is fixed, and a lid such as glass that faces the photoelectric conversion device 100. The package 920 can further include bonding members such as bonding wires and bumps that connect terminals provided on the base to pads provided on the photoelectric conversion device 100.

[0064] The device 9191 can include at least one of an optical device 940, a control device 950, a processing device 960, a display device 970, a storage device 980, and a mechanical device 990. The optical device 940 is, for example, a lens, a shutter, or a mirror. The control device 950 controls the photoelectric conversion device 100. The control device 950 is, for example, a semiconductor device such as an ASIC.

[0065] The processing device 960 processes the signal output from the photoelectric conversion device 100. The processing device 960 is a semiconductor device such as a CPU or ASIC for configuring an AFE (analog front end) or a DFE (digital front end). The display device 970 is an EL display device or a liquid crystal display device that displays information (images) obtained by the photoelectric conversion device 100. The storage device 980 is a magnetic device or a semiconductor device that stores information (images) obtained by the photoelectric conversion device 100. The storage device 980 is a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive.

[0066] The mechanical device 990 has a moving part or a propulsion part such as a motor or an engine. In the device 9191, the signal output from the photoelectric conversion device 100 is displayed on the display device 970, or transmitted to the outside by a communication device (not shown) provided in the device 9191. For this purpose, the device 9191 may further include a storage device 980 and a processing device 960 in addition to the storage circuit and arithmetic circuit provided in the photoelectric conversion device 100. The mechanical device 990 may be controlled based on the signal output from the photoelectric conversion device 100.

[0067] The device 9191 is also suitable for electronic devices such as information terminals with a photographing function (for example, smartphones and wearable devices) and cameras (for example, interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). The mechanical device 990 in the camera can drive components of the optical device 940 for zooming, focusing, and shutter operations. Alternatively, the mechanical device 990 in the camera can move the photoelectric conversion device 100 for vibration isolation operations.

[0068] The device 9191 can also be applied to an on-board camera mounted on transportation equipment such as a vehicle, a ship, an airplane, or an industrial robot. The mechanical device 990 in transportation equipment can be used as a mobile device. The device 9191 as transportation equipment is suitable for transporting the photoelectric conversion device 100 or for assisting and / or automating driving (piloting) using a photographing function. The processing device 960 for assisting and / or automating driving (piloting) can perform processing for operating the mechanical device 990 as a mobile device based on information obtained by the photoelectric conversion device 100. The device 9191 incorporating the photoelectric conversion device 100 is not limited to transportation equipment, and can be widely applied to equipment that uses object recognition, such as an intelligent transport system (ITS). Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring device such as a distance measuring sensor, an analytical device such as an electron microscope, or an office machine such as a copier.

[0069] The disclosure of this specification includes the following photoelectric conversion devices and instruments.

[0070] (Item 1) a pixel array including a plurality of pixels arranged in a plurality of rows and a plurality of columns; a plurality of signal lines for reading out signals from the pixel array; a plurality of readout circuits, the number of which is greater than the number of the signal lines; a switching circuit that switches connections between the plurality of signal lines and the plurality of readout circuits, the plurality of readout circuits include a first readout circuit, a second readout circuit, a third readout circuit, and a fourth readout circuit, the first readout circuit being configured to be able to output a signal based on a signal supplied to the first readout circuit and the second readout circuit, respectively, and the third readout circuit being configured to be able to output a signal based on a signal supplied to the third readout circuit and the fourth readout circuit, respectively; the plurality of signal lines include a first signal line and a second signal line; the switching circuit is configured to be able to switch settings between a first setting in which the first signal line is connected to the first readout circuit and the second signal line is connected to the second readout circuit, and a second setting in which the first signal line is connected to the third readout circuit and the second signal line is connected to the fourth readout circuit.

[0071] (Item 2) 2. The photoelectric conversion device according to item 1, wherein the switching circuit switches the setting from the first setting to the second setting when the first readout circuit does not satisfy predetermined characteristics.

[0072] (Item 3) 3. The photoelectric conversion device according to item 1 or 2, wherein in the first setting, none of the plurality of signal lines is connected to the third readout circuit and the fourth readout circuit.

[0073] (Item 4) the plurality of readout circuits further include a fifth readout circuit and a sixth readout circuit, the fifth readout circuit being configured to be able to output a signal based on signals supplied to the fifth readout circuit and the sixth readout circuit, respectively; the plurality of signal lines further include a third signal line and a fourth signal line; The switching circuit In the first setting, the third signal line is connected to the third readout circuit, and the fourth signal line is connected to the fourth readout circuit; 3. The photoelectric conversion device according to item 1 or 2, wherein in the second setting, the third signal line is connected to the fifth readout circuit and the fourth signal line is connected to the sixth readout circuit.

[0074] (Item 5) the plurality of readout circuits further include a seventh readout circuit and an eighth readout circuit, the seventh readout circuit being disposed between the first readout circuit and the second readout circuit; the plurality of signal lines further includes a fifth signal line; 5. The photoelectric conversion device according to any one of items 1 to 4, wherein the switching circuit connects the fifth signal line to the seventh readout circuit in the first setting, and connects the fifth signal line to the eighth readout circuit in the second setting.

[0075] (Item 6) 6. The photoelectric conversion device according to item 5, wherein in the first setting, none of the plurality of signal lines is connected to the eighth readout circuit.

[0076] (Item 7) the plurality of readout circuits further includes a ninth readout circuit; the plurality of signal lines further includes a sixth signal line; 6. The photoelectric conversion device according to item 5, wherein the switching circuit connects the sixth signal line to the eighth readout circuit in the first setting, and connects the sixth signal line to the ninth readout circuit in the second setting.

[0077] (Item 8) the plurality of readout circuits further include a seventh readout circuit, an eighth readout circuit, a tenth readout circuit, and an eleventh readout circuit, the seventh readout circuit being disposed between the first readout circuit and the second readout circuit and configured to be able to output a signal based on a signal supplied to the seventh readout circuit and the tenth readout circuit, respectively, and the eighth readout circuit being configured to be able to output a signal based on a signal supplied to the eighth readout circuit and the eleventh readout circuit, respectively; the plurality of signal lines further include a fifth signal line and a seventh signal line; The switching circuit In the first setting, the fifth signal line is connected to the seventh readout circuit, and the seventh signal line is connected to the tenth readout circuit; The photoelectric conversion device according to any one of items 1 to 4, characterized in that in the second setting, the fifth signal line is connected to the eighth readout circuit and the seventh signal line is connected to the eleventh readout circuit.

[0078] (Item 9) the plurality of readout circuits further includes a twelfth readout circuit; the plurality of signal lines further includes an eighth signal line; the second readout circuit is disposed between the first readout circuit and the third readout circuit, the third readout circuit is disposed between the second readout circuit and the fourth readout circuit, and the first readout circuit is disposed between the twelfth readout circuit and the second readout circuit, 9. The photoelectric conversion device according to any one of items 1 to 8, wherein the switching circuit connects the eighth signal line to the twelfth readout circuit in the first setting and the second setting.

[0079] (Item 10) 10. The photoelectric conversion device according to any one of items 1 to 9, wherein each signal line is arranged to correspond to each column of the plurality of pixels.

[0080] (Item 11) 10. The photoelectric conversion device according to any one of items 1 to 9, wherein the plurality of signal lines are arranged so that a predetermined number of lines correspond to each column of the plurality of pixels.

[0081] (Item 12) the plurality of signal lines, the switching circuit, and the plurality of readout circuits form one group; 12. The photoelectric conversion device according to any one of items 1 to 11, wherein the photoelectric conversion device includes a plurality of groups including a first group and a second group.

[0082] (Item 13) Item 13. The photoelectric conversion device according to item 12, characterized in that the pixel array is arranged between a block of the plurality of readout circuits belonging to the first group and a block of the plurality of readout circuits belonging to the second group.

[0083] (Item 14) The photoelectric conversion device described in item 12, characterized in that the block of the plurality of readout circuits belonging to the first group and the block of the plurality of readout circuits belonging to the second group are arranged side by side in a row direction that intersects with the column direction in which the plurality of signal lines extend.

[0084] (Item 15) A photoelectric conversion device described in any one of items 1 to 14, characterized in that the input of a readout circuit among the plurality of readout circuits that is not connected to any of the plurality of signal lines is connected to a fixed potential.

[0085] (Item 16) The photoelectric conversion device described in any one of items 1 to 15, characterized in that the first readout circuit performs at least one of an addition process and a subtraction process based on the signal supplied to the first readout circuit and the signal supplied to the second readout circuit, thereby outputting the signal based on the signals supplied to the first readout circuit and the second readout circuit, respectively.

[0086] (Item 17) The photoelectric conversion device described in item 16, characterized in that the third readout circuit performs at least one of an addition process and a subtraction process based on the signal supplied to the third readout circuit and the signal supplied to the fourth readout circuit, thereby outputting the signal based on the signals supplied to the third readout circuit and the fourth readout circuit, respectively.

[0087] (Item 18) 18. The photoelectric conversion device according to item 16 or 17, wherein the first readout circuit weights the signal supplied to the first readout circuit and the signal supplied to the second readout circuit.

[0088] (Item 19) The photoelectric conversion device described in any one of items 1 to 18, characterized in that the first readout circuit is capable of switching between an operation of outputting a signal supplied to the first readout circuit and an operation of outputting a signal based on signals supplied to the first readout circuit and the second readout circuit, respectively.

[0089] (Item 20) The photoelectric conversion device described in any one of items 1 to 19, characterized in that the third readout circuit is capable of switching between an operation of outputting a signal supplied to the third readout circuit and an operation of outputting a signal based on signals supplied to the third readout circuit and the fourth readout circuit, respectively.

[0090] (Item 21) A photoelectric conversion device according to any one of items 1 to 20, a processing device that processes a signal output from the photoelectric conversion device; An apparatus characterized by comprising:

[0091] The invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]

[0092] 100: Photoelectric conversion device, 101: Pixel array, 106: Switching circuit, 111: Pixel, 301, 311: Signal line, 401, 411: Readout circuit

Claims

1. a pixel array including a plurality of pixels arranged in a plurality of rows and a plurality of columns; a plurality of signal lines for reading out signals from the pixel array; a plurality of readout circuits, the number of which is greater than the number of the signal lines; a switching circuit that switches connections between the plurality of signal lines and the plurality of readout circuits, the plurality of readout circuits include a first readout circuit, a second readout circuit, a third readout circuit, and a fourth readout circuit, the first readout circuit being configured to be able to output a signal based on a signal supplied to the first readout circuit and the second readout circuit, respectively, and the third readout circuit being configured to be able to output a signal based on a signal supplied to the third readout circuit and the fourth readout circuit, respectively; the plurality of signal lines include a first signal line and a second signal line; the switching circuit is configured to be able to switch settings between a first setting in which the first signal line is connected to the first readout circuit and the second signal line is connected to the second readout circuit, and a second setting in which the first signal line is connected to the third readout circuit and the second signal line is connected to the fourth readout circuit.

2. 2. The photoelectric conversion device according to claim 1, wherein the switching circuit switches the setting from the first setting to the second setting when the first readout circuit does not satisfy predetermined characteristics.

3. 2. The photoelectric conversion device according to claim 1, wherein in the first setting, none of the plurality of signal lines is connected to the third readout circuit and the fourth readout circuit.

4. the plurality of readout circuits further include a fifth readout circuit and a sixth readout circuit, the fifth readout circuit being configured to be able to output a signal based on a signal supplied to the fifth readout circuit and the sixth readout circuit, respectively; the plurality of signal lines further include a third signal line and a fourth signal line; The switching circuit In the first setting, the third signal line is connected to the third readout circuit, and the fourth signal line is connected to the fourth readout circuit; 2. The photoelectric conversion device according to claim 1, wherein in the second setting, the third signal line is connected to the fifth readout circuit, and the fourth signal line is connected to the sixth readout circuit.

5. the plurality of readout circuits further include a seventh readout circuit and an eighth readout circuit, the seventh readout circuit being disposed between the first readout circuit and the second readout circuit; the plurality of signal lines further includes a fifth signal line; 2. The photoelectric conversion device according to claim 1, wherein the switching circuit connects the fifth signal line to the seventh readout circuit in the first setting, and connects the fifth signal line to the eighth readout circuit in the second setting.

6. 6. The photoelectric conversion device according to claim 5, wherein in the first setting, none of the plurality of signal lines is connected to the eighth readout circuit.

7. the plurality of readout circuits further includes a ninth readout circuit; the plurality of signal lines further includes a sixth signal line; 6. The photoelectric conversion device according to claim 5, wherein the switching circuit connects the sixth signal line to the eighth readout circuit in the first setting, and connects the sixth signal line to the ninth readout circuit in the second setting.

8. the plurality of readout circuits further include a seventh readout circuit, an eighth readout circuit, a tenth readout circuit, and an eleventh readout circuit, the seventh readout circuit being disposed between the first readout circuit and the second readout circuit and being configured to be able to output a signal based on a signal supplied to the seventh readout circuit and the tenth readout circuit, respectively; and the eighth readout circuit being configured to be able to output a signal based on a signal supplied to the eighth readout circuit and the eleventh readout circuit, respectively; the plurality of signal lines further include a fifth signal line and a seventh signal line; The switching circuit In the first setting, the fifth signal line is connected to the seventh readout circuit, and the seventh signal line is connected to the tenth readout circuit; 2. The photoelectric conversion device according to claim 1, wherein, in the second setting, the fifth signal line is connected to the eighth readout circuit, and the seventh signal line is connected to the eleventh readout circuit.

9. the plurality of readout circuits further includes a twelfth readout circuit; the plurality of signal lines further includes an eighth signal line; the second readout circuit is disposed between the first readout circuit and the third readout circuit, the third readout circuit is disposed between the second readout circuit and the fourth readout circuit, and the first readout circuit is disposed between the twelfth readout circuit and the second readout circuit, 2. The photoelectric conversion device according to claim 1, wherein the switching circuit connects the eighth signal line to the twelfth readout circuit in the first setting and the second setting.

10. 2. The photoelectric conversion device according to claim 1, wherein each signal line is arranged to correspond to each column of the plurality of pixels.

11. 2. The photoelectric conversion device according to claim 1, wherein the plurality of signal lines are arranged so that a predetermined number of the signal lines correspond to each column of the plurality of pixels.

12. the plurality of signal lines, the switching circuit, and the plurality of readout circuits form one group, The photoelectric conversion device according to claim 1 , wherein the photoelectric conversion device includes a plurality of groups including a first group and a second group.

13. 13. The photoelectric conversion device according to claim 12, wherein the pixel array is arranged between a block of the plurality of readout circuits belonging to the first group and a block of the plurality of readout circuits belonging to the second group.

14. The photoelectric conversion device described in claim 12, characterized in that the block of the plurality of readout circuits belonging to the first group and the block of the plurality of readout circuits belonging to the second group are arranged in a row direction that intersects the column direction in which the plurality of signal lines extend.

15. 2. The photoelectric conversion device according to claim 1, wherein an input of one of the plurality of readout circuits that is not connected to any of the plurality of signal lines is connected to a fixed potential.

16. The photoelectric conversion device described in claim 1, characterized in that the first readout circuit outputs the signal based on the signals supplied to the first readout circuit and the second readout circuit, respectively, by performing at least one of an addition process and a subtraction process based on the signal supplied to the first readout circuit and the signal supplied to the second readout circuit.

17. The photoelectric conversion device described in claim 16, characterized in that the third readout circuit outputs the signal based on the signals supplied to the third readout circuit and the fourth readout circuit, respectively, by performing at least one of an addition process and a subtraction process based on the signal supplied to the third readout circuit and the signal supplied to the fourth readout circuit.

18. 17. The photoelectric conversion device according to claim 16, wherein the first readout circuit weights the signal supplied to the first readout circuit and the signal supplied to the second readout circuit.

19. The photoelectric conversion device described in claim 1, characterized in that the first readout circuit is capable of switching between an operation of outputting a signal supplied to the first readout circuit and an operation of outputting a signal based on signals supplied to the first readout circuit and the second readout circuit, respectively.

20. The photoelectric conversion device described in claim 1, characterized in that the third readout circuit is capable of switching between an operation of outputting a signal supplied to the third readout circuit and an operation of outputting a signal based on signals supplied to the third readout circuit and the fourth readout circuit, respectively.

21. The photoelectric conversion device described in claim 19, characterized in that the third readout circuit is capable of switching between an operation of outputting a signal supplied to the third readout circuit and an operation of outputting a signal based on signals supplied to the third readout circuit and the fourth readout circuit, respectively.

22. The photoelectric conversion device according to any one of claims 1 to 21, a processing device that processes a signal output from the photoelectric conversion device; An apparatus characterized by comprising:

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