Light-emitting display apparatus
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-08-22
- Publication Date
- 2026-04-07
AI Technical Summary
As the resolution of light emitting display devices increases, the distance between sub-pixels decreases, leading to issues such as image distortion due to lateral current leakage between adjacent sub-pixels, poor visibility from adjacent sub-pixels emitting light at low gradations, and a decrease in color reproduction ratio.
The light emitting display device incorporates a bank with at least one protrusion to block horizontal leakage current, and arranges the light emitting element layer along a bend on the bank to prevent electron movement to adjacent sub-pixels, thereby increasing the distance electrons travel and improving color reproduction.
The solution effectively blocks horizontal leakage current, enhances visibility by preventing electron movement to adjacent pixels, and improves color reproduction by addressing issues related to low gray levels.
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Abstract
Description
[Technical Field]
[0001] The present invention relates to a light-emitting display device. [Background technology]
[0002] 2. Description of the Related Art Recently, display devices capable of displaying various information and interacting with users viewing the information are required to have various sizes, shapes, and functions.
[0003] Such display devices include liquid crystal display devices (LCDs), electrophoretic display devices (FPDs), and light emitting diode display devices (LEDs).
[0004] Unlike liquid crystal displays (LCDs), emissive displays do not require a separate light source and can be manufactured in a lightweight and thin form. Furthermore, emissive displays are advantageous in terms of power consumption due to their low voltage operation, and are also excellent in color representation, response speed, viewing angle, and contrast ratio (CR), making them the subject of research as next-generation displays.
[0005] Although the light emitting display device will be described as an organic light emitting display device, the type of the light emitting element layer is not limited thereto.
[0006] A light emitting display device displays information on a screen by emitting light from a plurality of pixels including a light emitting element layer having a light emitting layer. Depending on the method of driving the pixels, the light emitting display device can be classified as an active matrix type light emitting display device or a passive matrix type light emitting display device.
[0007] An active matrix type light emitting display device uses thin film transistors (or "TFTs") to control the current flowing through light emitting diodes to display images.
[0008] An organic light-emitting display device has an anode electrode, a light-emitting layer, and a cathode electrode. When voltage is applied to the anode electrode and the cathode electrode, holes move from the anode electrode and electrons move from the cathode electrode to the light-emitting layer. When holes and electrons combine in the light-emitting layer, excitons are formed during the excitation process, and light is generated by the energy from the excitons.
[0009] In order to provide high quality video information, the resolution of light emitting displays is becoming higher and higher. Summary of the Invention [Problem to be solved by the invention]
[0010] As the resolution of a light emitting display device increases, the distance between sub-pixels decreases. However, this can cause a problem in that image information is distorted due to current leaking laterally between adjacent sub-pixels.
[0011] The present invention provides a light emitting display device including a bank having at least one protrusion for blocking horizontal leakage current that increases as the distance between adjacent sub-pixels decreases.
[0012] Another object of the present invention is to provide an emissive display device in which the light emitting element layer is arranged along a bend formed on the top of a bank to prevent electrons formed inside the light emitting element layer from moving to an adjacent pixel during operation, thereby increasing the distance that electrons move to an adjacent subpixel.
[0013] Another object of the present invention is to provide an emissive display device having a structure for blocking horizontal leakage current to solve the visibility problem caused by adjacent sub-pixels emitting light at low gradations and to improve color reproduction ratio. [Means for solving the problem]
[0014] An emissive display device according to an embodiment of the present invention includes a substrate including a non-emissive portion located between an emissive portion and an emissive portion, a first subpixel and a second subpixel located in the emissive portion, a first electrode disposed on the substrate in the first subpixel and the second subpixel, respectively, a bank disposed on the first electrode and in the non-emissive portion and having at least one protrusion on its upper surface, a light-emitting element layer disposed on the first electrode and the bank in the emissive portion and the non-emissive portion, including a plurality of emissive units and a charge generation layer disposed between two adjacent emissive units of the plurality of emissive units, and a second electrode disposed on the light-emitting element layer. [Effects of the Invention]
[0015] The light emitting display device according to the embodiment of the present invention can block horizontal leakage current that increases as the distance between adjacent sub-pixels decreases by disposing a bank including at least one protrusion.
[0016] In the light emitting display device according to an embodiment of the present invention, the light emitting element layer is arranged along a bend formed on the top of the bank, thereby increasing the distance that electrons move to adjacent subpixels, and preventing electrons formed inside the light emitting element layer from moving to adjacent pixels during operation.
[0017] The light emitting display device according to the embodiment of the present invention can solve the problem of poor visibility caused by adjacent pixels emitting light at low gray levels and can improve color reproduction ratio.
[0018] The effects of the present invention are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description. [Brief explanation of the drawings]
[0019] [Figure 1] 1 is a plan view of a light emitting display device according to an embodiment of the present invention; [Figure 2] 1 is a circuit diagram of a subpixel of a light emitting display device according to an embodiment of the present invention; [Figure 3a]1 is a diagram illustrating an arrangement of sub-pixels of a light emitting display device according to an embodiment of the present invention; [Figure 3b] 1 is a diagram illustrating an arrangement of sub-pixels of a light emitting display device according to an embodiment of the present invention; [Figure 3c] 1 is a diagram illustrating an arrangement of sub-pixels of a light emitting display device according to an embodiment of the present invention; [Figure 4] 1 is a cross-sectional view of a light emitting display device according to an embodiment of the present invention. [Figure 5] 5 is an enlarged cross-sectional view of the light emitting element layer of FIG. 4. FIG. [Figure 6] 1 is a cross-sectional view illustrating a sealing layer and a touch sensor layer disposed on a substrate according to an embodiment of the present invention. [Figure 7] 1 is a cross-sectional view illustrating a color filter layer disposed on a substrate according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION
[0020] The advantages and features of the present invention, as well as methods for achieving them, will become apparent from the following detailed description of the embodiments taken in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and may be embodied in various different forms. These embodiments are provided so that the disclosure of the present invention will be complete and will fully convey the scope of the invention to those skilled in the art.
[0021] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for illustrating the embodiments of the present invention are merely illustrative, and the present invention is not limited to the illustrated details. The same reference symbols indicate the same elements throughout the specification. Furthermore, in describing the present invention, if it is determined that a detailed description of related prior art may unnecessarily obscure the gist of the present invention, such a detailed description will be omitted. When using words such as "comprise," "have," and "consist" mentioned above, other parts may be added unless "only" is used. When a component is expressed in the singular, it also includes a plural unless otherwise explicitly stated.
[0022] When interpreting elements, the error range is interpreted as being included even if there is no separate explicit description of the error range.
[0023] In describing a positional relationship, for example, when the positional relationship between two parts is described using terms such as "above," "on top," "below," or "beside," one or more other parts may be located between the two parts unless terms such as "immediately" or "directly" are used.
[0024] When describing a temporal relationship, if the relationship of precedence or succeeding time is described using terms such as "after," "following," "next," or "before," it can also include cases where the relationship is not consecutive, as "immediately" or "directly" is not used.
[0025] Although terms such as "first," "second," etc. are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, a first component referred to below may be a second component within the technical concept of the present invention.
[0026] In describing components of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are merely used to distinguish the component from other components, and do not limit the nature, order, sequence, or number of the components. When a component is described as being "coupled," "coupled," or "connected" to another component, it should be understood that the component may be directly coupled or connected to the other component, but that other components may be "intervening" between components that may be indirectly coupled or connected unless otherwise explicitly stated.
[0027] "At least one" should be understood to include all combinations of one or more of the associated components. For example, the meaning of "at least one of the first, second, and third components" includes not only the first, second, or third component, but also all combinations of two or more of the first, second, and third components.
[0028] In the present invention, the term "apparatus" may include display devices such as liquid crystal modules (LCMs) and organic light emitting display modules (OLED modules) that include a display panel and a driver for driving the display panel, and may also include set electronic apparatuses or set devices or set apparatuses, such as notebook computers, televisions, computer monitors, automotive apparatuses or other forms of vehicles that are complete or final products that include an LCM or OLED module, and mobile electronic apparatuses such as smartphones or electronic pads.
[0029] Therefore, the device of the present invention can include a display device itself such as an LCM, an OLED module, etc., as well as an application product including an LCM, an OLED module, etc. or a set device which is a device for end consumers.
[0030] In some embodiments, an LCM or OLED module comprising a display panel and a driver may be referred to as a "display device," and a complete electronic device including the LCM or OLED module may be referred to as a "set device." For example, a display device may include a liquid crystal (LCD) or organic light emitting diode (OLED) display panel and a source PCB, which is a controller for driving the display panel. The set device may further include a set PCB, which is a set controller electrically connected to the source PCB and drives the entire set device.
[0031] The light emitting display device used in the embodiments of the present invention may be any type of display panel such as a liquid crystal display, an organic light emitting diode (OLED) display, or an electroluminescent display device, and the embodiments are not limited thereto. For example, the light emitting display device may be a light emitting display device that generates sound by vibrating using a vibration device according to the embodiments of the present invention. The display panel used in the light emitting display device according to the present invention is not limited in shape or size.
[0032] The features of the various embodiments of the present invention may be partially or fully combined or combined with each other, and various technical interlocking and driving mechanisms may be possible. Each embodiment may be implemented independently of the others, or may be implemented together in a related relationship.
[0033] The present invention will be described in detail with reference to the accompanying drawings and examples as follows: The scales of the components shown in the drawings are different from the actual scales for the convenience of explanation, and therefore, the present invention is not limited to the scales shown in the drawings.
[0034] Various embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
[0035] 1 is a plan view of a light emitting display device according to an embodiment of the present invention, and FIG 2 is a circuit diagram of a subpixel of the light emitting display device according to the embodiment of the present invention.
[0036] 1 and 2, the light emitting display device 100 may include various additional components for generating various signals and driving a plurality of subpixels SP in the display area AA. For example, the light emitting display device may include one or more driving circuits for controlling a display panel. The driving circuits for controlling (or driving) the subpixels SP may include a gate driver, a data signal line, a multiplexer (MUX), an electrostatic discharge (ESD) circuit, a high-potential voltage line VDD, a low-potential voltage line VSS, an inverter circuit, etc. The light emitting display device 100 may also include additional components in addition to the function of driving the subpixels SP. For example, the light emitting display device 100 may include additional components providing a touch sensing function, a user authentication function (e.g., fingerprint recognition), a multi-level pressure sensing function, a tactile feedback function, etc. The aforementioned additional components may be located in the non-display area NA or an external circuit connected to the connection interface.
[0037] The substrate 110 may include a display area (active area, AA) and a non-active area (non-active area, NA). The display area AA of the substrate may be an area where a plurality of pixels P are arranged and an image is displayed. The non-active area NA of the substrate may be an area where an image is not displayed. For example, the non-active area NA may be a bezel area, and is not limited to the term. The non-active area NA may be adjacent to the display area AA and disposed outside the display area AA. Alternatively, the non-active area NA may be disposed to surround all or part of the display area AA. Alternatively, the non-active area NA may be an area where a plurality of sub-pixels SP are not disposed, and is not limited thereto.
[0038] The pixel P disposed in the display area AA may further include a plurality of sub-pixels SP. The sub-pixel SP is an individual unit that emits light, and the plurality of sub-pixels SP may include, but are not limited to, a first sub-pixel SP_1, a second sub-pixel SP_2, a third sub-pixel SP_3, and / or a white sub-pixel.
[0039] Each sub-pixel SP is formed with an organic light emitting diode (OLED) and a driving circuit. For example, a display element for displaying an image and a driving circuit for driving (or controlling) the display element may be disposed in a plurality of sub-pixels SP.
[0040] Each subpixel SP may include a plurality of transistors, capacitors, and wirings. For example, the subpixel SP may be composed of two transistors and one capacitor (2T1C), but is not limited thereto, and may be embodied as a subpixel employing 3T1C, 4T1C, 5T1C, 6T1C, 7T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T2C, 8T2C, etc.
[0041] The non-display area NA is an area where various wirings and driving circuits for driving the sub-pixels SP arranged in the display area AA are arranged. For example, various ICs and driving circuits such as a gate driver and a data driver may be arranged in the non-display area NA.
[0042] Although FIG. 1 illustrates the non-display area NA surrounding the rectangular display area AA, the shape of the display area AA and the shape and arrangement of the non-display area NA adjacent to the display area AA are not limited to the example illustrated in FIG. 1. The display area AA and the non-display area NA may have shapes suitable for the design of an electronic device incorporating the light emitting display device 100. In the case of a display device for a wearable device, the display area AA may have a circular shape like a typical wristwatch, or the concept of the present embodiment may be applied to a free-form display device applicable to a vehicle instrument panel, etc. Exemplary shapes of the display area AA may be, but are not limited to, a pentagon, hexagon, octagon, circle, ellipse, etc.
[0043] A bending area (BA) may be provided in a portion of the non-display area NA. The bending area BA may be provided between the display area AA and the pad part 114 located in the non-display area NA. The bending area BA may also be an area where a connecting wiring part is formed.
[0044] The bending region BA may be a region in which a portion of the substrate 110 is bent (bent) to position the pad unit 114 and an external module bonded to the pad unit 114 toward the rear side of the substrate 110. For example, by bending the bending region BA toward the rear side of the substrate 110, the external module bonded to the pad unit 114 of the substrate 110 moves toward the rear side of the substrate 110, and the external module may not be visible when viewed from above the substrate 110. Furthermore, by bending the bending region BA, the size of the non-display region NA visible from above the substrate 110 may be reduced, thereby implementing a narrow bezel. Although the present invention has been illustrated as having the bending region BA in the non-display region NA, this is not limiting. For example, the bending region BA may be located in the display region AA. Since the display region AA itself can be bent in various directions, the bending region BA located in the display region AA may also have the effects described herein.
[0045] A pad unit 114 is disposed on one side of the non-display area NA. The pad unit 114 is a metal pattern to which an external module, such as a flexible printed circuit board (FPCB) or a chip on film (COF), is bonded. Although the pad unit 114 is illustrated as being disposed on one side of the substrate 110, the shape and arrangement of the pad unit 114 are not limited thereto.
[0046] A gate driver 112 may be disposed on the other side of the non-display area NA to provide gate signals to the thin film transistors. The gate driver 112 may include various gate driving circuits, which may be formed directly on the substrate 110. In this case, the gate driver 112 may be a GIP (Gate-In-Panel).
[0047] The gate driver 112 may be disposed between the display area of the substrate 110 and a dam DAM disposed in the non-display area NA.
[0048] A high-potential voltage wiring VDD, a low-potential voltage wiring VSS, a multiplexer (MUX), an electrostatic discharge (ESD) circuit, and a plurality of connecting wiring sections may be arranged between the display area AA and the pad section 114 of the non-display area NA.
[0049] A high potential voltage line VDD, a low potential voltage line VSS, a multiplexer (MUX), and an electrostatic discharge (ESD) circuit unit may be disposed between the display area AA and the bending area BA.
[0050] The connecting wiring portion may be disposed in the non-display area NA. For example, it may be disposed in a bending area BA of the non-display area NA where the substrate is bent. The connecting wiring portion may be configured to transmit signals (voltages) from an external module bonded to the pad portion 114 to the display area AA or a circuit portion such as the gate driver 112. For example, various signals such as various signals for driving the gate driver 112, data signals, high potential voltages, and low potential voltages may be transmitted through the connecting wiring portion.
[0051] A dam DAM may be arranged in the non-display area NA so as to surround all or part of the display area AA. The dam DAM may be arranged adjacent to the display area AA and outside the display area AA.
[0052] The dam DAM may be disposed along the periphery of the display area AA to control the flow of an organic layer, which is a material for a second sealing layer among sealing layers (described later) disposed on the light-emitting element layer. The number of dams DAM may be one or more.
[0053] The dam DAM may be disposed between the display area AA and the high potential voltage wiring VDD, the low potential voltage wiring VSS, a multiplexer (MUX), or an electrostatic discharge (ESD) circuit unit.
[0054] A crack detection wiring (Panel Crack Detector, PCD) may further be disposed in a portion of the non-display area NA of the substrate 110.
[0055] The crack detection wiring PCD may be disposed between the termination point (or end) of the substrate 110 and the dam DAM, or may be disposed below the dam DAM and may at least partially overlap the dam DAM.
[0056] Referring to FIG. 2, FIG. 2 illustrates an example of an emissive display device having a 3T1C structure including three thin film transistors and one storage capacitor, but the emissive display device of the present invention is not limited to this structure and may be applied to various structures such as 4T1C, 5T1C, 6T1C, 7T1C, 8T1C, 4T2C, 5T2C, 6T2C, 7T2C, and 8T2C.
[0057] Referring to FIG. 2, the light emitting display device 100 according to the embodiment of the present invention includes a gate line GL, a data line DL, a power line PL, and a sensing line SL, and each subpixel SP includes a first switching thin film transistor ST1, a second switching thin film transistor ST2, a driving thin film transistor DT, a light emitting element D, and a storage capacitor Cst.
[0058] The light emitting element D includes an anode electrode connected to the second node N2, a cathode electrode connected to the input terminal of the low potential driving voltage VSS, and a light emitting element layer located between the anode electrode and the cathode electrode.
[0059] The driving thin film transistor DT can control the current Id flowing through the light emitting element D by the gate-source voltage Vgs. The driving thin film transistor DT may have a gate electrode connected to a first node N1, a drain electrode connected to a power supply line PL to receive a high potential driving voltage EVDD, and a source electrode connected to a second node N2.
[0060] The storage capacitor Cst is connected between the first node N1 and the second node N2, and allows a constant voltage to be maintained for one frame.
[0061] The first switching thin film transistor ST1 applies the data voltage Vdata charged on the data line DL to the first node N1 in response to the gate signal SCAN when driven, thereby turning on the driving thin film transistor DT. At this time, the first switching thin film transistor ST1 may have a gate electrode connected to the gate line GL to receive the gate signal SCAN, a drain electrode connected to the data line DL to receive the data voltage Vdata, and a source electrode connected to the first node N1.
[0062] The second switching thin film transistor ST2 stores the source voltage of the second node N2 in the sensing capacitor Cx of the sensing voltage readout line SRL by switching the current between the second node N2 and the sensing voltage readout line SRL in response to the sensing signal SEN. The second switching thin film transistor ST2 resets the source voltage of the driving thin film transistor DT to the initialization voltage Vpre by switching the current between the second node N2 and the sensing voltage readout line SRL in response to the sensing signal SEN when the display panel is driven. At this time, the gate electrode of the second switching thin film transistor ST2 is connected to the sensing line SL, the drain electrode is connected to the second node N2, and the source electrode is connected to the sensing voltage readout line SRL.
[0063] 3a to 3c are diagrams illustrating the arrangement of sub-pixels in a light emitting display device according to an embodiment of the present invention.
[0064] 3a to 3c, the substrate 110 may include a light-emitting portion EA and a non-light-emitting portion NEA disposed between the light-emitting portions. A plurality of light-emitting portions EA may be disposed on the substrate, spaced apart from each other. The non-light-emitting portion NEA may be disposed to surround the light-emitting portion.
[0065] The light emitting portion EA is a region in the light emitting layer that emits light to the outside, and may be a region where the bank 420 is not disposed, as shown in FIG.
[0066] The non-light-emitting area NEA is an area in the light-emitting layer where light is not emitted to the outside, and may be an area where the bank 420 is disposed, as shown in FIG.
[0067] The plurality of pixels P arranged in the light emitting unit EA may include a first sub-pixel SP_1, a second sub-pixel SP_2, and a third sub-pixel SP_3.
[0068] Each of the first to third sub-pixels SP_1, SP_2, and SP_3 may include a light-emitting portion EA.
[0069] 3a to 3c, each pixel P may include sub-pixels SP each emitting a different color, such as a first sub-pixel SP_1, a second sub-pixel SP_2, and a third sub-pixel SP_3.
[0070] Exemplary shapes of the first sub-pixel SP_1, the second sub-pixel SP_2, and the third sub-pixel SP_3 may be, but are not limited to, a square, a pentagon, a hexagon, an octagon, a circle, an ellipse, and the like.
[0071] 3c, one pixel P may be arranged with at least a plurality of sub-pixels SP emitting different colors, for example, a plurality of sub-pixels SP_2 emitting the same color.
[0072] The first to third sub-pixels SP_1 to SP_3 can emit light of different colors. In the present invention, it is assumed that the first sub-pixel SP_1 emits red light, the second sub-pixel SP_2 emits green light, and the third sub-pixel SP_3 emits blue light. However, the colors emitted from the light-emitting layers are not limited thereto.
[0073] The third sub-pixel SP_3 may have a larger area than the other sub-pixels, and the distance between the third sub-pixel SP_3 and the other adjacent sub-pixels may be smaller than the distance between the first sub-pixel SP_1 and the second sub-pixel SP_2.
[0074] Referring to FIGS. 3a to 3c, the third sub-pixel SP_3 may be disposed across other sub-pixels.
[0075] The first to third sub-pixels SP_1 to SP_3 realize high resolution in the light emitting display device, and thus the distance between the sub-pixels is reduced.
[0076] The light emitting display device 100 may include a light emitting device layer including a plurality of light emitting units, and may further include a charge generation layer between the plurality of light emitting units, which controls charge balance between the plurality of light emitting units.
[0077] The charge generation layer may be composed of multiple layers, including a first charge generation layer and a second charge generation layer. The first charge generation layer may include an N-type charge generation layer and a P-type charge generation layer. The first charge generation layer may be an organic layer doped with an alkali metal such as lithium (Li), sodium (Na), potassium (K), or cesium (Cs), or an alkaline earth metal such as magnesium (Mg), strontium (Sr), barium (Ba), or radium (Ra). In this case, the metal contained in the first charge generation layer generates lateral leakage current (LLC).
[0078] For example, when a specific sub-pixel is operated, a current leaking laterally between adjacent pixels causes the adjacent sub-pixel to emit weak light, resulting in distortion of image information.
[0079] The driving voltage required for the third sub-pixel SP_3 to emit blue light may be greater than the driving voltage required for the other sub-pixels SP_3 to emit red or green light.
[0080] When the third subpixel SP_3 is driven, the adjacent subpixels are weakly driven. This occurs because electrons from the third subpixel SP_3 move to the adjacent subpixels through the first charge generation layer, which is continuously arranged between the adjacent pixels, causing them to be weakly driven. As a result, the adjacent subpixels, which are not driven, are in a state similar to that of a driven state, emitting weak light. This causes a decrease in color purity and a decrease in color gamut. This phenomenon is often visible at low gradations.
[0081] Fig. 4 is a cross-sectional view of a light emitting display device according to an embodiment of the present invention, Fig. 4 is a cross-sectional view taken along line II' in Figs. 3a to 3c, Fig. 5 is an enlarged cross-sectional view of a light emitting element layer in Fig. 4.
[0082] Referring to FIG. 4, the light emitting display device 100 according to the embodiment of the present invention may include a substrate 110, a bank 420, a first light emitting unit 431, a charge generation layer 432, and a second light emitting unit 433.
[0083] The substrate 110 can support various components of the light emitting display device and can be made of glass or a flexible plastic material.
[0084] For example, the substrate 110 may be formed of at least one of polyimide (PI), polymethylmethacrylate (PMMA), polyethylene terephthalate (PET), polyethersulfone, and polycarbonate, but is not limited thereto.
[0085] When the substrate 110 is made of a plastic material, for example, polyimide, the manufacturing process of the light emitting display device is performed in a state where a support substrate made of glass is disposed under the substrate 110, and after the manufacturing process of the light emitting display device is completed, the support substrate may be released or laser trimmed. Also, after the support substrate is released, a back plate for supporting the substrate 110 may be disposed under the substrate 110.
[0086] When the substrate 110 is made of polyimide, moisture may penetrate the substrate 110 made of polyimide and reach the thin film transistor or light emitting element layer, thereby degrading the performance of the light emitting display device. The light emitting display device according to an embodiment of the present invention may be configured with two polyimides to prevent degradation of the display device's performance due to moisture penetration. In addition, by forming an inorganic film between the two polyimides, moisture may be prevented from penetrating the lower polyimide, thereby improving the performance reliability of the product. The inorganic film may be, but is not limited to, a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or multiple layers thereof.
[0087] The substrate 110 may be referred to as a concept including elements and functional layers formed on the substrate 110, such as a switching thin film transistor, a driving thin film transistor connected to the switching thin film transistor, an organic light-emitting element connected to the driving thin film transistor, a protective layer, etc., but is not limited thereto.
[0088] The buffer layer 120 may be disposed on the entire surface of the substrate 110. The buffer layer 120 may improve adhesion between the substrate and layers formed thereon and may block various types of defects, such as alkaline components leaking from the substrate 110. The buffer layer 120 may also slow the diffusion of moisture or oxygen that has penetrated into the substrate 110.
[0089] The buffer layer 120 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx), or multiple layers thereof. When the buffer layer 120 is composed of multiple layers, silicon oxide (SiOx) and silicon nitride (SiNx) may be formed alternately.
[0090] The buffer layer 120 may be omitted depending on the type and material of the substrate 110, the structure and type of the thin film transistor, and the like.
[0091] A first thin film transistor 200 and a second thin film transistor 300 may be disposed on the buffer layer 120. The first thin film transistor 200 and the second thin film transistor 300 may each include a semiconductor pattern, a gate electrode, a source electrode, and a drain electrode.
[0092] For convenience of explanation, only a driving thin film transistor is illustrated among various thin film transistors that may be included in the light emitting display device 100, but other thin film transistors such as a switching thin film transistor may also be included in the light emitting display device 100. Also, for convenience of explanation, the thin film transistor has been described as having a top gate structure, but is not limited to this structure and may be embodied in other structures such as a bottom gate structure.
[0093] A first semiconductor pattern 210 of the first thin film transistor 200 and a second semiconductor pattern 310 of the second thin film transistor 300 may be disposed on the buffer layer 120 .
[0094] The first semiconductor pattern 210 and the second semiconductor pattern 310 may be made of a polycrystalline semiconductor. For example, the polycrystalline semiconductor may be made of, but is not limited to, low temperature polysilicon (LTPS), which has high mobility. When the semiconductor pattern is made of a polycrystalline semiconductor, it has low energy consumption and excellent reliability.
[0095] As another example, the first semiconductor pattern 210 and the second semiconductor pattern 310 may be made of an oxide semiconductor, such as, but not limited to, IGZO (Indium-gallium-zinc-oxide), IZO (Indium-zinc-oxide), IGTO (Indium-gallium-tin-oxide), and IGO (Indium-gallium-oxide). When the first semiconductor pattern 210 and the second semiconductor pattern 310 are made of an oxide semiconductor, they have an excellent effect of blocking leakage current, thereby minimizing brightness changes of sub-pixels during low-speed driving.
[0096] When the first semiconductor pattern 210 and the second semiconductor pattern 310 are made of a polycrystalline semiconductor or an oxide semiconductor, some regions of the first semiconductor pattern 210 and the second semiconductor pattern 310 may be doped with impurities.
[0097] As another example, the first semiconductor pattern 210 and the second semiconductor pattern 310 may be made of amorphous silicon (a-Si), or may be made of various organic semiconductor materials such as pentacene, but are not limited thereto.
[0098] A first insulating layer 130 may be disposed on the first semiconductor pattern 210 and the second semiconductor pattern 310 .
[0099] The first insulating layer 130 may be disposed between the first and second semiconductor patterns 210 and 310 and the first and second gate electrodes 230 and 330 .
[0100] The first insulating layer 130 may insulate the first semiconductor pattern 210 from the first gate electrode 230. The first insulating layer 130 may insulate the second semiconductor pattern 310 from the second gate electrode 330.
[0101] The first insulating layer 130 may be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating organic material, but is not limited thereto.
[0102] The first insulating layer 130 may have holes to electrically connect each of the first source electrode 250 and the first drain electrode 270 to the first semiconductor pattern 210. The first insulating layer 130 may also have holes to electrically connect each of the second source electrode 350 and the second drain electrode 370 to the second semiconductor pattern 310.
[0103] A first gate electrode 230 of the first thin film transistor 200 and a second gate electrode 330 of the second thin film transistor 300 may be disposed on the first insulating layer 130 .
[0104] The first gate electrode 230 may be disposed to overlap the first semiconductor pattern 210 , and the second gate electrode 330 may be disposed to overlap the second semiconductor pattern 310 .
[0105] The first gate electrode 230 and the second gate electrode 330 may be formed of a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), gold (Au), and transparent conductive oxide (TCO), or an alloy thereof, but are not limited thereto.
[0106] A second insulating layer 140 may be disposed on the first gate electrode 230 and the second gate electrode 330 .
[0107] The second insulating layer 140 may be disposed between the first gate electrode 230 and the second gate electrode 330 and the first source electrode 250 , the first drain electrode 270 , the second source electrode 350 , and the second drain electrode 370 .
[0108] The second insulating layer 140 can insulate the first gate electrode 230 from the first source electrode 250 and the second drain electrode 270. The second insulating layer 140 can also insulate the second gate electrode 330 from the second source electrode 350 and the second drain electrode 370.
[0109] The first insulating layer 140 may be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), or may be formed of an insulating organic material, but is not limited thereto.
[0110] The second insulating layer 140 may have holes to electrically connect each of the first source electrode 250 and the first drain electrode 270 to the first semiconductor pattern 210. The second insulating layer 140 may also have holes to electrically connect each of the second source electrode 350 and the second drain electrode 370 to the second semiconductor pattern 310.
[0111] A first source electrode 250 and a first drain electrode 270 of the first thin film transistor 200 may be disposed on the second insulating layer 140. A second source electrode 350 and a second drain electrode 370 of the second thin film transistor 300 may be disposed on the second insulating layer 140.
[0112] The first source electrode 250 and the first drain electrode 270 may be electrically connected to the first semiconductor pattern 210 through holes in the first insulating layer 130 and the second insulating layer 140 .
[0113] The second source electrode 350 and the second drain electrode 370 may be electrically connected to the second semiconductor pattern 310 through holes in the first insulating layer 130 and the second insulating layer 140 .
[0114] The first source electrode 250, the first drain electrode 270, the second source electrode 350, and the second drain electrode 370 may be formed of a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), gold (Au), and transparent conductive oxide (TCO), or an alloy thereof, but is not limited thereto.
[0115] For example, the first source electrode 250, the first drain electrode 270, the second source electrode 350, and the second drain electrode 370 may have a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) made of a conductive metal material, but is not limited thereto.
[0116] A data line DL or a power supply line PL may be further disposed in the non-light-emitting area NEA on the second insulating layer 140. In this case, the data line DL or the power supply line PL may be formed of the same material, structure, or manufacturing method as the first source electrode 250, the first drain electrode 270, the second source electrode 350, and the second drain electrode 370.
[0117] The data lines DL or power lines PL may be arranged between adjacent subpixels. The power lines PL may be arranged parallel to the data lines DL. The power lines PL may be formed together with connecting electrodes (to be described later) when they are arranged.
[0118] The power supply wiring PL may be a wiring arranged in the light emitting section EA, branched from a high potential voltage wiring VDD arranged in the non-light emitting section NEA, and may be provided with a high potential driving voltage EVDD.
[0119] The power supply wiring PL may extend parallel to or intersect with one of the gate wiring and the data wiring, or may be formed in a mesh pattern of metal lines having small line widths intersecting each other. The shape of the mesh pattern may be, but is not limited to, a square, pentagon, hexagon, circle, ellipse, etc.
[0120] A protective layer 150 may be disposed on the first source electrode 250 , the first drain electrode 270 , the second source electrode 350 , and the second drain electrode 370 .
[0121] The protective layer 150 can protect the first thin film transistor 200 and the second thin film transistor 300. The protective layer 150 can be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), or can also be formed of an insulating organic material, but is not limited thereto.
[0122] The protective layer 150 may have holes to electrically connect the first anode electrode 410-A of the first thin film transistor 200. Alternatively, the protective layer 150 may have holes to electrically connect the second anode electrode 410-B of the second thin film transistor 300. The protective layer 150 may be omitted depending on the design of the light emitting display device 100.
[0123] A planarization layer 160 may be disposed on the protective layer 150. Alternatively, the planarization layer 160 may be disposed on the first thin film transistor 200 and the second thin film transistor 300.
[0124] The planarization layer 160 protects the thin film transistors disposed below the planarization layer 160 and can reduce or planarize steps due to various patterns.
[0125] The planarization layer 160 may be formed of at least one organic insulating material such as, but not limited to, BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.
[0126] The planarization layer 160 may be arranged in a single layer, but may also be arranged in a multi-layer structure of two or more layers in consideration of the arrangement of the electrodes.
[0127] As the light emitting display device 100 evolves to higher resolution, the number of various signal wirings increases, making it difficult to arrange all wirings on one layer while maintaining a minimum spacing, and additional layers may be created. Such additional layers provide more space for wiring arrangement, making it easier to design the arrangement of electrical wires / electrodes. Furthermore, if a dielectric material is used in the multi-layered planarization layer, the planarization layer 160 may be used to form capacitance between metal layers.
[0128] When the planarization layer 160 is arranged in two layers, it may include a lower planarization layer and an upper planarization layer.
[0129] For example, a hole may be formed in the upper planarization layer, and a connection electrode may be disposed in the hole to electrically connect the thin film transistor and the light emitting device layer through the connection electrode.
[0130] One end (or a portion) of the connecting electrode may be connected to the thin film transistor, and the other end (or another portion) of the connecting electrode may be connected to the light emitting element layer.
[0131] A first anode electrode 410-A and a second anode electrode 410-B may be disposed on the planarization layer 160.
[0132] The first anode electrode 410-A may be electrically connected to the first drain electrode 270 through a hole in the planarization layer 160. The second anode electrode 410-B may be electrically connected to the second drain electrode 370 through a hole in the planarization layer 160. Alternatively, if the light emitting display device 100 further includes a connecting electrode, the first anode electrode 410-A and the second anode electrode 410-B may be electrically connected to the respective drain electrodes through the connecting electrode.
[0133] If the light emitting display device 100 is a top emission type, the first anode electrode 410-A and the second anode electrode 410-B may be disposed using an opaque conductive material as a reflective electrode that reflects light. The first anode electrode 410-A and the second anode electrode 410-B may be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof. For example, the first anode electrode 410-A and the second anode electrode 410-B may have a three-layer structure of silver (Ag), lead (Pd), and copper (Cu), but are not limited thereto. Alternatively, the first anode electrode 410-A and the second anode electrode 410-B may further include a transparent conductive material layer with a high work function, such as indium tin oxide (ITO).
[0134] When the light emitting display device 100 is a bottom emission type, the first anode electrode 410-A and the second anode electrode 410-B may be disposed using a transparent conductive material that transmits light. For example, the first anode electrode 410-A and the second anode electrode 410-B may be formed of at least one of indium tin oxide (ITO) and indium zinc oxide (IZO).
[0135] A bank 420 may be disposed on the first anode electrode 410 -A, the second anode electrode 410 -B, and the planarization layer 160 .
[0136] The bank 420 can divide a plurality of sub-pixels SP, minimize light bleeding, and prevent color mixing that occurs at various viewing angles.
[0137] The bank 420 can separate the light-emitting portion EA from the non-light-emitting portion NEA, and the bank 420 can be disposed in the non-light-emitting portion NEA.
[0138] The bank 420 may have bank holes that expose the first anode electrode 410-A and the second anode electrode 410-B.
[0139] The bank 420 may be made of at least one of inorganic insulating materials such as silicon nitride (SiNx) or silicon oxide (SiOx), organic insulating materials such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, or a photosensitive material containing a black pigment, but is not limited to these.
[0140] The bank 420 can be formed transparent or black (or blackish) or colored.
[0141] The bank 420 may be disposed over or covering the ends of the first anode electrode 410-A and the second anode electrode 410-B.
[0142] The bank 420 may have at least two thicknesses, and the upper surface of the bank 420 may have a curvature due to the at least two thicknesses.
[0143] The bank 420 may have at least one protrusion 420p. The protrusion 420p of the bank 420 may be formed by removing a portion of the bank 420. The protrusion 420p of the bank 420 may have a first thickness T1. The area excluding the area where the protrusion 420p is formed may have a second thickness T2 different from the first thickness T1. That is, the bank 420 may have a bend in a portion 420nea of the bank 420 between two adjacent subpixels, and therefore may have different heights.
[0144] The first thickness T1 of the bank 420 may be greater than the second thickness T2 of the bank 420. The second thickness T2 of the bank 420 may be 1 / 2 to 1 / 3 of the first thickness of the bank 420.
[0145] The protrusion 420p of the bank 420 may be an area overlapping the data line DL or the power line PL. The width W1 of the protrusion 420p may be greater than the width W2 of the data line DL or the power line PL. This prevents the data line DL or the power line PL from reflecting external light and being visible to the user.
[0146] The second thickness T2 of the bank 420 may be formed by removing a portion of the bank 420. As shown in the figure, the bend or bent portion of the bank 420 may be formed in a shape that is obliquely recessed from the upper surface, but is not limited thereto and may be formed in various shapes.
[0147] The protrusions or bends (or bent portions) formed on the bank 420 may increase the length over which the light-emitting element layer disposed on the bank 420 is disposed. For example, the light-emitting element layer is disposed along the protrusions 420p formed on the bank and the bends where the protrusions 420p are not formed. This increases the distance electrons in the light-emitting element layer travel to adjacent subpixels, thereby preventing electrons formed in the light-emitting element layer from traveling to adjacent subpixels during operation. That is, the electron transfer path between two adjacent subpixels is formed along the bent portion of the top surface of the bank 420, for example, along the protrusions and recesses. Therefore, the distance of the electron transfer path (electron transfer passage) through which electrons travel from one subpixel to the other of two adjacent subpixels is greater than the distance between the two adjacent subpixels.
[0148] A light emitting element layer 430 may be disposed on the bank 420 and the first and second anode electrodes 410-A and 410-B.
[0149] The light-emitting element layer 430 can include a first light-emitting unit 431 , a charge-generating layer 432 , and a second light-emitting unit 433 .
[0150] The light emitting element layer 430 can be disposed along the bends formed on the top surface of the bank.
[0151] For ease of explanation, only two light-emitting units are shown, but more than two light-emitting units and one or more charge-generating layers contained between the two or more light-emitting units may be included.
[0152] The light emitting element layer of the present invention will be described in detail below with reference to Fig. 5. Fig. 5 is an enlarged cross-sectional view of the light emitting element layer of Fig. 4.
[0153] Referring to FIG. 5, a first light-emitting unit 431 may be disposed on the bank 420 and the first and second anode electrodes 410-A and 410-B.
[0154] The first light-emitting unit 431 can include a hole-injection layer HIL, a first hole-transport layer HTL-1, a first light-emitting layer EML-1, and a first electron-transport layer ETL-1.
[0155] As shown in FIG. 5, the first light-emitting layer EML-1 can include multiple sub-light-emitting layers, such as a first sub-light-emitting layer EML-1A and a second sub-light-emitting layer EML-1B.
[0156] The hole injection layer HIL, the first hole transport layer HTL-1, and the first electron transport layer ETL-1 may be disposed corresponding to all of the subpixels, for example, they may be disposed continuously without any break between each subpixel and adjacent subpixels, or they may be disposed discontinuously with at least a partial break between each subpixel and adjacent subpixels.
[0157] The hole injection layer HIL may be disposed on the bank 420, the first anode electrode 410-A, and the second anode electrode 410-B. The hole injection layer may be disposed along the bend formed on the top surface of the bank.
[0158] The hole injection layer HIL serves to facilitate the injection of holes and may be made of, but is not limited to, one or more selected from the group consisting of HATCN (1,4,5,8,9,11-hexaazatriphenylene-hexanitrile), CuPc (cupper phthalocyanine), PEDOT (poly(3,4)-ethylenedioxythiophene), PANI (polyaniline), and NPD (N,N-dinaphthyl-N,N'-diphenylbenzidine).
[0159] The first hole transport layer HTL-1 may be disposed on the hole injection layer HIL. The first hole transport layer HTL-1 may be disposed along the bend formed on the top surface of the bank.
[0160] The first hole transport layer HTL-1 functions to facilitate the transport of holes and may be composed of, but is not limited to, one or more selected from the group consisting of NPD (N,N-dinaphthyl-N,N'-diphenylbenzidine), TPD (N,N'-bis-(3-methylphenyl)-N,N'-bis-(phenyl)-benzidine), s-TAD, and MTDATA (4,4',4"-Tris(N-3-methylphenyl-N-phenyl-amino)-triphenylamine).
[0161] A first sub-emissive layer EML-1A and a second sub-pixel emissive layer EML-1B can be disposed on the hole-transporting layer HTL-1.
[0162] The first and second sub-emitting layers EML-1A and EML-1B may at least partially overlap the bank 420 and may be spaced apart between adjacent sub-pixels. For example, the first and second sub-emitting layers EML-1A and EML-1B may be deposited on each sub-pixel using a fine metal mask (FMM).
[0163] The first light-emitting sub-layer EML-1A may overlap with the third light-emitting sub-layer EML-2A included in the second light-emitting layer EML-2 of the second light-emitting unit 433. The first light-emitting sub-layer EML-1A may emit light of the same color as the third light-emitting sub-layer EML-2A included in the second light-emitting unit 433. The first light-emitting sub-layer EML-1A may emit light in the same wavelength band as the third light-emitting sub-layer EML-2A included in the second light-emitting unit 433.
[0164] The second light-emitting sub-layer EML-1B may overlap with the fourth light-emitting sub-layer EML-2B included in the second light-emitting layer EML-2 of the second light-emitting unit 433. The second light-emitting sub-layer EML-1B may emit light of the same color as the fourth light-emitting sub-layer EML-2B included in the second light-emitting unit 433. The second light-emitting sub-layer EML-1B may emit light in the same wavelength band as the fourth light-emitting sub-layer EML-2B included in the second light-emitting unit 433.
[0165] The first and second light-emitting sub-layers EML-1A and EML-1B emit light of different colors and may contain light-emitting materials that emit red, green, and blue, respectively, and the light-emitting materials may be formed using phosphorescent or fluorescent materials.
[0166] For example, the first sub-emitting layer EML-1A can emit red or green light, and the second sub-pixel SP_2 can emit blue light.
[0167] For example, when the first sub-emitting layer EML-1A emits red light, the first sub-emitting layer EML-1A may include a host material including CBP (carbazole biphenyl) or mCP (1,3-bis(carbazol-9-yl)) and a phosphorescent material including a dopant including at least one selected from the group consisting of PIQIr(acac) (bis(1-phenylisoquinoline)acetylacetonate iridium), PQIr(acac) (bis(1-phenylquinoline)acetylacetonate iridium), PQIr (tris(1-phenylquinoline)iridium), and PtOEP (octaethylporphyrin platinum); alternatively, the first sub-emitting layer EML-1A may include, but is not limited to, a fluorescent material including PBD:Eu(DBM)3(Phen) or Perylene.
[0168] When the first sub-emitting layer EML-1A emits green light, the first sub-emitting layer EML-1A may be made of a phosphorescent material containing a host material including CBP or mCP and a dopant material such as an Ir complex including Ir(ppy)3 (fac tris(2-phenylpyridine)iridium), or alternatively, a fluorescent material including Alq3 (tris(8-hydroxyquinolino)aluminum), but is not limited to this.
[0169] When the second sub-emitting layer EML-1B emits blue light, the second sub-emitting layer EML-1B may be composed of a phosphorescent material containing a host material including CBP or mCP and a dopant material including (4,6-F2ppy)2Irpic, or may be composed of a fluorescent material including, but not limited to, any one selected from the group consisting of spiro-DPVBi, spiro-6P, distyrylarylene (DSB), distyrylarylene (DSA), PFO-based polymers, and PPV-based polymers.
[0170] The first and second light-emitting sub-layers EML-1A and EML-1B may further include an auxiliary light-emitting layer. For example, the auxiliary light-emitting layer may be disposed below or above the first light-emitting sub-layer EML-1A. The auxiliary light-emitting layer may emit the same color as the first light-emitting sub-layer EML-1A or a different color. Alternatively or additionally, the auxiliary light-emitting layer may be disposed below or above the second light-emitting sub-layer EML-1B. The auxiliary light-emitting layer may emit the same color as the second light-emitting sub-layer EML-1B or a different color.
[0171] A first electron-transporting layer ETL-1 can be disposed on the first sub-emissive layer EML-1A, the second sub-emissive layer EML-1B, and the first hole-transporting layer HTL-1.
[0172] The first electron transport layer ETL-1 facilitates electron transport and may be composed of, but is not limited to, one or more selected from the group consisting of Alq3 (tris(8-hydroxyquinolino)aluminum), PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4oxadiazole), TAZ, spiro-PBD, BAlq, and SAlq.
[0173] An electron injection layer (EIL) may be additionally disposed on the first electron transport layer ETL-1.
[0174] The charge generation layer 432 may be disposed on the first light-emitting unit 431. Alternatively, the charge generation layer 432 may be disposed on the first electron transport layer ETL-1 of the first light-emitting unit 431. The charge generation layer 432 may be disposed along a protrusion or a bend formed on the top surface of the bank.
[0175] The charge generation layer 432 may further include an n-type charge generation layer n-CGL that helps inject electrons into the first light emitting unit 431 and a p-type charge generation layer p-CGL that helps inject holes into the second light emitting unit 433 .
[0176] The n-type charge generation layer (n-CGL) may be formed of an alkali metal, an alkali metal compound, or an organic material or compound thereof that functions as an electron injector. For example, it may be formed of a mixed layer of an n-type material such as an anthracene derivative doped with lithium (Li) or cesium (Cs), but is not limited thereto.
[0177] The p-type charge generation layer (p-CGL) can be formed of an organic material used in the hole injection layer, such as, but not limited to, a single layer of a p-type material such as HATCN or F4-TCNQ.
[0178] The n-type charge generation layer n-CGL and the p-type charge generation layer p-CGL may be disposed along a bend formed on the top surface of the bank.
[0179] In the light emitting display device according to the embodiment of the present invention, the light emitting device layer is disposed along the protrusion or bend formed on the upper portion of the bank, so that the distance that electrons move to adjacent sub-pixels is increased, thereby blocking horizontal leakage current, i.e., electrons formed in the light emitting device layer during operation can be prevented from moving to adjacent pixels.
[0180] In addition, horizontal leakage current can be blocked even when the spacing between adjacent sub-pixels is small, which solves the problem of poor visibility caused by adjacent sub-pixels emitting light in low gradations and improves color reproduction.
[0181] A second light-emitting unit 433 may be disposed on the charge-generating layer 432 .
[0182] The second light-emitting unit 433 can include a second hole-transporting layer HTL-2, a second light-emitting layer, a second electron-transporting layer ETL-2, and a second electron-injecting layer EIL.
[0183] The second hole transport layer HTL-2 may be disposed on the charge generation layer 432. Alternatively, the second hole transport layer HTL-2 may be disposed on the p-type charge generation layer p-CGL.
[0184] The second hole transport layer HTL-2 can be disposed along the bend formed on the top surface of the bank.
[0185] A hole injection layer (HIL) may be additionally disposed between the p-type charge generation layer p-CGL and the second hole transport layer HTL-2.
[0186] The second hole transport layer HTL-2 facilitates the transport of holes and may be composed of, but is not limited to, one or more selected from the group consisting of NPD (N,N-dinaphthyl-N,N'-diphenylbenzidine), TPD (N,N'-bis-(3-methylphenyl)-N,N'-bis-(phenyl)-benzidine), s-TAD, and MTDATA (4,4',4"-Tris(N-3-methylphenyl-N-phenyl-amino)-triphenylamine).
[0187] A third sub-emitting layer EML-2A and a fourth sub-emitting layer EML-2B can be disposed on the second hole-transporting layer HTL-2.
[0188] The third and fourth sub-emitting layers EML-2A and EML-2B may overlap at least a portion of the bank and may be spaced apart between adjacent sub-pixels. For example, the third and fourth sub-emitting layers EML-2A and EML-2B may be deposited on each sub-pixel using a fine metal mask (FMM).
[0189] The third light-emitting sub-layer EML-2A may overlap the first light-emitting sub-layer EML-1A included in the first light-emitting unit 431. The third light-emitting sub-layer EML-2A may emit light of the same color as the first light-emitting sub-layer EML-1A included in the first light-emitting unit 431. The third light-emitting sub-layer EML-2A may emit light in the same wavelength band as the first light-emitting sub-layer EML-1A included in the first light-emitting unit 431.
[0190] The fourth light-emitting sub-layer EML-2B may overlap the second light-emitting sub-layer EML-1B included in the first light-emitting unit 431. The fourth light-emitting sub-layer EML-2B may emit light of the same color as the second light-emitting sub-layer EML-1B included in the first light-emitting unit 431. The fourth light-emitting sub-layer EML-2B may emit light of the same wavelength band as the second light-emitting sub-layer EML-1B included in the first light-emitting unit 431.
[0191] The third and fourth sub-emitting layers EML-2A and EML-2B emit light of different colors and may contain red, green, and blue emitting materials, respectively, and the emitting materials may be formed using phosphorescent or fluorescent materials.
[0192] For example, the third sub-emitting layer EML-2A can emit red or green light, and the fourth sub-emitting layer EML-2B can emit blue light.
[0193] For example, when the third sub-emitting layer EML-2A emits red light, the third sub-emitting layer EML-2A may include a host material including CBP (carbazole biphenyl) or mCP (1,3-bis(carbazol-9-yl)) and may be composed of a phosphorescent material including a dopant including at least one selected from the group consisting of PIQIr(acac) (bis(1-phenylisoquinoline)acetylacetonate iridium), PQIr(acac) (bis(1-phenylquinoline)acetylacetonate iridium), PQIr (tris(1-phenylquinoline)iridium), and PtOEP (octaethylporphyrin platinum); alternatively, the third sub-emitting layer EML-2A may be composed of a fluorescent material including, but not limited to, PBD:Eu(DBM)3(Phen) or Perylene.
[0194] When the third sub-emitting layer EML-2A emits green light, the third sub-emitting layer EML-2A may be made of a phosphorescent material containing a host material including CBP or mCP and a dopant material such as an Ir complex containing Ir(ppy)3 (fac tris(2-phenylpyridine)iridium), or alternatively, may be made of a fluorescent material including Alq3 (tris(8-hydroxyquinolino)aluminum), but is not limited to this.
[0195] When the fourth sub-emitting layer EML-2B emits blue light, the fourth sub-emitting layer EML-2B may be composed of a phosphorescent material including a host material such as CBP or mCP and a dopant material such as (4,6-F2ppy)2Irpic, or may be composed of a fluorescent material including, but not limited to, any one selected from the group consisting of spiro-DPVBi, spiro-6P, distyrylarylene (DSB), distyrylarylene (DSA), PFO-based polymers, and PPV-based polymers.
[0196] The third and fourth light-emitting sub-layers EML-2A and EML-2B may further include an auxiliary light-emitting layer. For example, the auxiliary light-emitting layer may be disposed below or above the third light-emitting sub-layer EML-2A. The auxiliary light-emitting layer may emit the same color as or a different color from the third light-emitting sub-layer EML-2A. Alternatively, the auxiliary light-emitting layer may be disposed below or above the fourth light-emitting sub-layer EML-2B. The auxiliary light-emitting layer may emit the same color as or a different color from the fourth light-emitting sub-layer EML-2B.
[0197] A second electron-transporting layer ETL-2 can be disposed on the third sub-emissive layer EML-2A, the fourth sub-emissive layer EML-2B, and the second hole-transporting layer HTL-2.
[0198] The second electron transport layer ETL-2 facilitates electron transport and may be composed of, but is not limited to, one or more selected from the group consisting of Alq3 (tris(8-hydroxyquinolino)aluminum), PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4oxadiazole), TAZ, spiro-PBD, BAlq, and SAlq.
[0199] An electron injection layer EIL may be disposed on the second electron transport layer ETL-2.
[0200] The electron injection layer (EIL) serves to facilitate electron injection, and may be made of, but is not limited to, Alq3 (tris(8-hydroxyquinolino)aluminum), PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4oxadiazole), TAZ, spiro-PBD, BAlq, or SAlq.
[0201] The components included in the first light-emitting unit 431 and the second light-emitting unit 433 may be formed as a plurality of components, or may be omitted.
[0202] A cathode electrode 440 may be disposed on the second light-emitting unit 433. A cathode electrode 440 may be disposed on the electron injection layer EIL.
[0203] The cathode electrode 440 may be disposed along a protrusion or bend formed on the top surface of the bank.
[0204] The cathode electrode 440 supplies electrons to the light emitting device layer and may be made of a conductive material with a low work function.
[0205] When the light emitting display device 100 is a top emission type, the cathode electrode 440 may be disposed using a transparent conductive material that transmits light, such as, but not limited to, at least one of indium tin oxide (ITO) and indium zinc oxide (IZO).
[0206] Alternatively, the conductive layer may be disposed using a semi-transparent material that transmits light, such as, but not limited to, at least one of alloys such as LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, and LiF / Ca:Ag.
[0207] When the light emitting display device 100 is a bottom emission type, the cathode electrode 440 may be disposed as a reflective electrode that reflects light and may be made of an opaque conductive material. For example, the cathode electrode 440 may be made of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof.
[0208] A capping layer 450 may be disposed on the cathode electrode 440 .
[0209] The capping layer (CPL) 450 is intended to increase the light extraction efficiency of the organic light emitting device, and may be made of any one of the materials constituting the light emitting device layer 400. The capping layer 450 may be formed of two or more layers or may be omitted.
[0210] In the following, an embodiment of the present invention will be described with reference to FIG.
[0211] The light emitting display device 100 shown in Fig. 6 is substantially the same as the display device of Fig. 4 except for the encapsulation layer 500 and the touch sensor layer 600, and therefore, redundant description will be omitted. For example, for simplicity, Fig. 6 does not show the first and second light emitting layers EML-1 and EML-2 of Fig. 5.
[0212] FIG. 6 is a cross-sectional view illustrating an encapsulation layer and a touch sensor layer disposed on a substrate according to an embodiment of the present invention.
[0213] An encapsulation layer 500 may be disposed on the cathode electrode 440 or the capping layer 450. The encapsulation layer 500 may protect the light emitting element layer 400 from external moisture, oxygen, or foreign substances. For example, the encapsulation layer 500 may prevent the penetration of external oxygen and moisture to prevent oxidation of the light emitting material and electrode materials.
[0214] The encapsulation layer 500 may be made of a transparent material so that light emitted from the light-emitting layer can pass through.
[0215] The encapsulating layer 500 may include a first encapsulating layer 510, a second encapsulating layer 520, and a third encapsulating layer 530 that block the penetration of moisture and oxygen. The first encapsulating layer 510, the second encapsulating layer 520, and the third encapsulating layer 530 may have an alternately stacked structure. The encapsulating layer 500 may be made of a transparent material so that light emitted from the light-emitting layer can pass through.
[0216] The first and third encapsulation layers 510 and 530 may be made of at least one inorganic material, such as, but not limited to, silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (AlOz). The first and third encapsulation layers 510 and 530 may be formed using a vacuum deposition method, such as, but not limited to, chemical vapor deposition (CVD) or atomic layer deposition (ALD).
[0217] The first sealing layer 510 and the third sealing layer 530 may be formed of at least two or more layers. For example, the first sealing layer 510 may have a three-layer structure of silicon oxide (SiOx) / silicon nitride (SiNx) / silicon oxide (SiOx), but is not limited thereto. For example, the third sealing layer 530 may have a three-layer structure of silicon oxide (SiOx) / silicon nitride (SiNx), but is not limited thereto.
[0218] The second encapsulation layer 520 can cover foreign matter or particles that may occur during the manufacturing process and can also planarize the surface of the first encapsulation layer 510. For example, the second encapsulation layer 520 can be a particle cover layer, and is not limited to this term.
[0219] The second encapsulation layer 520 may be made of an organic material, such as silicon oxycarbonate (SiOCz), epoxy, polyimide, polyethylene, acrylate, or other polymers, but is not limited thereto.
[0220] The second sealing layer 520 may be made of a thermosetting or photocurable material that is cured by heat or light.
[0221] A touch sensor layer 600 may be disposed on the encapsulation layer 500 .
[0222] The touch sensor layer 600 may include a first touch electrode 640_R, a first touch connecting electrode 620, a second touch electrode, and a second touch connecting electrode 640_C.
[0223] The first touch electrode 640_R, the first touch connecting electrode 620, the second touch electrode, and a portion of the second touch connecting electrode 640_C may be disposed to overlap the bank 420, a power line, or a data line.
[0224] The first touch electrode 640_R, the second touch electrode 620, the first touch connecting electrode 620, and the second connecting electrode 620_C may be formed in a mesh pattern in which metal lines having a small line width intersect with each other. The mesh pattern may have a diamond shape, and the shape of the mesh pattern may be, but is not limited to, a square, a pentagon, a hexagon, a circle, an ellipse, etc.
[0225] The first touch electrode 640_R, the second touch electrode, the first touch connecting electrode 620, and the second touch connecting electrode 640_C may be arranged using an opaque conductive material with low resistance, such as, but not limited to, a single layer or multiple layers of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), gold (Au), and transparent conductive oxide (TCO), or an alloy thereof.
[0226] For example, the first touch electrode 640_R, the second touch electrode, the first touch connecting electrode 620, and the second touch connecting electrode 640_C may have a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) made of conductive metal material, but is not limited thereto.
[0227] The first touch electrode 640_R, the second touch electrode, the first touch connecting electrode 620, and the second touch connecting electrode 640_C may be made of the same material as the first source electrode 250, the first drain electrode 270, the second source electrode 350, and the second drain electrode 370.
[0228] A touch buffer layer 610 may be disposed on the encapsulation layer 500. The touch buffer layer 610 may prevent chemicals (such as a developer or an etchant) used in the manufacturing process of the touch sensor layer 600 or external moisture from penetrating into the organic light emitting element layer 400. In addition, the touch buffer layer 610 may prevent a problem in which a plurality of touch sensor metals disposed on the top of the touch buffer layer 610 are disconnected due to external impact, and may block interference signals that may be generated when the touch sensor layer is driven.
[0229] The touch buffer layer 610 may be formed of a single layer or multiple layers of any one of silicon oxide (SiOx) or silicon nitride (SiNx) or an alloy thereof, but is not limited thereto, or may be formed of an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.
[0230] A first touch connecting electrode 620 may be disposed on the touch buffer layer 610.
[0231] For example, the first touch connecting electrode 620 may be disposed between adjacent first touch electrodes 640_R in the first direction (or X-axis direction). The first touch connecting electrode 620 may electrically connect a plurality of adjacent first touch electrodes 640_R spaced apart in the first direction (or X-axis direction), but is not limited thereto.
[0232] The first touch connecting electrode 620 may be disposed to overlap with the second touch connecting electrode 640_C connecting the adjacent second touch electrodes in the second direction (or Y-axis direction). The first touch connecting electrode 620 and the second touch connecting electrode 640_C may be formed in different layers and thus may be electrically insulated.
[0233] A touch insulating layer 630 may be disposed on the touch buffer layer 610 and the first touch connecting electrode 620.
[0234] The touch insulating layer 630 may include holes to electrically connect the first touch electrode 640_R and the first touch connecting electrode 620.
[0235] The touch insulating layer 630 may electrically insulate the second touch electrode and the second touch connecting electrode 640_C.
[0236] The touch insulating layer 630 may be composed of, but is not limited to, a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or multiple layers thereof.
[0237] A first touch electrode 640_R, a second touch electrode, and a second touch connecting electrode 640_C may be disposed on the touch insulating layer 630.
[0238] The first touch electrode 640_R and the second touch electrode 640_R may be spaced apart at a regular interval. At least one first touch electrode 640_R adjacent in the first direction (or X-axis direction) may be spaced apart from each other. At least one first touch electrode 640_R adjacent in the first direction (or X-axis direction) may be connected to a first touch connecting electrode 620 disposed between the plurality of first touch electrodes 740_R. For example, the plurality of adjacent first touch electrodes 640_R may be connected to the first touch connecting electrode 620 through a hole in the touch insulating layer 630.
[0239] Adjacent second touch electrodes in the second direction (or Y-axis direction) may be connected by a second touch connecting electrode 640_C. The second touch electrode and the second touch connecting electrode 640_C may be formed in the same layer. For example, the second touch connecting electrode 640_C may be disposed between the second touch electrodes in the same layer as the second touch electrode. The second touch connecting electrode 640_C may be formed extending from the second touch electrode.
[0240] The first touch electrode 640_R, the second touch electrode, and the second touch connecting electrode 640_C may be formed in the same process.
[0241] A touch planarization layer 650 may be disposed on the first touch electrode 640_R, the second touch electrode, and the second touch connecting electrode 640_C.
[0242] The touch driving circuit may receive a touch sensing signal from the first touch electrode 640_R. The touch driving circuit may also transmit a touch driving signal from the second touch electrode. The touch driving circuit may sense a user's touch using mutual capacitance between the first touch electrodes 640_R and the second touch electrodes. For example, when a touch operation is performed on the light emitting display device 100, a change in capacitance may occur between the first touch electrode 640_R and the second touch electrode. The touch driving circuit may detect the touch coordinates by sensing this change in capacitance.
[0243] In the following, an embodiment of the present invention will be described with reference to FIG.
[0244] FIG. 7 is a cross-sectional view illustrating a color filter layer disposed on a substrate according to an embodiment of the present invention.
[0245] The light emitting display device 100 shown in FIG. 7 is substantially the same as the display device of FIG. 6 except for the color filter layer 700, and therefore, a redundant description will be omitted.
[0246] A color filter layer 700 may be disposed on the touch sensor layer 600 .
[0247] When the light emitting display device 100 is a top emission type, light emitted from the emission layer travels toward the top substrate and displays an image through the color filter 702. The color filter layer 700 provides a display device with improved color purity by disposing the same color as the color emitted from the emission layer of each subpixel in each subpixel. In addition, by disposing the color filter layer 700 adjacent to the second substrate, external light reflection can be reduced, thereby improving light efficiency. In addition, costs can be reduced because a polarizer is not used.
[0248] A color filter buffer layer 710 may be disposed on the touch planarization layer 650 .
[0249] The color filter buffer layer 710 can block chemicals (developing solution, etching solution, etc.) used in the manufacturing process of the color filter layer or external moisture from penetrating into the light emitting element layer containing organic matter.
[0250] A black matrix 720 may be disposed on the color filter buffer layer 710 .
[0251] The black matrix 720 is a black (or blackish) insulating layer disposed between the color filters 730 to prevent color mixing between adjacent color filters 730 or to prevent the components from being visible from outside the light emitting display device 100.
[0252] The black matrix 720 may overlap the banks 420. The width of the black matrix 720 may be smaller than the width of the banks 420.
[0253] A color filter layer 730 may be disposed on the black matrix 720 .
[0254] The color filter layer 730 may include a first color filter 730-A and a second color filter layer 730-B. The first color filter 730-A and the second color filter 730-B may be deposited on each subpixel SP.
[0255] The first color filter 730-A and the second color filter 730-B may be formed spaced apart between adjacent subpixels SP. For example, the first color filter 730-A and the second color filter 730-B may be deposited on each subpixel SP. At least a portion of the first color filter 730-A and the second color filter 730-B may be disposed on top of the black matrix 720, and the spaced apart area between the first color filter 730-A and the second color filter 730-B may be formed on the black matrix 720.
[0256] The first color filter 730-A and the second color filter 730-B may be made of different colors, and may be made of red, green, and blue dyes or pigments.
[0257] The first color filter 730-A may have the same color as the light emitted by the first or third sub-emitting layer EML-1A or EML-2A, and the second color filter 730-B may have the same color as the light emitted by the second or fourth sub-emitting layer EML-1B or EML-2B. For example, the first color filter 730-A may emit red or green light, and the second color filter 730-B may emit blue light.
[0258] Alternatively, the first color filter 730-A may have a color different from that of the light emitted from the first sub-emitting layer EML-1A or the third sub-emitting layer EML-2A, and the second color filter 730-B may have a color different from that of the light emitted from the second sub-emitting layer EML-1B or the fourth sub-emitting layer EML-2B.
[0259] The first color filter 730-A and the second color filter 730-B may at least partially overlap the black matrix 720. The first color filter 730-A and the second color filter 730-B may be disposed to cover at least a portion of the black matrix 720.
[0260] The first color filter 730-A and the second color filter 730-B may at least partially overlap the bank 420.
[0261] The thickness of the first color filter 730-A and the second color filter 730-B may be at least partially greater than the thickness of the black matrix 720.
[0262] An overcoat layer 740 may be disposed over the color filter 730 and the black matrix 720 .
[0263] An overcoat layer 740 may be disposed over the color filters 730 and the black matrix 720 .
[0264] The overcoat layer 740 may be formed of at least one organic insulating material such as, but not limited to, BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.
[0265] An adhesive layer 800 may be disposed on a substrate on which the touch sensor layer 600 or the color filter layer 700 is disposed. For example, the adhesive layer 800 may bond (or adhere) the touch sensor layer 600 or the color filter layer 700 to the second substrate 900.
[0266] The adhesive layer 800 may be made of a material having adhesive properties, such as, but not limited to, an optical clear adhesive (OCA) or a pressure sensitive adhesive (PSA).
[0267] A second substrate 900 may be disposed on the adhesive layer 800. The second substrate 900 may be made of glass or a flexible plastic material.
[0268] For example, the second substrate 900 may be made of at least one of polyimide (PI), polymethylmethacrylate (PMMA), polyethylene terephthalate (PET), polyethersulfone, and polycarbonate, but is not limited thereto.
[0269] Although not shown in the drawings of the present invention, a layer containing quantum dots (QDs) may further be included.
[0270] A display device according to an embodiment of the present invention can be described as follows.
[0271] An emissive display device according to an embodiment of the present invention may include a substrate including a non-emissive portion located between an emissive portion and an emissive portion, a first subpixel and a second subpixel located in the emissive portion, a first electrode disposed on the substrate in the first subpixel and the second subpixel, respectively, a bank disposed on the first electrode and the non-emissive portion and having at least one protrusion on its upper surface, an emissive element layer disposed on the first electrode and the bank in the emissive portion and the non-emissive portion, including a plurality of emissive units and a charge generation layer disposed between the plurality of emissive units, and a second electrode disposed on the emissive element layer.
[0272] According to an embodiment of the present invention, the bank may have at least two thicknesses, with the thickness of the protrusion being greater than the thickness of other areas of the bank.
[0273] According to an embodiment of the present invention, the top surface of the bank may have a curvature.
[0274] According to an embodiment of the present invention, the light emitting element layer may be disposed along the bend of the top surface of the bank.
[0275] According to an embodiment of the present invention, the driving voltages of the first sub-pixel and the second sub-pixel may be different from each other.
[0276] According to an embodiment of the present invention, the pixel may further include a third sub-pixel, and at least one of the distances between adjacent sub-pixels may be different from each other.
[0277] According to an embodiment of the present invention, the distance between the subpixel having the smallest driving voltage among the first to third subpixels and the other subpixels may be smaller than the distance between the other subpixels.
[0278] According to embodiments of the present invention, the charge generating layer may include a first charge generating layer and a second charge generating layer.
[0279] According to embodiments of the present invention, the first charge generation layer may include an alkali metal such as lithium (Li), sodium (Na), potassium (K), or cesium (Cs), or an alkaline earth metal such as magnesium (Mg), strontium (Sr), barium (Ba), or radium (Ra).
[0280] According to an embodiment of the present invention, the first charge generation layer may include an N-type dopant, and the second charge generation layer may include a P-type dopant.
[0281] According to an embodiment of the present invention, each of the plurality of light-emitting units may include a light-emitting layer.
[0282] According to an embodiment of the present invention, at least one of the light emitting layers included in the plurality of light emitting units can emit blue light.
[0283] According to an embodiment of the present invention, the plurality of light emitting units includes at least three or more light emitting units, and the three or more light emitting units can emit the same color.
[0284] According to an embodiment of the present invention, three or more light emitting units can emit blue light.
[0285] According to an embodiment of the present invention, the light emitting layers may be disposed in the first sub-pixel and the second sub-pixel, respectively, and may be spaced apart from each other.
[0286] According to the embodiment of the present invention, the light-emitting layers disposed in the first sub-pixel and the second sub-pixel, respectively, can emit the same color in the same sub-pixel.
[0287] According to an embodiment of the present invention, the memory cell may further include a data line and a power supply line disposed below the bank.
[0288] According to an embodiment of the present invention, the data lines and power supply wiring may overlap the protrusions of the banks.
[0289] According to an embodiment of the present invention, the display device may further include a sealing layer on the second electrode, and a touch sensor layer disposed on the sealing layer.
[0290] According to an embodiment of the present invention, the touch panel may further include a color filter layer disposed on the touch sensor layer.
[0291] According to an embodiment of the present invention, the color filter layer may further include a black matrix and a color filter.
[0292] According to an embodiment of the present invention, the thickness of the color filter may be greater than the thickness of the black matrix.
[0293] According to an embodiment of the present invention, the black matrix may overlap the bank.
[0294] According to an embodiment of the present invention, the width of the bank may be greater than the width of the black matrix.
[0295] According to an embodiment of the present invention, the color filter may include a first color filter disposed in a first sub-pixel and a second color filter disposed in a second sub-pixel, and the first color filter and the second color filter may be disposed spaced apart from each other on the black matrix.
[0296] Although the present invention has been described in more detail with reference to the accompanying drawings, it should be understood that the present invention is not limited to these embodiments and may be modified in various ways without departing from the spirit and scope of the present invention. Therefore, the disclosed embodiments are intended to illustrate, rather than limit, the spirit and scope of the present invention. Therefore, the above-described embodiments should be understood as illustrative and not restrictive in all respects. The scope of the present invention should be interpreted by the scope of the claims, and all technical concepts within the scope equivalent thereto should be considered to be within the scope of the present invention. [Explanation of symbols]
[0297] 100: Light-emitting display device 110: Substrate 200: First thin film transistor 300: second thin film transistor 420: Bank 430: Light emitting element layer 431: First light-emitting unit 432: Charge generation layer 433: Second light-emitting unit
Claims
1. A substrate including a light-emitting portion and a non-light-emitting portion located between the light-emitting portion, The first subpixel and the second subpixel located in the light-emitting section, On the substrate, a first electrode is provided which is arranged on the first subpixel and the second subpixel, A bank disposed on the first electrode and the non-emitting portion, the bank including at least one projection protruding upward from the upper surface of the bank, A light-emitting layer including a charge generation layer disposed on the first electrode and bank of the light-emitting section, and disposed between a plurality of light-emitting units and two adjacent light-emitting units of the plurality of light-emitting units, A second electrode disposed on the light-emitting layer, The data lines and power supply wiring arranged in the non-light-emitting section, Includes, The data line and the power supply wiring overlap with the corresponding protrusions of the bank. The width of the aforementioned protrusion is greater than the width of the data line and the power supply wiring, Each of the aforementioned plurality of light-emitting units includes a corresponding light-emitting layer, The light-emitting layer is arranged in each of the first and second subpixels and is cut above the bank. A light-emitting display device wherein the charge generation layer is formed continuously across the first subpixel and the second subpixel, and over the bank between the first subpixel and the second subpixel.
2. The light-emitting device according to claim 1, wherein the first thickness of the first region of the bank on which the protrusion is formed is greater than the second thickness of the second region of the bank adjacent to the first region.
3. The light-emitting display device according to claim 1, wherein the upper surface of the bank has an uneven portion.
4. The light-emitting device according to claim 3, wherein the light-emitting layer is arranged along the uneven portion of the upper surface of the bank.
5. The light-emitting device according to claim 1, wherein the first subpixel and the second subpixel are configured to have different driving voltages from each other.
6. Further including the third subpixel, The light-emitting display device according to claim 1, wherein at least two of the distances between adjacent subpixels of the first subpixel, the second subpixel, and the third subpixel are different from each other.
7. The light-emitting display device according to claim 6, wherein the distance between the subpixel configured to have the largest drive voltage among the first subpixel, second subpixel, and third subpixel and the other subpixels is smaller than the distance between the other subpixels.
8. The light-emitting display device according to claim 1, wherein the charge generation layer includes a first charge generation layer and a second charge generation layer.
9. The light-emitting device according to claim 8, wherein the first charge generation layer comprises one or more alkali metals: lithium (Li), sodium (Na), potassium (K), or cesium (Cs), and alkaline earth metals: magnesium (Mg), strontium (Sr), barium (Ba), or radium (Ra).
10. The light-emitting device according to claim 8, wherein the first charge generation layer comprises an N-type dopant and the second charge generation layer comprises a P-type dopant.
11. The light-emitting device according to claim 1, wherein at least one of the light-emitting layers included in the plurality of light-emitting units emits blue light.
12. The plurality of light-emitting units include at least three light-emitting units, The light-emitting display device according to claim 10, wherein the at least three light-emitting units emit light of the same color.
13. The light-emitting display device according to claim 12, wherein the at least three light-emitting units emit blue light.
14. The light-emitting device according to claim 1, wherein the light-emitting layers arranged in the first subpixel and the second subpixel respectively emit the same color in the same subpixel.
15. The system further includes a color filter layer placed on the touch sensor layer, The color filter layer includes a black matrix and a color filter placed on the black matrix. The light-emitting display device according to claim 1, wherein the thickness of the color filter is greater than the thickness of the black matrix.
16. The light-emitting display device according to claim 1, wherein the substrate has a bending area.
17. A substrate including a light-emitting portion and a non-light-emitting portion located between the light-emitting portion, Multiple subpixels located in the light-emitting section, A first electrode is disposed on the substrate and is placed on each of the plurality of subpixels, A bank, which is arranged on the first electrode between adjacent subpixels, and which includes a plurality of protrusions projecting upward from the upper surface of the bank, A light-emitting layer including a charge generation layer disposed on the first electrode and bank of the light-emitting section, and disposed between a plurality of light-emitting units and two adjacent light-emitting units of the plurality of light-emitting units, The array includes a second electrode disposed on the light-emitting layer, An electron transport path is formed in the light-emitting layer between adjacent subpixels, The length of the electron transport path is longer than the distance between adjacent subpixels. The data lines and power wiring are arranged in the non-light-emitting section. The data line and the power supply wiring overlap with the corresponding protrusions of the bank. The width of the projection is greater than the width of the data line and the power supply wiring, Each of the aforementioned plurality of light-emitting units includes a corresponding light-emitting layer, The light-emitting layer is arranged in each of the plurality of subpixels and is cut on the bank. The charge generation layer is formed continuously over the plurality of subpixels and over the banks between the subpixels, in a light-emitting display device.
18. A substrate including a light-emitting portion and a non-light-emitting portion located between the light-emitting portion, The light-emitting section is arranged with a plurality of subpixels, each including a first electrode, A bank located on the first electrode in the non-emitting portion and having different heights in the portion between two adjacent subpixels, and including a plurality of protrusions projecting upward from the upper surface of the bank, A light-emitting layer disposed on the first electrode and a part of the bank, comprising a plurality of light-emitting units and a charge generation layer disposed between two adjacent light-emitting units among the plurality of light-emitting units, A second electrode disposed on the light-emitting layer, The non-emitting section includes data lines and power supply wiring, The data line and the power supply wiring overlap with the corresponding protrusions of the bank. The width of the aforementioned protrusion is greater than the width of the data line and the power supply wiring, Each of the aforementioned plurality of light-emitting units includes a corresponding light-emitting layer, The light-emitting layer is arranged in each of the plurality of subpixels and is cut on the bank. The charge generation layer is formed continuously over the plurality of subpixels and over the banks between the plurality of subpixels, in a light-emitting display device.