Semiconductor device and power conversion device

The semiconductor device incorporates a shielding plate to block radiation noise from affecting the control board by covering exposed bus bars and potentially bending to cover the control board, effectively preventing noise interference.

JP2025174074APending Publication Date: 2025-11-28MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
JP2024080113
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-05-16
Publication Date
2025-11-28

AI Technical Summary

Technical Problem

Existing semiconductor devices fail to prevent radiation noise generated outside the sealing material from affecting the control board.

Method used

A semiconductor device is designed with a radiation shielding plate between the sealing material and the control board, extending to cover exposed bus bars and optionally bent to cover the control board's side, preventing radiation noise from reaching the control board.

Benefits of technology

The shielding plate effectively blocks radiation noise from the semiconductor elements, ensuring the control board is not affected by noise generated outside the sealing material.

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Abstract

To provide a semiconductor device capable of preventing radiation noise which is generated outside of a sealant which seals a semiconductor element from affecting on a control board.SOLUTION: A semiconductor device comprises: a semiconductor element; a control terminal; first and second main terminals which are connected to first and second main electrodes of the semiconductor element; a sealant which seals the semiconductor element, a part of the control terminal, and a part of the first and second main terminals; a capacitor module; a first bus bar which is connected to a first pole of the capacitor module and connected to the first main terminal outside of the sealant; a second bus bar which is connected to a second pole and connected to the second main terminal outside of the sealant; a control board which is disposed on a top face of the sealant; and a shield plate which is disposed between the sealant and the control board. The shield plate extends so as to cover exposed parts of the first and second bus bars which are not covered by a housing of the capacitor module or is bent so as to cover a side face of the control board which is close to the exposed parts.SELECTED DRAWING: Figure 7
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Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a power conversion device. [Background technology]

[0002] Patent Document 1 discloses a semiconductor device in which a shield plate for blocking radiation noise is disposed on the upper electrode side of a semiconductor element, and a portion of the upper electrode, a portion of the shield plate, and the semiconductor element are sealed with a sealing material. By integrally forming the shield plate with the sealing material, it is possible to ensure a heat dissipation path not only on the lower side but also on the upper side of the semiconductor element. It is also possible to prevent the radiation noise emitted by the semiconductor element from affecting a control board fixed above the shield plate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2014 / 064806 Summary of the Invention [Problem to be solved by the invention]

[0004] However, the above-mentioned method has a problem in that it is not possible to prevent the influence of radiation noise generated outside the sealing material that seals the semiconductor element on the control board.

[0005] In order to solve the above-mentioned problems, the present disclosure aims to provide a semiconductor device that can prevent radiation noise generated outside the sealing material that seals the semiconductor element from affecting the control board. [Means for solving the problem]

[0006] Aspects of the present disclosure include: a semiconductor element having a control electrode, a first main electrode, and a second main electrode; a control terminal connected to the control electrode; first and second main terminals connected to the first and second main electrodes, respectively; a sealing material that seals the semiconductor element, a portion of the control terminal, and a portion of the first and second main terminals; a capacitor module having a housing and first and second poles extending from the housing; a first bus bar connected to the first pole and connected to the first main terminal outside the encapsulant; a second bus bar connected to the second pole and connected to the second main terminal outside the encapsulant; a control board disposed opposite to the upper surface of the sealing material and connected to the control terminal; a radiation shielding plate disposed between the sealing material and the control board; Equipped with the shield plate extends to cover a part or all of the exposed portions of the first and second bus bars that are not covered by the housing; or It is preferable that the cover be bent so as to cover the side surface of the control board that is close to the exposed portion. [Effects of the Invention]

[0007] The shield plate of the present disclosure is provided between the sealing material and the control board, covering the upper surface of the sealing material facing the control board. The shield plate is extended to cover part or all of the exposed portion of the bus bar that is not covered by the capacitor module housing. Alternatively, the shield plate is bent to cover the side of the control board near the exposed portion. This prevents radiation noise generated outside the sealing material that encapsulates the semiconductor element from affecting the control board. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a perspective view showing a plurality of semiconductor modules mounted on a cooler according to a first embodiment of the present disclosure. [Figure 2A] 1 is a top view showing a semiconductor module according to a first embodiment of the present disclosure. [Figure 2B]2B is a cross-sectional view taken along the line AA in FIG. 2A. [Figure 3] 1 is a circuit diagram of a semiconductor device according to a first embodiment of the present disclosure. [Figure 4] 1 is a perspective view of a plurality of semiconductor modules and a shield plate provided thereon according to a first embodiment of the present disclosure. [Figure 5] FIG. 5 is a top view of FIG. [Figure 6] 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. [Figure 7] FIG. 7 is a side view taken along the line AA′ in FIG. 6. [Figure 8] 10 is a modified example of the semiconductor device according to the first embodiment of the present disclosure. [Figure 9] 10 is a modified example of the semiconductor device according to the first embodiment of the present disclosure. [Figure 10] FIG. 10 is a side view showing a semiconductor device according to a second embodiment of the present disclosure. [Figure 11] FIG. 11 is a side view showing a semiconductor device according to a third embodiment of the present disclosure. [Figure 12] FIG. 10 is a block diagram showing a configuration of a power conversion system according to a fourth embodiment of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0009] Embodiments of the present disclosure will be described with reference to the drawings. The same or corresponding components will be designated by the same reference numerals, and repeated description may be omitted.

[0010] Embodiment 1 1 is a perspective view showing a plurality of semiconductor modules 6 mounted on a cooler 7 according to the first embodiment of the present disclosure. The plurality of semiconductor modules 6 are fixed to a base plate 13 and then mounted on the cooler 7.

[0011] The base plate 13 and the rear surface of the semiconductor module 6 are joined together with a joining material having high electrical and thermal conductivity, such as solder, silver, or grease.

[0012] The base plate 13 is a plate whose main material is a metal with high electrical and thermal conductivity, such as aluminum or copper, and is fixed onto the cooler 7 with screws or the like.

[0013] The cooler 7 is a water jacket through which water circulates to cool the semiconductor module 6, or a heat sink equipped with heat dissipation fins.

[0014] Main terminal 10a, which is drawn out from the side surface of sealing material 116 of semiconductor module 6, is connected to bus bar 8a. Main terminal 10b, which is drawn out from the same side surface of sealing material 116 as main terminal 10a, is connected to bus bar 8b. Bus bars 8a and 8b are thin conductive plates. Insulating material 8c is provided between bus bar 8a and bus bar 8b. Note that main terminals 10a and 10b do not necessarily have to be drawn out from the same side surface of sealing material 116.

[0015] The bus bars 8a and 8b are bent and housed in a housing of a capacitor module 9 (not shown). Inside the housing, the bus bars 8a and 8b are connected to the capacitor module 9 by soldering or the like.

[0016] Fig. 2A is a top view showing a semiconductor module 6 according to the first embodiment of the present disclosure. Fig. 2B is a cross-sectional view taken along line AA in Fig. 2A. The semiconductor module 6 includes a substrate 120, a plurality of semiconductor elements 111 mounted on a circuit pattern 117 of the substrate 120, main terminals 10a and 10b, control terminals 1a and 1b, and a sealing material 116.

[0017] A main electrode (collector electrode) on the back surface of the semiconductor element 111 is bonded to a circuit pattern 117 on the substrate 120 via a bonding material 112. The bonding material 112 is a sintered material made of fine metal powder. The semiconductor element 111 is, for example, a diode, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), an IGBT (Insulated-Gate Bipolar Transistor), or an RC-IGBT (Reverse-Conducting IGBT).

[0018] The substrate 120 includes an insulating layer 114, a circuit pattern 117 on the upper surface of the insulating layer 114, and a circuit pattern 118 on the back surface of the insulating layer 114. Heat dissipation can be improved by using a metal material containing, as a main component, copper or aluminum, which has high thermal conductivity, for the circuit patterns 117 and 118. The circuit patterns 117 and 118 are joined to the insulating layer 114 by brazing or the like. The circuit pattern 118, which is provided on the back surface of the insulating layer 114, is exposed from the back surface of the sealing material 116 and is joined to the base plate 13 via a joining material, such as grease or solder.

[0019] An insulating layer 114 is disposed between the circuit patterns 117 and 118. By using a resin that is resistant to deformation as the insulating layer 114, it is possible to prevent cracks from occurring even when minute deformations occur in the components due to heat cycles or the like. Furthermore, by using a material with high thermal conductivity, it is possible to improve the heat dissipation of the circuit patterns 117 and 118 via the insulating layer 114 and prevent the temperature rise of the semiconductor module 6. The material for the insulating layer 114 is not limited to resin, and AlN, Al2O3, Si3N4, etc. may also be used.

[0020] Of the plurality of semiconductor elements 111, the low-side element, which has a relatively low potential, has a main electrode (emitter electrode) on the upper surface joined to the main terminal 10b via a joining material 112.

[0021] In the low-side element, the main electrode (collector electrode) on the back surface is electrically connected to the output terminal 5. The output terminal 5 is bonded to the circuit pattern 117 via a bonding material. The output terminal 5 can be connected to an external device such as a motor via the output bus bar 4.

[0022] Of the multiple semiconductor elements 111, the high-side element, which has a relatively high potential, has its upper main electrode (emitter electrode) bonded to output terminal 5 via bonding material 112. The high-side element also has its rear main electrode (collector electrode) electrically connected to main terminal 10a. Main terminal 10a is bonded to circuit pattern 117 on substrate 120 via bonding material.

[0023] A control electrode on the upper surface of the semiconductor element 111 is bonded to the control terminal 1a or 1b via a bonding material. The control terminals 1a and 1b may be bonded to the circuit pattern 117 via a bonding material.

[0024] Control terminal 1a and control terminal 1b are respectively drawn out from opposite side surfaces of sealing material 116. Here, the control terminal drawn out from the same side surface as output terminal 5 is referred to as control terminal 1a. Also, the control terminal drawn out from the same side surface as main terminals 10a and 10b is referred to as control terminal 1b. Control terminals 1a and 1b are formed in the upward direction.

[0025] The main terminals 10a, 10b and the control terminals 1a, 1b are made of a conductive metal, such as copper or a copper alloy.

[0026] The bonding material is disposed between the semiconductor element 111 and the circuit pattern 117, between the semiconductor element 111 and the main terminals 10a and 10b, between the semiconductor element 111 and the control terminals 1a and 1b, between the circuit pattern 117 and the main terminal 10a, etc., and bonds these together. The bonding material is preferably a material with high electrical conductivity and thermal conductivity, and solder, silver, etc. are used. In addition to the above properties, lead-free solder also acts as a buffer material that reduces stress, and its use can improve the reliability of the semiconductor module 6. Alternatively, sintered silver can also be used.

[0027] The substrate 120, the semiconductor element 111, parts of the control terminals 1a and 1b, and parts of the main terminals 10a and 10b are sealed with a sealing material 116. The material of the sealing material 116 is preferably one that can improve the reliability of the semiconductor module 6, and a thermosetting epoxy resin material is used, for example. The sealing method may be, for example, a transfer molding method.

[0028] 3 is a circuit diagram of the semiconductor device 100 according to the first embodiment of the present disclosure. Here, an example of a circuit configuration suitable for a three-phase inverter device is shown. Two semiconductor modules 6 are connected in parallel in each phase, and six semiconductor modules 6 are used in total for the three phases.

[0029] Each semiconductor module 6 is configured as a 2-in-1 circuit having two semiconductor elements 111 connected in series. Of the two semiconductor elements 111 included in the 2-in-1 circuit, the collector electrode of the high-side element, which has a relatively high potential, is connected to main terminal 10a and is connected to the positive electrode of capacitor module 9 via bus bar 8a. On the other hand, the emitter electrode of the low-side element, which has a relatively low potential, is connected to main terminal 10b and is connected to the negative electrode of capacitor module 9 via bus bar 8b.

[0030] Capacitor module 9 is connected in parallel to external power supply 60 and smooths the DC voltage from external power supply 60. Note that capacitor module 9 does not have to include a single capacitor. In other words, capacitor module 9 may be configured as a capacitor bank including multiple capacitors.

[0031] In each semiconductor module 6, the midpoint of a 2-in-1 circuit in which two semiconductor elements 111 are connected in series is connected to an output terminal 5, which is connected to an external device 70 such as a motor via an output bus bar 4.

[0032] FIG. 4 is a perspective view of a plurality of semiconductor modules 6 and a shield plate 3 provided thereon according to the first embodiment of the present disclosure.

[0033] Bus bars 8a, 8b and insulating material 8c are bent and housed in the housing of capacitor module 9. Bus bar 8a and bus bar 8b are connected to different poles of capacitor module 9 inside the housing. Bus bars 8a, 8b and insulating material 8c have exposed portions that are not covered by the housing of capacitor module 9.

[0034] A shield plate 3 is provided to cover the upper surface of the sealing material 116 of the multiple semiconductor modules 6. Although not shown here for ease of explanation, a control board 2 is normally provided above the shield plate 3. That is, the shield plate 3 is provided between the sealing material 116 and the control board 2, and covers the upper surface of the sealing material 116 that faces the control board 2. Covering the upper surface of the sealing material 116 that faces the control board 2 with the shield plate 3 prevents the influence of radiated noise from the semiconductor elements 111 from reaching the control board 2. The shield plate 3 is made of a material that blocks radiated noise, such as a metal such as aluminum or copper, or graphite or a material containing a magnetic substance. The shield plate 3 is fixed to the control board 2 with screw holes 32.

[0035] The shield plate 3 extends from the upper surface of the sealing material 116 of each semiconductor module 6 so as to cover part or all of the exposed portions of the bus bars 8a, 8b that are not covered by the housing of the capacitor module 9. This makes it possible to prevent radiation noise originating from the exposed portions of the bus bars 8a, 8b and the main terminals 10a, 10b that are drawn out of the sealing material 116 from affecting the control board 2.

[0036] Fig. 5 is a top view of Fig. 4. The shield plate 3 has an opening 31 formed above it through which the control terminal 1b passes.

[0037] It is not necessary to pass the control terminals 1b of all the semiconductor modules 6 collectively through one opening 31. In other words, the control terminals 1b of each semiconductor module 6 may be passed individually through an opening 31 provided for each semiconductor module 6. Since the area of ​​the opening 31 can be made smaller than when the control terminals 1b are passed collectively through one opening 31, the shielding effect of the shield plate 3 can be increased.

[0038] FIG. 6 is a perspective view showing the semiconductor device 100 according to the first embodiment of the present disclosure.

[0039] A control board 2 is provided above the shield plate 3. A plurality of control terminals 1a and 1b are inserted through through holes in the control board 2.

[0040] Fig. 7 is a side view taken along the line A-A' in Fig. 6. In this figure, the insulating material 8c is omitted. It is clear that the exposed portions of the bus bars 8a and 8b are covered by the shield plate 3.

[0041] The shield plate 3 is fixed to the control board 2. The shield plate 3 is electrically insulated from the control board 2. Note that the method for fixing the shield plate 3 is not limited to this, and it may be fixed to a housing that houses the semiconductor module 6 or by other methods.

[0042] As described above, the shield plate 3 of this embodiment is provided between the sealing material 116 and the control board 2, and covers the upper surface of the sealing material 116 that faces the control board 2. The shield plate 3 extends so as to cover part or all of the exposed portions of the bus bars 8a, 8b that are not covered by the housing of the capacitor module 9. This makes it possible to prevent radiation noise generated outside the sealing material 116 that seals the semiconductor element 111 from affecting the control board 2.

[0043] First Modification of First Embodiment 8 shows a modified example of semiconductor device 100 according to the first embodiment of the present disclosure. The same side as in FIG. 7 is shown here. The portion of shield plate 3 that extends to cover the exposed portions of bus bars 8a and 8b may be bent so as to be inclined toward control board 2. In this case, the same effect as described above can also be obtained.

[0044] <Modification 2 of First Embodiment> FIG. 9 shows a modified example of the semiconductor device 100 according to the first embodiment of the present disclosure. The same side view as in FIG. 7 is shown here. Shield plate 3 may be bent to cover the side of control board 2 near the exposed portions of bus bars 8a and 8b. Furthermore, the bent portion of shield plate 3 may be further bent to wrap around the top surface of control board 2 above control terminal 1b protruding from control board 2. This prevents radiation noise generated outside sealing material 116 from reaching the top surface of control board 2. While shield plate 3 is bent at 90 degrees in the figure, the bending angle need not be limited to 90 degrees.

[0045] Third Modification of First Embodiment The portion of shield plate 3 that extends to cover the exposed portions of bus bars 8a and 8b may be further extended to cover part or all of the housing of capacitor module 9. This also makes it possible to shield radiation noise originating from capacitor module 9. This point is common to all of the following embodiments.

[0046] <Fourth Modification of First Embodiment> The number of semiconductor elements 111 included in the semiconductor module 6 does not have to be multiple, and may be one. In that case, the collector electrode of the single semiconductor element 111 is connected to the main terminal 10a, and is connected to one pole of the capacitor module 9 via the bus bar 8a. At the same time, the emitter electrode is connected to the main terminal 10b, and is connected to the other pole of the capacitor module 9 via the bus bar 8b. In this case, the same effect as described above can be obtained. Furthermore, the number of semiconductor modules 6 mounted on the semiconductor device 100 does not have to be multiple, and may be one. This point is common to all of the following embodiments.

[0047] Fifth Modification of First Embodiment The semiconductor element 111 is not limited to being made of silicon, but may also be made of a wide-bandgap semiconductor having a bandgap larger than that of silicon. Examples of wide-bandgap semiconductors include silicon carbide, gallium nitride, and diamond. The semiconductor element 111 made of such a wide-bandgap semiconductor has high voltage resistance and allowable current density, allowing for miniaturization. By using this miniaturized semiconductor element 111, the semiconductor device 100 incorporating the semiconductor element 111 can also be miniaturized and highly integrated. Furthermore, the high heat resistance of the semiconductor element 111 allows for miniaturization of the heat sink's heat dissipation fins, enabling air-cooling instead of water-cooling, thereby further miniaturizing the semiconductor device 100. Furthermore, the semiconductor element 111 has low power loss and high efficiency, allowing for high efficiency of the semiconductor device 100. While it is desirable for all of the semiconductor elements 111 to be made of wide-bandgap semiconductors, the effects described in this embodiment can be achieved even if only one of the semiconductor elements 111 is made of a wide-bandgap semiconductor. This point is common to all of the following embodiments.

[0048] Embodiment 2 The following describes the changes from the first embodiment. FIG. 10 is a side view showing a semiconductor device 100 according to a second embodiment of the present disclosure. The same side as FIG. 7 of the first embodiment is shown here. In this embodiment, the shield plate 3 is grounded by an earth wire 11. A resistor 12 is sandwiched between the earth wire 11. This allows the induced electromotive force generated when the shield plate 3 is polarized by radiation noise to escape to the outside of the semiconductor device 100. Furthermore, sandwiching the resistor 12 between the earth wire 11 prevents radiation noise from flowing back.

[0049] Embodiment 3 11 is a side view showing a semiconductor device 100 according to a third embodiment of the present disclosure. This view also shows the same side as FIG. 7 of the first embodiment. In this embodiment, the portion of the shield plate 3 that extends to cover the exposed portions of the main terminals 10a and 10b is bent in a wave-like shape. This allows the direction of travel of the radiation noise absorbed inside the shield plate 3 to be dispersed, and also reduces the impact of radiation noise being irradiated from the shield plate 3 to the control board 2 due to re-radiation, etc.

[0050] Embodiment 4 In this embodiment, the semiconductor device 100 according to the above-described first to third embodiments is applied to a three-phase inverter power conversion device. Note that the present disclosure is not limited to a specific power conversion device, and can also be applied to, for example, an inverter device, a converter device, a servo amplifier, and a power supply unit.

[0051] 12 is a block diagram showing the configuration of a power conversion system according to a fourth embodiment of the present disclosure. This power conversion device includes a power supply 210, a power conversion device 220, and a load 230. The power supply 210 is a DC power supply and supplies DC power to the power conversion device 220. The power supply 210 can be configured from various sources, such as a DC system, a solar cell, or a storage battery, or it may be configured from a rectifier circuit connected to an AC system or an AC / DC converter. Furthermore, the power supply 210 may be configured from a DC / DC converter that converts DC power output from the DC system into predetermined power.

[0052] The power conversion device 220 is a three-phase inverter connected between the power source 210 and the load 230, and converts DC power supplied from the power source 210 into AC power and supplies the AC power to the load 230. The power conversion device 220 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, a drive circuit 202 that outputs drive signals that drive each switching element of the main conversion circuit 201, and a control circuit 203 that outputs a control signal to the drive circuit 202 to control the drive circuit 202.

[0053] The load 230 is a three-phase electric motor driven by AC power supplied from the power conversion device 220. The load 230 is not limited to a specific application, but is an electric motor mounted on various electric devices, and is used as an electric motor for, for example, a hybrid vehicle, an electric vehicle, a railroad car, an elevator, or an air conditioning device.

[0054] The power conversion device 220 will be described in detail below. The main conversion circuit 201 includes switching elements and freewheel diodes (not shown), and converts DC power supplied from the power supply 210 into AC power by switching the switching elements, and supplies the AC power to the load 230. There are various specific circuit configurations for the main conversion circuit 201, but the main conversion circuit 201 according to this embodiment is a two-level three-phase full-bridge circuit, and can be configured from six switching elements and six freewheel diodes connected in anti-parallel to each switching element.

[0055] Each switching element and each freewheel diode of the main conversion circuit 201 is configured by the semiconductor device 100 corresponding to the above-described first embodiment. Two of the six switching elements are connected in series to form upper and lower arms, and each upper and lower arm constitutes one phase (U phase, V phase, W phase) of the full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to a load 230.

[0056] The drive circuit 202 may be built into the semiconductor device 100, or may be provided separately from the semiconductor device 100. The drive circuit 202 generates drive signals for driving the switching elements of the main conversion circuit 201 and supplies them to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, in accordance with control signals from a control circuit 203 (described later), the drive circuit 202 outputs to the control electrodes of each switching element a drive signal that turns the switching element on and a drive signal that turns the switching element off. When maintaining a switching element in the on state, the drive signal is a voltage signal (on signal) that is equal to or higher than the threshold voltage of the switching element, and when maintaining a switching element in the off state, the drive signal is a voltage signal (off signal) that is equal to or lower than the threshold voltage of the switching element.

[0057] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that the desired power is supplied to the load 230. Specifically, it calculates the time (on time) that each switching element of the main conversion circuit 201 should be in the on state based on the power to be supplied to the load 230. For example, the main conversion circuit 201 can be controlled by PWM control, which modulates the on time of the switching elements according to the voltage to be output. Then, it outputs a control signal to the drive circuit 202 so that an on signal is output to a switching element that should be in the on state at each time point, and an off signal is output to a switching element that should be in the off state at each time point. In accordance with this control signal, the drive circuit 202 outputs an on signal or an off signal as a drive signal to the control electrode of each switching element.

[0058] In the power conversion device of this embodiment, the semiconductor device 100 of embodiment 1 is applied as the switching element of the main conversion circuit 201, so that it is possible to provide a power conversion device having a semiconductor device that can prevent radiation noise generated outside the sealing material 116 that seals the semiconductor element 111 from affecting the control board 2.

[0059] In the present embodiment, an example in which the present disclosure is applied to a two-level three-phase inverter has been described, but the present disclosure is not limited to this and can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device is described, but a three-level or multi-level power conversion device may also be used. In addition, when supplying power to a single-phase load, the present disclosure may also be applied to a single-phase inverter. Furthermore, when supplying power to a DC load or the like, the present disclosure may also be applied to a DC / DC converter or an AC / DC converter.

[0060] Furthermore, the power conversion device to which the present disclosure is applied is not limited to cases in which the above-mentioned load is an electric motor, but can also be used, for example, as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a contactless power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, etc.

[0061] The present disclosure is not limited to the above-described embodiments, and various modifications can be made in the implementation stage without departing from the spirit of the present disclosure. Furthermore, the embodiments and modifications may be implemented in appropriate combinations, in which case the combined effects can be obtained.

[0062] <Correspondence to terms used in claims> The collector electrode is an example of a first main electrode. The emitter electrode is an example of a second main electrode. The main terminal 10a is an example of a first main terminal. The main terminal 10b is an example of a second main terminal. The bus bar 8a is an example of a first bus bar. The bus bar 8b is an example of a second bus bar. The positive electrode is an example of a first pole of the capacitor module 9. The negative electrode is an example of a second pole of the capacitor module 9.

[0063] Various aspects of the present disclosure are summarized below as appendices. (Appendix 1) a semiconductor element having a control electrode, a first main electrode, and a second main electrode; a control terminal connected to the control electrode; first and second main terminals connected to the first and second main electrodes, respectively; a sealing material that seals the semiconductor element, a portion of the control terminal, and a portion of the first and second main terminals; a capacitor module having a housing and first and second poles extending from the housing; a first bus bar connected to the first pole and connected to the first main terminal outside the encapsulant; a second bus bar connected to the second pole and connected to the second main terminal outside the encapsulant; a control board disposed opposite to the upper surface of the sealing material and connected to the control terminal; a radiation shielding plate disposed between the sealing material and the control board; Equipped with the shield plate extends to cover exposed portions of the first and second bus bars that are not covered by the housing; or The semiconductor device is bent so as to cover the side of the control board that is close to the exposed portion. (Appendix 2) 2. The semiconductor device according to claim 1, wherein the shield plate is wavy in the portion that extends to cover the exposed portion or the portion that is bent to cover the side surface. (Appendix 3) The semiconductor device according to claim 1 or 2, wherein the portion of the shield plate that extends to cover the exposed portion is further extended to cover at least a portion of the housing of the capacitor module. (Appendix 4) 3. The semiconductor device according to claim 1, wherein the portion of the shield plate that extends to cover the exposed portion is bent so as to be inclined toward the control board. (Appendix 5) 3. The semiconductor device according to claim 1, wherein the portion of the shield plate that is bent to cover the side surface near the exposed portion of the control board is further bent to wrap around the top surface of the control board. (Appendix 6) 6. The semiconductor device according to claim 1, wherein the shield plate has an opening through which the control terminal passes. (Appendix 7) 7. The semiconductor device according to claim 1, wherein the shield plate is electrically grounded. (Appendix 8) 8. The semiconductor device according to claim 1, wherein the semiconductor element is formed of a wide bandgap semiconductor. (Appendix 9) a main conversion circuit including the semiconductor device according to any one of Supplementary Notes 1 to 8, which converts input power and outputs the converted power; a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit. [Explanation of symbols]

[0064] 1a control terminal, 1b control terminal, 2 control board, 3 shield plate, 4 output bus bar, 5 output terminal, 6 semiconductor module, 7 cooler, 8a bus bar, 8b bus bar, 8c insulating material, 9 capacitor module, 10a main terminal, 10b main terminal, 11 earth wire, 12 resistor, 13 base board, 31 opening, 32 screw hole, 60 external power supply, 70 external device, 100 semiconductor device, 111 semiconductor element, 112 bonding material, 114 insulating layer, 116 sealing material, 117 circuit pattern, 118 circuit pattern, 120 board, 201 main conversion circuit, 202 drive circuit, 203 control circuit, 210 power supply, 220 power conversion device, 230 load

Claims

1. a semiconductor element having a control electrode, a first main electrode, and a second main electrode; a control terminal connected to the control electrode; first and second main terminals connected to the first and second main electrodes, respectively; a sealing material that seals the semiconductor element, a portion of the control terminal, and a portion of the first and second main terminals; a capacitor module having a housing and first and second poles extending from the housing; a first bus bar connected to the first pole and connected to the first main terminal outside the encapsulant; a second bus bar connected to the second pole and connected to the second main terminal outside the encapsulant; a control board disposed opposite to the upper surface of the sealing material and connected to the control terminal; a radiation shielding plate disposed between the sealing material and the control board; Equipped with the shield plate extends to cover a part or all of the exposed portions of the first and second bus bars that are not covered by the housing; or The semiconductor device is bent so as to cover the side of the control board that is close to the exposed portion.

2. 2. The semiconductor device according to claim 1, wherein the shield plate is wavy at a portion extending to cover the exposed portion or at a portion bent to cover the side surface.

3. 3. The semiconductor device according to claim 1, wherein the portion of said shield plate that extends to cover said exposed portion further extends to cover at least a part of said housing of said capacitor module.

4. 3. The semiconductor device according to claim 1, wherein the portion of said shield plate that extends to cover said exposed portion is bent so as to be inclined toward said control board.

5. 3. The semiconductor device according to claim 1, wherein the portion of the shield plate bent to cover the side surface of the control board near the exposed portion is further bent to wrap around the upper surface of the control board.

6. 3. The semiconductor device according to claim 1, wherein said shield plate has an opening through which said control terminal passes.

7. 3. The semiconductor device according to claim 1, wherein the shield plate is electrically grounded.

8. 3. The semiconductor device according to claim 1, wherein the semiconductor element is formed of a wide bandgap semiconductor.

9. a main conversion circuit having the semiconductor device according to claim 1 or 2, which converts input power and outputs the converted power; a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

Citation Information

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