Wiring structure with support, method for manufacturing wiring structure with support, method for manufacturing composite wiring board, and method for manufacturing wiring structure with functional device

Abstract

To provide a wiring structure with a support in which a release layer can be uniformly removed from the wiring structure.SOLUTION: A wiring structure 1 with a support includes: a support 11 having a support surface and transmitting laser light in a direction perpendicular to the support surface; a wiring structure 15 including a conductor layer and an insulating layer in which the conductor layer is embedded and facing the support surface; a crystallization layer 13 interposed between the support 11 and the wiring structure 15 and increased in crystallinity by irradiation with the laser light; and a peeling layer 12 interposed between the support 11 and the crystallization layer 13 and transmitting the laser light.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a wiring structure with a support, a method for manufacturing a wiring structure with a support, a method for manufacturing a composite wiring board, and a method for manufacturing a wiring structure with a functional device. [Background technology]

[0002] In recent years, as semiconductor devices have become faster and more highly integrated, there has been a demand for narrower pitches for the connecting terminals used to connect semiconductor chips and for finer wiring within the substrate for FC-BGA (Flip Chip-Ball Grid Array) substrates on which semiconductor chips are mounted. Meanwhile, there is a demand for connecting FC-BGA substrates to motherboards using connecting terminals arranged at roughly the same pitch as conventional substrates. To meet these demands, a technology has been adopted in which a multilayer wiring substrate containing fine wiring, also known as an interposer, is provided between the FC-BGA substrate and the semiconductor chip.

[0003] One of these is silicon interposer technology, which manufactures interposers by forming a multilayer wiring structure, each layer of which contains fine wiring, on a silicon wafer using semiconductor circuit manufacturing technology.

[0004] Furthermore, a method has been developed in which the above-mentioned multilayer wiring structure is directly fabricated on an FC-BGA substrate, rather than being formed on a silicon wafer. This method involves forming the above-mentioned multilayer wiring structure using chemical mechanical polishing (CMP) or the like in the manufacture of an FC-BGA substrate whose core layer is made of, for example, a glass epoxy substrate. This method is disclosed in Patent Document 1.

[0005] Furthermore, there is also a method (hereinafter referred to as a transfer method) in which an interposer is formed on a support such as a glass substrate provided with a release layer, the interposer is bonded to an FC-BGA substrate, and then the support is peeled off from the interposer by irradiating the release layer with laser light, thereby providing the above-mentioned multilayer wiring structure on the FC-BGA substrate. This method is disclosed in Patent Document 2. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-225671 [Patent Document 2] International Publication No. 2018 / 047861 Summary of the Invention [Problem to be solved by the invention]

[0007] An object of the present invention is to provide a wiring structure with a support, which allows a release layer to be uniformly removed from the wiring structure. [Means for solving the problem]

[0008] According to one aspect of the present invention, there is provided a wiring structure with a support, the wiring structure comprising: a support having a support surface and transmitting laser light in a direction perpendicular to the support surface; a wiring structure including a conductor layer and an insulating layer in which the conductor layer is embedded, facing the support surface; a crystallization layer interposed between the support and the wiring structure, the crystallinity of which is increased by irradiation with the laser light; and a peeling layer interposed between the support and the crystallization layer, transmitting the laser light.

[0009] According to another aspect of the present invention, there is provided the support-attached wiring structure according to the above aspect, wherein the crystallized layer is amorphous.

[0010] According to yet another aspect of the present invention, there is provided a support-attached wiring structure according to any one of the above aspects, wherein the crystallized layer contains an inorganic material.

[0011] According to yet another aspect of the present invention, there is provided the wiring structure with a support according to the above aspect, wherein the inorganic material is amorphous silicon or amorphous germanium.

[0012] According to yet another aspect of the present invention, there is provided a support-attached wiring structure according to any one of the above aspects, wherein the thickness of the crystallized layer is within the range of 1 nm to 500 nm.

[0013] According to yet another aspect of the present invention, there is provided a wiring structure with a support according to any one of the above aspects, wherein the release layer contains an inorganic nitride.

[0014] According to yet another aspect of the present invention, there is provided the wiring structure with a support according to the above aspect, wherein the inorganic nitride is silicon nitride or gallium nitride.

[0015] According to yet another aspect of the present invention, there is provided a wiring structure with a support according to any one of the above aspects, wherein the wavelength of the laser light is within the range of 250 nm or more and 380 nm or less.

[0016] According to yet another aspect of the present invention, there is provided a wiring structure with a support according to any one of the above aspects, in which peeling occurs at the interface between the peeling layer and the crystallization layer by irradiation with the laser light.

[0017] According to yet another aspect of the present invention, there is provided a support-attached wiring structure according to any one of the above aspects, wherein the release layer has a transmittance of 50% or more for the laser light.

[0018] According to yet another aspect of the present invention, there is provided a method for manufacturing a wiring structure with a support, the method comprising: forming a release layer that transmits laser light on a support having a support surface and that transmits laser light in a direction perpendicular to the support surface; forming a crystallization layer on the release layer, the crystallinity of which is increased by irradiation with the laser light; and forming a wiring structure on the crystallization layer, the wiring structure including a conductor layer and an insulating layer in which the conductor layer is embedded.

[0019] According to yet another aspect of the present invention, there is provided a method for manufacturing a composite wiring board, comprising: joining a first wiring substrate to the wiring structure included in the wiring structure with a support described in claim 1; and then irradiating the crystallized layer with the laser light to peel off the support from the wiring structure.

[0020] According to yet another aspect of the present invention, there is provided a method for manufacturing a wiring structure with a functional device, comprising bonding a functional device to the wiring structure included in the wiring structure with a support described in claim 1, and then irradiating the crystallization layer with the laser light to peel off the support from the wiring structure.

[0021] Here, a "functional device" refers to a device that operates when supplied with at least one of power and an electrical signal, a device that outputs at least one of power and an electrical signal in response to an external stimulus, or a device that operates when supplied with at least one of power and an electrical signal and outputs at least one of power and an electrical signal in response to an external stimulus. The functional device may be in the form of a chip, such as a semiconductor chip or a chip in which circuits and elements are formed on a substrate made of a material other than a semiconductor, such as a glass substrate. The functional device may include, for example, one or more of a large-scale integrated circuit (LSI), a memory, an imaging element, a light-emitting element, and a MEMS (Micro Electro Mechanical Systems). The MEMS may include, for example, one or more of a pressure sensor, an acceleration sensor, a gyro sensor, a tilt sensor, a microphone, and an acoustic sensor. According to one example, the functional device is a semiconductor chip including an LSI. [Effects of the Invention]

[0022] According to the present invention, there is provided a wiring structure with a support, which allows a release layer to be uniformly removed from the wiring structure. [Brief explanation of the drawings]

[0023] [Figure 1]1 is a cross-sectional view schematically showing a wiring structure with a support according to an embodiment of the present invention; [Figure 2] 1 is a cross-sectional view schematically showing a support body in a manufacturing method for a wiring structure with a support body according to an embodiment of the present invention. [Figure 3] 4A and 4B are cross-sectional views schematically showing a release layer and a crystallization layer forming step in a manufacturing method of a wiring structure with a support according to one embodiment of the present invention. [Figure 4] FIG. 3 is a cross-sectional view schematically showing a first seed layer forming step in the method for manufacturing a wiring structure with a support according to one embodiment of the present invention. [Figure 5] 3A and 3B are cross-sectional views schematically showing a resist layer forming step in the method for manufacturing a wiring structure with a support according to one embodiment of the present invention. [Figure 6] 3A and 3B are cross-sectional views schematically showing a conductor layer forming step in the method for manufacturing a wiring structure with a support according to one embodiment of the present invention. [Figure 7] 4A and 4B are cross-sectional views schematically showing an insulating layer forming step in the method for manufacturing a wiring structure with a support according to one embodiment of the present invention. [Figure 8] 4A and 4B are cross-sectional views schematically showing a step of forming an opening in an insulating layer in a method for manufacturing a wiring structure with a support according to one embodiment of the present invention. [Figure 9] FIG. 3 is a cross-sectional view schematically showing a second seed layer forming step in the method for manufacturing a wiring structure with a support according to one embodiment of the present invention. [Figure 10] 3A to 3C are cross-sectional views schematically showing a resist layer and a conductor layer forming step in a method for manufacturing a wiring structure with a support according to one embodiment of the present invention. [Figure 11] 4A to 4C are cross-sectional views schematically showing a resist layer removing step in the method for manufacturing a wiring structure with a support according to one embodiment of the present invention. [Figure 12] 3A and 3B are cross-sectional views schematically showing a conductive layer, an insulating layer, and a second seed layer forming step in a method for manufacturing a wiring structure with a support according to one embodiment of the present invention. [Figure 13] 3 is a cross-sectional view schematically showing a step of forming an outermost insulating layer in a method for manufacturing a wiring structure with a support according to one embodiment of the present invention. FIG. [Figure 14]3 is a cross-sectional view schematically showing a surface treatment layer forming step in the method for manufacturing a wiring structure with a support according to one embodiment of the present invention. FIG. [Figure 15] 3 is a cross-sectional view schematically showing a first metal bump formation step in the method for manufacturing a wiring structure with a support according to one embodiment of the present invention. FIG. [Figure 16] FIG. 2 is a cross-sectional view schematically showing a wiring structure with a support, omitting a first seed layer, a wiring structure, a surface treatment layer, and a first metal bump. [Figure 17] 17 is a plan view schematically showing the surface on the crystallization layer side of the wiring structure with the support body shown in FIG. 16. FIG. [Figure 18] FIG. 1 is a plan view schematically showing a wiring structure with a support, omitting a release layer, a crystallization layer, a first seed layer, a surface treatment layer, and a first metal bump. [Figure 19] 3 is a cross-sectional view schematically showing a first wiring board in a method for manufacturing a composite wiring board according to an embodiment of the present invention. FIG. [Figure 20] 4 is a cross-sectional view schematically showing a step of aligning the position of the first wiring substrate with the position of the wiring structure with supports in the method for manufacturing a composite wiring board according to one embodiment of the present invention. FIG. [Figure 21] 4 is a cross-sectional view schematically showing a step of joining a first wiring board and a wiring structure with a support body in a method for manufacturing a composite wiring board according to one embodiment of the present invention. FIG. [Figure 22] 5A and 5B are cross-sectional views schematically showing a laser light irradiation step in the method for manufacturing a composite wiring board according to one embodiment of the present invention. [Figure 23] 5A to 5C are cross-sectional views schematically showing a support member peeling step in the method for manufacturing a composite wiring board according to one embodiment of the present invention. [Figure 24] 1 is a cross-sectional view schematically showing a composite wiring board according to an embodiment of the present invention; [Figure 25] 1 is a cross-sectional view of a packaged device according to an embodiment of the present invention; [Figure 26] 5A to 5C are cross-sectional views schematically showing a step of bonding a wiring structure with a support body and a functional device in a manufacturing method of a wiring structure with a functional device according to one embodiment of the present invention. [Figure 27]4A and 4B are cross-sectional views schematically showing a second underfill forming step in the method for manufacturing the wiring structure with a functional device according to one embodiment of the present invention. [Figure 28] 5A and 5B are cross-sectional views schematically showing a sealing resin forming step in the manufacturing method of the wiring structure with a functional device according to the embodiment of the present invention. [Figure 29] 5A and 5B are cross-sectional views schematically showing a laser beam irradiation step in the method for manufacturing a wiring structure with a functional device according to one embodiment of the present invention. [Figure 30] 5A to 5C are cross-sectional views schematically showing a support peeling step in the method for manufacturing a wiring structure with a functional device according to one embodiment of the present invention. [Figure 31] 1 is a cross-sectional view schematically showing a wiring structure with a functional device according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0024] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The embodiments described below are more specific embodiments of any of the above aspects. Elements having the same or similar functions are given the same reference numerals, and redundant explanations will be omitted. It should be noted that the drawings are schematic, and the relationship between the dimension in the thickness direction and the dimension in the direction perpendicular to the thickness direction, i.e., the in-plane direction, and the relationship between the dimensions in the thickness direction of multiple layers may differ from the actual ones. Therefore, specific dimensions should be determined with reference to the following explanation. It should also be noted that the dimensional relationship between two or more components may differ between multiple drawings.

[0025] The following embodiments are examples that embody the technical idea of ​​the present invention, and the technical idea of ​​the present invention is not limited to the materials, shapes, structures, and arrangements of the components described below. Various modifications can be made to the technical idea of ​​the present invention within the technical scope defined by the claims.

[0026] <Wiring structure with support> FIG. 1 is a cross-sectional view schematically showing a wiring structure with a support according to one embodiment of the present invention.

[0027] 1 includes a support 11, a release layer 12, a crystallization layer 13, a first seed layer 14, a wiring structure 15, a surface treatment layer 16, and a first metal bump 17. The support-attached wiring structure 1 is used to transfer the wiring structure 15 to, for example, an FC-BGA substrate. The transfer is performed, for example, by irradiating the crystallization layer 13 with laser light and peeling the support 11 from the wiring structure 15.

[0028] The support 11 has a support surface and transmits laser light in a direction perpendicular to the support surface. The support 11 is, for example, transparent.

[0029] The wavelength of the laser light is, for example, in the range of 250 nm to 380 nm.

[0030] The material of the support 11 is, for example, glass, polycarbonate or acrylic.

[0031] The material of the support 11 is preferably glass. When the support 11 is made of glass, the support 11 has a sufficient thickness and is excellent in shape retention, so that the use of such a support 11 makes it possible to easily form the wiring structure 15 having a fine wiring pattern.

[0032] The coefficient of thermal expansion (CTE) of the glass is preferably in the range of 3 ppm to 15 ppm, more preferably in the range of 3.3 ppm to 12.6 ppm. When the coefficient of thermal expansion is in the range of 3 ppm to 15 ppm, it becomes easier to achieve high-precision arrangement of the wiring pattern in the wiring structure 15, and it becomes easier to form a flat wiring structure 15. When the coefficient of thermal expansion of the glass is about 9 ppm, it is close to the coefficient of linear expansion of the FC-BGA substrate and the semiconductor chip, and therefore warping and the like are less likely to occur.

[0033] The thickness of the support 11 is preferably 0.7 mm or more, and more preferably 1.1 mm or more. If the support 11 is too thin, warping and the like are likely to occur. If the support 11 is too thick, the support 11 is likely to absorb a large amount of laser light. When the support 11 is made of glass, if the thickness of the support 11 is within the above range, warping is unlikely to occur during the manufacturing process.

[0034] The support 11 may be rectangular or circular.

[0035] The release layer 12 is interposed between the support 11 and the crystallized layer 13. The release layer 12 transmits laser light. The release layer 12 is easily peeled off from the crystallized layer 13 by irradiation with laser light, but has excellent adhesion to the crystallized layer 13 before irradiation with laser light. The release layer 12 preferably has a laser light transmittance of 50% or more, more preferably 80% or more. In this case, it is possible to reduce the output of the laser light.

[0036] The release layer 12 includes, for example, an inorganic nitride or an inorganic oxide. The release layer 12 is preferably made of an inorganic nitride. Examples of inorganic nitrides include silicon nitride (SiN) and gallium nitride (GaN). The release layer 12 may be a single layer or a multilayer.

[0037] The release layer 12 can be formed by, for example, a sputtering method or a chemical vapor deposition (CVD) method.

[0038] The thickness of the release layer 12 is, for example, preferably in the range of 1 nm to 1000 nm, more preferably in the range of 10 nm to 500 nm. If the release layer 12 is too thin, the adhesion between the support 11 and the crystallization layer 13 is likely to be reduced. If the release layer 12 is too thick, the laser light is likely to be absorbed by the release layer 12 when irradiating the crystallization layer 13 with the laser light. In this case, it may be difficult to improve the crystallization of the crystallization layer 13.

[0039] The heat resistance temperature of the release layer 12 is preferably equal to or higher than the curing temperature in the wiring structure formation process, for example, 200° C. or higher. Such a release layer 12 can withstand high-temperature treatment in the formation of the wiring structure 15.

[0040] The crystallization layer 13 is interposed between the peeling layer 12 and the wiring structure 15. The crystallinity of the crystallization layer 13 is increased by irradiation with laser light. For example, the crystallization layer 13 is crystallized by irradiation with laser light. It is preferable that the crystallization layer 13 and the peeling layer 12 are in contact with each other. In this case, the laser light is less likely to attenuate before it reaches the crystallization layer 13.

[0041] The crystallized layer 13 is, for example, amorphous. At least the surface of the crystallized layer 13 on the release layer 12 side is amorphous. The crystallized layer 13 contains, for example, an inorganic material. The crystallized layer 13 is preferably made of an inorganic material. The inorganic material is preferably amorphous silicon (a-Si) or amorphous germanium (a-Ge).

[0042] The crystallized layer 13 can be formed by, for example, a sputtering method or a chemical vapor deposition (CVD) method.

[0043] The crystallized layer 13 is, for example, a continuous film. The thickness of the crystallized layer 13 is, for example, preferably in the range of 1 nm to 500 nm, and more preferably in the range of 5 nm to 100 nm. If the crystallized layer 13 is too thin, it is difficult to form the crystallized layer 13 uniformly. If the crystallized layer 13 is too thick, the load in the process of removing the crystallized layer 13 tends to be large.

[0044] The heat resistance temperature of the crystallized layer 13 is preferably equal to or higher than the curing temperature in the wiring structure formation process, for example, 200° C. or higher. Such a crystallized layer 13 can withstand high-temperature treatment in forming the wiring structure 15.

[0045] According to one example, the support 11 is a layer made of glass, the release layer 12 is a layer made of SiN having a thickness of 500 nm, and the crystallization layer 13 is a layer made of a-Si having a thickness of 50 nm.

[0046] The crystallized layer 13 may be made up of two or more layers.

[0047] The first seed layer 14 is, for example, a power supply layer in the formation of a conductor layer, which will be described later. The first seed layer 14 includes, for example, copper, nickel, aluminum, titanium, chromium, molybdenum, tungsten, tantalum, gold, iridium, ruthenium, palladium, platinum, Al-Si based alloys, Al-Si-Cu based alloys, Al-Cu based alloys, Ni-Fe based alloys, indium tin oxide (ITO), indium zinc oxide (IZO), activated zinc oxide (AZO), zinc oxide (ZnO), lead zirconate titanate (PZT), titanium nitride (TiN), Cu3N4, Cu alloys, or mixtures thereof.

[0048] The first seed layer 14 is formed by, for example, a sputtering method or a chemical vapor deposition (CVD) method.

[0049] The thickness of the first seed layer 14 is preferably 1 μm or less, and more preferably in the range of 50 nm to 500 nm.

[0050] The first seed layer 14 may be composed of two or more layers. In this case, the first seed layer 14 may be composed of, for example, a first metal-containing layer interposed between the crystallized layer 13 and the wiring structure 15, and a second metal-containing layer interposed between the first metal-containing layer and the wiring structure 15.

[0051] The first metal-containing layer contains, for example, titanium. The second metal-containing layer contains, for example, copper. The first metal-containing layer and the second metal-containing layer are formed, for example, by sputtering. When a first metal-containing layer containing titanium is used, the first metal-containing layer has excellent adhesion to the second metal-containing layer. When a second metal-containing layer containing copper is used, the first metal-containing layer has excellent adhesion to the conductor layer described below.

[0052] The thickness of the first metal-containing layer is preferably, for example, in the range of 10 nm to 100 nm. The thickness of the second metal-containing layer is preferably, for example, in the range of 40 nm to 400 nm. In one example, the first metal-containing layer is a 50 nm thick layer made of titanium, and the second metal-containing layer is a 300 nm thick layer made of copper.

[0053] The wiring structure 15 faces the support surface of the support body 11. The wiring structure 15 connects, for example, a functional device such as a semiconductor chip to the FC-BGA substrate. The wiring structure 15 is manufactured by, for example, an existing method.

[0054] The wiring structure 15 includes a conductor layer and an insulating layer in which the conductor layer is embedded. The wiring structure 15 is, for example, a multilayer wiring structure included in an interposer. The wiring structure 15 is, for example, made of a build-up wiring layer. The wiring structure 15 includes, for example, a fine wiring pattern. The minimum line / space of the wiring structure 15 is, for example, in the range of 1 μm / 1 μm to 5 μm / 5 μm. The line / space of the wiring structure 15 can be changed as appropriate, for example, as long as it can be electrically connected to a functional device mounted thereon. The conductor layer included in the wiring structure 15 is formed, for example, by a damascene method or a semi-additive method. The conductor layer will be described later.

[0055] The thickness of the wiring structure 15 is not particularly limited. The thickness of the wiring structure 15 is, for example, in the range of 2 μm to 60 μm. In one example, the thickness of the wiring structure 15 is approximately 28 μm. Since it is difficult to handle such a wiring structure 15 alone, it is preferable to handle it in a state where it is laminated on the support 11.

[0056] The wiring structure 15, the surface treatment layer 16, and the first metal bump 17 will be described in detail later.

[0057] Note that layers other than the above-mentioned layers may be provided in the support-attached wiring structure 1. For example, a protective layer may be provided between the crystallized layer 13 and the wiring structure 15 to protect the wiring structure 15 from laser light.

[0058] <Method for manufacturing a wiring structure with a support> An example of a method for manufacturing the wiring structure 1 with a support body will be described below with reference to FIGS.

[0059] First, a support 11 is prepared as shown in Fig. 2. The support 11 is made of glass.

[0060] Next, as shown in FIG. 3, a release layer 12 and a crystallization layer 13 are formed on the support 11.

[0061] Next, as shown in FIG. 4, a first seed layer 14 is formed on the crystallized layer 13. Here, a first metal-containing layer and a second metal-containing layer are formed as the first seed layer 14. Specifically, first, titanium is sputtered on the crystallized layer 13 in a vacuum. In this way, the first metal-containing layer is formed. Next, copper is sputtered on the first metal-containing layer in a vacuum. In this way, the second metal-containing layer is formed.

[0062] Next, the wiring structure 15 is formed.

[0063] 5, a resist layer 151A is formed in a pattern on the first seed layer 14. Specifically, the resist layer 151A is first formed on the first seed layer 14. Thereafter, a portion of the resist layer 151A is removed by photolithography to provide an opening. In this manner, the resist layer 151A is formed in a pattern.

[0064] The material of the resist layer 151A is, for example, an alkaline development type photosensitive resin.

[0065] Next, as shown in FIG. 6, a conductor layer 152A is formed on the first seed layer 14. Specifically, first, the conductor layer 152A containing copper is formed by electrolytic plating on the portion of the first seed layer 14 that is not covered by the resist layer 151A. Thereafter, the resist layer 151A is removed using a resist remover such as an alkaline solution. The conductor layer 152A is, for example, an electrode. The conductor layer 152A is, for example, an electrode used for bonding to a first wiring substrate (described later) or an electrode used for bonding to a functional device.

[0066] When the conductor layer 152A contains copper, the conductor layer 152A can be formed easily and inexpensively. Furthermore, the conductor layer 152A containing copper has excellent conductivity.

[0067] The conductor layer 152A may be made of, for example, nickel, chromium, palladium, gold, or rhodium. The conductor layer 152A made of the above materials can be formed by, for example, electrolytic plating.

[0068] The thickness of the conductor layer 152A is preferably 5 μm or more. The thickness of the conductor layer 152A is preferably in the range of 1 μm to 30 μm. If the conductor layer 152A is too thick, the manufacturing cost tends to increase. If the conductor layer 152A is too thin, problems may occur in bonding the functional device or the first wiring substrate (described later) to the wiring structure 15.

[0069] Next, as shown in FIG. 7, an insulating layer 153A is formed on the portion of the first seed layer 14 that is not covered by the conductor layer 152A and on the surface of the conductor layer 152A. Specifically, a photosensitive epoxy resin is applied by spin coating to the portion of the first seed layer 14 that is not covered by the conductor layer 152A and on the surface of the conductor layer 152A. The photosensitive epoxy resin is then cured. In this manner, the insulating layer 153A is formed. For example, the insulating layer 153A is formed so as to bury the conductor layer 152A.

[0070] When a photosensitive epoxy resin is used, it is easy to harden the insulating layer 153A at a relatively low temperature. Furthermore, since the photosensitive epoxy resin is resistant to shrinkage upon hardening, it is excellent for forming a fine wiring pattern.

[0071] The material of the insulating layer 153A may be a polyimide resin or a polyamide resin.

[0072] Instead of forming the insulating layer 153A using a photosensitive epoxy resin, the insulating layer 153A may be obtained by compressing an insulating resin film with a vacuum laminator. In this case, the insulating layer 153A can be formed with excellent flatness.

[0073] The thickness of the insulating layer 153A is preferably in the range of 0.5 μm to 50 μm, and more preferably in the range of 2 μm to 15 μm. If the insulating layer 153A is too thick, it is difficult to obtain a wiring structure 15 with excellent flatness. If the insulating layer 153A is too thin, it is difficult to obtain high insulation reliability.

[0074] Next, one or more openings are formed in the insulating layer 153A by photolithography, as shown in Fig. 8. The openings are formed so that a part of the upper surface of the conductor layer 152A is exposed.

[0075] After the openings are formed, plasma treatment may be performed in the openings to remove residues generated by development.

[0076] Next, as shown in FIG. 9, a second seed layer 154A is formed on the conductive layer 152A and the surface of the insulating layer 153A exposed by the openings.

[0077] The second seed layer 154A can be made of the same materials as those usable for the first seed layer 14. The second seed layer 154A can be formed using the same methods as those usable for the first seed layer 14. Like the first seed layer 14, the second seed layer 154A can be made of two or more layers.

[0078] Hereinafter, second seed layer 154A is assumed to be composed of a first metal-containing layer containing titanium and a second metal-containing layer containing copper, with the first metal-containing layer having a thickness of 50 nm and the second metal-containing layer having a thickness of 300 nm.

[0079] 10, a resist layer 151B is formed in a pattern on the second seed layer 154A. Specifically, openings are formed in the resist layer 151B so as to expose portions of the second seed layer 154A adjacent to the conductor layer 152A. Thereafter, a conductor layer 152B is formed so as to cover the entire surface of the second seed layer 154A that is not covered by the resist layer 151B. The conductor layer 152B is a wiring pattern included in the wiring structure 15.

[0080] The materials used for the resist layer 151B and the method for forming them are the same as those described for the resist layer 151A.

[0081] The materials used for and the methods of forming the conductor layer 152B and the conductor layer 152C described later are the same as those described for the conductor layer 152A. Here, the conductor layer 152B contains copper.

[0082] Next, the resist layer 151B is removed as shown in Fig. 11. Thereafter, the portion of the second seed layer 154A that is not covered with the conductor layer 152A is removed by etching.

[0083] 7 to 11 is repeated twice to obtain the structure shown in Fig. 12. The structure shown in Fig. 12 includes conductor layers 152A, 152B, 152C, and 152D, insulating layers 153A, 153B, and 153C, and second seed layers 154A, 154B, and 154C. The conductor layers 152B and 152C are, for example, wiring included in the wiring structure 15. The conductor layer 152D is, for example, an electrode used for bonding to a first wiring substrate described below, or an electrode used for bonding to a functional device.

[0084] The thickness of the conductor layer 152D is preferably 5 μm or more. The method described with reference to FIGS. 7 to 11 may be repeated once, or may be repeated three or more times.

[0085] 13, an outermost insulating layer 155 is formed in a pattern on two or more layers each including a conductive layer and an insulating layer. Specifically, first, the outermost insulating layer 155 is formed on a region of the surface of the insulating layer 153C that is not covered by the second seed layer 154C and the conductor layer 152D, on the surface of the conductor layer 152D, and on the side surfaces of the second seed layer 154C. Next, an opening is formed in the outermost insulating layer 155 by photolithography so that at least a portion of the conductor layer 152D is exposed.

[0086] The material of the outermost insulating layer 155 is, for example, a photosensitive epoxy resin, and may be the same as the material of the insulating layer 153A.

[0087] In this way, the wiring structure 15 is formed.

[0088] 14, a surface treatment layer 16 is formed on the surface of the conductor layer 152D in a portion not covered by the outermost insulating layer 155. The surface treatment layer 16 is provided, for example, to prevent oxidation of the surface of the conductor layer 152D and / or to improve the wettability of the first metal bump 17.

[0089] For example, a plating film such as electroless Ni / Pd / Au plating, electroless tin plating, or electroless Ni / Au plating can be used as the surface treatment layer 16. Alternatively, a film made of water-soluble preflux (OSP: Organic Solderability Presevative) may be used as the surface treatment layer 16.

[0090] 15, first metal bumps 17 are formed on the surface treatment layer 16. Specifically, for example, the material of the first metal bumps 17 is placed on the surface treatment layer 16, and then melted, cooled, and fixed to form the first metal bumps 17.

[0091] The material of the first metal bumps 17 is, for example, solder or a metal such as gold.

[0092] In this way, a wiring structure 1 with a support is obtained.

[0093] The outermost insulating layer 155, the surface treatment layer 16, and the first metal bump 17 may be omitted.

[0094] The wiring width of the wiring structure 15 is preferably, for example, in the range of 1 μm to 5 μm. A wiring structure 15 having a narrow wiring width can be used as a wiring structure included in an interposer included in a high bandwidth memory (HBM). For example, if the wiring width is 2 μm, the wiring height is 2 μm, and the thickness of each insulating layer is 2 μm, the thickness of the layer consisting of the insulating layer and the conductor layer is 4 μm. If two such layers consisting of the insulating layer and the conductor layer are stacked and the thickness of each of the conductor layers 152A and 152D is 10 μm, the thickness of the laminate consisting of the wiring structure 15 and the conductor layers 152A and 152D will be 28 μm. In this way, the laminate consisting of the wiring structure 15 and the conductor layers 152A and 152D may be thin.

[0095] Fig. 16 is a cross-sectional view schematically showing the above-mentioned wiring structure 1 with a support, omitting the first seed layer 14, the wiring structure 15, the surface treatment layer 16, and the first metal bump 17. Fig. 17 is a plan view schematically showing the surface of the wiring structure 1 with a support shown in Fig. 16 on the crystallization layer 13 side.

[0096] As shown in Figures 16 and 17, the outline of the first orthogonal projection of the crystallized layer 13 onto a plane parallel to the support surface of the support 11 preferably lies inside the outline of the second orthogonal projection of the release layer 12 onto the plane. In this case, when the crystallized layer 13 is irradiated with laser light, hydrogen is also generated at the end face of the crystallized layer 13, making it easy for the support 11 to peel off from the wiring structure 15. Therefore, for example, when the above-described support-attached wiring structure 1 is used to transfer the wiring structure 15 to an FC-BGA substrate to obtain a composite wiring board, the composite wiring board can be obtained with a high yield. The mechanism of peeling by laser light irradiation will be described later.

[0097] 16 and 17 can be obtained, for example, by forming a crystallized layer 13 and then removing the peripheral portion of the crystallized layer 13. In another example, the structure shown in Figures 16 and 17 can be obtained, for example, by forming a release layer 12 and then forming a protective film on the peripheral portion of the release layer 12, then forming a crystallized layer 13 on the release layer 12 and the protective film, and then removing the protective film to remove the crystallized layer 13 on the protective film.

[0098] FIG. 18 is a plan view schematically showing the above-described wiring structure 1 with a support, omitting the surface treatment layer 16 and the first metal bump 17. FIG. 18 shows the surface of the wiring structure 1 with a support on the wiring structure 15 side. As shown in FIG. 18, the wiring structure 1 with a support may be provided with a plurality of wiring structures 15. The plurality of wiring structures 15 form, for example, a substrate unit. It is preferable that the plurality of wiring structures 15 are located inside the outline of the first orthogonal projection described above. In this case, it is possible to peel the support 11 from the wiring structure 15 with a high yield.

[0099] <Method of manufacturing a composite wiring board> An example of a method for manufacturing a composite wiring board will be described below with reference to Figures 19 to 24. Note that surface treatment layer 16 is omitted in Figures 20 to 24.

[0100] First, a first wiring substrate 20 shown in Fig. 19 is prepared. The first wiring substrate 20 includes a core layer 21, a conductor layer 22, an insulating resin 23, a layer 24, electrodes 25, an outermost insulating resin layer 26, and second metal bumps 27. The first wiring substrate 20 is, for example, an FC-BGA substrate.

[0101] The core layer 21 is an insulating layer. The core layer 21 is, for example, a fiber-reinforced substrate made of woven or nonwoven fabric impregnated with a thermosetting insulating resin. The woven or nonwoven fabric may be made of, for example, glass fiber, carbon fiber, or aramid fiber. The insulating resin may be, for example, epoxy resin.

[0102] One or more through holes are provided in the core layer 21. The side walls of the through holes are covered with a conductor layer 22 containing a metal such as copper. The through holes covered with the conductor layer 22 are filled with an insulating resin 23.

[0103] A layer 24 is provided on each support surface of the core layer 21. The layer 24 includes a conductive pattern 241 and an insulating layer 242. The conductive pattern 241 is in contact with the conductive layer 22. The insulating layer 242 covers, for example, the side surfaces of the conductive pattern 241.

[0104] An electrode 25 is provided on a portion of the conductive pattern 241 that is not covered with the insulating layer 242 and is not in contact with the core layer 21 .

[0105] The lines / spaces of layer 24 are, for example, in the range of 8 μm / 8 μm to 25 μm / 25 μm.

[0106] On one main surface of the core layer 21, a second metal bump 27 is provided on the electrode 25. On the one main surface, the outermost insulating resin layer 26 covers the surface of the layer 24, the side surface of the electrode 25, and part of the side surface of the second metal bump 27.

[0107] The arrangement of the second metal bumps 27 is the same as the arrangement of the first metal bumps 17 provided in the wiring structure 1 with a support body shown in FIG.

[0108] As the material for the second metal bump 27, the materials described for the first metal bump 17 of the wiring structure 1 with a support body described above can be used.

[0109] On the other main surface side of the core layer 21, an outermost insulating resin layer 26 is provided on the surface of the electrode 25 and the surface of the layer 24 so that a part of the surface of the electrode 25 is exposed.

[0110] Next, as shown in Fig. 20, the position of first wiring substrate 20 is aligned with the position of wiring structure with support 1 shown in Fig. 1. The positions of first wiring substrate 20 and wiring structure with support 1 are aligned so that the arrangement of second metal bumps 27 provided on first wiring substrate 20 corresponds to the arrangement of first metal bumps 17 provided on wiring structure 1 with support shown in Fig. 1.

[0111] Next, as shown in FIG. 21, the first wiring board 20 is bonded to the wiring structure 15 included in the wiring structure 1 with a support, and then a first underfill 31 is filled in the area between the first wiring board 20 and the wiring structure 1 with a support.

[0112] For example, the first wiring substrate 20 and the wiring structure 1 with a support are joined so as to face each other. Specifically, the first wiring substrate 20 and the surface of the wiring structure 1 with a support facing the wiring structure 15 are joined so as to face each other.

[0113] The bonding is performed via second metal bumps 27 provided on first wiring substrate 20 and first metal bumps 17 provided on wiring structure 1 with a support. This bonding forms first bonding portion 30. Note that, instead of metal bumps, pillar electrodes made of copper, for example, may be used to bond first wiring substrate 20 and wiring structure 1 with a support.

[0114] The first underfill 31 has insulating properties. The first underfill 31 fixes the support-attached wiring structure 1 and the first wiring substrate 20 together and seals the first bonding portion 30. The first underfill 31 can be, for example, a mixture of one or more resins selected from the group consisting of epoxy resin, urethane resin, silicone resin, polyester resin, oxetane resin, and maleimide resin, and a filler such as silica, titanium oxide, aluminum oxide, magnesium oxide, or zinc oxide. The first underfill 31 can be obtained, for example, by filling a liquid resin between the wiring structure 15 and the first wiring substrate 20 and then curing it.

[0115] Next, as shown in Fig. 22, the crystallized layer 13 is irradiated with laser light 40. Specifically, for example, the crystallized layer 13 is irradiated with laser light 40 from the surface of the composite of the first wiring substrate 20 and the wiring structure 1 with a support body on the support body 11 side. The white arrow shown in Fig. 22 indicates the direction in which the laser light 40 moves.

[0116] The wavelength of the laser light 40 is, for example, in the range of 250 nm to 380 nm.

[0117] When the crystallized layer 13 is irradiated with laser light 40, peeling occurs or becomes more likely to occur at the interface between the peeling layer 12 and the crystallized layer 13. The inventors presume that the reason for this phenomenon is as follows. Hereinafter, the crystallized layer 13 is assumed to be a layer made of amorphous silicon.

[0118] For example, when the crystallized layer 13 made of amorphous silicon is formed by vapor deposition using silicon hydrides such as silane and disilane, hydrogen atoms derived from the silicon hydrides are incorporated into the crystallized layer 13. When the crystallized layer 13 is irradiated with laser light 40, the structure of the crystallized layer 13 changes from amorphous to crystalline at the main surface of the crystallized layer 13 facing the peeling layer 12. As the atomic arrangement in the crystallized layer 13 changes, the hydrogen atoms contained in the crystallized layer 13 are expelled from the main surface as hydrogen gas. This reduces the adhesion between the peeling layer 12 and the crystallized layer 13, potentially causing peeling at the interface. The hydrogen atoms incorporated into the crystallized layer 13 do not necessarily have to be derived from the material itself.

[0119] The number of times of irradiation with the laser light 40 is preferably one. The irradiation may be performed multiple times. From the viewpoint of the process load, it is preferable to perform the irradiation fewer times.

[0120] 23, the support 11 and the release layer 12 are peeled off from the wiring structure 15. The support 11 and the release layer 12 may be peeled off only by irradiation with laser light 40. Alternatively, the support 11 and the release layer 12 may be peeled off by applying a force in a direction that separates the release layer 12 and the crystallized layer 13 after irradiation with laser light 40.

[0121] 24, the crystallized layer 13 and the first seed layer 14 are removed. For example, when amorphous silicon is used as the material of the crystallized layer 13, the crystallized layer 13 is preferably removed by dry etching.

[0122] For example, if the first seed layer 14 consists of a first metal-containing layer made of titanium and a second metal-containing layer made of copper, the first metal-containing layer can be removed using an alkaline etching agent, and the second metal-containing layer can be removed using an acidic etching agent. In this way, composite wiring board 100 is obtained.

[0123] After the crystallized layer 13 and the first seed layer 14 are removed, a surface treatment layer 16 may be formed on the surface of the conductor layer 152A.

[0124] The above-described composite wiring board 100 can be used, for example, to manufacture a packaged device. The packaged device includes, for example, the above-described first wiring board 20, wiring structure 15, and a functional device. A method for manufacturing a packaged device using composite wiring board 100 will be described below with reference to FIG.

[0125] First, a functional device and the composite wiring board 100 shown in FIG. 24 are prepared.

[0126] The functional device is, for example, a semiconductor chip, or a chip in which circuits and elements are formed on a substrate made of a material other than a semiconductor, such as a glass substrate. Here, as an example, the functional device is a semiconductor chip. That is, here, the packaged device is a semiconductor package.

[0127] 25, the composite wiring board 100 and the functional device 50 are bonded together. The functional device 50 and the composite wiring board 100 are bonded together, for example, so as to face each other. Specifically, the functional device 50 and the surface of the composite wiring board 100 on the wiring structure 15 side are bonded together so as to face each other.

[0128] The functional device 50 is bonded to the composite wiring substrate 100 via the second bonding portion 51. Specifically, the functional device 50 is bonded to the conductor layer 152A via the second bonding portion 51. Here, the functional device 50 is bonded to the composite wiring substrate 100 by flip-chip bonding. One or more of the functional devices 50 may be bonded to the composite wiring substrate 100 by other bonding methods such as wire bonding.

[0129] The second joints 51 are arranged at a narrow pitch between the functional device 50 and the composite wiring board 100. The second joints 51 are made of, for example, copper pillars or solder. When the functional device 50 is bonded to the composite wiring board 100 by wire bonding, the functional device 50 and the composite wiring board 100 can be electrically connected using, for example, a gold wire.

[0130] 25, a second underfill 52 is filled in the portion between the functional device 50 and the composite wiring board 100. The second underfill 52 fixes the functional device 50 and the wiring structure 15 and seals the second joint 51. The material of the second underfill 52 is, for example, the same as that described for the first underfill 31.

[0131] Next, as shown in FIG. 25, the functional device is sealed with sealing resin 53. The sealing resin 53 may be a mixture of one or more resins selected from the group consisting of epoxy resin, silicone resin, acrylic resin, urethane resin, polyester resin, and oxetane resin, and a filler such as silica, titanium oxide, aluminum oxide, magnesium oxide, or zinc oxide. It is preferable that the material of the sealing resin 53 is different from the material of the second underfill 52. The sealing resin 53 can be formed by, for example, compression molding or transfer molding.

[0132] 25, third metal bumps 60 are formed on the surface of composite wiring board 100 on the side of first wiring board 20, in areas where electrodes 25 are exposed. Third metal bumps 60 are used, for example, for bonding to a motherboard. The material of third metal bumps 60 is, for example, the same as that described for first metal bumps 17. In this way, a packaged device 300 is obtained.

[0133] 25 , the arrangement interval of the second bonding portions 51 is preferably narrower than the arrangement interval of the first bonding portions 30. In this case, in the wiring structure 15, a finer wiring structure is provided on the functional device 50 side compared to the first wiring substrate 20 side. The wiring structure 15 can be easily bonded to both the functional device 50 and the first wiring substrate 20.

[0134] 25, the side surfaces of the wiring structure 15 are covered with the sealing resin 53, but the side surfaces of the wiring structure 15 do not have to be covered with the sealing resin 53. Also, in FIG. 25, the packaged device 300 includes multiple functional devices 50, but the packaged device 300 may include only one functional device 50.

[0135] <Method for manufacturing a wiring structure with a functional device> An example of a method for manufacturing a wiring structure with a functional device will be described below with reference to Figures 26 to 31. Note that the surface treatment layer 16 is omitted in Figures 26 to 31.

[0136] First, a wiring structure 1 with a support body and a functional device shown in FIG. 14 are prepared.

[0137] Next, as shown in Fig. 26, the functional device 50 is bonded to the wiring structure 1 with a support body shown in Fig. 14. The functional device 50 and the wiring structure 1 with a support body are bonded, for example, so as to face each other. Specifically, the functional device 50 and the surface of the wiring structure 1 with a support body facing the wiring structure 15 are bonded so as to face each other.

[0138] The functional device 50 is bonded to the support-equipped wiring structure 1 via the second bonding portion 51. Specifically, the functional device 50 is bonded to the conductor layer 152D via the second bonding portion 51.

[0139] 27, a second underfill 52 is filled in the portion between the functional device 50 and the wiring structure 1 with a support. By filling the second underfill 52, the functional device 50 is fixed to the wiring structure 1 with a support, and the second bonding portion 51 is sealed.

[0140] Next, as shown in FIG. 28, the functional device 50 is sealed with a sealing resin 53.

[0141] Next, as shown in Fig. 29, the crystallized layer 13 is irradiated with laser light 40. Specifically, for example, the crystallized layer 13 is irradiated with laser light 40 from the surface of the composite of the functional device 50 and the wiring structure 1 with the support body 11 side. The white arrow shown in Fig. 29 indicates the direction in which the laser light 40 moves.

[0142] The wavelength of the laser light 40 is, for example, in the range of 250 nm to 380 nm.

[0143] The number of times of irradiation with the laser light 40 is preferably one, but the number of times of irradiation may be multiple.

[0144] As described above, when the crystallized layer 13 is irradiated with laser light 40, the adhesion at the interface between the release layer 12 and the crystallized layer 13 decreases, thereby making it possible to peel off the support 11 and the release layer 12.

[0145] Next, as shown in FIG. 30, the support 11 and the release layer 12 are peeled off from the wiring structure 15.

[0146] Next, as shown in FIG. 31, the crystallized layer 13 and the first seed layer 14 are removed. In this way, a wiring structure 200 with functional devices is obtained.

[0147] Instead of bonding the functional device 50 to the wiring structure 1 with a support and then filling the area between the functional device 50 and the wiring structure 1 with the second underfill 52, an anisotropic conductive film (ACF) may be placed on the wiring structure 1 with a support, and then the functional device 50 may be bonded to the wiring structure 1 with a support. A film-like bonding material (NCF) may be used instead of the anisotropic conductive film. Furthermore, instead of bonding the functional device 50 to the wiring structure 1 with a support and then filling the area between the functional device 50 and the wiring structure 1 with the second underfill 52, a non-conductive paste (NCP) may be applied onto the wiring structure 1 with a support, and then the functional device 50 may be bonded to the wiring structure 1 with a support.

[0148] Furthermore, after removing the crystallized layer 13 and the first seed layer 14, a surface treatment layer 16 may be formed on the surface of the conductor layer 152A. Furthermore, in the above-described method, the wiring structure 200 with functional devices includes a plurality of functional devices 50, but the wiring structure 200 with functional devices may include only one functional device 50.

[0149] The above-described wiring structure 200 with functional devices can be used, for example, in the manufacture of packaged devices. An example of a method for manufacturing a packaged device using the wiring structure 200 with a functional device will be described below.

[0150] First, a wiring structure 200 with a functional device shown in FIG. 31 is prepared. Next, the surface treatment layer 16 is formed on the surface of the conductor layer 152A included in the wiring structure 200 with a functional device.

[0151] Next, a first metal bump 17 is formed on the surface treatment layer 16 . Next, the first wiring substrate 20 shown in FIG. 19 is prepared, and the second metal bumps 27 of the first wiring substrate 20 and the first metal bumps 17 are bonded together.

[0152] Next, the first underfill 31 is filled into the area between the first wiring substrate 20 and the wiring structure 200 with a functional device. Next, third metal bumps 60 are formed on the surface of first wiring substrate 20 in areas where electrodes 25 are exposed.

[0153] In this way, a packaged device 300 is obtained. The surface treatment layer 16 formed on the surface of the conductor layer 152A may be omitted.

[0154] <Effects> In the above-described wiring structure 1 with a support, if a resin layer that is thermally decomposed by irradiation with laser light is provided instead of the peeling layer 12 and the crystallization layer 13, when the resin layer is irradiated with laser light to peel off the support 11, the resin layer may remain unevenly on the wiring structure 15. In this case, defects may occur in the wiring structure 15. In addition, in this case, a step of removing the resin layer is required, which increases the process load.

[0155] On the other hand, the above-described support-attached wiring structure 1 includes a release layer 12 and a crystallization layer 13. As described above, when laser light is irradiated onto the support-attached wiring structure 1 from the support 11 side, peeling occurs at the interface between the release layer 12 and the crystallization layer 13. In this case, the release layer 12 is unlikely to remain on the crystallization layer 13, so the release layer 12 can be removed uniformly. Furthermore, after removing the support 11 and the release layer 12, the crystallization layer 13 remains on the wiring structure 15 with a uniform thickness throughout. Therefore, in the step of removing the crystallization layer 13, the crystallization layer 13 can be removed uniformly. Therefore, with the above-described support-attached wiring structure 1, problems caused by the above-described remaining resin layer do not occur.

[0156] As mentioned above, there is a technology for placing a silicon interposer containing a silicon wafer between the FC-BGA substrate and the semiconductor chip. With this technology, the shapes and dimensions of the silicon wafers that can be used are limited, so the number of interposers that can be manufactured from a single silicon wafer is limited. Furthermore, silicon wafer manufacturing equipment is expensive, so silicon interposers are also expensive. Furthermore, since silicon wafers are made of semiconductors, they have high resistance. For this reason, the transmission characteristics of silicon interposers can deteriorate.

[0157] Furthermore, while the method of directly fabricating multilayer wiring layers on an FC-BGA substrate using chemical mechanical polishing (CMP) or other techniques results in little degradation of the transmission characteristics described above, the manufacturing yield of the FC-BGA substrate itself is low. Furthermore, forming fine wiring on an FC-BGA substrate is highly difficult. For this reason, the manufacturing yield of the above method is likely to be low. Furthermore, problems can arise in the mounting of semiconductor chips due to warping and distortion of the FC-BGA substrate. [Example]

[0158] Examples and comparative examples are set out below. <Example 1> A laminate including a support, a release layer, a crystallization layer, a first seed layer, and a conductor layer was produced by the following method.

[0159] First, a glass substrate having a thickness of 1.1 mm was prepared as a support. Next, a release layer was formed on one support surface of the support. The release layer was a 500 nm thick layer made of SiN. The release layer was formed by chemical vapor deposition (CVD).

[0160] Next, a crystallization layer was formed on the release layer. The crystallization layer was a 50 nm thick layer made of amorphous silicon. The crystallization layer was formed by chemical vapor deposition (CVD).

[0161] Next, a first seed layer was formed on the crystallization layer. Specifically, a first metal-containing layer made of titanium was first formed on the release layer by sputtering, and then a second metal-containing layer made of copper was formed on the first metal-containing layer by electroplating. The thicknesses of the first and second metal-containing layers were 50 nm and 300 nm, respectively.

[0162] Next, a conductor layer was formed on the first seed layer by electrolytic plating. The conductor layer was a layer made of copper and had a thickness of 20 μm.

[0163] In this manner, a laminate was obtained.

[0164] <Comparative Example 1> A laminate was produced in the same manner as in Example 1, except that a release layer made of a phenolic resin was formed instead of the release layer and the crystallization layer. The release layer made of a phenolic resin was formed by spin coating. The thickness of this release layer was 500 nm.

[0165] <Comparative Example 2> A laminate was produced in the same manner as in Example 1, except that a release layer made of an acrylic resin was formed instead of the release layer and the crystallization layer. The release layer made of an acrylic resin was formed by spin coating. The thickness of this release layer was 500 nm.

[0166] <Evaluation> The laminates according to Example 1 and Comparative Examples 1 and 2 were irradiated from the support side with a solid-state UV laser having a wavelength of 355 nm. Thereafter, it was checked whether the support could be peeled off. The results are shown in Table 1 below. The irradiation energy per unit area of ​​the solid-state UV laser was 150 mJ / cm. 2 The irradiation was carried out so that

[0167] [Table 1]

[0168] In the column labeled "Evaluation" in Table 1, "Good" indicates that no release layer remained on the crystallized layer after peeling off the support, and "Poor" indicates that a release layer remained on the first seed layer after peeling off the support.

[0169] As shown in Table 1, in the laminate of Example 1, peeling occurred at the interface between the release layer and the crystallized layer, and the support could be peeled off. In addition, the release layer was attached to the support, and no release layer remained on the crystallized layer.

[0170] On the other hand, in the laminates according to Comparative Examples 1 and 2, although peeling occurred at the interface between the release layer and the support, allowing the support to be peeled off, the release layer partially remained on the first seed layer, resulting in an uneven surface on the release layer side of the first seed layer. [Explanation of symbols]

[0171] 1...wiring structure with support, 11...support, 12...peeling layer, 13...crystallization layer, 14...first seed layer, 15...wiring structure, 16...surface treatment layer, 17...first metal bump, 20...first wiring substrate, 21...core layer, 22...conductor layer, 23...insulating resin, 24...layer, 25...electrode, 26...topmost insulating resin layer, 27...second metal bump, 30...first bonding portion, 31...first underfill, 40...laser light, 50...functional device, 51...second bonding portion, 52...second underfill, 53...encapsulating resin, 60... Third metal bump, 100... composite wiring board, 151A... resist layer, 151B... resist layer, 151C... resist layer, 152A... conductor layer, 152B... conductor layer, 152C... conductor layer, 152D... conductor layer, 153A... insulating layer, 153B... insulating layer, 153C... insulating layer, 154A... second seed layer, 154B... second seed layer, 154C... second seed layer, 155... outermost insulating layer, 200... wiring structure with functional device, 241... conductor pattern, 242... insulating layer, 300... packaged device.

Claims

1. a support having a support surface and transmitting laser light in a direction perpendicular to the support surface; a wiring structure facing the support surface, the wiring structure including a conductor layer and an insulating layer in which the conductor layer is embedded; a crystallization layer interposed between the support and the wiring structure, the crystallinity of which is increased by irradiation with the laser light; a release layer interposed between the support and the crystallization layer and transmitting the laser light; A wiring structure with a support.

2. 2. The wiring structure with a support according to claim 1, wherein the crystallized layer is amorphous.

3. The support-attached wiring structure according to claim 1 , wherein the crystallized layer contains an inorganic material.

4. 4. The wiring structure with a support according to claim 3, wherein the inorganic material is amorphous silicon or amorphous germanium.

5. 2. The wiring structure with a support according to claim 1, wherein the crystallized layer has a thickness in the range of 1 nm to 500 nm.

6. The support-attached wiring structure according to claim 1 , wherein the release layer contains an inorganic nitride.

7. 7. The wiring structure with a support according to claim 6, wherein the inorganic nitride is silicon nitride or gallium nitride.

8. 2. The wiring structure with a support according to claim 1, wherein the wavelength of the laser light is in the range of 250 nm to 380 nm.

9. 2. The wiring structure with a support according to claim 1, wherein the laser light irradiation causes peeling at the interface between the peeling layer and the crystallization layer.

10. 2. The wiring structure with a support according to claim 1, wherein the release layer has a transmittance of the laser light of 50% or more.

11. forming a release layer that is transparent to the laser beam on a support that has a support surface and is transparent to the laser beam in a direction perpendicular to the support surface; forming a crystallized layer on the peeling layer, the crystallinity of which is increased by the irradiation of the laser light; forming a wiring structure on the crystallized layer, the wiring structure including a conductor layer and an insulating layer in which the conductor layer is embedded; A method for manufacturing a wiring structure with a support, comprising:

12. bonding a first wiring substrate to the wiring structure included in the wiring structure with a support according to claim 1; Thereafter, the crystallized layer is irradiated with the laser light, and the support is peeled off from the wiring structure. A method for manufacturing a composite wiring board comprising the steps of:

13. Bonding a functional device to the wiring structure included in the wiring structure with a support according to claim 1; Thereafter, the crystallized layer is irradiated with the laser light, and the support is peeled off from the wiring structure. A method for manufacturing a wiring structure with a functional device, comprising:

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