Liquid crystal display device

Abstract

To reduce power consumption and to suppress display degradation (deterioration of display quality) while improving high image quality of a display device.SOLUTION: In a display panel in which pixels having one or more units provided therein are arranged in a matrix form and that displays an image, the unit has a plurality of subunits that comprise: a transistor provided for an oxide semiconductor layer to overlap with a gate electrode through a gate insulation layer; a pixel electrode that drives a liquid crystal which is connected to a source side or a drain side of the transistor; a counter electrode that is provided to face the pixel electrode; and a liquid crystal layer that is provided between the pixel electrode and the counter electrode. The transistor in which off current is less than 10zA / μm per channel width of 1 μm at room temperature and is less than 100zA / μm at 85°C is used.SELECTED DRAWING: Figure 17

Description

[Technical Field]

[0001] One embodiment of the present invention is a display including a field-effect transistor using an oxide semiconductor. Regarding the device. [Background technology]

[0002] A liquid crystal display using thin film transistors made of amorphous silicon as the liquid crystal driving element. Display panels are widely used in commercial products such as computer monitors and LCD televisions. The manufacturing technology for thin-film transistors using amorphous silicon has already been established, and 60-inch LCD panels exceeding 1000mW are also being produced.

[0003] However, thin-film transistors using amorphous silicon have a slow operating speed, and further improvements are not possible. Since high performance cannot be expected, development of thin film transistors using polysilicon is also progressing. However, the production of polysilicon requires a crystallization process, which is essential for transistors. This was a cause of variations in the characteristics of the display and an obstacle to increasing the panel size.

[0004] In response to this, oxide semiconductor materials have been attracting attention as non-silicon transistor materials. Zinc oxide or materials containing zinc oxide are known as oxide semiconductor materials. And, when the electron carrier concentration is 10 18 / cm 3 Amorphous oxides (oxides) Thin film transistors formed of semiconductors are disclosed (Patent Documents 1 to 3). .

[0005] LCD devices are used in a wide range of applications, from large displays such as television sets to small displays such as mobile phones. Therefore, the development of LCD devices has focused on widening the viewing angle and improving image quality. Development is being carried out with the aim of reducing costs and increasing added value. Development is also underway to reduce power consumption in order to add value to the device.

[0006] In order to improve the viewing angle characteristics of a liquid crystal display device, liquid crystal molecules are aligned in a tilted or radially tilted orientation. In a liquid crystal display device that displays images facing each other, one pixel is divided into multiple independent pixel regions. It is disclosed that the signal applied to each divided pixel region is made different for each arbitrary period. (See, for example, Patent Document 4).

[0007] In addition, it is necessary to achieve sufficiently low power consumption while still satisfying basic display quality such as brightness and contrast. As a method for achieving this, a display that sets a scanning period and a non-scanning period that is longer than the scanning period is provided. A method for driving the device is disclosed (see Patent Document 5). During the pause period when the data signal lines are in the non-selected state, all the data signal lines are electrically connected to the data signal driver. This is a method of driving a display device in which the display device is disconnected from the power supply and placed in a high impedance state. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-165527 [Patent Document 2] Japanese Patent Application Laid-Open No. 2006-165528 [Patent Document 3] Japanese Patent Application Laid-Open No. 2006-165529 [Patent Document 4] Japanese Patent Application Laid-Open No. 2008-287042 [Patent Document 5] Japanese Patent Application Laid-Open No. 2001-312253 Summary of the Invention [Problem to be solved by the invention]

[0009] The electron carrier concentration is 10 18 / cm 3 Even if it is less than 100%, in the case of an oxide semiconductor, The thin film transistor disclosed in the above patent document is an n-type transistor, and the on / off ratio is 10 3 Only available The reason for the low on-off ratio of such thin film transistors is that the off-current is high. This is due to the following.

[0010] For example, in a liquid crystal panel, a storage capacitor is provided in parallel with a pixel electrode that drives the liquid crystal in each pixel. Then, the transistor is turned on and an image signal is applied to the pixel electrode and the storage capacitor. By this, a potential is applied to the liquid crystal, and the storage capacitor is charged to a predetermined potential. When the writing operation is completed, the transistor remains in the off state until the next image signal is applied. At this time, if the off-state current of the transistor is high, the potential applied to the liquid crystal fluctuates and becomes The charge stored in the capacitor is discharged.

[0011] In a pixel, the off-current i of the transistor, the capacitance C, the voltage fluctuation V, and the retention time The relationship between T and CV can be expressed as CV = iT. For example, if the off-current of a transistor is 0.1 pA, the capacitance of the storage capacitor is 0.1 pF, and one frame period is 16.6 ms. The voltage variation V of a pixel during a frame is given by: 0.1[pF]×V=0.1[pA]×16.6[ms] V=16.6[mV]

[0012] If you are trying to display 256 gradations with a maximum LCD drive voltage of 5V, the gradation for one gradation is As mentioned above, if the pixel voltage fluctuation is 16.6 mV, This corresponds to the gradation voltage for approximately one gradation. Also, when displaying an image with 1024 gradations, The gradation voltage for one gradation is about 5 mV, so if the voltage fluctuation of the pixel is 16.6 mV, corresponds to the gray scale voltage for four gray scales, and ignoring the effect of voltage fluctuations due to the off-current, It is not possible. In this way, the transistors used in the display panel have on-state characteristics (on-state current and field effect The effect of the off-state current must also be taken into consideration, as well as the characteristics of the device (such as mobility).

[0013] In the liquid crystal display device disclosed in Patent Document 1, during a pause period, each pixel included in the pixel unit In other words, the image signal is held in each pixel, and the image is The period during which the transistor that controls the signal input remains in the off state becomes longer. The effect of image signal leakage through the transistor on the display of each pixel has become apparent. Specifically, the voltage applied to the liquid crystal element is reduced, and the display of the pixel having the liquid crystal element is Deterioration (changes) in the display become apparent.

[0014] Furthermore, the leakage of image signals through the transistor varies depending on the operating temperature of the transistor. Specifically, as the operating temperature rises, the leakage of image signals through transistors increases. Therefore, the liquid crystal display device disclosed in Patent Document 1 is suitable for indoor use where the environment changes greatly. When used outdoors, it is difficult to maintain consistent display quality.

[0015] As described above, simply using a transistor made of an oxide semiconductor does not improve the viewing angle. Therefore, it is difficult to achieve high image quality including the above and low power consumption. The aim is to improve the image quality of the display device while reducing power consumption and reducing display degradation (display quality). One of the challenges is to prevent the decline in quality. [Means for solving the problem]

[0016] One embodiment of the present invention is to use a transistor whose off-state current is reduced to an extremely low level. In this way, a display device with high image quality and low power consumption is provided. As a semiconductor material for forming transistors, it has a wider band gap than silicon semiconductors. A semiconductor material with a wide gap is used, and preferably, a carrier donor of such a semiconductor material is used. The off-state current is reduced by reducing the concentration of impurities. The semiconductor layer of the transistor (the layer that forms the channel region) has an energy gap of 2 eV or more. Preferably, an oxide semiconductor having a conductivity of 2.5 eV or more, more preferably 3 eV or more is used. The concentration of impurities that act as carrier donors in the compound semiconductor is reduced. The off-state current of the transistor is less than 10 zA / μm per 1 μm of channel width at room temperature, and It is possible to reduce it to an extremely low level of less than 100zA / μm at ℃. .

[0017] As one embodiment of a transistor including an oxide semiconductor, in addition to the above-described oxide semiconductor layer, In this case, a part of the source electrode and drain electrode is made of a metal nitride. The gate electrode of the gate electrode of the oxide semiconductor layer is located on the lower side (substrate side) or the upper side (substrate side) of the oxide semiconductor layer via an insulating layer. It is sufficient if the transistor is provided on the opposite side to the In addition to the off-state characteristics, the on-state characteristics show that the maximum field-effect mobility is 5 cm 2 / Vsec or more, preferably 10cm 2 / Vsec~150cm 2 / Vsec By increasing the speed of transistor operation, there is still room for improvement even when pixels are arranged at high density. This is to enable write operations and the like.

[0018] One embodiment of the present invention is a semiconductor device in which an oxide semiconductor layer overlaps with a gate electrode with a gate insulating layer interposed therebetween. A transistor is provided, and liquid crystal is connected to the source side or the drain side of the transistor. A pixel electrode to be driven, a counter electrode provided so as to face the pixel electrode, and a counter electrode facing the pixel electrode. A unit having a plurality of sub-units each having an electrode and a liquid crystal layer provided between the electrode and the sub-unit is one or It has a display panel in which a plurality of pixels are arranged in a matrix to display an image. It is a display device.

[0019] One embodiment of the present invention is a semiconductor device in which an oxide semiconductor layer overlaps with a gate electrode with a gate insulating layer interposed therebetween. A transistor is provided, and liquid crystal is connected to the source side or the drain side of the transistor. A pixel electrode to be driven, a counter electrode provided so as to face the pixel electrode, and a counter electrode facing the pixel electrode. A unit having a plurality of sub-units each having an electrode and a liquid crystal layer provided between the electrode and the sub-unit is one or A pixel section in which a plurality of pixels are arranged in a matrix to display an image; and a drive circuit section that drives the display panel to display an image on the screen. Then, the driving circuit unit writes image signals to the selected pixels one by one to display an image on the screen. This function can be realized by using the transistor. This is achieved by:

[0020] One embodiment of the present invention is a semiconductor device in which an oxide semiconductor layer overlaps with a gate electrode with a gate insulating layer interposed therebetween. A transistor is provided, and liquid crystal is connected to the source side or the drain side of the transistor. A pixel electrode to be driven, a counter electrode provided so as to face the pixel electrode, and a counter electrode facing the pixel electrode. A unit having a plurality of sub-units each having an electrode and a liquid crystal layer provided between the electrode and the sub-unit is one or A pixel section in which a plurality of pixels are arranged in a matrix to display an image; and a drive circuit section that drives the display panel to display an image on the screen. Then, the driver circuit writes image signals to the selected pixels one by one to display the image on the screen. The operation mode for writing the image to be displayed and the image signal when the same image is displayed on the screen are This is an operation mode in which the writing operation is stopped and the image written on the screen is retained as it is. Such a function is realized by using the above transistor. It will be revealed. [Effects of the Invention]

[0021] According to one embodiment of the present invention, a transistor with sufficiently reduced off-state current is used, This makes it possible to stably maintain the signal voltage applied to the pixel. This allows the written signal to be held in a constant state (the state in which the image signal is written). Therefore, a stable image display can be achieved.

[0022] According to one embodiment of the present invention, a transistor provided in each pixel has a channel formation region. A transistor including an oxide semiconductor layer is used. By optimizing the channel width, the off-state current of the transistor at room temperature was It is possible to achieve a resistance of less than 10 zA / μm at 85°C and less than 100 zA / μm at 85°C. Therefore, it is possible to reduce the leakage of image signals through the transistor. The display when the frequency of writing image signals to the pixel having the transistor is reduced As a result, the power consumption of the liquid crystal display device can be reduced. This makes it possible to suppress deterioration of the display (decrease in display quality).

[0023] Furthermore, a pixel using a transistor with extremely low off-state current is This allows the display to maintain a stable motion even when displaying still images. In this case, the transistor can reduce its off-state current as the operating temperature increases. Since the increase in the current value is extremely small, it is possible that external factors such as temperature are not affecting the image signal at the pixel. In other words, the liquid crystal display device is not susceptible to large changes in the environment. When a still image is displayed with the image signal written in, for example outdoors, Even in such a case, it is possible to suppress deterioration of the display (decrease in display quality). [Brief explanation of the drawings]

[0024] [Figure 1] FIG. 1 is a block diagram illustrating each component of a liquid crystal display device according to a first embodiment. [Figure 2] FIG. 1 is a block diagram illustrating each component of a liquid crystal display device according to a first embodiment. [Figure 3] 2 illustrates a configuration of a driver circuit and a pixel of a liquid crystal display device according to Embodiment 1. FIG. [Figure 4] 4 is a timing chart illustrating the operation of the liquid crystal display device according to the first embodiment. [Figure 5] 5 is a timing chart illustrating the operation of the display control circuit of the liquid crystal display device according to the first embodiment. [Figure 6] FIG. 10 is a diagram schematically showing the frequency of writing image signals during a period in which a moving image is displayed and a period in which a still image is displayed. [Figure 7] FIG. 1 is a block diagram illustrating each component of a liquid crystal display device according to a first embodiment. [Figure 8] FIG. 10 is a diagram illustrating the configuration of a television receiver according to a second embodiment. [Figure 9] FIG. 10 is a diagram illustrating the configuration of a monitor according to a second embodiment. [Figure 10] 1A and 1B are diagrams illustrating examples of the configuration of a backlight of a liquid crystal display device. [Figure 11] 1A and 1B are diagrams illustrating examples of the configuration of a backlight of a liquid crystal display device. [Figure 12] 1A to 1C illustrate an example of a transistor that can be used in a liquid crystal display device. [Figure 13] 1A to 1C illustrate an example of a transistor including an oxide semiconductor layer and a manufacturing method thereof. [Figure 14] 10 is a graph showing an example of Vg-Id characteristics of a transistor formed using an oxide semiconductor. [Figure 15] 10 is a graph showing Vg-Id characteristics of a transistor formed using an oxide semiconductor in an off state. [Figure 16] Graph showing the relationship between source-drain voltage V and off-state current I. [Figure 17] FIG. 1 is a diagram illustrating an example of a device for viewing 3D video or still images using dedicated glasses that are synchronized with the video on the display device. [Figure 18] FIG. 1 is a diagram illustrating an example of an electronic book according to the present invention. [Figure 19] FIG. 1 is a diagram illustrating an example of a computer according to the present invention. [Figure 20] FIG. 1 is a plan view showing an example of a pixel of a liquid crystal display device. [Figure 21] FIG. 1 is a cross-sectional view showing an example of a pixel of a liquid crystal display device. DETAILED DESCRIPTION OF THE INVENTION

[0025] The embodiments of the present invention will be described below with reference to the drawings. The invention is not limited to the following description, and any form thereof may be used without departing from the spirit and scope of the invention. It will be readily apparent to those skilled in the art that various changes can be made in the mode and details. The invention disclosed in this specification should not be construed as being limited to the description of the following embodiments. It's not that.

[0026] When describing the embodiments with reference to the drawings, the same components will be designated by different reference numerals. In addition, the components shown in the drawings, i.e., layers and The thickness widths of the regions, relative positional relationships, etc. are not shown for clarity in the description of the embodiments. may be exaggerated in the figures.

[0027] (Embodiment 1) In this embodiment mode, one mode of a liquid crystal display device and a driving method of the liquid crystal display device will be described with reference to FIGS. 7 will be used to explain.

[0028] The components of a liquid crystal display device 100 exemplified in this embodiment will be described with reference to the block diagram of FIG. The liquid crystal display device 100 includes a power supply 116, a display control circuit 113, and a display panel 120. In the case of a transmissive or semi-transmissive liquid crystal display device, an illumination device is also used as a light source. It is advisable to provide a backlight section as one of the stages.

[0029] The liquid crystal display device 100 receives an image signal (image signal data) from a connected external device. The power supply potentials (high power supply potential Vdd, low power supply potential Vss, and common potential Vco) are m) is supplied by turning on the power supply 116 of the liquid crystal display device and starting the power supply. The control signals (start pulse SP and clock signal CK) are sent to the display control circuit 113. Therefore, it is supplied.

[0030] The high power supply potential Vdd is a potential higher than the reference potential, and the low power supply potential Vss is The high power supply potential Vdd and the low power supply potential Vss are both potentials below the reference potential. It is desirable that the potential be such that the transistor can operate. The low power supply potential Vss is also sometimes called the power supply voltage.

[0031] The common potential Vcom is a fixed potential that serves as a reference for the potential of the image signal supplied to the pixel electrode. As an example, it may be the ground potential.

[0032] The image signal data can be generated by dot inversion driving, source line inversion driving, gate line inversion driving, If the signal is inverted appropriately in accordance with frame inversion driving or the like and supplied to the liquid crystal display device 100, If the image signal is an analog signal, it should be converted to a digital signal via an A / D converter, etc. The signal may be converted into a digital signal and supplied to the liquid crystal display device 100.

[0033] In this embodiment, the common electrode 128 and one electrode of the capacitor element are supplied with a power supply 116. A common potential Vcom, which is a fixed potential, is applied via a control circuit 113 .

[0034] The display control circuit 113 supplies the display panel 120 with a display panel image signal (Data) and a control signal. supplying or distributing control signals (specifically, control signals such as a start pulse SP and a clock signal CK) is a signal to control the switching of the power supply, the power supply potential (high power supply potential Vdd, low power supply potential V ss, and a common potential Vcom).

[0035] The display panel 120 has liquid crystal elements 215a and 215b disposed on a pair of substrates (first and second substrates). ) and a driving circuit section 121 and a pixel section 122 are provided on the first substrate. The second substrate also has a common connection portion (also called a common contact) and a common electrode. 128 (also called a common electrode or a counter electrode). The first substrate and the second substrate are electrically connected, and the common connection portion is on the first substrate. It may be provided in.

[0036] The pixel section 122 is provided with a plurality of gate lines 124 (124a, 124b) (scanning lines) and a plurality of source lines 124 (124a, 124b). A plurality of pixels are connected to the gate lines 124 and The source lines 125 are provided in a matrix shape and are surrounded by the source lines 125. In the display panel, the gate lines 124 (124a, 124b) are connected to a gate line side drive circuit. The source line 125 extends from the source line side drive circuit 121B. .

[0037] The liquid crystal display device disclosed in this specification has a plurality of units in one pixel, Each unit has multiple sub-units. The number of knits may be at least two, but may be more. A pixel has a plurality of units 123, and each unit 123 further has a plurality of subunits. This is an example of a pixel having units 123a and 123b. For example, one pixel may have an R (red) unit, a G (green) unit, and a B ( One example is a configuration with three units:

[0038] By using multiple miniaturized sub-units for display, the displayed image can be made higher definition. In addition, the liquid crystal orientation can be controlled independently for each subunit. This also makes it possible to improve the viewing angle.

[0039] The liquid crystal elements 215a and 215b transmit or block light by the optical modulation effect of the liquid crystal. The optical modulation of the liquid crystal is controlled by the electric field applied to the liquid crystal. The direction of the electric field applied to the liquid crystal varies depending on the liquid crystal material, driving method, and electrode structure. For example, a driving method that applies an electric field in the thickness direction (so-called vertical direction) of the liquid crystal can be selected. When using this method, pixel electrodes are placed on the first substrate and common electrodes are placed on the second substrate so as to sandwich the liquid crystal. In addition, the liquid crystal is provided with a structure in which the electrodes are arranged in the in-plane direction of the substrate (so-called horizontal electric field). When using a driving method that applies an electric field, a pixel electrode and a common electrode are set on the same surface as the liquid crystal. The pixel electrode and the common electrode may have a shape with various opening patterns. In this embodiment, the transmission or non-transmission of light is controlled by the optical modulation action. As long as the element controls the liquid crystal, the driving method, and the electrode structure are not particularly limited.

[0040] The sub-unit 123a provided in the unit 123 uses a transistor as a switching element. a capacitor 210a connected to the transistor 214a, and a liquid crystal element 21 5a, and subunit 123b has transistor 214b as a switching element, The capacitor 210b connected to the transistor 214b and the liquid crystal element 215b are included. do.

[0041] In this embodiment, the liquid crystal element 2 in the subunit 123a and the subunit 123b The orientation of the liquid crystal is controlled by applying different voltages to the liquid crystal elements 15a and 215b. This has resulted in a wider viewing angle.

[0042] In the sub-unit 123a, the transistor 214a is a gate electrode provided in the pixel portion 122. The gate line 124a is connected to the gate electrode, and either the source electrode or the drain electrode is connected to the source The other of the source electrode and the drain electrode is connected to one of the capacitor elements 210a. The subunit 12 is connected to the electrode and one electrode (pixel electrode) of the liquid crystal element 215a. 3b, a transistor 214b is connected to a gate line 124b provided in a pixel portion 122. The gate electrode is connected, and one of the source electrode and the drain electrode is connected to the source line 125. The other of the source electrode and the drain electrode is connected to one electrode of the capacitance element 210b and the liquid crystal element. In this embodiment, the liquid crystal element 215 is connected to one electrode (pixel electrode) of the liquid crystal element 215b. a, the common electrode (electrode facing the pixel electrode) of the liquid crystal element 215b, the capacitor element 210a, The other electrode of the element 210b is at a fixed potential from the power supply 116 via the display control circuit 113. A common potential Vcom is applied.

[0043] In the subunits 123a and 123b of this embodiment, the transistor The transistors 214a and 214b are connected to different gate lines 124a and 124b. Therefore, the potentials stored in the capacitor elements 210a and 210b are different from each other. The capacitances to be integrated are also different in magnitude, and the voltages applied to the liquid crystal elements 215a and 215b are Therefore, the liquids of the subunits 123a and 123b are different. The orientation of the liquid crystal can be controlled separately in the liquid crystal element 215a and the liquid crystal element 215b. Therefore, the viewing angle can be improved.

[0044] To apply different voltages to the liquid crystal elements in each subunit, The sizes of the capacitor element 210a and the capacitor element 214b are different from each other. Alternatively, the terminal 210b may be connected to a capacitance line that applies a different potential. is.

[0045] The transistors 214a and 214b are transistors with reduced off-state current. When the transistor 214a and the transistor 214b are in an off state, , the transistor 214a and the liquid crystal display connected to the transistor 214b, in which the off-state current is reduced. The capacitances stored in the element 215a, the liquid crystal element 215b, the capacitors 210a, and the capacitors 210b are The charge is less likely to leak through transistor 214a and transistor 214b. The state written before the transistor 214a and the transistor 214b are turned off is then Therefore, the off-state current of the transistor 2 can be reduced. 14a, and a capacitance element 210a and a capacitance element 210b connected to a transistor 214b. It is also possible to configure the subunits 123a and 123b without using the above-mentioned method.

[0046] With this configuration, the capacitor element 210a and the capacitor element 210b are The voltage applied to the liquid crystal element 215b can be maintained. The electrodes of the capacitor 210b may be connected to a separately provided capacitance line. The capacitance element 210a and the capacitance element 210b may be connected to the same capacitance line or to separate capacitance lines. You may connect it.

[0047] The driving circuit unit 121 includes a gate line side driving circuit 121A and a source line side driving circuit 121B. The gate line side driving circuit 121A and the source line side driving circuit 121B drive a plurality of pixels (pixels A driving circuit for driving the pixel section 122 having a shift register circuit (shift register) It has a resistor (also called a resistor register).

[0048] The gate line side driving circuit 121A and the source line side driving circuit 121B are connected to the pixel section 122. The second substrate may be formed on the same substrate as the first substrate, or may be formed on a different substrate.

[0049] The drive circuit unit 121 receives a high power supply potential Vdd, A low power supply potential Vss, a start pulse SP, a clock signal CK, and an image signal Data are supplied. can be.

[0050] The terminal unit 126 receives a predetermined signal (high power supply potential Vdd, low power supply potential Vdd) output from the display control circuit 113. Potential Vss, start pulse SP, clock signal CK, image signal Data, common potential Vc om, etc.) to the drive circuit unit 121.

[0051] The common electrode 128 is a common potential Vcom controlled by the display control circuit 113. The wires are electrically connected at a common connection.

[0052] A specific example of the common connection part is a conductive particle in which an insulating sphere is coated with a metal thin film. By doing so, it is possible to electrically connect the common electrode 128 to the common potential line. The common connection section may be provided at multiple locations within the display panel 120.

[0053] The liquid crystal display device may also have a photometric circuit. The brightness of the environment in which the LCD device is placed can be detected. As a result, the photometry circuit is connected. The display control circuit 113 controls the backlight, the sub-light, and the like in response to a signal input from the photometry circuit. It is possible to control the driving method of a light source such as an LED.

[0054] In addition, when a color display is required, it is possible to display it by using a color filter. Other optical films (polarizing film, retardation film, anti-reflection film, etc.) are also used. The backlight used in a transmissive or semi-transmissive liquid crystal display device can be The light source, such as a light emitting diode (LED), may be selected depending on the application of the liquid crystal display device 100. (LED) can be used. Multiple LED light sources or multiple electro A surface light source may be configured using a luminescence (EL) light source. There are three types of surface light sources: The above LEDs may be used, or white light emitting LEDs may be used. RGB light-emitting diodes are arranged in the center, and the color is displayed in time division by the time-sequential additive color mixing method (F When a field sequential method is used, no color filter is provided.

[0055] Next, a liquid crystal display device having a different configuration from the above-described liquid crystal display device 100 and capable of achieving further reduction in power consumption. The configuration and driving method of the liquid crystal display device 200 will be described with reference to FIG. The same parts as those of the liquid crystal display device 100 or parts having similar functions and processes are the same as those of the liquid crystal display device 100. The same operation as in the device 100 can be performed, and the repeated explanation will be omitted. The explanation will be omitted.

[0056] The components of the liquid crystal display device 200 are shown in the block diagram of Figure 2. The display device 100 has a configuration in which an image processing circuit 110 is added. In the case of a transflective liquid crystal display device, a backlight unit 130 is provided as a light source.

[0057] The image processing circuit 110 analyzes, calculates, or processes the input image signal (image signal data). The processed image signal is output to the display control circuit 113 together with a control signal.

[0058] Specifically, the image processing circuit 110 analyzes the input image signal data and determines whether it is a moving image or a still image. The display control circuit 113 determines whether the image is a still image or not, and outputs a control signal including the determination result to the display control circuit 113. The image processing circuit 110 extracts one frame of still image data from the image signal Data containing a moving image or a still image. A still image is extracted and output to the display control circuit 113 together with a control signal indicating that it is a still image. The image processing circuit 110 also processes the input image signal Data together with the above-mentioned control signal. The image processing circuit 110 outputs the above-mentioned functions to the display control circuit 113. This is an example of the image processing function, and various image processing functions can be selected and applied depending on the application of the display device. .

[0059] The image signal converted into a digital signal is then processed (for example, to detect the difference between the image signals). Since this is easy, when the input image signal (image signal data) is an analog signal, In the image processing circuit 110, an A / D converter and the like are provided.

[0060] The backlight unit 130 includes a backlight control circuit 131 and a backlight 132. The backlight 132 may be selected depending on the application of the liquid crystal display device 200. The backlight 132 may be, for example, a white light emitting element. The backlight control circuit 131 can be provided with a display element (for example, a white LED). A backlight signal for controlling the backlight and a power supply potential are supplied from the display control circuit 113. can be.

[0061] Next, a method for driving the liquid crystal display device illustrated in FIG. 2 will be described with reference to FIGS. 3 to 6. The method of driving the liquid crystal display device described in this embodiment is to adjust the display depending on the characteristics of the image to be displayed. This is a display method that changes the refresh rate (or frequency) of the display panel. In the case of an image (video) in which the image signals of the frames are different, the image signal is written for each frame. On the other hand, the image signals of consecutive frames are the same (still images). In this case, no new image signals are written during the period when the same image is displayed, or the frequency of writing is The potential of the pixel electrode and the common electrode that apply voltage to the liquid crystal element is kept in a floating state ( The voltage applied to the liquid crystal element is maintained by floating, without the need to supply a new potential. A display mode for displaying still images is used.

[0062] LCD displays combine moving images and still images on the screen. Moving images are divided into multiple frames. By switching between multiple different time-division images at high speed, the human eye perceives the image as moving. Specifically, it refers to images that are switched at least 60 times (60 frames) per second. This allows the human eye to perceive the image as a moving image with less flicker. Unlike single images and partial videos, multiple images are time-divided over multiple frame periods and switched at high speed. Even if the clock is operated in a continuous frame period, for example, the nth frame and the (n+1)th frame, It refers to an image that does not change between images.

[0063] The liquid crystal display device according to the present invention can display both moving images and still images. When the display mode is set to "0", the video display mode and the still image display mode are selected. In this specification, the image displayed in the still image display mode can be used as a still image. Also called an image.

[0064] FIG. 3 shows the connection between the display panel 120 and the display control circuit 113 of this embodiment.

[0065] In this embodiment, the display panel 120 includes a pixel section 122 and a switching element 127. In this embodiment, the display panel 120 has a first substrate and a second substrate. The substrate is provided with a driving circuit section 121, a pixel section 122, and a switching element 127. There are.

[0066] The unit 123 includes a subunit 123a and a subunit 123b. The bit 123a has a transistor 214a as a switching element. and a liquid crystal element 215a connected to the capacitor element 210a. A transistor 214b is used as a switching element, and a capacitor connected to the transistor 214b is used. The liquid crystal display device 200 includes a liquid crystal element 210b and a liquid crystal element 215b (see FIG. 3).

[0067] The transistors 214a and 214b are transistors with reduced off-state current. When the transistor 214a and the transistor 214b are in an off state, , the transistor 214a and the liquid crystal display connected to the transistor 214b, in which the off-state current is reduced. The capacitances stored in the element 215a, the liquid crystal element 215b, the capacitors 210a, and the capacitors 210b are The charge is less likely to leak through transistor 214a and transistor 214b. The state written before the transistor 214a and the transistor 214b are turned off is then It can be held stable until it is written.

[0068] In this embodiment, the liquid crystal is provided on a second substrate opposite to the pixel electrodes provided on the first substrate. The electrodes are controlled by a longitudinal electric field generated by a common electrode.

[0069] Examples of liquid crystals that can be used in liquid crystal elements include nematic liquid crystals, cholesteric liquid crystals, and smectic liquid crystals. tic liquid crystal, discotic liquid crystal, thermotropic liquid crystal, lyotropic liquid crystal, low molecular weight Liquid crystal, polymer dispersed liquid crystal (PDLC), ferroelectric liquid crystal, antiferroelectric liquid crystal, main chain liquid crystal, side chain liquid crystal Examples include polymer liquid crystals and banana-shaped liquid crystals.

[0070] One example of a liquid crystal driving method is the TN (Twisted Nematic) mode. STN (Super Twisted Nematic) mode, OCB (Optical Elly Compensated Birefringence mode, ECB (El Electrically Controlled Birefringence mode, FLC (Ferroelectric Liquid Crystal) mode, AFL C (AntiFerroelectric Liquid Crystal) mode, P DLC (Polymer Dispersed Liquid Crystal) mode , PNLC (Polymer Network Liquid Crystal) mode , guest host mode, etc.

[0071] The switching element 127 switches between a common potential and a common voltage in response to a control signal output from the display control circuit 113. Vcom is supplied to the common electrode 128. The switching element 127 is a transistor The gate electrode and the source electrode or the drain electrode of the transistor can be formed by One side is connected to the display control circuit 113, and the other side is connected to the source electrode or the drain electrode. The common potential Vcom is supplied from the display control circuit 113 via 26, and the other is The switching element 127 is connected to the driving circuit unit 121 and the It may be formed on the same substrate as the pixel section 122, or may be formed on a different substrate. That's fine.

[0072] By using a transistor with reduced off-state current as the switching element 127, The phenomenon that the voltage applied to both terminals of the liquid crystal element 215a and the liquid crystal element 215b decreases over time is suppressed. It can be controlled.

[0073] The common connection portion is a terminal connected to the source electrode or the drain electrode of the switching element 127. The electrodes are electrically connected to the common electrode 128.

[0074] The source of the switching element 127 is a transistor, which is one type of switching element. One of the drain and source electrodes is connected to terminal 126B, and the other of the drain and source electrodes of switching element 127 is connected to terminal 126C. The other of the source electrode and the drain electrode is connected to the transistor 214a or the transistor 214b. The other electrodes of the capacitor 210a and the capacitor 210b that are not connected to the 15a and the other electrode of the liquid crystal element 215b are connected via a common connection part. The gate electrode of switching element 127 is connected to terminal 126A.

[0075] Next, the state of signals supplied to pixels will be explained with reference to the equivalent circuit diagram of the liquid crystal display device shown in FIG. 3 and the equivalent circuit diagram of the liquid crystal display device shown in FIG. The timing chart will be used for explanation.

[0076] 4, the clock signal GC supplied from the display control circuit 113 to the gate line side driving circuit 121A is K, and a start pulse GSP. The display control circuit 113 also includes a source line side drive circuit 121B and the start pulse SSP. To explain the timing of the clock signal output, the waveform of the clock signal is shown in Figure 4 as a simple square wave. It is shown as a waveform.

[0077] 4, the high power supply potential Vdd, the potential of the source line 125 (the potential of the Data line), The potential of the pixel electrode, the potential of the terminal 126A, the potential of the terminal 126B, and the potential of the common electrode are shown. vinegar.

[0078] In FIG. 4, a period 1401 corresponds to a period for writing an image signal for displaying a moving image. During the period 1401, an image signal and a common potential are supplied to each pixel and common electrode of the pixel portion 122. It works like this.

[0079] The period 1402 corresponds to a period in which a still image is displayed. The image signal to each pixel of 22 and the common potential to the common electrode are stopped. In a period 1402, signals are supplied to stop the operation of the driving circuit unit. However, depending on the length of the period 1402 and the refresh rate, the image signal is periodically written. It is preferable to incorporate such a configuration to prevent deterioration of still images.

[0080] First, a timing chart for the period 1401 will be described. A clock signal is always supplied as a clock signal GCK, and a vertical start pulse GSP is supplied as a A pulse corresponding to the synchronization frequency is supplied. Also, during period 1401, the clock signal SCK As a result, a clock signal is always supplied, and as a start pulse SSP, one gate selection period A pulse corresponding to the

[0081] In addition, an image signal Data is supplied to the pixels of each row via a source line 125, and In response to the potential of the source line 125, the pixel electrode is supplied with the potential of the source line 125.

[0082] In addition, the display control circuit 113 connects the terminal 126A of the switching element 127 to the switching element 127 is supplied with a potential that makes it conductive, and a common potential is supplied to the common electrode via terminal 126B. do.

[0083] On the other hand, a period 1402 is a period in which a still image is displayed. In period 1402, the clock signal GCK and the start pulse G SP, the clock signal SCK, and the start pulse SSP all stop. At 02, the image signal Data supplied to the source line 125 is stopped. During a period 1402 when both the signal GCK and the start pulse GSP are stopped, the transistor 21 4a, the transistor 214b is turned off, and the potential of the pixel electrode is brought into a floating state.

[0084] In addition, the display control circuit 113 connects the terminal 126A of the switching element 127 to the switching element A potential is supplied to make the common electrode 127 non-conductive, and the potential of the common electrode is set to a floating state.

[0085] In the period 1402, the electrodes at both ends of the liquid crystal element 215a and the liquid crystal element 215b, that is, the pixel electrodes The potential of the common electrode is set to a floating state, and a still image is displayed without supplying a new potential. It can be done.

[0086] In addition, the clocks supplied to the gate line side driving circuit 121A and the source line side driving circuit 121B are By stopping the clock signal and the start pulse, it is possible to reduce power consumption.

[0087] In particular, the transistor 214a, the transistor 214b, and the switching element 127 are turned off. By using a transistor with reduced current, the liquid crystal element 215a and the liquid crystal element 215 This can suppress the phenomenon in which the voltage applied to both terminals of b decreases over time.

[0088] Next, the period when the video is switched to a still image (period 1403 in FIG. 4) and the period when the still image is switched to the video are considered. The operation of the display control circuit during the period (period 1404 in FIG. 4) when the display is switched to the 5A and 5B show the high power supply potential output from the display control circuit. Vdd, clock signal (here GCK), start pulse signal (here GSP), and and the potential of terminal 126A.

[0089] The operation of the display control circuit during the period 1403 when a moving image is switched to a still image is shown in FIG. The display control circuit stops the start pulse GSP (E1 in FIG. 5(A), first step). Then, after the pulse output reaches the final stage of the shift register, multiple clock signals G CK is stopped (E2 in FIG. 5A, second step). Then, the power supply voltage is set to the high power supply potential. Vdd is changed to the low power supply potential Vss (E3 in FIG. 5(A), the third step). The potential of the terminal 126A is set to a potential at which the switching element 127 is in a non-conducting state (FIG. 5(A) ) E4, fourth step).

[0090] By the above procedure, the drive circuit unit 121 can be operated without causing a malfunction. The signal supplied to 1 can be stopped. The malfunction when switching from video to still image causes noise. Since noise is retained as a still image, it is an LCD display equipped with a display control circuit that is less likely to malfunction. The display device can display still images with little image degradation.

[0091] Next, the operation of the display control circuit during the period 1404 when the still image is switched to the moving image is shown in FIG. 5(B). The display control circuit sets the potential of the terminal 126A to a potential at which the switching element 127 is in a conducting state. (S1 in FIG. 5B, first step). Next, the power supply voltage is set to Vss. Then, the high power supply potential Vdd is set (S2 in FIG. 5B, second step). After applying the potential, a plurality of clock signals GCK are supplied (S3 in FIG. 5B, the third step Next, a start pulse signal GSP is supplied (S4 in FIG. 5(B), the fourth step (P).

[0092] By the above procedure, the drive circuit unit 121 can be turned on without causing a malfunction of the drive circuit unit 121. By returning the potential of each wiring to the time when the video was displayed in the appropriate order, the supply of the drive signal can be resumed. The driving circuit unit can be driven without any operation.

[0093] 6 shows the images in a period 601 in which a moving image is displayed and a period 602 in which a still image is displayed. The frequency of signal writing is shown in Fig. 6. In Fig. 6, "W" indicates the period during which the image signal is written. "H" indicates the period during which the image signal is held. Although the period 603 represents one frame period, it may be another period.

[0094] In this way, in the configuration of the liquid crystal display device of this embodiment, the still image displayed in the period 602 The image signal of the image is written in the period 604, and the image signal written in the period 604 is written in the period 6 02 other periods are held.

[0095] Next, the configuration of the image processing circuit 110 and the procedure by which the image processing circuit 110 processes signals will be described. An example will be described with reference to FIG. 7. The image processing circuit 110 shown in FIG. 7 is This is one example of the embodiment, and the present embodiment is not limited to this configuration.

[0096] The image processing circuit 110 shown in FIG. 7 analyzes continuously input image signals and distinguishes between moving and still images. Also, when the input image signal (image signal data) changes from a moving image to a still image, When the still image is displayed, it is cut out and sent to the display control circuit together with a control signal indicating that it is a still image. The input image signal (image signal Data) is converted from a still image to a moving image. When switching to the video signal, the video signal is displayed together with the control signal indicating that it is a video. The signal is output to the control circuit 113.

[0097] The image processing circuit 110 illustrated in FIG. 7 includes a memory circuit 111, a comparison circuit 112, and a selection circuit The image processing circuit 110 outputs a display image from the input digital image signal Data. The display panel image signal and the backlight signal are generated. The backlight signal is a signal that controls the backlight unit 130. is.

[0098] The memory circuit 111 includes a plurality of frame memory circuits for storing image signals relating to a plurality of frames. The number of frame memories included in the memory circuit 111 is not particularly limited. Any element that can store image signals relating to multiple frames can be used. For example, DRAM (Dynamic Random Access Memory) , SRAM (Static Random Access Memory) and other storage elements It may be configured using the following.

[0099] The frame memory may be configured to store an image signal for each frame period. The number of frame memories is not particularly limited. It is selectively read out by a comparison circuit 112 and a display control circuit 113. The frame memory 111b in the figure conceptually illustrates a memory area for one frame. do.

[0100] The comparison circuit 112 selects image signals for successive frame periods stored in the memory circuit 111. The image signals are read out sequentially, and the difference between successive frames is detected for each pixel. This is a circuit for outputting

[0101] In this embodiment, the display control circuit is controlled based on whether or not there is a difference in the image signal between successive frames. The comparison circuit 112 determines the operation of the comparison circuit 113 and the selection circuit 115. If a difference is detected in any pixel (if a difference is "present"), the comparison circuit 112 determines whether the image signal is still. It is determined that the frame is not a still image, and the consecutive frame period in which the difference is detected is determined to be a moving image.

[0102] On the other hand, when the comparison circuit 112 compares the image signals, if no difference is detected in any of the pixels, (If there is no difference), the consecutive frame period in which the difference is not detected is a still image. That is, the comparison circuit 112 determines that the difference between the image signals in successive frame periods is valid. By detecting the absence of an image signal, it is possible to determine whether it is an image signal for displaying a moving image or a still image. It is used to determine whether the signal is an image signal to be displayed.

[0103] The standard for detecting a "difference" through this comparison is that the magnitude of the difference must be at a certain level. It may be set so that when the difference exceeds the threshold, it is determined that a difference exists. The difference detected by the circuit 112 may be determined based on the absolute value of the difference.

[0104] In this embodiment, the comparison circuit 112 provided inside the liquid crystal display device 200 By detecting the difference between the image signals during successive frame periods, the image is converted into a moving image or a still image. However, it is not possible to determine whether the image is a video or a still image from the outside. Alternatively, a signal indicating whether the

[0105] The selection circuit 115 is configured to include a plurality of switches formed of, for example, transistors. If the comparator circuit 112 detects a difference between successive frames, that is, if the image is a moving image, , a moving image signal is selected from the frame memory in the storage circuit 111 and output to the display control circuit 113. Output to.

[0106] If the comparator circuit 112 does not detect a difference between consecutive frames, the selector circuit 115 That is, when the image is a still image, the frame memory in the storage circuit 111 is read from the display control circuit 113 The image signal is not output from the frame memory to the display control circuit 113. By adopting such a configuration, the power consumption of the liquid crystal display device can be reduced.

[0107] In the liquid crystal display device of this embodiment, the comparison circuit 112 determines that the image is a still image. The operation to be performed is in the still image display mode, and the comparison circuit 112 determines that the image is a moving image. is the video display mode.

[0108] As described above, by using the image processing circuit 110 illustrated in FIG. 7, the input image signal Da A display control circuit 1 judges whether ta is a moving image or a still image and outputs a control signal including the judgment result. 13. It can also output one frame of still image from the image signal Data, which includes moving images or still images. A still image is extracted and output to the display control circuit 113 together with a control signal indicating that it is a still image. The input image signal Data can be transmitted to the display control circuit 113 together with the above-mentioned control signals. can be output to.

[0109] In addition, the display control circuit 110 receives a control signal indicating that the image is a still image. The control circuit 113 reduces the frequency of writing image signals during the period when a still image is displayed. As a result, it is possible to reduce power consumption when displaying a still image.

[0110] Also, when displaying a still image by rewriting the same image multiple times, the image change is not visible. If the image quality is too high, the human eye may feel tired. Since the frequency of signal writing is reduced, it also has the effect of reducing eye fatigue.

[0111] In particular, in the liquid crystal display device of this embodiment, a transistor with reduced off-state current is used in each pixel, By applying this to the switching element of the common electrode, it is expected that the voltage can be maintained by the storage capacitor. As a result, the frequency of writing image signals can be dramatically reduced. This makes it possible to reduce power consumption when displaying still images and to reduce eye fatigue. It has a remarkable effect.

[0112] (Embodiment 2) In this embodiment, an electronic device including the liquid crystal display device described in the first embodiment is An example of this will be described.

[0113] FIG. 8(A) shows an external view of a television receiver, which is an electronic device. 1A shows a display module 70 manufactured using the display panel described in the above embodiment. 1 is housed in a housing 700, which is provided with a speaker 702, operation keys 703, an external connection terminal 704, A configuration including an illuminance sensor 705 and the like is shown.

[0114] The television receiver shown in FIG. 8(A) can display not only moving images but also text information or still images. In addition, only a part of the display area can be used to display moving images, and the other area can be used to display still images. The display of still images may include characters, figures, symbols, photographs, patterns, pictures, or includes combinations of these or combinations of these with color.

[0115] FIG. 8(B) shows a block diagram of the main components of a television receiver. The television receiver 710 shown includes a tuner 711, a digital demodulation circuit 712, a video signal processing circuit circuit 713, an audio signal processing circuit 714, a display adjustment circuit 715, a display control circuit 716, a display panel a panel 717, a gate line side driving circuit 718, a source line side driving circuit 719, a speaker 720, It has an image processing circuit 724.

[0116] The tuner 711 receives a video signal and an audio signal from an antenna 721. Digital demodulation circuit 712 demodulates the signal from the tuner 711 into a digital video signal and audio signal. The video signal processing circuit 713 converts the digital video signal into red, green, and blue signals. The audio signal processing circuit 714 is a circuit for converting the audio signal into a corresponding color signal. , converting the digital audio signal into a signal for outputting as audio from the speaker 720. The display adjustment circuit 715 is a circuit for processing the reception station (reception frequency) and the sound. The control information for the amount of the signal is received from the external input unit 722, and the tuner 711 or the audio signal processing circuit 714 It is a circuit for transmitting a signal to.

[0117] Also, a display control circuit 716, a display panel 717, a gate line side driving circuit 718, a source line side The drive circuit 719 and the image processing circuit 724 are the display control circuits described in the above embodiments. circuit 113, display panel 120, source line side driving circuit 121B, gate line side driving circuit 121 A corresponds to the image processing circuit 110. That is, the dotted line portion 723 corresponds to the The display control circuit 716 and the image processing circuit 717 are configured in a manner equivalent to that of the liquid crystal display device 200. The function of the circuit 724 may be configured to be performed by the video signal processing circuit 713 described above. Therefore, it is possible to reduce the number of times the image signal is rewritten. It also has the effect of reducing glare and eye fatigue.

[0118] Next, FIG. 9(A) shows a model for use in an electronic computer (personal computer), which is an electronic device. Figure 9(A) shows the external view of a monitor (also called a PC monitor). A display module 801 manufactured using the display panel described in the above embodiment is housed. The housing 800 includes a speaker 802, an external connection terminal 803, and the like. In Figure 9(A), a window-type display is used to understand that it is a PC monitor. 8 shows the display unit 804.

[0119] Note that Figure 9(A) shows the configuration of a so-called desktop PC monitor. However, it may also be a PC monitor for notebook personal computers. The display on the PC monitor may include not only moving images, but also letters, figures, symbols, photographs, patterns, pictures, or This includes still images that include a combination of these or a combination of these with color.

[0120] Figure 9(B) shows a block diagram of the main components of a PC monitor. The PC monitor 810 shown in FIG. 1 includes a video signal processing circuit 813, an audio signal processing circuit 814, a display control circuit 815, and a control circuit 816, a display panel 817, a gate line side driving circuit 818, a source line side driving circuit 81 9, a speaker 820, and an image processing circuit 824.

[0121] The video signal processing circuit 813 processes the video signal from the external calculation circuit 821 such as a CPU into red, green, and blue signals. The audio signal processing circuit converts the audio signal into a color signal corresponding to each color. 814 converts an audio signal from an external arithmetic circuit 821 such as a CPU into audio through a speaker 820. It is a circuit for processing such as converting the signal into a signal to be output. The circuit 813 and the audio signal processing circuit 814 are operated by an external operating means 822 such as a keyboard. The output signal is varied depending on the

[0122] Also, a display control circuit 816, a display panel 817, a gate line side driving circuit 818, a source line side The drive circuit 819 and the image processing circuit 824 are the display control circuits described in the above embodiments. circuit 113, display panel 120, source line side driving circuit 121B, gate line side driving circuit 121 A corresponds to the image processing circuit 110. That is, the dotted line portion 823 corresponds to the The display control circuit 816 and the image processing circuit 817 are configured in a manner equivalent to that of the liquid crystal display device 200. The function of the circuit 824 may be performed by the video signal processing circuit 813 described above. Therefore, it is possible to reduce the number of times the image signal is rewritten. It also has the effect of reducing glare and eye fatigue.

[0123] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0124] (Embodiment 3) In this embodiment, a backlight that can be used in the liquid crystal display device disclosed in this specification An example of the configuration of the backlight section and backlight unit will be explained with reference to FIGS. 10 and 11. I will explain.

[0125] FIG. 10A shows a backlight unit 5201 called an edge light type and a display panel 5 207. The edge light type is an example of a liquid crystal display device having a backlight unit. A light source is placed at the end of the lamp, and the light from the light source is emitted from the entire light-emitting surface.

[0126] The backlight unit 5201 includes a diffusion plate 5202 (also called a diffusion sheet), a light guide plate 5203, It is composed of a reflector 5204, a lamp reflector 5205, and a light source 5206. The backlight unit 5201 may also be configured to include a brightness enhancement film or the like.

[0127] The light source 5206 has a function of emitting light as needed. For example, the light source 5206 may be Cold Cathode Fluorescent Lamp (CCFL) , a light emitting diode, an EL element, or the like is used.

[0128] FIG. 10(B) is a diagram showing the detailed configuration of an edge-light type backlight unit. The explanation of the diffusion plate, light guide plate, reflector, etc. will be omitted.

[0129] The backlight unit 5201 shown in FIG. 10(B) uses light-emitting diodes (LEDs) 5 For example, a white light emitting diode (LED) 5223 is The light from the light emitting diode (LED) 5223 is efficiently A lamp reflector 5222 is provided to reflect the light clearly. When combining this with the concurrent method, light-emitting diodes for each color (RGB) are used as the light source. Alternatively, a configuration using LEDs may be used.

[0130] FIG. 10(C) shows a liquid crystal display device having a backlight unit called a direct type and a liquid crystal panel. The direct type is an example of a light source that is placed directly under the light-emitting surface, and the light from the light source is emitted. This is a method of emitting light from the entire light surface.

[0131] The backlight unit 5290 includes a diffusion plate 5291, a light blocking unit 5292, and a lamp reflector 529. 3, composed of a light source 5294 and a liquid crystal panel 5295.

[0132] The light source 5294 has a function of emitting light as needed. is a cold cathode fluorescent lamp, a light emitting diode, or an EL element (such as an organic electroluminescent Luminescence elements) are used.

[0133] In addition, in the backlight section called the direct type, an EL element, which is a light emitting element, is used as the light source. By doing so, it is possible to make the backlight thinner. An example of the thread part is shown in FIG. 11(A).

[0134] The backlight unit 5290 shown in FIG. 11(A) includes an EL element 1020 provided on a substrate 1020. The EL element 1025 emits light between a pair of electrodes (anode 1001 and cathode 1002). The EL layer 1003 including the optical region is sandwiched between the EL elements 1025. As shown in the figure, a substrate, a film, a protective film, etc. may be provided to seal the EL element 1025. .

[0135] In this embodiment, light from the EL layer 1003 passes through the anode 1001 and is incident on the display panel 520. Since the anode 1001 is configured to irradiate the light onto the anode 7, a light-transmitting material such as indium oxide is used. The cathode 1002 may be made of a material such as indium tin (ITO). The anode 1001 and the cathode 1002 may be made of a material that reflects light, such as an aluminum film. At least one of the cathode 1001 and the cathode 1002 needs to be transparent.

[0136] Examples of the element structure of the EL element 1025 in FIG. 11(A) are shown in FIGS. 11(B) and 11(C).

[0137] The EL layer 1003 is formed to include at least the light-emitting layer 1013. The functional layer other than the light-emitting layer 1013 may be a laminated structure including a functional layer other than the light-emitting layer 1013. are substances with high hole injection properties, substances with high hole transport properties, substances with high electron transport properties, and substances with high electron injection properties. A layer containing a material with high electron transport properties, a material with bipolar properties (material with high electron and hole transport properties), etc. is used. Specifically, the hole injection layer 1011, the hole transport layer 1012, the light emitting layer 101 3. Functional layers such as the electron transport layer 1014 and the electron injection layer 1015 can be used in combination as appropriate. can be done.

[0138] Next, materials that can be used for the above-mentioned EL element 1025 will be specifically described. .

[0139] The anode 1001 is made of gold, which has a large work function (specifically, preferably 4.0 eV or more). It is preferable to use metals, alloys, electrically conductive compounds, and mixtures thereof. Specifically, for example, indium oxide-tin oxide (ITO) e), indium oxide-tin oxide containing silicon or silicon oxide, indium oxide-tin oxide Zinc oxide (IZO: Indium Zinc Oxide), tungsten oxide and zinc oxide Examples include conductive metal oxides such as lead-containing indium oxide.

[0140] These conductive metal oxide films are usually formed by sputtering, but they can also be formed by the sol-gel method. For example, indium oxide-zinc oxide (IZO) is made by Sputtering method using a target containing 1 to 20 wt% zinc oxide added to indium In addition, an oxide film containing tungsten oxide and zinc oxide can be formed. Indium is made by mixing 0.5 to 5 wt% tungsten oxide and 0.5 wt% zinc oxide with respect to indium oxide. It can be formed by sputtering using a target containing 1 to 1 wt% .

[0141] Other materials that can be used for the anode 1001 include gold (Au), platinum (Pt), and nickel. (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), Baltic (Co), copper (Cu), palladium (Pd), titanium (Ti), or other metallic materials Nitrides (e.g., titanium nitride, etc.), molybdenum oxide, vanadium oxide, ruthenic acid Examples of oxides include oxides of tungsten, manganese, and titanium.

[0142] The cathode 1002 preferably has a small work function (specifically, 3.8 eV or less). (Preferably) metals, alloys, electrically conductive compounds, and mixtures thereof can be used. Specific examples of such cathode materials include elements belonging to Group 1 or 2 of the periodic table. , i.e., alkali metals such as lithium (Li) and cesium (Cs), and magnesium alkaline earth metals such as (Mg), calcium (Ca), and strontium (Sr), and Alloys containing these (MgAg, AlLi), europium (Eu), ytterbium (Y b) Rare earth metals and alloys containing these metals. The potassium earth metal and alloy films containing these can be formed by vacuum deposition. In addition, the alloy containing an alkali metal or an alkaline earth metal is formed by a sputtering method. It is also possible to form a film of silver paste using the inkjet method. It is possible.

[0143] In addition, alkali metal compounds, alkaline earth metal compounds, or rare earth metal compounds (e.g. For example, lithium fluoride (LiF), lithium oxide (LiOx), cesium fluoride (CsF ), calcium fluoride (CaF2), erbium fluoride (ErF3), etc.) thin films and The cathode 1002 can also be formed by laminating a metal film such as aluminum. be.

[0144] Next, specific examples of materials used for each layer constituting the EL layer 1003 will be shown below.

[0145] The hole injection layer 1011 is a layer containing a substance with high hole injection properties. Examples of the oxides include molybdenum oxide, vanadium oxide, ruthenium oxide, and tungsten oxide. In addition, phthalocyanine (abbreviated as H Phthalocyanine compounds such as phthalocyanine (Pc) and copper phthalocyanine (CuPc), 4,4'-bis(4,4'-biphenyl) N-(4-diphenylaminophenyl)-N-phenylamino]biphenyl (abbreviation: DPAB), N,N'-bis[4-[bis(3-methylphenyl)amino]phenyl]- N,N'-diphenyl-[1,1'-biphenyl]-4,4'-diamine (abbreviation: DNT Aromatic amine compounds such as poly(3,4-ethylenedioxythiophene) / Hole injection layers can also be made using polymers such as poly(styrene sulfonate) (PEDOT / PSS). 1011 can be formed. In addition, tris(p-enamine-substituted-aminophenyl ) amine compounds, 2,7-diamino-9-fluorenylidene compounds, tri(pN-ene (amino-substituted-aminophenyl)benzene compounds, ethenes substituted with at least one aryl group Pyrene compounds substituted with one or two phenyl groups, N,N'-di(biphenyl-4-yl)- N,N'-diphenylbiphenyl-4,4'-diamine, N,N,N',N'-tetra( Biphenyl-4-yl)biphenyl-4,4'-diamine, N,N,N',N'-tetra (Biphenyl-4-yl)-3,3'-diethylbiphenyl-4,4'-diamine, 2, 2'-(methylenedi-4,1-phenylene)bis[4,5-bis(4-methoxyphenyl) )-2H-1,2,3-triazole], 2,2'-(biphenyl-4,4'-diyl) Bis(4,5-diphenyl-2H-1,2,3-triazole), 2,2'-(3,3' -dimethylbiphenyl-4,4'-diyl)bis(4,5-diphenyl-2H-1,2, 3-triazole), bis[4-(4,5-diphenyl-2H-1,2,3-triazole The hole injection layer 1011 is formed using, for example, [(2-(2-phenyl-2-ylphenyl)(methyl)amine]. This can be done.

[0146] The hole injection layer 1011 may be formed by using an organic compound and an inorganic compound (preferably an organic compound). and an inorganic compound that exhibits electron-accepting properties toward the electron-injecting material. The hole injection composite material is a material in which electrons are exchanged between organic and inorganic compounds. Since the carrier density increases, the hole injection property and hole transport property are excellent.

[0147] In addition, when a hole-injecting composite material is used as the hole-injecting layer 1011, the anode 1001 and the anode Therefore, the material for forming the anode 1001 can be selected regardless of the work function. You can choose.

[0148] The inorganic compound used in the hole injection composite material is preferably an oxide of a transition metal. Further examples include oxides of metals belonging to groups 4 to 8 in the periodic table. Specifically, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, molyb oxide Tungsten oxide, manganese oxide, and rhenium oxide are preferred due to their high electron-accepting properties. Among these, molybdenum oxide is particularly preferred because it is stable in the air, has low hygroscopicity, and is easy to handle. I wish.

[0149] The organic compounds used in the hole injection composite material include aromatic amine compounds, carbazole derivatives, and the like. Conductors, aromatic hydrocarbons, polymer compounds (oligomers, dendrimers, polymers, etc.), etc. Various compounds can be used. The organic compounds used in the hole injection composite material include It is preferable that the organic compound has a high hole transporting property. -6 cm 2 It is preferable that the material has a hole mobility of 1 / Vs or more. However, if the material has a higher hole transport rate than the electron transport rate, Other materials may be used as long as they have high transport properties. Specific examples of organic compounds that can be used as materials are listed below.

[0150] For example, the aromatic amine compound is N,N'-di(p-tolyl)-N,N'-diphenyl Nyl-p-phenylenediamine (DTDPPA), 4,4'-bis[N-(4-diphenyl N-phenylaminophenyl)-N-phenylamino]biphenyl (abbreviation: DPAB), N, N'-bis[4-[bis(3-methylphenyl)amino]phenyl]-N,N'-diphenyl Nyl-[1,1'-biphenyl]-4,4'-diamine (abbreviation: DNTPD), 1,3, 5-Tris[N-(4-diphenylaminophenyl)-N-phenylamino]benzene( abbreviation: DPA3B) and the like.

[0151] Specific examples of carbazole derivatives that can be used in the hole injection composite material include 3 -[N-(9-phenylcarbazol-3-yl)-N-phenylamino]-9-phenyl PCzPCA1, 3,6-bis[N-(9-phenylcarbazo [N-phenyl-3-yl]-N-phenylamino]-9-phenylcarbazole (abbreviation: PCzP CA2), 3-[N-(1-naphthyl)-N-(9-phenylcarbazol-3-yl) amino]-9-phenylcarbazole (abbreviation: PCzPCN1), etc. .

[0152] In addition, 4,4'-di(N-carbazolyl)biphenyl (abbreviation: CBP), 1,3,5-trimethylbenzyl Tris[4-(N-carbazolyl)phenyl]benzene (abbreviation: TCPB), 9-[4-( N-carbazolyl)]phenyl-10-phenylanthracene (abbreviation: CzPA), 1, 4-Bis[4-(N-carbazolyl)phenyl]-2,3,5,6-tetraphenylbenzene Zeng et al. can be used.

[0153] In addition, examples of aromatic hydrocarbons that can be used in the hole-injecting composite material include 2- tert-Butyl-9,10-di(2-naphthyl)anthracene (abbreviation: t-BuDNA ), 2-tert-butyl-9,10-di(1-naphthyl)anthracene, 9,10-bi bis(3,5-diphenylphenyl)anthracene (abbreviation: DPPA), 2-tert-bromo t-BuDBA , 9,10-di(2-naphthyl)anthracene (abbreviation: DNA), 9,10-diphenyl Anthracene (abbreviation: DPAnth), 2-tert-butylanthracene (abbreviation: t- BuAnth), 9,10-bis(4-methyl-1-naphthyl)anthracene (abbreviation: D MNA), 2-tert-butyl-9,10-bis[2-(1-naphthyl)phenyl]a anthracene, 9,10-bis[2-(1-naphthyl)phenyl]anthracene, 2,3, 6,7-tetramethyl-9,10-di(1-naphthyl)anthracene, 2,3,6,7- tetramethyl-9,10-di(2-naphthyl)anthracene, 9,9'-bianthryl, 10,10'-diphenyl-9,9'-bianthryl, 10,10'-bis(2-phenyl) phenyl)-9,9'-bianthryl, 10,10'-bis[(2,3,4,5,6- Pentaphenyl)phenyl]-9,9'-bianthryl, anthracene, tetracene, Examples include perylene, perylene, and 2,5,8,11-tetra(tert-butyl)perylene. In addition, pentacene, coronene, etc. can also be used. 10 -6 cm 2 / Vs or more, and aromatic hydrocarbons with carbon numbers of 14 to 42 It is more preferable to use

[0154] The aromatic hydrocarbons that can be used for the hole injection composite material have a vinyl skeleton. Examples of aromatic hydrocarbons having a vinyl group include 4,4'-bis( 2,2-diphenylvinyl)biphenyl (abbreviation: DPVBi), 9,10-bis[4-( 2,2-diphenylvinyl)phenyl]anthracene (abbreviation: DPVPA) do.

[0155] In addition, poly(N-vinylcarbazole) (abbreviated as PVK) and poly(4-vinyltriphenyl) Polymer compounds such as polyvinylamine (PVTPA) can also be used.

[0156] The hole transport layer 1012 is a layer containing a substance with a high hole transport property. For example, the synthesis of aromatic amines (i.e., those having a benzene ring-nitrogen bond) A widely used material is 4,4'-bis[N-(3 -methylphenyl)-N-phenylamino]biphenyl, and its derivative 4,4'-biphenyl N-(1-naphthyl)-N-phenylamino]biphenyl (hereinafter referred to as NPB), 4,4',4''-Tris(N,N-diphenyl-amino)triphenylamine, 4,4 ',4''-Tris[N-(3-methylphenyl)-N-phenylamino]triphenyl Starburst aromatic amine compounds such as amines are also included. Mainly 10 -6 cm 2 / Vs or more. However, holes are more likely to be present than electrons. Any other substance may be used as long as it has a high hole transporting property. 12 is not only a single layer, but also a mixed layer of the above materials, or a laminate of two or more layers. It is also possible.

[0157] In addition, adding a hole transport material to an electrically inactive polymer compound such as PMMA good.

[0158] In addition, poly(N-vinylcarbazole) (abbreviated as PVK) and poly(4-vinyltriphenyl) PVTPA), poly[N-(4-{N'-[4-(4-diphenylamine] N'-phenylamino)phenyl]phenyl-N'-phenylamino}phenyl)methacrylamide Poly[N,N'-bis(4-butylphenyl)-N,N'-bis(phenyl)-PTPDMA] Polymer compounds such as [(phenyl)benzidine] (abbreviation: Poly-TPD) may also be used, Furthermore, the hole transport material may be appropriately added to the polymer compound. p-Enamine-substituted aminophenyl amine compounds, 2,7-diamino-9-fluorenyl phenylene compounds, tri(pN-enamine-substituted aminophenyl)benzene compounds, aryl pyrene compounds substituted with one or two ethenyl groups each substituted with at least one N,N '-Di(biphenyl-4-yl)-N,N'-diphenylbiphenyl-4,4'-diamino N,N,N',N'-tetra(biphenyl-4-yl)biphenyl-4,4'-diazo amine, N,N,N',N'-tetra(biphenyl-4-yl)-3,3'-diethylbiphenyl Phenyl-4,4'-diamine, 2,2'-(methylenedi-4,1-phenylene)bis[4 ,5-bis(4-methoxyphenyl)-2H-1,2,3-triazole], 2,2'- (biphenyl-4,4'-diyl)bis(4,5-diphenyl-2H-1,2,3-tri) azole), 2,2'-(3,3'-dimethylbiphenyl-4,4'-diyl)bis(4 ,5-diphenyl-2H-1,2,3-triazole), bis[4-(4,5-diphenyl (2H-1,2,3-triazol-2-yl)phenyl](methyl)amine, etc. It can be used for the transport layer 1012.

[0159] The light-emitting layer 1013 is a layer containing a light-emitting substance, and various materials can be used. For example, luminescent substances include fluorescent compounds that emit fluorescence and phosphorescent compounds that emit phosphorescence. Organic compound materials that can be used in the light-emitting layer are described below. However, the materials applicable to the EL element 1025 are not limited to these.

[0160] Blue to blue-green light can be emitted from, for example, perylene, 2,5,8,11-tetra-t-butylperimethylene, The guest materials used were benzophenone (TBP), 9,10-diphenylanthracene, etc. , can be obtained by dispersing it in a suitable host material. -diphenylvinyl)biphenyl (abbreviation: DPVBi) and other styrylarylene derivatives , 9,10-di-2-naphthylanthracene (abbreviation: DNA), 9,10-bis(2- naphthyl-2-t-butylanthracene (abbreviated as t-BuDNA) It can also be obtained from polymers such as poly(9,9-dioctylfluorene). As a blue light-emitting guest material, a styrylamine derivative is preferred. N,N'-bis[4-(9H-carbazol-9-yl)phenyl]-N,N'- Diphenylstilbene-4,4'-diamine (abbreviation: YGA2S) and N,N'-diphenyl N,N'-bis(9-phenyl-9H-carbazol-3-yl)stilbene-4 ,4'-diamine (abbreviated as PCA2S). In particular, YGA2S is 450n The host material has a peak near m, which is preferable. is preferred, and 9,10-bis(2-naphthyl)-2-t-butylanthracene (abbreviation: t -BuDNA) and 9-[4-(10-phenyl-9-anthryl)phenyl]-9H- Carbazole (abbreviated as CzPA) is suitable. In particular, CzPA is electrochemically stable. This is preferable.

[0161] Blue-green to green light is emitted from, for example, coumarin dyes such as coumarin 30 and coumarin 6, and from bis[2-(2,4-difluorophenyl)pyridinato]picolinatoiridium (abbreviation: F Irpic, bis(2-phenylpyridinato) acetylacetonato iridium (Ir( ppy)2(acac)) is used as a guest material and dispersed in an appropriate host material. In addition, the above-mentioned perylene or TBP can be obtained by using a suitable high concentration of 5 wt% or more. It can also be obtained by dispersing it in a host material. Gold, such as bis(2-methyl-8-quinolinolato)chlorogallium (Ga(mq)2Cl) It can also be obtained from metal complexes. Polymers such as poly(p-phenylene vinylene) can also be used. As a guest material for the blue-green to green light-emitting layer, anthracene derivatives may be used. is preferred because it can emit light with high efficiency. For example, 9,10-bis{4-[N-(4- Diphenylamino)phenyl-N-phenyl]aminophenyl}-2-tert-butyl By using anthracene (abbreviation: DPABPA), highly efficient blue-green light emission can be obtained. In addition, anthracene derivatives substituted with an amino group at the 2-position can emit green light with high efficiency. N-(9,10-diphenyl-2-anthryl)-N,9-diphenyl is preferred. 9H-carbazol-3-amine (abbreviation: 2PCAPA) is particularly suitable because of its long life. As the host material for these, anthracene derivatives are preferred, and the above-mentioned CzPA is It is preferable because it is electrochemically stable. In addition, it is possible to combine green and blue light emission to When fabricating an EL element 1025 having two peaks in the wavelength range from blue to green, An electron-transporting anthracene derivative such as CzPA is used as the host for the green light-emitting layer. When a hole-transporting aromatic amine compound such as NPB is used in the This is preferable because light emission can be obtained at the interface with the layer. As the host for the color emitting material, an aromatic amine compound such as NPB is preferred.

[0162] Yellow to orange light is emitted from, for example, rubrene, 4-(dicyanomethylene)-2-[p-(dimethylene)] [6-methyl-4H-pyran (abbreviation: DCM1)], 4-(dithiazolinone) (9-(9-methylethylen)-2-methyl-6-(9-julolidyl)ethenyl-4H-pyran (abbreviation: DCM2), bis[2-(2-thienyl)pyridinato]acetylacetonatoiridium ( Ir(thp)2(acac)), bis(2-phenylquinolinato)acetylacetonate Iridium (Ir(pq)2(acac)) is used as a guest material, and an appropriate host In particular, the guest material is tetramethylrubrene. Helical derivatives are preferred because they are highly efficient and chemically stable. As the host material, aromatic amine compounds such as NPB are preferred. (8-quinolinolato)zinc(II) (abbreviation: Znq2) and bis[2-cinnamoyl-8- Metal complexes such as quinolinolato zinc (abbreviation: Znsq2) can also be used. Polymers such as poly(2,5-dialkoxy-1,4-phenylene vinylene) may also be used. stomach.

[0163] Orange to red light can be emitted from, for example, 4-(dicyanomethylene)-2,6-bis[p-(dimethylene)] (amino)styryl]-4H-pyran (abbreviation: BisDCM), 4-(dicyanomethylene )-2,6-bis[2-(julolidin-9-yl)ethenyl]-4H-pyran (abbreviation: BisDCJ), 4-(dicyanomethylene)-2-methyl-6-(9-julolidyl) ethoxylate Thenyl-4H-pyran (abbreviation: DCM2), bis[2-(2-thienyl)pyridinato]a Cetylacetonate iridium (abbreviation: Ir(thp)2(acac)), etc. as guest materials The compound is used as a starting material and dispersed in a suitable host material. bis[2-cinnamoyl-8-quinolinolato] zinc(II) (abbreviation: Znq2) and bis[2-cinnamoyl-8-quinolinolato] ] It can also be obtained from metal complexes such as zinc (abbreviated as Znsq2). Polymers such as alkylthiophene may also be used. , 4-(dicyanomethylene)-2,6-bis[p-(dimethylamino)styryl]-4H -pyran (abbreviation: BisDCM), 4-(dicyanomethylene)-2,6-bis[2-(di [Dimethyl-9-(diphenyl)ethenyl]-4H-pyran (abbreviation: BisDCJ), 4-(diphenyl)-4H-pyran (anonyme)-2-methyl-6-(9-julolidyl)ethenyl-4H-pyran (abbreviation :DCM2), {2-isopropyl-6-[2-(2,3,6,7-tetrahydro-1, 1,7,7-tetramethyl-1H,5H-benzo[ij]quinolizin-9-yl)ethenyl 4H-pyran-4-ylidene}propanedinitrile (abbreviation: DCJTI), {2, 6-bis[2-(2,3,6,7-tetrahydro-8-methoxy-1,1,7,7-tetrahydro- 4H-pyramethyl-1H,5H-benzo[ij]quinolizin-9-yl)ethenyl 4H-pyrazolinone, such as 4H-pyrazolinone-4-ylidenepropanedinitrile (abbreviation: BisDCJTM) In particular, DCJTI and BisDCJTM are 620n This is preferable because it has an emission peak near m.

[0164] The light-emitting layer 1013 may be formed by mixing the above-described light-emitting substance (guest material) with another substance (host material). The material for dispersing the highly luminescent material may be a material in which the highly luminescent material is dispersed. Various materials can be used for the luminescence, and the lowest unoccupied molecular orbital (LUM) is more suitable than highly luminescent materials. It is preferable to use a substance having a high HO level and a low highest occupied molecular orbital level (HOMO level). stomach.

[0165] As a substance for dispersing a luminescent substance, specifically, tris(8-quinolinol) ) Aluminum(III) (abbreviation: Alq), tris(4-methyl-8-quinolinolato) Aluminum(III) (abbreviation: Almq3), bis(10-hydroxybenzo[h]ki Beryllium(II) (BeBq2), bis(2-methyl-8-quinolinato) Bis(4-phenylphenolato)aluminum(III) (abbreviation: BAlq), 8-quinolinolato)zinc(II) (abbreviation: Znq2), bis[2-(2-benzoxazol- aryl)phenolato]zinc(II) (abbreviation: ZnPBO), bis[2-(2-benzothiazo metal complexes such as 2-(4-biphenyl)phenolato]zinc(II) (abbreviation: ZnBTZ), (phenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole ( Abbreviation: PBD), 1,3-bis[5-(p-tert-butylphenyl)-1,3,4- Oxadiazol-2-yl]benzene (abbreviation: OXD-7), 3-(4-biphenylyl) )-4-phenyl-5-(4-tert-butylphenyl)-1,2,4-triazole (abbreviation: TAZ), 2,2',2''-(1,3,5-benzenetriyl)tris(1- phenyl-1H-benzimidazole) (abbreviation: TPBI), bathophenanthroline (abbreviation Heterocyclic compounds such as BPhen and bathocuproine (BCP) and 9-[4 -(10-phenyl-9-anthryl)phenyl]-9H-carbazole (abbreviation: CzP A), 3,6-diphenyl-9-[4-(10-phenyl-9-anthryl)phenyl] -9H-carbazole (abbreviation: DPCzPA), 9,10-bis(3,5-diphenyl fluoride) 9,10-di(2-naphthyl)anthracene (abbreviation: DPPA), 9,10-di(2-naphthyl)anthracene (Abbreviation: DNA), 2-tert-butyl-9,10-di(2-naphthyl)anthracene (abbreviation: t-BuDNA), 9,9'-bianthryl (abbreviation: BANT), 9,9'-( Stilbene-3,3'-diyl)diphenanthrene (abbreviation: DPNS), 9,9'-(stilbene 3,3',3' diphenanthrene (abbreviation: DPNS2) '-(Benzene-1,3,5-triyl)tripylene (abbreviation: TPB3), 9,10-di Phenylanthracene (abbreviation: DPAnth), 6,12-dimethoxy-5,11-diphenyl condensed aromatic compounds such as phenylchrysene, N,N-diphenyl-9-[4-(10-phenyl) [Nyl-9-anthrylphenyl]-9H-carbazol-3-amine (abbreviation: CzA1 PA), 4-(10-phenyl-9-anthryl)triphenylamine (abbreviation: DPhP A), N,9-diphenyl-N-[4-(10-phenyl-9-anthryl)phenyl] -9H-carbazol-3-amine (abbreviation: PCAPA), N,9-diphenyl-N-{ 4-[4-(10-phenyl-9-anthryl)phenyl]phenyl}-9H-carbazo PCAPBA, N-(9,10-diphenyl-2-anthracene) (phenyl)-N,9-diphenyl-9H-carbazol-3-amine (abbreviation: 2PCAPA), Aromatic amination of NPB (or α-NPD), TPD, DFLDPBi, BSPB, etc. A mixture thereof can be used.

[0166] In addition, a plurality of materials can be used to disperse the luminescent material. In order to suppress crystallization, a substance that suppresses crystallization, such as rubrene, may be further added. In order to transfer energy to the luminescent material more efficiently, NPB or Alq Further addition may be made.

[0167] By dispersing a light-emitting substance in another substance, the crystallization of the light-emitting layer 1013 can be prevented. In addition, concentration quenching due to high concentrations of luminescent substances can be suppressed. It is possible.

[0168] The electron transport layer 1014 is a layer containing a substance with a high electron transport property. For example, tris(8-quinolinolato)aluminum(III) (abbreviation: Alq) , tris(4-methyl-8-quinolinolato)aluminum(III) (abbreviation: Almq3 ), bis(10-hydroxybenzo[h]quinolinato)beryllium (abbreviation: BeBq2) , bis(2-methyl-8-quinolinolato)(4-phenylphenolato)aluminum (abbreviation The compounds consist of metal complexes with a quinoline or benzoquinoline skeleton, such as BAlq In addition, bis[2-(2-hydroxyphenyl)benzoxazolato] Zinc (abbreviation: Zn(BOX)2), bis[2-(2-hydroxyphenyl)benzothiazo oxazole-based and thiazole-based ligands such as tetrahydrozinc (abbreviated as Zn(BTZ)2) In addition to metal complexes, 2-(4-biphenyl) (4-tert-butylphenyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (abbreviation PBD) and 1,3-bis[5-(p-tert-butylphenyl)-1,3,4- Oxadiazol-2-yl]benzene (abbreviation: OXD-7), 3-(4-biphenylyl) )-4-phenyl-5-(4-tert-butylphenyl)-1,2,4-triazole (abbreviation: TAZ), Bathophenanthroline (abbreviation: BPhen), Bathocuproine (abbreviation: Name: BCP), bis[3-(1H-benzimidazol-2-yl)fluorene-2-ol bis[3-(1H-benzimidazol-2-yl)fluorene- 2-Olato]beryllium(II), bis[2-(1H-benzimidazol-2-yl) Dibenzo[b,d]furan-3-olato](phenolato)aluminum(III), bis [2-(benzoxazol-2-yl)-7,8-methylenedioxydibenzo[b,d ]furan-3-olato](2-naphtholato)aluminum(III) can also be used. The substances mentioned here are mainly 10 -6 cm 2 Substances with electron mobility of / Vs or higher In addition, if a substance has a higher electron transporting property than a hole transporting property, a substance other than the above can be used as an electron transporting substance. The electron transport layer 1014 may be a single layer. Alternatively, two or more layers made of the above materials may be laminated.

[0169] The electron injection layer 1015 is a layer containing a substance with high electron injection properties. Examples include lithium fluoride (LiF), cesium fluoride (CsF), and calcium fluoride (C aF2), alkaline earth metals, or compounds thereof. In addition, a mixture of an organic compound (preferably an organic compound having electron transport properties) and an inorganic compound (preferably is a compound of an alkali metal, alkaline earth metal, rare earth metal, or a compound thereof As the electron injection composite material, for example, For example, magnesium (Mg) may be contained in Alq. By adopting this structure, the efficiency of electron injection from the cathode 1002 can be further improved.

[0170] When the above-mentioned electron injection composite material is used as the electron injection layer 1015, Regardless of function, various conductive materials such as Al, Ag, ITO, silicon or silicon oxide containing ITO are available. A conductive material can be used as the material for the cathode 1002 .

[0171] The EL layer 1003 can be formed by appropriately combining and laminating the above layers. The light-emitting layer 1013 may have a laminated structure of two or more layers. By changing the type of luminescent material used in each luminescent layer, various luminescence In addition, by using multiple luminescent materials with different luminescent colors, This allows for emission of a broad spectrum or white light. For backlight applications where this is required, a structure in which light-emitting layers are stacked is suitable.

[0172] The EL layer 1003 can be formed by various methods (for example, dry For example, a vacuum deposition method, a sputtering method, a deposition ... Inkjet method, spin coating method, etc. can be used. Also, different methods can be used for each layer. It may be formed using

[0173] The EL element 1025 shown in this embodiment can be manufactured by a dry process (for example, For example, vacuum deposition method, sputtering method), wet process (for example, ink jet method, The layer can be formed by various methods, including spin coating.

[0174] Note that the EL element 1025 shown in this embodiment has a structure in which a pair of A structure in which a plurality of EL layers 1003 are stacked between electrodes, that is, a stacked element structure, may also be used. However, when the EL layer 1003 has a stacked structure of n layers (n is a natural number of 2 or more), The mth (m is a natural number, m is 1 or more and (n-1) or less) EL layer and the (m+1)th Between the EL layer and the intermediate layer 1004, an intermediate layer 1004 is sandwiched.

[0175] The intermediate layer 1004 is a layer that is formed between the anode 1001 and the cathode 1002 when a voltage is applied to the anode 1001 and the cathode 1002. Electrons are injected into one of the EL layers 1003 on the anode 1001 side formed in contact with the layer 1004. and the other EL layer 1003 on the cathode 1002 side. do.

[0176] The intermediate layer 1004 is made of the composite material of the organic compound and the inorganic compound (hole injection composite material In addition to the electron injection composite material, it can be formed by appropriately combining materials such as metal oxides. It is more preferable to use the hole injection composite material in combination with other materials. These materials used for the intermediate layer 1004 have excellent carrier injection and carrier transport properties. Therefore, the EL element 1025 can be driven at a low current and a low voltage. .

[0177] In the configuration of the stacked type element, when the EL layer has a configuration in which two layers are stacked, the first The color of the light emitted from the EL layer and the color of the light emitted from the second EL layer are complementary colors. By doing so, white light can be extracted to the outside. Even if the first and second EL layers have a plurality of light-emitting layers each having a complementary color relationship, white light can be emitted. Examples of complementary colors include blue and yellow, or blue-green and red. Examples of materials that emit blue, yellow, blue-green, and red light include the above-listed luminescent materials. You can choose from a variety of qualities.

[0178] The following describes a plurality of light-emitting layers in which the first EL layer and the second EL layer are in a complementary color relationship. An example of a configuration in which white light can be emitted is shown.

[0179] For example, the first EL layer exhibits an emission spectrum having a peak in the blue to blue-green wavelength region. and a second light-emitting layer having an emission spectrum with a peak in the yellow to orange wavelength region. The second EL layer has an emission spectrum having a peak in the blue-green to green wavelength region. The third light-emitting layer exhibits an emission spectrum with a peak in the orange to red wavelength region. and a fourth light-emitting layer.

[0180] In this case, the light emitted from the first EL layer is the light emitted from both the first light-emitting layer and the second light-emitting layer. Since it is a combination of light, it emits light in both the blue to blue-green wavelength region and the yellow to orange wavelength region. In other words, the first EL layer emits a dual-wavelength white or or emits light that is close to white.

[0181] Furthermore, the light emitted from the second EL layer is mixed with the light emitted from both the third and fourth EL layers. It is a combination of blue-green and green wavelength regions and orange-red wavelength regions. The second EL layer exhibits an emission spectrum with a peak, i.e., a different peak from that of the first EL layer. The fluorescent lamp emits white or near-white light with two wavelengths.

[0182] Therefore, the light emitted from the first EL layer and the light emitted from the second EL layer can be overlapped. This allows for the blue to blue-green wavelength region, the blue-green to green wavelength region, the yellow to orange wavelength region, and the orange It is possible to obtain white light emission that covers the wavelength range from blue to red.

[0183] In the configuration of the above-mentioned stacked element, an intermediate layer may be disposed between the stacked EL layers. This makes it possible to realize a long-life element in the high-brightness region while maintaining a low current density. In addition, the voltage drop due to the resistance of the electrode material can be reduced, making it possible to achieve uniform light emission over a large area. It becomes Noh.

[0184] The backlight unit described in FIGS. 10(A) to 10(C) and 11(A) to 11(C) is a luminous For example, the brightness may be adjusted according to the illuminance around the liquid crystal display device. Alternatively, the brightness may be adjusted according to the image signal to be displayed. .

[0185] In addition, color display is possible by combining color filters. In addition, other optical films (polarizing film, retardation film, anti-reflection film, etc.) It is possible to use a combination of these. The system uses a time-sequential additive color mixing method (field sequential method) to display color in time division. When using a color filter, the color filter may not be provided.

[0186] Note that this embodiment mode can be combined with other embodiment modes as appropriate.

[0187] (Fourth embodiment) In this embodiment, an example of a transistor that can be applied to the liquid crystal display device disclosed in this specification will be described. The structure of the transistor that can be applied to the liquid crystal display device disclosed in this specification is not particularly limited. For example, a gate electrode is disposed above the oxide semiconductor layer via a gate insulating layer. A gate electrode is disposed below the oxide semiconductor layer via a gate insulating layer. A staggered type or planar type bottom gate structure can be used. The transistor may have a single gate structure in which one channel formation region is formed, or two It may be a double gate structure in which three gates are formed, or a triple gate structure in which three gates are formed. A device having two gate electrode layers arranged above and below a channel region with a gate insulating layer interposed therebetween. A dual-gate type may also be used. Note that FIGS. 12A to 12D show cross-sectional structures of the transistor. An example is shown below. The transistors shown in FIGS. 12A to 12D are made of an oxide semiconductor. The advantage of using an oxide semiconductor is that it The field-effect mobility in the 2 / Vsec or more, preferably 10cm 2 / Vsec or more 150cm2 / Vsec or less), which is low when the transistor is off Off-state current (less than 1 aA / μm, more preferably less than 10 zA / μm at room temperature and The goal is to obtain a dielectric constant of less than 100 zA / μm at 5°C.

[0188] The transistor 410 shown in FIG. 12A is a bottom-gate transistor. It is also called an inverted staggered transistor.

[0189] The transistor 410 includes a gate electrode layer 401, a gate electrode layer 402, a gate electrode layer 403, a gate electrode layer 404, a gate electrode layer 405, a gate electrode layer 406, a gate electrode layer 407, a gate electrode layer 408, a gate electrode layer 409 ...10, a gate electrode layer 411, a gate electrode layer 412, a gate electrode The insulating layer 402, the oxide semiconductor layer 403, the source electrode layer 405a, and the drain electrode layer 40 5b. In addition, an insulating film that covers the transistor 410 and is stacked on the oxide semiconductor layer 403 A protective insulating layer 409 is further formed on the insulating film 407. .

[0190] The transistor 420 shown in FIG. 12B is a channel-protective transistor (also called a channel-stop transistor). It is one of the bottom gate structures known as inverted staggered transistors.

[0191] The transistor 420 includes a gate electrode layer 401, a gate The insulating layer 402, the oxide semiconductor layer 403, and the insulating layer 402 are formed on the oxide semiconductor layer 403. The insulating layer 427 serving as a channel protective layer, the source electrode layer 405a, and the drain electrode A protective insulating layer 409 is formed to cover the transistor 420. do.

[0192] The transistor 430 shown in FIG. 12C is a bottom-gate transistor. A gate electrode layer 401, a gate insulating layer 402, a source The drain electrode layer 405a, the drain electrode layer 405b, and the oxide semiconductor layer 403 are included. An insulating film 407 is provided to cover the transistor 430 and to be in contact with the oxide semiconductor layer 403. A protective insulating layer 409 is further formed on the insulating film 407 .

[0193] In transistor 430, gate insulating layer 402 is formed between substrate 400 and gate electrode layer 400. 1, a source electrode layer 405a and a drain electrode layer 405b are provided on the gate insulating layer 402. The gate insulating layer 402 and the source electrode layer 405b are provided in contact with each other. 5a, an oxide semiconductor layer 403 is provided over a drain electrode layer 405b.

[0194] The transistor 440 shown in FIG. 12D is a top-gate transistor. The transistor 440 is formed on a substrate 400 having an insulating surface, an insulating layer 437, an oxide semiconductor The conductor layer 403, the source electrode layer 405a, the drain electrode layer 405b, the gate insulating layer 40 2, including a gate electrode layer 401, a source electrode layer 405a, and a drain electrode layer 405b. The wiring layers 436a and 436b are provided adjacent to each other and are electrically connected to each other.

[0195] In this embodiment, as described above, the oxide semiconductor layer 403 is used as the semiconductor layer. The oxide semiconductor used for the compound semiconductor layer 403 is a quaternary metal oxide, In-Sn- Ga-Zn-O oxide semiconductors and In-Ga-Zn-O oxides, which are ternary metal oxides Compound semiconductors, In-Sn-Zn-O oxide semiconductors, In-Al-Zn-O oxide semiconductors , Sn-Ga-Zn-O based oxide semiconductor, Al-Ga-Zn-O based oxide semiconductor, Sn- Al-Zn-O oxide semiconductors and In-Zn-O oxide semiconductors, which are binary metal oxides, body, Sn-Zn-O oxide semiconductor, Al-Zn-O oxide semiconductor, Zn-Mg-O oxide semiconductors, Sn-Mg-O oxide semiconductors, In-Mg-O oxide semiconductors, -O-based oxide semiconductors, Sn-O-based oxide semiconductors, Zn-O-based oxide semiconductors, etc. The oxide semiconductor may contain SiO2. -Ga-Zn-O oxide semiconductors are semiconductors containing indium (In), gallium (Ga), and zinc ( Zn), and the stoichiometric ratio is not particularly important. Elements other than In, Ga, and Zn may be included.

[0196] The oxide semiconductor layer 403 is formed of a material having the chemical formula InMO3(ZnO) m (m>0 and m is an integer Thin films expressed as a metal (not a number) can be used, where M is Ga, Al, Mn, and and Co. For example, M may be Ga, Ga, and Examples include Al, Ga and Mn, or Ga and Co.

[0197] The transistors 410, 420, 430, and 440 including the oxide semiconductor layer 403 are in an off state. Therefore, the current value (off-state current value) in the OFF state can be reduced. The signal retention time can be extended, and the write interval can also be set longer when the power is on. Therefore, the frequency of refresh operations can be reduced, which is effective in reducing power consumption. To bear fruit.

[0198] The transistors 410, 420, 430, and 440 including the oxide semiconductor layer 403 are Since a relatively high field effect mobility can be obtained, high speed driving is possible. By using the above transistor in the pixel part of the device, color separation can be suppressed, resulting in high image quality. In addition, the transistor can be mounted on the same substrate as a driver circuit section or a Since the pixel area can be separately manufactured, the number of parts in the liquid crystal display device can be reduced. This can be done.

[0199] There is no significant limitation on the substrate that can be used for the substrate 400 having an insulating surface. A glass substrate such as borosilicate glass or aluminoborosilicate glass is used.

[0200] In the bottom-gate transistors 410, 420, and 430, an insulating film serving as a base film The base film may be provided between the substrate and the gate electrode layer. It has a function of blocking the light and is made of silicon nitride film, silicon oxide film, silicon nitride oxide film, or oxynitride film. The insulating film may be formed by a laminate structure of one or more films selected from silicon dioxide films.

[0201] The material of the gate electrode layer 401 is molybdenum, titanium, chromium, tantalum, tungsten, Metallic materials such as aluminum, copper, neodymium, scandium, etc., or alloys containing these as their main components The gold material can be used to form a single layer or a multilayer structure.

[0202] The gate insulating layer 402 is formed by depositing silicon oxide using a plasma CVD method, a sputtering method, or the like. silicon layer, silicon nitride layer, silicon oxynitride layer, silicon nitride oxide layer, aluminum oxide layer , an aluminum nitride layer, an aluminum oxynitride layer, an aluminum nitride oxide layer, or an aluminum oxide layer. The aluminum layer can be formed as a single layer or a stacked layer. For example, the first gate insulating layer and the Then, a silicon nitride layer (SiN) with a thickness of 50 nm to 200 nm was formed by plasma CVD. y (y>0)) and a second gate insulating layer having a thickness of 5 nm was formed on the first gate insulating layer. A silicon oxide layer (SiO x (x>0)) to form a total film thickness of 20 The gate insulating layer is 0 nm.

[0203] The conductive film used for the source electrode layer 405a and the drain electrode layer 405b is, for example, Al a metal film containing an element selected from the group consisting of Cr, Cu, Ta, Ti, Mo, and W, or Metal nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film) containing the above elements In addition, a metal film such as Al or Cu may be used as the upper or lower side. Both are made of high melting point metal films such as Ti, Mo, W, etc. or their metal nitride films (titanium nitride film , a molybdenum nitride film, or a tungsten nitride film) may be laminated.

[0204] The wiring layer 436a connected to the source electrode layer 405a and the drain electrode layer 405b, The conductive film such as 6b is also made of the same material as the source electrode layer 405a and the drain electrode layer 405b. It can be used.

[0205] In addition, the source electrode layer 405a, the drain electrode layer 405b (wiring formed in the same layer as this) The conductive film (including the layer) may be formed of a conductive metal oxide. The oxides include indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO ), indium oxide tin oxide alloy (In2O3-SnO2, abbreviated as ITO), Indium zinc oxide alloy (In2O3-ZnO) or these metal oxide materials with silicon oxide It is possible to use a material containing kon.

[0206] The insulating films 407, 427, and 437 are typically silicon oxide films, silicon oxynitride films, or oxide films. An inorganic insulating film such as an aluminum nitride film or an aluminum oxynitride film can be used. do.

[0207] The protective insulating layer 409 provided over the oxide semiconductor layer is formed of a silicon nitride film, an aluminum nitride film, or the like. Inorganic insulating films such as aluminum film, silicon nitride oxide film, and aluminum nitride oxide film are used. It is possible.

[0208] In addition, a planarizing insulating film is formed on the protective insulating layer 409 to reduce surface irregularities caused by the transistor. The planarization insulating film may be formed using a material such as polyimide, acrylic, or benzocyclobutene. In addition to the above organic materials, low dielectric constant materials (low In addition, multiple insulating films made of these materials can be stacked. A planarization insulating film may be formed by performing the above-mentioned process.

[0209] An example of a pixel of a liquid crystal display device using such a transistor is shown in FIGS. 20 and 21. The pixel configuration of the liquid crystal display device shown in FIGS. 20 and 21 is VA (Vertical Alignment) The VA method controls the alignment of the liquid crystal molecules in the liquid crystal panel. The VA method is a type of control method that controls the voltage applied to the panel surface when no voltage is applied. This is a method in which the liquid crystal molecules are oriented vertically.

[0210] FIG. 20 shows a plan view of a pixel, and FIG. 21 shows a cross-sectional view corresponding to the AB cutting line shown in the figure. 20 shows a plan view of the substrate 400 on which the transistor 410 is formed. 21 shows the structure of the substrate 400 on which the transistor 410 is provided, as well as the structure of the opposing substrate 4 20 and 21. This will be explained with reference to the following.

[0211] The configuration of the transistors 410a and 410b is the same as that shown in FIG. 12(A), and the gate electrode layer 40 1, a gate insulating layer 402, and an oxide semiconductor layer 403. 410b share the gate electrode layer 401. The oxide semiconductor layer 401 is formed to extend in one direction. The source electrode layer 402 is provided so as to overlap with the gate electrode layer 401. The drain electrode layer 405a and the drain electrode layer 405b are provided on the upper layer side of the oxide semiconductor layer 403 (note that Here, the source electrode layer 405a and the drain electrode layer 405b are referred to as the transistor. The source electrode layer 4 is used for convenience to distinguish it from the electrode connected to the source electrode 410. The gate electrode layer 401 is formed on the protective insulating layer 409. A planarizing film 421 is provided, and pixel electrodes 411a and 411b are provided thereon. The electrode 411a is connected to the transistor 410a, and the pixel electrode 411b is connected to the transistor 410 The pixel electrode 411a is connected to the drain electrode layer 411b through a contact hole 412. The pixel electrode 411a is connected to the pixel electrode 405b. 411b is made of a transparent electrode material such as indium tin oxide, zinc oxide, or tin oxide. There are.

[0212] In addition, the storage capacitor 419 may be provided as appropriate. In this case, the storage capacitor 419 is provided on the gate electrode layer 401. The capacitor wiring layers 417a, 417b and the capacitor electrode layers 418a, 418b are formed in the same layer. Between the capacitor wiring layer 417 and the capacitor electrode layer 418, a gate insulating film is formed as a dielectric. The edge layer 402 extends to form storage capacitors 419a, 419b.

[0213] Figure 20 shows two sub-units each consisting of a transistor and a pixel electrode. That is, the pixel electrode 411a and the pixel electrode 411b are In this case, the potential between the capacitive electrode layer 417a and the capacitive electrode layer 417b is By making the potentials of the pixel electrodes 411a and 411b different, the potentials of the pixel electrodes 411a and 411b can be made different. That is, the potentials of the capacitive electrode layer 417a and the capacitive electrode layer 417b can be individually controlled. This allows precise control of the liquid crystal orientation and widens the viewing angle.

[0214] In FIG. 21, a substrate 400 and an opposing substrate 416 are overlapped with each other, and a liquid crystal layer 414 is provided between them. The opposing substrate 416 has a spacer 422 formed thereon. Light-shielding layer 423, first colored layer 424, second colored layer 425, third colored layer 426, counter electrode 41 This structure allows the formation of protruding ribs 428 for controlling the alignment of the liquid crystal. The pixel electrode 411 and the counter electrode 415 are provided with an alignment film. The alignment film 413 may be subjected to alignment treatment by a photo-alignment method or a rubbing method. good.

[0215] In addition to the VA type, there are also TN (Twisted Nematic) and MVA (Multi-Voltage Amplifier) ​​types. Ti-domain Vertical Alignment) method, IPS (In-P Lane Switching) method, CPA (Continuous Pinwhee) l Alignment) method, PVA (Patterned Vertical Al The liquid crystal layer 414 may have a liquid crystal phase that is different from that of the liquid crystal layer 414. A smectic phase, a cholesteric phase, a blue phase, etc. can be used.

[0216] As described above, in this embodiment, an oxide semiconductor having a high field-effect mobility and a low off-state current value is used. By using a transistor including a conductor layer, a liquid crystal display device with low power consumption can be provided. This can be done.

[0217] (Embodiment 5) In this embodiment, an example of a transistor including an oxide semiconductor layer and a manufacturing method thereof will be described with reference to FIGS. The same parts as those in the above embodiment or parts having similar functions and steps will be described in detail. This can be done in the same way as in the above embodiment, and the repeated explanation will be omitted. A detailed description of this will be omitted.

[0218] 13A to 13E show examples of cross-sectional structures of transistors. 12A.) The transistor 510 shown in FIG. 12A has a bottom It is an inverted staggered transistor with a gate structure.

[0219] Hereinafter, a process for manufacturing a transistor 510 on a substrate 505 will be described with reference to FIGS. 13(A) to 13(E). Explain the process.

[0220] First, a conductive film is formed on a substrate 505 having an insulating surface, and then a first photolithography is performed. A gate electrode layer 511 is formed by a process. If the resist mask is formed by the inkjet method, a photomask can be used. Therefore, manufacturing costs can be reduced.

[0221] The substrate 505 having an insulating surface is the same as the substrate 400 shown in the fourth embodiment. In this embodiment mode, a glass substrate is used as the substrate 505.

[0222] An insulating film serving as a base film may be provided between the substrate 505 and the gate electrode layer 511. , which has the function of preventing the diffusion of impurity elements from the substrate 505, and The insulating film is made of one or more films selected from a silicon film, a silicon nitride oxide film, and a silicon oxynitride film. The insulating film can be formed by a laminated structure.

[0223] The material of the gate electrode layer 511 is molybdenum, titanium, tantalum, tungsten, or aluminum. Metallic materials such as aluminum, copper, neodymium, scandium, etc., or alloy materials containing these as the main components The insulating film can be formed as a single layer or a laminate using a material.

[0224] Next, a gate insulating layer 507 is formed on the gate electrode layer 511. The gate insulating layer 507 is , a silicon oxide layer, a silicon nitride layer, etc., are formed by using a plasma CVD method, a sputtering method, etc. , silicon oxynitride layer, silicon nitride oxide layer, aluminum oxide layer, aluminum nitride layer a single layer of aluminum oxide nitride, aluminum oxide nitride, or hafnium oxide; can be formed by laminating.

[0225] The oxide semiconductor of this embodiment is an oxide semiconductor obtained by removing impurities and becoming i-type or substantially i-type. Such highly purified oxide semiconductors have low resistance to interface states and interface charges. Since the interface between the oxide semiconductor layer and the gate insulating layer is extremely sensitive to the temperature, the interface between the oxide semiconductor layer and the gate insulating layer is important. Therefore, the gate insulating layer in contact with the highly purified oxide semiconductor is required to have high quality.

[0226] For example, high density plasma CVD using microwaves (for example, frequency 2.45 GHz) produces dense This is preferable because it allows the formation of a high-quality insulating layer with high dielectric strength. The close contact between the gate insulating layer and the high-quality gate insulating layer reduces the interface state and improves the interface characteristics. This is because it can be considered as such.

[0227] Of course, if a good insulating layer can be formed as a gate insulating layer, sputtering is also acceptable. Other film formation methods such as the plasma CVD method and the like can also be applied. Even if the insulating layer is one in which the film quality of the gate insulating layer and the interface characteristics with the oxide semiconductor are modified by In any case, it is important that the film quality as a gate insulating layer is good, and that the oxidation Any material may be used as long as it can reduce the interface state density with the compound semiconductor and form a good interface.

[0228] In addition, the gate insulating layer 507 and the oxide semiconductor film 530 contain hydrogen, a hydroxyl group, and moisture as much as possible. In order to prevent the oxide semiconductor film 530 from being broken down, sputtering was performed as pretreatment before the formation of the oxide semiconductor film 530. The substrate 505 on which the gate electrode layer 511 is formed or the gate insulating layer 5 The substrate 505 on which the above-mentioned steps 107 are formed is preheated to remove hydrogen, moisture, etc. adsorbed on the substrate 505. It is preferable to desorb and exhaust the impurities. A pump is preferable. However, this preheating process can be omitted. Before the insulating layer 516 is formed, the source electrode layer 515a and the drain electrode layer 515b are heated. The same process may be carried out on the formed substrate 505 .

[0229] Next, a film having a thickness of 2 nm to 200 nm, preferably 5 nm or more, is formed on the gate insulating layer 507. An oxide semiconductor film 530 having a thickness of 30 nm or less is formed (see FIG. 13A).

[0230] Note that before the oxide semiconductor film 530 is formed by a sputtering method, argon gas is introduced. The reverse sputtering is performed by introducing the silicon dioxide into the gate insulating layer 507 to generate plasma. It is preferable to remove the powdery material (also called particles or dust) that is sputtered. In an argon atmosphere, no voltage was applied to the target side, and a voltage was applied to the substrate side using an RF power supply. This method involves applying a voltage to generate plasma near the substrate to modify the surface. Nitrogen, helium, oxygen, etc. may be used in place of the atmosphere.

[0231] The oxide semiconductor used for the oxide semiconductor film 530 is the oxide semiconductor described in Embodiment 4. The oxide semiconductor may contain SiO2. The oxide semiconductor film 530 is formed by sputtering using an In-Ga-Zn-O oxide target. The cross section at this stage corresponds to FIG. 13(A). The compound semiconductor film 530 is formed in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare It can be formed by sputtering in a mixed atmosphere of gas and oxygen.

[0232] Examples of targets for forming the oxide semiconductor film 530 by a sputtering method include The composition ratio of the metal oxide was In2O3:Ga2O3:ZnO=1:1:1 [molar ratio]. An In-Ga-Zn-O film is formed using an In-Ga-Zn-O target. The material and composition are not limited, for example, In2O3:Ga2O3:ZnO=1:1:2 [mo A metal oxide target having a ratio of [1 / 2] may also be used.

[0233] The filling rate of the metal oxide target is 90% or more and 100% or less, preferably 95% or more. By using a metal oxide target with a high filling rate, the film is formed. In addition, the oxide semiconductor film can be a dense film.

[0234] The oxide semiconductor film 530 is formed using a sputtering gas containing hydrogen, water, a hydroxyl group, or hydrogen. It is preferable to use a high-purity gas from which impurities such as oxides have been removed.

[0235] The substrate is held in a film-forming chamber maintained in a reduced pressure state, and the substrate temperature is preferably set to 100°C or more and 600°C or less. The temperature is preferably 200°C or higher and 400°C or lower. The concentration of impurities contained in the sputtered oxide semiconductor film can be reduced. Damage caused by coating is reduced. The removed sputtering gas is introduced, and an oxide semiconductor is deposited on the substrate 505 using the target. To remove residual moisture in the deposition chamber, an adsorption type vacuum pump, e.g. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. The exhaust means is preferably a turbo pump with a cold trap added. The deposition chamber evacuated using a cryopump may contain, for example, hydrogen atoms, water (H2O), Compounds containing hydrogen atoms (and more preferably compounds containing carbon atoms) are exhausted. Therefore, the impurity concentration in the oxide semiconductor film formed in the deposition chamber can be reduced.

[0236] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. In addition, when a pulsed DC power supply is used, powdery substances (particles, etc.) generated during film formation are This is preferable because it can reduce the thickness (also called "slippage") and make the film thickness distribution uniform.

[0237] Next, the oxide semiconductor film 530 is subjected to a second photolithography process to form an island-shaped oxide semiconductor film. In addition, a resist mask for forming an island-shaped oxide semiconductor layer is applied to the substrate. If the resist mask is formed by the ink jet method, the photomask Since no disks are used, manufacturing costs can be reduced.

[0238] In addition, when a contact hole is formed in the gate insulating layer 507, the process is performed using an oxide semiconductor This can be done simultaneously with the processing of the film 530 .

[0239] The etching of the oxide semiconductor film 530 here can be performed by dry etching or wet etching. For example, wet etching of the oxide semiconductor film 530 may be used. The etching solution used for etching is a mixture of phosphoric acid, acetic acid, and nitric acid, and ITO07N( (manufactured by Kanto Chemical Co., Ltd.) can be used.

[0240] Next, the oxide semiconductor layer is subjected to first heat treatment. The conductor layer can be dehydrated or dehydrogenated. The temperature of the first heat treatment is 400°C. The temperature is set to 750°C or higher, or 400°C or higher but lower than the distortion point of the substrate. The substrate was placed in an electric furnace, which is one of the facilities, and the oxide semiconductor layer was heated to 450°C in a nitrogen atmosphere. After the heat treatment for 1 hour, the oxide semiconductor layer was cooled to room temperature and then cooled to room temperature without being exposed to the air. The recontamination of elements is prevented, and an oxide semiconductor layer 531 is obtained (see FIG. 13B).

[0241] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heat source such as a resistance heating element. A device that heats the object to be treated by radiation may be used. For example, a GRTA (Gas Reactor Atomic Energy Analyzer) apid Thermal Anneal) equipment, LRTA (Lamp Rapid T RTA (Rapid Thermal Anneal) equipment, etc. The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high-pressure sodium lamp, high-pressure mercury lamp It is a device that heats the object to be treated by radiating light (electromagnetic waves) emitted from a lamp or other lamp. The GRTA device is a device that uses high-temperature gas to perform heat treatment. Inert gases such as argon or nitrogen that do not react with the material to be treated by heat treatment An active gas is used.

[0242] For example, as the first heat treatment, a base is placed in an inert gas heated to a high temperature of 650°C to 700°C. The plate is moved and placed in the oven, heated for several minutes, and then the substrate is moved and placed in an inert gas atmosphere heated to a high temperature. You may also perform a GRTA.

[0243] In the first heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain water, hydrogen, etc. Or the purity of rare gases such as helium, neon, and argon must be 6N (99.9999%) or higher. Preferably, the impurity concentration is 7N (99.99999%) or more (i.e., 1 ppm or less, It is preferable that the concentration is 0.1 ppm or less.

[0244] After the oxide semiconductor layer is heated by the first heat treatment, high-purity oxygen gas, high-purity SiO 2 gas, and Introduce high-temperature N2O gas or ultra-dry air (dew point below -40°C, preferably below -60°C). It is preferable that the oxygen gas or N2O gas does not contain water, hydrogen, etc. Alternatively, the purity of the oxygen gas or N2O gas introduced into the heat treatment device is preferably 6N or more. or 7N or more (i.e., the impurity concentration in oxygen gas or N2O gas is 1 ppm or less, preferably It is preferable to set the concentration of the oxygen gas or N2O gas to 0.1 ppm or less. The oxidation process, which is simultaneously reduced by the removal of impurities through dehydration or dehydrogenation treatment, By supplying oxygen, which is the main component material of the oxide semiconductor, the oxide semiconductor layer can be enhanced. Purify and electrically make it type I (intrinsic).

[0245] In addition, the first heat treatment of the oxide semiconductor layer is performed on the oxide semiconductor layer before it is processed into the island-shaped oxide semiconductor layer. The semiconductor film 530 can also be subjected to the first heat treatment. In that case, after the first heat treatment, The substrate is removed and subjected to a photolithography process.

[0246] In addition to the above, the first heat treatment may be performed after the oxide semiconductor layer is formed. After stacking the source electrode layer and the drain electrode layer on the insulating layer, or This may be done either after forming an insulating layer on the drain electrode layer or after forming an insulating layer on the drain electrode layer.

[0247] In addition, when a contact hole is formed in the gate insulating layer 507, the process is performed using an oxide semiconductor This may be done before or after the film 530 is subjected to the first heat treatment.

[0248] In addition, the oxide semiconductor layer is formed in two separate steps and heat-treated in two separate steps. Regardless of the material of the component, such as oxide, nitride, or metal, the thick crystalline region (non-single crystal) region), that is, an oxide semiconductor layer having a crystal region in which the c-axis is oriented perpendicular to the film surface is formed. For example, a first oxide semiconductor film having a thickness of 3 nm to 15 nm may be formed, and nitrogen and oxygen may be added. , rare gas, or dry air atmosphere at 450°C or higher and 850°C or lower, preferably 550°C The first heat treatment is performed at a temperature of 750°C or higher to form a crystalline region (including plate-like crystals) in a region including the surface. ) is formed. A second oxide semiconductor film is formed, and the temperature is increased to 450° C. or higher and 850° C. or lower, preferably 600° C. or higher and 700° C. or lower. Second heat treatment is performed at 00° C. or lower, and the first oxide semiconductor film is used as a seed for crystal growth. The second oxide semiconductor film is crystallized, and as a result, a thick crystalline region is formed. Alternatively, an oxide semiconductor layer having the above structure may be formed.

[0249] Next, a source electrode layer and a drain electrode layer are formed on the gate insulating layer 507 and the oxide semiconductor layer 531. A conductive film is formed to become the source electrode layer (including wiring formed in the same layer). The conductive film used for the source electrode layer 4 shown in Embodiment 4 can be used as the conductive film used for the drain electrode layer. The materials used for the drain electrode layer 405a and the drain electrode layer 405b can be used.

[0250] A resist mask is formed on the conductive film by a third photolithography process, and selective etching is performed. After forming the source electrode layer 515a and the drain electrode layer 515b by etching, The mask is removed (see FIG. 13(C)).

[0251] The third photolithography process involves exposure to ultraviolet light or KrF laser light when forming a resist mask. The source electrodes adjacent to each other on the oxide semiconductor layer 531 may be formed by using a laser beam or an ArF laser beam. The width of the gap between the bottom end of the drain electrode layer and the bottom end of the drain electrode layer determines the width of the gap between the bottom end of the drain electrode layer and the bottom end of the transistor to be formed later. The channel length L is determined. When performing exposure with a channel length L of less than 25 nm, Extreme ultraviolet rays have extremely short wavelengths ranging from a few nm to a few tens of nm. et) is used to perform exposure during resist mask formation in the third photolithography process. Extreme ultraviolet light exposure provides high resolution and a large depth of focus. The channel length L of the transistor can be set to 10 nm or more and 1000 nm or less. The operating speed of the circuit can be increased.

[0252] In addition, in order to reduce the number of photomasks and steps used in the photolithography process, The resist mask is formed by a multi-tone mask, which is an exposure mask that allows the incident light to have multiple intensities. The etching process may be performed using a resist mask formed using a multi-tone mask. The mask has a shape with multiple film thicknesses, and the shape can be further deformed by etching. Therefore, it can be used in multiple etching processes to process different patterns. Therefore, one multi-tone mask can handle at least two different patterns. Therefore, the number of exposure masks can be reduced. Since the corresponding photolithography process can also be eliminated, the process can be simplified.

[0253] Note that when the conductive film is etched, the oxide semiconductor layer 531 is etched and divided. However, it is desirable to optimize the etching conditions so that the conductive film alone does not It is difficult to achieve a condition in which the oxide semiconductor layer 531 is etched while the oxide semiconductor layer 532 is not etched at all. When the conductive film is etched, only a part of the oxide semiconductor layer 531 is etched, and the groove In some cases, the oxide semiconductor layer may have a recess (concave portion).

[0254] In this embodiment, a Ti film is used as the conductive film, and an In—Ga— Since a Zn-O-based oxide semiconductor was used, ammonia hydrogen peroxide (3 A mixture of 1% by weight hydrogen peroxide water, 28% by weight ammonia water, and water (5:2:2) is used.

[0255] Next, plasma treatment is performed using gases such as N2O, N2, or Ar to remove the exposed The plasma treatment may be performed to remove adsorbed water or the like attached to the surface of the oxide semiconductor layer. In this case, the insulating layer 5, which serves as a protective insulating film in contact with a part of the oxide semiconductor layer, is formed without being exposed to the air. Form 16.

[0256] The insulating layer 516 has a thickness of at least 1 nm, and is formed by a method such as sputtering. The insulating layer 516 can be formed by using a method that does not mix impurities such as hydrogen. When hydrogen is contained in the oxide semiconductor layer, the hydrogen penetrates into the oxide semiconductor layer, or the hydrogen penetrates into the oxide semiconductor layer. This causes the back channel of the oxide semiconductor layer to become low-resistance (N-type). Therefore, the insulating layer 516 should be made of hydrogen as much as possible. It is important to avoid using hydrogen in the deposition process so that the film is free of hydrogen.

[0257] In this embodiment, a silicon oxide film having a thickness of 200 nm is formed as the insulating layer 516 by sputtering. The substrate temperature during film formation should be between room temperature and 300°C. In this embodiment, the temperature is set to 100° C. The silicon oxide film is formed by sputtering using a rare gas (typically In an atmosphere of oxygen, or a mixture of rare gases and oxygen, In addition, a silicon oxide target or a silicon target can be used as the target. For example, a silicon target can be used in an oxygen-containing atmosphere. Silicon oxide can be formed in contact with the oxide semiconductor layer by sputtering. The insulating layer 516 formed by the insulating layer 516 is resistant to moisture, hydrogen ions, OH - It does not contain impurities such as It uses an inorganic insulating film that blocks external penetration, typically a silicon oxide film or an acid A silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, or the like is used.

[0258] As in the case of forming the oxide semiconductor film 530, residual moisture in the deposition chamber for the insulating layer 516 is removed. To achieve this, it is preferable to use an adsorption type vacuum pump (such as a cryopump). The concentration of impurities contained in the insulating layer 516 formed in a deposition chamber evacuated using an opto-pump was reduced. In addition, the following exhaust means can be used to remove residual moisture in the deposition chamber for the insulating layer 516: A turbo pump with a cold trap may also be used.

[0259] The insulating layer 516 is formed using a sputtering gas such as hydrogen, water, a hydroxyl group, or a hydride. It is preferable to use a high-purity gas from which impurities have been removed.

[0260] Next, a second heat treatment (preferably 2 For example, the temperature is increased by heating in a nitrogen atmosphere. The second heat treatment is carried out at 250°C for 1 hour under atmospheric pressure. A part of the body layer (channel forming region) is heated while being in contact with the insulating layer 516 .

[0261] Through the above steps, the oxide semiconductor layer is subjected to the first heat treatment to remove hydrogen and Impurities such as moisture, a hydroxyl group, or hydrides (also called hydrogen compounds) are intentionally removed from the oxide semiconductor layer. The oxide semiconductor is formed by eliminating impurities and reducing the impurity concentration. Therefore, the oxide semiconductor layer can be supplied with oxygen, which is one of the main components of the oxide semiconductor layer. Purify and electrically make it type I (intrinsic).

[0262] Through the above steps, the transistor 510 is formed (see FIG. 13D).

[0263] Furthermore, when a silicon oxide layer containing many defects is used as the insulating layer 516, after the silicon oxide layer is formed, The heat treatment reduces hydrogen, moisture, a hydroxyl group, hydride, or the like contained in the oxide semiconductor layer. The impurities are diffused, and the impurities contained in the oxide semiconductor layer are further reduced. .

[0264] A protective insulating layer 506 may be further formed on the insulating layer 516. For example, the protective insulating layer 506 may be formed by RF sputtering. The RF sputtering method is suitable for mass production, so it is used to form a silicon nitride film. This is a preferable film formation method. The protective insulating layer does not contain impurities such as moisture, and these impurities are easily absorbed from the outside. Inorganic insulating films such as silicon nitride and aluminum nitride are used to block the penetration of In this embodiment, the protective insulating layer 506 is formed using a silicon nitride film. (See Figure 13(E)).

[0265] In this embodiment, the substrate 505 on which the insulating layer 516 is formed is used as the protective insulating layer 506. It is heated to a temperature of 100℃ to 400℃ and then heated with a sputter containing high-purity nitrogen from which hydrogen and moisture have been removed. A silicon nitride film is formed by introducing a target gas and using a silicon semiconductor target. In this case, similarly to the insulating layer 516, the protective insulating layer 50 is removed while removing the remaining moisture in the processing chamber. It is preferable to deposit 6.

[0266] After the protective insulation layer is formed, it is further heated in air at 100°C to 200°C for 1 hour to 30 hours. This heat treatment may be carried out by maintaining a constant heating temperature. Alternatively, the temperature may be increased from room temperature to a heating temperature of 100°C or more and 200°C or less, and then reduced from the heating temperature to room temperature. The temperature drop at this temperature may be repeated several times.

[0267] In this manner, the transistor including the highly purified oxide semiconductor layer manufactured according to this embodiment The transistor has high field effect mobility, so it can be driven at high speed. By using a transistor including a highly purified oxide semiconductor layer in a pixel portion of a display device, It is possible to suppress color separation and provide high-quality images. By using a transistor including an oxide semiconductor layer, a driver circuit portion or a pixel portion can be formed on the same substrate. Since it is possible to separately manufacture the liquid crystal display device, the number of parts can be reduced. do.

[0268] The field-effect mobility of a transistor using a highly purified oxide semiconductor was measured. I will explain.

[0269] According to the manufacturing method of the present embodiment described above, a highly purified oxide semiconductor (thickness: 50 nm) was In-Ga-Zn-O oxide semiconductor film) was used to fabricate a transistor (L / W=10μm / The substrate temperature was set to room temperature, and the source-drain voltage (hereinafter referred to as drain voltage) was The source-gate voltage (hereafter referred to as gate voltage or Vd) is set to 10V. The source-drain current (hereafter referred to as the drain voltage) when the voltage is changed from -30V to +30V The change characteristics of the drain current (called Id), i.e., the Vg-Id characteristics, were measured. In FIG. 14, Vg is shown in the range of −5 V to +30 V. As shown in FIG. The field-effect mobility of the transistor including the modified oxide semiconductor layer was 10.7 cm 2 / Vse It can be confirmed that c.

[0270] Furthermore, by using a transistor including a highly purified oxide semiconductor, Therefore, the current value (off-state current value) at the time of the image signal can be reduced. This allows the signal retention time to be extended and the write interval to be set longer. This reduces the frequency of flash operations, which can effectively reduce power consumption. do.

[0271] In addition, the off-state current of a transistor using a highly purified oxide semiconductor was measured. I will explain.

[0272] According to the manufacturing method of this embodiment, a transistor is formed using a highly purified oxide semiconductor. First, the off-state current of a transistor using a highly purified oxide semiconductor was measured. Considering that the channel width W is sufficiently large, we use a transistor with a channel width W of 1 cm. The off-state current was measured for a transistor with a channel width W of 1 cm. The results are shown in Figure 15. In Figure 15, the horizontal axis represents the gate voltage Vg and the vertical axis represents the drain current When the drain voltage Vd is +1V or +10V, the gate voltage Vg is -5V. In the range of -20 V to +10 V, the off-state current of the transistor is 1 x 10, which is the detection limit. -13 A In addition, the off-state current of the transistor (here, the unit channel width (1μm)) is 10aA / μm (1×10 -17 A / μm) or less Understood.

[0273] Next, we aimed to more accurately determine the off-state current of a transistor using a highly purified oxide semiconductor. As described above, the transistor using the highly purified oxide semiconductor The off-state current of the transistor is 1×10, which is the detection limit of the measuring instrument. -13 It turns out that it is below A. Therefore, we fabricated a device for characteristic evaluation to obtain a more accurate value of the off-state current (measured in the above measurement). The results of the calculation (values ​​below the detection limit of the detector) are explained below.

[0274] The characteristic evaluation element used in the current measurement method will be described below.

[0275] The characteristic evaluation element uses three measurement systems connected in parallel. a first transistor, a second transistor, a third transistor, and a fourth transistor a first transistor, a second transistor, a third transistor, and The fourth transistor is fabricated according to the present embodiment and is the transistor shown in FIG. The same structure as the 510 was used.

[0276] One measurement system is connected to one of the source terminal and the drain terminal of the first transistor and the capacitance element. One of the terminals of the first transistor and one of the source and drain terminals of the second transistor are connected to the power supply. (the power supply that provides V2). Also, the source terminal and drain terminal of the first transistor are connected to the other of the on terminals, one of the source terminal and the drain terminal of the third transistor, and the capacitance element The other terminal of the transistor is connected to the gate terminal of the second transistor. the other of the source terminal and drain terminal of the first transistor and the source terminal and drain terminal of the fourth transistor The power supply (V1) is connected to one of the drain terminals and the gate terminal of the fourth transistor. Also, the other of the source terminal and the drain terminal of the second transistor is connected to The other of the source terminal and the drain terminal of the fourth transistor is connected to serve as an output terminal. .

[0277] The gate terminal of the first transistor is connected to a resistor R1, which is connected to a resistor R2 and a resistor R3. A potential Vext_b2 is supplied to the gate terminal of the third transistor to control the state of the third transistor. A potential Vext_b1 is supplied to the transistor 3 to control the on / off state of the transistor 3. Furthermore, the potential Vout is output from the output terminal.

[0278] Next, the off-state current is measured using the above measurement system.

[0279] To measure the off-state current, a potential difference is applied between the source and drain during the initialization period. When the period starts, the potential of the gate terminal of the second transistor changes over time. Therefore, the output potential Vout of the output terminal also changes over time. The off-state current can be calculated from the output potential Vout thus obtained.

[0280] A first transistor, a second transistor, a third transistor, and a fourth transistor The transistors are highly purified oxide transistors with a channel length L = 10 μm and a channel width W = 50 μm. The transistor is made of a semiconductor. In addition, in the three parallel measurement systems, the first measurement The capacitance value of the capacitance element in the first measurement system is set to 100 fF, and the capacitance value of the capacitance element in the second measurement system is set to 1 pF. The capacitance value of the capacitive element of the third measurement system was set to 3 pF.

[0281] In the measurement of the off-state current, Vdd=5V and Vss=0V. In principle, the potential V1 is set to Vss, and a 100msec. Vout was measured as Vdd for a short time. The time Δt was set to approximately 30,000 seconds.

[0282] Figure 16 shows the off-state current calculated by the above current measurement. 16 shows the relationship between the source-drain voltage V and the off-state current I. It was found that the off-state current was approximately 40 μA / μm under the condition of an on-state voltage of 4 V. In addition, when the source-drain voltage is 3.1 V, the off-state current is 10 zA / μm or less. It turns out that 1zA is 10 -21 Represents A.

[0283] As described above, in a transistor using a highly purified oxide semiconductor, It was confirmed that the leakage current was sufficiently small.

[0284] (Embodiment 6) In this embodiment, a display device that switches between a left-eye image and a right-eye image at high speed is used to display The 3D image, which is a moving or still image, is viewed using special glasses that are synchronized with the image of the display device. An example is shown in FIG.

[0285] In FIG. 17A, a display device 2711 and dedicated eyeglasses 2701 are connected by a cable 2703. The dedicated eyeglasses body 2701 has a left eye panel 2702a and a right eye panel 2702b. The shutters on the panel 2702b alternately open and close to allow the user to see the screen. The image on the display device 2711 can be recognized as 3D.

[0286] Also, a block diagram of the main configuration of the display device 2711 and the dedicated eyeglasses body 2701 is shown. Shown in Figure 17(B).

[0287] The display device 2711 shown in FIG. 17B includes a display control circuit 2716, a display portion 2717, a timer 2718, a timer 2719, a timer 2720, a timer 2721, a timer 2722, a timer 2723, a timer 2724, a timer 2725, a timer 2726, a timer 2727, a timer 2728, a timer a timing generator 2713, a source line side driving circuit 2718, an external operating means 2722, and a gate It has a line side driving circuit 2719. It is possible to operate it by an external operating means 2722 such as a keyboard. The output signal is varied depending on the

[0288] The timing generator 2713 generates a start pulse signal and the like, and also generates the left eye image signal. a signal for synchronizing the image for the right eye with the shutter of the left-eye panel 2702a; The signal for synchronizing with the shutter of the display panel 2702b is generated.

[0289] A synchronization signal 2731a for the left-eye image is input to a display control circuit 2716 and displayed on a display unit 2717. At the same time, a synchronization signal 2730a that opens the shutter of the left eye panel 2702a is sent to the left. The right-eye video synchronization signal 2731b is input to the display control circuit 2702a. The image is input to the path 2716 and displayed on the display unit 2717, and at the same time, the right eye panel 2702b A synchronization signal 2730b that opens the shutter is input to the right eye panel 2702b.

[0290] In addition, in order to switch between the image for the left eye and the image for the right eye at high speed, the display device 2711 is equipped with a light-emitting diode. Using diodes (LEDs), a time-division additive color mixing method (field It is preferable to use a sequential method.

[0291] In addition, since the field sequential method is used, the timing generator 2713 is A signal synchronized with the synchronization signals 2730a and 2730b is also input to the backlight section of the diode. It is preferable that the backlight section has R, G, and B LEDs. .

[0292] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. .

[0293] (Embodiment 7) The liquid crystal display device disclosed in this specification can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television (also called digital receivers), computer monitors, digital cameras, digital video cameras cameras such as digital cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices) (c), portable game machines, personal digital assistants, audio playback devices, large game machines such as pachinko machines, etc. Examples of electronic devices including the liquid crystal display device described in the above embodiment include: I will explain.

[0294] FIG. 18A shows an electronic book (also called an E-book), which includes a housing 9630, a display portion 963 1, can have an operation key 9632, a solar cell 9633, and a charge / discharge control circuit 9634 The electronic book shown in FIG. 18(A) contains various information (still images, videos, text images, etc.). Function to display the date or time on the display, function to display the calendar, date or time on the display, display The function of manipulating or editing the information displayed on the screen, using various software (programs) In FIG. 18(A), the charge / discharge control circuit 9 As an example of 634, the battery 9635, the DC-DC converter (hereinafter referred to as the converter) ) 9636. By applying an LCD device to the display portion 9631, an electronic book reader with low power consumption can be provided. Cut.

[0295] By using the structure shown in FIG. 18A, the display portion 9631 can be a semi-transmissive or reflective type. When using a liquid crystal display device, it is expected that it will be used in relatively bright conditions, and the solar cell 963 3 and charging the battery 9635 can be performed efficiently, which is preferable. The solar cell 9633 can be appropriately provided in a free space (on the front or back) of the housing 9630. This allows for efficient charging of the Battery 9635. It is preferable to use a lithium-ion battery as the battery 9635, as this will reduce the size. This has the advantage of being able to

[0296] The configuration and operation of the charge / discharge control circuit 9634 shown in FIG. 18(A) will be described with reference to FIG. 18(B). A block diagram is shown in Figure 18(B) and will be explained. 5, converter 9636, converter 9637, switches SW1 to SW3, display unit 96 31 shows the battery 9635, converter 9636, converter 963 7. Switches SW1 to SW3 correspond to the charge / discharge control circuit 9634.

[0297] First, an example of operation when power is generated by the solar cell 9633 using external light will be described. The power generated by the solar cell is converted to a voltage for charging the Battery 9635. The voltage is increased or decreased by the photovoltaic cell 9636. When power from the 633 is used, switch SW1 is turned on and the converter 9637 The voltage is increased or decreased to the voltage required for the display unit 9631. When not displaying with the 9635 battery, turn SW1 off and SW2 on. The charging may be performed in the above manner.

[0298] Next, an example of operation when external light does not generate electricity by the solar cell 9633 will be described. The power stored in Battery 9635 is converted by turning on switch SW3. The voltage is increased or decreased by the power supply 9637. Power will be drawn from Lee 9635.

[0299] Although the solar cell 9633 is shown as an example of a charging means, it may be possible to charge the battery by other means. It may be configured to charge the Terry 9635. It may also be configured to charge the Terry 9635 in combination with other charging means. This may also be configured as follows.

[0300] FIG. 19 shows a notebook personal computer, which includes a main body 3001, a housing 3002, a display The display unit 3003, the keyboard 3004, etc. By applying any of the liquid crystal display devices shown in the above to the display portion 3003, a low power consumption The computer may be a portable personal computer.

[0301] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is. [Explanation of symbols]

[0302] 100 LCD display device 110 Image processing circuit 111 Memory circuit 111b frame memory 112 Comparison circuit 113 Display control circuit 115 Selection circuit 116 Power supply 120 Display Panel 121 Drive circuit section 121A Gate line side drive circuit 121B Source line side driver circuit 122 pixel section 123 units 123a subunit 123b subunit 124 gate lines 124a gate line 124b gate line 125 source lines 126 Terminal section 126A terminal 126B terminal 127 Switching element 128 Common electrode 130 Backlight section 131 Backlight control circuit 132 Backlight 200 LCD display device 210a Capacitor element 210b Capacitive element 214a Transistor 214b transistor 215a Liquid crystal element 215b Liquid crystal element 400 boards 401 Gate electrode layer 402 Gate insulating layer 403 Oxide semiconductor layer 405a Source electrode layer 405b Drain electrode layer 407 Insulating Film 409 Protective Insulation Layer 410 Transistor 411 Pixel electrode 412 Contact Hole 413 Alignment Film 414 Liquid Crystal Layer 415 Counter electrode 416 Opposing substrate 417 Capacitive wiring layer 418 Capacitive electrode layer 419 Holding capacity 420 transistors 421 Planarization film 422 Spacer 423 Light blocking layer 424 1st colored layer 425 2nd colored layer 426 3rd colored layer 427 Insulating Layer 428 Ribs 430 transistors 436a Wiring layer 436b wiring layer 437 Insulating Layer 440 transistors 505 board 506 Protective insulation layer 507 Gate insulating layer 510 Transistor 511 Gate electrode layer 515a Source electrode layer 515b Drain electrode layer 516 Insulating Layer 530 Oxide semiconductor film 531 Oxide semiconductor layer 601 period 602 period 603 period 604 period 700 cabinet 701 Display Module 702 Speaker 703 Operation Key 704 External connection terminal 705 Illuminance Sensor 710 Television receiver 711 Tuner 712 Digital Demodulation Circuit 713 Video signal processing circuit 714 Audio signal processing circuit 715 Display adjustment circuit 716 Display control circuit 717 Display Panel 718 Gate line side driving circuit 719 Source line side driver circuit 720 speaker 721 Antenna 722 External Input Section 723 Dotted line area 724 Image Processing Circuit 800 cabinets 801 Display Module 802 speaker 803 External connection terminal 804 Window-type display 810 PC monitor 813 Video signal processing circuit 814 Audio signal processing circuit 816 Display control circuit 817 Display Panel 818 Gate line side driving circuit 819 Source line side driver circuit 820 Speaker 821 External arithmetic circuit 822 External operation means 823 Dotted line area 824 Image processing circuit 1001 Anode 1002 Cathode 1003 EL layer 1004 Middle class 1011 Hole injection layer 1012 Hole transport layer 1013 Light-emitting layer 1014 Electron transport layer 1015 Electron injection layer 1020 board 1025 EL element 1401 period 1402 period 1403 period 1404 period 2701 Glasses 2702a Left eye panel 2702b Right eye panel 2703 Cable 2711 Display device 2713 Timing Generator 2716 Display control circuit 2717 Display section 2718 Source line side driver circuit 2719 Gate line side driving circuit 2722 External operation means 2730a sync signal 2730b sync signal 2731a Sync signal 2731b Sync signal 3001 main unit 3002 Case 3003 Display section 3004 Keyboard 5201 Backlight unit 5202 Diffuser 5203 Light guide plate 5204 Reflector 5205 Lamp reflector 5206 Light source 5207 Display Panel 5222 Lamp reflector 5223 Light Emitting Diode (LED) 5290 Backlight unit 5291 Diffuser 5292 Light blocking part 5293 Lamp Reflector 5294 light source 5295 LCD panel 9630 chassis 9631 Display section 9632 Operation Key 9633 Solar Cells 9634 Charge / Discharge Control Circuit 9635 Battery 9636 Converter 9637 Converter

Claims

1. a pixel section and a gate line side driving circuit electrically connected to the pixel section; the pixel portion includes a transistor and a liquid crystal element electrically connected to the transistor, a gate electrode layer of the transistor is electrically connected to the gate line side driving circuit; the transistor includes the gate electrode layer, a first oxide semiconductor layer over the gate electrode layer, and a second oxide semiconductor layer over the first oxide semiconductor layer; the second oxide semiconductor layer is non-single-crystal and has a crystalline region whose c-axis is oriented perpendicular to a film surface; a first period in which a still image is displayed on the pixel portion, and a second period in which a moving image is displayed on the pixel portion; a frequency at which an image signal is written to the pixel electrode of the liquid crystal element via the transistor during the first period is lower than a frequency at which an image signal is written to the pixel electrode via the transistor during the second period.

2. In claim 1, The first oxide semiconductor layer and the second oxide semiconductor layer contain In, Ga, and Zn, respectively.

Images