Amplifier circuit
The amplifier circuit addresses heat dissipation issues by using two resistors with different resistance values and spatial arrangement to disperse heat, enhancing performance and lifespan.
Patent Information
- Application Number
- JP2024083459
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-22
- Publication Date
- 2025-12-05
AI Technical Summary
High-frequency amplifier circuits generate excessive heat near resistors due to heat dissipation issues, affecting their operation and lifespan.
The amplifier circuit incorporates two resistors and two capacitors, with the first resistor having a smaller resistance value than the second, and are spaced apart on a substrate to disperse heat generation and improve dissipation.
This configuration enhances heat dissipation, uniformizes heat generation, and increases the attenuation rate of frequency bands, improving the circuit's performance and lifespan.
Smart Images

Figure 2025177001000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to an amplifier circuit. [Background technology]
[0002] Patent Document 1 discloses an RF power device housed in a package. The RF power device includes at least one transistor, an RF signal input lead, an RF signal output lead, an output matching circuit, and a video bypass circuit. The RF signal input lead and the RF signal output lead are coupled to the transistor. The output matching circuit is coupled to the RF signal output lead. The transistor is coupled to the RF signal output lead via the output matching circuit. The video bypass circuit is coupled to the RF signal output lead via the output matching circuit. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] International Publication No. 2004 / 032188 Summary of the Invention [Problem to be solved by the invention]
[0004] High-frequency amplifier circuits are used, for example, in mobile phone base stations. As communication frequencies become wider, not only signal frequencies but also baseband frequencies are amplified as noise in high-frequency amplifier circuits. To suppress such noise, a circuit that attenuates low-frequency bands, including baseband frequencies, is sometimes provided within the amplifier circuit. In one example, the low-frequency attenuation circuit includes a capacitor and a resistor to absorb low-frequency band noise components. This generates heat in the resistor, causing a rise in temperature near the resistor. Because an excessive rise in temperature near the resistor affects the operation and lifespan of the resistor, it is desirable to improve the heat dissipation capabilities of the resistor.
[0005] An object of the present disclosure is to provide an amplifier circuit that can improve the heat dissipation properties for heat generated in resistors. [Means for solving the problem]
[0006] An amplifier circuit according to one embodiment of the present disclosure includes an amplifier, a first resistor, a second resistor, a first capacitor, and a second capacitor. The amplifier amplifies a high-frequency signal and outputs the amplified high-frequency signal to an output terminal. The first resistor has a first end and a second end. The first end of the first resistor is connected to a wiring between the amplifier and the output terminal. The second resistor has a first end and a second end. The first end of the second resistor is connected to the second end of the first resistor. The first capacitor has a first electrode and a second electrode. The first electrode of the first capacitor is connected to a node between the second end of the first resistor and the first end of the second resistor. The second electrode of the first capacitor is connected to a reference potential. The second capacitor has a first electrode and a second electrode. The first electrode of the second capacitor is connected to the second end of the second resistor. The second electrode of the second capacitor is connected to the reference potential. [Effects of the Invention]
[0007] According to the present disclosure, an amplifier circuit capable of improving the heat dissipation performance for heat generated in resistors can be provided. [Brief explanation of the drawings]
[0008] [Figure 1] FIG. 1 is a diagram schematically illustrating the configuration of an amplifier circuit according to an embodiment. [Figure 2] FIG. 2 is a circuit diagram of a semiconductor device according to an embodiment. [Figure 3] FIG. 3 is a plan view of the semiconductor device. [Figure 4] FIG. 4 is a side view of the semiconductor device. [Figure 5] FIG. 5 is a cross-sectional view of the semiconductor device taken along line VV shown in FIG. [Figure 6] FIG. 6 is a cross-sectional view of the semiconductor device taken along line VI-VI shown in FIG. [Figure 7] FIG. 7 is a cross-sectional view of the semiconductor device taken along line VII-VII shown in FIG. [Figure 8] FIG. 8 is a perspective view of the baseband termination circuit. [Figure 9] FIG. 9 is a cross-sectional view of the baseband termination circuit taken along line IX-IX in FIG. [Figure 10] FIG. 10 is a diagram showing the manufacturing process of the baseband termination circuit. [Figure 11] FIG. 11 is a diagram showing the manufacturing process of the baseband termination circuit. [Figure 12] FIG. 12 is a diagram showing the manufacturing process of the baseband termination circuit. [Figure 13] FIG. 13 is a perspective view of a baseband termination circuit according to the comparative example. [Figure 14] FIG. 14 is a circuit diagram of the baseband termination circuit. [Figure 15] FIG. 15 is a diagram showing a circuit used in a simulation to confirm the effect of the electrical characteristics of the baseband termination circuit. [Figure 16] FIG. 16 is a graph showing the simulation results. [Figure 17] FIG. 17 is a diagram showing a manufacturing process of a baseband termination circuit according to a modified example. [Figure 18] FIG. 18 is a diagram showing a manufacturing process of a baseband termination circuit according to a modified example. [Figure 19] FIG. 19 is a diagram showing a manufacturing process of a baseband termination circuit according to a modified example. DETAILED DESCRIPTION OF THE INVENTION
[0009] [Description of the embodiments of the present disclosure] First, the contents of the embodiments of the present disclosure will be listed and described. [1] An amplifier circuit according to one embodiment of the present disclosure includes an amplifier, a first resistor, a second resistor, a first capacitor, and a second capacitor. The amplifier amplifies a high-frequency signal and outputs the amplified high-frequency signal to an output terminal. The first resistor has a first end and a second end. The first end of the first resistor is connected to a wiring between the amplifier and the output terminal. The second resistor has a first end and a second end. The first end of the second resistor is connected to the second end of the first resistor. The first capacitor has a first electrode and a second electrode. The first electrode of the first capacitor is connected to a node between the second end of the first resistor and the first end of the second resistor. The second electrode of the first capacitor is connected to a reference potential. The second capacitor has a first electrode and a second electrode. The first electrode of the second capacitor is connected to the second end of the second resistor. The second electrode of the second capacitor is connected to the reference potential.
[0010] The amplifier circuit of [1] above includes at least two resistors, i.e., a first resistor and a second resistor. In this case, heat generation can be dispersed more efficiently than in the case of a single resistor. This improves heat dissipation performance for heat generated in the resistors. In addition, the provision of the first resistor increases the attenuation rate of the frequency band passing through the first capacitor.
[0011] [2] In the amplifier circuit of [1] above, the resistance value of the first resistor may be smaller than the resistance value of the second resistor. In this case, the amount of heat generated in the first resistor and the amount of heat generated in the second resistor, which has a smaller current flowing through it than the first resistor, can be made closer to being uniform.
[0012] [3] The amplifier circuit of [1] or [2] may further include a substrate having a main surface on which the first resistor, the second resistor, the first capacitor, and the second capacitor are provided. On the main surface, the first capacitor, the second capacitor, or both the first capacitor and the second capacitor may be disposed between the first resistor and the second resistor. In this case, the first resistor and the second resistor can be spaced apart sufficiently, effectively dispersing heat generation locations and further improving heat dissipation.
[0013] [4] In the amplifier circuit of [3] above, the planar shape of the main surface may be a rectangle that is long in a first direction. The planar shapes of the first resistor and the second resistor may be a rectangle that is long in a second direction that intersects with the first direction. In this case, the first resistor and the second resistor can be spaced apart sufficiently to improve heat dissipation while preventing the base from becoming long in the first direction.
[0014] [5] The amplifier circuit of [3] or [4] above may include a wire bonding pad provided on the main surface and connected to a first end of the first resistor, and a bonding wire connecting the wire bonding pad to the wiring. The first resistor may be disposed between the wire bonding pad and the first capacitor. In this case, the wire bonding pad and the first resistor can be efficiently disposed on the main surface.
[0015] [6] The amplifier circuit of [1] or [2] above may further include a substrate having a main surface on which the first resistor, the second resistor, the first capacitor, and the second capacitor are provided. The first resistor and the second resistor may be film resistors formed on the main surface. This allows the first resistor and the second resistor to be in close contact with the substrate, thereby improving heat dissipation compared to using surface-mounted chip resistors.
[0016] [7] The amplifier circuit of [3] or [4] may further include a substrate having a main surface on which the first resistor, the second resistor, the first capacitor, and the second capacitor are provided. The first resistor and the second resistor may be diffused resistors formed on the substrate. In this way, the first resistor and the second resistor are included in the substrate, thereby improving heat dissipation compared to using surface-mounted chip resistors.
[0017] [Details of the embodiments of the present disclosure] Specific examples of amplifier circuits according to the present disclosure will be described below with reference to the drawings. Note that the present invention is not limited to these examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims. In the following description, the same elements in the drawings will be designated by the same reference numerals, and duplicate explanations will be omitted.
[0018] The amplifier circuit of this embodiment is a high-output, high-frequency amplifier circuit used in mobile communication base stations. FIG. 1 is a diagram schematically illustrating the configuration of the amplifier circuit 1 according to this embodiment. As shown in FIG. 1, the amplifier circuit 1 includes an input terminal 1a, an output terminal 1b, a semiconductor device 10, an external output matching circuit 51, and an external input matching circuit 52. The semiconductor device 10 includes an amplifier 11, an internal output matching circuit 12, an internal input matching circuit 13, and a baseband termination circuit 20 (also referred to as a video bypass circuit or an envelope frequency termination circuit). The input terminal 1a is connected to the amplifier 11 via the external input matching circuit 52 and the internal input matching circuit 13. The external input matching circuit 52 and the internal input matching circuit 13 match the input impedance of the amplifier 11 with that of a load connected to the input terminal 1a.
[0019] Amplifier 11 is connected to output terminal 1b via internal output matching circuit 12 and external output matching circuit 51. Internal output matching circuit 12 and external output matching circuit 51 match the output impedance of amplifier 11 with the load connected to output terminal 1b. A high-frequency signal input to input terminal 1a is transmitted to amplifier 11 via external input matching circuit 52 and internal input matching circuit 13. Amplifier 11 amplifies the high-frequency signal and outputs the amplified signal to output terminal 1b via internal output matching circuit 12 and external output matching circuit 51.
[0020] A baseband termination circuit 20 is connected between a node N1 between the internal output matching circuit 12 and the external output matching circuit 51 and a reference potential such as ground. The baseband termination circuit 20 is a circuit for improving the video bandwidth (VBW). The video bandwidth is used as an indicator of the distortion band. When the VBW is small, measuring the third-order intermodulation distortion (IMD3) of a two-tone signal corresponding to the amplifier's bandwidth (e.g., 400 MHz) reveals a difference in signal strength between the low-frequency IMD3 component and the high-frequency IMD3 component. When this asymmetry occurs in IMD3, even with distortion compensation using digital pre-distortion (DPD), the distortion reduction amount decreases, making it impossible to achieve sufficient distortion characteristics. A known cause of this IMD3 asymmetry is the second-order intermodulation distortion (IMD2) component that occurs in the difference frequency component of the two-tone signal. This difference frequency component is a signal component in a low frequency band within the baseband frequency range. The baseband termination circuit 20 reduces the impedance at node N1 in the low frequency band, thereby increasing the video bandwidth and suppressing the IMD2 component. This improves the asymmetry of IMD3, enabling sufficient distortion compensation by DPD.
[0021] 2 is a circuit diagram of a semiconductor device 10 according to this embodiment. As shown in FIG. 2, the semiconductor device 10 includes a package 14, an output lead 15, and an input lead 16. An amplifier 11, an internal output matching circuit 12, an internal input matching circuit 13, and a baseband termination circuit 20 are mounted within the package 14. The output lead 15 and the input lead 16 connect the circuits within the package 14 to the outside.
[0022] The amplifier 11 includes a transistor 18. The transistor 18 is a FET (Field Effect Transistor), such as a GaNHEMT (Gallium-Nitride High Electron Mobility Transistor) or an LDMOS (Laterally Diffused Metal Oxide Semiconductor). A control terminal (gate) of the transistor 18 is electrically connected to an input lead 16 via an internal input matching circuit 13. A first current terminal (e.g., a drain) of the transistor 18 is electrically connected to an output lead 15 via an internal output matching circuit 12. A second current terminal (e.g., a source) of the transistor 18 is connected to a wiring having a reference potential, such as a ground potential.
[0023] The internal output matching circuit 12 has wires 121 and 122 that act as inductors. The wires 121 and 122 are connected in series with each other, with a first end of the series circuit connected to a first current terminal of the transistor 18 and a second end of the series circuit connected to the output lead 15. The internal output matching circuit 12 further has a capacitor 123. A first electrode of the capacitor 123 is connected to a node between the wires 121 and 122, and a second electrode of the capacitor 123 is connected to a reference potential such as ground. This configures the internal output matching circuit 12 as a so-called T-type filter. The numbers of wires and capacitors in the internal output matching circuit 12 can be set as appropriate.
[0024] The internal input matching circuit 13 has wires 131 and 132 that act as inductors. The wires 131 and 132 are connected in series with each other, with a first end of the series circuit connected to the input lead 16 and a second end of the series circuit connected to the control terminal of the transistor 18. The internal input matching circuit 13 further has a capacitor 133. A first electrode of the capacitor 133 is connected to the node between the wires 131 and 132, and a second electrode of the capacitor 133 is connected to a reference potential such as ground. This configures the internal input matching circuit 13 as a so-called T-type filter. The numbers of wires and capacitors in the internal input matching circuit 13 can be set as appropriate.
[0025] The baseband termination circuit 20 includes a first resistor 21, a second resistor 22, a first capacitor 23, a second capacitor 24, and a wire 25 acting as an inductor. The first resistor 21 has a first end 21a and a second end 21b. The first end 21a is connected to a node N1 of the wiring between the amplifier 11 and the output terminal 1b (or the output lead 15) via the wire 25. The second resistor 22 has a first end 22a and a second end 22b. The first end 22a is connected to the second end 21b of the first resistor 21. The first capacitor 23 has a first electrode 23a and a second electrode 23b. The first electrode 23a is connected to a node N2 between the second end 21b of the first resistor 21 and the first end 22a of the second resistor 22. The second electrode 23b is connected to a reference potential such as ground. The second capacitor 24 has a first electrode 24a and a second electrode 24b. The first electrode 24a is connected to the second end 22b of the second resistor 22. The second electrode 24b is connected to a reference potential such as ground.
[0026] The inductance of the wire 25 prevents high-frequency signals in the operating band amplified by the amplifier 11 from passing to ground via the first capacitor 23 and the second capacitor 24. Therefore, the wire 25 has an inductance that provides high impedance in the operating band. The inductance of the wire 25 is, for example, 1 nH or more. The first capacitor 23 and the second capacitor 24 provide low impedance at frequencies corresponding to the bandwidth of the high-frequency signals amplified by the amplifier 11. The capacitance of the first capacitor 23 is smaller than the capacitance of the second capacitor 24. The capacitance of the first capacitor 23 is, for example, 51 pF to 470 pF, inclusive, and is, for example, 130 pF. The capacitance of the second capacitor 24 is, for example, 510 pF to 4700 pF, inclusive, and is, for example, 1500 pF. The first resistor 21 and the second resistor 22 are damping resistors. For example, if a capacitor (e.g., parasitic capacitance) is connected in parallel with the first capacitor 23, the second capacitor 24, and the wire 25, unwanted resonance may occur. By providing the first resistor 21 and the second resistor 22, unnecessary resonance can be suppressed. The resistance value of the first resistor 21 is smaller than the resistance value of the second resistor 22. The resistance value of the first resistor 21 may be half or less of the resistance value of the second resistor 22. The resistance value of the first resistor 21 is, for example, 0.5Ω or more and 1Ω or less, and is 1Ω in one example. The resistance value of the second resistor 22 is, for example, 1Ω or more and 3Ω or less, and is 2Ω in one example.
[0027] Because the capacitance value of the first capacitor 23 is small, the first capacitor 23 contributes to the attenuation of high-frequency components. Because the high-frequency components attenuated by the first capacitor 23 pass through the first resistor 21, the greater the resistance value of the first resistor 21, the greater the attenuation of the high-frequency components. On the other hand, because the capacitance value of the second capacitor 24 is large, the second capacitor 24 contributes to the attenuation of low-frequency components. Because the low-frequency components attenuated by the second capacitor 24 pass through the first resistor 21 and the second resistor 22, the greater the sum of the resistance values of the first resistor 21 and the second resistor 22, the greater the attenuation of the low-frequency components.
[0028] Fig. 3 is a plan view of the semiconductor device 10 in this embodiment. Fig. 4 is a side view of the semiconductor device 10. Fig. 5 is a cross-sectional view of the semiconductor device 10 taken along line VV shown in Fig. 3. Fig. 6 is a cross-sectional view of the semiconductor device 10 taken along line VI-VI shown in Fig. 3. Fig. 7 is a cross-sectional view of the semiconductor device 10 taken along line VII-VII shown in Fig. 3. The normal direction to the top surface of the base substrate 141 is the Z direction, the direction from the input lead 16 to the output lead 15 is the X direction, and the direction perpendicular to the X direction and the Z direction is the Y direction.
[0029] The package 14 includes a base substrate 141, a frame 142, and a lid (not shown). The base substrate 141 is a conductive substrate, e.g., a laminated substrate containing copper and molybdenum. A reference potential such as a ground potential is supplied to the base substrate 141. The frame 142 and the lid mainly contain a dielectric material, e.g., a resin such as FR-4 (Flame Retardant Type 4) or a ceramic. The frame 142 is joined to the upper surface of the base substrate 141 with a joining material such as a metal paste or a brazing material. The transistor 18, the baseband termination circuit 20, the internal output matching circuit 12, and the internal input matching circuit 13 are arranged in an area surrounded by the frame 142 on the base substrate 141. The internal input matching circuit 13, the transistor 18, and the internal output matching circuit 12 are arranged in this order in the X direction. In other words, the transistor 18 is arranged between the internal input matching circuit 13 and the internal output matching circuit 12 in the X direction. The lid is bonded to the upper surface of the frame 142 by an insulating adhesive (not shown) such as resin. The base substrate 141, the frame 142, and the lid seal the transistor 18 in a cavity.
[0030] The output lead 15 and the input lead 16 are joined to the upper surface of the frame 142. The output lead 15 is arranged on the upper surface of a portion of the frame 142 that is closer to the internal output matching circuit 12. The input lead 16 is arranged on the upper surface of a portion of the frame 142 that is closer to the internal input matching circuit 13. As shown in FIG. 4 , the output lead 15 and the input lead 16 protrude laterally from the frame 142.
[0031] The internal output matching circuit 12 includes a dielectric substrate 124, an upper electrode 125 provided on the upper surface of the dielectric substrate 124, and a lower electrode 126 provided on the lower surface of the dielectric substrate 124. The dielectric substrate 124, the upper electrode 125, and the lower electrode 126 sandwiching the dielectric substrate 124 together form the capacitor 123 shown in FIG. 2. The lower electrode 126 is conductively bonded to a base substrate 141 by a conductive bonding material 127, such as silver paste. The internal input matching circuit 13 includes a dielectric substrate 134, an upper electrode 135 provided on the upper surface of the dielectric substrate 134, and a lower electrode 136 provided on the lower surface of the dielectric substrate 134. The capacitor 133 shown in FIG. 2 is formed by the dielectric substrate 134, and the upper electrode 135 and the lower electrode 136 sandwiching the dielectric substrate 134 together. The lower electrode 136 is conductively bonded to the base substrate 141 by a conductive bonding material 137, such as silver paste. The dielectric substrates 124 and 134 are, for example, ceramic substrates. The top electrodes 125 and 135 are, for example, metal films. The top electrode 125 of the internal output matching circuit 12 is electrically connected to a first current terminal 181 (e.g., a drain) of the transistor 18 by a wire 121 (bonding wire) and to an output lead 15 by a wire 122 (bonding wire). The top electrode 135 of the internal input matching circuit 13 is electrically connected to an input lead 16 by a wire 131 (bonding wire) and to a control terminal 182 (gate) of the transistor 18 by a wire 132 (bonding wire). In the illustrated example, two wires 121, 122, 131, and 132 are provided, but the number of each of the wires 121, 122, 131, and 132 may be one or three or more. A second current terminal 183 (eg, a source) of the transistor 18 is provided on the lower surface of the transistor 18 and is conductively bonded to the base substrate 141 by a conductive bonding material 184 such as silver paste.
[0032] FIG. 8 is a perspective view of the baseband termination circuit 20. FIG. 9 is a cross-sectional view of the baseband termination circuit 20 taken along line IX-IX in FIG. 8. The baseband termination circuit 20 further includes an insulating substrate 26, constituting a baseband termination module. The substrate 26 is, for example, a ceramic substrate. The ceramic substrate is, for example, an alumina substrate or an aluminum nitride substrate. Aluminum nitride has higher thermal conductivity and better heat dissipation than alumina. Alternatively, the substrate 26 may be a semiconductor substrate such as a silicon (Si) substrate or a silicon carbide (SiC) substrate. SiC has higher thermal conductivity and better heat dissipation than Si. The substrate 26 has a main surface 26a and a back surface 26b. A metal film 34 is formed on the entire back surface 26b. The metal film 34 is bonded to the base substrate 141 with a conductive bonding material 35 (see FIG. 6), such as silver paste, thereby fixing the substrate 26 to the base substrate 141. A first resistor 21, a second resistor 22, a first capacitor 23, a second capacitor 24, a wire bonding pad 27, and pattern wirings 28, 29, 30, and 31 are provided on a main surface 26a of the substrate 26. The planar shape of the main surface 26a of the substrate 26 is, for example, a rectangle whose length is in direction D1 (first direction). Direction D1 may coincide with the X direction or may intersect with the X direction.
[0033] In the illustrated example, the wire bonding pad 27, the first resistor 21, the first capacitor 23, the second resistor 22, and the second capacitor 24 are arranged in this order along the direction D1. In other words, the first capacitor 23 is arranged between the first resistor 21 and the second resistor 22. The second capacitor 24 may be arranged between the first resistor 21 and the second resistor 22, or both the first capacitor 23 and the second capacitor 24 may be arranged between the first resistor 21 and the second resistor 22. The first resistor 21 is arranged between the wire bonding pad 27 and the first capacitor 23.
[0034] The first resistor 21 and the second resistor 22 are, for example, thin-film resistors formed on the main surface 26a of the substrate 26. The first resistor 21 and the second resistor 22 are, for example, a metal nitride film or a metal oxide film such as tantalum nitride (TaN or TaN), or an alloy film such as a nichrome (NiCr) alloy. The thickness and resistivity of the first resistor 21 may be the same as those of the second resistor 22. The planar shapes of the first resistor 21 and the second resistor 22 are, for example, rectangular shapes that are elongated in a direction D2 (second direction) intersecting with the direction D1. However, the planar shapes of the first resistor 21 and the second resistor 22 are not limited thereto. For example, the length of the first resistor 21 in the direction D2 is equal to the length of the second resistor 22 in the direction D2. Furthermore, when the resistance value of the first resistor 21 is smaller than the resistance value of the second resistor 22, the width of the first resistor 21 in the direction D1 is smaller than the width of the second resistor 22 in the direction D1. The film thickness of the first resistor 21 and the second resistor 22 is, for example, in the range of 0.05 μm to 0.5 μm. Heat generated in the first resistor 21 and the second resistor 22 is dissipated to the base substrate 141 through the base material 26.
[0035] The wire bonding pad 27 and the pattern wirings 28, 29, 30, and 31 are metal films, such as gold (Au) films, formed on the main surface 26a of the substrate 26. Nickel (Ni) may be provided as an underlayer on the gold (Au) in contact with the main surface 26a, and palladium (Pd) may be provided between the nickel (Ni) and the gold (Au). The thickness of the wire bonding pad 27 and the pattern wirings 28, 29, 30, and 31, including the underlayer, is, for example, in the range of 1 μm to 4 μm. The wire bonding pad 27 is electrically connected to the output lead 15 (i.e., the wiring between the amplifier 11 and the output terminal 1b) via a wire 25 (see FIG. 3). Additionally, the wire bonding pad 27 is connected to one side of the first resistor 21, thereby being connected to the first end 21a of the first resistor 21. The pattern wiring 28 is connected to a second end 21b of the first resistor 21 by contacting a side of the first resistor 21 opposite to the side of the first resistor 21. The pattern wiring 28 is also connected to a first end 22a of the second resistor 22 by contacting a side of the second resistor 22 opposite to the side of the second resistor 22. The pattern wiring 30 is also connected to a second end 22b of the second resistor 22 by contacting a side of the second resistor 22 opposite to the side of the second resistor 22 opposite to the side of the second resistor 22.
[0036] The pattern wiring 29 is separated from the pattern wiring 28 and electrically connected to the metal film 34 on the back surface 26b through a via 32 that penetrates the substrate 26. This connects the pattern wiring 29 to a reference potential such as ground potential. The pattern wiring 31 is separated from the pattern wiring 30 and electrically connected to the metal film 34 on the back surface 26b through a via 33 that penetrates the substrate 26. This connects the pattern wiring 31 to a reference potential such as ground potential. The vias 32 and 33 may be formed by embedding a conductor inside a through-hole, or by depositing a conductive film on the wall surface of the through-hole. When a conductive film is deposited on the wall surface of the through-hole, the area surrounded by the conductive film may be hollow or may be filled with resin.
[0037] In the illustrated example, the first capacitor 23 and the second capacitor 24 are multi-layer ceramic capacitors (MLCCs) that are surface mount devices (SMDs). The first capacitor 23 has a first electrode 23a and a second electrode 23b that are solder-plated. The second capacitor 24 has a first electrode 24a and a second electrode 24b that are solder-plated. The first capacitor 23 is disposed so as to straddle the pattern wiring 28 and the pattern wiring 29. The first electrode 23a of the first capacitor 23 is conductively bonded to the pattern wiring 28 by a conductive bonding material 41, thereby electrically connecting to the second end 21b of the first resistor 21 and the first end 22a of the second resistor 22. The second electrode 23b of the first capacitor 23 is conductively bonded to the pattern wiring 29 by a conductive bonding material 42, thereby connecting to a reference potential. The second capacitor 24 is disposed so as to straddle the pattern wiring 30 and the pattern wiring 31. The first electrode 24a of the second capacitor 24 is conductively bonded to the pattern wiring 30 by a conductive bonding material 43, and thereby electrically connected to the second end 22b of the second resistor 22. The second electrode 24b of the second capacitor 24 is conductively bonded to the pattern wiring 31 by a conductive bonding material 44, and thereby connected to the reference potential. The conductive bonding materials 41, 42, 43, and 44 are, for example, solder, and in one example, SAC305.
[0038] 10, 11, and 12 are diagrams illustrating the fabrication process of the baseband termination circuit 20. In each of FIGS. 10, 11, and 12, (a) shows a plan view, and (b) shows cross-sectional views along lines XX, XI-XI, and XII-XII of (a), respectively. First, as shown in FIG. 10, a substrate 26 having a main surface 26a is prepared. Next, through-holes 26c and 26d penetrating the substrate 26 are formed in the substrate 26. The first resistor 21 and the second resistor 22, which are thin-film resistors, are formed on the main surface 26a by, for example, sputtering after masking.
[0039] Next, as shown in FIG. 11 , wire bonding pads 27 and pattern wirings 28, 29, 30, and 31 are formed on the main surface 26a of the substrate 26, for example, by masking and then vapor deposition or sputtering of a conductive material. At this time, portions of the wire bonding pad 27 and pattern wiring 28 are formed to overlap the first resistor 21, and other portions of the pattern wiring 28 and pattern wiring 30 are formed to overlap the second resistor 22. Then, a plating process is performed to thicken the wire bonding pad 27 and pattern wirings 28, 29, 30, and 31. Vias 32 and 33 are formed by filling the through holes 26c and 26d with a conductive material (by depositing a film of conductive material on the side surfaces of the through holes 26c and 26d). A solder resist is formed on the main surface 26a to surround the areas where the first capacitor 23 and the second capacitor 24 are bonded.
[0040] 12, the first capacitor 23 and the second capacitor 24 are arranged on the main surface 26a. Then, the first electrode 23a of the first capacitor 23 is bonded to the pattern wiring 28 with a conductive bonding material 41, and the second electrode 23b of the first capacitor 23 is bonded to the pattern wiring 29 with a conductive bonding material 42. Furthermore, the first electrode 24a of the second capacitor 24 is bonded to the pattern wiring 30 with a conductive bonding material 43, and the second electrode 24b of the second capacitor 24 is bonded to the pattern wiring 31 with a conductive bonding material 44. Through the above steps, the baseband termination circuit 20 of this embodiment is fabricated.
[0041] The effects obtained by the amplifier circuit 1 of this embodiment described above will be described with reference to a comparative example. FIG. 13 is a plan view of a baseband termination circuit 20A according to the comparative example. The baseband termination circuit 20A differs from the baseband termination circuit 20 in the presence or absence of a first resistor 21 and the resistance value of a second resistor 22. The baseband termination circuit 20A does not have a first resistor 21, and the wire bonding pad 27 is formed integrally with the pattern wiring 28. The resistance value of the second resistor 22 is the sum of the resistance value of the second resistor 22 of this embodiment and the resistance value of the first resistor 21. Part (a) of FIG. 14 is a circuit diagram of a baseband termination circuit 20A according to a comparative example. Part (b) of FIG. 14 is a circuit diagram of the baseband termination circuit 20 according to this embodiment.
[0042] In the baseband termination circuit 20A according to the comparative example, the second resistor 22, which has a large resistance value, generates heat, causing a local rise in temperature near the second resistor 22. If the temperature near the second resistor 22 rises excessively, the operation and lifespan of the second resistor 22 are affected.
[0043] In contrast, the baseband termination circuit 20 of this embodiment is provided with a first resistor 21 in addition to the second resistor 22. In this case, the resistance value of the second resistor 22 can be made lower than the resistance value of the second resistor 22 of the comparative example by the amount of the first resistor 21. In other words, compared to when there is only one resistor, the heat generation locations can be dispersed. Therefore, the baseband termination circuit 20 of this embodiment can improve the heat dissipation properties for heat generated in the resistors.
[0044] Additionally, according to the baseband termination circuit 20 of this embodiment, the provision of the first resistor 21 can increase the attenuation rate of the frequency component (arrow A in the figure) passing through the first capacitor 23. When the capacitance value of the first capacitor 23 is smaller than the capacitance value of the second capacitor 24, high frequency components pass through the first capacitor 23. In this case, the provision of the first resistor 21 can increase the attenuation rate in the high frequency band.
[0045] FIG. 15 shows a circuit used in a simulation to verify the effect of the electrical characteristics of the baseband termination circuit. This circuit includes a transistor 18, a baseband termination circuit 20 (or a baseband termination circuit 20A), a capacitor section 71, voltage detection resistors 72a and 72b, and a fundamental frequency matching load 73. The first current terminal of the transistor 18 is connected to a reference potential via the fundamental frequency matching load 73. The capacitor section 71 includes four capacitors 71a, 71b, 71c, and 71d connected in parallel between the first current terminal of the transistor 18 and the reference potential. The capacitors 71a, 71b, 71c, and 71d each have a different capacitance value. In this simulation, the capacitance values of the capacitors 71a, 71b, 71c, and 71d were set to 1000 pF, 8.2 nF, 0.2 nF, and 4.7 nF, respectively. The resistance values of first resistor 21 and second resistor 22 of baseband termination circuit 20 were set to 1 Ω and 2 Ω, respectively, and the resistance value of second resistor 22 of baseband termination circuit 20A was set to 3 Ω. The capacitance values of first capacitor 23 and second capacitor 24 were set to 130 pF and 1500 pF, respectively.
[0046] 16 is a graph showing the simulation results. In FIG. 16, the horizontal axis represents frequency (MHz), and the vertical axis represents the characteristic value S21 when voltage detection resistor 72a is set to port 1 and voltage detection resistor 72b is set to port 2. In the graph, line G1 represents the simulation results for baseband termination circuit 20 of this embodiment, and line G2 represents the simulation results for baseband termination circuit 20A of the comparative example. As shown in the graph, in the high-frequency band of 100 MHz or more, characteristic value S21 of this embodiment is smaller than characteristic value S21 of the comparative example. This indicates that baseband termination circuit 20 of this embodiment has a greater attenuation effect in the high-frequency band than baseband termination circuit 20A of the comparative example.
[0047] As in this embodiment, the resistance value of the first resistor 21 may be smaller than the resistance value of the second resistor 22. High-frequency and low-frequency components flow through the first resistor 21, while only low-frequency components flow through the second resistor 22. Therefore, the amount of current flowing through the first resistor 21 is larger than the amount of current flowing through the second resistor 22. On the other hand, from the perspective of heat dissipation, it is desirable that the amount of heat generated (i.e., power consumption) in the first resistor 21 and the amount of heat generated (i.e., power consumption) in the second resistor 22 are uniform or nearly uniform. By making the resistance value of the first resistor 21 smaller than the resistance value of the second resistor 22, the amount of heat generated in the first resistor 21 and the amount of heat generated in the second resistor 22, which has a smaller current amount than the first resistor 21, can be made nearly uniform.
[0048] As in the present embodiment, the amplifier circuit 1 may include a substrate 26 having a main surface 26a on which the first resistor 21, the second resistor 22, the first capacitor 23, and the second capacitor 24 are provided. On the main surface 26a, the first capacitor 23, the second capacitor 24, or both the first capacitor 23 and the second capacitor 24 may be disposed between the first resistor 21 and the second resistor 22. In this case, a sufficient distance can be provided between the first resistor 21 and the second resistor 22, which effectively distributes heat generation locations and further improves heat dissipation.
[0049] As in the present embodiment, the planar shape of the main surface 26a may be a rectangle that is long in direction D1. The planar shapes of the first resistor 21 and the second resistor 22 may be rectangles that are long in direction D2 intersecting direction D1. In this case, the substrate 26 is prevented from becoming long in direction D1, and a sufficient gap is provided between the first resistor 21 and the second resistor 22, thereby improving heat dissipation.
[0050] As in the present embodiment, the amplifier circuit 1 may include a wire bonding pad 27 provided on the main surface 26a and connected to the first end 21a of the first resistor 21, and a bonding wire (wire 25) connecting the wire bonding pad 27 to a wiring between the amplifier 11 and the output terminal 1b. The first resistor 21 may be disposed between the wire bonding pad 27 and the first capacitor 23. In this case, the wire bonding pad 27 and the first resistor 21 can be efficiently disposed on the main surface 26a.
[0051] As in this embodiment, the first resistor 21 and the second resistor 22 may be film resistors formed on the main surface 26a. This allows the first resistor 21 and the second resistor 22 to be in close contact with the substrate 26, thereby improving heat dissipation compared to using surface-mounted chip resistors.
[0052] [Variations] In the above-described embodiment, the first resistor 21 and the second resistor 22 are thin-film resistors. However, the first resistor and the second resistor may be diffused resistors formed by diffusing impurities into a region including a part of the main surface 26a of the substrate 26 (i.e., from the main surface 26a of the substrate 26 to the interior of the substrate 26). In this case, the substrate 26 is a semiconductor substrate such as a Si substrate. The impurities are n-type impurities such as boron when the substrate 26 is a p-type Si substrate, and p-type impurities such as phosphorus or arsenic when the substrate 26 is an n-type Si substrate. Using a Si substrate for the substrate 26 makes it easier to form the diffused resistors.
[0053] 17, 18, and 19 are diagrams illustrating the fabrication process of a baseband termination circuit 20A according to a modified example. In each of FIGS. 17, 18, and 19, (a) shows a plan view, and (b) shows cross-sectional views along lines XVII-XVII, XVIII-XVIII, and XIX-XIX of (a), respectively. First, as shown in FIG. 17, a substrate 26 having a main surface 26a is prepared. Next, through-holes 26c and 26d penetrating the substrate 26 are formed in the substrate 26. Next, after masking, impurities are injected and diffused from the main surface 26a of the substrate 26 into the interior of the substrate 26, thereby forming the first resistor 21A and the second resistor 22A, which are diffused resistors, on the main surface 26a.
[0054] Next, as shown in FIG. 18 , wire bonding pads 27 and pattern wirings 28, 29, 30, and 31 are formed on the main surface 26a of the substrate 26, for example, by masking and then vapor deposition or sputtering of a conductive material. At this time, portions of wire bonding pad 27 and pattern wiring 28 are formed on the first resistor 21A, and other portions of pattern wiring 28 and pattern wiring 30 are formed on the second resistor 22A. Then, plating is performed to thicken the wire bonding pads 27 and pattern wirings 28, 29, 30, and 31. Vias 32 and 33 are formed by filling through holes 26c and 26d with a conductive material (or by depositing a conductive material on the side surfaces of through holes 26c and 26d). A solder resist is formed on the main surface 26a to surround the areas where the first capacitor 23 and second capacitor 24 are bonded.
[0055] 19, the first capacitor 23 and the second capacitor 24 are arranged on the main surface 26a. Then, the first electrode 23a of the first capacitor 23 is bonded to the pattern wiring 28 with a conductive bonding material 41, and the second electrode 23b of the first capacitor 23 is bonded to the pattern wiring 29 with a conductive bonding material 42. Furthermore, the first electrode 24a of the second capacitor 24 is bonded to the pattern wiring 30 with a conductive bonding material 43, and the second electrode 24b of the second capacitor 24 is bonded to the pattern wiring 31 with a conductive bonding material 44. Through the above steps, the baseband termination circuit 20A of this embodiment is fabricated.
[0056] As in this modification, the first resistor 21A and the second resistor 22A may be diffused resistors formed in a region including a part of the main surface 26a of the substrate 26. As a result, the first resistor 21A and the second resistor 22A are included in the substrate 26, and therefore, heat dissipation can be improved compared to when a surface-mounted chip resistor is used.
[0057] The amplifier circuit according to the present disclosure is not limited to the above-described embodiment and may be modified in various ways. For example, in the above embodiment, the internal output matching circuit 12 is provided on the output side of the amplifier 11 and the internal input matching circuit 13 is provided on the input side of the amplifier 11. However, only one of the internal output matching circuit 12 and the internal input matching circuit 13 may be provided. Furthermore, in the above embodiment, the first capacitor 23 and the second capacitor 24 are multilayer microchip capacitors. However, the first capacitor 23 and the second capacitor 24 may have other forms. Furthermore, in the above embodiment, the first resistor 21 and the second resistor 22 are resistive films. However, the first resistor 21 and the second resistor 22 may have other forms. [Explanation of symbols]
[0058] 1...Amplifier circuit 1a...Input terminal 1b...Output terminal 10...Semiconductor device 11...Amplifier 12...Internal output matching circuit 13...Internal input matching circuit 14...Package 15...Output lead 16...Input lead 18...Transistor 20, 20A...Baseband termination circuit 21,21A…1st resistor 21a...first end 21b…Second end 22,22A…Second resistor 22a...first end 22b…Second end 23...First capacitor 23a...first electrode 23b…Second electrode 24...Second capacitor 24a...1st electrode 24b…Second electrode 25…Wire 26...Base material 26a…main surface 26b...back side 26c, 26d...Through hole 27...Wire bonding pad 28, 29, 30, 31...Pattern wiring 32,33…Beer 34...Metal film 35,41,42,43,44…Conductive bonding material 51...External output matching circuit 52...External input matching circuit 71...Capacitor section 71a, 71b, 71c, 71d...Capacitors 72a, 72b...Voltage detection resistors 73…Fundamental frequency matching load 121, 122, 131, 132...Wire (bonding wire) 123,133...Capacitor 124, 134...Dielectric substrate 125,135...Top electrode 141...Base board 142…frame body D1…direction (first direction) D2…direction (second direction) G1,G2…line N1, N2...nodes
Claims
1. an amplifier that amplifies a high-frequency signal and outputs the amplified high-frequency signal to an output terminal; a first resistor having a first end and a second end, the first end being connected to a wiring between the amplifier and the output terminal; a second resistor having a first end and a second end, the first end connected to the second end of the first resistor; a first capacitor having a first electrode and a second electrode, the first electrode being connected to a node between the second end of the first resistor and the first end of the second resistor, and the second electrode being connected to a reference potential; a second capacitor having a first electrode and a second electrode, the first electrode being connected to the second end of the second resistor and the second electrode being connected to a reference potential; An amplifier circuit comprising:
2. 2. The amplifier circuit according to claim 1, wherein the resistance value of the first resistor is smaller than the resistance value of the second resistor.
3. a substrate having a main surface on which the first resistor, the second resistor, the first capacitor, and the second capacitor are provided; 3. The amplifier circuit according to claim 1, wherein the first capacitor, the second capacitor, or both the first capacitor and the second capacitor are arranged on the main surface between the first resistor and the second resistor.
4. The planar shape of the main surface is a rectangle that is long in a first direction, 4. The amplifier circuit according to claim 3, wherein the first resistor and the second resistor have a planar shape that is a rectangle that is long in a second direction that intersects with the first direction.
5. a wire bonding pad provided on the main surface and connected to the first end of the first resistor; a bonding wire connecting the wire bonding pad to the wiring; Equipped with 4. The amplifier circuit of claim 3, wherein the first resistor is disposed between the wire bonding pad and the first capacitor.
6. a substrate having a main surface on which the first resistor, the second resistor, the first capacitor, and the second capacitor are provided; 3. The amplifier circuit according to claim 1, wherein the first resistor and the second resistor are film resistors formed on the main surface.
7. a substrate having a main surface on which the first resistor, the second resistor, the first capacitor, and the second capacitor are provided; 3. The amplifier circuit according to claim 1, wherein the first resistor and the second resistor are diffused resistors formed on the substrate.
Citation Information
Patent Citations
Packaged RF power transistor having RF bypassing / output matching network
WO2004032188A2