Optical device manufacturing method
By employing separate probing and bonding electrodes on the optical device substrate, the manufacturing method addresses electrode peeling and bonding strength concerns, ensuring reliable EML chip production without increasing parasitic capacitance.
Patent Information
- Application Number
- JP2024085611
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-27
- Publication Date
- 2025-12-09
AI Technical Summary
Conventional EML chip manufacturing methods face challenges in reducing electrode peeling and bonding strength issues due to probing, which is exacerbated by small electrode sizes that are difficult to separate from the bonding area without increasing parasitic capacitance.
The optical device substrate features separate probing and bonding electrodes, with the probing electrode being disconnected during the chipping process, ensuring the bonding electrode surface remains undisturbed and parasitic capacitance is not increased.
This approach effectively reduces electrode peeling and bonding strength issues while maintaining low parasitic capacitance, enhancing the reliability of the optical device manufacturing process.
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Figure 2025178797000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a method for manufacturing an optical device such as an electro-absorption modulator integrated laser diode (EML) chip. [Background technology]
[0002] A conventional EML chip integrates an LD (Laser Diode) and an EA (Electro Absorption) modulator (see, for example, Patent Document 1). The surface of the EML chip is provided with electrodes for applying electrical signals to these elements. In normal applications, the EML chip is mounted on a wiring board called a subcarrier, and the electrodes on the surface of the EML chip are connected to the wiring board on the subcarrier by a technique called wire bonding. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2018-14473 Summary of the Invention [Problem to be solved by the invention]
[0004] When conducting electrical tests on EML chips, a method called probing is used, in which sharp needle-like probes are pressed directly against the electrodes to connect them. This method allows the characteristics of each EML chip to be evaluated all at once while they are still in the form of a bar-shaped substrate, before they are cut into individual chips (chipping).
[0005] However, probing creates unevenness on the electrode surface due to the probe needle, which can lead to a decrease in bonding strength or electrode peeling during wire bonding when mounting the EML chip to a subcarrier. This can be avoided by separating the probing area, where the probe needle is pressed against the electrode surface, from the bonding area, where wire bonding is performed. However, the electrodes of EML chips (especially EA modulators) are made as small as possible to reduce parasitic capacitance and increase the device operating speed. Therefore, it is difficult to separate the probing area from the bonding area on EML chip electrodes, which makes it difficult to reduce the occurrence of a decrease in bonding strength or electrode peeling.
[0006] Therefore, in order to solve the above-mentioned problems, the present invention aims to provide an optical device substrate and an optical device manufacturing method that can reduce the occurrence of a decrease in bonding strength and electrode peeling without increasing the parasitic capacitance of the electrode. [Means for solving the problem]
[0007] In order to achieve the above object, the substrate of the optical device according to the present invention does not use one electrode for both probing and bonding, but has two electrodes, one for probing and one for bonding, and is designed so that the electrode for probing is separated when the optical device is cut out from the substrate. Note that, hereinafter, the electrode for bonding is referred to as the "main electrode" and the electrode for probing is referred to as the "test electrode."
[0008] Specifically, the substrate of the optical device of the present invention is a substrate in which a plurality of regions are arranged in which circuit patterns of the optical device and main electrodes connected to the circuit patterns are formed, and is characterized in that an inspection electrode connected to the main electrode formed in one of the regions is formed in another of the regions adjacent to the one of the regions. The inspection electrodes are not connected to the circuit patterns and main electrodes formed in the other regions.
[0009] In addition, the device manufacturing method of the present invention is a device manufacturing method having a formation process of aligning multiple regions on a substrate in which circuit patterns of optical devices and main electrodes connected to the circuit patterns are formed, and is characterized in that in the formation process, inspection electrodes connected to the main electrodes formed in one of the regions are formed in another of the regions adjacent to the one of the regions, and are formed so as not to be connected to the circuit patterns and main electrodes formed in the other of the regions. After the forming step, a cutting step is performed in which the substrate is cut between the regions to cut out a plurality of optical devices.
[0010] Therefore, the optical device of the present invention is an optical device obtained by cutting the substrate between the regions, and is provided with the circuit pattern, the main electrode, and the inspection electrode that is not connected to the circuit pattern and the main electrode.
[0011] This structure prevents the surface of the bonding electrode from becoming uneven due to the probe needle, which can prevent a decrease in bonding strength and electrode peeling. Furthermore, by cutting off the probing electrode when chipping, an increase in parasitic capacitance can be suppressed. Therefore, the present invention can provide an optical device substrate and an optical device manufacturing method that can reduce the occurrence of a decrease in bonding strength and electrode peeling without increasing the parasitic capacitance of the electrodes.
[0012] The above inventions can be combined as much as possible. [Effects of the Invention]
[0013] The present invention can provide an optical device substrate and an optical device manufacturing method that can reduce the occurrence of a decrease in bonding strength and electrode peeling without increasing the parasitic capacitance of the electrodes. [Brief explanation of the drawings]
[0014] [Figure 1]1A and 1B are diagrams illustrating a substrate and an optical device cut out from the substrate according to the present invention. [Figure 2] FIG. 2 is a diagram illustrating a cross section of a substrate according to the present invention. [Figure 3] 1A to 1C are diagrams illustrating a device manufacturing method according to the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0015] The following description of the preferred embodiments of the present invention will be given with reference to the accompanying drawings. The preferred embodiments described below are examples of the present invention, and the present invention is not limited to the preferred embodiments. In this specification and the drawings, components having the same reference numerals are intended to represent the same components.
[0016] 1A is a diagram illustrating a substrate 10 of this embodiment. The substrate 10 is a substrate on which a plurality of regions A are arranged, each region A having a circuit pattern (14, 17a) of an optical device and a main electrode 17 connected to the circuit pattern. A feature of this arrangement is that the inspection electrode 18 connected to the main electrode 17 formed in one area (for example, A1) is formed in another area (for example, A2) adjacent to the one area.
[0017] Here, the substrate 10 is characterized in that the inspection electrodes 18 are not connected to the circuit patterns (14, 17a) and main electrodes 17 formed in other areas (for example, A2).
[0018] In this embodiment, an example in which the optical device is an EML chip will be described. Fig. 2 is a cross-sectional view illustrating the EML chip, taken along line XX' (EA modulator portion) of the substrate 10 in Fig. 1(A). This EML chip has a semi-insulating buried heterostructure (SI-BH) and is composed of an n-type InP substrate layer 11, a core layer 14 including an absorption layer of a multi-quantum well (MQW), a p-type InP overcladding layer 15 doped with Zn or the like, a semi-insulating InP layer 12 doped with an additive (Fe or the like), an insulating film (SiO2, SiN, or the like) 13, a contact electrode layer 16, a pad electrode layer 17a, a main electrode 17, an inspection electrode 18, and wiring 19. This EML chip can be manufactured by a semiconductor manufacturing method in which a thin film lamination process, a lithography process, and an etching process are repeated on the substrate 11.
[0019] The main electrode 17 is connected to the EA waveguide 21 via the pad electrode layer 17a and the contact electrode layer 16. In the state of the substrate 10, the main electrode 17 and the inspection electrode 18 are connected by the wiring 19. That is, the inspection electrode 18 is connected to the EA waveguide 21 via the wiring 19, the main electrode 17, the pad electrode layer 17a, and the contact electrode layer 16. The main electrode 17 is an electrode used for wire bonding. The EA waveguide 21 is configured with the core layer 14 as a waveguide core and the substrate layer 11, the InP semi-insulating layer 12, and the overclad layer 15 as a cladding.
[0020] To function as an optical device, the EA waveguide 21 and the main electrode 17 are placed in the same region (e.g., A1), while the testing electrode 18 is placed in the adjacent region (e.g., A2). The optical device in each region A is tested in this state. That is, when probing, the probe needle is pressed against the testing electrode 18, not the main electrode 17, to evaluate the characteristics of the optical device. The probe needle creates irregularities on the surface of the testing electrode 18, but does not create irregularities on the surface of the main electrode 17.
[0021] After evaluating the characteristics of the optical device, the substrate 10 is cut between the regions A to cut out the optical device 20. For example, the substrate 10 may be diced along the cutting line Z using a high-speed cutter, or if the substrate 10 is made of a single crystal, the substrate 10 may be cleaved along the cutting line Z. By cutting between the regions A, the wiring 19 connecting the main electrode 17 and the testing electrode 18 is also cut, and the main electrode 17 and the testing electrode 18 are separated.
[0022] That is, the optical device 20 is an optical device cut out by cutting the substrate 10 between the regions A, and includes circuit patterns (14, 17a), main electrodes 17, and inspection electrodes 18 (inspection electrodes of adjacent optical devices) that are not connected to these.
[0023] FIG. 3 is a diagram illustrating the device manufacturing method of this embodiment. This device manufacturing method includes a forming step S01 of aligning a plurality of regions A on a substrate 10, in which circuit patterns (14, 17a) of an optical device 20 and main electrodes 17 connected thereto are formed, In the forming step S01, the inspection electrode 18 connected to the main electrode 17 formed in one area (e.g., A1) is formed in another area (e.g., A2) adjacent to the one area, and is formed so as not to be connected to the circuit patterns (14, 17a) and the main electrode 17 in the other area (e.g., A2); After the formation step S01, an evaluation step S02 is performed to evaluate the characteristics of the circuit pattern in each region on the substrate 10 using the inspection electrode 18; and After the evaluation step S02, a cutting step S03 is performed in which the substrate 10 is cut between the regions A to cut out a plurality of optical devices 20. [Explanation of symbols]
[0024] 10: Circuit board 11: Substrate layer 12: Semi-insulating layer 13: Insulating film 14: Core layer 15: Overclad layer 16: Contact electrode layer 17: Main electrode 17a: Contact electrode layer 18: Test electrode 19: Wiring 20: Optical devices 21:EA waveguide
Claims
1. A substrate on which a circuit pattern of an optical device and a plurality of regions on which main electrodes connected to the circuit pattern are formed are aligned, A substrate, characterized in that an inspection electrode connected to the main electrode formed in one of the regions is formed in another of the regions adjacent to the one region.
2. 2. The substrate according to claim 1, wherein the inspection electrodes are not connected to the circuit patterns and the main electrodes formed in the other regions.
3. An optical device obtained by cutting the substrate according to claim 2 between the regions, An optical device comprising the circuit pattern, the main electrode, and the inspection electrode that is not connected to the circuit pattern or the main electrode.
4. 1. A device manufacturing method including a forming step of aligning a plurality of regions on a substrate, each region including a circuit pattern of an optical device and a main electrode connected to the circuit pattern, A device manufacturing method characterized in that, in the forming process, an inspection electrode connected to the main electrode formed in one of the regions is formed in another of the regions adjacent to the one of the regions, and the inspection electrode is formed so as not to be connected to the circuit pattern and the main electrode formed in the other of the regions.
5. 5. The device manufacturing method according to claim 4, wherein after the forming step, a cutting step is performed in which the substrate is cut between the regions to cut out a plurality of optical devices.
Citation Information
Patent Citations
Method for controlling optical transceiver
JP2018014473A