Manufacturing method for semiconductor device

Abstract

To provide a semiconductor device capable of miniaturization or high integration.SOLUTION: A semiconductor device has a first conductor, a second conductor on the first conductor, a first insulator covering the second conductor, a first oxide on the first insulator, and a second oxide on the first oxide. The first oxide and the first insulator are provided with an opening overlapping with at least a part of the first conductor. The second oxide is electrically connected to the first conductor through the opening.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device and a manufacturing method of the semiconductor device. One aspect of the invention relates to a semiconductor wafer, a module, and an electronic device.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, memory device, semiconductor circuit, imaging device and electronic There are cases where the equipment and the like can be said to have a semiconductor device.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. One aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. This concerns the [Background technology]

[0004] The development of integrated circuits (ICs) using semiconductor elements The development and manufacturing of CPUs and memory requires ICs with higher integration density. These ICs are mounted on circuit boards, e.g. Various components are mounted on a printed wiring board and used to construct computers, information terminals, display devices, automobiles, etc. They are used as parts of various electronic devices. Research is also underway into using it in Artificial Intelligence (AI) systems.

[0005] As computers and information terminals, desktop computers, laptop computers, Known examples include laptops, tablet computers, smartphones, and mobile phones.

[0006] Silicon-based semiconductor materials are widely known as semiconductor materials used in semiconductor elements. Another material that has attracted attention is oxide semiconductors.

[0007] Furthermore, a transistor including an oxide semiconductor has a very low leakage current in a non-conducting state. For example, the leakage current of a transistor using an oxide semiconductor is known to be small. A low-power CPU that utilizes this characteristic has been disclosed (see Patent Document 1). ).

[0008] In recent years, with the trend toward smaller and lighter electronic devices, there has been a demand for even higher density integrated circuits. There is also a demand for improved productivity in the manufacture of semiconductor devices including integrated circuits.

[0009] Here, the oxide semiconductor is, for example, a single-component metal such as indium oxide or zinc oxide. Not only oxides but also oxides of multi-component metals are known. Among the multi-component metal oxides, In particular, research on In-Ga-Zn oxide (hereinafter referred to as IGZO) has been actively conducted. It is being done.

[0010] Research on IGZO has revealed that, among oxide semiconductors, it is neither single-crystal nor amorphous, AC (c-axis aligned crystalline) structure and nc (na A noncrystalline structure was found (see Non-Patent Documents 1 to 3). In Non-Patent Documents 1 and 2, oxide semiconductors having a CAAC structure are used. The technology for fabricating a transistor is also disclosed. Even oxide semiconductors with lower crystallinity than those containing SiO2 have minute crystals, as reported in Non-Patent Document 4 and and Non-Patent Document 5.

[0011] Furthermore, transistors using IGZO as the active layer have extremely low off-state current (non-specific (See Patent Document 6.) LSIs and displays that utilize these properties have been reported (non- See Patent Document 7 and Non-Patent Document 8. [Prior art documents] [Patent documents]

[0012] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-257187 [Non-patent literature]

[0013] [Non-Patent Document 1] S. Yamazaki et al., “SID Symposium Digest of Technical Papers”, 2012, volume 43, issue 1, p.183-186 [Non-patent document 2] S. Yamazaki et al., “Japanese Journal of Applied Physics”, 2014, volume 53, Number 4S, p.04ED18-1-04ED18-10 [Non-patent document 3] S. Ito et al., “The Proceedings of AM-FPD'13 Digest of Technical Papers”, 2013, p.151-154 [Non-patent document 4] S. Yamazaki et al., “ECS Journal of Solid State Science and Technology”, 2014, volume 3, issue 9, p.Q3012-Q3022 [Non-Patent Document 5] S. Yamazaki, “ECS Transactions”,2014, volume 64, issue 10, p.155-164 [Non-patent document 6] K. Kato et al., “Japanese Journal of Applied Physics”, 2012, volume 51, p.021201-1-021201-7 [Non-Patent Document 7] S. Matsuda et al., “2015 Symposium on VLSI Technology Digest of Technical Papers”, 2015, p.T216-T217 [Non-patent document 8] S. Amano et al., “SID Symposium Digest of Technical Papers”, 2010, volume 41, issue 1, p.626-629 Summary of the Invention [Problem to be solved by the invention]

[0014] One embodiment of the present invention provides a semiconductor device having good electrical characteristics and a manufacturing method thereof. One embodiment of the present invention is to provide a highly reliable semiconductor device and a manufacturing method thereof. One embodiment of the present invention is a method for fabricating a semiconductor device that can be miniaturized or highly integrated. An object of the present invention is to provide a semiconductor device and a manufacturing method thereof. It is an object of the present invention to provide a semiconductor device with high productivity and a manufacturing method thereof.

[0015] One embodiment of the present invention is to provide a semiconductor device that suppresses fluctuations in electrical characteristics, has stable electrical characteristics, and is reliable. Another object of the present invention is to provide a semiconductor device with improved performance. It is an object of the present invention to provide a semiconductor device that can retain data for a long period of time. Another object of one embodiment of the present invention is to provide a semiconductor device with a high data writing speed. Another object of one embodiment of the present invention is to provide a novel semiconductor device. Let's say.

[0016] An object of one embodiment of the present invention is to provide a semiconductor device with high design freedom. Another object of one embodiment of the present invention is to provide a semiconductor device that can reduce power consumption. This is one of the topics.

[0017] One embodiment of the present invention is to provide a semiconductor device whose manufacturing process is simplified and a manufacturing method thereof. Another object of one embodiment of the present invention is to provide a semiconductor device having a reduced area and One of the objects is to provide a method for manufacturing the above.

[0018] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. It is possible to extract other issues from the drawings, claims, etc. [Means for solving the problem]

[0019] One aspect of the present invention is a method for manufacturing a semiconductor device comprising: a first conductor; a second conductor on the first conductor; and a second conductor. a covering first insulator, a first oxide on the first insulator, and a second oxide on the first oxide; and the first oxide and the first insulator overlap at least a portion of the first conductor. An opening is provided, and the second oxide is a semiconductor that is electrically connected to the first conductor through the opening. It is a conductor device.

[0020] In the above, it is preferable that the end of the second oxide roughly coincides with the end of the first oxide. stomach.

[0021] In the above, the semiconductor device further includes a third conductor and a fourth conductor on the third conductor. a third oxide on the second oxide; a second insulator on the third oxide; and a second insulator. The fourth conductor may be covered with a first insulator and a fifth conductor may be provided on the fourth conductor. The conductor comprises a first insulator, a first oxide, a second oxide, a third oxide, and a second insulator. It is preferable that the third conductor and the fourth conductor overlap with the edge sandwiched therebetween.

[0022] In the above, the first conductor and the third conductor are preferably made of the same material. The second conductor and the fourth conductor are preferably made of the same material.

[0023] In the above, the second conductor preferably includes a metal nitride.

[0024] In the above, the metal nitride is preferably titanium nitride or tantalum nitride.

[0025] One embodiment of the present invention is a method for forming a first conductive film on an insulating surface, forming a second conductive film on the first conductive film, and The second conductive film and the first conductive film are patterned to form the first conductor and the second conductive film. A second conductor is formed on the first conductor, and a third conductor is formed to cover the first conductor and the second conductor. A first insulating film is formed, and the first insulating film is processed so that the second conductor is exposed. forming an insulator, forming a second insulator on the first insulator and the second conductor, and forming a first oxide film on the insulator; and forming at least a first oxide film on the first oxide film and the second insulator. An opening is formed so as to overlap a portion of the conductor, a second oxide film is formed on the first oxide film, and the second oxide film is The oxide film and the first oxide film are patterned to form the first oxide and the second oxide film on the first oxide. A second oxide is formed, and the second oxide is electrically connected to the first conductor through the opening. This is a method for manufacturing a semiconductor device.

[0026] In the above, by patterning the second conductive film and the first conductive film, a third conductive film is further formed. forming a fourth conductor on the conductor and the third conductor, and forming a third oxide film on the second oxide; forming a second insulating film on the third oxide film; and forming a third conductive film on the second insulating film. Then, the third conductive film is patterned to form a fifth conductor, and the second insulating film is patterned. The third oxide film is patterned to form a third insulator. The fifth conductor may be a second insulator, a first oxide, a second oxide, a third oxide, and a third insulator is sandwiched between the third conductor and the fourth conductor, and the third conductor and the fourth conductor overlap. stomach.

[0027] In the above, the second conductive film preferably contains a metal nitride.

[0028] In the above, the metal nitride is preferably titanium nitride or tantalum nitride.

[0029] One aspect of the present invention is a method for manufacturing a semiconductor device comprising: a first conductor; a first insulator on the first conductor; and a second insulator on the first insulator. a first oxide, a second oxide on the first oxide, and a third oxide on the second oxide. a second insulator on the third oxide; a second conductor on the second insulator; a third insulator provided on a side surface of the second conductor; The first oxide and the first insulator have a part of the first conductor and a fourth insulator. An overlapping opening is provided, and the second oxide is electrically connected to the first conductor through the opening. It is a semiconductor device.

[0030] In the above, the side of the second oxide and the side of the third oxide are the side of the first oxide. It is preferable that the surface is flush with the surface of the substrate.

[0031] In the above, the end of the second oxide and the end of the third oxide are the end of the first oxide. It is preferable that the temperature is approximately equal to the temperature.

[0032] In the above, the semiconductor device further includes a third conductor and a fourth oxide. The fourth oxide may be provided between the third oxide and the second insulator, and the third conductor may be , a first insulator, a first oxide, a second oxide, a third oxide, a fourth oxide, and a It is preferable that the second conductor overlaps the second insulator sandwiched between them.

[0033] In the above, the first conductor and the third conductor preferably have the same material.

[0034] In one aspect of the present invention, a first insulating film is formed on a first conductor and a second conductor, and the first A first oxide film is formed on the insulating film, and at least a first forming an opening overlapping a portion of the conductor; and forming a second oxide film on the first oxide film and the first conductor. forming a film on the second oxide film, forming a third oxide film on the second oxide film, and and patterning the first oxide film to form a first oxide, a second oxide on the first oxide, and and forming a third oxide on the second oxide, and forming a first oxide, a second oxide, and a third oxide on the first oxide. forming a second insulating film to cover the oxide; and forming a first conductive film on the second insulating film; The first conductive film and the second insulating film are patterned to form a third conductor and a first insulating film. forming an insulating film to cover the third conductor and the first insulator; forming a fourth insulating film on the third insulating film, and etching the fourth insulating film and the third insulating film; The second insulator is formed on the side of the third conductor and the side of the first insulator by processing. The method for manufacturing a semiconductor device further includes forming a third insulator on the side surface of the second insulator.

[0035] In the above, the third conductor is a first insulating film, a first oxide, a second oxide, a third oxide, Preferably, the second conductor overlaps the first insulator, sandwiching the first insulator therebetween. [Effects of the Invention]

[0036] According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics and a manufacturing method thereof are provided. According to one embodiment of the present invention, a highly reliable semiconductor device and a manufacturing method thereof can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device with high productivity and a manufacturing method thereof can be provided. A semiconductor device and method for fabricating the same may be provided.

[0037] According to one embodiment of the present invention, fluctuations in electrical characteristics are suppressed, stable electrical characteristics are obtained, and reliability is improved. It is possible to provide a semiconductor device with improved reliability. Alternatively, a semiconductor device capable of writing data at a high speed can be provided. A semiconductor device can be provided. Alternatively, a novel semiconductor device can be provided. .

[0038] According to one embodiment of the present invention, a semiconductor device with high design freedom can be provided. A semiconductor device capable of reducing power consumption can be provided.

[0039] According to one embodiment of the present invention, a semiconductor device with a simplified manufacturing process and a manufacturing method thereof are provided. Furthermore, according to one embodiment of the present invention, a semiconductor device with a reduced area and A method of fabrication can be provided.

[0040] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description. The above is self-evident from the description, drawings, claims, etc. From the above descriptions, it is possible to extract other effects. [Brief explanation of the drawings]

[0041] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 2] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 3]1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 4] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 5] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 6] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 7] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 8] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 9] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 10] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 11] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 12] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 13] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 14] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 15] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 16] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 17] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 18] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 19] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 20]1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 21] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 22] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 23] 1A and 1B are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 24] FIG. 1 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 25] 1A and 1B are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 26] 1A and 1B are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 27] FIG. 1 is a circuit diagram of a semiconductor device according to one embodiment of the present invention. [Figure 28] 1A and 1B are a circuit diagram and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 29] FIG. 1 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 30] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 31] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 32] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 33] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 34] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 35] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 36] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 37] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 38]1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 39] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 40] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 41] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 42] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 43] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 44] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 45] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 46] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 47] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 48] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 49] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 50] 1A and 1B are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 51] FIG. 1 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 52] FIG. 1 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 53] FIG. 1 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 54] FIG. 1 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 55] FIG. 1 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 56] FIG. 1 is a circuit diagram illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 57] FIG. 1 is a block diagram illustrating a configuration example of a storage device according to one embodiment of the present invention. [Figure 58] FIG. 1 is a circuit diagram illustrating a configuration example of a memory device according to one embodiment of the present invention. [Figure 59] FIG. 1 is a circuit diagram illustrating a configuration example of a memory device according to one embodiment of the present invention. [Figure 60] FIG. 1 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 61] FIG. 1 is a block diagram illustrating a configuration example of a storage device according to one embodiment of the present invention. [Figure 62] 1A and 1B are a block diagram and a circuit diagram illustrating a configuration example of a memory device of one embodiment of the present invention. [Figure 63] FIG. 1 is a block diagram illustrating a configuration example of a semiconductor device according to one embodiment of the present invention. [Figure 64] 1A to 1C are a block diagram and a circuit diagram illustrating a configuration example of a semiconductor device of one embodiment of the present invention, and a timing chart illustrating an operation example of the semiconductor device. [Figure 65] FIG. 1 is a block diagram illustrating a configuration example of a semiconductor device according to one embodiment of the present invention. [Figure 66] 1A and 1B are a circuit diagram illustrating a configuration example of a semiconductor device of one embodiment of the present invention and a timing chart illustrating an operation example of the semiconductor device. [Figure 67] FIG. 1 is a block diagram showing an example of the configuration of an AI system according to one embodiment of the present invention. [Figure 68] FIG. 1 is a block diagram illustrating an application example of an AI system according to one embodiment of the present invention. [Figure 69] 1 is a schematic perspective view showing an example of the configuration of an IC incorporating an AI system according to one embodiment of the present invention. [Figure 70] 1A to 1C are diagrams illustrating electronic devices according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0042] Hereinafter, embodiments will be described with reference to the drawings. It is possible to implement the invention in various ways without departing from the spirit and scope of the invention. It will be readily apparent to those skilled in the art that various modifications may be made to the mode and details of the present invention. The present invention should not be construed as being limited to the description of the following embodiments.

[0043] Also, in the drawings, the size, thickness of layers, or areas are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown. The figures are merely schematic illustrations, and are not limited to the shapes or values ​​shown in the drawings. During the manufacturing process, layers and resist masks may become unintentionally damaged by etching or other processes. However, in order to make it easier to understand, they may be omitted. In the drawings, the same reference numerals are used to designate the same parts or parts having similar functions. In addition, when referring to the same function, In some cases, the pitch patterns are the same and no particular reference numerals are attached.

[0044] In addition, the invention can be easily understood, especially in top views (also called "plan views") and perspective views. In order to simplify the description, some components may be omitted. The information may be omitted.

[0045] In addition, in this specification and the like, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second" "the" or "third" can be used as appropriate for explanation. The ordinal numbers listed in the specification do not match the ordinal numbers used to identify an aspect of the present invention. There are cases where this happens.

[0046] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used to indicate the position of components. The positional relationship is used for convenience in describing the structure with reference to the drawings. The relationship between the two components changes depending on the direction in which each component is depicted. The terms are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0047] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are both considered to be disclosed in this specification. Therefore, it is not limited to predetermined connection relationships, for example, connection relationships shown in drawings or text. Connections other than those shown in the diagrams or text are also included. Let's say.

[0048] Here, X and Y are the object (for example, a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film, layer, etc.).

[0049] An example of a direct connection between X and Y is a circuit that allows electrical connection between X and Y. The elements that function as When a diode, display element, light-emitting element, load, etc. is not connected between X and Y, and elements (e.g., switches, transistors, capacitors) that allow electrical connection between X and Y. without using any capacitors, inductors, resistors, diodes, display elements, light-emitting elements, loads, etc. In this case, X and Y are connected.

[0050] An example of the case where X and Y are electrically connected is The elements that function as One or more diodes, display elements, light-emitting elements, loads, etc.) are connected between X and Y. The switch has a function to control on / off. A switch can be in a conducting state (ON state) or a non-conducting state (OFF state) and allows current to flow. The switch has the function of controlling whether or not current flows. When X and Y are electrically connected, X This includes the case where Y is directly connected to Y.

[0051] An example of a case where X and Y are functionally connected is when the functional connection between X and Y is possible. Circuits that perform functions (e.g., logic circuits (inverters, NAND circuits, NOR circuits, etc.)), signal Conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits ( Power supply circuits (boost circuits, step-down circuits, etc.), level shifter circuits that change the signal potential level, etc. ), voltage sources, current sources, switching circuits, amplifier circuits (which can increase the signal amplitude or current amount, etc.) circuits, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation One or more circuits (synthesis circuit, memory circuit, control circuit, etc.) can be connected between X and Y. For example, even if another circuit is inserted between X and Y, the signal output from X If a signal is transmitted to Y, then X and Y are considered to be functionally connected. When X and Y are functionally connected, there are cases where X and Y are directly connected and cases where X and Y are functionally connected. This includes the case where Y is electrically connected.

[0052] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain Between the drain electrode and the source terminal A channel forming region is formed between the source and the drain through the channel forming region. In this specification and the like, the channel forming region and refers to the region through which current mainly flows.

[0053] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0054] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is in the on state, the gate electrode overlaps with the semiconductor (the part where current flows). The source (source region or source The distance between the drain electrode and the drain region is called the distance between the In the transistor, the channel length does not necessarily have the same value in all regions. The channel length of a transistor may not be determined to a single value. In the detailed description, the channel length is any one value, the maximum value, in the region where the channel is formed. , the minimum or average value.

[0055] The channel width is, for example, the width of the semiconductor (or transistor) in a top view of the transistor. The area where the gate electrode overlaps with the semiconductor (the part of the semiconductor where current flows when the semiconductor is on). The source and drain face each other in the region where the channel is formed. It is to be noted that in one transistor, the channel width is the same in all regions. In other words, the channel width of a transistor is not fixed to one value. Therefore, in this specification, the channel width refers to the area where the channel is formed. The value is any one of the values, the maximum value, the minimum value, or the average value.

[0056] Depending on the structure of the transistor, the channel in the region where the channel is actually formed may be The effective channel width (hereinafter also referred to as the "effective channel width") of the transistor in a top view is The channel width indicated by the For example, when the gate electrode covers the side surface of the semiconductor, the effective channel width becomes The effect of this may become larger than the channel width of the In a transistor in which the gate electrode covers the side surface of the semiconductor, In this case, the ratio of the channel formation region may be larger than the apparent channel width. , the effective channel width becomes larger.

[0057] In such cases, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known accurately, the effective Channel width is difficult to measure accurately.

[0058] Therefore, in this specification, the apparent channel width is referred to as the "enclosed channel width (SCW:S In addition, in this specification, In this document, when simply referring to channel width, it refers to the enclosed channel width or apparent channel width. In this specification, when simply referred to as a channel width, It may refer to the effective channel width. Note that the channel length, channel width, and effective channel The channel width, apparent channel width, and enclosed channel width can be determined by analyzing cross-sectional TEM images. The value can be determined by, for example,

[0059] The impurities in a semiconductor refer to, for example, anything other than the main component that constitutes the semiconductor. Elements with a concentration of less than 0.1 atomic percent can be considered impurities. The DOS (Density of States) of the semiconductor increases and the crystallinity decreases. When the semiconductor is an oxide semiconductor, the semiconductor properties may be The impurities to be changed include, for example, Group 1 elements, Group 2 elements, Group 13 elements, and Group 14 elements. These include elements, Group 15 elements, and transition metals other than the main components of oxide semiconductors, such as: Examples include hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. In the case of semiconductors, water may also function as an impurity. In some cases, oxygen vacancies may be formed due to the inclusion of impurities. In this case, impurities that change the properties of semiconductors include, for example, oxygen and Group 1 elements excluding hydrogen. , Group 2 elements, Group 13 elements, Group 15 elements, etc.

[0060] In this specification and the like, a silicon oxynitride film is a film containing more oxygen than nitrogen as a component. For example, the oxygen content is preferably 55 atomic % or more and 65 atomic % or less. , nitrogen is 1 atomic % or more and 20 atomic % or less, silicon is 25 atomic % or more and 35 atomic % or less, hydrogen The concentration range of 0.1 atomic % to 10 atomic % is also referred to as nitride oxide. The silicon film has a composition in which the nitrogen content is higher than the oxygen content. Preferably, nitrogen is 55 atomic % or more and 65 atomic % or less, oxygen is 1 atomic % or more and 20 atomic % or less, Silicon concentration is 25 atomic % or more and 35 atomic % or less, and hydrogen concentration is 0.1 atomic % or more and 10 atomic % or less It refers to what is included in the range.

[0061] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer" It may be possible to change the term to

[0062] In addition, in this specification, the term "insulator" may be replaced with "insulating film" or "insulating layer." The term "conductor" can also be replaced with "conductive film" or "conductive layer." The term "semiconductor" can also be replaced with "semiconductor film" or "semiconductor layer." can.

[0063] Furthermore, unless otherwise specified, the transistors described in this specification and the like are field-effect transistors. In addition, unless otherwise specified, the transistors shown in this specification and the like are n Therefore, the threshold voltage (also called "Vth") shall be greater than 0V unless otherwise stated.

[0064] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes cases where the angle is between -5° and 5°. "Almost parallel" means that the two lines are arranged at an angle of between -30° and 30°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. " refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0065] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is not included in the hexagonal crystal system. This shall be the case.

[0066] In this specification, the term "barrier film" refers to a film that prevents impurities such as hydrogen and oxygen from permeating. When the barrier film has conductivity, it is called a conductive barrier film. Sometimes I call.

[0067] In this specification, the term "metal oxide" refers to a metal in a broad sense. Metal oxides are oxides of the following: oxide insulators, oxide conductors (including transparent oxide conductors), ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the active layer of a transistor, the metal Oxides are sometimes called oxide semiconductors. In other words, the transistor can be a transistor including an oxide or an oxide semiconductor.

[0068] (Embodiment 1) <Configuration Example 1 of Semiconductor Device> An example of a semiconductor device including a transistor 200 according to one embodiment of the present invention will be described below. explain.

[0069] Note that this embodiment shows an example in which the capacitor 100 is provided in the same layer as the transistor 200. In addition, the capacitor 100 has a structure in which a part of the structure of the transistor 200 is formed. Here is an example of using it as part of a structure that makes up 00:

[0070] In this case, the transistor 200 may be partially or entirely overlapped with the capacitor 100. The total area of ​​the projected area of ​​the transistor 200 and the projected area of ​​the capacitor element 100 is This is preferable because the product can be made smaller.

[0071] However, the present embodiment is not limited to this. 0, for example, an insulating layer provided to cover the transistor 200. The capacitor element 100 may be provided on the body (interlayer film). Alternatively, if a capacitance element is not necessary in terms of the circuit configuration, the capacitance element 100 does not need to be provided.

[0072] 1(A), 1(B), 1(C), and 1(D) show a transistor according to one embodiment of the present invention. 1A and 1B are a top view and a cross section of a transistor 200, a capacitor element 100, and the periphery of the transistor 200; In this specification, one capacitance element and at least one transistor A semiconductor device having the above is called a cell.

[0073] FIG. 1A is a top view of a cell 600 including a transistor 200 and a capacitor 100. 1(B), 1(C), and 1(D) are cross-sectional views of the cell 600. Here, FIG. 1(B) is a cross-sectional view of the portion indicated by the dashed line AB in FIG. 1(A), 1(A) is a cross-sectional view of the transistor 200 in the channel length direction. 1 is a cross-sectional view of a portion indicated by a dashed line CD in the channel width direction of the transistor 200. FIG. 1(D) is also a cross-sectional view of the portion indicated by the dashed line EF in FIG. 1(A). 2, and also shows a cross-sectional view of the connection between the oxide 230 and the conductor 203, the capacitance element 100, etc. In the top view of FIG. 1(A), some elements are omitted for clarity.

[0074] [Cell 600] The semiconductor device of one embodiment of the present invention includes a transistor 200, a capacitor 100, and a semiconductor device having a structure including a semiconductor layer as an interlayer film. The insulator 280 is electrically connected to the transistor 200 and functions as a plug. The conductors 252 (conductor 252a, conductor 252b, conductor 252c, and conductor 252d).

[0075] The conductor 252 is formed in contact with the inner wall of the opening of the insulator 280. The height of the top surface of the conductive body 252 and the height of the top surface of the insulator 280 can be made to be approximately the same. Although the transistor 200 shows a configuration in which the conductor 252 has two layers, the present invention does not For example, the conductor 252 may have a single layer or a laminated structure of three or more layers. Good too.

[0076] [Transistor 200] As shown in FIG. 1, the transistor 200 includes an insulator 2 disposed on a substrate (not shown). 08, an insulator 210, a conductor 203 (conductor 203a, conductor) disposed on the insulator 210, Conductor 203b) and conductor 205 (conductor 205a, conductor 205b), and conductor 203 and an insulator 216 provided between and around the conductors 205; 216, the conductor 203, the insulator 220 arranged on the conductor 205, and the insulator 220 an insulator 222 disposed on the insulator 224; The oxide 230 (oxide 230a, oxide 230b, and oxide 230b) disposed on the oxide 224 230c), an insulator 250 disposed on the oxide 230, and a The conductor 260 (conductor 260a and conductor 260b) is connected to the The insulator 270 and the insulator 271 are disposed, and at least the insulator 250 and the conductive The insulator 272 is disposed on the side of the body 260, and the oxide 230 and the insulator 272 are and an insulator 274 disposed in contact with the

[0077] The insulator 216 is an insulating film disposed to cover the conductor 203 and the conductor 205. Then, the conductors 203 and 205 are polished by using a CMP method or the like until they are exposed. Therefore, the insulator 216, the conductor 203, and the conductor 205 can be formed. , and has excellent surface flatness.

[0078] In addition, the insulator 220, the insulator 222, the insulator 224, and the oxide 230a have openings. The oxide 230b is electrically connected to the conductor 203 through the opening. The oxide 230b and the conductor 203 are connected without the oxide 230a. By doing so, it is possible to reduce the series resistance and contact resistance. As a result, a semiconductor device with good electrical characteristics can be obtained. More specifically, a transistor with improved on-state current can be obtained. A transistor and a semiconductor device using the transistor can be obtained.

[0079] Furthermore, it is preferable that the conductor 203 and the conductor 205 have a laminated structure. The conductors 203b and 205b have a higher acidity than the conductors 203a and 205a. It is preferable to use a material that is resistant to oxidation, that is, a material that has excellent oxidation resistance. By using a material that is resistant to oxidation for the conductor 205b, the shape of the insulating film that becomes the insulator 216 can be reduced. When forming the insulator 216, when forming the insulator 220, when forming the insulator 220, the insulator 222, the insulator During the formation of the openings in the edge 224 and oxide 230a, and the oxide 230b When the oxide is formed, oxidation of the conductor 203 and the conductor 205 can be suppressed. This suppresses an increase in electrical resistance due to oxidation of the conductors 203 and 205. In particular, the oxidation of the upper surface of the conductor 203 is suppressed, so that the conductor 203 and the oxide The contact at 230b is good.

[0080] The conductors 203a and 205a have lower resistance than the conductors 203b and 205b. It is preferable to use a material having a high resistance to the electric current. The conductors 203b and 205b are made of a material having excellent oxidation resistance. Therefore, in the manufacturing process of the transistor 200 or the like, the conductor 203a and the conductor 2 It is possible to suppress the increase in electrical resistance due to oxidation of 05a.

[0081] In the transistor 200, as shown in FIG. 1, the oxide 230a, the oxide 230b, and oxide 230c are stacked, but the present invention is not limited to this. For example, a two-layer structure of oxide 230a and oxide 230b, or a stack of four or more layers, Alternatively, a single layer of oxide 230b alone or a layer of oxide 230b and oxide 230b may be used. Alternatively, the transistor 200 may be configured to include only the conductor 260. 260a and conductor 260b are stacked, the present invention is not limited to this. For example, it may have a single layer structure or a laminated structure of three or more layers.

[0082] Here, an enlarged view of a region 239 in the vicinity of the channel, surrounded by a dashed line in FIG. 1(B), is shown in FIG. Shown below.

[0083] As shown in FIGS. 1B and 2, oxide 230 is a channel-type oxide of transistor 200. region 234 serving as a deposition region and a region serving as a source region or a drain region. Between the region 231 (region 231a and region 231b), the region 232 (region 232a and region 232b) and region 232b). Region 231 functions as a source region or a drain region. is a region with high carrier density and low resistance. It also functions as a channel formation region. The region 234 that functions as a source or drain region is closer to the crystal than the region 231 that functions as a source or drain region. The region 232 is a region with a low carrier density. The region 231 has a lower carrier density than the region 232 that functions as a channel formation region. The region 232 has a higher carrier density than the region 234. That is, the region 232 is a channel forming region. and the junction region between the source region or the drain region. ) functions as a

[0084] A region 231 that functions as a source region or a drain region by providing a junction region; No high resistance region is formed between the region 234 that functions as a channel forming region, and the transistor The on-state current of the transistor can be increased.

[0085] The region 232 also has a region that overlaps with the conductor 260 that functions as a gate electrode. In addition, the area of ​​the region 232 that overlaps with the conductor 260 that functions as a gate electrode is called a In some cases, the region functions as an overlap region (also called Lov region).

[0086] The region 231 is preferably in contact with the insulator 274. The region 231 is also preferably indium and impurity elements such as hydrogen and nitrogen. It is preferably larger than area 232 and area 234 .

[0087] The region 232 has an area overlapping with the insulator 272. The region 232 is made of an insulator such as indium. The concentration of at least one of the metal element and the impurity element such as hydrogen and nitrogen is in the region 23 It is preferable that the number of metal elements such as indium, hydrogen, and It is preferable that the concentration of at least one of the impurity elements such as nitrogen is lower than that of the region 231. stomach.

[0088] The region 234 overlaps with the conductor 260. The region 234 overlaps with the region 232a and the region 23 2b, and metal elements such as indium, hydrogen, and nitrogen are The concentration of at least one of the impurity elements is lower than that of the region 231 and the region 232. preferable.

[0089] In addition, in the oxide 230, the boundaries between the region 231, the region 232, and the region 234 are clearly defined. In some cases, metal elements such as indium and water may not be detected in each region. The concentration of impurity elements such as silicon and nitrogen is not limited to a stepwise change in each region, but is However, it may be changed continuously (also called gradation). The closer to the region 232 and the region 234, the more metal elements such as indium and water are present. It is sufficient that the concentrations of impurity elements such as silicon and nitrogen are reduced.

[0090] In addition, in FIG. 1B and FIG. 2, the region 234, the region 231, and the region 232 are oxidized. These regions may be formed in, but not limited to, oxide The oxide 230a or oxide 230c may also be formed. Although the field is shown as being approximately perpendicular to the top surface of the oxide 230, this embodiment is not limited to this. For example, the region 232 is not formed on the conductor 260 side near the surface of the oxide 230b. In the vicinity of the lower surface of the oxide 230b, the conductor 252a side or the conductor 252b side The shape may recede.

[0091] In the transistor 200, the oxide 230 is a metal oxide that functions as an oxide semiconductor. It is preferable to use an oxide (hereinafter also referred to as an oxide semiconductor). A transistor has an extremely small leakage current (off-state current) when it is off, so it has low power consumption. In addition, the oxide semiconductor can be deposited by a sputtering method or the like. Therefore, it can be used for transistors that constitute highly integrated semiconductor devices. .

[0092] On the other hand, in a transistor using an oxide semiconductor, impurities and oxygen vacancies in the oxide semiconductor Therefore, the electrical characteristics are likely to fluctuate, and reliability may be reduced. The hydrogen contained in the body reacts with oxygen that bonds with metal atoms to form water, creating oxygen vacancies. When hydrogen enters the oxygen vacancy, electrons acting as carriers are generated. Therefore, a transistor using an oxide semiconductor having oxygen vacancies in the channel formation region is The transistor tends to be normally on. Therefore, oxygen vacancies in the channel formation region is preferably reduced as much as possible.

[0093] In particular, the region 234 in the oxide 230 where the channel is formed and the region 234 which functions as a gate insulating film If oxygen vacancies exist at the interface with the insulator 250, which functions as a dielectric, fluctuations in electrical properties are likely to occur. Also, reliability may be reduced.

[0094] Therefore, the insulator 250 overlapping the region 234 of the oxide 230 is an oxide having a stoichiometric composition. It is preferable that the insulator 250 contains more oxygen than the element (also called excess oxygen). The excess oxygen in the region 234 diffuses into the region 234, thereby reducing the oxygen vacancies in the region 234. It is possible.

[0095] It is also preferable to provide an insulator 272 in contact with the insulator 250. For example, 72 has a function of suppressing at least one diffusion of oxygen (e.g., oxygen atoms, oxygen molecules, etc.). It is preferable that the insulator 272 has a thickness of 0.01 mm (the oxygen is less likely to permeate). By having the function of controlling the oxygen concentration, the oxygen in the excess oxygen region does not diffuse to the insulator 274 side, Therefore, at the interface between the oxide 230 and the insulator 250, This suppresses the formation of oxygen vacancies in the semiconductor layer, thereby improving the reliability of the transistor 200. .

[0096] Furthermore, the transistor 200 has a barrier property that prevents the intrusion of impurities such as water or hydrogen. It is preferable that the insulating material is covered with an insulating material having a barrier property. molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), copper atoms Insulating material that has the function of suppressing the diffusion of impurities such as electrons (the impurities mentioned above are difficult to penetrate) It is an insulator using at least one of oxygen (for example, oxygen atoms, oxygen molecules, etc.). It is preferable to use an insulating material that has a function of suppressing the diffusion of oxygen (i.e., that is difficult for the oxygen to permeate). I wish.

[0097] The following describes a detailed configuration of a semiconductor device including a transistor 200 according to one embodiment of the present invention. We will explain about this.

[0098] In the transistor 200, the conductor 260 may function as a first gate electrode. In addition, the conductor 205 may function as a second gate electrode. The potential applied to the conductor 205 is not linked to the potential applied to the conductor 260 but is independent of it. By varying the voltage, the threshold voltage of the transistor 200 can be controlled. Applying a negative potential to the conductor 205 reduces the threshold voltage of the transistor 200 to 0. V, it is possible to reduce the off-state current. This can reduce the drain current when the applied voltage is 0V.

[0099] The conductor 205, which functions as the second gate electrode, overlaps the oxide 230 and the conductor 260. Arrange them as shown.

[0100] Here, the conductor 205 has a length in the channel width direction that is larger than the region 234 in the oxide 230. In particular, the conductor 205 is formed so that the thickness of the conductor 205 is large. 234 extends in the region outside the end portion where it intersects with the channel width direction. That is, the conductor 205 is preferably formed on the side surface of the oxide 230 in the channel width direction. and the conductor 260 are preferably overlapped with an insulator interposed therebetween.

[0101] The conductor 203 can be formed in the same process as the conductor 205. The conductor 203 is formed by oxidation. It functions as an electrode or wiring that is electrically connected to the region 231 of the object 230 .

[0102] Insulator 216 is formed between and around conductors 203 and 205. Here, the height of the upper surfaces of the conductors 203 and 205 and the height of the insulator 21 are The height of the top surface of 6 can be made to be about the same.

[0103] Here, the conductor 203b and the conductor 205b are the same as the conductor 203a and the conductor 20 It is preferable to use a conductive material that is less susceptible to oxidation than 5a, i.e., has excellent oxidation resistance. Such conductive materials include metal nitrides such as tantalum nitride and titanium nitride. It is possible.

[0104] By using a material with excellent oxidation resistance for the conductor 203b and the conductor 205b, This can prevent the conductors 203 and 205 from being oxidized and their conductivity from decreasing. In addition, since oxidation of the upper surface of the conductor 203 is suppressed, the oxide 230b and the conductor 203 can be easily separated. Contact with 03 will be good.

[0105] The conductor 203a and the conductor 205a are made of tungsten, copper, or aluminum. It is preferable to use a conductive material containing rubber as a main component. Tungsten was used for the conductive material 205a and the conductive material 205b.

[0106] As shown in FIG. 3, a conductor 209 may be provided to electrically connect to the conductor 205. The conductor 209 has an insulator 212 on top of the insulator 210. In this case, the conductor 209 can be formed so as to be embedded in the opening formed in the insulating layer. a first conductor provided in contact with the side and bottom surfaces of the opening provided in 212; It may also be a laminated structure consisting of a second conductor provided on the first conductor. The conductor 209 is preferably a conductive barrier. Alternatively, the conductor 209 may have a laminated structure of three or more layers. The conductive barrier may be configured to have two or more layers. barrier film that suppresses the permeation of impurities such as silicon, barrier film that suppresses the permeation of oxygen, or One or more barrier films that suppress the permeation of metal components can be selected and provided.

[0107] Alternatively, the conductor 209 may be formed by providing a conductive film consisting of a single layer or two or more layers on the insulator 210. After that, the insulating layer 210 may be formed by using lithography or etching. An insulating film may be formed on the conductor 209 so as to cover the conductor 209, and the insulating film may be formed by a CMP method or an etching method. The insulating material 212 is formed by processing using a chipping method.

[0108] The conductor 209 can function as an electrode or wiring. When the conductive material 209 is used as the second gate electrode of the gate electrode 200, a part of the conductive material 209 is used as the gate wiring. At this time, the conductor 207a and the The conductor 205 is connected to the conductor 207 through the conductor 209. The conductor 207 may be electrically connected to the conductor 203 and the conductor 252d. It can be produced by the same process as the body 205.

[0109] In addition, the conductor 209 is electrically connected to the oxide 230b via the conductor 203. It can function as a source wiring or a drain wiring of the transistor 200. The conductor 209 is electrically connected to elements and wiring located below the insulator 210. It may also be used as an electrode.

[0110] The insulator 210 prevents impurities such as water or hydrogen from entering the transistor from the substrate side. Therefore, the insulator 210 preferably functions as an insulating barrier film that prevents hydrogen atoms from , hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.) Insulation that suppresses the diffusion of impurities such as copper atoms (the impurities mentioned above are difficult to penetrate) Alternatively, it is preferable to use a material containing a small amount of oxygen (for example, oxygen atoms, oxygen molecules, etc.). At least one insulating material that has the function of suppressing the diffusion of oxygen (the material is difficult for the oxygen to permeate) is used. It is preferable that

[0111] For example, it is preferable to use aluminum oxide or silicon nitride as the insulator 210. This prevents impurities such as hydrogen and water from diffusing from the insulator 210 to the transistor side. Alternatively, oxygen contained in the insulator 224 or the like can be prevented from being absorbed by the insulator 210. This can further suppress diffusion toward the substrate side.

[0112] In addition, the insulators 208, 216, and 280, which function as interlayer films, are insulating. It is preferable that the dielectric constant of the interlayer film is lower than that of the substrate 210. By using a material with a low dielectric constant as the interlayer film, The parasitic capacitance occurring between the wirings can be reduced.

[0113] For example, the insulators 208, 216, and 280 functioning as interlayer films , silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide Aluminum, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), titanium oxide Insulators such as trontium (SrTiO3) or (Ba,Sr)TiO3 (BST) These insulators can be used in a single layer or a laminated layer. , bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide Alternatively, these insulating materials may be added. The insulator may be silicon oxide, silicon oxynitride or silicon nitride. Silicon may also be used in a laminated form.

[0114] The insulators 220, 222, and 224 function as gate insulators. do.

[0115] Here, the insulator 224 in contact with the oxide 230 has more oxygen than the stoichiometric composition. It is preferable to use an oxide insulator containing excess oxygen. It is preferable that an element region is formed. The insulator containing such excess oxygen is called an oxide 23. By providing it in contact with O, oxygen vacancies in the oxide 230 are reduced, improving reliability. It is possible.

[0116] As an insulator having an excess oxygen region, specifically, an oxide film in which some oxygen is released by heating is used. It is preferable to use a material that releases oxygen when heated. In the normal desorption spectroscopy (DDS) analysis, The calculated amount of oxygen released is 1.0 x 10 18 atoms / cm 3 More than 3.0x, preferably 10 20 atoms / cm 3 The oxide film is as described above. The surface temperature of the film is 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower. A range is preferred.

[0117] Also, if the insulator 224 has an excess oxygen region, the insulator 222 may be oxygen-resistant (e.g., oxygen The film has a function of suppressing the diffusion of at least one of oxygen atoms, oxygen molecules, etc. (the film has a function of suppressing the diffusion of the oxygen atoms, oxygen molecules, etc.) It is preferable that the

[0118] The insulator 222 has a function of suppressing the diffusion of oxygen, so that the oxygen in the excess oxygen region is absorbed by the insulator 222. It can be efficiently supplied to the oxide 230 without diffusing to the insulator 220 side. , the conductor 205 is prevented from reacting with the oxygen in the excess oxygen region of the insulator 224. It is possible.

[0119] The insulator 222 may be, for example, aluminum oxide, hafnium oxide, or hafnium aluminate. , tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate so-called hi-TiO3 such as (SrTiO3) or (Ba,Sr)TiO3 (BST) It is preferable to use an insulator containing a gh-k material as a single layer or a laminated layer. By using high-k materials as insulators that function as High integration is possible. In particular, aluminum oxide, hafnium oxide, and hafnium oxide It has the function of suppressing the diffusion of impurities such as aluminum and oxygen (the above oxygen It is preferable to use an insulating material that is difficult for light to penetrate. In this case, oxygen is released from the oxide 230 and impurities such as hydrogen are released from the periphery of the transistor 200. It functions as a layer to prevent contamination with pure substances.

[0120] Alternatively, for example, aluminum oxide, bismuth oxide, or germanium oxide may be added to these insulators. Niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, Alternatively, zirconium oxide may be added to these insulators, or these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the insulator.

[0121] The insulator 220 is preferably thermally stable. For example, silicon oxide and Silicon oxide nitride and silicon oxynitride are thermally stable and can be combined with high-k dielectrics. By doing so, it is possible to obtain a laminated structure that is thermally stable and has a high relative dielectric constant.

[0122] The insulators 220, 222, and 224 each have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the same material, and may be made of different materials. In addition, in the transistor 200, the insulator 220, the insulator 222, and the insulator Although the insulator 224 functions as a gate insulator, this embodiment is not limited to this. For example, the gate insulator may include the insulator 220, the insulator 222, and the insulator The edge 224 may have two or one layer.

[0123] The oxide 230 is made up of an oxide 230a, an oxide 230b on the oxide 230a, and an oxide 23 The oxide 230 has a region 231, a region 232, and an oxide 230c on the region 230b. and a region 234. At least a part of the region 231 is in contact with the insulator 274. In addition, at least a part of the region 231 is preferably made of a metal element such as indium. Preferably, the concentration of at least one of , hydrogen, and nitrogen is greater than in region 234 .

[0124] When the transistor 200 is turned on, the region 231a or the region 231b becomes the source region On the other hand, at least a portion of region 234 functions as a channel region. It serves as the region where

[0125] The insulator 220, the insulator 222, the insulator 224, and the oxide 230a have openings. Thus, the region 231 of the oxide 230b is electrically connected to the conductor 203. One of the source and drain of the transistor 200 is covered with an insulator 220, an insulator 222, an insulator The insulating film 224 and the openings in the oxide 230a are electrically connected to the conductor 203. The conductor 203 is connected to one of the source electrode and the drain electrode, or the source electrode. The gate line can function as either a drain line or a drain line.

[0126] As shown in FIGS. 1(A) and 1(D), the oxide 230a and the oxide 230b are insulating. The opening formed in the insulator 220, the insulator 222, the insulator 224, and the oxide 230a is enclosed. In order to include the width of the opening, the width in the EF direction in the area overlapping with the opening is set to be wider than the width of the opening. Therefore, the oxide 230a and the oxide 230b in this region are preferably formed as follows. The width of 30b in the EF direction is determined by the oxide in the region where the channel is formed and the region on the A side. The width of the oxide 230a and the oxide 230b in the CD direction may be wider than that of the oxide 230a and the oxide 230b. By adopting this structure, the oxide 230b and the conductor 203 can be reliably contacted. In addition, the area of ​​the capacitor element 100 can be increased, and the capacitance of the capacitor element 100 can be increased. I'm looking forward to it.

[0127] Here, as shown in FIG. 2, the oxide 230 preferably has a region 232. By using this structure, the on-state current of the transistor 200 is increased and the This can reduce the leakage current (off-state current).

[0128] In addition, by having the oxide 230b on the oxide 230a, the lower portion of the oxide 230a The structure formed on the oxide 230b can suppress the diffusion of impurities into the oxide 230b. In addition, by having the oxide 230b under the oxide 230c, the oxide 230b is formed on the upper surface of the oxide 230c. The structure formed on the other side can suppress the diffusion of impurities into the oxide 230b. do.

[0129] The oxide 230 also has a curved surface between its side and top surfaces. The end of the upper surface and the lower surface are preferably curved (hereinafter also referred to as rounded). For example, the radius of curvature at the end of the oxide 230b is preferably 3 nm or more and 10 nm or less. Preferably, it is 5 nm or more and 6 nm or less.

[0130] The oxide 230 is a metal oxide that functions as an oxide semiconductor (hereinafter, also referred to as an oxide semiconductor). For example, the metal oxide forming the region 234 is preferably an energy It is preferable to use a material with a gap of 2 eV or more, preferably 2.5 eV or more. As shown above, by using metal oxides with a wide energy gap, the off-state current of a transistor can be reduced. can be reduced.

[0131] In this specification and the like, metal oxides containing nitrogen are also referred to as metal oxides. Nitrogen-containing metal oxides are also called metal oxynitrides (met). It may also be called hydroxybenzoxanthate (hydroxybenzoxanthate).

[0132] A transistor using an oxide semiconductor has extremely low leakage current in a non-conducting state. Therefore, a semiconductor device with low power consumption can be provided. Since the film can be formed using the above materials, it can be used for transistors that constitute highly integrated semiconductor devices. can be done.

[0133] For example, the oxide 230 may be an In-M-Zn oxide (wherein the element M is aluminum, gallium, or the like). Aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel Kel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium One or more selected from the group consisting of tungsten, tantalum, magnesium, etc. It is preferable to use a metal oxide such as In-Ga oxide, In-Zn oxide may also be used.

[0134] Region 234 of oxide 230 will now be described.

[0135] The region 234 preferably has a layered structure made of oxides with different atomic ratios of metal atoms. Specifically, when the oxide 230a and the oxide 230b have a stacked structure, In the metal oxide used for the oxide 230a, the atomic ratio of the element M in the constituent elements is The atomic ratio of element M in the constituent elements of the metal oxide used in 230b is greater than that In addition, in the metal oxide used for the oxide 230a, the ratio of element M to In is preferably The atomic ratio is the number of atoms of element M relative to In in the metal oxide used for oxide 230b. In addition, in the metal oxide used for the oxide 230b, the element The atomic ratio of In to M is the same as that of the element M in the metal oxide used for the oxide 230a. The oxide 230c preferably has a larger atomic ratio than the oxide 230. Any metal oxide that can be used for oxide 230a or oxide 230b can be used.

[0136] The oxide 230a may contain, for example, In:Ga:Zn=1:3:4, In:Ga:Zn=1:3 :2, or metal oxides having a composition of In:Ga:Zn=1:1:1 can be used. The oxide 230b may have a composition ratio of, for example, In:Ga:Zn=4:2:3, In:Ga: Metal oxides with a composition of Zn=1:1:1 or In:Ga:Zn=5:1:6 are used. The oxide 230c may contain, for example, In:Ga:Zn=1:3:4, In: Ga:Zn=1:3:2, In:Ga:Zn=4:2:3, or In:Ga:Zn=1 A metal oxide having a composition of 1:1 can be used. The atomic ratio in the formed oxide or the atomic ratio in the sputtering target is shown.

[0137] In particular, the oxide 230a is In:Ga:Zn=1:3:4, and the oxide 230b is In :Ga:Zn=4:2:3, oxide 230c has a composition of In:Ga:Zn=1:3:4 or a combination of metal oxides having In:Ga:Zn=1: 3:4, In:Ga:Zn=4:2:3 as oxide 230b, I as oxide 230c The metal oxide combination having a composition of n:Ga:Zn=1:1:1 is oxide 230b can be sandwiched between oxide 230a and oxide 230c, which have wider energy gaps. At this time, the oxide 230a and the oxide 230c having a wide energy gap are preferably The oxide 230b with a relatively narrow energy gap is called a narrow gap. Regarding wide gap and narrow gap, see [Composition of Metal Oxides]. I will explain.

[0138] Next, regions 231 and 232 of oxide 230 will be described.

[0139] The regions 231 and 232 are formed by applying an indium ion to a metal oxide provided as the oxide 230. These are regions where metal atoms such as ammonium or impurities are added to reduce resistance. , which is at least more conductive than the oxide 230b in region 234. 31 and region 232 may be doped with impurities by, for example, plasma treatment, ionization, etc. ion implantation, in which the ionized source gas is mass-separated and added; Plasma immersion ion implantation, an ion doping method that adds atoms without separating them A dopant containing at least one of a metal element such as indium and an impurity is added by using a method such as a ion beam. Panto can be added.

[0140] That is, in the region 231 and the region 232, the metal such as indium of the oxide 230 By increasing the atomic content, it is possible to increase the electron mobility and reduce the resistance.

[0141] Alternatively, an insulator 274 containing an impurity element is formed in contact with the oxide 230. , region 231, and region 232 may be doped.

[0142] That is, the regions 231 and 232 are formed of elements that form oxygen vacancies or elements that are related to oxygen vacancies. The resistance is reduced by adding elements that can be captured. Typical examples of such elements include Examples of the element include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and rare gases. Representative examples of rare gas elements include helium, neon, argon, krypton, and Therefore, the region 231 and the region 232 are composed of one of the above elements or xenon. A configuration including a plurality of elements may be used.

[0143] Alternatively, the insulator 274 may be used to extract oxygen contained in the regions 231 and 232. When oxygen is extracted, the region 231 and the region 232 are filled with the oxygen. Oxygen vacancies occur. Hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, and chlorine are added to the oxygen vacancies. By capturing titanium, rare gases, etc., the resistance of the regions 231 and 232 becomes low. do.

[0144] The insulator 274 may be formed as a single layer or may have a stacked structure of two or more layers. 74 can be formed by using a CVD method, an ALD method, a sputtering method, etc. The LD method has excellent step coverage, excellent thickness uniformity, and excellent film thickness control. Therefore, it is suitable for forming a film on the step portion formed by the oxide 230 or the conductor 260. After forming an insulator with a thickness of 0.5 nm to 5.0 nm using the LD method, plasma Using the micro-CVD method, an insulator layer of 1.0 nm to 10.0 nm is laminated to form an insulator 274 For example, aluminum oxide or hafnium oxide may be formed by the ALD method. on aluminum or oxides containing aluminum and hafnium (hafnium aluminate) Silicon nitride, silicon nitride oxide, silicon oxynitride formed by plasma CVD method Alternatively, silicon dioxide or silicon dioxide may be deposited to form the insulator 274. A single layer of insulator 274 is formed by forming an insulator having a thickness of 1.0 nm or more and 10.0 nm or less using the method. For example, silicon nitride or silicon oxynitride formed by using the plasma CVD method may be used. The insulator 274 may be silicon, silicon oxynitride, or silicon oxide.

[0145] In addition, in the transistor 200, the region 232 is provided to form a source region and a drain region. A high resistance is formed between the region 231 that functions as an in-region and the region 234 where the channel is formed. Since no region is formed, the on-current and mobility of the transistor can be increased. Furthermore, by providing the region 232, the source region and the drain region can be separated in the channel length direction. Since the drain region and the gate do not overlap, the formation of unnecessary capacitance can be suppressed. Furthermore, by providing the region 232, it is possible to reduce the leakage current when the semiconductor device is not conducting. Cut.

[0146] Therefore, by appropriately selecting the range of the region 232, it is possible to achieve a desired result in accordance with the circuit design. Therefore, a transistor having the above electrical characteristics can be easily provided.

[0147] The insulator 250 functions as a gate insulating film. The insulator 250 is preferably an insulator that releases oxygen when heated. For example, in a thermal desorption spectroscopy (TDS) analysis, , the amount of oxygen released in terms of oxygen atoms is 1.0 × 10 18 atoms / cm 3 Above, I like Or 3.0 x 10 20 atoms / cm 3 The oxide film is as described above. The surface temperature of the membrane during analysis is 100°C or higher and 700°C or lower, or 100°C or higher. A range of 500°C or less is preferred.

[0148] An insulator that releases oxygen when heated is used as the insulator 250 and is attached to the top surface of the oxide 230c. By providing the oxide 230b in this manner, oxygen can be effectively supplied to the region 234 of the oxide 230b. In addition, as with the insulator 224, the concentration of impurities such as water or hydrogen in the insulator 250 is The thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less. It is preferable that:

[0149] The conductor 260 functioning as the first gate electrode is made up of the conductor 260a and the conductor 260b. a and a conductor 260b.

[0150] The conductor 260a is preferably made of titanium nitride or the like. For example, a highly conductive metal such as tungsten can be used.

[0151] Furthermore, a conductor made of a conductive oxide may be provided between the insulator 250 and the conductor 260a. For example, a metal oxide that can be used as oxide 230a or oxide 230b In particular, metal oxides with high conductivity among In-Ga-Zn oxides can be used. The atomic ratio of [In]:[Ga]:[Zn]=4:2:3 to 4.1 and its neighboring values It is preferable to use such a conductor on the insulator 250. The permeation of oxygen into the conductive body 260a is suppressed, and the electrical resistance of the conductive body 260a is prevented from increasing due to oxidation. This can prevent this from happening.

[0152] In addition, the conductive oxide is formed into a film by using a sputtering method, and the insulator 250 By adding oxygen, it is possible to supply oxygen to the oxide 230b. The oxygen vacancies in the region 234 of the film 230 can be reduced.

[0153] An insulator 270 that functions as a barrier film may also be placed on the conductor 260c. The insulator 270 has a function of suppressing the permeation of impurities such as water or hydrogen, and oxygen. It is advisable to use an insulating material, for example, an oxide of one or both of aluminum and hafnium. Insulators containing oxides of aluminum and / or hafnium can be used. Insulators containing oxides of aluminum oxide, hafnium oxide, aluminum and It is preferable to use an oxide containing hafnium (hafnium aluminate). This prevents oxidation of the conductor 260. 0 can prevent impurities such as water or hydrogen from being mixed into the oxide 230. do.

[0154] It is also preferable to place an insulator 271 on the insulator 270, which functions as a hard mask. By providing the insulator 270, the side surface of the conductor 260 is Approximately perpendicular, specifically, the angle between the side surface of the conductor 260 and the surface of the substrate is 75 degrees or more and 100 degrees or less. The angle can be preferably set to 80 degrees or more and 95 degrees or less. By processing, the insulator 272 to be formed next can be formed into a desired shape.

[0155] In addition, the insulator 272, which functions as a barrier film, is formed between the insulator 250, the conductor 260, and the insulating film. It is provided in contact with the side surface of the edge body 270.

[0156] Here, the insulator 272 has a function of suppressing the permeation of impurities such as water or hydrogen, and oxygen. For example, one of aluminum and hafnium or Insulators containing oxides of both aluminum and hafnium can be used. Insulators containing oxides of aluminum or hafnium include aluminum oxide, hafnium oxide, and aluminum nitride. It is preferable to use oxides containing hafnium and hafnium (hafnium aluminate). This prevents oxygen in the insulator 250 from diffusing to the outside. , and inhibits impurities such as hydrogen and water from entering the oxide 230 from the end of the insulator 250, etc. It is possible.

[0157] By providing the insulator 272, permeation of impurities such as water or hydrogen, and oxygen is suppressed. The top and sides of the conductor 260 and the sides of the insulator 250 can be covered with an insulator having a function. This allows impurities such as water or hydrogen to pass through the conductor 260 and the insulator 250. This prevents impurities from being mixed into the oxide 230. Therefore, the insulator 272 It functions as a side barrier to protect the side surfaces of the gate electrode and gate insulating film.

[0158] In addition, transistors are miniaturized, and channel lengths are formed to approximately 10 nm to 30 nm. In this case, the impurity elements contained in the structures provided around the transistor 200 diffuse. The regions 231a and 231b, or the regions 232a and 232b, are electrically There is a risk of electrical continuity.

[0159] Therefore, as shown in this embodiment, by forming the insulator 272, the insulator 250 The conductor 260 is prevented from being contaminated with impurities such as hydrogen and water, and the insulator 250 Therefore, when the first gate voltage is 0V, the oxygen in the Sometimes, the source and drain regions are electrically conductive, either directly or via region 232 or the like. It can prevent it from passing through.

[0160] The insulator 274 includes the insulator 271, the insulator 272, the oxide 230, the insulator 224, etc. Cover and set up.

[0161] The insulator 274 also has the function of suppressing the permeation of impurities such as water or hydrogen, and oxygen. For example, silicon nitride is preferably used as the insulator 274. , silicon nitride oxide, silicon oxynitride, aluminum nitride, aluminum nitride oxide, etc. It is preferable to use aluminum oxide, hafnium oxide, or aluminum The insulating material is laminated on an oxide containing aluminum and hafnium (hafnium aluminate). The insulator 274 may be formed by providing the insulator 274. Oxygen penetrates the insulator 274 and gets mixed in, causing oxygen vacancies in the regions 231a and 231b. By supplying oxygen, it is possible to prevent the carrier density from decreasing. Impurities such as water or hydrogen are mixed in through the region 231a and the region 231b. This can prevent the area from expanding toward the area 234 side.

[0162] In addition, when the region 231 and the region 232 are provided by forming the insulator 274, The insulator 274 is an element that forms an oxygen vacancy in the oxide 230 or an element that forms an oxygen vacancy in the oxide 230. It is preferable to have an element that can be captured by oxygen vacancies. Representative examples of such elements include: Examples of the element include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and rare gases. Representative examples of rare gas elements include helium, neon, argon, krypton, and By using an insulator containing such elements as the insulator 274, The element is added to the oxide 230 to form regions 231 and 233 in the oxide 230. 2 can be formed.

[0163] Alternatively, the insulator 274 may be used to extract oxygen contained in the regions 231 and 232. When oxygen is extracted, the region 231 and the region 232 are filled with the oxygen. Oxygen vacancies occur. Hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, and chlorine are added to the oxygen vacancies. By capturing titanium, rare gases, etc., the resistance of the regions 231 and 232 becomes low. do.

[0164] When the capacitor 100 is provided in the same layer as the transistor 200, an insulator 274 is interposed between the capacitor 100 and the transistor 200. A conductor 1 is placed so as to overlap a region 231 of the oxide 230 which functions as one electrode of the capacitor element. Set 30.

[0165] When the conductor 130 is provided on the insulator 274, the insulator 27 It is preferable to provide an insulator 280 that functions as an interlayer film on the conductive material 130 and the conductive material 130. The insulator 280, like the insulator 224, has a low impurity concentration such as water or hydrogen in the film. It is preferable that the insulator 280 has a laminated structure made of similar insulators. It may also be constructed as such.

[0166] Next, the conductor 252 (conductor 252a, conductor 2 52b, conductor 252c, and conductor 252d. A conductor 252a electrically connected to the oxide 230 is placed in the opening formed in the insulating film 274. The conductor 252b electrically connected to the conductor 130 is disposed in the opening formed in the insulator 280. The openings formed in the insulators 280, 274, 271, and 270 are A conductor 252c is disposed at the opening, and electrically connected to the conductor 260 that functions as the first gate. Insulators 280, 274, 224, 222, and 220 are disposed. A conductive material 205 that functions as a second gate is inserted into an opening formed in the When the conductor 130 is not provided, the conductor 252b is provided as an insulating material. The insulating layer 274 is electrically connected to the oxide 230 through an opening formed in the insulating layer 280 and the insulating layer 274. It should be noted that the conductors 252a, 252b, 252c, and The top surface of body 252d may be flush with the top surface of insulator 280.

[0167] The opening in which the conductor 252b is provided is at least a part of the conductor 203 or an insulating The oxide 230a has a small number of openings in the body 220, the insulator 222, the insulator 224, and the oxide 230a. By providing the wiring so that it overlaps at least partially with the wiring, miniaturization and high integration of the semiconductor device can be realized. This is preferable.

[0168] The conductor 252 can be formed by a damascene method.

[0169] The conductor 252a is connected to one of the source and drain regions of the transistor 200. The conductor 203 is in contact with the region 231a that functions as a transistor 200. The region 231b is adjacent to the other of the source and drain regions. Since the resistance of the conductive material 252a and the region 231b is reduced, the connection between the conductive material 252a and the region 231a and the contact resistance between the conductor 203 and the region 231b, thereby reducing the The on-current can be increased.

[0170] Here, the conductor 252a is in contact with at least the upper surface of the oxide 230, and the oxide 230 In particular, the conductor 252a is preferably in contact with the side surface of the oxide 230 in the channel width direction. On the side that intersects with the direction, it touches both or either of the side C and the side D. In addition, it is preferable that the conductor 252a has a side surface that intersects with the channel length direction of the oxide 230. In this way, the conductor 252a may be configured to contact the side surface of the oxide 23. By configuring the conductor 252a to be in contact with the side surface of the oxide 230 in addition to the top surface of the conductor 252a, and oxide 230 without increasing the contact area of ​​the contact part. This can reduce the contact resistance between the conductor 252a and the oxide 230. The ON current is increased while miniaturizing the source and drain electrodes of the transistor. It is possible.

[0171] FIG. 1D shows a cross section of the connection between the conductor 203 and the oxide 230 and the capacitor element 100. The conductor 130 is preferably wider in the EF direction than the oxide 230. As a result, not only the top surface of the oxide 230 and the conductor 130 but also the side surface of the oxide 230 and the conductor 13 Even at 0, capacitance can be formed and increased.

[0172] The conductors 252 are made up of a first conductor in contact with the inner wall of each opening, and a second conductor further inside. The first conductor and the second conductor may be formed by The height of the upper surface of the body and the height of the upper surface of the insulator 280 can be made to be approximately the same. Although an example in which a two-layer conductor is used as the conductor 252 has been shown, the present invention is not limited to this. The conductor 252 may be formed of a single layer or a laminated film of three or more layers.

[0173] Here, the first conductor used for the conductor 252 is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, or the like. Diffusion of impurities such as atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), copper atoms, etc. It is preferable to use a conductive material that has the function of suppressing diffusion (i.e., the impurities are less likely to permeate). Alternatively, the diffusion of at least one of oxygen (for example, oxygen atoms, oxygen molecules, etc.) is suppressed. It is preferable to use a conductive material that has the function of preventing oxygen from permeating. In this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of the above impurities or oxygen. The function of the oxygen diffusing layer is to suppress the diffusion of any one or all of the oxygen diffusing layers. A conductor having such a function is sometimes called a conductive barrier film.

[0174] The first conductor used in the conductor 252 has a function of suppressing oxygen diffusion, The second conductor used in the conductor 252 may absorb oxygen in the insulator 280 or may be oxidized. This prevents the decrease in conductivity due to oxygen diffusion. Examples of the metal oxide include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and oxide. Therefore, the first conductive material used for the conductor 252 is preferably ruthenium. The conductor 252 may be a single layer or a multilayer of the above-mentioned conductive materials. The first conductor has the function of suppressing the diffusion of impurities such as hydrogen, water, and nitrogen. As a result, impurities such as hydrogen and water are transported from above the insulator 280 through the conductor 252. This can prevent the conductor 25 from being mixed into the transistor 200. Titanium nitride was used as the first conductor used in 2.

[0175] The second conductor used for the conductor 252 may be tungsten, copper, or aluminum. It is preferable to use a conductive material containing rubber as a main component. Tungsten was used as the second conductor used in the present invention.

[0176] In addition, the conductor 252 is in contact with the inner wall of the opening of the insulator 274 and the insulator 280. In addition, an insulator having a function of suppressing the permeation of impurities such as water or hydrogen is provided. Such an insulator can be used for the insulator 270 or the insulator 272. It is preferable to use an insulating material that can withstand high temperatures, such as aluminum oxide. Impurities such as hydrogen and water from the body 280 etc. are mixed into the oxide 230 through the conductor 252. In addition, the insulator can be formed by, for example, an ALD method or a CVD method. By forming a film using the above, it is possible to form a film with good coverage.

[0177] In addition, a conductor 256 that functions as a wiring may be disposed in contact with the upper surface of the conductor 252 . The conductor 256 that functions as wiring is mainly composed of tungsten, copper, or aluminum. It is preferable to use a conductive material that can

[0178] [Capacitor element 100] As shown in FIG. 1, the capacitor 100 has a structure common to that of the transistor 200. In this embodiment, the region 231b provided in the oxide 230 of the transistor 200 In the example of the capacitor 100, at least a part of which functions as one of the electrodes of the capacitor 100, This shows the details.

[0179] The capacitor element 100 includes at least a portion of the region 231b of the oxide 230, an insulating layer on the region 231, and a The insulating body 274 includes a conductor 130 on the insulating body 274. At least a portion of the conductor 130 is It is preferably disposed on top of the insulator 274 so as to overlap the region 231b.

[0180] At least a portion of the region 231b of the oxide 230 functions as one of the electrodes of the capacitor element 100. The conductor 130 functions as the other electrode of the capacitor element 100. 1b functions as one of the source and drain of the transistor 200 and is a capacitance element The insulator 274 functions as a dielectric of the capacitor element 100. do.

[0181] The insulator 280 is preferably provided to cover the insulator 274 and the conductor 130 .

[0182] The conductor 130 is made of a conductive material mainly composed of tungsten, copper, or aluminum. Although not shown, the conductor 130 may have a laminated structure. For example, a laminate of titanium, titanium nitride and the above conductive material may be used.

[0183] The conductor 252b is in contact with the conductor 130, which is one of the electrodes of the capacitor 100. The conductor 252b is connected to the conductors 252a, 252c, and 252d at the same time. Since it is possible to form the semiconductor device, the number of processes can be shortened.

[0184] <Materials for semiconductor devices> The following describes constituent materials that can be used in semiconductor devices.

[0185] <<Substrate>> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate. Examples of insulating substrates include glass substrates, quartz substrates, and sapphire substrates. substrates, stabilized zirconia substrates (yttria-stabilized zirconia substrates, etc.), resin substrates, etc. The semiconductor substrate may be a semiconductor substrate such as silicon or germanium. Plates, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide, acid Compound semiconductor substrates made of zinc oxide and gallium oxide are also available. A semiconductor substrate having an insulator region within the plate, such as SOI (Silicon On Ins Conductive substrates include graphite substrates, metal substrates, alloy substrates, Conductive resin substrates, etc., or substrates with metal nitrides, metal oxides, etc. Furthermore, there are substrates in which a conductor or a semiconductor is provided on an insulating substrate, and semiconductors. A substrate in which a conductor or an insulator is provided on a substrate, a conductive substrate in which a semiconductor or an insulator is provided on a conductive substrate Alternatively, a substrate on which an element is provided may be used. The elements provided on the plate include a capacitance element, a resistance element, a switch element, a light-emitting element, and a memory element. etc.

[0186] A flexible substrate may also be used as the substrate. As a method for providing the transistor, a transistor is formed on a non-flexible substrate, and then the transistor is There is also a method of peeling off the non-flexible substrate and transferring it to a flexible substrate. A release layer may be provided between the plate and the transistor. The substrate may be stretchable. The substrate may also have the property of returning to its original shape when bending or pulling is stopped. Alternatively, the substrate may have a property of not returning to its original shape. m or less, preferably 10 μm or more and 500 μm or less, and more preferably 15 μm or more and 300 μm or less The thickness of the substrate is less than 1 μm. In addition, by making the substrate thinner, it is possible to reduce the weight of the device when using glass, etc. Some materials have elasticity and return to their original shape when bending or pulling is stopped. Therefore, it is necessary to reduce the shock that may be applied to the semiconductor device on the board when it is dropped. That is, a robust semiconductor device can be provided.

[0187] The flexible substrate may be made of, for example, metal, alloy, resin, or glass, or any of these. These fibers can be used as the substrate. A film or foil may also be used. The lower the linear expansion coefficient of a flexible substrate, the more easily it can be used. The flexible substrate is preferably a substrate having a linear expansion coefficient of 1 / 2 mm or less, and thus deformation due to the boundary between the substrate and the flexible substrate is suppressed. The rate is 1×10 -3 / K or less, 5×10 -5 / K or less, or 1×10 -5 / K or less The resin may be, for example, polyester, polyolefin, polyamide, or the like. Examples include nylon, aramid, polyimide, polycarbonate, and acrylic. In particular, aramid has a low linear expansion coefficient and is therefore suitable for use as a flexible substrate.

[0188] <<Insulators>> The insulators include oxides, nitrides, oxynitrides, nitride oxides, and metal oxides that have insulating properties. , metal oxide nitrides, metal nitride oxides, etc.

[0189] Here, the insulator that functions as the gate insulator has By using high-k materials with high dielectric constants, transistor miniaturization and high integration are possible. On the other hand, the insulator that functions as the interlayer film is made of a material with a low relative dielectric constant. By using a film, the parasitic capacitance between wirings can be reduced. The material should be selected according to its function.

[0190] Insulators with high dielectric constants include aluminum oxide, gallium oxide, and hafnium oxide. oxides containing aluminum, zirconium oxide, aluminum and hafnium, oxide nitrides with silicon and hafnium, oxides with silicon and hafnium, silicon Silicon and hafnium-containing oxynitride or silicon and hafnium-containing nitride etc.

[0191] Insulators with low dielectric constants include silicon oxide, silicon oxynitride, and silicon nitride oxide. silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, silicon oxide with added hydrogen and nitrogen, silicon oxide with pores, or resin. .

[0192] In particular, silicon oxide and silicon oxynitride are thermally stable. For example, by combining it with resin, it is possible to create a thermally stable laminated structure with a low dielectric constant. Examples of resins include polyester, polyolefin, polyamide (nylon), , aramid, etc.), polyimide, polycarbonate, or acrylic. For example, silicon oxide and silicon oxynitride can be combined with insulators with high dielectric constants. This makes it possible to obtain a thermally stable laminated structure with a high relative dielectric constant.

[0193] In addition, a transistor using an oxide semiconductor suppresses the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of stabilizing the electrical characteristics of the transistor, can be done.

[0194] Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include porosity. Uron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine , argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium Insulators containing titanium, hafnium or tantalum may be used in a single layer or in a multilayer configuration. Specifically, it is an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide aluminum, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tantalum oxide Metal oxides such as silicon dioxide, silicon nitride oxide, silicon nitride, etc. can be used.

[0195] For example, the insulator 222 and the insulator 210 may be configured to prevent impurities such as hydrogen and oxygen from permeating. Insulators 222 and 21 may be used. 0 uses an insulator containing oxides of one or both of aluminum and hafnium. As an insulator containing oxides of one or both of aluminum and hafnium, Aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium (haf It is preferable to use, for example, ammonium aluminate.

[0196] Examples of the insulators 220, 224, 250, and 271 include: Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Argon, Gallium, Germanium, Yttrium, Zirconium, Lanthanum, Neo Insulators containing zinc, hafnium or tantalum may be used in single or multilayer configurations. Specifically, it is preferable to have silicon oxide, silicon oxynitride, or silicon nitride. It's nice.

[0197] For example, insulator 224 and insulator 250, which function as gate insulators, Aluminum, gallium oxide, hafnium aluminate, or hafnium oxide 30, the silicon contained in the silicon oxide or silicon oxynitride On the other hand, the insulator 224 and the oxide 230 can be prevented from being mixed with each other. In the insulator 250, silicon oxide or silicon oxynitride is in contact with the oxide 230. By using aluminum oxide, gallium oxide, hafnium aluminate, or oxide A trap center is formed at the interface between hafnium nitride and silicon oxide or silicon oxynitride. These trap centers can trap electrons and cause transistor failure. In some cases, the threshold voltage can be shifted in the positive direction.

[0198] For example, the insulator 274 that functions as a dielectric may be silicon oxide, silicon oxynitride, or nitride. Silicon oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide Aluminum, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium oxynitride Hafnium nitride, hafnium aluminate, etc. can be used, and they can be configured as multilayer or single layer. For example, high-k materials such as aluminum oxide and insulating materials such as silicon oxynitride It is preferable to use a laminated structure of materials with high edge strength. The high-k material ensures sufficient capacitance, and the high dielectric strength material ensures high dielectric strength. Since the strength is improved, electrostatic damage to the capacitance element 100 is suppressed, and the reliability of the capacitance element 100 is improved. It can be done.

[0199] The insulators 208, 212, 216, and 280 are insulators with low dielectric constants. For example, the insulator 208, the insulator 212, the insulator 216, and and the insulator 280 is silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride. silicon dioxide doped with fluorine, silicon dioxide doped with carbon, silicon dioxide doped with carbon and nitrogen It is preferable that the material has a silicon oxide layer containing pores, a silicon oxide layer containing pores, or a resin. Alternatively, the insulators 208, 212, 216, and 280 may be made of oxide silicon. Silicon, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine Silicon, carbon-doped silicon oxide, carbon- and nitrogen-doped silicon oxide or vacant It is preferable that the silicon oxide layer has a laminated structure of silicon oxide having holes and a resin. Silicon oxynitride is thermally stable, so when combined with resin, A laminated structure that is stable and has a low dielectric constant can be obtained. Polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate Carbonate or acrylic.

[0200] The insulators 270 and 272 are made of a material that suppresses the permeation of impurities such as hydrogen and oxygen. As the insulators 270 and 272, for example, For example, aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide , gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide metal oxides such as neodymium oxide or tantalum oxide, silicon oxide nitride or silicon nitride Recon or the like can be used.

[0201] <<Conductors>> Conductors include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and titanium. Niobium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Metal elements selected from sulphur, zirconium, beryllium, indium, ruthenium, etc. It is possible to use a material containing one or more of these elements. Highly conductive semiconductors such as silicon, and silicides such as nickel silicide may also be used.

[0202] Alternatively, a plurality of conductive layers made of the above materials may be stacked. Alternatively, a laminated structure may be used in which a material containing a metal element and a conductive material containing oxygen are combined. In addition, a laminated structure combining a material containing the above-mentioned metal element and a conductive material containing nitrogen is also available. Also, the material containing the metal element, the conductive material containing oxygen, and the nitrogen A laminated structure in which a conductive material containing the above is combined may also be used.

[0203] When an oxide is used for the channel formation region of a transistor, The conductor that functions as a conductive material is a combination of the material containing the metal element and a conductive material containing oxygen. In this case, it is preferable to use a laminated structure in which an oxygen-containing conductive material is used as a chalcogenide. It is preferable to provide the conductive material containing oxygen on the channel formation region side. As a result, oxygen released from the conductive material is more easily supplied to the channel formation region.

[0204] In particular, the metal oxide in which the channel is formed is used as a conductor that functions as a gate electrode. It is preferable to use a conductive material containing the metal element and oxygen. Conductive materials containing elements such as titanium nitride and tantalum nitride may also be used. Any conductive material containing nitrogen may be used. Indium tin oxide, tungsten oxide, etc. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide Alternatively, silicon-doped indium tin oxide may be used. Gallium zinc oxide may also be used. By using such a material, a channel is formed. In some cases, the metal oxides surrounding the outer insulating layer can trap hydrogen. It may be possible to capture hydrogen that enters the body, etc.

[0205] Conductor 260, Conductor 205, Conductor 203, Conductor 207, Conductor 209, Conductor 13 0, the conductor 252, and the conductor 256 may be aluminum, chromium, copper, silver, gold, Platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium Niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium Materials containing one or more metal elements selected from the group consisting of ammonium, ammonium, and phosphorus can also be used. semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements, Silicides such as kelsilicide may also be used.

[0206] <<Metal oxides>> The oxide 230 is a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor). It is preferable to use metals that can be used as the oxide 230 according to the present invention. The oxide will be explained.

[0207] The oxide semiconductor preferably contains at least indium or zinc. In addition to these, aluminum, gallium, It is preferable that yttrium or tin is contained. Also, boron, silicon, Titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium , neodymium, hafnium, tantalum, tungsten, magnesium, etc. One or more of these may be included.

[0208] Here, the oxide semiconductor is an In-M-Zn oxide having indium, element M, and zinc. The element M is aluminum, gallium, yttrium, or Other elements that can be used for element M include boron, silicon, and titanium. Iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, Odium, hafnium, tantalum, tungsten, magnesium, etc. However, elements In some cases, M may be a combination of two or more of the above elements.

[0209] In this specification and the like, metal oxides containing nitrogen are also referred to as metal oxides. Nitrogen-containing metal oxides are also called metal oxynitrides (met). It may also be called hydroxybenzoxanthate (hydroxybenzoxanthate).

[0210] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. Examples of crystalline oxide semiconductors include polycrystalline oxide semiconductors and amorphous oxide semiconductors. It is known that:

[0211] It is preferable to use a thin film with high crystallinity as the oxide semiconductor used in the semiconductor of a transistor. Use of the thin film can improve the stability or reliability of the transistor. The thin film may be, for example, a thin film of a single crystal oxide semiconductor or a thin film of a polycrystalline oxide semiconductor. However, thin films of single-crystal oxide semiconductors or polycrystalline oxide semiconductors are also suitable. To form such a thin film on a substrate, a high temperature or laser heating process is required. This increases the cost of the manufacturing process and also reduces throughput.

[0212] In 2009, an In-Ga-Zn oxide with a CAAC structure (called CAAC-IGZO) was developed. The discovery of the compound 'B' has been reported in Non-Patent Document 1 and Non-Patent Document 2. CAAC-IGZO has a c-axis orientation, the grain boundaries are not clearly visible, and it can be grown at low temperatures. It has been reported that it is possible to form a thin film on a substrate using CAAC-IGZO. The resulting transistors have been reported to have excellent electrical properties and reliability.

[0213] In 2013, an In-Ga-Zn oxide with an nc structure (called nc-IGZO) was developed. ) was discovered (see Non-Patent Document 3). Here, nc-IGZO is a microscopic region (for example, a region of 1 nm or more and 3 nm or less) It has been reported that there is no regularity in the crystal orientation between the domains.

[0214] Non-Patent Documents 4 and 5 describe the above CAAC-IGZO, nc-IGZO, and Average crystal size of IGZO thin films with low crystallinity and low crystallinity by electron beam irradiation In the case of a thin film of IGZO with low crystallinity, before the electron beam irradiation, Even in the case of IGZO, crystalline IGZO of about 1 nm has been observed. In this case, completely amorphous structure Furthermore, it has been reported that the presence of IGZO with low crystallinity could not be confirmed. Compared with thin films, CAAC-IGZO thin films and nc-IGZO thin films are more resistant to electron beam irradiation. Therefore, CAAC is a promising semiconductor for transistors. It is preferable to use a thin film of -IGZO or a thin film of nc-IGZO.

[0215] A transistor using an oxide semiconductor has an extremely small leakage current in an off-state. Specifically, the off-state current per 1 μm of the transistor channel width is yA / μm (10 -2 4 A / μm) order is shown in Non-Patent Document 6. For example, oxide semiconductors Low-power CPUs that utilize the low leakage current characteristics of transistors using has been disclosed (see Non-Patent Document 7).

[0216] In addition, the transistor using an oxide semiconductor has a low leakage current. The application of transistors to display devices has been reported (see Non-Patent Document 8). The displayed image changes several tens of times per second. The number is called the refresh rate. The refresh rate is also called the drive frequency. Such high-speed screen switching, which is difficult for the human eye to perceive, can cause eye fatigue. Therefore, the refresh rate of the display device is reduced to improve image quality. It has been proposed to reduce the number of times the screen is rewritten. By driving the display device, it is possible to reduce the power consumption of the display device. This is called Idling Stop (IDS) drive.

[0217] The discovery of the CAAC structure and the nc structure has led to the development of oxide semiconductors with the CAAC structure or the nc structure. The electrical characteristics and reliability of the transistor using the body are improved, and the manufacturing process cost is reduced. This contributes to improving throughput and reducing power consumption. Taking advantage of this property, research into the application of this transistor to display devices and LSIs is underway. are.

[0218] [Metal oxide composition] Hereinafter, a CAC(Cl) compound that can be used in a transistor disclosed in one embodiment of the present invention will be described. This paper explains the structure of the oud-Aligned Composite OS.

[0219] In this specification and the like, CAAC (c-axis aligned crystal ), and CAC (Cloud-Aligned Composite) CAAC represents an example of a crystal structure, and CAC represents an example of a function or material configuration. Represents.

[0220] CAC-OS or CAC-metal oxide is a material that has the function of conductivity in some parts. The material has an insulating function in part and a semiconductor function in the whole. In addition, CAC-OS or CAC-metal oxide is used as the active layer of a transistor. When used in a material, the conductive function is to allow electrons (or holes) to flow as carriers. The insulating function is to prevent the flow of electrons, which act as carriers. By making these functions work in a complementary manner, the switching function (On / Off) The function of making the CAC-OS or CAC-metal oxide In CAC-OS or CAC-metal oxide, the respective functions By separating the two, the functions of both can be maximized.

[0221] In addition, CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. In addition, the conductive region and the insulating region are formed at the nanoparticle level in the material. The conductive and insulating regions may be separated by a thin film. In addition, the conductive area may be observed as a cloud-like connected area with a blurred periphery. This may be the case.

[0222] In addition, in CAC-OS or CAC-metal oxide, the conductive region and the insulating region are The peripheral region is 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. The following sizes may be dispersed in the material:

[0223] In addition, CAC-OS or CAC-metal oxide has different band gaps. For example, CAC-OS or CAC-metal oxidized de is a component with a wide gap due to the insulating region and a component with a narrow gap due to the conductive region. In this configuration, when carriers flow, In the narrow gap component, carriers mainly flow. The component having a wide gap acts complementary to the component having a narrow gap. Carriers also flow into the wide-gap component in conjunction with the component with a wide gap. AC-OS or CAC-metal oxide is placed in the channel formation region of the transistor. When used, the transistor has a high current driving force in the on state, i.e., a large on-current. Furthermore, high field-effect mobility can be obtained.

[0224] That is, CAC-OS or CAC-metal oxide is a matrix composite material. (matrix composite), or metal matrix composite It can also be called a matrix composite.

[0225] [Metal oxide structures] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, for example, CAAC-OS (c-axis alignable oxide semiconductor) gned crystalline oxide semiconductor), polycrystalline nc-OS (nanocrystalline oxide semiconductor) conductor), pseudo-amorphous oxide semiconductor (a-like OS) amorphous oxide semiconductors) and amorphous oxide semiconductors etc.

[0226] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The crystal structure has distortion. The distortion is the area where multiple nanocrystals are connected. In the region, the lattice arrangement is changed between a region with a uniform lattice arrangement and another region with a uniform lattice arrangement. Indicates the point where the direction is changing.

[0227] Nanocrystals are basically hexagonal, but they are not limited to regular hexagonal shapes and may be non-regular hexagonal. The distortion may also have lattice arrangements such as pentagons and heptagons. In CAAC-OS, clear grain boundaries (grain boundaries) are observed even near the strain. It is not possible to confirm the grain boundary (also called grain boundary distortion) due to the distortion of the lattice arrangement. This is because the CAAC-OS has a high solubility in the ab-plane direction. The oxygen atoms are not densely packed, and the bond distance between atoms changes due to the substitution of metal elements. This is thought to be because distortion can be tolerated by, for example, increasing the thickness.

[0228] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter referred to as an In layer) and an element A layered crystal structure in which layers containing M, zinc, and oxygen (hereinafter referred to as (M, Zn) layers) are stacked. It is noted that indium and element M tend to have a layered structure. It is possible, and when the element M in the (M,Zn) layer is replaced with indium, (In,M,Zn) Also, when indium in the In layer is replaced with element M, (In,M ) layer.

[0229] CAAC-OS is an oxide semiconductor with high crystallinity. Since it is not possible to confirm the grain boundaries, the decrease in electron mobility due to the grain boundaries is unlikely to occur. In addition, the crystallinity of oxide semiconductors can be degraded by the inclusion of impurities and the generation of defects. Therefore, CAAC-OS is an oxide with few impurities and defects (such as oxygen vacancies). Therefore, oxide semiconductors with CAAC-OS have stable physical properties. Therefore, an oxide semiconductor having a CAAC-OS is heat-resistant and highly reliable.

[0230] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 3 nm). The nc-OS has periodic atomic arrangement in the nanometer range (nm or less). There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be distinguished from a-like OS or amorphous oxide semiconductor. It may be difficult to distinguish between the two.

[0231] The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. Conductive. A-like OS has voids or low density regions. The OS has lower crystallinity than the nc-OS and CAAC-OS.

[0232] Oxide semiconductors have a variety of structures, each of which has different characteristics. Oxide semiconductors include amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, and nc The compound may have two or more of -OS and CAAC-OS.

[0233] [Transistors with oxide semiconductors] Next, a case where the oxide semiconductor is used in a transistor will be described.

[0234] Note that by using the oxide semiconductor for a transistor, a transistor with high field-effect mobility can be obtained. Furthermore, a highly reliable transistor can be realized. .

[0235] In addition, an oxide semiconductor with low carrier density is preferably used for the transistor. When the carrier density of the oxide semiconductor film is reduced, the impurity concentration in the oxide semiconductor film is In this specification and the like, the impurity concentration is low and the defect level density is low. A low density of recessed levels is called high purity intrinsic or substantially high purity intrinsic. Conductors have a carrier density of 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 Not yet less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 That's all. That's fine.

[0236] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. Therefore, the trap level density may also be low.

[0237] In addition, it takes a long time for the charges trapped in the trap levels of the oxide semiconductor to disappear. Therefore, the trap level density is high. A transistor in which a channel is formed in an oxide semiconductor may have unstable electrical characteristics. do.

[0238] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor is In order to reduce the impurity concentration in the oxide semiconductor, It is also preferable to reduce the impurity concentration in the film in contact with the film. Potassium metal, alkaline earth metal, iron, nickel, silicon, etc.

[0239] [impurities] Here, the influence of each impurity in an oxide semiconductor will be described.

[0240] When oxide semiconductors contain silicon or carbon, which are elements of Group 14, oxide Defect levels are formed in semiconductors. This causes defects in silicon and carbon in oxide semiconductors. The concentration of silicon and carbon near the interface with the oxide semiconductor (Secondary Ion Mass Spectroscopy ( SIMS (Secondary Ion Mass Spectrometry) The resulting concentration is 2 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 at oms / cm 3 The following applies.

[0241] In addition, when an oxide semiconductor contains an alkali metal or alkaline earth metal, defect levels are formed. Therefore, alkali metals or alkaline earth metals A transistor using an oxide semiconductor containing such a compound tends to be normally on. Therefore, the concentration of alkali metal or alkaline earth metal in the oxide semiconductor can be reduced. Specifically, it is preferable to use an alkali metal or alkali metal in an oxide semiconductor obtained by SIMS. The concentration of alkaline earth metals is 1×10 18 atoms / cm 3Less than or equal to 2 x 10 1 6 atoms / cm 3 Do the following:

[0242] In addition, when nitrogen is contained in an oxide semiconductor, electrons that act as carriers are generated, and the carriers The density increases and it becomes easier to make the oxide semiconductor n-type. The transistor using the oxide semiconductor is likely to be normally on. Therefore, it is preferable that the nitrogen content is reduced as much as possible. The degree is 5×10 in SIMS. 19 atoms / cm 3 Less than 5 x 10 1 8 atoms / cm 3 Less than 1×10, more preferably 18 atoms / cm 3 Below, further Preferably 5 x 10 17 atoms / cm 3 The following applies.

[0243] In addition, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the electrons acting as carriers are released. In addition, some of the hydrogen may combine with the oxygen that is bonded to the metal atom, forming a carrier. Therefore, it is necessary to use an oxide semiconductor containing hydrogen. Therefore, hydrogen in the oxide semiconductor It is preferable that the SIM is reduced as much as possible. The hydrogen concentration obtained by S is 1×10 20 atoms / cm 3 Less than 1x1 019 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than, More preferably, 1 × 10 18 atoms / cm 3 Less than.

[0244] To use an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor This allows stable electrical properties to be imparted.

[0245] <Configuration Example 2 of Semiconductor Device> An example of a semiconductor device according to one embodiment of the present invention will be described below with reference to FIG.

[0246] FIG. 4A is a top view of the transistor 201. In addition, FIGS. 4(A) and 4(D) are cross-sectional views of the transistor 201. 2 is a cross-sectional view of a portion indicated by a dashed line AB in the figure, showing a channel length direction of the transistor 200. FIG. 4(C) is also a cross-sectional view of the portion indicated by the dashed line CD in FIG. 4(A). 4(D) is a plan view and a cross-sectional view of the transistor 200 in the channel width direction. 4(A) is a cross-sectional view of the portion indicated by the dashed line EF in FIG. 4(A), and shows the oxide 230 and the conductor 203 and the conductor 252b and the oxide 230. In the top view of FIG. 4(A), some elements are omitted for clarity.

[0247] In the semiconductor device shown in FIG. 4, the semiconductor device shown in <Configuration Example 1 of the Semiconductor Device> The same reference numerals are used to designate structures having the same functions as the structures they constitute.

[0248] The configuration of the transistor 201 will be described below with reference to FIG. Regarding the constituent materials of the transistor 201, see <Configuration Example 1 of the Semiconductor Device> in detail. The materials described in can be used.

[0249] In the transistor 201, a source electrode or a drain electrode is formed on the oxide 230b. A conductor 285 is provided on the conductor 285, which functions as a The conductor 285 is connected to the conductor 203 and the conductor 205, or The same materials as those of the body 260 can be used. In particular, the conductor 285 can be made of tantalum nitride. It is preferable to use tungsten or the like for the insulator 286. The same material as that of the insulator 286 can be used. This can suppress oxidation of the conductor 285 and suppress an increase in the electrical resistance of the conductor 285. It is preferable to use aluminum oxide as the material 286. The channel length is determined by the length between the conductors 285, but the ends of the opposing conductors 285 The channel length of the transistor 201 is unintentionally increased by oxidation. In order to reduce such a problem, the insulator 286 is provided. is preferred.

[0250] As shown in FIG. 4B, the oxide 230b is in contact with the conductor 285, as indicated by the dotted line. The region becomes n-type and becomes a low resistance region. This is because the conductor 285 attracts oxygen from the oxide 230b. This is thought to be due to the fact that oxygen vacancies are generated in the oxide 230b. Impurities present inside or outside the oxide 230b are captured by the oxygen vacancies in the oxide 230b. As a result, the resistance of the region becomes low.

[0251] The low resistance region of oxide 230b is formed by insulating material 220, insulating material 222, insulating material 224, and oxide. The conductive material 203 is electrically connected to the conductive material 203 through an opening provided in the conductive material 230a.

[0252] The oxide 230 is then removed to cover the oxide 230b, the conductor 285, and a portion of the insulator 286. c, oxide 230d, insulator 250, conductor 260, and insulator 270 are provided. The conductor 260 is formed in the AB The width in the CD direction and the length in the CD direction are oxide 230c, oxide 230d, and insulating film 230c. The insulator 270 is smaller than the insulator 250 and the insulator 270. The insulating material 250 covers the top and side surfaces of the conductor 260 and is in contact with the insulating material 250 on the outside of the conductor 260. Since the body 270 is made of a material that inhibits oxygen permeation, the insulation provided in this manner The insulator 270 prevents oxidation of the conductor 260 and prevents an increase in electrical resistance. Cut.

[0253] The oxide 230c can be made of the same material as the oxide 230b. The oxide 230d can be made of the same material as the oxide 230c. c may not be formed.

[0254] In transistor 201, the channel is formed in oxide 230b and oxide 230c. It is formed in a region sandwiched between a pair of conductors 285 or a pair of low resistance regions.

[0255] An insulator 287 and an insulator 288 are formed on the insulator 280. The insulator 287 is It is preferable to use an oxide insulator formed by sputtering. For example, It is preferable to use aluminum, hafnium oxide, or hafnium aluminate. By using such an insulator 287, the surface of the insulator 280 that contacts the insulator 287 Oxygen can be added to the insulator 280 via the insulating layer 280 to make the insulator 280 in an oxygen-rich state. The oxygen supplied to the body 280 is supplied to the oxide 230 .

[0256] Further, as the insulator 287, aluminum oxide, hafnium oxide, or hafnium oxide may be used. By using an insulating material that is difficult for oxygen to permeate, such as laminate, the insulator 224 and The oxygen added to the insulator 280 can be prevented from diffusing upward during film formation. This allows oxygen to be added to the insulator 280 more efficiently.

[0257] Insulator 288 is made of the same material as insulators 208, 216, and 280. It is possible.

[0258] As shown in Figures 4(B), 4(C), and 4(D), the insulator 280, the insulator 287 , and an insulator such as insulator 288 has an opening therein, and a conductor 252 ( Conductor 252a, conductor 252b, conductor 252c, and conductor 252d) are provided. Insulators such as insulator 280, insulator 287, and insulator 288 and conductor 252 are An insulator 289 is provided between them. The insulator 289 is made of the same material as the insulator 270. This allows for the transfer of impurities from the insulator 280 and the upper insulators and conductors to the oxide 230. Prevent contamination.

[0259] Here, the conductor 252a not only contacts the conductor 285 on the oxide 230 but also contacts the conductor 285 on the oxide 230. It is preferable that the oxide 230 is electrically connected to the oxide 230 by contacting the side surface of the oxide 230 as well. The conductor 252a has a side surface on the C side of the oxide 230 that intersects with the channel width direction. It is preferable that the conductor 252a contacts both or one of the side surfaces on the side D. Even if the side surface of the oxide 230 intersecting the channel length direction is in contact with the side surface of side A, In this way, the conductor 252a contacts the side of the oxide 230 in addition to the conductor 285. By adopting this configuration, the upper area of ​​the contact portion between the conductor 252a and the oxide 230 is increased. The contact area of ​​the contact portion is increased without increasing the contact area between the conductor 252a and the oxide 230. This reduces the resistance of the source and drain electrodes of the transistor. The on-current can be increased while miniaturizing the pole.

[0260] FIG. 4D shows the connection between the oxide 230 and the conductor 203, and the connection between the conductor 252b and the oxide. The oxide 230b is a cross section of the insulator 220 and the connection portion with the oxide 230. 222, the insulator 224, and the oxide 230a through the openings. The conductor 252b is also electrically connected to the conductor 252a. Similarly, the structure may be such that the conductor 285 is in contact with the side surface of the oxide 230 as well as the top surface of the conductor 285. .

[0261] As shown in FIGS. 4(A) and 4(D), the oxide 230a and the oxide 230b are insulating. The opening formed in the insulator 220, the insulator 222, the insulator 224, and the oxide 230a is enclosed. In order to include the width of the opening, the width in the EF direction in the area overlapping with the opening is set to be wider than the width of the opening. Therefore, the oxide 230a and the oxide 230b in this region are preferably formed as follows. The width of 30b in the EF direction is determined by the oxide in the region where the channel is formed and the region on the A side. The width of the oxide 230a and the oxide 230b in the CD direction may be wider than that of the oxide 230a and the oxide 230b. By adopting this structure, the oxide 230b and the conductor 203 can be reliably contacted. do.

[0262] <Transistor manufacturing method> Next, a manufacturing method of a semiconductor device including a transistor 200 according to the present invention will be described with reference to FIGS. 5 to 22. In addition, in each of FIGS. 5 to 22, (A) shows a top view. Also, (B) in each figure is a cross-sectional view corresponding to the area indicated by the dashed line AB in (A). Also, (C) in each figure is a cross-sectional view corresponding to the area indicated by the dashed line CD in (A). Also, (D) in each figure is a cross-sectional view corresponding to the part indicated by the dashed line EF in (A). be.

[0263] First, a substrate (not shown) is prepared, and an insulator 208 is formed on the substrate. The film formation of 8 is carried out by sputtering, chemical vapor deposition (CVD), Deposition method, molecular beam epitaxy (MBE) lm Epitaxy method, Pulsed Laser Deposition (PLD) deposition) method or ALD (Atomic Layer Deposition) n) method, etc.

[0264] The CVD method is a plasma CVD (PECVD) method that uses plasma. enhanced CVD method, thermal CVD (TCVD) D) method, and photo-CVD (Photo CVD) method, which uses light. Depending on the source gas, metal CVD (MCVD) and metal organic CVD ( MOCVD (Metal Organic CVD) method.

[0265] The plasma CVD method can produce high-quality films at relatively low temperatures. This is a film formation method that can reduce plasma damage to the processed object because it does not use a plasma. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device These may become charged up by receiving electric charges from the plasma. The accumulated charge can destroy the wiring, electrodes, elements, etc. contained in the semiconductor device. On the other hand, in the case of thermal CVD methods that do not use plasma, such plasma damage does not occur. In addition, the thermal CVD method does not require the use of a metal oxide film, which increases the yield of semiconductor devices. Since no plasma damage occurs inside the film, a film with few defects can be obtained.

[0266] The ALD method is also a film formation method that can reduce plasma damage to the workpiece. In addition, the ALD method does not cause plasma damage during film formation, so films with fewer defects can be produced. Obtained.

[0267] The CVD and ALD methods are film formation methods in which particles emitted from a target are deposited. Unlike the conventional method, this is a film formation method in which a film is formed by a reaction on the surface of the object to be treated. This is a film forming method that is less affected by the shape of the workpiece and has good step coverage. The ALD method has excellent step coverage and thickness uniformity, making it suitable for the production of thin films with high aspect ratios. It is suitable for coating the surface of high openings. However, the ALD method has a relatively low film formation rate. Because the deposition rate is slow, it cannot be used in combination with other deposition methods such as CVD, which has a high deposition rate. In some cases this may be preferable.

[0268] In the CVD and ALD methods, the composition of the resulting film can be controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any desired value. In addition, for example, in the CVD method and the ALD method, it is possible to form a film having a composition. By changing the flow rate ratio of the source gases while When forming a film while changing the flow rate ratio of the source gases, multiple film forming chambers can be used. Compared to forming a film by hand, the time required for film formation is shortened by the time required for transport and pressure adjustment. Therefore, the productivity of the semiconductor device can be increased in some cases.

[0269] In this embodiment, the insulator 208 is formed by depositing silicon oxide by a CVD method.

[0270] Next, the insulator 210 is formed over the insulator 208. In this embodiment, the insulator 210 is Then, an aluminum oxide film is formed by sputtering. For example, a layer structure may be formed by forming an aluminum oxide film by sputtering. Alternatively, a structure may be used in which an aluminum oxide film is formed on an aluminum nitride film by the ALD method. Alternatively, an aluminum oxide film is formed by the ALD method, and then a sputtering method is performed on the aluminum oxide. A structure in which aluminum oxide is formed by a ring method may also be used.

[0271] Next, the conductive film 203A and the conductive film 203B are formed in this order on the insulator 210. The formation of the conductive film 203A and the conductive film 203B can be performed by a sputtering method, a CVD method, an MBE method, a PLD method, or the like. In this embodiment, the conductive film 203A and the conductive film 203B are formed by a deposition method, an ALD method, or the like. Then, a tungsten film is formed by sputtering to form a conductive film 203B. The conductive film 203A is made of tungsten. In addition, a conductor such as aluminum or copper can be used. It is preferable to use a material that is more oxidation-resistant (less susceptible to oxidation) than the conductive film 203A. For example, metal nitrides can be used. Examples of metal nitrides include titanium nitride and nitride. Tantalum or the like can be used.

[0272] Next, a mask 262 is formed on the conductive film 203B by lithography (see FIG. 5). .).

[0273] In the lithography method, first, the resist is exposed to light through a mask. The resist mask is formed by removing or leaving the exposed area using a developer. By etching through the resist mask, a conductor, a semiconductor, an insulator, etc. It can be processed into the desired shape. For example, KrF excimer laser light, ArF excimer Laser light, EUV (Extreme Ultraviolet) light, etc. are used to A resist mask can be formed by exposing the substrate to light. An immersion technique may be used in which the substrate is exposed to a liquid (for example, water). In addition, an electron beam or an ion beam may be used. In this case, the mask is not required. The resist mask can be removed by ashing or other methods. Dry etching process, wet etching process, dry etching process Then, wet etching is performed, or wet etching is performed followed by dry etching. Processing can be performed.

[0274] Moreover, instead of the resist mask, a hard mask made of an insulator or a conductor may be used. When a hard mask is used, an insulating film or a conductive film that will be a hard mask material is formed on the conductive film 203B. Then, a resist mask is formed on the hard mask, and the hard mask material is etched. A hard mask having a desired shape can be formed.

[0275] Next, the conductive film 203A and the conductive film 203B are processed using a mask 262, and a conductor 2 conductor 203a, conductor 203b on conductor 203a, and conductor 205a. and a conductor 205 consisting of a conductor 205b on a conductor 205a is formed (see FIG. 6). .

[0276] This processing can be performed by dry etching or wet etching. The chipping method is suitable for microfabrication.

[0277] The dry etching equipment is a capacitively coupled plasma (CCP) with parallel plate electrodes. Capacitively Coupled Plasma etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency power supply may be applied to one of the electrodes. A configuration in which a plurality of different high frequency power supplies are applied to the electrodes may also be used. Alternatively, a high frequency power supply of the same frequency may be applied to each of the parallel plate electrodes. Alternatively, a high-frequency power supply having a high-density plasma source may be used. Dry etching equipment with a high density plasma source can be used. The device may be, for example, an inductively coupled plasma (ICP) d Plasma etching equipment or the like can be used.

[0278] When a hard mask is used for etching the conductive film 203A and the conductive film 203B, The etching process can be performed after removing the resist mask used to form the hard mask. In the latter case, the resist mask is removed during etching. The hard mask may disappear after etching the conductive film. On the other hand, if the hard mask material does not affect the subsequent process or can be removed by If the hard mask can be used in a suitable manner, it is not necessary to remove the hard mask.

[0279] Next, an insulating film 216A is formed on the insulator 210, the conductor 203, and the conductor 205 ( (See FIG. 7.) The insulating film 216A can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or the like. In this embodiment, the insulating film 216A and the insulating film 216B are Then, silicon oxide is formed by the CVD method.

[0280] Next, a part of the insulating film 216A is removed by CMP treatment, and the conductor 203 and the conductor conductor 205 is exposed, so that the electrical conductors 203 and 205 are The insulator 216 remains around the conductive body. This allows the top surface of the insulator 216 and the conductive body to be flat. A conductive body 203 and a conductive body 205 can be formed (see FIG. 8). The P treatment may remove a portion of the conductor 203b and the conductor 205b.

[0281] Next, the insulator 220 is deposited over the insulator 216, the conductor 203, and the conductor 205. The insulator 220 can be formed by sputtering, CVD, MBE, PLD, or ALD. This can be done using methods such as the

[0282] Next, the insulator 222 is deposited on the insulator 220. The deposition of the insulator 222 is performed by sputtering. The deposition can be carried out by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like.

[0283] In particular, the insulator 222 may contain oxides of one or both of aluminum and hafnium. It is preferable to use an insulator containing aluminum and / or hafnium oxide. Insulators containing aluminum oxide, hafnium oxide, aluminum and hafnium It is preferable to use an oxide containing hafnium (hafnium aluminate). The insulator 22 is preferably formed by the ALD method. The insulator 222 has a barrier property against oxygen, hydrogen, and water. By having a barrier property against the The hydrogen and water that are generated are absorbed into the oxide 230 without diffusing into the inside of the transistor 200. The generation of oxygen vacancies can be suppressed.

[0284] Next, the insulator 224 is deposited on the insulator 222. The deposition of the insulator 224 is carried out by sputtering. This can be done using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like (see Figure 1). See page 9.

[0285] Subsequently, it is preferable to carry out a heat treatment. The heat treatment is preferably carried out at a temperature of 250° C. or higher and 650° C. or lower. The temperature is preferably 300°C or higher and 500°C or lower, more preferably 320°C or higher and 450°C or lower. The first heat treatment is carried out in a nitrogen or inert gas atmosphere, or in an atmosphere containing an oxidizing gas at a concentration of 10 ppm or more. The first heat treatment is carried out in an atmosphere containing 1% or more or 10% or more of HCl. Alternatively, the first heat treatment may be performed in a nitrogen or inert gas atmosphere, followed by desorption. To compensate for the oxygen that has been released, an atmosphere containing oxidizing gases of 10 ppm or more, 1% or more, or 10% or more is used. The heat treatment may be carried out in an atmosphere.

[0286] The heat treatment removes impurities such as hydrogen and water contained in the insulator 224. What can be done?

[0287] Alternatively, the heat treatment may be performed under reduced pressure with a plasma containing oxygen. The plasma processing includes, for example, a power source that generates high density plasma using microwaves. It is preferable to use a device for the substrate. The high density plasma may be used to generate high density oxygen radicals. By applying RF to the substrate side, high density plasma is generated. The oxygen radicals thus obtained can be efficiently guided into the insulator 224. After performing plasma treatment containing an inert gas, a plasma containing oxygen was added to compensate for the oxygen that was desorbed. A plasma treatment may be performed. Note that there are cases where the first heat treatment does not need to be performed.

[0288] The heat treatment is performed after the insulator 220 is formed and after the insulator 222 is formed. The heat treatment can be carried out under the above-mentioned heat treatment conditions. The heat treatment after the film formation is preferably carried out in an atmosphere containing nitrogen.

[0289] In this embodiment, the heat treatment is performed at 400° C. in a nitrogen atmosphere after the insulator 224 is formed. Treat at 37°C for 1 hour.

[0290] Next, an oxide film 230A that will become oxide 230a is formed on the insulator 224.

[0291] The oxide film 230A is formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. This can be done using methods such as the

[0292] For example, when the oxide film 230A is formed by sputtering, the sputtering gas Oxygen or a mixture of oxygen and rare gases is used as the sputtering gas. By increasing the proportion of oxygen in the oxide film, the amount of excess oxygen in the oxide film can be increased. In addition, when the oxide film is formed by sputtering, the In-M-Zn oxide film is A nitride target can be used.

[0293] In particular, when the oxide film 230A is formed, part of the oxygen contained in the sputtering gas is transferred to the insulator 2. 24. The oxide film 230A may be formed by sputtering an oxide film 230A. The proportion of the element may be 70% or more, preferably 80% or more, and more preferably 100%.

[0294] In this embodiment, the oxide film 230A is formed by sputtering In:Ga:Z The oxide film is formed using a target with an atomic ratio of n=1:3:4. By appropriately selecting the ratio of the number of atoms, the oxide 230 can be formed to meet the desired properties. It is good.

[0295] Next, using a lithographic method, insulator 220, insulator 222, insulator 224, and An opening is formed in the oxide film 230A so as to reach the conductor 203. First, a thin film is formed on the oxide film 230A. A mask 263 is formed (see FIG. 9). The mask 263 used to form the opening is a resist. A mask or a hard mask may be used.

[0296] Next, using a mask 263, the insulator 220, the insulator 222, the insulator 224, and the oxide The film 230A is processed to expose the surface of the conductor 203, thereby forming an opening (FIG. 10 (See reference ). This processing can be performed using dry etching or wet etching. The dry etching method is suitable for fine processing. The conductor 222 and the insulator 224 are processed through the oxide film 230A. When exposing a part of the surface of 203, a resist mask or a hard mask is formed on the oxide film 230A. Then, a mask made of an insulator 220, an insulator 222, an insulator 224, and the oxide film 230A is processed. That is, the insulator (insulating No mask is formed on the surfaces of the insulating layer 220, the insulating layer 222, and the insulating layer 224. Therefore, the mask does not adhere to the surface of the insulator that functions as the gate insulating film, and the resist Impurities contained in masks, ingredients contained in hard masks, and chemicals used to remove masks This can prevent contamination and damage to the gate insulating film caused by components contained in the liquid or plasma. By such a process, a method for manufacturing a highly reliable semiconductor device can be provided.

[0297] Next, an oxide film 230B is formed on the oxide film 230A (see FIG. 11). The film 230B is also formed inside the opening and is electrically connected to the conductor 203 through the opening. The oxide 230b and the conductor 203 are connected without the oxide 230a. By doing so, it is possible to reduce the series resistance and contact resistance. As a result, a semiconductor device with good electrical characteristics can be obtained. More specifically, a transistor with improved on-state current can be obtained. A transistor and a semiconductor device using the transistor can be obtained.

[0298] The oxide film 230B is formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. This can be done using methods such as the

[0299] For example, when the oxide film 230B is formed by sputtering, the sputtering gas Oxygen or a mixture of oxygen and rare gases is used as the sputtering gas. By increasing the proportion of oxygen in the oxide film, the amount of excess oxygen in the oxide film can be increased. In addition, when the oxide film is formed by sputtering, the In-M-Zn oxide film is A nitride target can be used.

[0300] When the oxide film 230B is formed by sputtering, oxygen contained in the sputtering gas When the film is formed with the ratio of 1% to 30%, preferably 5% to 20%, oxygen deficiency A transistor using an oxygen-deficient oxide semiconductor is formed. A relatively high field effect mobility is obtained.

[0301] In this embodiment, the oxide film 230B is formed by sputtering In:Ga:Z The film is formed using a target with an atomic ratio of n=4:2:4.1. By selecting the conditions and atomic ratio appropriately, oxide 230 can be formed to suit the desired properties. It is recommended to do so.

[0302] Next, a heat treatment may be carried out. The heat treatment may be carried out under the heat treatment conditions described above. The heat treatment removes impurities such as hydrogen and water from the oxide film 230A and the oxide film 230B. In this embodiment, the wafer is heated at 400° C. in a nitrogen atmosphere. After the treatment for 1 hour, the sample was treated in an oxygen atmosphere at 400°C for 1 hour. cormorant.

[0303] Next, the oxide film 230A and the oxide film 230B are processed into islands to form oxides 230a and An oxide 230b is formed (see FIG. 12).

[0304] As shown in FIGS. 12(A) and 12(D), the insulating layer 230a and the insulating layer 230b are The openings formed in the edge 220, the insulator 222, the insulator 224, and the oxide 230a overlap. It is preferable that the width of the region in the EF direction is wider than the width of the opening. Therefore, the width of the oxide 230a and the oxide 230b in the EF direction in this region is The oxide 230a and the oxide 230b in the region where the channel is formed and the region on the A side are In some cases, the width of oxide 2 is wider than the width of oxide 2 in the CD direction. The contact between the conductor 203 and the capacitor element 100 can be ensured. The area can be increased, and the capacitance of the capacitor element 100 can be expected to increase.

[0305] In the above process, the insulator 224 may be processed into an island shape. Half etching may be performed on the insulator 224. By performing this process, the insulator 224 is formed under the oxide 230c to be formed in a later process. The insulator 224 is formed in an island shape when the insulating film 272A is processed in a later step. In this case, the insulator 222 can be used as an etching stopper film. Good too.

[0306] Here, the oxide 230a and the oxide 230b are at least partially overlapped with the conductor 205. The side surfaces of the oxide 230a and the oxide 230b are formed so as to be insulated from the insulator 2. The oxide 230a and the oxide 230b are preferably substantially perpendicular to the oxide 230a. The side surface is approximately perpendicular to the insulator 222, so that a plurality of transistors 200 are provided. When the oxide 230a and the oxide 230 are formed, the area can be reduced and the density can be increased. The angle between the side surface of b and the top surface of the insulator 222 may be an acute angle. The larger the angle between the side surface of the oxide 230a and the top surface of the insulator 222, the better. I wish.

[0307] In addition, between the side surfaces of the oxide 230a and oxide 230b and the top surface of the oxide 230b , and has a curved surface. In other words, the end of the side surface and the end of the top surface are preferably curved ( The curved surface may be, for example, oxide 230a and oxide 230b. At the end of b, the radius of curvature is 3 nm or more and 10 nm or less, preferably 5 nm or more and 6 nm or less. It is preferable to set it to m or less.

[0308] In addition, since the edge does not have sharp edges, the film coverage in the subsequent film formation process is improved.

[0309] The oxide film may be processed by lithography. The etching method and the wet etching method can be used. The processing is suitable for microfabrication.

[0310] In the lithography method, first, the resist is exposed to light through a mask. The resist mask is formed by removing or leaving the exposed area using a developer. By etching through the resist mask, a conductor, a semiconductor, an insulator, etc. It can be processed into the desired shape. For example, KrF excimer laser light, ArF excimer Laser light, EUV (Extreme Ultraviolet) light, etc. are used to A resist mask can be formed by exposing the substrate to light. An immersion technique may be used in which the substrate is exposed to a liquid (for example, water). In addition, an electron beam or an ion beam may be used. In this case, the mask is not required. The resist mask can be removed by ashing or other methods. Dry etching process, wet etching process, dry etching process Then, wet etching is performed, or wet etching is performed followed by dry etching. Processing can be performed.

[0311] Moreover, instead of the resist mask, a hard mask made of an insulator or a conductor may be used. When a hard mask is used, an insulating film or a conductive film that will be a hard mask material is formed on the oxide film 230B. Then, a resist mask is formed on the hard mask, and the hard mask material is etched. A hard mask having a desired shape can be formed. The etching of 0B may be performed after removing the resist mask, or after removing the resist mask. In the latter case, the resist mask may be removed during etching. After etching the oxide film, the hard mask may be removed by etching. On the other hand, if the hard mask material does not affect the subsequent process or can be used in the subsequent process, There is no need to remove the hard mask.

[0312] The dry etching equipment is a capacitively coupled plasma (CCP) with parallel plate electrodes. Capacitively Coupled Plasma etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency power supply may be applied to one of the electrodes. A configuration in which a plurality of different high frequency power supplies are applied to the electrodes may also be used. Alternatively, a high frequency power supply of the same frequency may be applied to each of the parallel plate electrodes. Alternatively, a high-frequency power supply having a high-density plasma source may be used. Dry etching equipment with a high density plasma source can be used. The device may be, for example, an inductively coupled plasma (ICP) d Plasma etching equipment or the like can be used.

[0313] Furthermore, by carrying out the above-mentioned dry etching or other treatment, the etching gas or the like can be prevented from The impurities adhere to or are deposited on the surface or inside of the oxide 230a and the oxide 230b. Impurities can be, for example, fluorine or chlorine.

[0314] In order to remove the above impurities, cleaning is performed. There are wet cleaning, plasma treatment using plasma, and cleaning by heat treatment. The above cleaning steps may be combined as appropriate.

[0315] For wet cleaning, oxalic acid, phosphoric acid, or hydrofluoric acid is used with carbonated water or pure water. The cleaning process may be carried out using a diluted aqueous solution. Alternatively, the cleaning process may be carried out using pure water or carbonated water. In this embodiment, ultrasonic cleaning is performed using pure water or carbonated water. cormorant.

[0316] Subsequently, a heat treatment may be carried out. The heat treatment conditions may be the same as those described above. This can be done.

[0317] Next, an oxide film 230C, an oxide film 230D, and an oxide film 230E are formed on the insulator 224, the oxide 230A, and the oxide 230B. The insulating film 250A, the conductive film 260A, the conductive film 260B, the insulating film 270A, and the insulating film 27 1A are deposited in order (see FIG. 13).

[0318] The oxide film 230C is formed by sputtering, CVD, MBE, PLD or ALD. The oxide film 23 can be formed by the method described above according to the desired properties of the oxide 230c. The oxide film 230C may be formed using the same film forming method as the oxide film 230A or the oxide film 230B. In this embodiment, the oxide film 230C is formed by sputtering In:Ga The film is formed using a target with an atomic ratio of Zn=1:3:4.

[0319] The insulating film 250A can be formed by a method such as a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. The film can be formed using the above.

[0320] In addition, oxygen is excited by microwaves to generate high-density oxygen plasma, and the oxygen plasma By exposing the insulating film 250A, the insulating film 250A, the oxide 230a, the oxide 230b, and Oxygen can be introduced into the oxide film 230C.

[0321] Heat treatment may also be performed. The heat treatment may be performed under the above-mentioned heat treatment conditions. The heat treatment can reduce the moisture concentration and hydrogen concentration of the insulating film 250A. Cut.

[0322] The conductive film 260A can be formed by a method such as a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, the conductive film 260A can be formed by sputtering. Titanium nitride was formed using a coating method.

[0323] The conductive film 260B can be formed by sputtering, CVD, MBE, PLD or AL. The conductive film 260B can be formed by using a low-resistance metal film. By doing so, a transistor with a low driving voltage can be provided. The conductive film 260B was formed of tungsten by sputtering.

[0324] Furthermore, a conductor may be further provided between the insulating film 250A and the conductive film 260A. is formed by sputtering, CVD, MBE, PLD, ALD, etc. Here, for example, an oxide semiconductor that can be used as the oxide 230 can be used. The body becomes a conductive oxide by performing a resistance reducing treatment. Alternatively, a film of an oxide that can be used as an insulating material may be formed and the resistance of the oxide may be reduced in a later process. An oxide that can be used as the oxide 230 is applied to the insulating film 250A in an oxygen-containing atmosphere. In the above, oxygen is added to the insulating film 250A by forming the film using a sputtering method. By adding oxygen to the insulating film 250A, the added oxygen can be Oxygen can be supplied to the oxide 230 via 0A.

[0325] Subsequently, a heat treatment can be carried out. The heat treatment can be carried out under the above-mentioned heat treatment conditions. Note that the heat treatment may not be performed in some cases. The treatment is carried out at 400°C for 1 hour.

[0326] The insulating film 270A can be formed by a method such as a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. The insulating film 270A functions as a barrier film, so it is possible to form the film using a material such as a silicon dioxide. Alternatively, an insulating material that has the function of suppressing the permeation of impurities such as hydrogen and oxygen is used. For example, aluminum oxide, hafnium oxide, or hafnium aluminate may be used. This can prevent oxidation of the conductor 260. Impurities such as water or hydrogen are mixed into the oxide 230 through the body 260 and the insulator 250. This can prevent this from happening.

[0327] The insulating film 271A is formed by a method such as a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. Here, the thickness of the insulating film 271A is determined by the thickness of the insulating film formed in a later step. It is preferable that the thickness of the insulating film 272A is thicker than that of the insulating film 272B to be formed later. When forming 72, the insulator 271 can be easily left on the conductor 260. .

[0328] The insulator 271 also functions as a hard mask. The side of the edge 250, the side of the conductor 260a, the side of the conductor 260b, and the side of the conductor 260c The surface and the side surface of the insulator 270 can be formed approximately perpendicular to the substrate.

[0329] Next, the insulating film 271A is etched to form the insulator 271. 1 is used as a mask to form an insulating film 250A, a conductive film 260A, a conductive film 260B, and an insulating film 2 70A is etched, and the insulator 250, the conductor 260 (conductor 260a, conductor 260 b), and an insulator 270 is formed (see FIG. 14). The hard mask may be left unremoved for subsequent processes. The addition of dopants can also function as a hard mask.

[0330] The side of the insulator 250, the side of the conductor 260, and the side of the insulator 270 are flush with each other. In addition, the side of the insulator 250, the side of the conductor 260, and the insulating The same plane shared by the side surfaces of the body 270 is preferably approximately perpendicular to the substrate. In cross section, the insulator 250, the conductor 260, and the insulator 270 are made of oxide 2. The more acute and larger the angle of the cross section of the periphery of the periphery of the periphery of the periphery of the periphery of the The side surfaces of the insulator 250, the conductor 260, and the insulator 270, and the oxide film in contact with the insulator 250 The angle formed by the upper surface of the object 230 may be an acute angle. The oxide 230 is in contact with the insulator 250 and the side surfaces of the insulator 270. The larger the angle, the more preferable.

[0331] In addition, the insulator 250, the conductor 260, and the insulator 270 are at least partially made of conductors. 205 and oxide 230 are formed to overlap.

[0332] Furthermore, the upper portion of the region of the oxide film 230C that does not overlap with the insulator 250 is In this case, the oxide film 230C in the area overlapping the insulator 250 is etched. The thickness may be thicker than the thickness of the area not overlapping with the insulator 250 .

[0333] Next, oxide film 230C, insulator 250, conductor 260, insulator 270, and insulator 27 1, an insulating film 272A is formed (see FIG. 15). It is preferable to form the film by the ALD method, which has excellent properties. 60, the insulator 250, the conductor 260, and the insulating An insulating film 272A having a uniform thickness can be formed on the side surface of the body 270.

[0334] Next, the insulating film 272A is subjected to an anisotropic etching process to remove the insulator 250, the conductor 260, An insulator 272 is formed in contact with the side surface of the insulator 270 (see FIG. 16). As the etching treatment, it is preferable to use dry etching treatment. The insulating film formed on a surface approximately parallel to the substrate surface is removed to form an insulator 272 in a self-aligned manner. It is possible.

[0335] Here, by forming an insulator 271 on the insulator 270, the insulating layer on the top of the insulator 270 Even if the film 272A is removed, the insulator 270 can remain. 0, the height of the structure consisting of the conductor 260, the insulator 270, and the insulator 271 is 230a, oxide 230b, and oxide film 230C. The insulating film 272A on the side of the oxide 230a and oxide 230b through the film 230C is removed. Furthermore, the ends of the oxide 230a and the oxide 230b can be rounded. Then, oxide film 230c is formed on the side surfaces of oxide 230a and oxide 230b. The time required to remove the insulating film 272A is reduced, and the insulator 272 can be formed more easily. This can be done.

[0336] Next, insulator 250, conductor 260, insulator 270, insulator 271, and insulator 272 The oxide film 230C is etched using the mask to remove a part of the oxide film 230C. 17. In this step, the upper surface and The top and sides of the oxide 230a and a portion of the sides of the oxide 230a may be removed.

[0337] Here, in oxide 230a, oxide 230b, and oxide 230c, region 231 , region 232, and region 234 may be formed. Region 231 and region 232 may be formed The metal oxides provided as oxide 230a, oxide 230b, and oxide 230c It is a region where metal atoms such as indium or impurities are added to reduce the resistance. Each region is at least more conductive than oxide 230b in region 234.

[0338] In order to reduce the resistance of the region 231 and the region 232, for example, a metal element such as indium is added. A dopant, which is at least one of the above and impurities, may be added.

[0339] The dopant can be added by mass-separating an ionized source gas. Ion implantation, ion doping, which adds ionized source gas without mass separation, Plasma immersion ion implantation and other methods can be used. When performing separation, the ion species to be added and their concentrations can be strictly controlled. When mass separation is not performed, high concentration ions can be added in a short time. Alternatively, an ion doping method may be used, in which molecular clusters are generated and ionized. Dopants can be referred to as ions, donors, acceptors, impurities, or elements. Good too.

[0340] The dopant may also be added by plasma treatment. In this case, the plasma CVD equipment Plasma treatment was performed using a dry etching device and an ashing device, and oxide 230 Dopants can be added to oxide 230a, oxide 230b, and oxide 230c.

[0341] When an impurity is added as a dopant, the dopant is added so as to contact the region 231. For example, a film containing hydrogen, boron, carbon, nitrogen, or fluorine as a dopant may be formed. Alternatively, an insulator 274 containing phosphorus or the like is formed in contact with the region 231 of the oxide 230. (See FIG. 18.) The region 231 has a low resistance due to the formation of the insulator 274 and the heat treatment thereafter. The dopants contained in the insulator 274 are converted to regions 231 and 232. It is believed that the diffusion into region 232 results in a lower resistance in that region.

[0342] The oxide 230a, the oxide 230b, and the oxide 230c have a high indium content. By doing so, the carrier density can be increased and the resistance can be reduced. As a result, the carrier density of the oxide 230a, the oxide 230b, and the oxide 230c is improved. Metal elements such as indium can be used.

[0343] That is, in the region 231 and the region 232, the oxide 230a, the oxide 230b, and the By increasing the content of metal atoms such as indium in the oxide 230c, electron mobility This increases the resistance and reduces the resistance.

[0344] Therefore, the atomic ratio of indium to element M in at least region 231 is This is greater than the atomic ratio of indium to the element M of 34.

[0345] The dopant may be an element that forms the oxygen vacancy or an element that is captured by the oxygen vacancy. Representative examples of such elements include hydrogen, boron, carbon, Examples include nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and rare gases. Typical examples include helium, neon, argon, krypton, and xenon.

[0346] In addition, in the transistor 200, the region 232 is provided to form a source region and a drain region. A high resistance is formed between the region 231 that functions as an in-region and the region 234 where the channel is formed. Since no region is formed, the on-current and mobility of the transistor can be increased. Furthermore, by providing the region 232, the source region and the drain region can be separated in the channel length direction. Since the drain region and the gate do not overlap, the formation of unnecessary capacitance can be suppressed. Furthermore, by providing the region 232, it is possible to reduce the leakage current when the semiconductor device is not conducting. Cut.

[0347] Therefore, by appropriately selecting the ranges of the region 231a and the region 231b, the circuit design This makes it easy to provide transistors with electrical characteristics that meet the requirements. .

[0348] In this embodiment, the insulator 224, the oxide 230, the insulator 271, and the insulator 272 are Then, an insulator 274 is deposited over the entire surface (see FIG. 18).

[0349] The insulator 274 is, for example, silicon nitride or silicon oxynitride formed by CVD. In this embodiment, the insulator 274 can be formed of silicon oxynitride or silicon nitride. Silicon nitride oxide is used. The insulator 274 is used as the dielectric of the capacitor element 100. In this case, the film thickness is set to 1 nm or more and 20 nm or less, preferably 3 nm or more and 10 nm or less. .

[0350] In contact with the oxide 230, an insulator 274 containing an element that will become an impurity, such as nitrogen, is formed. The region 231a and the region 231b are filled with water contained in the film-forming atmosphere of the insulator 274. The region of the oxide 230 in contact with the insulator 274 is doped with an impurity element such as silicon or nitrogen. The added impurity element forms oxygen vacancies around the center, and the impurity element further By entering into the electron vacancy, the carrier density increases and the resistance decreases. The impurities are diffused into the region 232 that is not in contact with 74, thereby lowering the resistance.

[0351] Therefore, the regions 231a and 231b contain less hydrogen and nitrogen than the region 234. It is preferable that at least one of the concentrations is large. The concentration of hydrogen or nitrogen is determined by the secondary ion mass. Secondary Ion Mass Spectrometer (SIMS) y) or the like. Here, the concentration of hydrogen or nitrogen in the region 234 is , near the center of the region where the oxide 230b overlaps with the insulator 250 (for example, The hydrogen or nitrogen in the region (the region that is approximately equal in distance from both side surfaces of the insulator 250 in the channel length direction) The concentration can be measured.

[0352] The regions 231 and 232 are formed by an element that forms an oxygen vacancy or an element that is captured by the oxygen vacancy. The resistance is reduced by adding elements that are captured by the alloy. Examples include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and rare gases. Representative examples of rare gas elements include helium, neon, argon, krypton, and Therefore, the region 231 and the region 232 may contain one or more of the above elements. It is sufficient to have a configuration that includes numbers.

[0353] Alternatively, the insulator 274 may be used to extract oxygen contained in the regions 231 and 232. When oxygen is extracted, the region 231 and the region 232 are filled with the oxygen. Oxygen vacancies occur. Hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, and chlorine are added to the oxygen vacancies. By capturing titanium, rare gases, etc., the resistance of the regions 231 and 232 becomes low. do.

[0354] As an insulator containing impurity elements or as an insulator that extracts oxygen from oxide 230 When the insulator 274 is formed, the insulator 274 is formed by a method such as a sputtering method, a CVD method, or a M method. This can be carried out using a BE method, a PLD method, an ALD method, or the like.

[0355] The deposition of the insulator 274 containing an element that becomes an impurity includes at least one of nitrogen and hydrogen. By forming the film in such an atmosphere, the oxide 230b and and oxygen vacancies are formed around the region of the oxide 230c that does not overlap with the insulator 250. The carrier density is increased by combining oxygen vacancies with impurity elements such as nitrogen or hydrogen. In this way, the regions 231a and 231b having low resistance are formed. The insulator 274 may be silicon nitride formed by using, for example, a CVD method. Silicon nitride oxide, silicon oxynitride, or silicon oxynitride can be used. The body 274 is made of silicon oxynitride.

[0356] The insulator 274 may have a laminated structure made up of two or more layers of insulators. The film can be formed by using a CVD method, an ALD method, a sputtering method, or the like. has excellent step coverage, excellent thickness uniformity, and excellent film thickness controllability, This method is suitable for forming a film on the step portion formed by the oxide 230 or the conductor 260. After forming an insulator with a thickness of 0.5 nm to 5.0 nm using Using the D method, an insulator having a thickness of 1 nm or more and 20 nm or less, preferably 3 nm or more and 10 nm or less For example, aluminum oxide formed by the ALD method may be stacked to form the insulator 274. Aluminum, hafnium oxide, or oxides containing aluminum and hafnium (hafnium Silicon nitride and silicon oxynitride were formed on silicon aluminate using plasma CVD. The insulator 274 may be formed by depositing silicon, silicon oxynitride, or silicon oxide. Alternatively, a plasma CVD method is used to form a film having a thickness of 1 nm or more and 20 nm or less, preferably 3 nm or more. An insulator of 10 nm or less may be formed to form a single layer of insulator 274. For example, a plasma Silicon nitride, silicon nitride oxide, silicon oxynitride formed by CVD, or Silicon oxide may be used as the insulator 274 .

[0357] Therefore, the deposition of the insulator 274 forms the source and drain regions in a self-aligned manner. Therefore, miniaturized or highly integrated semiconductor devices can be manufactured with a high yield. It can be made.

[0358] Here, the top and side surfaces of the conductor 260 and the insulator 250 are covered with the insulator 270 and the insulating By covering the conductor 260 and the conductor 272, impurity elements such as nitrogen or hydrogen are prevented from entering the conductor 260 and the conductor 272. This prevents impurities such as nitrogen or hydrogen from being mixed into the insulator 250. The pure element passes through the conductor 260 and the insulator 250 to form the channel of the transistor 200. This can prevent the mixture from entering the region 234 that functions as the formation region. The transistor 200 can be provided with electrical properties.

[0359] In the above, the resistance of the oxide 230 is reduced by forming the insulator 274. Although the regions 231, 232, and 234 are formed, this embodiment is not limited to this. For example, a dopant addition treatment or a plasma treatment may be used. A plurality of these may be combined to form each region.

[0360] For example, insulator 250, conductor 260, insulator 272, insulator 270, and insulator 27 The oxide 230 may be subjected to a plasma treatment using the oxide 230 as a mask. If the reaction is carried out in an atmosphere containing an element that forms an oxygen vacancy or an element that is captured by the oxygen vacancy, For example, plasma treatment may be performed using argon gas and nitrogen gas.

[0361] Subsequently, a heat treatment can be carried out. The heat treatment can be carried out under the above-mentioned heat treatment conditions. By performing a heat treatment, the added dopant is transferred to the region 232 of the oxide 230. and the on-current can be increased.

[0362] Next, a conductive film 130A is formed to cover the insulator 274 (see FIG. 19). A is formed by a method such as sputtering, CVD, MBE, PLD, or ALD. It can be filmed.

[0363] Next, the conductive film 130A is processed using lithography to form the conductor 130 (FIG. 20. The conductive film 130A can be processed by dry etching or wet etching. In the dry etching method, anisotropy This is preferable because it is possible to realize etching and is therefore excellent for fine processing. By using wet etching capable of etching, the side of the oxide 230, the insulator 25 0 and the conductive film 130A on the side of the insulator 272. The dry etching and wet etching process combined produces a conductor with good shape. 30 can be formed, which is preferable.

[0364] In this embodiment, as shown in FIG. 20(B) and FIG. 20(D), A part of the conductor 130 provided in the oxide 230 is provided so as to extend to the outside of the oxide 230. Specifically, in FIG. 20(B), the conductor 130 is located on the B side from the oxide 230. In FIG. 20(D), the conductor 130 is formed so as to protrude from the oxide 230. It is provided so that it extends onto the E and F sides.

[0365] By adopting such a shape, the capacitor element 100 has a structure in which the upper surface of the oxide 230 and the lower surface of the conductor 130 are A capacitance can be formed not only between the oxide 230 and the conductor 130 but also between the side of the oxide 230 and the conductor 130. On the other hand, when the area occupied by the cell 600 is limited, the conductor 130 may be formed on the oxide 23. By forming the cell 600 so as not to protrude beyond the 0 as much as possible, it becomes possible to miniaturize the cell 600. High integration of semiconductor devices can be achieved.

[0366] Next, an insulator 280 is formed on the insulator 274 and the conductor 130 (see FIG. 21). The insulator 280 can be formed by sputtering, CVD, MBE, PLD or A. This can be done by using the LD method, spin coating method, dipping method, droplet ejection method, etc. method (inkjet method, etc.), printing method (screen printing, offset printing, etc.), doctor This can be done using a knife method, a roll coater method, a curtain coater method, etc. In this embodiment mode, silicon oxynitride is used as the insulating film.

[0367] It is preferable that the insulator 280 is formed so that the upper surface thereof is flat. For example, The insulator 280 has a flat upper surface immediately after being formed as an insulating film to become the insulator 280. Alternatively, for example, the insulator 280 may be formed parallel to a reference plane such as the rear surface of the substrate after being deposited. The insulating material may be removed from the top surface to achieve flatness. The process of planarization is called planarization. Planarization processes include CMP and dry etching. In this embodiment, the CMP process is used as the planarization process. The top surface of 80 does not necessarily have to be flat.

[0368] Next, an opening is formed in the insulator 280 and insulator 274 down to the region 231 of the oxide 230. An opening in the edge 280 reaching the conductor 130, an insulator 280, an insulator 274, an insulator 271, and an opening in the insulator 270 reaching the conductor 260, an insulator 280, an insulator 274, an insulator 224, the insulator 222, and the insulator 220 are provided with an opening that reaches the conductor 205. The openings may be formed by lithography.

[0369] The oxide 230 is provided with the conductor 252a in contact with the side surface of the oxide 230. The opening is formed so that the side surface of oxide 230 is exposed at the opening.

[0370] Next, the conductors 252 (conductor 252a, conductor 252b, conductor 252c, conductor 252 d) is formed (see FIG. 22). Also, if necessary, it is electrically connected to the conductor 252. A conductor 256 may be formed (see FIG. 22).

[0371] Through the above steps, a semiconductor device including the transistor 200 and the capacitor 100 can be manufactured. As shown in FIGS. 5 to 22, the method for manufacturing the semiconductor device described in this embodiment can be carried out. By using this, the transistor 200 and the capacitor 100 can be manufactured.

[0372] According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with low off-state current can be provided. According to one embodiment of the present invention, a transistor with high on-state current can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a semiconductor device with high productivity can be provided. can.

[0373] As described above, the configurations, methods, etc. shown in this embodiment may be applied to the configurations, methods, etc. shown in other embodiments. They can be used in any suitable combination.

[0374] (Embodiment 2) An example of a semiconductor device including the transistor 202 according to one embodiment of the present invention will be described below. explain.

[0375] In the semiconductor device of this embodiment, the same reference numerals as those in the semiconductor device shown in the first embodiment are used. The components marked with " " can be made of the same materials as those in the first embodiment. Unless otherwise stated, the components manufactured in this embodiment are the same as the components shown in Embodiment 1. Similar structural features and effects are expected to be obtained, and a description thereof will be omitted.

[0376] <Configuration Example 3 of Semiconductor Device> 23(A), 23(B), 23(C), and 23(D) show an embodiment of the present invention. 2A and 2B are a top view and a cross-sectional view of such a transistor 202. FIG.

[0377] FIG. 23(A) is a top view of the transistor 202. Also, FIGS. 23(B) and 23(C) are 23(B) and FIG. 23(D) are cross-sectional views of the transistor 202. 23(A) is a cross-sectional view of the portion indicated by the dashed line AB in FIG. 23(A), Also, Fig. 23(C) is a cross-sectional view in the channel length direction. 2 is a cross-sectional view of the portion indicated by the line, and is also a cross-sectional view of the transistor 202 in the channel width direction. Also, Fig. 23(D) is a cross-sectional view of the area indicated by the dashed line EF in Fig. 23(A). In the top view of 23(A), some elements are omitted for clarity.

[0378] [Transistor 202] As shown in FIG. 23, the transistor 202 is an insulator disposed on a substrate (not shown). 208, and an insulator 210 disposed on the insulator 208, a conductor 209 and a conductor The insulator 212 is disposed so as to be embedded between the conductor 209 and the insulator 2 12 and an insulator 216 disposed on the insulator 216. The insulator 216, the conductor 203, and the conductor 205 are an insulator 220 disposed on the insulator 220; an insulator 222 disposed on the insulator 220; 22 and an oxide 230 (oxide) disposed on the insulator 224. oxide 230a, oxide 230b, oxide 230c, and oxide 230d) and oxide 2 30, an insulator 250 (insulator 250a and insulator 250b) disposed on the insulating a conductor 260 (conductor 260a and conductor 260b) disposed on the body 250; An insulator 270 is disposed on the conductor 260, and an insulator 271 is disposed on the insulator 270. and arranged to contact at least the side surface of the insulator 250 and the side surface of the conductor 260. The insulating material 272 is disposed so as to be in contact with a part of the upper surface and a part of the side surface of the insulating material 272. and at least an oxide 230, an insulator 271, an insulator 272, and an insulator 273. and an insulator 274 disposed to cover the body 273.

[0379] An insulator 280 is also disposed over the transistor 202 .

[0380] The insulator 212 is an insulating film disposed so as to cover the conductor 209, and is formed by using a CMP method or the like. The insulating layer 209 can be formed by polishing the insulating layer 209 until it is exposed. The body 212 and the conductor 209 have excellent surface flatness.

[0381] The conductors 203 and 205 are inserted into openings in the insulator 216. The conductive film disposed to cover the insulator 216 and the opening is formed by It can be formed by polishing using a CMP method or the like until the insulator 216 is exposed. Therefore, the insulator 216, the conductor 203, and the conductor 205 have excellent surface flatness.

[0382] In addition, the insulator 220, the insulator 222, the insulator 224, and the oxide 230a have openings. The oxide 230b and the oxide 230c are exposed to the conductor 2 through the openings. The oxide 230b and the oxide 230c are electrically connected to the conductor 203. However, by using a configuration in which the connection is made without the oxide 230a being interposed, the series resistance and contact resistance can be reduced. With this configuration, a semiconductor device with good electrical characteristics can be obtained. More specifically, a transistor with improved on-state current and a semiconductor device using the transistor are disclosed. A semiconductor device having such a structure can be obtained.

[0383] The conductor 209 may have a layered structure. In this case, the conductor 209 has a thickness of 100 μm compared to the conductor in the upper layer. A conductor with superior oxidation resistance compared to the conductor underneath is placed on top of a conductor with excellent conductivity. By using a material that is difficult to oxidize as the upper layer of the conductor 209, the insulator 2 16, when the opening in the insulator 216 is formed, and when the conductor 205 is formed. In addition, oxidation of the conductor 209 can be suppressed. In other words, the increase in electrical resistance between the conductor 209 and the conductor 205 can be suppressed. The contact will be good.

[0384] In the transistor 202, as shown in FIG. 23, the oxide 230a and the oxide 230b , oxide 230c, and oxide 230d are stacked. The present invention is not limited to this. For example, two layers of oxide 230a and oxide 230c may be used. Structure, two-layer structure of oxide 230b and oxide 230c, oxide 230a, oxide 230c, and oxide 230d, oxide 230b, oxide 230c, and oxide 23 0d. That is, one of the oxide 230a and the oxide 230b may be The oxide 230d may not be provided. Alternatively, the oxide 230d may not be provided. Alternatively, a single layer of oxide 230c alone or a combination of oxide 230c and oxide 230c may be used. Alternatively, the transistor 202 may have only the conductor 260a. 1 and conductor 260b are stacked, the present invention is not limited to this. For example, it may have a single layer structure or a laminated structure of three or more layers.

[0385] Here, an enlarged view of a region 239 in the vicinity of the channel, surrounded by a dashed line in FIG. 23(B), is shown in FIG. Shown below.

[0386] As shown in FIGS. 23(B) and 24, oxide 230 is formed in the channel of transistor 202. a region 234 which functions as a hole forming region and a region 235 which functions as a source region or a drain region; Between the region 231 (region 231a and region 231b), the region 232 (region 232a and region 232b). 31 is a region with high carrier density and low resistance. The functioning region 234 is larger than the region 231 that functions as a source or drain region. , a region with a low carrier density. Region 232 is a source region or a drain region. The carrier density is lower than that of the region 231 which functions as a channel formation region. This region has a higher carrier density than the region 234 where the carrier density is higher.

[0387] In the region 231, the region 233 connected to the conductor 252a has a larger carrier density than the region 231. It is preferable that the area 231 has a high density and a low resistance. As a result, the contact resistance between the oxide 230 and the conductor 252a can be reduced, and the transistor The sintered body 202 can have good electrical properties. The region 233 is called the contact region. You can do it.

[0388] Regions 231, 232, and 233 are oxide 230 and helium or argon. The addition of a rare gas, for example, Ion implantation is a method of mass-separating ionized source gas and adding it to a target. Plasma immersion ion implantation is an ion doping method that does not require mass separation. A sol-gel method, a plasma treatment, or the like can be used.

[0389] When a rare gas is added to oxide 230, the bonds between the metal elements and oxygen atoms in oxide 230 are broken. This is thought to cause oxygen vacancies in the oxide 230. The oxygen vacancies capture impurities such as hydrogen. By capturing the oxide 230, carriers are generated and the oxide 230, i.e., the regions 231, 232, and The resistance of the oxide 230 and the region 233 is reduced. In this case, the impurity exists in a state where it is not bonded to the metal element or oxygen atom. Alternatively, the insulator 274 may be provided in contact with the oxide 230. It is possible.

[0390] Region 234 is a highly purified region where oxygen vacancies and impurities such as hydrogen are reduced as much as possible. The highly purified oxide becomes a substantially intrinsic region, and region 234 serves as a channel formation region. It can function as such.

[0391] 23 and 24, the region 232 is a conductor 2 that functions as a gate electrode. 60, but this embodiment is not limited to this. Depending on how region 232 is formed, region 232 may be a conductor 260 that functions as a gate electrode. may not overlap.

[0392] Region 232 has a higher carrier density than region 231, which functions as a source or drain region. A region having a lower density and a higher carrier density than the region 234 that functions as a channel formation region In this case, the region 232 may be a channel forming region and a source region or It functions as a junction region between the drain region and the gate electrode.

[0393] A region 231 that functions as a source region or a drain region by providing a junction region; No high resistance region is formed between the region 234 that functions as a channel forming region, and the transistor This is preferable because it allows the on-current of the transistor to be increased.

[0394] The region 234 overlaps with the conductor 260. The region 234 overlaps with the region 232a and the region 23 2b, and metal elements such as indium, hydrogen, and nitrogen are The concentration of at least one of the impurity elements is lower than that of the region 231 and the region 232. preferable.

[0395] Also, in oxide 230, regions 231, 232, 233, and 234 The boundaries between the two regions may not be clearly detectable. The concentrations of impurity elements such as silicon, hydrogen, and nitrogen are not limited to gradual changes from region to region. The color may also change continuously within each area (also called gradation). From region 231 to region 232, the closer to region 234, the more metal elements such as indium are present. It is sufficient that the concentrations of impurity elements such as silicon, hydrogen, and nitrogen are reduced.

[0396] 23B and 24, the area 234, the area 231, the area 232, and the area Region 233 is made up of oxide 230a, oxide 230b, oxide 230c, and oxide 230d. However, the present invention is not limited to this and is formed at least on the oxide 230c. In addition, for example, these regions may be formed only by oxide 230c and oxide 230d. In the figure, the boundaries of each region are defined by the insulator 224 and the oxide 230. Although the image is displayed approximately perpendicular to the interface, the present embodiment is not limited to this. For example, the region 232 extends toward the region 234 near the surface of the oxide 230c, and the region 232 extends toward the region 234 near the surface of the oxide 230c. In the vicinity of the bottom surface of 0c, the shape may recede toward the region 231 side.

[0397] For example, the insulator 250 may have a laminated structure including an insulator 250a and an insulator 250b. By forming the insulator 250b on the insulator 250a in an atmosphere containing oxygen, It is possible to include more oxygen, i.e., excess oxygen.

[0398] It is also preferable to provide an insulator 272 in contact with the side surface of the insulator 250 .

[0399] Furthermore, the transistor 202 has a barrier property to prevent the intrusion of impurities such as water or hydrogen. It is preferable that the electrode is surrounded by an insulator.

[0400] The following describes a detailed configuration of a semiconductor device including the transistor 202 according to one embodiment of the present invention. We will explain about this.

[0401] In the transistor 202, the conductor 260 may function as a first gate electrode. In addition, the conductor 205 may function as a second gate electrode. The potential applied to the conductor 205 is not linked to the potential applied to the conductor 260 but is independent of it. By varying the voltage, the threshold voltage of the transistor 202 can be controlled. Applying a negative potential to conductor 205 substantially reduces the threshold voltage of transistor 202. The voltage can be shifted to the positive side. By increasing the value of the conductor 260, it is possible to reduce the off-state current. The drain current can be reduced when the applied voltage is 0V.

[0402] The conductor 205, which functions as the second gate electrode, overlaps the oxide 230 and the conductor 260. Arrange them as shown.

[0403] That is, the electric field of the conductor 260 functioning as the first gate electrode and the electric field of the second gate electrode The electric field of the conductor 205, which functions as a pole, causes the channel forming region of the region 234 to In this specification, the first gate electrode and the second gate electrode The structure of a transistor in which the electric field of the gate electrode electrically surrounds the channel formation region is called This is called a surrounded channel (S-channel) structure.

[0404] The conductor 205 is in contact with the inner walls of the openings of the insulators 214 and 216, forming a conductor 205a. The conductor 205a and the conductor 205b are formed further inside. The height of the upper surface of the conductor 205b and the height of the upper surface of the insulator 216 can be made to be approximately the same. Regarding the transistor 202, the conductor 205a and the conductor 205b are stacked. However, the present invention is not limited to this. It may be configured to provide

[0405] Here, the conductor 205a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide. It has the function of suppressing the diffusion of impurities such as elementary molecules (N2O, NO, NO2, etc.) and copper atoms. It is preferable to use a conductive material that is impervious to the impurities mentioned above. For example, the oxygen atom, the oxygen molecule, etc.) It is preferable to use a conductive material (through which impurities are difficult to penetrate). The function of suppressing the diffusion of impurities or oxygen is to suppress the diffusion of either the above impurities or the above oxygen. Or, it has the function of suppressing all diffusion.

[0406] The conductor 205a has a function of suppressing the diffusion of oxygen, and therefore the conductor 205b is prevented from being oxidized. The conductivity of the conductive material is prevented from decreasing due to the oxygen diffusion. Examples of the material include tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Therefore, the conductor 205a is preferably formed of the above conductive material in a single layer or a multi-layer structure. This allows impurities such as hydrogen and water to pass through the insulator 214 from the substrate side. However, the diffusion of the ions to the transistor 202 side can be suppressed through the conductor 205. .

[0407] The conductor 205b is a conductive material mainly composed of tungsten, copper, or aluminum. Although the conductor 205b is illustrated as a single layer, it may be a laminated structure. For example, a laminate of titanium, titanium nitride and the above conductive material may be used.

[0408] The conductor 209 can function as an electrode or wiring. When the conductive material 209 is used as the second gate electrode of the gate electrode 202, a part of the conductive material 209 is used as the gate wiring. At this time, the conductor 207a and the The conductor 205 is connected to the conductor 207 through the conductor 209. The conductor 207 may be electrically connected to the conductor 203 and the conductor 252d. It can be produced by the same process as the body 205.

[0409] The conductor 209 is electrically connected to the oxide 230 via the conductor 203. It can function as a source wiring or a drain wiring of the transistor 202. The conductor 209 is for electrically connecting to elements and wiring located below the insulator 210. It may also be used as an electrode.

[0410] The conductor 203 and the conductor 209 are provided under the oxide 230 so as to overlap each other. The transistor 202 is connected to the elements and wiring located below the insulator 210. The gate electrode and the gate electrode can be provided overlapping the transistor 202. This reduces the cell size. This is preferable because it is possible.

[0411] The insulator 210 can be formed using a material similar to that of the insulator 210 described in Embodiment 1.

[0412] In addition, the insulator 212 and the insulator 216, which function as interlayer films, are thicker than the insulator 210. A low dielectric constant is preferable. By using a material with a low dielectric constant as the interlayer film, the dielectric constant between the wirings is reduced. The parasitic capacitance can be reduced. 16 is the same as the insulator 208, the insulator 216, and the insulator 280 shown in the first embodiment. Materials can be used.

[0413] The insulators 220, 222, and 224 function as gate insulators. The insulators 220, 222, and 224 are the same as the insulators 220, 222, and 224 shown in the first embodiment. Materials similar to those used for insulators 20, 222, and 224 can be used.

[0414] The oxide 230 is made up of an oxide 230a, an oxide 230b on the oxide 230a, and an oxide 23 The oxide 230c on the oxide 230b and the oxide 230d on the oxide 230c are also included. Compound 230 has regions 231, 232, 233, and 234. Preferably, at least a portion of the region 231 is in contact with the insulator 274. At least a portion of 31 is at least one of a metal element such as indium, hydrogen, and nitrogen. It is preferable that the concentration of is greater than that in region 234.

[0415] When the transistor 202 is turned on, the region 231a or the region 231b becomes the source region On the other hand, at least a portion of region 234 functions as a channel region. It serves as the region where

[0416] Here, as shown in FIG. 24, the oxide 230 preferably has a region 232. By using the region 232 as a junction region, the on-current is increased and the leakage current ( The off-state current can be reduced.

[0417] In addition, by having the oxide 230c on the oxide 230a and the oxide 230b, the oxide The diffusion of impurities from the structure formed below the oxide 230a to the oxide 230b is suppressed. In addition, by having the oxide 230c under the oxide 230d, the oxidation The diffusion of impurities from a structure formed above the oxide 230d to the oxide 230c is suppressed. It is possible.

[0418] That is, the region 234 provided on the oxide 230c is the same as the region 230a, the region 230b, and the region 234 provided on the oxide 230c. and oxide 230d, and maintains a low concentration of impurities such as hydrogen and nitrogen in the region. Oxide 2 having such a structure can be obtained by the above-mentioned method. A semiconductor device using 30 has good electrical characteristics and high reliability.

[0419] The oxide 230 also has a curved surface between the side and top surfaces. The edges of the surfaces are preferably curved (hereinafter also referred to as rounded). For example, the radius of curvature at the end of the oxide 230c is preferably 3 nm or more and 10 nm or less. is preferably 5 nm or more and 6 nm or less.

[0420] The oxide 230 can be formed using a material similar to that of the oxide 230 described in Embodiment 1.

[0421] Region 234 of oxide 230 will now be described.

[0422] The region 234 preferably has a layered structure made of oxides with different atomic ratios of metal atoms. Specifically, a stacked structure of oxide 230a, oxide 230b, and oxide 230c is preferable. When the oxide 230a has the above structure, the element M in the metal oxide used for the oxide 230a is The atomic ratio is the atomic ratio of element M among the constituent elements in the metal oxide used for oxide 230b. In addition, in the metal oxide used for the oxide 230b, The atomic ratio of element M in the element is the same as that of the constituent elements in the metal oxide used for oxide 230c. It is preferable that the atomic ratio of the metal oxide used for the oxide 230a is larger than that of the element M. In the oxide, the atomic ratio of element M to In is In the oxide 230, the atomic ratio of element M to In is preferably larger than that of element M. In the metal oxide used in b, the atomic ratio of element M to In is It is preferable that the atomic ratio of element M to In in the metal oxide is larger than that of element M to In. In addition, in the metal oxide used for the oxide 230b, the atomic ratio of In to the element M is In the metal oxide used for the oxide 230a, the atomic ratio of In to the element M is greater than that of In. In addition, in the metal oxide used for the oxide 230c, the ratio of In to the element M is preferably The atomic ratio of In to element M in the metal oxide used for oxide 230b is The oxide 230d is preferably larger than the oxide 230a and the oxide 230b. 0b, or any metal oxide that can be used for oxide 230c.

[0423] The oxide 230a and the oxide 230b are made of, for example, In:Ga:Zn=1:3:4, I Metals with a composition of n:Ga:Zn=1:3:2 or In:Ga:Zn=1:1:1 The oxide 230c may be, for example, In:Ga:Zn=4. :2:3, In:Ga:Zn=1:1:1, or In:Ga:Zn=5:1:6 The oxide 230d may be, for example, a metal oxide having In:Ga:Z n=1:3:4, In:Ga:Zn=1:3:2, In:Ga:Zn=4:2:3, A metal oxide having a composition of In:Ga:Zn=1:1:1 can be used. The above composition is determined by the atomic ratio in the oxide formed on the substrate or the atomic ratio in the sputtering target. The atomic ratio is shown.

[0424] In particular, the oxide 230a is In:Ga:Zn=1:3:4, and the oxide 230b is In :Ga:Zn=1:1:1, oxide 230c as In:Ga:Zn=4:2:3, oxide The compound 230d is a combination of metal oxides having a composition of In:Ga:Zn=1:1:1. The oxide 230c is compared with the oxide 230a and oxide 230b, which have wider energy gaps. In this case, the oxide 230d having a wide energy gap can be sandwiched between the oxide 230d. The oxide 230a, oxide 230b, and oxide 230d are wide-gap, relatively high-energy An oxide 230c with a narrow energy gap is sometimes called a narrow gap.

[0425] Next, the region 231 of the oxide 230 will be described.

[0426] The region 231 is formed by adding metal atoms such as indium to the metal oxide provided as the oxide 230. By adding rare gases such as helium or argon, or impurities such as hydrogen or nitrogen, the resistance is reduced. Each region is at least as thick as the oxide 230c in region 234. The region 231 is doped with metal atoms, rare gases, or impurities, so that the conductivity is high. For example, plasma treatment, ion implantation in which ionized source gas is mass-separated and added to the the ion doping method, which adds ionized source gas without mass separation; Metal elements, rare gases, etc. are implanted using ion implantation and plasma treatment. A dopant, which is at least one of a silicon dioxide and an impurity, may be added.

[0427] That is, in the region 231, the content of metal atoms such as indium in the oxide 230 is increased. This makes it possible to increase electron mobility and reduce resistance.

[0428] Alternatively, an insulator 274 containing an impurity element is formed in contact with the oxide 230. , region 231 may be doped with impurities.

[0429] That is, the region 231 is doped with an element that forms an oxygen vacancy or an element that is captured by the oxygen vacancy. The addition of such elements reduces the resistance. Representative examples of such elements include hydrogen, boron, and carbon. Examples of the rare gases include silicon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and rare gases. Representative examples of elements include helium, neon, argon, krypton, and xenon. Therefore, the region 231 may be configured to contain one or more of the above elements.

[0430] Alternatively, a film that extracts and absorbs oxygen contained in the region 231 is used as the insulator 274. When oxygen is extracted, oxygen vacancies are generated in the region 231. Boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, rare gases, etc. are captured. As a result, the resistance of the region 231 becomes low.

[0431] The width of the region 232 in the channel length direction is controlled by the widths of the insulators 272 and 273. It is possible.

[0432] Therefore, by appropriately selecting the range of the region 232, it is possible to achieve a desired result in accordance with the circuit design. Therefore, a transistor having the above electrical characteristics can be easily provided.

[0433] The insulator 250 functions as a gate insulating film. The insulator 250 is preferably an insulator that releases oxygen when heated. For example, in a thermal desorption spectroscopy (TDS) analysis, , the amount of oxygen released in terms of oxygen atoms is 1.0 × 10 18 atoms / cm 3 Above, I like Or 3.0 x 10 20 atoms / cm 3 The oxide film is as described above. The surface temperature of the membrane during analysis is 100°C or higher and 700°C or lower, or 100°C or higher. A range of 500°C or less is preferred.

[0434] For example, the insulator 250 may be formed as a laminated structure having an insulator 250a and an insulator 250b. The insulator from which oxygen is released by heating may be the insulator 250a, and the oxide 230d may be the oxide 230d. By providing the oxide 230c in contact with the upper surface of the oxide 230c, oxygen can be effectively supplied to the region 234 of the oxide 230c. In addition, like the insulator 224, the water or hydrogen in the insulator 250a can be The thickness of the insulator 250a is preferably 1 nm or more and 20 nm or less. The thickness is set to 5 nm or less, preferably 5 nm to 10 nm.

[0435] The insulator 250b is an insulating material capable of supplying oxygen to the insulator 250a during or after its formation. Such an insulator is preferably used in an oxygen-containing atmosphere or in a gas containing oxygen. For example, a sputtering method can be used to form a target containing oxygen. The aluminum oxide is formed in an atmosphere containing the insulator 250b. The thickness is set to 20 nm or less, preferably 5 nm to 10 nm.

[0436] By providing the insulator 250b on the insulator 250a, more oxygen is absorbed in the insulator 250a. The catalyst may contain excess oxygen.

[0437] The conductor 260 functioning as the first gate electrode is made up of the conductor 260a and the conductor 260b. The conductor 260a has a conductor 260b on the conductor 260a. It is preferable to use titanium nitride or the like for the conductor 260a. Furthermore, the conductor 260b is preferably made of a metal with high conductivity, such as tungsten. You can be there.

[0438] When a potential is applied to the conductor 260 and the conductor 205, an electric field generated from the conductor 260 The electric field generated by the conductor 205 causes a channel forming region to be formed in the oxide 230. Can be covered.

[0439] That is, the electric field of the conductor 260 functioning as the first gate electrode and the electric field of the second gate electrode The electric field of the conductor 205, which functions as a pole, causes the channel forming region of the region 234 to It can be electrically surrounded.

[0440] In addition, an insulator 272 functioning as a barrier film is provided on the side surface of the insulator 250 and the conductor 26. The insulating film 270 is provided so as to contact the side surface of the conductor 20. It is located at the top of 60.

[0441] Here, the insulator 270 and the insulator 272 are the same as the insulator 27 shown in the first embodiment. 0, and materials similar to those of the insulator 272 can be used.

[0442] In addition, transistors are miniaturized, and channel lengths are formed to approximately 10 nm to 30 nm. In this case, the impurity element contained in the structure provided around the transistor 202 diffuses. The regions 231a and 231b, or the regions 232a and 232b, are electrically There is a risk of electrical continuity.

[0443] Therefore, as shown in this embodiment, the insulators 272 and 273 are formed. This prevents impurities such as hydrogen and water from being mixed into the insulator 250 and the conductor 260. In addition, the oxygen in the insulator 250 can be prevented from diffusing to the outside. When the gate voltage is 0V, the source and drain regions are directly connected or connected to each other via the region 232, etc. Electrical conduction through the

[0444] The insulator 273 preferably has a lower dielectric constant than the insulator 272. By using the interlayer film, the parasitic capacitance occurring between the conductor 130 and the conductor 260 described later can be reduced. The insulator 273 can be made of the same material as the insulators 212 and 216. You can be there.

[0445] The insulator 274 includes at least an oxide 230, an insulator 271, an insulator 272, and an insulator It is installed so as to cover 273.

[0446] The insulator 274 also has the function of suppressing the permeation of impurities such as water or hydrogen, and oxygen. For example, silicon nitride is preferably used as the insulator 274. , silicon nitride oxide, silicon oxynitride, aluminum nitride, aluminum nitride oxide, etc. By forming such an insulator 274, the insulator 274 can be made transparent. Oxygen is mixed in through the region 231a and the region 231b, and oxygen is supplied to the oxygen vacancies in the region 231a and the region 231b. In addition, the carrier density can be prevented from decreasing. This can prevent impurities such as silicon from being mixed in and diffusing into the region 234.

[0447] When the region 231 is provided by forming the insulator 274, the insulator 274 is It is preferable to have at least one of hydrogen and nitrogen. By using an insulator having a material as the insulator 274, impurities such as hydrogen or nitrogen can be removed by oxidation. 230 to provide a region 231 in the oxide 230 with low resistance.

[0448] It is preferable to provide an insulator 280, which functions as an interlayer film, on the insulator 274. The insulator 280, like the insulator 224, has a reduced concentration of impurities such as water or hydrogen in the film. It is preferable that the insulator 280 is a laminated structure made of similar insulators. Good too.

[0449] [Capacitor element 101] As shown in FIG. 23, the capacitor element 101 has a structure common to that of the transistor 202. In this embodiment, the region 231 provided in the oxide 230 of the transistor 202 1 shows an example of a capacitor 101 in which a part of b functions as one of the electrodes of the capacitor 101. vinegar.

[0450] The capacitor element 101 includes a part of the region 231b of the oxide 230, the insulator 274, and the insulating layer 274. The conductor 130 (conductor 130a, conductor 130b) is further It is preferable that the region 231b is disposed so that at least a portion of the region 231b overlaps with a portion of the region 231b.

[0451] A part of the region 231b of the oxide 230 functions as one of the electrodes of the capacitor 101 and is conductive. The region 130 functions as the other electrode of the capacitance element 101. The transistor 202 functions as either a source or a drain, and the capacitor 101 functions as an electrode. A part of the insulator 274 serves as a dielectric of the capacitor element 101. It works like this.

[0452] Here, the side of the conductor 260 that functions as the first gate electrode of the transistor 202 is , insulator 272, and insulator 273 are provided. The insulators 272 and 273 are provided between the conductor 260 and the conductor 13. This can reduce the parasitic capacitance between 0 and 1.

[0453] The conductor 130 is made up of a conductor 130a and a conductor 130b disposed on the conductor 130a. For example, the conductor 130a may have a laminated structure containing titanium, titanium nitride, and the like. It is preferable to use a conductive material containing tantalum or tantalum nitride as a main component. The conductive body 130b is made of a conductive material mainly composed of tungsten, copper, or aluminum. The conductor 130 may have a single layer structure or a laminated structure of three or more layers. You may do so.

[0454] [Cell 601] The semiconductor device of one embodiment of the present invention includes a transistor 202, a capacitor 101, and a semiconductor device having a structure including a semiconductor layer as an interlayer film. The transistor 202 and the capacitor 101 are electrically connected to each other. The conductors 252 (conductors 252a, 252b, 252c) are electrically connected to each other and function as plugs. The conductive material 252 includes a conductive material 252c, and a conductive material 252d.

[0455] The conductive material 130 functions as an electrode of the capacitor element 101 and serves as a plug for electrical connection. The conductor 130 may be provided as a capacitor 10 included in the plurality of cells 601. Therefore, it is not necessary to provide the conductor 252b to each cell 601. It is not necessary to provide plugs, and it is also possible to provide plugs for a plurality of cells, the number of which is less than the number of the cells. For example, in a cell array in which cells 601 are arranged in rows and columns or in a matrix, There may be one plug for each row or one plug for each column.

[0456] The conductor 252 is formed in contact with the inner wall of the opening of the insulator 280. The height of the top surface of the conductive body 252 and the height of the top surface of the insulator 280 can be made to be approximately the same. Although the conductor 252 has two layers, the present invention is not limited to this. For example, the conductor 252 may have a single layer or a laminated structure of three or more layers.

[0457] The insulator 280 is preferably provided to cover the insulator 274 and the conductor 130 . The insulator 280, like the insulator 224, has a low concentration of impurities such as water or hydrogen in the film. It is preferable that the insulating material 280 has a laminated structure made of similar insulating materials. You may do so.

[0458] The insulator 280 preferably has a lower dielectric constant than the insulator 210. By using an interlayer film, the parasitic capacitance occurring between wirings can be reduced.

[0459] For example, the insulator 280 that functions as an interlayer film may be silicon oxide, silicon oxynitride, Silicon oxynitride, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide lead zirconate titanate (PZT), strontium titanate (SrTiO3) or Insulators such as (Ba,Sr)TiO3 (BST) can be used in single or multilayer configurations. Alternatively, these insulators may be made of, for example, aluminum oxide, bismuth oxide, germanium oxide, Niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, dioxide Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the body.

[0460] In addition, the conductors 252a, 252b, and The conductors 252a, 252b, and 252c are arranged. The upper surfaces of the conductors 252c and 252d are at approximately the same height as the upper surface of the insulator 280. It may also be possible to use the following.

[0461] The conductor 252a is connected to the insulator 280 and the opening formed in the insulator 274. The region 233 functions as one of the source and drain regions of the transistor 202. Since the region 233 has a low resistance, the contact resistance between the conductor 252a and the region 233 is In addition, the conductor 252b is electrically connected to the insulator 280 through an opening formed therein. The conductor 25 is in contact with the conductor 130, which is one of the electrodes of the capacitor 101. 2c is formed on the insulator 280, the insulator 274, the insulator 271, and the insulator 270. Through the opening, a conductor 260 is connected to the first gate electrode of the transistor 202. The conductor 252d is made of an insulator 280, an insulator 274, an insulator 222, and and contacts the conductor 207 through an opening formed in the insulator 220, and contacts the conductor 209 through the conductor 209. , electrically connected to a conductor 205 which serves as a second gate electrode of the transistor 202. are.

[0462] Here, the conductor 252a is in contact with at least the upper surface of the oxide 230, and the oxide 230 In particular, the conductor 252a is preferably in contact with the side surface of the oxide 230 in the channel width direction. On the side that intersects with the direction, it touches both or either of the side C and the side D. In addition, it is preferable that the conductor 252a has a side surface that intersects with the channel length direction of the oxide 230. In this way, the conductor 252a may be configured to contact the side surface of the oxide 23. By configuring the conductor 252a to be in contact with the side surface of the oxide 230 in addition to the top surface of the conductor 252a, and oxide 230 without increasing the contact area of ​​the contact part. This can reduce the contact resistance between the conductor 252a and the oxide 230. The ON current is increased while miniaturizing the source and drain electrodes of the transistor. It is possible.

[0463] The conductor 252 is made of a conductive material mainly composed of tungsten, copper, or aluminum. The conductor 252 may also have a laminated structure, for example, titanium, nitride, etc. It may also be a laminate of titanium dioxide and the above conductive material.

[0464] When the conductor 252 has a laminated structure, the conductor in contact with the insulator 274 and the insulator 280 The conductive material 205 has a function of suppressing the permeation of impurities such as water or hydrogen, similar to the conductive material 205a. It is preferable to use a conductive material having such a property. For example, tantalum, tantalum nitride, titanium, It is preferable to use titanium nitride, ruthenium, or ruthenium oxide. Conductive materials that have the function of suppressing the permeation of impurities such as silicon dioxide or hydrogen are used in single layer or multilayer configurations. By using such a conductive material, impurities such as hydrogen and water can be easily transported from the upper layer above the insulator 280. Impurities can be prevented from being mixed into the oxide 230 through the conductor 252 .

[0465] In addition, the conductor 252 is in contact with the inner wall of the opening of the insulator 274 and the insulator 280. In addition, an insulator having a function of suppressing the permeation of impurities such as water or hydrogen is provided. Such an insulator may be an insulator that can be used for the insulator 210, e.g. For example, it is preferable to use aluminum oxide. Therefore, impurities such as hydrogen and water are prevented from being mixed into the oxide 230 through the conductor 252. The insulator can be formed by using, for example, the ALD method or the CVD method. This allows for the formation of a film with good coverage.

[0466] Although not shown, a conductor that functions as a wiring is disposed in contact with the upper surface of the conductor 252. The conductor that functions as the wiring may be made mainly of tungsten, copper, or aluminum. It is preferable to use a conductive material that satisfies the above condition.

[0467] <Configuration Example 4 of Semiconductor Device> 25(A), 25(B), 25(C), and 25(D) show an embodiment of the present invention. 10A and 10B are top views of the transistor 204, the capacitor 102, and the periphery of the transistor 204; It should be noted that in this specification, one capacitance element and at least one transistor are A semiconductor device having a transistor is called a cell.

[0468] The cell 602 shown in FIG. 25 includes a transistor 204 and a capacitor element 102. The structures of the conductor 203 and the conductor 205 are different from those of the transistor 202 described above. In addition, the shapes of the insulator 250, the conductor 260, the insulator 270, and the insulator 271 are different. become.

[0469] The conductor 203 and the conductor 205 are provided on the conductor 209 and the insulator 212. The conductor 203 and the conductor 205 are made of the same material as the conductor 209. On the other hand, when processing the conductor 203 and the conductor 205, , if there is a risk of causing a shape defect in the conductor 209, It is preferable that the material of the insulator 205 is different from that of the conductor 209. It can be made using the same material as the insulator 212 and by the same method.

[0470] The insulator 250, the conductor 260, the insulator 270, and the insulator 271 have inclined sides. At least the insulator 250 and the conductor 260 are provided with an insulator 272 and an insulating material 272 on their sides. In forming the edge 273, the sides of the insulator 250 and the conductor 260 are in contact with the substrate surface or It is preferable that the surface of the insulator 220 or the insulator 222 is perpendicular to the surface of the insulator 220 or the insulator 222. In forming the insulating film that becomes the insulator 272 and the insulator 273, the insulator 250 and the conductor The side surface of the insulator 260 is preferably inclined to improve the covering property. The angle of the side surface of the conductor 260 can be adjusted appropriately taking into consideration ease of manufacturing in the process. can.

[0471] In the cell 602 shown in FIG. 25, the conductor 203 and and the structure of the conductor 205, and the insulator 250, the conductor 260, the insulator 270, and the insulating Although an example in which the shape of the edge 271 is different has been shown, the structure of the conductor 203 and the conductor 205 and and only one of the shapes of the insulator 250, the conductor 260, the insulator 270, and the insulator 271. may be different from the transistor 202.

[0472] <Configuration Example 5 of Semiconductor Device> 26(A), 26(B), 26(C), and 26(D) show an embodiment of the present invention. 10A and 10B are top views of the transistor 206, the capacitor 103, and the periphery of the transistor 206; It should be noted that in this specification, one capacitance element and at least one transistor are A semiconductor device having a transistor is called a cell.

[0473] The cell 603 shown in FIG. 26 includes a transistor 206 and a capacitor 103. The transistor 202 shown has oxide 230d etched over the regions 231 and 233. It differs in that it is not chipped and remains.

[0474] In this case, the end of the oxide 230c is covered with the oxide 230d, and the impurities in the oxide 230 are prevented from entering. This is preferable because it can suppress contamination and release of oxygen from the oxide 230.

[0475] The conductor 203 and the conductor 205 may have the structure shown in FIG. The insulator 250, the conductor 260, the insulator 270, and the insulator 271 are arranged in the shape shown in FIG. It may also be in the form of

[0476] <Cell array structure> An example of the cell array of this embodiment is shown in FIGS. 27 and 28. For example, in FIG. 3, the cell 601 having the transistor 202 and the capacitor element 101, and the cell 6 The transistors 300 electrically connected to the transistors 01 are arranged in a row or a matrix. A cell array can be configured in this way.

[0477] FIG. 27 shows the cell 601 shown in FIG. 23 and a transistor electrically connected to the cell 601. 300 are arranged in a matrix. 8(A) is a circuit diagram of a part of the cell array, 620, and FIG. 28(B) is a circuit diagram of a part of the cell array, 620. ) is a cross-sectional view of a cell 601 and a transistor 300 corresponding to the cell array. do.

[0478] The transistor 300 can be a transistor formed on a semiconductor substrate. The semiconductor substrate preferably comprises a semiconductor such as a silicon-based semiconductor, and preferably comprises single crystal silicon. It is preferable that the material contains Ge (germanium), SiGe (silicon germanium), or Materials used include gallium arsenide (GaAs), GaAlAs (gallium aluminum arsenide), etc. In this case, the transistor 300 is a p-channel type or The transistor 300 may be either an n-channel or n-channel type. As in Example 02, a transistor including an oxide semiconductor can also be used.

[0479] In FIG. 27, the sources and drains of the transistors 202 of the cells 601 adjacent to each other in the row direction are One of the drains is electrically connected to a common wiring (S01, S02, S03). The wiring is connected to the source and drain of the transistor 202 of the cell arranged in the column direction. On the other hand, the transistors of the cells 601 adjacent in the row direction are electrically connected to one of the transistors. The first gate of the stan 202 is electrically connected to different wirings WL (WL01 to WL06). The second gate of the transistor 202 in each cell 601 is connected to the transistor 4 00. The second output of the transistor 202 may be electrically connected to the first output of the transistor 400. The threshold voltage of the transistor can be controlled by the potential applied to the gate.

[0480] The first electrode of the capacitor 101 in the cell 601 is connected to the source of the transistor 202. The other of the drains is electrically connected to the gate of the transistor 300. In the case where the first electrode of the capacitor 101 is part of the structure constituting the transistor 202, In addition, the second electrode of the capacitor 101 included in the cell 601 is electrically connected to the wiring PL. The wiring PL electrically connected to the second electrode of the capacitor 101 is connected to the For example, the wiring PL may have a common potential for each column, or may have a common potential for each row.

[0481] One of the source and drain of the transistor 300 is connected to the wiring SL (SL01 to SL06 ), and the other of the source and drain of the transistor 300 is electrically connected to a wiring BL( BL01 to BL06).

[0482] As shown in FIG. 28B, the cell 601a includes a transistor 202a and a capacitance element 10 1a, which is electrically connected to the gate of transistor 300a. The transistor 202b and the capacitor 101b are connected to the gate of the transistor 300b. Electrically connected.

[0483] One of the source and drain of the transistor 202a and the source of the transistor 202b and one of the drains is electrically connected to S02.

[0484] One of the source and drain of transistor 202 is connected to the gate and drain of transistor 300. The gate electrode of the transistor 300 is electrically connected to the first electrode of the capacitor 101a. A desired potential can be applied to the gate and maintained there. The transistor 202 using the semiconductor has an extremely small leakage current in the non-conducting state. As a result, the potential applied to the gate electrode of the transistor 300 can be maintained for a long period of time.

[0485] Such a cell array can be used as a memory device or an arithmetic circuit.

[0486] [Transistor 400] FIG. 29 is a schematic cross-sectional view illustrating one embodiment of a transistor 400. , may have a structure different from that of the transistor 202.

[0487] Transistor 400 is preferably fabricated using materials common to transistor 202. stomach.

[0488] The conductor 409 can be formed using the same material as the conductor 209 and in the same process. The conductors 403 and 405 are made of the same material as the conductors 203 and 205. The conductor 405 is the second gate of the transistor 400. It can function as a gate electrode.

[0489] The oxide 430a, the oxide 430b, the oxide 430c, and the oxide 430d are, respectively, Materials similar to oxide 230a, oxide 230b, oxide 230c, and oxide 230d In the transistor 400, the oxide 430 A part of the oxide 430a, oxide 430b, and oxide 430d function as a channel forming region. 430c and oxide 430d have low resistance regions similar to oxide 230, and the source region The oxide 430a, the oxide 430b, and the Preferably, oxide 430c is provided with a lower resistance contact region.

[0490] The insulators 450a and 450b are the same as the insulators 250a and 250b, respectively. The insulator 450a and the insulator 450b can be formed using the same material and in the same process. The insulator 450 having the conductive layer 450b can function as a gate insulating layer. conductors 460a and 460b correspond to conductors 260a and 260b, respectively. The conductor 460a and the conductor 46 can be formed using the same material and in the same process. The conductor 460 having 0b can function as a first gate electrode.

[0491] The insulator 470 can be formed using the same material as the insulator 270 and in the same process. The insulator 471 can be formed using the same material as the insulator 271 and in the same process. The insulator 472 can be formed using the same material and process as the insulator 272. The insulator 473 can be formed using the same material and process as the insulator 273.

[0492] Openings are provided in the insulator 280 and the insulator 274 to allow for conductors connecting to the oxide 430. 452a and conductor 452b are disposed.

[0493] In the transistor 400, one of the source and drain regions is formed by an oxide 430a. , through openings in the insulator 224, the insulator 222, and the insulator 220, The conductor 403 is electrically connected to the second gate electrode 403 via the conductor 409. The source and drain regions are electrically connected to the conductor 405 which functions as a drain electrode. One of the drain regions is connected to a conductor 452b via a conductor 452c, which functions as a second gate electrode. 60. That is, the transistor 400 has a source region and a drain region. One of the regions, the first gate electrode, and the second gate electrode are electrically connected to each other. The diode connection is configured.

[0494] One of the source and drain of the diode-connected transistor 400 is connected to the conductor 409 and electrically connected to the second gate electrode of the transistor 202 via a conductor 209 or the like. As a result, the potential of the second gate electrode of the transistor 202 is 00. Also, transistor 400 is connected to oxide 430d. Since a channel forming region is provided, the leakage current in the non-conducting state is extremely small. For example, when a negative potential is applied to the second gate electrode of the transistor 202, the transistor Even if power is not supplied to the transistor 400, the potential of the second gate electrode of the transistor 202 can be maintained for a long time.

[0495] The transistor 400 does not need to be provided in each cell 601, but can be provided in the cell for multiple cells. For example, if the cells 601 are arranged in a matrix or In a cell array arranged in a matrix, one transistor 4 00, one transistor 400 per row, or one transistor 400 per column. That's fine.

[0496] <Method for manufacturing semiconductor device> Next, a manufacturing method of a semiconductor device including a transistor 202 according to the present invention will be described with reference to FIG. 30 to 50. In addition, in each of FIGS. 30 to 50, (A) is a top view. In addition, (B) in each figure is a cross section corresponding to the area indicated by the dashed line AB in (A). In addition, (C) in each figure is a cross section corresponding to the portion indicated by the dashed line CD in (A). (D) in each figure is a cross section corresponding to the area indicated by the dashed line EF in (A). Figure.

[0497] In addition, in the method for manufacturing a semiconductor device of this embodiment mode, the semiconductor device shown in Embodiment 1 The components denoted by the same reference numerals as those in the manufacturing method of the present embodiment are made of the same materials, manufacturing methods, and Unless otherwise specified, the semiconductor device manufactured in this embodiment mode can be used. The components have the same structural features and effects as the components shown in the first embodiment. and the explanation thereof will be omitted.

[0498] First, a substrate (not shown) is prepared, and an insulator 208 is formed on the substrate. The film 8 is formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. This can be done.

[0499] In this embodiment, the insulator 208 is formed by depositing silicon oxide by a CVD method.

[0500] Next, the insulator 210 is formed over the insulator 208. In this embodiment, the insulator 210 is Then, an aluminum oxide film is formed by sputtering. For example, a layer structure may be formed by forming an aluminum oxide film by sputtering. Alternatively, a structure may be used in which an aluminum oxide film is formed on an aluminum nitride film by the ALD method. Alternatively, an aluminum oxide film is formed by the ALD method, and then a sputtering method is performed on the aluminum oxide. A structure in which aluminum oxide is formed by a ring method may also be used.

[0501] Next, a conductive film 209A is formed on the insulator 210. The conductive film 209A is formed by sputtering. This can be done using a laser deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, the conductive film 209A is formed by sputtering tungsten. In addition to tungsten, other materials such as aluminum and copper can be used as the conductive film 209A. The conductive film 209A may have a laminated structure. For example, a conductor containing titanium or tantalum may be laminated on the conductor. Metal nitrides such as titanium nitride or tantalum nitride can be used.

[0502] Next, a mask 262 is formed on the conductive film 209A by lithography (see FIG. 30). Light. ).

[0503] Next, the conductive film 209A is processed using a mask 262 to form a conductor 209 (FIG. 3 See 1.).

[0504] This processing can be performed by dry etching or wet etching. The chipping method is suitable for microfabrication.

[0505] As the dry etching device, a dry etching device can be used, and a CCP etching A etching device, an ICP etching device, or the like can be used.

[0506] When a hard mask is used for etching the conductive film 209A, the etching process is performed using a hard mask. This may be done after removing the resist mask used to form the resist mask. In the latter case, the resist mask may be removed during etching. After etching the conductive film, the hard mask may be removed by etching. On the other hand, if the hard mask material does not affect the subsequent process or can be used in the subsequent process, It is not necessarily necessary to remove the hard mask.

[0507] Next, an insulating film 212A is formed on the insulator 210 and the conductor 209 (see FIG. 32). The formation of 212A can be performed by a method such as sputtering, CVD, MBE, PLD, or ALD. In this embodiment, the insulating film 212A is formed by a CVD method. This forms silicon oxide.

[0508] Next, a part of the insulating film 212A is removed by CMP processing to expose the conductor 209. As a result, insulation 212 remains between and around the conductors 209. This allows the insulator 212 and the conductor 209 to be formed with flat upper surfaces. (See FIG. 33.) Note that if a part of the conductor 209 is removed by the CMP process, There is.

[0509] Next, the insulator 216 is formed on the insulator 212 and the conductor 209. The film is formed using the sputtering method, CVD method, MBE method, PLD method, or ALD method. In this embodiment, silicon oxide is deposited by the CVD method as the insulator 216. A film of silicon is formed.

[0510] Next, openings are formed in the insulator 216. Examples of openings include grooves and slits. The opening may also refer to the area where the opening is formed. Etching may be used, but dry etching is preferred for fine processing. Also, when forming an opening in the insulator 216, the conductor 209 etches the insulator 216. The film may be used as an etching stopper film when forming a groove.

[0511] After the openings are formed, a conductive film that will become the conductor 203a and the conductor 205a is formed. The conductive film preferably contains a conductor that has the function of suppressing the permeation of oxygen. Tantalum nitride, tungsten nitride, titanium nitride, etc. can be used. , tungsten, titanium, molybdenum, aluminum, copper, molybdenum-tungsten alloy The conductive material 203a and the conductive material 205a can be laminated together. The film is formed using the sputtering method, CVD method, MBE method, PLD method, ALD method, etc. It can be done.

[0512] In this embodiment, the conductive film that becomes the conductor 203a and the conductor 205a is a sputtered film. The tantalum nitride film or the titanium nitride film on the tantalum nitride film is formed by the deposition method. Such metal nitrides are used as the conductors 203a and 205a. As a result, metals that are easily diffused, such as copper, are used in the conductors 203b and 205b, which will be described later. Even if the metal is used, the metal is prevented from diffusing out of the conductor 203a and the conductor 205a. You can do this.

[0513] Next, the conductor 203b and the conductive film that will become the conductor 205a are formed on the conductive film that will become the conductor 203a and the conductive film that will become the conductor 205a. The conductive film is formed by a sputtering method, a CV method, or the like. This can be done by using a D method, an MBE method, a PLD method, an ALD method, or the like. In this case, the conductive film to be the conductor 203b and the conductor 205b is made of tungsten or copper. A film of a low resistance conductive material such as

[0514] Next, a CMP process is performed to form a conductive film that will become the conductor 203a and the conductor 205a. In addition, a part of the conductive film that will become the conductor 203b and the conductor 205b is removed, and the insulator 2 As a result, the conductor 203a and the conductor 205a are formed only in the opening. The conductive film that will become the conductor 203b and the conductor 205b remains. As a result, the conductor 203 including the conductor 203a and the conductor 203b, which have a flat upper surface, and a conductor 205 including a conductor 205a and a conductor 205b ( (See FIG. 34.) Note that the CMP process may remove a part of the insulator 216. be.

[0515] Next, the insulator 220, the insulator 222 are applied to the insulator 216, the conductor 203, and the conductor 205. 2, and insulator 224 are deposited. can be formed by the same method as in the first embodiment using the same materials (FIG. 3 See 4.).

[0516] Subsequently, heat treatment is preferably performed. The heat treatment may be performed by the method shown in Embodiment 1. The heat treatment removes impurities such as hydrogen and water contained in the insulator 224. It should be noted that there are cases where the first heat treatment does not need to be carried out.

[0517] The heat treatment is performed after the insulator 220 is formed and after the insulator 222 is formed. The heat treatment can be carried out under the above-mentioned heat treatment conditions. The heat treatment after the film formation is preferably carried out in an atmosphere containing nitrogen.

[0518] In this embodiment, the heat treatment is performed at 400° C. in a nitrogen atmosphere after the insulator 224 is formed. Treat at 37°C for 1 hour.

[0519] Next, an oxide film 230A that will become oxide 230a is formed on the insulator 224.

[0520] The oxide film 230A is formed by the same method as in the first embodiment using the same material. can be done.

[0521] Next, using a lithographic method, insulator 220, insulator 222, insulator 224, and An opening is formed in the oxide film 230A so as to reach the conductor 203. First, a thin film is formed on the oxide film 230A. A mask 263 is formed (see FIG. 34). The mask 263 used to form the opening is a resist. A thin mask or a hard mask may be used.

[0522] Next, using a mask 263, the insulator 220, the insulator 222, the insulator 224, and the oxide The film 230A is processed to expose the surface of the conductor 203, thereby forming an opening (FIG. 35 (See reference ). This processing can be performed using dry etching or wet etching. The dry etching method is suitable for fine processing. The conductor 222 and the insulator 224 are processed through the oxide film 230A. When exposing a part of the surface of 203, a resist mask or a hard mask is formed on the oxide film 230A. Then, a mask made of an insulator 220, an insulator 222, an insulator 224, and the oxide film 230A is processed. That is, the insulator (insulating No mask is formed on the surfaces of the insulating layer 220, the insulating layer 222, and the insulating layer 224. Therefore, the mask does not adhere to the surface of the insulator that functions as the gate insulating film, and the resist Impurities contained in masks, ingredients contained in hard masks, and chemicals used to remove masks This can prevent contamination and damage to the gate insulating film caused by components contained in the liquid or plasma. By such a process, a method for manufacturing a highly reliable semiconductor device can be provided.

[0523] Next, an oxide film 230B and an oxide film 230C are formed on the oxide film 230A (see FIG. 36). At this time, the oxide film 230B and the oxide film 230C are also formed inside the opening. , and electrically connects to the conductor 203 through the opening. 30c and the conductor 203 are connected directly without the oxide 230a. This configuration makes it possible to reduce the column resistance and contact resistance. More specifically, a transistor with improved on-state current and A semiconductor device using the transistor can be obtained.

[0524] The oxide film 230B and the oxide film 230C are formed by a sputtering method, a CVD method, or an MBE method. The deposition can be carried out by using a PLD method, an ALD method, or the like.

[0525] After the oxide film 230B is formed, the oxide film 230C is formed continuously without exposure to the atmosphere. The formation of the oxide film 230B and the formation of the oxide film 230C are preferably performed by multi-layer deposition. By using a chamber-type film forming apparatus, the surface of the oxide film 230B is exposed to the air atmosphere. The oxide film 230C can be formed on the oxide film 230B without forming a thin film. The oxide film 230B and the oxide film 230C are formed successively. Contamination of the interface of the oxide film 230C can be prevented, and the semiconductor device using these oxide films has good It can have high performance and high reliability.

[0526] For example, when the oxide film 230B and the oxide film 230C are formed by sputtering, In this case, oxygen or a mixture of oxygen and a rare gas is used as the sputtering gas. By increasing the oxygen content of the tartering gas, the excess oxygen in the oxide film to be formed can be removed. In addition, when the oxide film is formed by sputtering, The above-mentioned In-M-Zn oxide target can be used.

[0527] When the oxide film 230B and the oxide film 230C are formed by sputtering, The oxygen content of the gas is 1% or more and 30% or less, preferably 5% or more and 20% or less. When the film is formed using the above method, an oxygen-deficient oxide semiconductor is formed. The used transistor has a relatively high field effect mobility.

[0528] In this embodiment, the oxide film 230B is formed by sputtering In:Ga:Z The film was formed using a target with n=1:1:1 [atomic ratio], and the oxide film 230C was By using the quartz crystal deposition method, a target with an atomic ratio of In:Ga:Zn=4:2:4.1 was prepared. The oxide film 230B and the oxide film 230C are formed using a multi-channel The sputtering is carried out continuously using a sputtering machine without exposing the oxide film to the atmosphere. By appropriately selecting the film formation conditions and atomic ratio, it is possible to obtain oxide 230 with the desired properties. It is advisable to form it in this way.

[0529] Next, a heat treatment may be carried out. The heat treatment may be carried out under the heat treatment conditions described above. The heat treatment removes water from the oxide films 230A, 230B, and 230C. In this embodiment, the 4-phase annealing is performed in a nitrogen atmosphere. After 1 hour of treatment at 00°C, the material was subsequently heated at 400°C in an oxygen atmosphere. Allow 1 hour for processing.

[0530] Next, the oxide film 230A, the oxide film 230B, and the oxide film 230C are processed into an island shape. A substance 230a, an oxide 230b, and an oxide 230c are formed (see FIG. 37).

[0531] As shown in FIG. 37(A) and FIG. 37(D), oxide 230a, oxide 230b, and The oxide 230c is formed on the insulator 220, the insulator 222, the insulator 224, and the oxide 230a. The width in the EF direction in the region overlapping with the formed opening is formed wider than the width of the opening. Therefore, the oxide 230a, the oxide 230b, and the The width of the oxide 230c in the EF direction is determined by the region where the channel is formed and the width of the oxide 230c in the A-side region. The oxide 230a, the oxide 230b, and the oxide 230c are formed in a width direction wider than the CD direction. By using such a structure, the oxide 230b and the oxide 230 The contact between the capacitor element 101 and the conductor 203 can be ensured. Therefore, the capacitance of the capacitor 101 can be expected to increase.

[0532] In the above process, the insulator 224 may be processed into an island shape. Half etching may be performed on the insulator 224. By performing this process, the insulator 224 is formed under the oxide 230d to be formed in a later process. The insulator 224 is formed by the conductive film 260A and the conductive film 260B in a later process. Alternatively, when processing the insulating film 272A, it can be processed into an island shape. The body 222 may be used as an etching stopper film.

[0533] Here, the oxide 230a, the oxide 230b, and the oxide 230c are at least partially The oxide 230b is formed so as to overlap the conductor 205. The side of oxide 230c is preferably flush with the side of oxide 230a. The sides of the oxide 230a, the oxide 230b, and the oxide 230c are in contact with the insulator 222. It is preferable that the oxide 230b is approximately vertical. The end of oxide 230a is approximately aligned with the end of oxide 230b. The side of the oxide 230c is approximately perpendicular to the insulator 222, so that a plurality of transistors When providing the transistor 202, it is possible to reduce the area and increase the density. a, the angles formed by the side surfaces of the oxide 230b and oxide 230c and the top surface of the insulator 222 are acute angles. In this case, the oxide 230a, the oxide 230b, and the oxide 230c may be formed as follows. The larger the angle formed by the side surface of 30c and the top surface of the insulator 222, the more preferable.

[0534] Also, the side surfaces of oxide 230a, oxide 230b, and oxide 230c and oxide 230 The curved surface is between the top surface of the side wall and the top surface of the wall. The curved surface is preferably formed by, for example, oxide 230a, oxide The radius of curvature at the ends of the oxide 230c and the oxide 230b is 3 nm or more and 10 nm or less. Preferably, the thickness is set to 5 nm or more and 6 nm or less.

[0535] In addition, since the edge does not have sharp edges, the film coverage in the subsequent film formation process is improved.

[0536] The processing of the oxide film and cleaning to remove impurities that adhere during the processing are carried out in accordance with the embodiment. This can be done by the method shown in embodiment 1.

[0537] Subsequently, a heat treatment may be carried out. The heat treatment conditions may be the same as those described above. This can be done.

[0538] Next, on the insulator 224, the oxide 230a, the oxide 230b, and the oxide 230c, An oxide film 230D that becomes the oxide 230d is formed (see FIG. 38).

[0539] The oxide film 230D is formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an AL method. The oxide film 230d can be formed by the method D or the like. 30A, oxide film 230B, or oxide film 230C by the same film formation method. In this embodiment, the oxide film 230D is formed by sputtering. Therefore, the film is formed using a target with an atomic ratio of In:Ga:Zn=1:3:4.

[0540] The oxide film 230D may be processed into an island shape as shown in FIG. By processing the oxide film 230D before forming the conductor 260, the insulator 2 50 and a part of the oxide film 230D located under the conductor 260 can be removed. As a result, the oxide films 230D of the adjacent cells 601 are separated, and the oxide films 230D between the cells 601 are This is preferable because it can prevent leakage through the membrane 230D.

[0541] The oxide film 230D can be processed by dry etching or wet etching. Using the method used to process the oxide film 230A, the oxide film 230B, and the oxide film 230C, Good too.

[0542] Next, an insulating film 250A, an insulating film 250B, and a conductive film 250D are formed on the insulator 224 and the oxide film 230D. 260A, a conductive film 260B, an insulating film 270A, and an insulating film 271A are formed in this order (FIG. See 40.

[0543] The insulating film 250A and the insulating film 250B can be formed by a sputtering method, a CVD method, an MBE method, a P The film can be formed using the LD method, the ALD method, or the like.

[0544] In this embodiment, silicon oxynitride is formed as the insulating film 250A by using a CVD method. As the insulating film 250B, aluminum oxide is formed by sputtering. The thickness of the insulating film 250A is 1 nm or more and 20 nm or less, preferably 5 nm or more and 10 nm or less. The thickness of the insulating film 250B is 1 nm or more and 20 nm or less, preferably 5 nm or more and 10 nm or less. The insulating film 250B is formed by sputtering in an atmosphere containing oxygen. By doing so, the insulating film 250A can contain more oxygen, i.e., excess oxygen. This is preferable.

[0545] Heat treatment may also be performed. The heat treatment may be performed under the above-mentioned heat treatment conditions. The heat treatment reduces the moisture concentration and hydrogen concentration of the insulating film 250A and the insulating film 250B. The degree can be reduced.

[0546] The conductive film 260A can be formed by a method such as a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, the conductive film 260A can be formed by sputtering. Titanium nitride was formed using a coating method.

[0547] The conductive film 260B can be formed by sputtering, CVD, MBE, PLD or AL. The conductive film 260B can be formed by using a low-resistance metal film. By doing so, a transistor with a low driving voltage can be provided. The conductive film 260B was formed of tungsten by sputtering.

[0548] Subsequently, a heat treatment can be carried out. The heat treatment can be carried out under the above-mentioned heat treatment conditions. Note that the heat treatment may not be performed in some cases. The treatment is carried out at 400°C for 1 hour.

[0549] The insulating film 270A and the insulating film 271A are made of the same material by the same method as in the first embodiment. It can be formed using materials.

[0550] The insulator 271 also functions as a hard mask. The side of the insulator 250a, the side of the insulator 250b, the side of the conductor 260a, and the side of the conductor 260b The side surface and the side surface of the insulator 270 can be formed approximately perpendicular to the substrate.

[0551] Next, the insulating film 271A is etched to form the insulator 271. 1 is used as a mask, and insulating film 250A, insulating film 250B, conductive film 260A, conductive film 260B , and the insulating film 270A are etched to remove the insulator 250 (insulator 250a, insulator 25 0b), conductor 260 (conductor 260a, conductor 260b), and insulator 270 are formed. (See Figure 41.) After this processing, the hard mask is not removed and the subsequent process is carried out. The hard mask can also be used as a hard mask when doping with dopants in a subsequent process. It can function as a mask.

[0552] Furthermore, the upper portion of the region of the oxide film 230D that does not overlap with the insulator 250 is In this case, the oxide film 230D may be etched in the area where it overlaps with the insulator 250. The thickness may be thicker than the thickness of the area not overlapping with the insulator 250 .

[0553] Furthermore, the region of the insulator 224 that does not overlap with the oxide film 230D is etched by the above etching. In this case, the area that does not overlap with the oxide film 230D and the conductor 260 may be At this point, the insulator 222 is exposed.

[0554] Subsequently, a heat treatment can be carried out. The heat treatment can be carried out under the above-mentioned heat treatment conditions. Note that the heat treatment may not be performed in some cases. The treatment is carried out at 400°C for 1 hour.

[0555] Next, oxide film 230D, insulator 250, conductor 260, insulator 270, and insulator 27 An insulating film 272A is formed to cover the substrate 1 (see FIG. 42).

[0556] Next, the insulator 250, the conductor 260, the insulator 270, and the Using the insulator 271 as a mask, a rare gas is added to the oxide 230. The rare gas is added as follows: For example, ion implantation is a method in which ionized source gas is mass-separated and added; Plasma immersion ion doping is an ion doping method that adds raw material gases without mass separation. The implantation method, plasma treatment, etc. can be used. Then, oxide 230 is provided with regions 234 and 232 (see FIG. 42).

[0557] Next, an insulating film 273A is formed to cover the insulating film 272A (see FIG. 43). It is preferable to use a material with a low dielectric constant for 73A. The same materials as in 16 can be used.

[0558] Next, the insulating film 273A and the insulating film 272A are subjected to anisotropic etching. 250, conductor 260, and insulator 270, which are adjacent to the sides of the insulating material and act as a barrier. 44. The insulating layer 272 and the insulating layer 273 functioning as sidewalls are formed (see FIG. 44). As the anisotropic etching process, dry etching is preferably performed. This allows the insulators 272 and 273 to be formed in a self-aligned manner.

[0559] Here, by forming an insulator 271 on the insulator 270, the insulating layer on the top of the insulator 270 Even if the film 273A and the insulating film 272A are removed, the insulator 270 can remain. Also, the insulating material 250, the conductor 260, the insulating material 270, and the insulating material 271 are The height of the structure is determined by the oxide 230a, oxide 230b, oxide 230c, and oxide film 23 By increasing the height of the oxide film 230D to a height higher than 0D, the oxide film 230a formed through the oxide film 230D , the oxide 230b, the insulating film 273A on the side of the oxide 230c, and the insulating film 272A, Further, oxide 230a, oxide 230b, and oxide 230 When the end of oxide 230a, oxide 230b, and oxide 230c are rounded, The insulating film 273A and the insulating film 230C are formed on the side of the insulating film 230C via the oxide film 230D. 72A, and it takes less time to remove the insulators 272 and 273. can be formed.

[0560] Next, insulator 250, conductor 260, insulator 270, insulator 271, insulator 272, and The oxide film 230D is etched using the insulating film 273 as a mask, and a part of the oxide film 230D is removed. The oxide 230d is formed by removing the oxide 230a (see FIG. 45). The top and side surfaces of oxide 230c, oxide 230a, and part of the side surfaces of oxide 230b are removed. This may be the case.

[0561] Here, in oxide 230a, oxide 230b, oxide 230c, and oxide 230d, The region 231 may be formed by forming an oxide 230a, an oxide 230b, The metal oxides provided as the oxide 230c and the oxide 230d are each formed of indium or the like. These are regions where metal atoms or impurities are added to reduce the resistance. Both are more conductive than oxide 230b in region 234.

[0562] In order to reduce the resistance of the region 231 and the region 232, metal atoms such as indium are added. , a rare gas such as helium or argon, or an impurity such as hydrogen or nitrogen. A suitable dopant may be added.

[0563] The dopant is added using the same dopant and addition method as in the first embodiment. It is possible.

[0564] The dopant may also be added by plasma treatment. In this case, the plasma CVD equipment Plasma treatment was performed using a dry etching device and an ashing device, and oxide 230 a, oxide 230b, oxide 230c, and oxide 230d are doped with dopants. This can be done.

[0565] In addition, when an impurity is added as a dopant, the dopant is placed in contact with the oxide 230. For example, a film containing hydrogen, boron, carbon, nitrogen, or fluorine may be formed as a dopant. The insulator 274 containing silicon or phosphorus is formed on the oxide 230d, the insulator 272, and the insulating layer 274. The oxide 230 is deposited on the outside of the body 273 to form the region 231 ( (See FIG. 46.) The region 231 has a low resistance due to the formation of the insulator 274 and the heat treatment after the film formation. The dopant contained in the insulator 274 diffuses into the region 231, and the resistance of the region becomes low. It is also considered that the dopant contained in the insulator 274 diffuses into the region 232, 232 may further reduce the resistance value than that reduced by the addition of the previous rare gas. do.

[0566] The oxide 230a, the oxide 230b, the oxide 230c, and the oxide 230d are indium. By increasing the content of silicon, the carrier density can be increased and the resistance can be reduced. As a result, oxide 230a, oxide 230b, oxide 230c, and oxide A metal element such as indium can be used to improve the carrier density of the material 230d. .

[0567] That is, in the region 231 and the region 232, the oxide 230a, the oxide 230b, and the oxide By increasing the content of metal atoms such as indium in the oxide 230c and the oxide 230d, This increases the electron mobility and reduces the resistance.

[0568] In this case, the atomic ratio of indium to element M in at least the region 231 is The atomic ratio of indium to the element M is greater than 234.

[0569] In addition, in the transistor 202, the region 232 is provided, so that the source region and the drain region A high resistance is formed between the region 231 that functions as an in-region and the region 234 where the channel is formed. Since no region is formed, the on-current and mobility of the transistor can be increased. Furthermore, by providing the region 232, the source region and the drain region can be separated in the channel length direction. Since the drain region and the gate do not overlap, the formation of unnecessary capacitance can be suppressed. Furthermore, by providing the region 232, it is possible to reduce the leakage current when the semiconductor device is not conducting. Cut.

[0570] Therefore, by appropriately selecting the ranges of the region 231a and the region 231b, the circuit design This makes it easy to provide transistors with electrical characteristics that meet the requirements. .

[0571] In this embodiment, the insulator 224, the oxide 230, the insulator 271, the insulator 272, and An insulator 274 is formed to cover the insulator 273 (see FIG. 46).

[0572] The insulator 274 may be formed using the same material as in the first embodiment by the same method. This allows the oxide 230c and the oxide 230d to be formed without overlapping with the insulator 250. Oxygen vacancies are formed around the region, and impurity elements such as nitrogen or hydrogen are bonded to the oxygen vacancies. By combining these, the carrier density can be increased. Region 231a and region 231b can be formed.

[0573] As shown in the first embodiment, the insulator 274 may have a single layer structure, or may have two or more layers of insulating material. It may also have a laminated structure made of edge members.

[0574] Therefore, the deposition of the insulator 274 forms the source and drain regions in a self-aligned manner. Therefore, miniaturized or highly integrated semiconductor devices can be manufactured with a high yield. It can be made.

[0575] Here, the top and side surfaces of the conductor 260 and the insulator 250 are covered with the insulator 270 and the insulating By covering the conductor 260 and the conductor 272, impurity elements such as nitrogen or hydrogen are prevented from entering the conductor 260 and the conductor 272. This prevents impurities such as nitrogen or hydrogen from being mixed into the insulator 250. The pure element passes through the conductor 260 and the insulator 250 to form the channel of the transistor 202. This can prevent the mixture from entering the region 234 that functions as the formation region. The transistor 202 can be provided with electrical properties.

[0576] In the above, the resistance of the oxide 230 is reduced by forming the insulator 274. However, the present embodiment is not limited to this. Alternatively, a combination of these treatments may be used to treat each region. A region or the like may be formed.

[0577] For example, the insulator 250, the conductor 260, the insulator 272, the insulator 273, the insulator 270, and The oxide 230 may be subjected to plasma treatment using the insulating material 271 as a mask. The oxygen vacancy forming treatment is carried out in an atmosphere containing the elements that form the oxygen vacancies or the elements that are captured by the oxygen vacancies. For example, plasma treatment can be performed using argon gas and nitrogen gas. stomach.

[0578] Subsequently, a heat treatment can be carried out. The heat treatment can be carried out under the above-mentioned heat treatment conditions. By performing a heat treatment, the added dopant is transferred to the region 231 of the oxide 230. This heat treatment also increases the amount of added The dopant may diffuse into region 232 .

[0579] Next, the conductive film 130A and the conductive film 130B are formed to cover the insulator 274 (FIG. 46 The conductive film 130A and the conductive film 130B are formed by a method such as sputtering, CVD, M The film can be formed by using a BE method, a PLD method, an ALD method, or the like. Titanium nitride is formed as the conductive film 130A by sputtering, and the conductive film 130 As B, tungsten is formed by sputtering.

[0580] Next, the conductive film 130A and the conductive film 130B are processed by lithography to form a conductive film. The conductive film 13 is formed by the conductive layer 130 (the conductive layer 130a and the conductive layer 130b) (see FIG. 47). The processing of the conductive film 130A and the conductive film 130B is similar to the processing of the conductive film 130A shown in the first embodiment. The following method can be used.

[0581] In this embodiment, as shown in FIG. 47(B) and FIG. 47(D), A part of the conductor 130 provided in the oxide 230 is provided so as to extend to the outside of the oxide 230. Specifically, in FIG. 47(D), the conductor 130 is located on the E side of the oxide 230 and It is designed to extend beyond the F side.

[0582] By adopting such a shape, the capacitor element 101 is formed by connecting the upper surface of the oxide 230 and the upper surface of the conductor 130. A capacitance can be formed not only between the oxide 230 and the conductor 130 but also between the side of the oxide 230 and the conductor 130. Therefore, in FIG. 47(B), the conductor 130 is located on the B side of the oxide 230. On the other hand, if there is a limit to the area occupied by the cell 601, the conductor 1 may be provided so as to protrude outward. 30 is formed so as not to protrude from the oxide 230 as much as possible, This allows for higher integration of semiconductor devices.

[0583] The conductor 130 may be formed so as to connect with the conductor 130 of the adjacent cell 601 .

[0584] Next, an insulator 280 is formed on the insulator 274 and the conductor 130 (see FIG. 48). The insulator 280 is formed by the same method as in the first embodiment using the same material. This can be done.

[0585] Next, an opening is formed in the insulator 280 and insulator 274 down to the region 231 of the oxide 230. An opening in the edge 280 reaching the conductor 130, an insulator 280, an insulator 274, an insulator 271, and an opening in the insulator 270 reaching the conductor 260, an insulator 280, an insulator 274, an insulator 222, and an opening that reaches the conductor 205 is formed in the insulator 220. This can be done by using a lithography method.

[0586] The oxide 230 is provided with the conductor 252a in contact with the side surface of the oxide 230. The opening is formed so that the side surface of oxide 230 is exposed at the opening.

[0587] Next, a rare gas is added to the oxide 230 exposed by the opening. Similarly to the above, for example, ion implantation, in which ionized source gas is mass-separated and added, Ion doping is a method of adding ionized raw material gas without mass separation, and plasma immersion is a method of The ion implantation method, plasma treatment, etc. can be used. By adding the oxide 230, a region 233 is formed in the region 231 of the oxide 230 (see FIG. 49). ).

[0588] Next, the conductors 252 (conductor 252a, conductor 252b, conductor 252c, conductor 252 d) is formed (see FIG. 50). Also, if necessary, it is electrically connected to the conductor 252. A conductor may be formed.

[0589] Through the above steps, a semiconductor device including the transistor 202 and the capacitor 101 can be manufactured. As shown in FIGS. 30 to 50, the manufacturing method of the semiconductor device described in this embodiment mode can be performed. By using the above, the transistor 202 and the capacitor 101 can be manufactured.

[0590] According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with low off-state current can be provided. According to one embodiment of the present invention, a transistor with high on-state current can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a semiconductor device with high productivity can be provided. can.

[0591] As described above, the configurations, methods, etc. shown in this embodiment may be applied to the configurations, methods, etc. shown in other embodiments. They can be used in any suitable combination.

[0592] (Embodiment 3) In this embodiment mode, one mode of a semiconductor device will be described with reference to FIGS.

[0593] [Storage device 1] The memory device shown in FIG. 51 includes a transistor 200, a capacitor 100, and a transistor 3 00 and has.

[0594] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. The transistor 200 can be used for a memory device because its off-state current is small. This allows the memory contents to be retained for a long period of time. Since no refresh is required or the frequency of refresh operations is extremely low, the Power consumption can be reduced significantly.

[0595] In the memory device shown in FIG. 51, the wiring 3001 is electrically connected to the source of the transistor 300. The wiring 3002 is electrically connected to the drain of the transistor 300. The wiring 3003 is electrically connected to one of the source and drain of the transistor 200. The wiring 3004 is electrically connected to the first gate of the transistor 200. 6 is electrically connected to the second gate of the transistor 200. The other of the source and drain of the capacitor 200 functions as one of the electrodes of the capacitor element 100. The openings formed in the insulators 220, 222, 224, and oxide 230a are The wiring 3005 is electrically connected to the gate of the transistor 300 through a capacitor. The other electrode of the element 100 is electrically connected to the other electrode of the element 100.

[0596] The memory device shown in FIG. 51 has a characteristic that the potential of the gate of the transistor 300 can be maintained. This allows information to be written, stored, and read, as shown below.

[0597] Writing and holding of data will be described. First, the potential of the fourth wiring 3004 is changed by a transistor. The transistor 200 is set to a potential at which it becomes conductive, thereby making the transistor 200 conductive. As a result, the potential of the third wiring 3003 is applied to the gate of the transistor 300 and the capacitor The voltage is applied to a node SN electrically connected to one of the electrodes of the transistor 100. A predetermined charge is applied to the gate of 00 (write). Here, two different potentials are applied. Either the charge that gives the level (hereinafter referred to as the low-level charge or the high-level charge) After that, the potential of the fourth wiring 3004 is set to the value By setting the potential to a non-conducting state, the transistor 200 is made non-conducting. The charge is held in the SN (retention).

[0598] When the off-state current of the transistor 200 is small, the charge of the node SN is held for a long period of time. will be done.

[0599] Next, reading of information will be described. A predetermined potential (constant potential) is applied to the first wiring 3001. When an appropriate potential (read potential) is applied to the fifth wiring 3005 in this state, the second wiring 3002 takes a potential according to the amount of charge held in the node SN. If 300 is an n-channel type, a high level charge is applied to the gate of transistor 300. The apparent threshold voltage V th_H is the gate of transistor 300 The apparent threshold voltage V when a low-level charge is applied to th_L Lower Here, the apparent threshold voltage is the voltage at which the transistor 300 is in a "conducting state." The potential of the fifth wiring 3005 is required to achieve the "fifth state." The potential of the wiring 3005 is V th_H and V th_L By setting the potential between For example, in a write operation, a high charge is applied to node SN. When the h level charge is applied, the potential of the fifth wiring 3005 becomes V0 (>V th_ H ), the transistor 300 is in a "conducting state." When a Bell charge is applied, the potential of the fifth wiring 3005 becomes V0 ( <V th_L ) Even if the second wiring By determining the potential of 3002, the information stored in node SN can be read out. Cut.

[0600] <Structure of memory device 1> As shown in FIG. 51, a memory device according to one embodiment of the present invention includes a transistor 300, a transistor 201, and a transistor 202. 00 and a capacitor element 100. The transistor 200 is provided above the transistor 300. The capacitor 100 is provided in the same layer as the transistor 200 .

[0601] The transistor 300 is disposed on a substrate 311, and includes a conductor 316, an insulator 315, and a substrate 316. 11, and functions as a source region or a drain region. The low resistance region 314a and the low resistance region 314b are connected to each other.

[0602] Transistor 300 can be either p-channel or n-channel.

[0603] The region where the channel of the semiconductor region 313 is formed, the region nearby, the source region, or the drain region In the low resistance region 314a and the low resistance region 314b, which are the drain region, silicon is It preferably contains a semiconductor such as a silicon-based semiconductor, and preferably contains single crystal silicon. Or Ge (germanium), SiGe (silicon germanium), GaAs (gallium It may be formed of a material containing gallium aluminum arsenide (GaAlAs), GaAlAs (Gallium Aluminum Arsenide), etc. By applying stress to the crystal lattice and changing the lattice spacing, we can control the effective mass of silicon. Alternatively, GaAs and GaAlAs may be used to form a transistor. The 300 is a HEMT (High Electron Mobility Transistor) tor) can also be used.

[0604] The low resistance region 314a and the low resistance region 314b are semiconductor regions applied to the semiconductor region 313. In addition to the body material, elements that impart n-type conductivity, such as arsenic or phosphorus, or p-type conductivity, such as boron, are added. The element imparting electrical conductivity is included.

[0605] The insulator 315 functions as a gate insulating film for the transistor 300 .

[0606] The conductor 316 that functions as the gate electrode is made of an element that gives n-type conductivity, such as arsenic or phosphorus. Semiconductor materials such as silicon that contain elements that impart p-type conductivity, such as silicon or boron A conductive material such as a metal material, an alloy material, or a metal oxide material can be used.

[0607] The threshold voltage can be adjusted by determining the work function depending on the conductor material. Specifically, it is preferable to use materials such as titanium nitride and tantalum nitride for the conductor. Furthermore, in order to achieve both conductivity and embeddability, tungsten or aluminum is used as the conductor. It is preferable to use any metal material for the lamination, and tungsten is particularly preferable because of its heat resistance. It is preferable in terms of sex.

[0608] The transistor 300 shown in FIG. 51 is an example, and the structure is not limited to this. An appropriate transistor may be used depending on the type and driving method.

[0609] Over the transistor 300 are insulators 320, 322, 324, and The bodies 326 are stacked one on top of the other.

[0610] The insulators 320, 322, 324, and 326 may be, for example, oxide. Silicon, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, oxide Aluminum oxynitride, aluminum nitride oxide, aluminum nitride, etc. may be used.

[0611] The insulator 322 smooths out the steps caused by the transistor 300 and other components disposed below it. For example, the top surface of the insulator 322 may have a function as a planarizing film. To improve flatness, the surface is flattened by a planarization process such as chemical mechanical polishing (CMP). It's fine.

[0612] The insulator 324 is also provided with a substrate 311 or a transistor 300 or the like. A film having a barrier property that prevents diffusion of hydrogen and impurities is used in the region where the capacitor 200 is provided. It is preferable that

[0613] An example of a film having a barrier property against hydrogen is silicon nitride formed by a CVD method. Here, a semiconductor having an oxide semiconductor such as the transistor 200 can be used. The diffusion of hydrogen into the element may cause a deterioration in the characteristics of the semiconductor element. A film that suppresses hydrogen diffusion is used between the transistor 200 and the transistor 300. Specifically, the film that suppresses hydrogen diffusion is a film that releases a small amount of hydrogen. do.

[0614] The amount of desorbed hydrogen can be analyzed using, for example, thermal desorption spectroscopy (TDS). For example, the amount of hydrogen desorption from the insulator 324 was measured by TDS analysis from 50°C to 500°C. In the range of °C, the amount of desorption converted into hydrogen atoms is converted into per area of ​​the insulator 324. , 10×10 15 atoms / cm 2 Less than or equal to 5 x 10 15 atoms / cm 2 The following is fine.

[0615] It is preferable that the insulator 326 has a lower dielectric constant than the insulator 324. For example, The dielectric constant of the insulator 326 is preferably less than 4, more preferably less than 3. The relative dielectric constant of the insulating material 26 is preferably 0.7 times or less than the relative dielectric constant of the insulating material 324, and more preferably 0.6 times or less. It is more preferable to use a material with a low dielectric constant as the interlayer film to reduce the parasitic capacitance that occurs between wiring. It is possible.

[0616] In addition, the insulators 320, 322, 324, and 326 are provided with a capacitance element 1. 00, or a conductor 328 electrically connected to the transistor 200, and a conductor 330 The conductors 328 and 330 are plugs or wiring. The conductor having the function of a plug or wiring is In some cases, the same reference numerals are used to denote the same structures. The wiring and the plug that electrically connects thereto may be an integral part. In some cases it functions as a line, and in other cases a portion of the conductor functions as a plug.

[0617] The materials for each plug and wiring (conductor 328, conductor 330, etc.) are metal materials. Conductive materials such as metals, alloys, metal nitrides, or metal oxides are deposited as single layers or They can be used in layers. Materials such as tungsten and molybdenum, which have both heat resistance and conductivity, are It is preferable to use a high melting point material such as tungsten. It is preferable to form the conductive layer from a low-resistance conductive material such as aluminum or copper. By using this, the wiring resistance can be reduced.

[0618] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. An insulator 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or wiring. The conductors 328 and 330 can be formed using the same materials.

[0619] For example, the insulator 350 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator. In addition, the conductor 356 has a barrier property against hydrogen. It is preferable that the insulating material 350 contains a conductor. In particular, the insulating material 350 has a barrier property against hydrogen. In the opening, a conductor having a barrier property against hydrogen is formed. The transistor 300 and the transistor 200 can be separated by a barrier layer. This can suppress the diffusion of hydrogen from the resistor 300 to the transistor 200.

[0620] As a conductor having a barrier property against hydrogen, for example, tantalum nitride or the like is used. In addition, by laminating tantalum nitride and highly conductive tungsten, The diffusion of hydrogen from the transistor 300 can be suppressed while maintaining the conductivity of the transistor 300. In this case, the tantalum nitride layer having a barrier property against hydrogen has a barrier property against hydrogen. It is preferable that the insulating material 350 is in contact with the insulating material 350.

[0621] A wiring layer may be provided on the insulator 354 and the conductor 356. For example, in FIG. An insulator 360, an insulator 362, and an insulator 364 are stacked in this order. In addition, a conductor 366 is formed on the insulators 360, 362, and 364. The conductor 366 functions as a plug or wiring. The conductors 328 and 330 can be formed using the same materials.

[0622] For example, the insulator 360 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator. The conductor 366 has a barrier property against hydrogen. It is preferable that the insulating material 360 contains a conductor. In particular, the insulating material 360 has a barrier property against hydrogen. In the opening, a conductor having a barrier property against hydrogen is formed. The transistor 300 and the transistor 200 can be separated by a barrier layer. This can suppress the diffusion of hydrogen from the resistor 300 to the transistor 200.

[0623] A wiring layer may be provided on the insulator 364 and the conductor 366. For example, in FIG. An insulator 370, an insulator 372, and an insulator 374 are stacked in this order. In addition, a conductor 376 is formed on the insulators 370, 372, and 374. The conductor 376 functions as a plug or wiring. The conductors 328 and 330 can be formed using the same materials.

[0624] For example, the insulator 370 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator. In addition, the conductor 376 has a barrier property against hydrogen. It is preferable that the insulating material 370 contains a conductor. In particular, the insulating material 370 has a barrier property against hydrogen. In the opening, a conductor having a barrier property against hydrogen is formed. The transistor 300 and the transistor 200 can be separated by a barrier layer. This can suppress the diffusion of hydrogen from the resistor 300 to the transistor 200.

[0625] A wiring layer may be provided on the insulator 374 and the conductor 376. For example, in FIG. An insulator 380, an insulator 382, ​​and an insulator 384 are stacked in this order. In addition, a conductor 386 is formed on the insulators 380, 382, ​​and 384. The conductor 386 functions as a plug or wiring. The conductors 328 and 330 can be formed using the same materials.

[0626] For example, the insulator 380 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator. The conductor 386 has a barrier property against hydrogen. It is preferable that the insulating material 380 has a barrier property against hydrogen. In the opening, a conductor having a barrier property against hydrogen is formed. The transistor 300 and the transistor 200 can be separated by a barrier layer. This can suppress the diffusion of hydrogen from the resistor 300 to the transistor 200.

[0627] The insulator 210 is provided on the insulator 384 and the conductor 386. It is preferable to use a material that has a barrier property against oxygen and hydrogen.

[0628] On insulator 210, conductor 203, conductor 205, and insulator 216 are provided.

[0629] The insulator 210 may include, for example, a substrate 311 or a region where the transistor 300 is to be provided. Therefore, the region where the transistor 200 is provided has a barrier property to prevent diffusion of hydrogen and impurities. Therefore, the same material as the insulator 324 can be used. do.

[0630] As an example of a film with barrier properties against hydrogen, silicon nitride formed by CVD is used. Here, a semiconductor element including an oxide semiconductor such as the transistor 200 can be The diffusion of hydrogen may deteriorate the characteristics of the semiconductor element. It is preferable to use a film that suppresses hydrogen diffusion between the capacitor 200 and the transistor 300. ...

Claims

1. forming a first conductive film on an insulating surface; forming a second conductive film on the first conductive film; patterning the second conductive film and the first conductive film to form a first conductor and a second conductor on the first conductor; forming a first insulating film to cover the first conductor and the second conductor; forming a first insulator by processing the first insulating film so that the second conductor is exposed; forming a second insulator on the first insulator and the second conductor; forming a first oxide film on the second insulator; forming an opening in the first oxide film and the second insulator, the opening overlapping at least a portion of the first conductor; forming a second oxide film on the first oxide film and the first conductor; The method for manufacturing a semiconductor device includes patterning the second oxide film and the first oxide film to form a first oxide and a second oxide on the first oxide.

2. In claim 1, patterning the second conductive film and the first conductive film to further form a third conductor and a fourth conductor on the third conductor; forming a third oxide film on the second oxide; forming a second insulating film on the third oxide film; forming a third conductive film on the second insulating film; patterning the third conductive film to form a fifth conductor; patterning the second insulating film to form a third insulator; patterning the third oxide film to form a third oxide; A method for manufacturing a semiconductor device, wherein the fifth conductor overlaps with the third conductor and the fourth conductor, with the second insulator, the first oxide, the second oxide, the third oxide, and the third insulator sandwiched therebetween.

3. In claim 1, The second conductive film includes a metal nitride.

4. In claim 3, The method for manufacturing a semiconductor device, wherein the metal nitride is titanium nitride or tantalum nitride.

5. a first conductor; a first insulator on the first conductor; a first oxide on the first insulator; a second oxide on the first oxide; a third oxide on the second oxide; and a second insulator on the third oxide; a second conductor on the second insulator; and a third insulator provided on a side surface of the second insulator and a side surface of the second conductor; a fourth insulator provided on a side surface of the third insulator; and an opening overlapping a portion of the first conductor is provided in the first oxide and the first insulator; The second oxide is electrically connected to the first conductor through the opening.

6. In claim 5, A semiconductor device in which the side surfaces of the second oxide and the third oxide are flush with the side surfaces of the first oxide.

7. In claim 5, A semiconductor device in which an end of the second oxide and an end of the third oxide substantially coincide with an end of the first oxide.

8. In claim 5, The semiconductor device further comprises: a third conductor; and a fourth oxide; and and the fourth oxide is provided between the third oxide and the second insulator; A semiconductor device in which the third conductor overlaps the second conductor, sandwiching the first insulator, the first oxide, the second oxide, the third oxide, the fourth oxide, and the second insulator therebetween.

9. In claim 8, The first conductor and the third conductor are made of the same material.

10. forming a first insulating film on the first conductor and the second conductor; forming a first oxide film on the first insulating film; forming an opening in the first oxide film and the first insulating film, the opening overlapping at least a portion of the first conductor; forming a second oxide film on the first oxide film and the first conductor; forming a third oxide film on the second oxide film; The third oxide film, the second oxide film, and the first oxide film are patterned to form a first oxide film, forming a second oxide on the first oxide and a third oxide on the second oxide; forming a second insulating film so as to cover the first oxide, the second oxide, and the third oxide; forming a first conductive film on the second insulating film; patterning the first conductive film and the second insulating film to form a third conductor and a first insulator; forming a third insulating film so as to cover the third conductor and the first insulator; forming a fourth insulating film on the third insulating film; The fourth insulating film and the third insulating film are processed by etching to form a side surface of the third conductor; and a method for manufacturing a semiconductor device, wherein a second insulator is formed on a side surface of the first insulator, and a third insulator is formed on a side surface of the second insulator.

11. In claim 10, A method for manufacturing a semiconductor device, wherein the third conductor overlaps with the second conductor, with the first insulating film, the first oxide, the second oxide, the third oxide, and the first insulator sandwiched therebetween.

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