Wiring board and manufacturing method thereof

Abstract

To provide a wiring board capable of suppressing a decrease in the strength of a core layer.SOLUTION: A wiring board of the present invention has a translucent core layer, a first photoelectric conversion member arranged on one surface of the core layer, a first wiring layer electrically connected to the first photoelectric conversion member, a second photoelectric conversion member arranged on the other surface of the core layer, and a second wiring layer electrically connected to the second photoelectric conversion member. The first photoelectric conversion member and the second photoelectric conversion member are arranged in positions where optical signals can be transmitted and received via the core layer.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a wiring board and a manufacturing method thereof. [Background technology]

[0002] A wiring board is known in which through holes are formed in a substrate that serves as a core layer. In such a wiring board, wiring layers formed on both sides of the core layer are electrically connected via through-hole wiring arranged in the through-holes. If the number of through-holes is large, the strength of the core layer may decrease. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-009813 Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention has been made in view of the above points, and has an object to provide a wiring board that can suppress a decrease in the strength of the core layer. [Means for solving the problem]

[0005] This wiring board has a translucent core layer, a first photoelectric conversion element arranged on one surface of the core layer, a first wiring layer electrically connected to the first photoelectric conversion element, a second photoelectric conversion element arranged on the other surface of the core layer, and a second wiring layer electrically connected to the second photoelectric conversion element, and the first photoelectric conversion element and the second photoelectric conversion element are arranged in positions where optical signals can be transmitted and received via the core layer. [Effects of the Invention]

[0006] According to the disclosed technique, it is possible to provide a wiring board capable of suppressing a decrease in the strength of the core layer. [Brief explanation of the drawings]

[0007] [Figure 1] 1 is a cross-sectional view illustrating a wiring board according to a first embodiment. [Figure 2] 1A to 1C are views (part 1) illustrating a manufacturing process of a wiring board according to the first embodiment. [Figure 3] 5A to 5C are diagrams illustrating the manufacturing process of the wiring board according to the first embodiment (part 2). [Figure 4] 10A to 10C are views (part 3) illustrating the manufacturing process of the wiring board according to the first embodiment. [Figure 5] 10A to 10C are views (part 4) illustrating the manufacturing process of the wiring board according to the first embodiment. [Figure 6] FIG. 10 is a cross-sectional view illustrating a wiring board according to a modified example of the first embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the same components are denoted by the same reference numerals, and redundant explanations may be omitted.

[0009] First Embodiment [Wiring board structure] 1 is a cross-sectional view illustrating a wiring board according to a first embodiment. Referring to Fig. 1, the wiring board 1 is a wiring board in which wiring layers and insulating layers are laminated on both sides of a core layer 10.

[0010] Specifically, in the wiring board 1, a wiring layer 11, an insulating layer 12, an insulating layer 13, an insulating layer 14, a wiring layer 15, an insulating layer 16, a wiring layer 17, and a solder resist layer 18 are sequentially stacked on one surface 10a of the core layer 10. Also, a wiring layer 21, an insulating layer 22, an insulating layer 23, an insulating layer 24, a wiring layer 25, an insulating layer 26, a wiring layer 27, and a solder resist layer 28 are sequentially stacked on the other surface 10b of the core layer 10.

[0011] In the first embodiment, for convenience, the solder resist layer 18 side of the wiring board 1 is referred to as the upper side or one side, and the solder resist layer 28 side is referred to as the lower side or the other side. The surface of each part facing the solder resist layer 18 is referred to as one side or the upper side, and the surface facing the solder resist layer 28 is referred to as the other side or the lower side. However, the wiring board 1 can be used upside down or positioned at any angle. Furthermore, a planar view refers to viewing an object from the normal direction of one surface 10a of the core layer 10, and a planar shape refers to the shape of the object viewed from the normal direction of one surface 10a of the core layer 10.

[0012] The core layer 10 is translucent. Here, translucent refers to a transmittance of 80% or more at the wavelength of light emitted by the photoelectric conversion member described below. The core layer 10 can be made of, for example, glass. In this case, any type of glass can be used, and examples of the glass that can be used include alkali-free glass, quartz glass, and borosilicate glass. The core layer 10 may be made of translucent sapphire. The core layer 10 may be made of a translucent resin. The thickness of the core layer 10 is, for example, about 100 to 1000 μm.

[0013] The wiring layer 11 is disposed on one surface 10a of the core layer 10. The wiring layer 11 is patterned into a predetermined planar shape. The wiring layer 11 may be made of, for example, copper (Cu). The thickness of the wiring layer 11 is, for example, about 10 to 40 μm. The wiring layer 11 is a typical example of a third wiring layer according to the present invention.

[0014] The insulating layer 12 is formed on one surface 10a of the core layer 10 so as to cover the wiring layer 11. The material of the insulating layer 12 can be, for example, a non-photosensitive thermosetting resin whose main component is an epoxy resin or the like. The material of the insulating layer 12 can also be a photosensitive resin. The thickness of the insulating layer 12 is, for example, approximately 25 to 40 μm. The insulating layer 12 may contain a filler such as silica (SiO2). The insulating layer 12 has openings 12x and 12y. One surface 10a of the core layer 10 is exposed in the openings 12x and 12y.

[0015] A photoelectric conversion member 40A is disposed on one surface 10a of the core layer 10 exposed in the opening 12x via a light-transmitting optical adhesive 30. A photoelectric conversion member 40B is disposed on one surface 10a of the core layer 10 exposed in the opening 12y via a light-transmitting optical adhesive 30. The thicknesses of the photoelectric conversion members 40A and 40B are preferably thinner than the thickness of the insulating layer 12.

[0016] The photoelectric conversion member 40A has an electrode, which is exposed in the opening 12x. Similarly, the photoelectric conversion member 40B has an electrode, which is exposed in the opening 12y. The photoelectric conversion members 40A and 40B convert optical signals into electrical signals. The photoelectric conversion members 40A and 40B may have the same specifications or different specifications. The photoelectric conversion members 40A and 40B are representative examples of the first photoelectric conversion member according to the present invention. The number of first photoelectric conversion members may be one, three, or more.

[0017] The photoelectric conversion members 40A and 40B are capable of converting input optical signals into electrical signals and outputting them, and also converting input electrical signals into optical signals and outputting them. The photoelectric conversion members 40A and 40B include, for example, a light-receiving element that converts optical signals into electrical signals, a light-emitting element that converts electrical signals into optical signals, and a control circuit that controls the conversion between optical and electrical signals. The light-receiving element is, for example, a photodiode. The light-emitting element is, for example, a laser diode or a light-emitting diode.

[0018] The photoelectric conversion members 40A and 40B may include a light-receiving element that converts an optical signal into an electrical signal, but may not include a light-emitting element that converts an electrical signal into an optical signal. Alternatively, the photoelectric conversion members 40A and 40B may include a light-emitting element that converts an electrical signal into an optical signal, but may not include a light-receiving element that converts an optical signal into an electrical signal. In these cases, the photoelectric conversion members 40A and 40B may include a control circuit.

[0019] The insulating layer 13 is disposed within the openings 12x and 12y on one surface 10a of the core layer 10 and covers the photoelectric conversion members 40A and 40B. The upper surface of the insulating layer 13 may be flush with the upper surface of the insulating layer 12, for example. The insulating layer 13 may extend upward from within the openings 12x and 12y to cover the upper surface of the insulating layer 12 and fill the space between the insulating layer 12 and the insulating layer 14. The material of the insulating layer 13 may be the same as that of the insulating layer 12, for example. The insulating layer 13 may be formed from a material different from that of the insulating layer 12. For example, a resin having better embeddability than the insulating layer 12 may be selected for the insulating layer 13. The insulating layer 13 is a representative example of a first insulating layer according to the present invention.

[0020] The insulating layer 14 is formed on the upper surfaces of the insulating layers 12 and 13. The material of the insulating layer 14 is, for example, the same as that of the insulating layer 12. The insulating layer 14 may contain a filler such as silica (SiO2). The insulating layer 14 has a via hole 14x. The via hole 14x penetrates the insulating layers 13 and 14 and exposes at least a portion of the electrodes of the photoelectric conversion members 40A and 40B. The via hole 14x may be, for example, an inverted truncated cone-shaped recess in which the diameter of the opening on the insulating layer 16 side is larger than the diameter of the bottom of the opening formed by the upper surfaces of the electrodes of the photoelectric conversion members 40A and 40B.

[0021] The wiring layer 15 fills the via holes 14x and is electrically connected to the electrodes of the photoelectric conversion members 40A and 40B, and extends from within the via holes 14x to the upper surface of the insulating layer 14. Specifically, the wiring layer 15 includes via wiring filled within the via holes 14x and a wiring pattern formed on the upper surface of the insulating layer 14. The wiring pattern of the wiring layer 15 is electrically connected to the electrodes of the photoelectric conversion members 40A and 40B via the via wiring. The material of the wiring layer 15 and the thickness of the wiring pattern are, for example, the same as those of the wiring layer 11. Via holes may be formed penetrating the insulating layers 12 and 14, and the wiring layer 15 and the wiring layer 11 may be electrically connected through these via holes. The wiring layer 15 is a representative example of a first wiring layer according to the present invention.

[0022] The insulating layer 16 is formed on the upper surface of the insulating layer 14 so as to cover the wiring layer 15. The material of the insulating layer 16 is, for example, the same as that of the insulating layer 12. The insulating layer 16 may contain a filler such as silica (SiO2). The insulating layer 16 has a via hole 16x. The via hole 16x penetrates the insulating layer 16 and exposes the upper surface of the wiring layer 15. The via hole 16x can be, for example, an inverted truncated cone-shaped recess in which the diameter of the opening on the solder resist layer 18 side is larger than the diameter of the bottom of the opening formed by the upper surface of the wiring layer 15.

[0023] The wiring layer 17 fills the via holes 16x to be electrically connected to the wiring layer 15, and extends from the via holes 16x to the upper surface of the insulating layer 16. In detail, the wiring layer 17 includes via wirings filled in the via holes 16x and a wiring pattern formed on the upper surface of the insulating layer 16. The wiring pattern of the wiring layer 17 is electrically connected to the wiring layer 15 through the via wirings. The material of the wiring layer 17 and the thickness of the wiring pattern are similar to those of the wiring layer 11, for example.

[0024] The solder resist layer 18 is a protective insulating layer located at the outermost position on one side of the wiring board 1, and is formed on the upper surface of the insulating layer 16 so as to cover the wiring layer 17. The solder resist layer 18 has openings 18x, and a portion of the upper surface of the wiring layer 17 is exposed in the openings 18x. The planar shape of the openings 18x is, for example, circular. The wiring layer 17 exposed in the openings 18x can be used as a pad for electrical connection to a semiconductor chip or the like. The material of the solder resist layer 18 can be, for example, a photosensitive insulating resin whose main component is a phenolic resin or a polyimide resin. The solder resist layer 18 may contain a filler such as silica (SiO2). The thickness of the solder resist layer 18 is, for example, approximately 25 to 40 μm.

[0025] A surface treatment layer may be formed on the upper surface of the wiring layer 17 exposed in the opening 18x. Examples of the surface treatment layer include an Au layer, a Ni / Au layer (a metal layer formed by laminating a Ni layer and an Au layer in this order), and a Ni / Pd / Au layer (a metal layer formed by laminating a Ni layer, a Pd layer, and an Au layer in this order). Alternatively, the surface treatment layer may be formed by subjecting the upper surface of the wiring layer 17 exposed in the opening 18x to an anti-oxidation treatment such as an organic solderability preservative (OSP) treatment. The OSP treatment can form an organic coating made of an azole compound, an imidazole compound, or the like as the surface treatment layer. Alternatively, a protruding electrode such as a metal post may be formed on the upper surface of the wiring layer 17 exposed in the opening 18x.

[0026] The wiring layer 21 is disposed on the other surface 10b of the core layer 10. The wiring layer 21 is patterned into a predetermined planar shape. The wiring layer 21 may have the same dimensions and thickness as the wiring layer 11, for example. The wiring layer 21 is a representative example of a fourth wiring layer according to the present invention.

[0027] The insulating layer 22 is formed on the other surface 10b of the core layer 10 so as to cover the wiring layer 21. The material and thickness of the insulating layer 22 can be, for example, the same as those of the insulating layer 12. The insulating layer 22 may contain a filler such as silica (SiO2). The insulating layer 22 has openings 22x and 22y. The other surface 10b of the core layer 10 is exposed in the openings 22x and 22y.

[0028] A photoelectric conversion member 40C is disposed on the other surface 10b of the core layer 10 exposed in the opening 22x via a light-transmitting optical adhesive 30. A photoelectric conversion member 40D is disposed on the other surface 10b of the core layer 10 exposed in the opening 22y via a light-transmitting optical adhesive 30. The thicknesses of the photoelectric conversion members 40C and 40D are preferably thinner than the thickness of the insulating layer 22.

[0029] The photoelectric conversion member 40C has an electrode, which is exposed in the opening 22x. Similarly, the photoelectric conversion member 40D has an electrode, which is exposed in the opening 22y. The photoelectric conversion members 40C and 40D convert optical signals into electrical signals. The photoelectric conversion members 40C and 40D may have the same specifications or different specifications. The photoelectric conversion members 40C and 40D are representative examples of the second photoelectric conversion member according to the present invention. The number of second photoelectric conversion members may be one, three, or more.

[0030] The photoelectric conversion members 40C and 40D are capable of converting input optical signals into electrical signals and outputting them, and also converting input electrical signals into optical signals and outputting them. The photoelectric conversion members 40C and 40D include, for example, a light-receiving element that converts optical signals into electrical signals, a light-emitting element that converts electrical signals into optical signals, and a control circuit that controls the conversion between optical and electrical signals. The light-receiving element is, for example, a photodiode. The light-emitting element is, for example, a laser diode or a light-emitting diode.

[0031] The photoelectric conversion members 40C and 40D may include a light-receiving element that converts an optical signal into an electrical signal, but may not include a light-emitting element that converts an electrical signal into an optical signal. Alternatively, the photoelectric conversion members 40C and 40D may include a light-emitting element that converts an electrical signal into an optical signal, but may not include a light-receiving element that converts an optical signal into an electrical signal. In these cases, the photoelectric conversion members 40C and 40D may include a control circuit.

[0032] The photoelectric conversion member 40C is disposed at a position where it can transmit and receive light to and from the photoelectric conversion member 40A via the core layer 10. The photoelectric conversion member 40C can be disposed, for example, at a position where it overlaps with the photoelectric conversion member 40A in a planar view. Similarly, the photoelectric conversion member 40D is disposed at a position where it can transmit and receive light to and from the photoelectric conversion member 40B via the core layer 10. The photoelectric conversion member 40D can be disposed, for example, at a position where it overlaps with the photoelectric conversion member 40B in a planar view.

[0033] If the photoelectric conversion members 40A and 40B have a light-emitting element but not a light-receiving element, the photoelectric conversion members 40C and 40D may have a light-receiving element but not a light-emitting element. Alternatively, if the photoelectric conversion members 40A and 40B have a light-receiving element but not a light-emitting element, the photoelectric conversion members 40C and 40D may have a light-emitting element but not a light-receiving element.

[0034] The insulating layer 23 is disposed within the openings 22x and 22y on the other surface 10b of the core layer 10 and covers the photoelectric conversion members 40C and 40D. The lower surface of the insulating layer 23 may be flush with the lower surface of the insulating layer 22, for example. The insulating layer 23 may extend downward from within the openings 22x and 22y to cover the lower surface of the insulating layer 22 and fill the gap between the insulating layer 22 and the insulating layer 24. The material of the insulating layer 23 may be the same as that of the insulating layer 22, for example. The insulating layer 23 may be formed from a material different from that of the insulating layer 22. For example, a resin having better embeddability than the insulating layer 22 may be selected for the insulating layer 23. The insulating layer 23 is a representative example of a second insulating layer according to the present invention.

[0035] The insulating layer 24 is formed on the lower surfaces of the insulating layers 22 and 23. The material of the insulating layer 24 is, for example, the same as that of the insulating layer 22. The insulating layer 24 may contain a filler such as silica (SiO2). The insulating layer 24 has a via hole 24x. The via hole 24x penetrates the insulating layers 23 and 24 and exposes at least a portion of the electrodes of the photoelectric conversion members 40C and 40D. The via hole 24x may be, for example, a truncated cone-shaped recess whose opening on the insulating layer 26 side has a diameter larger than the diameter of the bottom of the opening formed by the lower surfaces of the electrodes of the photoelectric conversion members 40C and 40D.

[0036] The wiring layer 25 fills the via holes 24x and is electrically connected to the electrodes of the photoelectric conversion members 40C and 40D, and extends from within the via holes 24x to the lower surface of the insulating layer 24. Specifically, the wiring layer 25 includes via wiring filled within the via holes 24x and a wiring pattern formed on the lower surface of the insulating layer 24. The wiring pattern of the wiring layer 25 is electrically connected to the electrodes of the photoelectric conversion members 40C and 40D via the via wiring. The material of the wiring layer 25 and the thickness of the wiring pattern are, for example, the same as those of the wiring layer 11. Note that via holes may be formed penetrating the insulating layers 22 and 24, and the wiring layer 25 and the wiring layer 21 may be electrically connected through these via holes. Note that the wiring layer 25 is a representative example of a second wiring layer according to the present invention.

[0037] The insulating layer 26 is formed on the lower surface of the insulating layer 24 so as to cover the wiring layer 25. The material of the insulating layer 26 is, for example, the same as that of the insulating layer 12. The insulating layer 26 may contain a filler such as silica (SiO2). The insulating layer 26 has a via hole 26x. The via hole 26x penetrates the insulating layer 26 and exposes the lower surface of the wiring layer 25. The via hole 26x can be, for example, a truncated cone-shaped recess in which the diameter of the opening on the solder resist layer 28 side is larger than the diameter of the bottom of the opening formed by the lower surface of the wiring layer 25.

[0038] The wiring layer 27 fills the via holes 26x and is electrically connected to the wiring layer 25, and extends from the via holes 26x to the lower surface of the insulating layer 26. In detail, the wiring layer 27 includes via wirings filled in the via holes 26x and a wiring pattern formed on the lower surface of the insulating layer 26. The wiring pattern of the wiring layer 27 is electrically connected to the wiring layer 25 through the via wirings. The material of the wiring layer 27 and the thickness of the wiring pattern are similar to those of the wiring layer 11, for example.

[0039] The solder resist layer 28 is a protective insulating layer located at the outermost position on the other side of the wiring board 1, and is formed on the lower surface of the insulating layer 26 so as to cover the wiring layer 27. The solder resist layer 28 has openings 28x, and a portion of the lower surface of the wiring layer 27 is exposed in the openings 28x. The planar shape of the openings 28x is, for example, circular. The wiring layer 27 exposed in the openings 28x can be used as a pad for electrical connection to another wiring board, etc. The material of the solder resist layer 28 can be, for example, a photosensitive insulating resin whose main component is a phenolic resin or a polyimide resin. The solder resist layer 28 may contain a filler such as silica (SiO2). The thickness of the solder resist layer 28 is, for example, approximately 25 to 40 μm.

[0040] A surface treatment layer may be formed on the lower surface of the wiring layer 27 exposed in the opening 28x. Examples of the surface treatment layer are as described above. Furthermore, a protruding electrode such as a metal post may be formed on the lower surface of the wiring layer 27 exposed in the opening 28x.

[0041] As described above, the wiring board 1 includes a light-transmitting core layer 10, photoelectric conversion members 40A and 40B disposed on one surface 10a of the core layer 10, and a wiring layer 15 electrically connected to the photoelectric conversion members 40A and 40B. The wiring board 1 also includes photoelectric conversion members 40C and 40D disposed on the other surface 10b of the core layer 10, and a wiring layer 25 electrically connected to the photoelectric conversion members 40C and 40D. The photoelectric conversion members 40A and 40C, and the photoelectric conversion members 40B and 40D are disposed at positions where they can transmit and receive optical signals via the core layer 10.

[0042] This makes it possible to connect the wiring layer 15 and the wiring layer 25 by an optical signal that passes through the core layer 10. For example, an electrical signal input from the wiring layer 15 to the photoelectric conversion member 40A is converted into an optical signal by the photoelectric conversion member 40A and transmitted to the photoelectric conversion member 40C via the core layer 10. The photoelectric conversion member 40C converts the received optical signal into an electrical signal and sends it to the wiring layer 25. It is also possible to send and receive optical signals in the opposite direction.

[0043] That is, in the wiring board 1, signals can be transmitted and received between one surface 10a and the other surface 10b without providing through-hole wiring that penetrates the core layer 10. This makes it possible to reduce or eliminate the number of through-hole wiring that conventionally had to be provided in the core layer 10. As a result, it is possible to prevent a decrease in the strength of the core layer 10, and reduce the risk of damage to the core layer 10.

[0044] Furthermore, when the core layer 10 is made of glass, highly dangerous hydrofluoric acid is used to form through-holes in the core layer 10. Reducing or eliminating the number of through-holes can reduce the amount of hydrofluoric acid used, thereby improving safety. In addition, the cost of forming through-holes can be reduced.

[0045] [Method of manufacturing wiring board] 2 to 4 are diagrams illustrating the manufacturing process of the wiring board according to the first embodiment. Here, an example of the process for manufacturing one wiring board is shown, but the process may also be such that multiple parts that will become the wiring board are manufactured and then separated into individual wiring boards.

[0046] 2(a), a light-transmitting core layer 10 is prepared. Then, an unpatterned wiring layer 11 is formed on one surface 10a of the core layer 10, and an unpatterned wiring layer 21 is formed on the other surface 10b of the core layer 10. The wiring layers 11 and 21 can be formed by, for example, a sputtering method or an electroless plating method. Note that, in order to improve the adhesion between the wiring layers 11 and 21 and the core layer 10, a layer of a metal or metal oxide film different from the material constituting the wiring layers 11 and 21 may be formed on the core layer 10.

[0047] 2(b), the wiring layers 11 and 21 are patterned into a predetermined planar shape. The wiring layers 11 and 21 can be patterned using, for example, a well-known subtractive method.

[0048] 2(c), a semi-cured film-like epoxy resin or the like is laminated on one surface 10a of the core layer 10 so as to cover the wiring layer 11, and then cured to form the insulating layer 12. A semi-cured film-like epoxy resin or the like is laminated on the other surface 10b of the core layer 10 so as to cover the wiring layer 21, and then cured to form the insulating layer 22. Alternatively, instead of laminating a film-like epoxy resin or the like, a liquid or paste-like epoxy resin or the like may be applied and then cured to form the insulating layers 12 and 22. The thickness of the insulating layers 12 and 22 is preferably thicker than the photoelectric conversion member to be disposed thereafter.

[0049] Next, in the step shown in FIG. 2(d), openings 12x and 12y are formed in the insulating layer 12, penetrating the insulating layer 12 and exposing one surface 10a of the core layer 10. Also, openings 22x and 22y are formed in the insulating layer 22, penetrating the insulating layer 22 and exposing the other surface 10b of the core layer 10. The openings 12x and 22x are formed at positions facing each other across the core layer 10. Also, the openings 12y and 22y are formed at positions facing each other across the core layer 10. Each opening can be formed, for example, by laser processing using a CO2 laser or the like. The inner surfaces of each opening form a cavity for mounting a photoelectric conversion member.

[0050] 3(a), photoelectric conversion members 40A, 40B, 40C, and 40D each having an electrode are prepared. Then, the photoelectric conversion members 40A and 40B are disposed on one surface 10a of the core layer 10, and the photoelectric conversion members 40C and 40D are disposed on the other surface 10b of the core layer 10.

[0051] Specifically, a photoelectric conversion member 40A is disposed on one surface 10a of the core layer 10 exposed inside the opening 12x via a translucent optical adhesive 30 so that the electrodes are exposed from the opening 12x. Also, a photoelectric conversion member 40B is disposed on one surface 10a of the core layer 10 exposed inside the opening 12y via a translucent optical adhesive 30 so that the electrodes are exposed from the opening 12y.

[0052] Similarly, a photoelectric conversion member 40C is disposed on the other surface 10b of the core layer 10 exposed inside the opening 22x via a translucent optical adhesive 30 so that the electrodes are exposed from the opening 22x. Also, a photoelectric conversion member 40D is disposed on the other surface 10b of the core layer 10 exposed inside the opening 22y via a translucent optical adhesive 30 so that the electrodes are exposed from the opening 22y.

[0053] The photoelectric conversion member 40C is disposed at a position where it can transmit and receive light to and from the photoelectric conversion member 40A via the core layer 10. Similarly, the photoelectric conversion member 40D is disposed at a position where it can transmit and receive light to and from the photoelectric conversion member 40B via the core layer 10.

[0054] Next, in the step shown in FIG. 3(b), insulating layer 13 is formed, filling opening 12x to cover photoelectric conversion member 40A and opening 12y to cover photoelectric conversion member 40B. Also, insulating layer 23 is formed, filling opening 22x to cover photoelectric conversion member 40C and opening 22y to cover photoelectric conversion member 40D. Insulating layers 13 and 23 are formed, for example, by laminating a semi-cured film-like epoxy resin or the like so as to cover each photoelectric conversion member and then curing it. Alternatively, insulating layers 13 and 23 may be formed by applying and curing a liquid or paste-like epoxy resin or the like instead of laminating a film-like epoxy resin or the like.

[0055] 3(c), a semi-cured film-like epoxy resin or the like is laminated on the upper surfaces of insulating layers 12 and 13 and cured to form insulating layer 14. A semi-cured film-like epoxy resin or the like is laminated on the lower surfaces of insulating layers 22 and 23 and cured to form insulating layer 24. Alternatively, instead of laminating a film-like epoxy resin or the like, a liquid or paste-like epoxy resin or the like may be applied and cured to form insulating layers 14 and 24.

[0056] 4(a), via holes 14x are formed in the insulating layers 13 and 14, penetrating the insulating layers 13 and 14 to expose the electrodes of the photoelectric conversion members 40A and 40B. Also, via holes 24x are formed in the insulating layers 23 and 24, penetrating the insulating layers 23 and 24 to expose the electrodes of the photoelectric conversion members 40C and 40D. The via holes 14x and 24x can be formed, for example, by laser processing using a CO laser or the like. After the via holes 14x and 24x are formed, a desmear process is preferably performed to remove resin residue adhering to the surfaces of the electrodes exposed at the bottoms of the via holes 14x and 24x.

[0057] 4(b), a wiring layer 15 electrically connected to the photoelectric conversion members 40A and 40B is formed, and a wiring layer 25 electrically connected to the photoelectric conversion members 40C and 40C is also formed. The wiring layer 15 includes via wiring filled in the via holes 14x and a wiring pattern formed on the upper surface of the insulating layer 14. The wiring layer 25 includes via wiring filled in the via holes 24x and a wiring pattern formed on the lower surface of the insulating layer 24.

[0058] The wiring layers 15 and 25 can be formed using, for example, a semi-additive process. Specifically, a seed layer, for example, by electroless copper plating, is formed on the upper surface of the insulating layer 14, the inner surfaces of the via holes 14x, and the upper surfaces of the electrodes exposed in the via holes 14x. A plating resist pattern having openings corresponding to the shape of the wiring pattern of the wiring layer 15 is then formed on the seed layer. An electroplated layer is then deposited on the seed layer exposed in the openings of the plating resist pattern by electroplating copper or the like with power supplied from the seed layer. The plating resist pattern is then removed, and etching is then performed using the electroplated layer as a mask to remove the seed layer exposed from the electroplated layer, thereby obtaining the wiring layer 15 having via wiring and a wiring pattern. The wiring layer 25 can be formed in a similar manner.

[0059] Next, in the process shown in FIG. 4(c), an insulating layer 16 and a wiring layer 17 are formed on the wiring layer 15 in the same manner as in FIGS. 2(c), 4(a), and 4(b). An insulating layer 26 and a wiring layer 27 are formed on the wiring layer 25. A solder resist layer 18 is then formed on the upper surface of the insulating layer 16 so as to cover the wiring layer 17. A solder resist layer 28 is also formed on the lower surface of the insulating layer 26 so as to cover the wiring layer 27. The solder resist layer 18 can be formed, for example, by applying a liquid or paste-like photosensitive epoxy insulating resin or acrylic insulating resin to the upper surface of the insulating layer 16 so as to cover the wiring layer 17 by screen printing, roll coating, spin coating, or the like. Alternatively, the solder resist layer 28 can be formed by, for example, laminating a film-like photosensitive epoxy insulating resin or acrylic insulating resin on the upper surface of the insulating layer 16 so as to cover the wiring layer 17. The solder resist layer 28 can be formed in the same manner as the solder resist layer 18.

[0060] Next, the solder resist layers 18 and 28 are exposed and developed to form openings 18x in the solder resist layer 18 that expose a portion of the upper surface of the wiring layer 17. Also, openings 28x are formed in the solder resist layer 28 that expose a portion of the lower surface of the wiring layer 27. The planar shape of each of the openings 18x and 28x may be, for example, a circular shape. The diameter of each of the openings 18x and 28x can be designed as desired to suit the connection target (such as a semiconductor chip or a motherboard).

[0061] In this step, the above-mentioned metal layer may be formed by, for example, electroless plating on the upper surface of the wiring layer 17 exposed at the bottom of the opening 18x and the lower surface of the wiring layer 27 exposed at the bottom of the opening 28x. Alternatively, instead of forming a metal layer, an anti-oxidation treatment such as OSP treatment may be performed. Through the above steps, the wiring substrate 1 is completed.

[0062] The manufacturing method of the wiring substrate 1 may be modified as follows. First, the same steps as those shown in FIGS. 2(a) and 2(b) are performed. Then, in the step shown in FIG. 5(a), photoelectric conversion members 40A, 40B, 40C, and 40D each having an electrode are prepared. Then, the photoelectric conversion members 40A and 40B are disposed at predetermined positions on one surface 10a of the core layer 10 with the electrodes facing upward via a translucent optical adhesive 30. Furthermore, the photoelectric conversion members 40C and 40D are disposed at predetermined positions on the other surface 10b of the core layer 10 with the electrodes facing downward via a translucent optical adhesive 30. The photoelectric conversion member 40C is disposed at a position where light can be transmitted and received to and from the photoelectric conversion member 40A via the core layer 10. Similarly, the photoelectric conversion member 40D is disposed at a position where light can be transmitted and received to and from the photoelectric conversion member 40B via the core layer 10.

[0063] Next, in the step shown in Fig. 5(b), an insulating layer 12 is formed to cover the photoelectric conversion members 40A and 40B. Also, an insulating layer 22 is formed to cover the photoelectric conversion members 40C and 40D. The method for forming the insulating layers 12 and 22 can be the same as the step shown in Fig. 2(c). The insulating layers 12 and 22 are formed so as to cover the entire photoelectric conversion members, including the electrodes.

[0064] 4(a) to 4(c) are then performed to complete the wiring board 1. This manufacturing method does not require the steps of forming the insulating layers 13 and 14 and the insulating layers 23 and 24. In other words, the insulating layer 12 also serves as the insulating layers 13 and 14, and the insulating layer 22 also serves as the insulating layers 23 and 24.

[0065] <Modification of the first embodiment> In the modified example of the first embodiment, an example of a wiring substrate further having through-hole wiring that penetrates the core layer and electrically connects the wiring layers together is shown. Note that in the modified example of the first embodiment, the description of the same components as those in the already described embodiment may be omitted.

[0066] 6 is a cross-sectional view illustrating a wiring board according to a modification of Embodiment 1. A wiring board 1A shown in FIG.

[0067] The through wiring 50 is provided in a through hole 10x that penetrates the core layer 10. The wiring layer 11 and the wiring layer 21 are electrically connected by the through wiring 50. The through wiring 50 may be made of a material such as copper (Cu). The through wiring 50 has a circular planar shape, for example. When the through wiring 50 has a circular planar shape, the diameter may be, for example, 10 μm or more and 100 μm or less.

[0068] The through holes 10x can be formed by, for example, laser processing, etching processing, or both. When the core layer 10 is made of glass and the through holes 10x are formed by etching processing, for example, hydrofluoric acid can be used. The through wiring 50 can be formed by, for example, a semi-additive method. Note that the through wiring 50 may be formed integrally with the wiring layer 11 and the wiring layer 21.

[0069] In this way, signals may be transmitted and received using both optical and electrical signals via the core layer 10. For example, the power supply wiring and GND wiring may be connected via the through wiring 50 using electrical signals, and the signal wiring may be connected using optical signals.

[0070] Although the preferred embodiments have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims. [Explanation of symbols]

[0071] 1,1A wiring board 10 Core Layer 10a One side 10b The other side 10x through holes 11, 15, 17, 21, 25, 27 wiring layer 12, 13, 14, 16, 22, 23, 24, 26 Insulation layer 12x, 12y, 18x, 22x, 22y, 28x opening 14x, 16x, 24x, 26x via holes 18, 28 Solder resist layer 30 Optical adhesives 40A, 40B, 40C, 40D Photoelectric conversion materials 50 through wiring

Claims

1. a light-transmitting core layer; a first photoelectric conversion member disposed on one surface of the core layer; a first wiring layer electrically connected to the first photoelectric conversion member; a second photoelectric conversion member disposed on the other surface of the core layer; a second wiring layer electrically connected to the second photoelectric conversion member, The first photoelectric conversion member and the second photoelectric conversion member are disposed at positions where they can transmit and receive optical signals via the core layer.

2. 2. The wiring board according to claim 1, wherein the first photoelectric conversion member and the second photoelectric conversion member comprise a light receiving element that converts an optical signal into an electrical signal, a light emitting element that converts an electrical signal into an optical signal, and a control circuit that controls the conversion of the optical signal and the electrical signal.

3. one of the first photoelectric conversion member and the second photoelectric conversion member includes a light receiving element that converts an optical signal into an electrical signal, and does not include a light emitting element that converts an electrical signal into an optical signal; The wiring board according to claim 1 , wherein the other of the first photoelectric conversion member and the second photoelectric conversion member includes a light-emitting element that converts an electrical signal into an optical signal, but does not include a light-receiving element that converts an optical signal into an electrical signal.

4. a third wiring layer disposed on one surface of the core layer; a fourth wiring layer disposed on the other surface of the core layer; The wiring board according to claim 1 , further comprising a through wiring that penetrates the core layer and electrically connects the third wiring layer and the fourth wiring layer.

5. The wiring board according to claim 1 , wherein the core layer is made of glass.

6. the first photoelectric conversion member is disposed on one surface of the core layer via a light-transmitting optical adhesive; The wiring board according to claim 1 , wherein the second photoelectric conversion member is disposed on the other surface of the core layer via a light-transmitting optical adhesive.

7. a first insulating layer disposed on one surface of the core layer and covering the first photoelectric conversion member; The wiring board according to claim 1 , further comprising: a second insulating layer disposed on the other surface of the core layer and covering the second photoelectric conversion member.

8. a step of disposing a first photoelectric conversion member on one surface of a light-transmitting core layer and a second photoelectric conversion member on the other surface of the core layer; forming a first wiring layer electrically connected to the first photoelectric conversion member and forming a second wiring layer electrically connected to the second photoelectric conversion member, The method for manufacturing a wiring board, wherein the first photoelectric conversion member and the second photoelectric conversion member are arranged at positions where they can transmit and receive optical signals via the core layer.

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