Display device

Abstract

To provide a display device in which a plurality of kinds of circuits are formed on the same substrate, and that comprises a plurality of kinds of transistors individually matched with characteristics of the plurality of kinds of circuits.SOLUTION: A display device has a pixel part, and a drive circuit for driving the pixel part, on the same substrate. The pixel part has a first transistor having a first oxide semiconductor film. The drive circuit has a second transistor having a second oxide semiconductor film. The first oxide semiconductor film and the second oxide semiconductor film are formed on the same insulation surface. A channel length of the first transistor is longer than that of the second transistor. The channel length of the first transistor is equal to or more than 2.5 μm.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an article, a method, or a manufacturing method. The invention relates to the manufacture or composition of matter. One embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, or any of these devices. In particular, one aspect of the present invention relates to a field effect transistor, a driving method thereof, and a manufacturing method thereof. The present invention relates to a semiconductor device having a transistor.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0003] Metal oxides exist in a wide variety of forms and are used for a variety of purposes. Indium oxide is well known as It is a material that has been developed and is used as a transparent electrode material required for liquid crystal displays, etc. There are.

[0004] Some metal oxides exhibit semiconducting properties. A compound semiconductor is a semiconductor made up of two or more types of atoms bonded together. Generally, metal oxides are insulators. However, the combination of elements that make up metal oxides It is known that some combinations of these materials can become semiconductors.

[0005] For example, among metal oxides, tungsten oxide, tin oxide, indium oxide, zinc oxide, etc. It is known that such materials exhibit semiconducting properties.

[0006] A transistor using zinc oxide or In-Ga-Zn oxide is fabricated. A technology for using a MOS transistor as a switching element for pixels of a display device has been disclosed (Patent Document 1). 1 and Patent Document 2).

[0007] In addition, transistors using oxide semiconductors are not as efficient as transistors using amorphous silicon. Therefore, the field effect mobility of the transistor is higher than that of the transistor. A driving circuit such as the above can also be configured.

[0008] Display devices include EL display devices, electronic paper, and liquid crystal display devices. Active matrix EL display devices, which are capable of high-definition display, are attracting attention. In an active matrix EL display device, a pixel has multiple switching elements (pixel transistors). At least one of the switching elements is electrically connected to the By applying a voltage to the connected light emitting element, electrons and holes are released from the pair of electrodes, respectively. These carriers are injected into the layer containing the light-emitting organic compound, and a current flows. The recombination of electrons and holes causes the light-emitting organic compound to form an excited state, Light is emitted when the excited state returns to the ground state. Such a device is called a current-excited light-emitting device.

[0009] The applications of such active matrix display devices are expanding, and the screen size is becoming larger. There is a growing demand for larger area, higher definition, and higher aperture ratio. A manufacturing method for a display device is required to have high productivity and reduce production costs.

[0010] Since the pixel transistor is a switching element, the off-current value (when the transistor is turned off) It is important to keep the off-state current low enough. Lowering the value also enables lower power consumption.

[0011] The materials used for the semiconductor layer of the pixel transistor include polysilicon and amorphous silicon. Silicon materials such as silicon dioxide and oxide semiconductors are used.

[0012] In order to reduce the manufacturing cost of the display module, a display panel having a large insulating surface is required. It is preferable to manufacture the device using a substrate (glass substrate or plastic substrate).

[0013] Polysilicon uses a laser irradiation device for the crystallization process, etc., but In addition, the irradiation area per unit time is limited, so it is difficult to have an insulating surface with a large area. It is difficult to process such a substrate in a short time.

[0014] On the other hand, a transistor using an oxide semiconductor does not require a laser irradiation device in the manufacturing process. In addition, amorphous silicon is used in the manufacturing process, which does not use a laser irradiation device. Compared to transistors using oxide semiconductors, transistors using oxide semiconductors have high field-effect mobility. Therefore, a driver circuit of a display device or the like can be constructed using a transistor including an oxide semiconductor. It can also be achieved. [Prior art documents] [Patent documents]

[0015] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-96055 Summary of the Invention [Problem to be solved by the invention]

[0016] In addition, when a plurality of different circuits are formed on an insulating surface to manufacture a display device, for example, For example, when the pixel portion and the driver circuit are formed on the same substrate, the transistor used in the pixel portion is In order to achieve this, excellent switching characteristics, such as a large on-off ratio, are required. The transistors used in these devices are required to operate at high speed. The faster the display image is written, the shorter the time it takes for the transistors used in the driver circuit to be written. It is preferable that the starter has a high operating speed.

[0017] Multiple types of circuits are formed on the same substrate, and multiple types of circuits are formed to suit the characteristics of each circuit. An object of the present invention is to provide a display device including a transistor.

[0018] In addition, it is possible to prevent the process from becoming complicated and the manufacturing cost from increasing, and to mount multiple types of devices on the same substrate. A semiconductor device that forms a circuit and has multiple types of transistors that are respectively matched to the characteristics of multiple types of circuits. It is another object of the present invention to provide a semiconductor device.

[0019] In addition, transistors with good electrical characteristics and high reliability are used as switching elements, Another object is to manufacture a highly reliable display device.

[0020] Furthermore, in order to display an image on a display device, a large amount of image signals must be supplied to the display device. The connection between the device that supplies the image signal (for example, the main body of an electronic device) and the display device requires many connections (for example, For example, about 640V in VGA requires wiring. It occupies part of the equipment, restricting the freedom of design, such as the size of the electronic equipment and the placement of the display device. This may happen.

[0021] In view of this, it is desirable to reduce the number of terminals for external connection of a display device.

[0022] In addition, when further reduction in power consumption of the display device is pursued, the number of external connection terminals can be reduced. is desirable.

[0023] In addition, the higher the resolution of a display module, the more terminals (also called pins) it requires for external connections. By forming the pixel section and the driver circuit on the same substrate, the number of driver circuits increases. Compared to display modules that do not have operating circuits formed on the same substrate, the number of external connection terminals and signal wiring is reduced. The number of lines can be reduced. [Means for solving the problem]

[0024] One embodiment of the present invention is a liquid crystal display device including a pixel portion and a driver circuit for driving the pixel portion over the same substrate, The pixel portion includes a first transistor having a first oxide semiconductor film, and the driver circuit includes a second a second transistor having an oxide semiconductor film of the first oxide semiconductor film and a second oxide semiconductor film of the second oxide semiconductor film; The nitride semiconductor film is formed on the same insulating surface, and the channel length of the first transistor is The channel length of the first transistor is 2.5 μm. It is a display device of 1m or more.

[0025] Another embodiment of the present invention is a semiconductor device including a pixel portion and a driver circuit for driving the pixel portion, both of which are provided over the same substrate. the pixel portion includes a first transistor including a first oxide semiconductor film; a second transistor including a second oxide semiconductor film and a third oxide semiconductor film; a first oxide semiconductor film and a second oxide semiconductor film having a different composition from that of the first oxide semiconductor film; are formed on the same insulating surface, and the channel length of the first transistor is The third oxide semiconductor film is in contact with the side surface of the second oxide semiconductor film. It is a display device.

[0026] In the above structure, the first oxide semiconductor film and the third oxide semiconductor film are formed in the same process. In the above structure, the channel length of the first transistor is 2.5 μm or more. is.

[0027] In each of the above structures, the channel length of the second transistor is less than 2.5 μm. The channel length of the first transistor is not less than 1 μm and not more than 2.1 μm.

[0028] The second transistor includes a gate electrode layer and a second oxide semiconductor layer over the gate electrode layer. a conductive layer over the insulating layer; and a second oxide semiconductor film over the insulating layer. a second insulating film of the second transistor, the second insulating film being provided to cover the oxide semiconductor film and to be in contact with the gate insulating layer; In the channel width direction of the first oxide semiconductor film, the conductive layer is The display device is provided so as to overlap with the gate electrode formation region and be electrically connected to the gate electrode layer.

[0029] The field-effect mobility of the second transistor is higher than that of the first transistor.

[0030] Another embodiment of the present invention is a semiconductor device including a pixel portion and a driver circuit for driving the pixel portion, both of which are provided over the same substrate. the pixel portion includes a first transistor including a first oxide semiconductor film; a second oxide semiconductor film, a third oxide semiconductor film over the second oxide semiconductor film, and a third oxide semiconductor film over the third oxide semiconductor film. a second transistor having a fourth oxide semiconductor film over the first oxide semiconductor film; The first oxide semiconductor film and the second oxide semiconductor film are formed on the same insulating surface. The channel length of the first transistor is longer than the channel length of the second transistor, and the third oxide The top surface and the side surface of the semiconductor film are covered with the fourth oxide semiconductor film, and the bottom surface of the third oxide semiconductor film is covered with the fourth oxide semiconductor film. The surface of the display device is in contact with the top surface of the second oxide semiconductor film.

[0031] In the above structure, the first oxide semiconductor film and the fourth oxide semiconductor film are formed in the same process. and deposited using the same target. [Effects of the Invention]

[0032] According to one embodiment of the present invention, a display device with a reduced number of external connection terminals and high image quality can be provided. Cut.

[0033] Furthermore, the electronic device of one embodiment of the present invention has a reduced number of terminals for external connection and can display high-quality images. This allows the size of the electronic device and the arrangement of the display device provided therein to be As a result, electronic devices have become smaller, lighter, and more portable. We can provide the equipment.

[0034] Furthermore, if the number of external connection terminals can be reduced, the mounting cost can be reduced. If even one of the external connection terminals has a poor contact, the product will be deemed defective. The reduction in the number of components can increase the yield during mounting.

[0035] According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided. [Brief explanation of the drawings]

[0036] [Figure 1] 1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 2] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 3] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a transistor. [Figure 4] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a transistor. [Figure 5] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a transistor. [Figure 6] 1A to 1C illustrate a structure of a display device according to an embodiment. [Figure 7] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 8] 1A and 1B are diagrams showing nanobeam electron diffraction patterns of an oxide semiconductor film and an example of a transmission electron diffraction measurement apparatus; [Figure 9] An example of structural analysis using transmission electron diffraction measurements, and a planar TEM image. [Figure 10] FIG. 2 is a diagram illustrating a display module. [Figure 11] 1A to 1C are diagrams illustrating external views of electronic devices according to an embodiment. [Figure 12] 1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 13] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 14] 1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 15] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 16]1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 17] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 18] 1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 19] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 20] 1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 21] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 22] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 23] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 24] 10A and 10B are diagrams showing electrical characteristics of a transistor. [Figure 25] 10A and 10B are diagrams showing electrical characteristics of a transistor. [Figure 26] 1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 27] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 28] 1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 29] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 30] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 31] 10A and 10B illustrate structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 32] Electron diffraction pattern of CAAC-OS. [Figure 33] FIG. 1 shows the change in the crystalline part of an In-Ga-Zn oxide due to electron irradiation. [Figure 34] 1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 35] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 36] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a transistor. [Figure 37]1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a transistor. [Figure 38] 1A to 1C are cross-sectional views illustrating one embodiment of a method for manufacturing a transistor. [Figure 39] 10A and 10B are diagrams showing electrical characteristics of a transistor. [Figure 40] 10A and 10B are diagrams showing electrical characteristics of a transistor. [Figure 41] 10A and 10B are diagrams showing electrical characteristics of a transistor. [Figure 42] 10A and 10B are diagrams showing electrical characteristics of a transistor. [Figure 43] 1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 44] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 45] 1A and 1B are cross-sectional views illustrating one embodiment of a liquid crystal display device. [Figure 46] 1A and 1B are cross-sectional views illustrating one embodiment of a light-emitting device. [Figure 47] 10A and 10B are diagrams showing electrical characteristics of a transistor. DETAILED DESCRIPTION OF THE INVENTION

[0037] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and the embodiments and methods thereof may be modified without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the design and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments and examples. In the embodiments and examples described below, the same parts or parts having similar functions In the case of parts, the same symbols or the same hatch patterns are used in common among different drawings, and the repetition The explanation of repetition will be omitted.

[0038] In each figure described in this specification, the size of each component, the thickness of the film, or the area is The figures may be exaggerated for clarity and are not necessarily limited to that scale. stomach.

[0039] In addition, terms such as first, second, and third used in this specification are used interchangeably to avoid confusion of components. It is not intended to limit the number of items. The terms "second" or "third" can be used interchangeably to explain the present invention.

[0040] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it also includes the case where the angle is between -5° and 5°. "Perpendicular" refers to two straight lines that form an angle of 80° or more and 100° or less. Therefore, the angle may be between 85° and 95°.

[0041] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0042] The functions of the "source" and "drain" are also different when the direction of the current changes during circuit operation. For this reason, in this specification, the terms "sauce" and "dressing" are used interchangeably. The terms "in" and "in" may be used interchangeably.

[0043] Voltage refers to the potential difference between two points, and potential refers to the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) of a unit charge in a particle. However, in general, the potential difference between the potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, the term "potential" may be read as "voltage." , voltage may be read as potential.

[0044] In addition, since the transistor including the oxide semiconductor film is an n-channel transistor, In this specification, when the gate voltage is 0V, it is considered that no drain current flows. A transistor capable of achieving this is defined as a transistor having normally-off characteristics. A transistor that can be considered to have a drain current flowing when the gate voltage is 0V is defined as a transistor having normally-on characteristics.

[0045] Note that the channel length is, for example, the length of the oxide semiconductor film (or or the part of the oxide semiconductor film through which current flows when the transistor is on) and the gate The source (source region or This refers to the distance between the source electrode and the drain electrode. In one transistor, the channel length does not necessarily have the same value in all regions. That is, the channel length of a transistor may not be fixed to a single value. Therefore, in this specification, the channel length is defined as the length of any one of the regions where the channel is formed. The value may be a maximum, minimum or average value.

[0046] The channel width is, for example, the width of the oxide semiconductor film (or the width of the oxide semiconductor film when the transistor is on). The region where the gate electrode overlaps with the gate electrode (the part of the semiconductor film where current flows), or the channel This refers to the length of the portion where the source and drain face each other in the region where they are formed. In one transistor, the channel width does not necessarily have the same value in all regions. That is, the channel width of a transistor may not be fixed to a single value. Therefore, in this specification, the channel width is defined as the width of any one of the regions where the channel is formed. The value may be a maximum, minimum or average value.

[0047] Depending on the structure of the transistor, the channel in the region where the channel is actually formed may be The effective channel width is shown in the top view of the transistor. The channel width (hereinafter referred to as the apparent channel width) may differ from the actual channel width. In a transistor having a three-dimensional structure, the effective channel width is The apparent channel width shown in the figure becomes larger, and the effect becomes non-negligible. For example, in transistors with a fine and three-dimensional structure, oxide semiconductors The ratio of the channel region formed on the side of the oxide semiconductor film to the channel region formed on the top surface of the film is The channel region may be a larger percentage than shown in the top view. The effective channel width where the channel is actually formed is larger than the channel width on the surface. become.

[0048] In a transistor having a three-dimensional structure, the effective channel width is For example, it may be difficult to estimate the effective channel width from the design value. In order to deposit the oxide semiconductor film, it is necessary to assume that the shape of the oxide semiconductor film is known. When the shape of the nitride semiconductor film is not precisely known, the effective channel width is precisely measured. It is difficult to do so.

[0049] In this specification, in a top view of a transistor, an oxide semiconductor film and a gate electrode are The apparent length is the length of the portion where the source and drain face each other in the overlapping region. The channel width on the In this specification, it is simply referred to as the channel width. In this case, it may refer to the enclosed channel width or apparent channel width. In this specification, when simply referred to as a channel width, it refers to an effective channel width. In addition, there are the channel length, channel width, effective channel width, apparent channel width, The width of the enclosed channel can be determined by acquiring a cross-sectional TEM image and analyzing the image. The value can be determined by

[0050] The field effect mobility of the transistor and the current value per channel width are calculated. In this case, the effective channel width is calculated using the enclosed channel width. The value may differ from that calculated using the channel width.

[0051] (Embodiment 1) In this embodiment, a semiconductor device according to one embodiment of the present invention and a manufacturing method thereof will be described with reference to drawings. Here, a liquid crystal display device and a light emitting device are used as examples of semiconductor devices. This will be described with reference to FIGS. 1 to 5. In this embodiment, , a first transistor and a second transistor are used, and the first transistor and the second transistor The structure of the oxide semiconductor film included in the transistor is different.

[0052] <Display device structure> First, the liquid crystal display device will be described.

[0053] FIG. 1 is a cross-sectional view of a liquid crystal display device, and shows transistors formed in a driving circuit section at AB. and CD indicates a transistor formed in a pixel portion.

[0054] The transistor 10k shown in FIG. 1A includes a gate electrode 13c provided on a substrate 11. a gate insulating film 15 formed on the substrate 11 and the gate electrode 13c; The oxide semiconductor film 82 overlapping with the gate electrode 13c is connected to the oxide semiconductor film 82 through the gate electrode 13c. The gate insulating film 15 and the oxide semiconductor film 20c are connected to each other. A protective film 21 is formed on the pair of electrodes 82 and 20c. A conductive film 87 may be provided on the insulating film 21. When a conductive film having a light-shielding property is used as the conductive film 87, the insulating film It also functions as a light film.

[0055] The protective film 21 contains more oxygen than the oxide insulating film 23 and the oxygen that satisfies the stoichiometric composition. The insulating film 25 includes an oxide insulating film 25 containing silicon, and a nitride insulating film 27.

[0056] The transistor 10m shown in FIG. 1C has a gate electrode 13d provided on a substrate 11. and a gate insulating film 15 formed on the substrate 11 and the gate electrode 13d. The oxide semiconductor film 84 overlapping with the gate electrode 13d is connected to the oxide semiconductor film 84 through the insulating film 5. The gate insulating film 15 and the oxide semiconductor film 8 are connected to each other. A protective film 21 is formed on the pair of electrodes 19d and 20d. An organic insulating film 88 may be provided on the substrate 1.

[0057] On the gate insulating film 15, a conductive oxide semiconductor film 85 is formed. The oxide semiconductor film 85 having conductivity is formed simultaneously with the oxide semiconductor film 82 and the oxide semiconductor film 84. When the oxide semiconductor film formed on the nitride insulating film 27 is in contact with the nitride insulating film 27, oxygen vacancies and hydrogen concentrations are reduced. The film has an increased conductivity and is therefore more conductive.

[0058] In addition, in the opening of the protective film 21, a pixel electrode connected to the electrode 20d of the transistor 10m is formed. The pixel electrode 86 is provided on the protective film 21. The pixel electrode 86 is made of a conductive film having light-transmitting properties. It is possible.

[0059] The conductive oxide semiconductor film 85, the nitride insulating film 27, and the pixel electrode 86 form a capacitor. The conductive oxide semiconductor film 85 and the pixel electrode 86 are transparent. Since the capacitor element 89 has a light-transmitting property, the capacitor element 89 in the pixel also has a light-transmitting property. Therefore, it is possible to increase the area of ​​the capacitor having a high aperture ratio and a high capacitance value. A pixel can be fabricated having element 89 therein.

[0060] In addition, an alignment film 92a is formed on the protective film 21, the pixel electrode 86, the conductive film 87, and the organic insulating film 88. will be established.

[0061] In the liquid crystal display device, an opposing substrate 90 is provided, and between the substrate 11 and the opposing substrate 90, A counter electrode 91 and an alignment film 92b are provided in this order from the counter substrate 90 side.

[0062] A liquid crystal layer 93 is disposed between the alignment film 92a and the alignment film 92b. The layer 93 and the counter electrode 91 constitute a liquid crystal element 94 .

[0063] In the liquid crystal display device shown in this embodiment mode, transistors are used in the driver circuit portion and the pixel portion. The structure of the oxide semiconductor film included in the capacitor is different.

[0064] In the liquid crystal display device shown in this embodiment, transistors included in a driver circuit portion and a pixel portion The channel lengths of the transistors are different.

[0065] Typically, the channel length of the 10k transistors in the driver circuitry is less than 2.5µm. Preferably, the thickness is 1.45 μm or more and 2.2 μm or less. The channel length of the 10m star is 2.5 μm or more, preferably 2.5 μm or more and 20 μm or less. be.

[0066] The channel length of the transistor 10k included in the driving circuit section is set to less than 2.5 μm, preferably By setting the thickness to 1.45 μm or more and 2.2 μm or less, it is possible to increase the field effect mobility. As a result, a drive circuit section capable of high-speed operation can be created. It can be manufactured.

[0067] The transistor 10k provided in the drive circuit section is made of an oxide semiconductor via a protective film 21. The conductive film 87 covers the conductive film 82. The conductive film 87 can be set to a ground potential or any other potential. Alternatively, the conductive film 87 may be connected to the gate electrode 13c, thereby reducing the field effect. This results in a transistor with high mobility and large on-state current.

[0068] The oxide semiconductor film 82 and the oxide semiconductor film 84 are made of a metal oxide containing at least In. Typically, In-Ga oxide, In-M-Zn oxide (where M is Al, Ga, Y) , Zr, La, Ce, or Nd).

[0069] Metal of the target used to form the oxide semiconductor film 82 and the oxide semiconductor film 84 Typical examples of atomic ratios of elements are In:M:Zn=2:1:1.5, In:M:Zn= 2:1:2.3, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M :Zn=3:1:3, In:M:Zn=3:1:4, In:M:Zn=1:1:1, In :M:Zn=1:1:1.2, In:M:Zn=1:3:2, In:M:Zn=1:3: 4, In:M:Zn=1:3:6, In:M:Zn=1:3:8, In:M:Zn=1: 4:4, In:M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn= 1:4:7, In:M:Zn=1:4:8, In:M:Zn=1:5:5, In:M:Z n=1:5:6, In:M:Zn=1:5:7, In:M:Zn=1:5:8, In:M :Zn=1:6:8 etc.

[0070] The thickness of the oxide semiconductor film 82 and the oxide semiconductor film 84 is 3 nm or more and 200 nm or less. Preferably, it is 3 nm or more and 100 nm or less, and more preferably, it is 30 nm or more and 50 nm or less. do.

[0071] The oxide semiconductor film 82 and a part of the oxide semiconductor film 84 serve as a channel region of the transistor. Therefore, the oxide semiconductor film 82 and the oxide semiconductor film 84 function as an energy gap. The voltage is 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using oxide semiconductors with a wide energy gap, it is possible to realize transistors with a 10kΩ or 100kΩ resistance. The off-state current of 0m can be reduced.

[0072] The oxide semiconductor film 82 and the oxide semiconductor film 84 are made of an oxide semiconductor having a low carrier density. For example, the oxide semiconductor film 82 and the oxide semiconductor film 84 have a high carrier density. Degrees are 1 x 10 17 pieces / cm 3 Less than 1 × 10 15 pieces / cm 3 Below are some more preferred Or 1 x 10 13 pieces / cm 3 Less than or equal to 1×10 11 pieces / cm 3 The following oxidation A semiconductor film is used.

[0073] However, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use an appropriate composition depending on the required properties (e.g., the mobility, threshold voltage, etc.). The oxide semiconductor film 82 and the oxide semiconductor film 84 are formed on the oxide semiconductor film 83 in order to obtain semiconductor characteristics of the transistor. Carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density It is preferable to make the following appropriate.

[0074] Note that the oxide semiconductor films 82 and 84 have low impurity concentrations and are free of defects. By using an oxide semiconductor film with a low density of states, a transistor with better electrical characteristics can be obtained. Here, a low impurity concentration and a low defect level density (oxygen High purity genuine or practically high purity genuine is called high purity genuine or practically high purity genuine. Qualitatively high-purity intrinsic oxide semiconductors have few carrier generation sources, so the carrier density is Therefore, a channel region can be formed in the oxide semiconductor film. The transistors used in this study have electrical characteristics in which the threshold voltage is negative (also known as normally-on). In addition, oxide semiconductors that are high-purity intrinsic or substantially high-purity intrinsic are Since the defect level density of the thin film is low, the trap level density may also be low. A highly intrinsic or substantially highly purified intrinsic oxide semiconductor film has an extremely small off-state current and Channel width is 1x10 6 Even if the device has a channel length L of 10 μm, the When the voltage between the drain electrodes (drain voltage) is in the range of 1V to 10V, the off-state current is Below the measurement limit of the conductor parameter analyzer, i.e., 1 × 10 -13 A or below characteristic Therefore, a transistor in which a channel region is formed in the oxide semiconductor film can be obtained. The transistor has little fluctuation in electrical characteristics and is highly reliable. Examples of the metals include silicon, nitrogen, alkali metals, and alkaline earth metals.

[0075] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. Oxygen vacancies are formed in the lattice from which oxygen has been desorbed (or in the part from which oxygen has been desorbed). When hydrogen enters the gap, electrons, which act as carriers, are generated. When bonded to oxygen, which bonds to metal atoms, electrons, which act as carriers, may be generated. Therefore, a transistor using an oxide semiconductor containing hydrogen has normally-on characteristics. It is easy to become.

[0076] Therefore, in the oxide semiconductor film 82 and the oxide semiconductor film 84, hydrogen is generated in addition to oxygen vacancies. Specifically, the oxide semiconductor film 82 and the oxide In the semiconductor film 84, secondary ion mass spectroscopy (SIMS) The hydrogen concentration obtained by mass spectrometry was 5×10 19 at oms / cm3 Less than or equal to 1×10 19 atoms / cm 3 Below, preferably 5×10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 below , more preferably 5 × 10 17 atoms / cm 3 or less, more preferably 1 × 10 16 atoms / cm 3 The following applies.

[0077] The oxide semiconductor film 82 and the oxide semiconductor film 84 contain silicon, which is one of the Group 14 elements. When silicon or carbon is contained, oxygen is generated in the oxide semiconductor film 82 and the oxide semiconductor film 84. The number of defects increases, and the oxide semiconductor film 82 and the oxide semiconductor film 8 The silicon and carbon concentrations in 4 (obtained by secondary ion mass spectrometry) were calculated by multiplying the concentration by 2× 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following do.

[0078] In addition, the oxide semiconductor film 82 and the oxide semiconductor film 84 were analyzed by secondary ion mass spectrometry. The concentration of alkali metal or alkaline earth metal obtained by 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 The following are alkali metals and When alkaline earth metals and oxide semiconductors are bonded, they may generate carriers. Therefore, the oxide semiconductor film 82 and It is preferable to reduce the concentration of alkali metal or alkaline earth metal in the oxide semiconductor film 84. It's nice.

[0079] When the oxide semiconductor film 82 and the oxide semiconductor film 84 contain nitrogen, the carrier As a result, electrons that are nitrogen atoms are generated, the carrier density increases, and the material becomes more likely to become n-type. A transistor using an oxide semiconductor having such a structure tends to be normally on. In the oxide semiconductor film, nitrogen is preferably reduced as much as possible. For example, The nitrogen concentration obtained by secondary ion mass spectrometry was 5 × 10 18 atoms / cm 3 Below Preferably lower.

[0080] Next, other configurations of the liquid crystal display device will be described in detail.

[0081] The substrate 11 can be made of various substrates and is not limited to a specific one. Examples of the substrate include a semiconductor substrate (for example, a single crystal substrate or a silicon substrate), an SOI substrate, Plate, glass substrate, quartz substrate, plastic substrate, metal substrate, stainless steel substrate, Substrate with stainless steel foil, tungsten substrate, tungsten foil substrates, flexible substrates, laminated films, paper containing fibrous materials, or base films Examples of glass substrates include barium borosilicate glass and aluminoborosilicate glass. Acid glass or soda lime glass, etc. Flexible substrates, laminated films, base materials Examples of films include the following: Polyethylene naphthalate (PET), Polyethersulfone (P ES) or, for example, synthetic resins such as acrylic. For example, polypropylene, polyester, polyvinyl fluoride, etc. or polyvinyl chloride. Alternatively, examples include polyamide, polyimide, and In particular, semiconductor substrates, single crystal By manufacturing transistors using a substrate or SOI substrate, characteristics, size, etc. or to manufacture transistors with little variation in shape, high current capacity, and small size. When a circuit is constructed using such transistors, the circuit consumes less power. This allows for increased power consumption or higher circuit integration.

[0082] In addition, a flexible substrate is used as the substrate 11, and the transistor 10k is directly formed on the flexible substrate. Alternatively, a peeling may be formed between the substrate 11 and the transistors 10k and 10m. The release layer may be formed on the substrate after a part or all of the semiconductor device is completed thereon. The transistor can be separated from the substrate 11 and transferred to another substrate. 10k and 10m can be transferred to substrates with poor heat resistance or flexible substrates. For example, the inorganic film may be a laminated structure of a tungsten film and a silicon oxide film, or a substrate. For example, a configuration in which an organic resin film such as polyimide is formed on the insulating film can be used.

[0083] An example of a substrate on which a transistor is transferred is a substrate on which the above-mentioned transistor is formed. In addition to the substrates that can be used, paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, Lum substrate, stone substrate, wood substrate, fabric substrate (natural fibers (silk, cotton, linen), synthetic fibers (nylon) , polyurethane, polyester) or regenerated fiber (acetate, cupra, rayon, These substrates include recycled polyester, leather substrates, and rubber substrates. By using this, it is possible to form transistors with good characteristics and low power consumption. This allows for the manufacture of devices that are less likely to break, heat resistant, lightweight, or thin.

[0084] An underlying insulating film may be provided between the substrate 11 and the gate electrodes 13c and 13d. The insulating film may be silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, Gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, aluminum oxynitride Silicon nitride, gallium oxide, hafnium oxide, etc. are used as the base insulating film. By using yttrium oxide, yttrium oxide, aluminum oxide, etc., impurities, typically In effect, the diffusion of alkali metals, water, hydrogen, etc. into the oxide semiconductor films 82 and 84 can be suppressed. can.

[0085] The gate electrodes 13c and 13d are made of aluminum, chromium, copper, tantalum, titanium, molybdenum, etc. A metal element selected from the group consisting of tungsten, chromium, and chromium, or an alloy containing the above-mentioned metal elements. The metal layer can be formed by using an alloy or the like that combines the above-mentioned metal elements. Alternatively, metal elements selected from one or more of tungsten, tungsten, zirconium, and tungsten may be used. The gate electrodes 13c and 13d may have a single layer structure or a laminated structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, or a titanium film laminated on an aluminum film, Two-layer structure: a titanium film laminated on a titanium nitride film; a tungsten film laminated on a titanium nitride film Two-layer structure with laminating tantalum nitride film, tungsten film on tantalum nitride film or tungsten nitride film A two-layer structure in which a titanium film is laminated, and an aluminum film is laminated on top of the titanium film. There are also three-layer structures, such as a titanium film formed on aluminum. One of the elements selected from the group consisting of tungsten, molybdenum, chromium, neodymium, and scandium Alternatively, an alloy film or a nitride film made by combining a plurality of layers may be used.

[0086] The gate electrodes 13c and 13d are made of an indium tin oxide (ITO) containing tungsten oxide. Indium oxide, indium zinc oxide with tungsten oxide, indium zinc oxide with titanium oxide Indium oxide, indium tin oxide with titanium oxide, indium zinc oxide, silicon oxide A light-transmitting conductive material such as indium tin oxide containing indium can also be used. Alternatively, the light-transmitting conductive material and the metal element may be laminated together.

[0087] The gate insulating film 15 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn based metals The oxide semiconductor films 82 and 84 may be formed as a stacked layer or a single layer. In order to improve the interface characteristics with the oxide semiconductor film 8, the gate insulating film 15 is The region in contact with 2 and 84 is preferably formed of an oxide insulating film.

[0088] The gate insulating film 15 is made of hafnium silicate (HfSiO x ), nitrogen added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminium Laminate (HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. The use of k-materials can reduce gate leakage of transistors.

[0089] The thickness of the gate insulating film 15 is 5 nm or more and 400 nm or less, and more preferably 10 nm or more. It is preferable to set the thickness to 300 nm or less, and more preferably to set the thickness to 50 nm or more and 250 nm or less.

[0090] The oxide insulating films 23 and 25 can be made of the same material as the gate insulating film.

[0091] The oxide insulating film 23 may contain nitrogen and have few defects. good.

[0092] A typical example of an oxide insulating film containing nitrogen and having few defects is a silicon oxynitride film. , aluminum oxynitride film, etc. The film refers to a film whose composition contains more oxygen than nitrogen, and is called a silicon nitride oxide film. The aluminum nitride oxide film is a film whose composition contains more nitrogen than oxygen. vinegar.

[0093] The oxide insulating film with few defects shows the spectrum obtained by ESR measurement at 100K or less. The first signal has a g value of 2.037 or more and 2.039 or less, and the second signal has a g value of 2.001 or more. A second signal with a g value of 0.003 or less and a third signal with a g value of 1.964 or greater and 1.966 or less. The split width of the first signal and the second signal, and The split width of the second and third signals is The g value is about 5 mT. The first signal has a g value of 2.037 or more and 2.039 or less. A second signal between 2.001 and 2.003, and a g value between 1.964 and 1.966 The sum of the spin densities of the third signal is less than or equal to 1 × 10 18 spins / cm 3 less than is typically 1×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 is less than.

[0094] In addition, the g value is between 2.037 and 2.039 in the ESR spectrum below 100K. a first signal having a g value of 2.001 or more and 2.003 or less, and a second signal having a g value of The third signal, which is between 1.964 and 1.966, is nitrogen oxides (NOx, where x is 0 or greater). These correspond to signals caused by nitrogen oxides (above 2 or below, preferably 1 or above 2 or below). Examples include nitrogen monoxide and nitrogen dioxide. That is, the g value is between 2.037 and 2.039. a first signal having a g value of 2.001 or more and 2.003 or less, and a second signal having a g value of The smaller the sum of the spin densities of the third signals, which are between 1.964 and 1.966, the This means that the amount of nitrogen oxide contained in the oxide insulating film is small.

[0095] When the oxide insulating film 23 has a low content of nitrogen oxides as described above, the oxide insulating film 2 3 and the oxide semiconductor films 82 and 84. As a result, it is possible to reduce the shift in the threshold voltage of the transistor. This reduces fluctuations in the electrical characteristics of the transistor.

[0096] The oxide insulating film 23 has a nitrogen concentration of 6×10 20 atoms / cm 3 As a result, the oxide insulating film 23 contains nitrogen oxide The oxide insulating film 23 is less likely to be generated at the interface between the oxide semiconductor films 82 and 84. It is possible to reduce the number of carrier traps that occur in the transistors included in the semiconductor device. It is possible to reduce the shift in the threshold voltage of the transistor, and improve the electrical characteristics of the transistor. Fluctuations can be reduced.

[0097] The gate insulating film 15 is an oxide insulating film containing the above nitrogen and having a small amount of defects. As a result, at the interfaces between the gate insulating film 15 and the oxide semiconductor films 82 and 84, It is possible to reduce the number of carrier traps in the semiconductor device. It is possible to reduce the shift in the threshold voltage of the transistor, and the electrical characteristics of the transistor The fluctuations can be reduced.

[0098] The oxide insulating film 25 contains more oxygen than the oxygen required for the stoichiometric composition. An oxide insulating film may be used. When heated, the oxide insulating film containing oxygen is partially desorbed. The oxide insulating film containing more oxygen than the oxide insulating film is analyzed by TDS, and the amount of oxygen released is calculated as oxygen atoms. The separation is 1.0 x 10 18 atoms / cm 3 or more, preferably 3.0 × 10 20 atom s / cm 3 The oxide insulating film is as described above. The temperature is preferably in the range of 100°C to 700°C, or 100°C to 500°C. stomach.

[0099] The oxide insulating film 25 has a thickness of 30 nm to 500 nm, preferably 50 nm. Silicon oxide, silicon oxynitride, etc., having a thickness of 400 nm or more and 400 nm or less can be used. The insulating film 27 is made of a film that has at least a blocking effect against hydrogen and oxygen. Furthermore, preferably, blocking agents such as oxygen, hydrogen, water, alkali metals, and alkaline earth metals are used. By providing the nitride insulating film 27, oxygen from the oxide semiconductor films 82 and 84 can be effectively removed. and preventing the intrusion of hydrogen, water, etc. into the oxide semiconductor films 82 and 84 from the outside. can be done.

[0100] The nitride insulating film 27 has a thickness of 50 nm to 300 nm, preferably 100 nm. Silicon nitride, silicon oxynitride, aluminum nitride, and oxynitride Examples include aluminum oxide.

[0101] Instead of the nitride insulating film 27, an oxide insulating film having a blocking effect against oxygen, hydrogen, water, etc. may be used. An oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like may be provided. Examples include aluminum oxide, aluminum oxynitride, gallium oxide, and gallium oxynitride. , yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, etc. be.

[0102] In addition, in the transistor 10m provided in the pixel portion, a protective film 21 is formed on the protective film 21 for each pixel. It is preferable to provide a separate organic insulating film 88. The organic insulating film 88 is, for example, a polyimide film. The organic insulating film 88 can be made of a material such as polyethyleneimide, acrylic, polyamide, or epoxy. The thickness is preferably 500 nm or more and 10 μm or less.

[0103] When the organic insulating film 88 is formed separately, water from the outside penetrates through the organic insulating film 88. This is preferable because it does not diffuse into the semiconductor device.

[0104] Since the organic insulating film 88 is thick, ie, 500 nm or more, a negative voltage is applied to the gate electrode 13d. The electric field generated by the application does not affect the surface of the organic insulating film 88, The surface of the film 88 is unlikely to be positively charged. Even if the organic insulating film 88 is adsorbed on the surface thereof, the organic insulating film 88 has a thickness of 500 nm or more. The electric field of the positively charged particles adsorbed on the surface of the organic insulating film 88 is generated by the oxide semiconductor film 84 and the protective film As a result, the interface between the oxide semiconductor film 84 and the protective film 21 is not easily affected. In this case, a positive bias is not applied substantially, and the threshold voltage of the transistor is The channel length of the transistor 10m may be set to 2.5 μm or more.

[0105] Next, the structure of the light emitting device will be described with reference to FIG.

[0106] FIG. 2 is a cross-sectional view of the light emitting device, and shows a transistor 10 formed in the driving circuit section at AB. k is indicated, and CD indicates a transistor 10m formed in the pixel portion.

[0107] An insulating film 95 is provided on the protective film 21. In the opening of the insulating film 95, A first electrode 86a is provided, which is connected to the electrode 20d included in the transistor 10m. The first electrode 86a is formed using a light-transmitting conductive film or a reflective conductive film. It is possible.

[0108] An insulating film 96 is provided on the conductive film 87, the first electrode 86a, and the insulating film 95. The insulating film 96 has an opening that exposes a part of the first electrode 86a. An EL layer 97 is provided on the insulating film 96 a, and a second electrode 98 is provided on the insulating film 96 and the EL layer 97. The first electrode 86a, the EL layer 97, and the second electrode 98 form an organic EL element 99. can be configured.

[0109] The insulating films 95 and 96 may be made of, for example, an organic resin or an inorganic insulating material. Examples of organic resins include polyimide resin, polyamide resin, acrylic resin, and Examples of the inorganic insulating material include xanthane resin, epoxy resin, and phenol resin. The insulating film 95 and the insulating layer 96 can be made of silicon oxide, silicon oxynitride, or the like. It is particularly preferable to use a photosensitive resin since this makes it easier to fabricate the insulating film 96. The method for forming the insulating film 96 is not particularly limited, and may be, for example, a photolithography method, a spa ink jet method, vapor deposition method, droplet ejection method (inkjet method, etc.), printing method (screen printing, offset printing, etc.) Printing, etc. can be used.

[0110] For example, a metal film that is highly reflective in visible light is preferably used as the first electrode 86a. The metal film is preferably made of aluminum, silver, or an alloy thereof. It is possible.

[0111] The EL layer 97 is formed by absorbing holes and electrons injected from the first electrode 86a and the second electrode 98. In addition to the EL layer, a hole injection layer, a positive electrode ... Functional layers such as a hole transport layer, an electron transport layer, and an electron injection layer may be formed as needed.

[0112] The second electrode 98 is preferably made of, for example, a conductive film that is transparent to visible light. The conductive film may be made of, for example, indium (In), zinc (Zn), or tin (Sn). The second electrode 98 may be made of a material containing one selected from the following: Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Indium Tin Oxide (ITO), Indium Zinc Oxide, Indium Tin with Silicon Oxide A light-transmitting conductive material such as an oxide can be used. When indium tin oxide with silicon oxide added is used, when the light emitting device is bent, This is preferable because the second electrode 98 is less likely to crack.

[0113] <Method for manufacturing a display device> Here, a method for manufacturing a transistor included in a display device will be described. As an example of the display device, the light-emitting device shown in FIG. 29 is used, and the transistor 10k_4 and the transistor A method for manufacturing the resistor 10m_4 will be described with reference to FIGS.

[0114] The films (insulating film, oxide semiconductor) that make up the transistor 10k_4 and the transistor 10m_4 The films (metal oxide films, conductive films, etc.) are deposited by sputtering, chemical vapor deposition (CVD), It can be formed using vacuum evaporation or pulsed laser deposition (PLD). The film can be formed by a coating method or a printing method. The most common method is the polymer-enhanced chemical vapor deposition (PECVD) method, but the thermal CVD method is also acceptable. For example, MOCVD (metal organic chemical vapor deposition) or ALD (atomic layer deposition) may be used. .

[0115] In the thermal CVD method, the pressure in the chamber is atmospheric or reduced, and the source gas and oxidant are simultaneously mixed. The reaction is carried out in the chamber near or on the substrate, where it is deposited on the substrate to form a film. As described above, the thermal CVD method is a film formation method that does not generate plasma. This has the advantage that defects are not generated due to damage.

[0116] In addition, in the ALD method, the pressure inside the chamber is atmospheric or reduced, and the source gas for the reaction is The gases are introduced into the chamber in sequence, and the film is formed by repeating this gas introduction sequence. By switching between the switching valves (also called high-speed valves), two or more types of raw materials can be mixed. The gases are supplied to the chamber in order, and the first source gas is supplied to the chamber in order to prevent the mixture of the source gases. At the same time as or after the second gas, an inert gas (argon, nitrogen, etc.) is introduced. If an inert gas is introduced at the same time, the inert gas acts as a carrier gas. In addition, an inert gas may be introduced at the same time as the second source gas is introduced. In addition, instead of introducing an inert gas, the first source gas is discharged by vacuum evacuation, and then the second source gas is introduced. The first source gas may be introduced. The first source gas is adsorbed on the surface of the substrate to form a first monoatomic layer. The second monolayer is formed by reacting with the second source gas introduced later. A thin film is formed by laminating it on top.

[0117] This gas introduction sequence is repeated multiple times while controlling it until the desired thickness is achieved. The thickness of the thin film increases depending on the number of times the gas introduction sequence is repeated. Therefore, precise film thickness control is possible, and fine transistors can be fabricated. It is suitable for manufacturing.

[0118] As shown in FIG. 3A, gate electrodes 13c and 13d and a gate insulating film 13e are formed on a substrate 11. Next, an oxide semiconductor film 83 and an oxide semiconductor film 85 are formed on the gate insulating film 15. A stack of the oxide semiconductor film 81a, the oxide semiconductor film 83a, and the oxide semiconductor film 81a is formed.

[0119] The gate electrodes 13c and 13d are formed by the following method. Conductive films are formed by vacuum evaporation, pulsed laser deposition (PLD), thermal CVD, etc. A mask is formed on the conductive film by a photolithography process. Then, a part of the mask is etched to form gate electrodes 13c and 13d. do.

[0120] The gate electrodes 13c and 13d may be formed by electrolytic plating or printing instead of the above-mentioned method. Alternatively, the ink jet method may be used.

[0121] In addition, a tungsten film can be formed as a conductive film using a film formation device that uses ALD. In this case, WF6 gas and B2H6 gas are introduced repeatedly in sequence to obtain the initial tungsten content. A tungsten film is formed, and then WF6 gas and H2 gas are introduced simultaneously to form a tungsten film. It should be noted that SiH4 gas may be used instead of B2H6 gas.

[0122] Here, a tungsten film having a thickness of 100 nm is formed by sputtering. A mask is formed by a photolithography process, and a tungsten film is formed using the mask. Dry etching is performed to form gate electrodes 13c and 13d.

[0123] The gate insulating film 15 can be formed by sputtering, CVD, vacuum deposition, pulsed laser deposition, or the like. It is formed by the PLD method, thermal CVD method, etc.

[0124] When a silicon oxide film or a silicon oxynitride film is formed as the gate insulating film 15, As the source gas, it is preferable to use a deposition gas containing silicon and an oxidizing gas. Representative examples of silicon-containing deposition gases include silane, disilane, trisilane, and fluorosilane. Oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide.

[0125] When a gallium oxide film is formed as the gate insulating film 15, MOCVD (Metal Organic Chemical Vapor Deposition (OCVD) method It can be formed by

[0126] The gate insulating film 15 is formed by a thermal CVD method such as MOCVD or ALD. When forming a hafnium oxide film, a liquid containing a solvent and a hafnium precursor compound (haf Hafnium alkoxide solution, typically tetrakisdimethylamidohafnium (TDMAH Two types of gases are used: the source gas, which is vaporized ozone (O3), as an oxidizing agent. The chemical formula for tetrakisdimethylamidohafnium is Hf[N(CH3)2]4. Other liquid materials include tetrakis(ethylmethylamido)hafnium.

[0127] The gate insulating film 15 is formed by a thermal CVD method such as MOCVD or ALD. When forming an aluminum oxide film, a liquid containing a solvent and an aluminum precursor compound ( The raw material gas is vaporized trimethylaluminum (TMA, etc.) and 2H2O as an oxidizer. The chemical formula for trimethylaluminum is Al(CH3)3. Other liquid materials include tris(dimethylamido)aluminum and triisobutyl Aluminum, Aluminum tris(2,2,6,6-tetramethyl-3,5-heptane) Gionato), etc.

[0128] The gate insulating film 15 is formed by a thermal CVD method such as MOCVD or ALD. When forming a silicon oxide film, hexachlorodisilane is adsorbed onto the surface to be formed. It removes chlorine from the substance and supplies radicals of oxidizing gases (O2, nitrous oxide) for absorption. React with the kimono.

[0129] Here, a silicon oxynitride film is formed as the gate insulating film 15 by the plasma CVD method. Complete.

[0130] The stacked film of the oxide semiconductor film 83 and the oxide semiconductor film 81, and the oxide semiconductor film 83a and A method for forming the stacked film of the oxide semiconductor film 81a will be described below. Sputtering method, coating method, pulsed laser deposition method, laser ablation method, thermal C The oxide semiconductor film 83 and the oxide semiconductor film 83a are formed by a VD method or the like. and oxide semiconductor films that will later become the oxide semiconductor films 81 and 81a. Next, a mask is formed on the stacked oxide semiconductor film by a photolithography process. After forming a mask, part of the stacked oxide semiconductor film is etched using the mask. As a result, as shown in FIG. 3B, a portion of the gate electrode 13c on the gate insulating film 15 is a stacked film of an oxide semiconductor film 81 and an oxide semiconductor film 83 that are isolated from each other so as to overlap the portion; and on the gate insulating film 15, an element is isolated so as to overlap a part of the gate electrode 13d. A stacked film of the oxide semiconductor film 83a and the oxide semiconductor film 81a is formed. Remove.

[0131] When an oxide semiconductor film is formed by a sputtering method, a power source for generating plasma is used. The device may be an RF power supply device, an AC power supply device, a DC power supply device, or the like.

[0132] The sputtering gas may be a rare gas (typically argon) atmosphere, an oxygen atmosphere, a rare gas and In the case of a mixed gas of rare gas and oxygen, the rare gas It is preferable to increase the gas ratio of oxygen.

[0133] The target may be appropriately selected depending on the composition of the oxide semiconductor film to be formed. .

[0134] Note that when the oxide semiconductor film is formed by, for example, a sputtering method, The temperature is 150°C or higher and 750°C or lower, preferably 150°C or higher and 450°C or lower, and more preferably The oxide semiconductor film is formed at a temperature of 200°C or higher and 350°C or lower. S film can be formed.

[0135] In addition, the following conditions are preferably applied to form the CAAC-OS film.

[0136] By suppressing the inclusion of impurities during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the film formation chamber can be In addition, the impurity concentration in the deposition gas can be reduced. A deposition gas at a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0137] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition can be reduced. The oxygen ratio in the film forming gas is 30% by volume or more, preferably 100% by volume or more. Expressed as volume %.

[0138] The oxide semiconductor film is formed while being heated, and after the oxide semiconductor film is formed, By performing heat treatment, the hydrogen concentration in the oxide semiconductor film is increased to 2×10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Below, more preferably 1 x 1 0 19 atoms / cm 3 Less than or equal to 5 x 10 18 atoms / cm 3 Below, I prefer Or 1 x 10 18 atoms / cm 3 Less than or equal to 5 × 10 17 atoms / cm 3 or less, more preferably 1 × 10 16 atoms / cm 3 It can be .

[0139] Oxide semiconductor films, such as InGaZnO, are formed using a deposition system that uses ALD. X (X>0) When forming a film, In(CH3)3 gas and O3 gas are introduced in sequence and repeatedly to form InO Then, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form a GaO layer. Then, Zn(CH3)2 and O3 gases are introduced simultaneously to form a ZnO layer. The order of these layers is not limited to this example. Also, by mixing these gases, the InGaO2 layer and mixed compound layers such as InZnO2 layer, GaInO layer, ZnInO layer, and GaZnO layer. It is also possible to use H2O gas bubbled with an inert gas such as Ar instead of O3 gas. However, it is preferable to use O3 gas that does not contain H. In(CH3) In place of the gas In(C2H5)3, gas Ga(CH3)3 may be used. Alternatively, Ga(C2H5)3 gas may be used. That's fine.

[0140] Here, the atomic ratio of the metal elements in the target is In:Ga: A 10 nm thick oxide semiconductor film with Zn=1:3:6 and the atoms of the target metal element A 35 nm thick oxide semiconductor film with a numerical ratio of In:Ga:Zn=3:1:2 was formed in sequence. After that, a mask is formed on the oxide semiconductor film, and the oxide semiconductor film is selectively etched. Click here.

[0141] The heat treatment is carried out at a temperature higher than 350°C and lower than 650°C, preferably higher than 450°C and lower than 600°C. By carrying out the following, the CAAC conversion rate described below is 70% or more but less than 100%, preferably 80% % or more and less than 100%, preferably 90% or more and less than 100%, more preferably 95% or more and less than 90%. In addition, the oxide semiconductor film can be obtained with a hydrogen content of 8% or less. That is, it is possible to obtain an oxide semiconductor film having a low impurity concentration and a low defect level density. An oxide semiconductor film with a low conductivity can be formed.

[0142] Next, as shown in FIG. 3(B), an oxide semiconductor film is formed on the gate insulating film 15 and the stacked film. After that, the oxide semiconductor film 83 and the oxide semiconductor film 84 are etched into a desired shape. An oxide semiconductor film 82 is formed to cover the stacked film 81, and an oxide semiconductor film 83a and an oxide semiconductor film 83b are formed. An oxide semiconductor film 84 is formed to cover the laminated film of the semiconductor film 81a.

[0143] In this step, the side surfaces of the oxide semiconductor film 83 and the top surface and By forming the oxide semiconductor film 82 so as to cover the upper and lower surfaces of the substrate, the process of forming a pair of electrodes can be carried out in the following manner. In this case, the oxide semiconductor film 83 and the oxide semiconductor film 81 are not etched. The length of the oxide semiconductor film 83 and the oxide semiconductor film 81 in the channel width direction of the transistor Similarly, the side surface of the oxide semiconductor film 83a and the oxide semiconductor film 83b can be The oxide semiconductor film 84 is formed so as to cover the upper and side surfaces of the semiconductor film 81a. In the process of forming the electrodes, the oxide semiconductor film 83a and the oxide semiconductor film 81a are etched. As a result, the oxide semiconductor film 83a and the oxide semiconductor film 83b in the channel width direction of the transistor are This is preferable because it can reduce fluctuations in the length of the oxide semiconductor film 81a.

[0144] Next, heat treatment may be performed to dehydrogenate or dehydrate the oxide semiconductor film. The treatment temperature is typically 150°C or higher and lower than the substrate strain point, preferably 250°C or higher and 450°C or lower. °C or less, and more preferably 300°C or more and 450°C or less.

[0145] Heat treatment is carried out using rare gases such as helium, neon, argon, xenon, krypton, or It is carried out in an inert gas atmosphere containing nitrogen, or after heating in an inert gas atmosphere, it is heated in an oxygen atmosphere. It should be noted that the inert atmosphere and oxygen atmosphere do not contain hydrogen, water, etc. The treatment time is preferably from 3 minutes to 24 hours.

[0146] The heat treatment can be carried out using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. The processing time can be reduced.

[0147] Here, after heat treatment in a mixed gas atmosphere containing nitrogen and oxygen at 450°C, Heat treatment is carried out in an oxygen atmosphere at 0°C.

[0148] Note that instead of this heat treatment, a similar heat treatment may be performed after the process shown in FIG.

[0149] Next, as shown in FIG. 3C, a pair of oxide semiconductor films 82 and 84 are formed on the oxide semiconductor film 82. The electrodes 19c and 20c form a pair of electrodes 19d and 20d.

[0150] The method for forming the pair of electrodes 19c and 20c and the pair of electrodes 19d and 20d will be described below. Introduction: Sputtering, Vacuum Evaporation, Pulsed Laser Deposition (PLD), and Thermal CVD Next, a mask is formed on the conductive film by a photolithography process. Next, the conductive film is etched using the mask to form a pair of electrodes 19c and 20c. A pair of electrodes 19d and 20d are formed, and then the mask is removed.

[0151] Here, a copper-manganese alloy film with a thickness of 50 nm, a copper film with a thickness of 400 nm, and a copper film with a thickness of 10 Next, a copper-manganese alloy film with a thickness of 0 nm is deposited by sputtering. A mask is formed on the copper alloy film by a photolithography process, and the copper- The manganese alloy film, the copper film, and the copper-manganese alloy film were dry-etched to form a pair of electrodes 1 9c and 20c form a pair of electrodes 19d and 20d.

[0152] After forming the pair of electrodes 19c and 20c and the pair of electrodes 19d and 20d, heating The heat treatment may be performed on the oxide semiconductor film 82 and the oxide semiconductor film 84. The heat treatment can be carried out under the same conditions as those for the heat treatment carried out after the formation of the insulating film.

[0153] After forming the pair of electrodes 19c and 20c and the pair of electrodes 19d and 20d, etching is performed. It is preferable to carry out a washing process to remove the chalk residue. Therefore, it is possible to prevent a short circuit between the pair of electrodes 19c and 20c and the pair of electrodes 19d and 20d. The cleaning process is carried out using TMAH (Tetramethylammonium Hydroxide). alkaline solutions such as fluoric acid, oxalic acid, phosphoric acid, etc. Alternatively, the reaction can be carried out using water.

[0154] Next, as shown in FIG. 4(A), the gate insulating film 15, the oxide semiconductor film 82, and the oxide semiconductor A protective film 21 is applied on the body film 84, the pair of electrodes 19c and 20c, and the pair of electrodes 19d and 20d. Form.

[0155] The protective film 21 can be formed by a sputtering method, a CVD method, a vapor deposition method, or the like.

[0156] The oxide insulating film 23 contained in the protective film 21 is an oxide film containing nitrogen and having a small amount of defects. When forming an oxide insulating film, examples of oxide insulating films that contain nitrogen and have few defects include: The silicon oxynitride film can be formed by the CVD method. It is preferable to use a deposition gas containing silicon and an oxidizing gas. Typical examples of deposition gases include silane, disilane, trisilane, and fluorosilane. Oxidizing gases include nitrous oxide and nitrogen dioxide.

[0157] The oxidizing gas is more than 20 times but less than 100 times, preferably 4 times, the deposition gas. The pressure in the processing chamber is set to less than 100 Pa, preferably 50 Pa or less. By using the CVD method, the oxide insulating film 23 contains nitrogen and has a small amount of defects. Therefore, a thin oxide insulating film can be formed.

[0158] The oxide insulating film 25 contained in the protective film 21 contains more oxygen than the oxygen that satisfies the stoichiometric composition. When an oxide insulating film containing a large amount of oxygen is used, the amount of oxygen is larger than that of oxygen satisfying the stoichiometric composition. As an example of an oxide insulating film containing a large amount of oxygen, a silicon oxynitride film is formed using the CVD method. It is possible.

[0159] The oxide insulating film 25 is made of a silicon dioxide film placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is kept at 180°C or higher and 280°C or lower, more preferably 200°C or higher and 240°C or lower. The raw material gas is introduced into the processing chamber to set the pressure in the processing chamber at 100 Pa or more and 250 Pa or less. , more preferably 100 Pa or more and 200 Pa or less, and .17W / cm 2 More than 0.5W / cm 2 or less, more preferably 0.25 W / cm 2 End 0.35W / cm 2 Under the following conditions of high frequency power supply, silicon oxide film or oxide A silicon nitride film is formed.

[0160] The nitride insulating film 27 can be formed by using a sputtering method, a CVD method, or the like.

[0161] When a silicon nitride film is formed as the nitride insulating film 27 by the plasma CVD method, the silicon The deposition gas containing carbon, nitrogen, and ammonia are used as the source gas. By using a small amount of ammonia compared to nitrogen, ammonia dissociates in the plasma, The active species react with silicon and water contained in the silicon-containing deposition gas. This breaks the silicon bond and the nitrogen triple bond, promoting the bonding of silicon and nitrogen. This results in fewer bonds between silicon and hydrogen, fewer defects, and a dense silicon nitride film. On the other hand, if the amount of ammonia relative to nitrogen in the source gas is large, silicon The decomposition of the deposition gas containing silicon and nitrogen does not proceed, and silicon and hydrogen bonds remain. As a result, the number of defects increases and a rough silicon nitride film is formed. In the raw material gas, the flow rate ratio of nitrogen to ammonia is 5 to 50, preferably 10 It is preferable to set it to 50 or less.

[0162] Note that after the oxide insulating film 25 is formed, heat treatment may be performed. Typically, the temperature is 150°C or higher and lower than the substrate strain point, preferably 200°C or higher and 450°C or lower, and more preferably The heat treatment is preferably performed at a temperature higher than or equal to 300° C. and lower than or equal to 450° C. A part of the oxygen contained in the oxide semiconductor film 83, the oxide semiconductor film 81, and the oxide semiconductor film 8 2. Transfer to the oxide semiconductor film 83a, the oxide semiconductor film 81a, and the oxide semiconductor film 84. , and the oxygen vacancies contained therein can be reduced.

[0163] Here, heat treatment is performed at 350°C for 1 hour in a mixed gas atmosphere containing nitrogen and oxygen. .

[0164] After the nitride insulating film 27 is formed, a heat treatment is performed to release hydrogen and the like from the protective film 21. It is possible to do this.

[0165] Here, heat treatment is performed at 350°C for 1 hour in a mixed gas atmosphere containing nitrogen and oxygen. .

[0166] Through the above steps, a transistor with a reduced threshold voltage shift can be manufactured. Furthermore, a transistor with reduced fluctuation in electrical characteristics can be manufactured.

[0167] Next, as shown in FIG. 4B, a protective film on the oxide semiconductor film 82 of the transistor 10k_4 is The protective film 21 and the electrode 20d of the transistor 10m_4 are provided with openings that expose a part of each. Next, an insulating film 95 is formed on the protective film 21. A conductive film 87 is formed in the region overlapping with the nitride semiconductor film 82, and a transistor 10 is formed on the insulating film 95. A first electrode 86a is formed to connect to the electrode 20d of m_4.

[0168] The insulating film 95 can be formed by a method such as photolithography, sputtering, vapor deposition, or droplet ejection (inkjet) method. It can be formed by using a printing method (screen printing, offset printing, etc.) or the like. Cut.

[0169] Here, the insulating film 95 is formed using photosensitive polyimide.

[0170] The first electrode 86a can be formed by a method such as sputtering, vapor deposition, droplet ejection (inkjet method, etc.), or printing. The conductive layer can be formed by using a printing method (screen printing, offset printing, etc.).

[0171] Next, as shown in FIG. 5A, the insulating film 95, the conductive film 87, and the first electrode 86a are coated with the following: An insulating film 96 is formed. The insulating film 96 can be formed by appropriately using the same method as that for the insulating film 95. This can be done.

[0172] Next, as shown in FIG. 5(B), an EL layer 97 is formed on the insulating film 96 and the first electrode 86a. The EL layer 97 is formed by using a vapor deposition method, a droplet discharge method (such as an inkjet method), a coating method, or the like. It can be formed.

[0173] The above process allows for high-speed operation, minimizes deterioration due to light irradiation, and provides excellent display quality. Therefore, a display device having a pixel portion can be manufactured.

[0174] The following describes modifications of the transistors in the liquid crystal display device shown in FIG. 1 and the light-emitting device shown in FIG. will be explained.

[0175] <Variation 1> The liquid crystal display device shown in FIG. 1 and the light-emitting device shown in FIG. 2 are made up of a stack of two oxide semiconductor films. Here, a modified example of the liquid crystal display device shown in FIG. Specifically, as shown in FIG. 26, an oxide semiconductor film 81 and an oxide semiconductor film 82 are formed on a gate insulating film 15. A transistor 10k_1 on which a conductor film 82 is stacked, and an oxide semiconductor The transistor 10m_1 includes a stack of the film 81a and the oxide semiconductor film 84.

[0176] The oxide semiconductor film 81 and the oxide semiconductor film 81a have an atomic ratio of In that is less than or equal to Zn or is equal to or greater than the atomic ratio of M (M is Al, Ga, Y, Zr, La, Ce, or Nd). The oxide semiconductor film 81 and the oxide semiconductor film 81a are preferably made of In-M-Zn oxide (M is A). In the case of the oxide semiconductor film 81, the oxide semiconductor film 82 is formed of the oxide semiconductor film 81. In the target used for forming the semiconductor film 81a, the atomic ratio of the metal elements is set to In :M:Zn=x3:y3:z3 、 x3 / y3 must be greater than 1 and less than or equal to 6 A typical example of the atomic ratio of the metal elements in the target is In:M:Zn=2: 1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2:1:3, In:M :Zn=3:1:2, In:M:Zn=3:1:3, In:M:Zn=3:1:4, In :M:Zn=1:1:1, In:M:Zn=1:1:1.2, etc.

[0177] The oxide semiconductor film 82 and the oxide semiconductor film 84 are formed by using a material in which the atomic ratio of In is Zn or M (M is Al, Ga, Y, Zr, La, Ce, or Nd) The oxide semiconductor film 82 and the oxide semiconductor film 84 may be an In-M-Zn oxide (M is In the case of Al, Ga, Y, Zr, La, Ce, or Nd), the oxide semiconductor film 82 and the oxide In the target used to form the semiconductor film 84, the atomic ratio of metal elements is In :M:Zn=x4:y4:z4 、 x4 / y4 must be greater than or equal to 1 / 6 and less than or equal to 1 It is also preferable that z4 / y4 is 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. Note that when z4 / y4 is set to 1 or more and 6 or less, the oxide semiconductor film 82 and the oxide semiconductor film 83 can be formed. The CAAC-OS film is easily formed as the compound semiconductor film 84. Typical examples of atomic ratios are In:M:Zn=1:3:2 and In:M:Zn=1:3:4. , In:M:Zn=1:3:6, In:M:Zn=1:3:8, In:M:Zn=1:4 :4, In:M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn=1 :4:7, In:M:Zn=1:4:8, In:M:Zn=1:5:5, In:M:Zn =1:5:6, In:M:Zn=1:5:7, In:M:Zn=1:5:8, In:M: Zn=1:6:8, etc.

[0178] <Variation 2> The liquid crystal display device shown in FIG. 1 and the light-emitting device shown in FIG. 2 are made up of a stack of three or more oxide semiconductor films. Here, a modification of the light emitting device shown in FIG. Specifically, as shown in FIG. 27, an oxide semiconductor film 83 formed on a gate insulating film 15, A transistor 10k_2 in which an oxide semiconductor film 81 and an oxide semiconductor film 82 are stacked, The oxide semiconductor film 83a, the oxide semiconductor film 81a, and the oxide semiconductor film 82a formed on the gate insulating film 15 are The transistor 10m_2 includes a semiconductor film 84 stacked thereon.

[0179] The oxide semiconductor film 83 and the oxide semiconductor film 83a are formed by the oxide semiconductor film 82 and the oxide semiconductor film 83b. An oxide semiconductor film having the atomic ratio of metal elements shown in the oxide semiconductor film 84 can be used appropriately. Note that the oxide semiconductor film 81 and the oxide semiconductor film 81a form a channel of a transistor. Since the oxide semiconductor film functions as a gate electrode, the oxide semiconductor film has the largest thickness among the stacked oxide semiconductor films. The thickness of the semiconductor film 81 and the oxide semiconductor film 81a is preferably 3 nm or more and 200 nm or less. is 3 nm or more and 100 nm or less, more preferably 30 nm or more and 50 nm or less. The oxide semiconductor film 83 and the oxide semiconductor film 83a are stacked. The oxide semiconductor film 83 and the oxide semiconductor film 83a are preferably the thinnest. is 2 nm or more and 100 nm or less, preferably 2 nm or more and 50 nm or less, preferably 3 nm More than 15 nm.

[0180] <Variation 3> The liquid crystal display device shown in FIG. 1 and the light-emitting device shown in FIG. 2 are made up of a stack of two oxide semiconductor films. Here, a modified example of the liquid crystal display device shown in FIG. Specifically, as shown in FIG. 28, a transistor in which oxide semiconductor films are stacked is provided. Specifically, the oxide semiconductor film 81 formed on the gate insulating film 15 and the oxide semiconductor film 8 a transistor 10k_3 in which an oxide semiconductor film 82 covering the side surfaces and the top surface of the transistor 10k_3 is stacked; The oxide semiconductor film 81a formed on the gate insulating film 15 and the side surface of the oxide semiconductor film 81a The transistor 10m_3 includes a stack of an oxide semiconductor film 84 covering the upper surface of the transistor 10m_3.

[0181] By forming the oxide semiconductor film 82 so as to cover the side and top surfaces of the oxide semiconductor film 81, Therefore, the oxide semiconductor film 81 is not etched in the subsequent step of forming a pair of electrodes. As a result, the variation in the length of the oxide semiconductor film 81 in the channel width direction of the transistor can be reduced. In addition, the oxide semiconductor film 81a is preferably formed so as to cover the side and top surfaces of the oxide semiconductor film 81a. By forming the film 84, the oxide semiconductor film 81a can be formed in the subsequent step of forming a pair of electrodes. As a result, the oxide semiconductor film 8 in the channel width direction of the transistor is This is preferable because it can reduce fluctuations in the length of 1a.

[0182] <Variation 4> The liquid crystal display device shown in FIG. 1 and the light-emitting device shown in FIG. 2 are made up of a stack of three or more oxide semiconductor films. Here, a modification of the light emitting device shown in FIG. Specifically, as shown in FIG. 29, a transistor in which oxide semiconductor films are stacked is provided. Specifically, the oxide semiconductor film 83 formed on the gate insulating film 15 and the oxide semiconductor film 83 The oxide semiconductor film 81 on the upper side, the side surface of the oxide semiconductor film 83, and the side surface of the oxide semiconductor film 81 and a transistor 10k_4 having an oxide semiconductor film 82 covering the upper surface thereof stacked thereon, and a gate insulating film The oxide semiconductor film 83a formed on the film 15 and the oxide semiconductor film 83a The conductive film 81a, the side surface of the oxide semiconductor film 83a, and the side surface and top surface of the oxide semiconductor film 81a and a transistor 10m_4 in which an oxide semiconductor film 84 covering the transistor 10m_4 is stacked.

[0183] 28 and 29 show examples in which a conductive film 87 is provided. However, one embodiment of the present invention is not limited to this. An example of this case is shown in Figures 12 and 13.

[0184] 1 and 2, the electrodes 19c, 20c, 19d, and 2 The oxide semiconductor film 82, the oxide semiconductor film 84, etc. are provided below the layer 0d, etc. One aspect of the present invention is not limited to this. An oxide semiconductor film 82, an oxide semiconductor film 84, etc. may be provided on the upper side of the insulating film 0d, etc. Examples of these cases are shown in Figures 14, 15, 16, 17, 18, and 19. FIG. 14 shows a transistor in which a single-layer oxide semiconductor film 82 is provided on the electrode 19c and the electrode 20c. 15 shows an example of a liquid crystal display device using a single-layer oxide semiconductor film 82. This is an example of a light-emitting device using a transistor 10n provided on an electrode 19c and an electrode 20c. FIG. 16 shows a transistor in which two oxide semiconductor films are provided on electrodes 19c and 20c. 17 shows an example of a liquid crystal display device using 10k, in which a three-layer oxide semiconductor film is used as an electrode 19c. 10c and a transistor 10n provided on the electrode 20c. 18 is a transistor 10 in which two layers of oxide semiconductor films are provided on electrodes 19c and 20c. 19 shows an example of a liquid crystal display device using a three-layer oxide semiconductor film as an electrode 19c and This is an example of a light-emitting device using a transistor 10n provided on an electrode 20c. In the configuration of FIG. 19, it is also possible to not provide the conductive film 87. In that case, 20 shows a configuration in which the conductive film 87 is not provided, and FIG. 19 shows a configuration in which the conductive film 87 is not provided. The configuration is shown in Figure 21.

[0185] <Variation 5> The transistor shown in FIG. 1 is a channel-etched transistor, but it is possible to appropriately protect the channel. A protection type transistor can be used.

[0186] <Variation 6> The transistor shown in Figure 1 is a bottom gate transistor, but it can be used in pixel circuits or drive circuits. The transistor used in the driving circuit has a bottom-contact top-gate structure as shown in Figure 22. 22(A) shows a top view of a transistor, and FIG. 22(B) and FIG. 22(C) show a structure of a transistor. A cross-sectional view of the transistor is shown in FIG. 22(C). 22(A) and a cross section in the channel width direction indicated by the dashed line CD in FIG. The structure of the transistor will be described below. An insulating base film 12 is formed on a substrate 11. Electrodes are formed and patterned to form electrodes 19 and 20. An oxide semiconductor is then formed thereon. Then, the oxide semiconductor film 80a and the oxide semiconductor film 80 are formed. After patterning the oxide semiconductor film 80, an oxide semiconductor film 80b is formed thereon. An insulating film 15 is formed, and then a gate electrode 13 is formed. After patterning, a protective film 21 is formed. In FIG. 22B, the oxide semiconductor film 80a and the oxide semiconductor film 80 are formed, and then the patterning is performed. After the etching, the oxide semiconductor film 80b is formed. 0, the oxide semiconductor film 80b may be patterned after it is formed. In (B), the semiconductor film has a three-layer laminated structure, but it can be formed with two layers or a single layer semiconductor film. It's okay to do so.

[0187] <Variation 7> The transistor shown in Figure 1 is a bottom gate transistor, but it can be used in pixel circuits or drive circuits. The transistor used in the driving circuit has a top-contact top-gate structure as shown in Figure 23. A top view of the transistor is shown in FIG. 23(A), and FIG. 23(B) and FIG. 23(C) are views of the transistor. 23(A) shows a cross-sectional view of the transistor. 23(B) is a cross-sectional view of the channel width direction indicated by the dashed line CD in FIG. (C) and use them to explain the structure of the transistor.

[0188] An underlying insulating film 12 is formed on a substrate 11, and an oxide semiconductor film 80a and an oxide semiconductor film 80b are formed thereon. Then, the oxide semiconductor film 80a and the oxide semiconductor film 80 are patterned. After that, an oxide semiconductor film 80b is formed. An electrode is formed thereon and patterned to form an electrode. The electrode 19 and the electrode 20 are formed on the insulating film 15. The gate electrode 15 is then formed on the insulating film 15. 23B, the oxide semiconductor film 3 is formed, and after patterning, a protective film 21 is formed. 80a, an oxide semiconductor film 80 is formed, and after patterning, an oxide semiconductor film 80b is formed. However, since the oxide semiconductor film 80a, the oxide semiconductor film 80, and the oxide semiconductor film 80b are formed, In addition, in FIG. 23(B), the semiconductor film is formed as a three-layer laminated structure. However, it may be formed by stacking two layers or by using a single layer semiconductor film.

[0189] Note that the structures and methods shown in this embodiment may be used in conjunction with structures and methods shown in other embodiments and examples. and methods can be used in appropriate combination.

[0190] (Embodiment 2) In this embodiment, a structural example of a display device according to one embodiment of the present invention will be described.

[0191] <Configuration example> FIG. 6A is a top view of a display device according to one embodiment of the present invention, and FIG. 6B is a top view of a display device according to one embodiment of the present invention. A pixel circuit that can be used when a liquid crystal element is applied to a pixel of the display device of the embodiment will be described. 6C is a circuit diagram showing a pixel of the display device according to one embodiment of the present invention. FIG. 10 is a circuit diagram illustrating a pixel circuit that can be used when an L element is applied.

[0192] The transistors disposed in the pixel portion can be formed according to the above-described embodiment modes. In addition, since the transistor can be easily made into an n-channel type, the n-channel transistor in the driver circuit can be easily made into an n-channel type. A part of the driver circuit can be configured with a panel-type transistor, and the transistors in the pixel section can be In this way, the pixel portion and the driver circuit are formed over one substrate. By doing so, a highly reliable display device can be provided. and a display device having a pixel portion with excellent display quality and with little deterioration due to light irradiation. It is possible.

[0193] An example of a block diagram of an active matrix display device is shown in FIG. On a substrate 900, a pixel portion 901, a first scanning line driver circuit 902, a second scanning line driver circuit The pixel portion 901 has a signal line driver circuit 903 and a signal line driver circuit 904. A plurality of scanning lines are arranged extending from a first scanning line driving circuit 902, and The scanning line driver circuit 903 is arranged to extend from the scanning line driver circuit 903. In the display area, pixels each having a display element are arranged in a matrix. The substrate 900 is a connection board for FPC (Flexible Printed Circuit) etc. It is connected to a timing control circuit (also called a controller or control IC) via .

[0194] In FIG. 6A, a first scanning line driver circuit 902, a second scanning line driver circuit 903, a signal line The driver circuit 904 is formed on the same substrate 900 as the pixel portion 901. This reduces the number of components, such as the drive circuit, that are required on the board 9, thereby reducing costs. 00When an external drive circuit is provided, it becomes necessary to extend the wiring, and the number of connections between the wiring increases. When a driving circuit is provided on the same substrate 900, the number of connections between the wirings can be reduced. Therefore, it is possible to improve reliability or yield.

[0195] By configuring the pixel portion and the driver circuit as shown in the above-described embodiment mode 1, A second scanning line driver circuit 902, a second scanning line driver circuit 903, and a signal line driver circuit 904 are connected to a field effect mobility Therefore, the signal line driver circuit 90 can be manufactured using a transistor with high optical performance. It is possible to form a demultiplexer circuit in 4. The demultiplexer circuit is Since this is a circuit that distributes an input signal to multiple outputs, it is possible to reduce the number of input terminals for the input signal. For example, one pixel may have a red sub-pixel, a green sub-pixel, and a blue sub-pixel. By providing a pixel and a demultiplexer circuit corresponding to each pixel, The input signal can be distributed using a demultiplexer circuit, so the input terminal It is possible to reduce it to one-third.

[0196] <Liquid crystal display device> An example of the circuit configuration of a pixel is shown in FIG. 6(B). 1 shows a pixel circuit that can be applied to the device.

[0197] This pixel circuit can be applied to a configuration in which one pixel has a plurality of pixel electrodes. The pixel electrodes are connected to different transistors, and each transistor can be driven by a different gate signal. This allows the individual pixel voltages of the multi-domain designed pixels to be The signals applied to the poles can be controlled independently.

[0198] The gate wiring 912 of the transistor 916 and the gate wiring 913 of the transistor 917 are separated so that different gate signals can be applied. The source or drain electrode 914, which functions as a 17. Transistors 916 and 917 are used in common in the above embodiment. The transistors described in the following embodiments can be used as appropriate. A display device can be provided.

[0199] A first pixel electrode electrically connected to the transistor 916 and a second pixel electrode electrically connected to the transistor 917 The shape of the second pixel electrode that is electrically connected to the first pixel electrode and the second pixel electrode will be described. The first pixel electrode has a V-shaped shape and is separated by a slit. The second pixel electrode is formed so as to surround the outside of the first pixel electrode.

[0200] The gate electrode of the transistor 916 is connected to the gate wiring 912, and the gate electrode of the transistor 917 is connected to the gate wiring 912. The gate electrode of the gate electrode 912 is connected to the gate wiring 913. 3, different gate signals are applied to transistors 916 and 917. By varying the voltage, the orientation of the liquid crystal can be controlled.

[0201] Also, a capacitance wiring 910, a gate insulating film functioning as a dielectric, and a first pixel electrode or A storage capacitor may be formed by a capacitor electrode electrically connected to the second pixel electrode.

[0202] The multi-domain structure has a first liquid crystal element 918 and a second liquid crystal element 919 in one pixel. The first liquid crystal element 918 is composed of a first pixel electrode, a counter electrode, and a liquid crystal layer therebetween. The second liquid crystal element 919 is composed of a second pixel electrode, a counter electrode, and a liquid crystal layer therebetween.

[0203] Note that the pixel circuit shown in FIG. 6B is not limited to this. For example, Pixels can be equipped with new elements such as switches, resistors, capacitors, transistors, sensors, or logic circuits. may be added.

[0204] Although the description here is given using a VA type liquid crystal display device, the TN mode, VA mode, etc. may also be used as appropriate. mode, ASM (Axially Symmetric Aligned Micro- cell) mode, OCB (Optically Compensated Biref ringence mode, MVA mode, PVA (Patterned Vertic Alignment) mode, IPS mode, FFS mode, or TBA (Tr You can also use the (Ansverse Bend Alignment) mode. However, various liquid crystal elements and driving methods thereof can be used without being limited to these. .

[0205] Also, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent The liquid crystal element may be configured by the following. The liquid crystal that exhibits the blue phase has a response speed of 1 msec or less. Since it is short and optically isotropic, alignment treatment is not required and viewing angle dependency is small.

[0206] <Light-emitting device> Another example of the circuit configuration of a pixel is shown in Figure 6(C). 1 shows the pixel structure of the device.

[0207] In an organic EL element, when a voltage is applied to the light-emitting element, electrons are emitted from one of the pair of electrodes. and holes are injected from the other side into the layer containing the light-emitting organic compound, causing a current to flow. The electrons and holes recombine to form an excited state in the light-emitting organic compound, When the excited state returns to the ground state, light is emitted. The optical element is called a current-excited light-emitting element.

[0208] FIG. 6C is a diagram showing an example of an applicable pixel circuit. This example shows how a transistor is used as a pixel. The pixel circuit is also suitable for digital time gray scale driving. It can be used.

[0209] Regarding the configuration of applicable pixel circuits and pixel operation when digital time gray scale driving is applied, and explain.

[0210] The pixel 920 includes a switching transistor 921, a driving transistor 922, and a light emitting element. The switching transistor 921 has a gate element 924 and a capacitor element 923. The gate electrode is connected to the scanning line 926, and the first electrode (one of the source electrode and the drain electrode) is The second electrode (the other of the source electrode and the drain electrode) is connected to the signal line 925. The driving transistor 922 is connected to the gate electrode of the driving transistor 922. The first electrode is connected to a power supply line 927 via a capacitor element 923, and the second electrode is connected to the power supply line 927. The second electrode is connected to the first electrode (pixel electrode) of the light emitting element 924. The second electrode of 4 corresponds to the common electrode 928. The common electrode 928 is formed on the same substrate. It is electrically connected to the common potential line.

[0211] The switching transistor 921 and the driving transistor 922 are the same as those in the above embodiment. This allows for the development of highly reliable organic EL devices. A display device can be provided.

[0212] The potential of the second electrode (common electrode 928) of the light-emitting element 924 is set to a low power supply potential. The low power supply potential is a potential lower than the high power supply potential supplied to the power supply line 927, for example, GN The low power supply potential can be set to D, 0 V, or the like. The high power supply potential and the low power supply potential are set so that the potential difference is equal to or greater than the light emitting element 92 By applying a voltage to the light emitting element 924, a current flows through the light emitting element 924, causing it to emit light. The forward voltage of 24 refers to the voltage required to achieve the desired brightness, and is at least Includes threshold voltage.

[0213] The capacitor 923 is substituted for the gate capacitance of the driving transistor 922. The gate capacitance of the driving transistor 922 can be omitted. A capacitance may be formed between the

[0214] Next, a description will be given of the signal input to the driving transistor 922. Voltage input voltage driving In this method, the driving transistor 922 is in two states: fully on and fully off. A video signal that becomes a pixel value is input to the driving transistor 922. In order to operate the motor 922 in the linear region, a voltage higher than the voltage of the power supply line 927 is applied to the drive A signal line 925 is applied to the gate electrode of the transistor 922. A voltage equal to or greater than the threshold voltage Vth of the bias transistor 922 is applied.

[0215] When analog gradation driving is performed, the gate electrode of the driving transistor 922 is connected to the light emitting element 92 4 plus the threshold voltage Vth of the driving transistor 922. It should be noted that a video signal is input so that the driving transistor 922 operates in the saturation region. The driving transistor 922 is operated in the saturation region. In order to do this, the potential of the power supply line 927 is set higher than the gate potential of the driving transistor 922. By converting the video signal into an analog signal, a current corresponding to the video signal is supplied to the light emitting element 924. It is possible to perform analog gradation driving.

[0216] The configuration of the pixel circuit is not limited to the pixel configuration shown in FIG. C) The pixel circuit shown in You can also add roads etc.

[0217] When the transistors illustrated in the above embodiments are applied to the circuits illustrated in FIGS. In this case, the source electrode (first electrode) is on the low potential side and the drain electrode (second electrode) is on the high potential side. are electrically connected to each other. Furthermore, the first gate electrode (and the third gate electrode) and the second gate electrode is connected to the It is only necessary to configure the device so that a potential lower than the potential applied to the source electrode can be input.

[0218] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0219] (Embodiment 3) In this embodiment, the transistor included in the semiconductor device described in the first embodiment is One embodiment applicable to an oxide semiconductor film will be described.

[0220] The oxide semiconductor film is an oxide semiconductor having a single crystal structure (hereinafter referred to as a single-crystal oxide semiconductor). , a polycrystalline oxide semiconductor (hereinafter referred to as a polycrystalline oxide semiconductor), a microcrystalline oxide semiconductor oxide semiconductors (hereinafter referred to as microcrystalline oxide semiconductors) and amorphous oxide semiconductors (hereinafter referred to as amorphous oxide semiconductors) The oxide semiconductor film may be formed of one or more of the following: Alternatively, the oxide semiconductor film may be an amorphous oxide semiconductor film. The CAAC-OS may be made of an oxide semiconductor having a conductor and crystal grains. and a microcrystalline oxide semiconductor will be described.

[0221] First, we will explain the CAAC-OS film. These oxide semiconductors are called "Oxide Semiconductors with Axis-Aligned Nanocrystals" It is also possible.

[0222] The CAAC-OS film is an oxide film having multiple crystal parts (also called pellets) aligned along the c-axis. It is one of the semiconductor films.

[0223] Transmission Electron Microscope (TEM) The CAAC-OS bright-field image and diffraction pattern were analyzed by a combined analysis image (high resolution) When observing the high-resolution TEM image, multiple pellets can be confirmed. In the high-resolution TEM image, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, it is difficult to clearly identify the CAAC-OS. It can be said that the decrease in electron mobility caused by this is unlikely to occur.

[0224] Below, we will explain the CAAC-OS observed by TEM. This shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the surface of the material. For high-resolution TEM imaging, spherical aberration correction is required. The spherical aberration correction function was used to obtain high-resolution TEM images. This is called a Cs-corrected high-resolution TEM image. This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by Denshi Co., Ltd. can be done.

[0225] Figure 7(B) shows an enlarged Cs-corrected high-resolution TEM image of region (1) in Figure 7(A). (B) shows that the metal atoms are arranged in layers in the pellet. The arrangement of each atomic layer is determined by the surface on which the CAAC-OS film is formed (also called the surface on which the film is formed). It reflects the unevenness of the surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0226] As shown in Figure 7(B), CAAC-OS has a characteristic atomic arrangement. The characteristic atomic arrangement is shown by auxiliary lines. The size of each pellet is about 1 nm to 3 nm, and the inclination between pellets The size of the gaps that are generated is about 0.8 nm. , which can also be called nanocrystals (nc).

[0227] Here, based on the Cs-corrected high-resolution TEM image, the pellet of CAAC-OS on the substrate 5120 was The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 7(D)). The inclination between the pellets observed in FIG. 7(C) The area where this occurs corresponds to the area 5161 shown in FIG. 7(D).

[0228] In addition, Fig. 30(A) shows the Cs of the plane of the CAAC-OS observed from a direction approximately perpendicular to the sample surface. Corrected high-resolution TEM images are shown for regions (1), (2), and (3) in Figure 30(A). Enlarged Cs-corrected high-resolution TEM images are shown in Figure 30(B), Figure 30(C), and Figure 30(D), respectively. 30(D). From Fig. 30(B), Fig. 30(C) and Fig. 30(D), the pellet It can be seen that the metal atoms are arranged in a triangular, square, or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms between different pellets.

[0229] Next, the CA analyzed by X-ray diffraction (XRD) We will explain AC-OS. For example, CAAC-OS with InGaZnO4 crystals When structural analysis is performed using the out-of-plane method, the results are as shown in Figure 31(A). A peak may appear at a diffraction angle (2θ) of around 31°. Since the crystal orientation of CAAC-OS is attributed to the (009) plane of nO4, the crystal orientation of CAAC-OS is considered to be c-axis oriented. It can be seen that the c-axis is oriented in a direction substantially perpendicular to the surface on which the film is formed or the upper surface.

[0230] In addition, in the structural analysis of CAAC-OS using the out-of-plane method, 2θ is 31° In addition to the peaks around 2θ around 36°, a peak may also appear. The peaks around the center of the crystal grains indicate that some of the CAAC-OS grains do not have a c-axis orientation. The more preferable CAAC-OS is the structure solution by the out-of-plane method. In the analysis, a peak is observed at 2θ of approximately 31°, but no peak is observed at 2θ of approximately 36°.

[0231] On the other hand, in-plan X-ray irradiation is performed on the CAAC-OS in a direction approximately perpendicular to the c-axis. When structural analysis is performed using the e method, a peak appears at 2θ around 56°. This peak is due to In It is attributed to the (110) plane of the GaZnO4 crystal. In the case of CAAC-OS, 2θ is set to 56 The sample was fixed at approximately 100°, and the analysis was performed while rotating the sample around the normal vector of the sample surface (φ axis). Even if a φ scan is performed, no clear peak appears as shown in Figure 31(B). However, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ is When scanning is performed, the peaks attributable to the crystal plane equivalent to the (110) plane are as shown in Figure 31(C). Therefore, from the structural analysis using XRD, it is clear that CAAC-OS has the following structure: It can be seen that the orientation of the a-axis and b-axis is irregular.

[0232] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with nO4 crystals, a probe diameter of 300 nm was placed parallel to the sample surface. When an electron beam is incident, a diffraction pattern (selected area transmission electron diffraction) like that shown in Figure 32(A) is generated. This diffraction pattern may show the InGaZnO4 This includes spots due to the (009) plane of the crystal. Therefore, electron diffraction also reveals The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis is approximately on the surface to be formed or on the upper surface. On the other hand, for the same sample, the probe is oriented perpendicular to the sample surface. The diffraction pattern when an electron beam with a diameter of 300 nm was incident is shown in Figure 32(B). (B) shows a ring-shaped diffraction pattern. Therefore, electron diffraction also reveals It is clear that the a-axis and b-axis of the pellets contained in the CAAC-OS do not have any orientation. The first ring in FIG. 32(B) is the (010) plane of the InGaZnO4 crystal. The second ring in Figure 32(B) is thought to be due to the (100) plane. This is thought to be due to the (110) plane.

[0233] CAAC-OS is an oxide semiconductor with a low density of defect states. Examples of defects include impurity-induced defects and oxygen vacancies. C-OS can also be considered an oxide semiconductor with a low impurity concentration. It can also be said that the oxide semiconductor has few oxygen vacancies.

[0234] Impurities contained in an oxide semiconductor can act as carrier traps or carrier generation sources. In addition, oxygen vacancies in oxide semiconductors can become carrier traps or trap water. By capturing atoms, they can become a carrier generation source.

[0235] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, oxygen is more likely to be present than metal elements such as silicon that make up oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, thereby changing the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, and niobium Carbon dioxide and other compounds have a large atomic radius (or molecular radius), so they can easily arrange the atoms of oxide semiconductors. This causes disorder and reduces crystallinity.

[0236] In addition, oxide semiconductors with low defect state density (few oxygen vacancies) can reduce carrier density. Such an oxide semiconductor can be obtained by using a high-purity intrinsic or substantially high-purity intrinsic oxide. CAAC-OS has a low impurity concentration and a low density of defect states. It is easy to obtain a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor. The C-OS transistor has electrical characteristics that make the threshold voltage negative (normal Also, it is rare for the acid to become pure or substantially pure. The oxide semiconductor has fewer carrier traps. The charge takes a long time to be released and behaves like a fixed charge. Therefore, transistors using oxide semiconductors with high impurity concentrations and high defect state densities are On the other hand, transistors using CAAC-OS may have unstable electrical characteristics. The resulting transistor has little fluctuation in electrical characteristics and is highly reliable.

[0237] In addition, because the density of defect states in CAAC-OS is low, the capacitance generated by light irradiation can be reduced. Therefore, the CAAC-OS transistor is less likely to be captured by the defect level. The electrical characteristics of the transistors are less affected by irradiation with visible light or ultraviolet light.

[0238] Next, a microcrystalline oxide semiconductor film will be described.

[0239] Microcrystalline oxide semiconductors are regions where crystals can be confirmed in high-resolution TEM images. The microcrystalline oxide semiconductor has a region in which no clear crystal part can be identified. The crystal part contained in the crystal is 1 nm or more and 100 nm or less, or 1 nm or more and 10 nm or less. In particular, microcrystals of 1 nm to 10 nm or 1 nm to 3 nm are often present. The oxide semiconductor having nanocrystals is called nc-OS (nanocrystalline nc-OS is called a high-resolution In TEM images, the grain boundaries may not be clearly visible. Therefore, in the following, we will refer to the pellets in nc-OS as the origin of the pellets. The crystalline part of S is sometimes called a pellet.

[0240] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 3 nm). The atomic arrangement is periodic in the region of less than 100 nm. There is no regularity in the crystal orientation between the dots. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be indistinguishable from amorphous oxide semiconductors. For example, there is an XRD device that uses X-rays with a diameter larger than that of the pellet for nc-OS. When structural analysis is performed using the out-of-plane method, No peak is detected. Also, for nc-OS, the probe diameter (e.g., When electron diffraction (also called selected area electron diffraction) is performed using an electron beam of, for example, 50 nm or more, On the other hand, for nc-OS, a halo-like diffraction pattern is observed. Nanobeam electron diffraction using an electron beam with a probe diameter close to the pellet size or smaller than the pellet size When nanobeam electron diffraction is performed on nc-OS, spots are observed. In some cases, a bright area that appears circular (ring-shaped) may be observed. Multiple spots may be observed within a patchy area.

[0241] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, and therefore, nc- OS with RANC (Random Aligned nanocrystals) oxide semiconductors, or NANCs (Non-Aligned Nanocrystals) ) can also be referred to as an oxide semiconductor.

[0242] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower defect state density than the amorphous oxide semiconductor. There is no regularity in the crystal orientation between different pellets. The defect level density is higher than that of AC-OS.

[0243] Next, the amorphous oxide semiconductor will be described.

[0244] Amorphous oxide semiconductors are oxides in which the atomic arrangement in the film is irregular and there are no crystalline parts. An example is an oxide semiconductor that has an amorphous state, such as quartz.

[0245] In amorphous oxide semiconductors, no crystalline parts can be observed in high-resolution TEM images.

[0246] When structural analysis is performed on amorphous oxide semiconductors using an XRD device, out-of-plane In the analysis by the ane method, no peaks indicating crystal planes are detected. When electron diffraction is performed on the amorphous oxide semiconductor, a halo pattern is observed. However, when nanobeam electron diffraction is performed, no spots are observed, and only a halo pattern is observed. It is measured.

[0247] There are various views on amorphous structures. For example, A structure that does not have a crystal structure is called a completely amorphous structure. Also, the distance between the nearest neighboring atoms or the second nearest neighboring atoms is called A structure that has order but no long-range order is sometimes called an amorphous structure. Therefore, according to the strictest definition, an oxide semiconductor that has even a slight degree of order in its atomic arrangement is called an amorphous semiconductor. Furthermore, at least oxides with long-range order cannot be called semiconductors. The semiconductor cannot be called an amorphous oxide semiconductor. For example, CAAC-OS and nc-OS can be used as amorphous oxide semiconductors or completely amorphous oxides. It cannot be called a compound semiconductor.

[0248] Note that an oxide semiconductor may have a structure between an nc-OS and an amorphous oxide semiconductor. An oxide semiconductor having such a structure is particularly called an amorphous-like oxide semiconductor (a-li ke OS:amorphous-like Oxide Semiconductor ) is called

[0249] In a-like OS, voids are observed in high-resolution TEM images. In addition, there are cases where crystals can be clearly seen in high-resolution TEM images. and regions where no crystalline portions can be identified.

[0250] Because of the porosity, the a-like OS has an unstable structure. To demonstrate that the OS has an unstable structure compared with CAAC-OS and nc-OS. , showing the structural changes caused by electron irradiation.

[0251] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS (referred to as sample B), and Prepare CAAC-OS (referred to as sample B) and CAAC-OS (referred to as sample C). is also an In-Ga-Zn oxide.

[0252] First, high-resolution cross-sectional TEM images of each sample are acquired. It can be seen that all of the samples have crystalline parts.

[0253] The determination of which part is to be regarded as one crystal part can be made as follows. For example, The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, including six layers, stacked in layers in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The area where the spacing is 0.28 nm or more and 0.30 nm or less is considered to be the crystal part of InGaZnO4. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0254] Figure 33 shows an example of investigating the average size of the crystal parts (22 to 45 locations) of each sample. However, the length of the lattice fringes mentioned above is the size of the crystal part. It can be seen that the crystalline part of eOS grows in size according to the cumulative amount of electron irradiation. As shown in Figure 33 (1), the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus) was sized at 4.2 × 10 8 e - / nm 2On the other hand, in the nc-OS, the size of the crystals grows to about 2.6 nm. For CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in 33, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively. You will realize something.

[0255] In this way, the growth of crystalline parts can be observed in a-like OS due to electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals due to electron irradiation is almost nonexistent. In other words, a-like OS is not as good as nc-OS and CAAC-O. It can be seen that the structure is unstable compared to S.

[0256] In addition, due to its porosity, a-like OS is more flexible than nc-OS and CAAC-OS. Specifically, the density of a-like OS is lower than that of a single crystal with the same composition. The density of nc-OS and CAAC is 78.6% or more and less than 92.3% of that of the original. The density of the -OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form an oxide semiconductor film having a density of less than 78% of that of the oxide semiconductor film.

[0257] For example, in an oxide semiconductor with an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, , the density of a-like OS is 5.0 g / cm 3 More than 5.9g / cm 3 It is less than For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of nc-OS and that of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0258] In some cases, single crystals with the same composition do not exist. In such cases, crystals with different compositions at any ratio are used. By combining single crystals, the density equivalent to a single crystal of the desired composition is estimated. The density corresponding to a single crystal of a desired composition can be obtained by combining single crystals of different compositions. The density should be as low as possible. It is preferable to estimate by combining different types of single crystals.

[0259] As described above, oxide semiconductors have a variety of structures, each of which has a variety of properties. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or a microcrystalline oxide. The film may be a stacked film containing two or more of a semiconductor and a CAAC-OS.

[0260] When an oxide semiconductor film has multiple structures, the structure can be resolved by using nanobeam electron diffraction. analysis may be possible.

[0261] FIG. 8C shows an electron gun chamber 310, an optical system 312 below the electron gun chamber 310, and an optical system 313 below the electron gun chamber 310. 2, a sample chamber 314 under the sample chamber 314, an optical system 316 under the sample chamber 314, and an observation under the optical system 316. a room 320, a camera 318 installed in the observation room 320, and a film room below the observation room 320; The transmission electron diffraction measurement device has a camera 318 inside the observation chamber 320. The film chamber 322 does not necessarily have to be provided.

[0262] FIG. 8(D) shows the internal structure of the transmission electron diffraction measurement device shown in FIG. Inside the electron diffraction measurement device, electrons emitted from the electron gun installed in the electron gun chamber 310 The light is irradiated onto a substance 328 placed in a sample chamber 314 via an optical system 312. The electrons passing through the optical system 316 are projected onto a fluorescent screen 332 installed inside the observation chamber 320. On the fluorescent screen 332, a pattern appears according to the intensity of the incident electrons. Electron diffraction patterns can be measured.

[0263] The camera 318 is set facing the fluorescent screen 332 and captures the pattern that appears on the fluorescent screen 332. The center of the lens of the camera 318 and the center of the fluorescent screen 332 can be photographed. The angle between the line passing through the center and the upper surface of the fluorescent screen 332 is, for example, 15° or more and 80° or less. , 30° to 75° or 45° to 70°. The smaller the angle, the The transmission electron diffraction pattern taken by MERA318 is highly distorted. If this angle is known, it is possible to correct distortions in the obtained transmission electron diffraction pattern. There are cases where the camera 318 may be installed in the film chamber 322. For example, The camera 318 is installed in the film chamber 322 so as to face the incident direction of the electrons 324. In this case, a transmission electron diffraction pattern with little distortion is captured from the rear surface of the fluorescent screen 332. It is possible.

[0264] In the sample chamber 314, a holder for fixing a substance 328 as a sample is installed. The holder is constructed to be transparent to electrons passing through the material 328. For example, the holder may have a function to move the substance 328 in the X-axis, Y-axis, Z-axis, etc. The movement function can be, for example, 1 nm to 10 nm, 5 nm to 50 nm, or 10 nm or more. Ranges such as 100nm or less, 50nm to 500nm, and 100nm to 1μm. These ranges are optimal ranges depending on the structure of the substance 328. Just set it as follows.

[0265] Next, the transmission electron diffraction pattern of the substance is measured using the above-mentioned transmission electron diffraction measurement device. This article explains how to do this.

[0266] For example, as shown in FIG. 8(D), the irradiation position of the electron 324, which is a nanobeam, in the material By changing (scanning) the In this case, if the substance 328 is a CAAC-OS film, the Alternatively, if the material 328 is an nc-OS film, the diffraction pattern shown in Figure 8(B) is The diffraction pattern shown is observed.

[0267] By the way, even if the material 328 is a CAAC-OS film, it may be partially an nc-OS film. Therefore, the quality of the CAAC-OS film can be evaluated. is the ratio of the area where the diffraction pattern of the CAAC-OS film is observed in a certain range (CA It can be expressed as follows: For example, a high-quality CAAC-OS film can be If so, the CAAC conversion rate is 50% or more, preferably 80% or more, and more preferably 90% or more. % or more, and more preferably 95% or more. The percentage of the area where CAAC is observed is referred to as the non-CAAC rate.

[0268] As an example, immediately after film formation (denoted as as-sputtered), or in an atmosphere containing oxygen The top surface of each sample with the CAAC-OS film after the heat treatment at 450°C in air was scanned. Transmission electron diffraction patterns were acquired while scanning at a speed of 5 nm / s for 60 seconds. The diffraction pattern was observed while scanning, and the observed diffraction pattern was captured as a still image every 0.5 seconds. The CAAC rate was calculated by converting the electron beam into the probe diameter of 1n. The same measurement was carried out on six samples. The rate was calculated using the average value of six samples.

[0269] The CAAC ratio for each sample is shown in Figure 9(A). The AC conversion rate was 75.7% (non-CAAC conversion rate was 24.3%). The CAAC content of the treated CAAC-OS film was 85.3% (non-CAAC content was 14.7%). It can be seen that the CAAC conversion rate is higher after heat treatment at 450°C than immediately after film formation. That is, the non-CAAC rate is low due to heat treatment at high temperatures (for example, 400°C or higher). In addition, in the case of heat treatment below 500°C, It can be seen that a CAAC-OS film with a high CAAC content can be obtained.

[0270] Here, most of the diffraction patterns different from those of the CAAC-OS film are similar to those of the nc-OS film. The amorphous oxide semiconductor film was not observed in the measurement area. Therefore, the heat treatment did not produce a region with a structure similar to that of the nc-OS film. However, it is suggested that the structure of the adjacent region influences the rearrangement and formation of CAAC. .

[0271] Figures 9(B) and 9(C) show the CAAC-OS immediately after deposition and after heat treatment at 450°C. 9(B) and 9(C) show the planar TEM images of the film. The CAAC-OS film after the heat treatment has a more uniform film quality. It can be seen that the heat treatment in the step improves the film quality of the CAAC-OS film.

[0272] This measurement method makes it possible to analyze the structure of oxide semiconductor films with multiple structures. This may be the case.

[0273] Note that the structures and methods shown in this embodiment may be used in conjunction with structures and methods shown in other embodiments and examples. and methods can be used in appropriate combination.

[0274] (Fourth embodiment) In this embodiment, a display module to which the semiconductor device of one embodiment of the present invention is applied will be described. In addition, structural examples of electronic devices to which the semiconductor device of one embodiment of the present invention is applied will be described. Reveal.

[0275] The display module 8000 shown in FIG. 10 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003 and A display device cell 8006, a backlight unit 8007, a frame 8009, and a print The backlight unit 8007 and the battery 8011 are also included. The battery 8011, the touch panel 8004, etc. may not be provided.

[0276] The semiconductor device of one embodiment of the present invention can be used, for example, in a display device cell 8006. .

[0277] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display device sensor. The shape and dimensions can be changed as needed to fit the size of the 8006.

[0278] The touch panel 8004 is a resistive or capacitive touch panel that is used in a display device. The display device cell 8006 can be used by overlapping it with the opposing substrate (sealing It is also possible to provide a touch panel function to the display device. It is also possible to provide an optical sensor in each pixel of the placement cell 8006 to create an optical touch panel. Alternatively, a touch sensor electrode is provided in each pixel of the display device cell 8006, and a capacitance type It is also possible to use a touch panel.

[0279] The backlight unit 8007 includes a light source 8008. It may be provided at the end of the light source unit 8007 and may be configured to use a light diffusion plate.

[0280] The frame 8009 has a function of protecting the display device cell 8006 and also a function of supporting the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by operation. The frame 8009 may also function as a heat sink.

[0281] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. 1 can be omitted if commercial power is used.

[0282] The display module 8000 also includes components such as a polarizing plate, a retardation plate, and a prism sheet. Additional ones may be provided.

[0283] FIG. 11 is an external view of an electronic device including a semiconductor device of one embodiment of the present invention.

[0284] Examples of electronic devices include television sets (televisions or television receivers) (also called "computer monitors"), cameras such as digital cameras and digital video cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices), Examples include large game machines such as small game machines, mobile information terminals, sound reproduction devices, and pachinko machines. can be.

[0285] FIG. 11A shows a portable information terminal, which includes a main body 1001, a housing 1002, a display unit 1003, and a display unit 1004. The display unit 1003a, 1003b, etc. The display unit 1003b is a touch panel. By touching the keyboard button 1004 displayed on the display unit 1003b, Of course, the display unit 1003a can be configured as a touch panel. The transistor described in the above embodiment may be used as a switching element to form a liquid crystal display. By fabricating a device or an organic light-emitting panel and applying it to the display units 1003a and 1003b, It is possible to provide a highly reliable portable information terminal.

[0286] The portable information terminal shown in FIG. 11(A) displays various information (still images, videos, text images, etc.). Functions that display calendars, dates, or times on the display, functions that display Functions for manipulating or editing displayed information, processing by various software (programs) In addition, external connection terminals can be provided on the back and sides of the housing. It may also be configured to include a connector (such as an earphone jack or USB terminal), a recording medium insertion section, etc.

[0287] The portable information terminal shown in FIG. 11(A) is configured to be capable of transmitting and receiving information wirelessly. You can also purchase and download desired book data from an electronic book server wirelessly. It is also possible to configure it so that it is downloaded.

[0288] FIG. 11B shows a portable music player, and the main body 1021 has a display unit 1023 and earphones. a fixing part 1022 for attaching to a speaker, an operation button 1024, an external memory slot, The transistor shown in the above embodiment is a switching transistor. By fabricating a liquid crystal display device or an organic light-emitting panel as an element and applying it to the display unit 1023, This makes the portable music player more reliable.

[0289] Furthermore, the portable music player shown in FIG. 11(B) is equipped with an antenna, a microphone function, and a wireless function. If you carry it and connect it to your mobile phone, you can enjoy wireless hands-free driving while driving a car. Conversations in Lee are also possible.

[0290] FIG. 11C shows a mobile phone, which is composed of two housings, a housing 1030 and a housing 1031. The housing 1031 is equipped with a display device 1032, a speaker 1033, a microphone, and 1034, pointing device 1036, camera lens 1037, external connection terminal 1 The housing 1030 also includes a solar cell 1038 for charging the mobile phone. 40, an external memory slot 1041, etc. The antenna is located inside the housing 1031. The transistor described in the above embodiment is applied to the display device 1032. This makes it possible to provide a highly reliable mobile phone.

[0291] The display device 1032 is equipped with a touch panel, and the image displayed in FIG. The operation keys 1035 are indicated by dotted lines. A boost circuit is also implemented to boost the voltage required for each circuit.

[0292] The display direction of the display device 1032 changes appropriately depending on the usage mode. It has a camera lens 1037 on the same surface as 032, so video calls are possible. The speaker 1033 and microphone 1034 are not limited to voice calls, but also allow video calls, recording, etc. Furthermore, the housing 1030 and the housing 1031 can be slid to each other, and the same can be displayed as shown in FIG. (C) It can be folded from the unfolded state to the overlapped state, making it suitable for carrying. It can be made smaller.

[0293] The external connection terminal 1038 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the external memory slot 1041, it is possible to store and transfer a larger amount of data. Cut.

[0294] In addition to the above functions, it also has infrared communication functions, TV reception functions, etc. Good too.

[0295] FIG. 11(D) shows an example of a television device. The television device 1050 is A display unit 1053 is built into the housing 1051. The display unit 1053 displays an image. In addition, the CPU is built into the stand 1055 that supports the housing 1051. The transistor described in the above embodiment is incorporated in the display portion 1053 and the CPU. By applying this, the television device 1050 can be made highly reliable.

[0296] The television device 1050 can be operated using an operation switch provided on the housing 1051 or a separate remote control. This can be done by a remote controller. A display unit for displaying information output from the machine may be provided.

[0297] The television device 1050 is configured to include a receiver, a modem, and the like. It is possible to receive general television broadcasts, and also to receive wired or wireless signals via a modem. By connecting to a communication network, it can be one-way (sender to receiver) or two-way It is also possible to communicate information in both directions (between a sender and a receiver, or between receivers). .

[0298] The television device 1050 also includes an external connection terminal 1054 and a storage medium playback / recording unit 1055. 052, and an external memory slot. The external connection terminal 1054 is for connecting a USB cable or the like. It can be connected to any type of cable, enabling data communication with a personal computer, etc. In the storage medium playback / recording unit 1052, a disk-shaped recording medium is inserted and It is possible to read the stored data and write it to the recording medium. Images and videos stored in the external memory 1056 inserted in the reslot It is also possible to display it on the display unit 1053.

[0299] In addition, when the off-leak current of the transistor described in the above embodiment is extremely small, By applying this transistor to the external memory 1056 or the CPU, power consumption can be reduced sufficiently. This can result in a highly reliable television device 1050 with reduced power consumption.

[0300] This embodiment may be implemented in appropriate combination with other embodiment modes described in this specification. This can be done.

[0301] (Embodiment 5) In this embodiment, a liquid crystal display device and a light-emitting device are used as examples of semiconductor devices, and the semiconductor device shown in FIG. 4 to 38. In this embodiment, a liquid crystal display device or a light-emitting device In the first transistor and the second transistor, the number of layers of oxide semiconductor films is different from that of the first transistor and the second transistor. The first and second transistors are made of oxide semiconductors. The structure of the body membrane is different.

[0302] <Display device structure> First, the liquid crystal display device will be described.

[0303] FIG. 34 is a cross-sectional view of a liquid crystal display device, and shows a transistor formed in a driving circuit section at AB. The arrows indicate the transistors formed in the pixel area, and the arrows indicate the transistors formed in the pixel area.

[0304] The transistor 10kb shown in FIG. 34A has a gate electrode 1 provided on a substrate 11. 3c, a gate insulating film 15 formed on the substrate 11 and the gate electrode 13c, and a gate insulating film The first oxide semiconductor film 81 overlaps the gate electrode 13c through the film 15, and the first oxide A second oxide semiconductor film 82 covering the semiconductor film 81 and a second oxide semiconductor film 83 contacting the second oxide semiconductor film 82 are provided. The gate insulating film 15 and the second oxide semiconductor film 20c are formed on the first insulating film 15. A protective film 21 is formed on the pair of electrodes 82 and 20c. 21 may have a conductive film 87 thereon.

[0305] The protective film 21 contains more oxygen than the oxide insulating film 23 and the oxygen that satisfies the stoichiometric composition. The insulating film 25 includes an oxide insulating film 25 containing silicon, and a nitride insulating film 27.

[0306] The transistor 10m shown in FIG. 34C has a gate electrode 13 provided on a substrate 11. d, a gate insulating film 15 formed on the substrate 11 and the gate electrode 13d, and a gate insulating film The oxide semiconductor film 84 overlaps with the gate electrode 13d through the gate electrode 15, and the oxide semiconductor film 84 The gate insulating film 15 and the oxide semiconductor A protective film 21 is formed on the film 84 and the pair of electrodes 19d and 20d. An organic insulating film 88 may be provided on the film 21. The transistor 10m shown in FIG. , which is identical to transistor 10m shown in FIG.

[0307] In the liquid crystal display device shown in this embodiment mode, transistors are used in the driver circuit portion and the pixel portion. The structure of the oxide semiconductor film included in the capacitor is different.

[0308] The first oxide semiconductor film 81 and the second oxide semiconductor film 82 have different compositions. The oxide semiconductor film 82 and the oxide semiconductor film 84 have the same composition. The oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor film 84 are formed in separate steps. The second oxide semiconductor film 82 and the oxide semiconductor film 84 are formed in the same process. do.

[0309] A channel region is formed in the first oxide semiconductor film 81 included in the transistor 10kb. Therefore, the first oxide semiconductor film 81 has a larger thickness than the second oxide semiconductor film 82. stomach.

[0310] The thickness of the first oxide semiconductor film 81 is 3 nm or more and 200 nm or less, preferably 3 nm or more. The thickness of the second oxide semiconductor is preferably from 30 nm to 50 nm, and more preferably from 30 nm to 50 nm. The thickness of the conductor film 82 and the oxide semiconductor film 84 is smaller than that of the first oxide semiconductor film 81. and 3 nm or more and 100 nm or less, preferably 10 nm or more and 100 nm or less, The thickness is generally between 30 nm and 50 nm.

[0311] The first oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor film 84 are It is formed of a metal oxide containing at least In, and is typically an In-Ga oxide or an In-M -Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), etc.

[0312] The first oxide semiconductor film 81 is made of Zn or M (M is Al, Ga, Y, Zr, La, Ce). The atomic ratio of In to Nd is large. -Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), the first In the target used for depositing the oxide semiconductor film 81, the atomic ratio of the metal elements is If In:M:Zn=x3:y3:z3 、 x3 / y3 is greater than 1 and less than or equal to 6 A typical example of the atomic ratio of the metal elements in the target is In:M:Zn= 2:1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2:1:3, In :M:Zn=3:1:2, In:M:Zn=3:1:3, In:M:Zn=3:1:4 etc. There is.

[0313] The second oxide semiconductor film 82 and the oxide semiconductor film 84 are made of Zn or M (M is Al, Ga The atomic ratio of In to other elements (Y, Zr, La, Ce, or Nd) is the same or smaller. The second oxide semiconductor film 82 and the oxide semiconductor film 84 are made of In-M-Zn oxide (M is Al , Ga, Y, Zr, La, Ce, or Nd), the second oxide semiconductor film 82 and the oxide In the target used to form the nitride semiconductor film 84, the atomic ratio of the metal elements is I If n:M:Zn=x4:y4:z4 、 x4 / y4 must be greater than or equal to 1 / 6 and less than or equal to 1 In addition, z4 / y4 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. Note that when z4 / y4 is set to 1 or more and 6 or less, the second oxide semiconductor film 82 In addition, a CAAC-OS film is easily formed as the oxide semiconductor film 84. Typical examples of atomic ratios of group elements are In:M:Zn=1:1:1, In:M:Zn=1 :1:1.2, In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M: Zn=1:3:6, In:M:Zn=1:3:8, In:M:Zn=1:4:4, In: M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn=1:4:7, I n:M:Zn=1:4:8, In:M:Zn=1:5:5, In:M:Zn=1:5:6 , In:M:Zn=1:5:7, In:M:Zn=1:5:8, In:M:Zn=1:6 :8 etc.

[0314] The first oxide semiconductor film 81 is made of Zn or M (M is Al, Ga, Y, Zr, A transistor having an oxide semiconductor film with a large atomic ratio of In to La, Ce, or Nd. Transistors have high field-effect mobility. Typically, the field-effect mobility is 10 cm 2 / Vs Larger 60cm 2 / Vs less than 15cm 2 / Vs or more 50cm 2 / Vs less However, when light is irradiated, the current in the off state increases. For this reason, Zn or M (M is Al, Oxide semiconductors with a high atomic ratio of In to Ga, Y, Zr, La, Ce, or Nd By providing a transistor having a dielectric film, the field effect mobility is high and the As a result, a driver circuit section capable of high-speed operation can be fabricated. can be done.

[0315] On the other hand, the Zn or M used in the second oxide semiconductor film 82 and the oxide semiconductor film 84 (M is Al, Ga, Y, Zr, La, Ce, or Nd) The atomic ratio of In to A transistor having a large or small oxide semiconductor film has a low off-state current even when irradiated with light. The increase is small. Therefore, Zn or M (M is Al, Ga, Y, Zr, La) is used in the pixel area. The atomic ratio of In to In (Ce, Ce, or Nd) is the same or smaller. By providing a transistor that reduces deterioration due to light exposure, a pixel section with excellent display quality can be created. The field-effect mobility of the transistor including the oxide semiconductor film can be 3c m 2 / Vs or more 10cm 2 / Vs or less.

[0316] The transistor 10kb provided in the drive circuit section is connected to the first oxide film 21 through the protective film 21. The conductive film 87 covers the compound semiconductor film 81. The conductive film 87 is connected to a ground potential or an arbitrary potential. Alternatively, the conductive film 87 may be connected to the gate electrode 13c. This results in a transistor with high field effect mobility and large on-current.

[0317] In the liquid crystal display device shown in this embodiment, transistors included in a driver circuit portion and a pixel portion The channel lengths of the transistors may be different.

[0318] Typically, the channel length of a 10kb transistor included in the driver circuit is less than 2.5µm. On the other hand, the thickness of the transistors included in the pixel portion is preferably 1.45 μm or more and 2.2 μm or less. The channel length of the transistor 10m is 2.5 μm or more, preferably 2.5 μm or more and 20 μm or less. is.

[0319] The channel length of the 10 kb transistor included in the driving circuit section is set to less than 2.5 μm, preferably By setting the thickness to 1.45 μm or more and 2.2 μm or less, the field effect mobility can be further increased. As a result, a drive circuit capable of high-speed operation can be realized. A path can be created.

[0320] The first oxide semiconductor film 81, the second oxide semiconductor film 82, and one of the oxide semiconductor films 84 Since the first oxide semiconductor film 81 and the second oxide semiconductor film 82 function as a channel region of the transistor, The oxide semiconductor film 82 and the oxide semiconductor film 84 have an energy gap of 2 eV or more. The energy is preferably 2.5 eV or more, and more preferably 3 eV or more. By using oxide semiconductors with wide gaps, off-state current of transistors of 10 kB and 10 mV can be achieved. can be reduced.

[0321] The first oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor film 84 are For example, an oxide semiconductor film with low carrier density is used as the first oxide semiconductor film 81. The second oxide semiconductor film 82 and the oxide semiconductor film 84 have a carrier density of 1×10 17 pieces / cm 3 Less than 1 × 10 15 pieces / cm 3 or less, more preferably 1 × 10 1 3 pieces / cm 3 Less than or equal to 1×10 11 pieces / cm 3 The following oxide semiconductor film was used: do.

[0322] However, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use an appropriate composition depending on the required properties (e.g., the mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of the transistor, the first oxide semiconductor film 81 and the second oxide semiconductor film The carrier density, impurity concentration, defect density, and metal element density of the conductor film 82 and the oxide semiconductor film 84 It is preferable to set the atomic ratio of oxygen to silicon, the interatomic distance, the density, etc., appropriately.

[0323] The first oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor film 8 As the gate insulating film 4, an oxide semiconductor film having a low impurity concentration and a low density of defect states is used. In this example, a transistor having excellent electrical characteristics can be manufactured. High purity intrinsic or substantially high purity means that the oxygen vacancy is low and the defect level density is low (few oxygen vacancies). High-purity intrinsic or substantially high-purity intrinsic oxide semiconductors have low carrier generation. Since there are fewer sources of oxide, the carrier density can be reduced. A transistor in which a channel region is formed in a semiconductor film has a negative threshold voltage. Electrical characteristics (also called normally-on) are rarely observed. A qualitatively highly pure intrinsic oxide semiconductor film has a low density of defect states, and therefore, the density of trap states In addition, the oxide semiconductor may be highly purified intrinsic or substantially highly purified intrinsic. The film has a remarkably small off-state current and a channel width of 1×10 6 μm and the channel length L is 10 μm Even if the voltage between the source and drain electrodes (drain voltage) is 1V to 10V, In the V range, the off-state current is below the measurement limit of the semiconductor parameter analyzer, i.e. 1×10 -13 Therefore, the oxide semiconductor film can have a characteristic of 0.1A or less. The transistors in which the channel region is formed have small fluctuations in electrical characteristics and are highly reliable. Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, etc. There is.

[0324] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. Oxygen vacancies are formed in the lattice from which oxygen has been desorbed (or in the part from which oxygen has been desorbed). When hydrogen enters the gap, electrons, which act as carriers, are generated. When bonded to oxygen, which bonds to metal atoms, electrons, which act as carriers, may be generated. Therefore, a transistor using an oxide semiconductor containing hydrogen has normally-on characteristics. It is easy to become.

[0325] Therefore, the first oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor It is preferable that the film 84 has as little oxygen vacancy as possible and as little hydrogen as possible. In the first oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor film 84, The hydrogen concentration obtained by secondary ion mass spectrometry (SIMS) was 5×10 19 at oms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below, preferably 5×10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 below , more preferably 5 × 10 17 atoms / cm 3 or less, more preferably 1 × 10 16 atoms / cm 3 The following applies.

[0326] In the first oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor film 84, In this case, when silicon or carbon, which is one of the group 14 elements, is contained, the first oxide semiconductor film 8 1, oxygen vacancies increase in the second oxide semiconductor film 82 and the oxide semiconductor film 84, and n Therefore, the first oxide semiconductor film 81, the second oxide semiconductor film 82, and The concentrations of silicon and carbon in the oxide semiconductor film 84 (obtained by secondary ion mass spectrometry) The concentration of 18 atoms / cm 3 Less than or equal to 2 x 10 17 atom s / cm 3 The following applies.

[0327] In addition, the first oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor film 8 In 4, alkali metal or aluminum obtained by secondary ion mass spectrometry (SIMS) The concentration of potassium earth metals is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Alkali metals and alkaline earth metals are oxide semiconductors. When these bonds are formed, carriers may be generated, which may increase the off-state current of the transistor. Therefore, the first oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide It is preferable to reduce the concentration of alkali metals or alkaline earth metals in the compound semiconductor film 84. .

[0328] In addition, the first oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor film 8 If nitrogen is contained in 4, electrons as carriers are generated, the carrier density increases, and the material becomes n-type. As a result, a transistor using an oxide semiconductor containing nitrogen Therefore, nitrogen in the oxide semiconductor film is reduced as much as possible. For example, the nitrogen concentration obtained by secondary ion mass spectrometry is preferably 5× 10 18 atoms / cm3 It is preferable to do the following:

[0329] Next, the structure of the light emitting device will be described with reference to FIG.

[0330] FIG. 35 is a cross-sectional view of a light emitting device, and shows transistor 1 formed in a driving circuit section at AB. 35 shows the transistor 10m formed in the pixel portion, and CD shows the transistor 10m formed in the pixel portion. The transistor 10m shown in FIG. 2C is the same as the transistor 10m shown in FIG. 2D. The same symbols are used for the same parts.

[0331] The transistor 10nb shown in FIG. 35A and 35B is made of a gate insulating film 15 and a first oxide semiconductor. The third oxide semiconductor film 83 is disposed between the first and second oxide semiconductor films 81. The other configuration is the same as that shown in FIG. The same configuration as that of the transistor 10kb can be used as appropriate. Instead of b, a transistor 10kb shown in FIG. 34 can be used as appropriate.

[0332] In the transistor 10nb, a channel region is formed in the first oxide semiconductor film 81. Therefore, the first oxide semiconductor film 81 is a layer including the second oxide semiconductor film 82 and the third oxide semiconductor film 83. The thickness is larger than that of the body membrane 83.

[0333] The third oxide semiconductor film 83 is made of Zn or M (M is Al, Ga, Y, Zr, La, Ce). The atomic ratio of In to Nd is small. -Zn oxide (M is Al, Ga, Y, Zr, La, Ce, or Nd), the third In the target used for depositing the oxide semiconductor film 83, the atomic ratio of the metal elements is If In:M:Zn=x5:y5:z5 、 x5 / y5 must be greater than or equal to 1 / 6 and less than 1. It is also preferable that z5 / y5 is 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. Note that when z5 / y5 is set to 1 or more and 6 or less, the third oxide semiconductor film 8 As a result, the CAAC-OS film is easily formed. Examples of the table are In:M:Zn=1:3:2, In:M:Zn=1:3:4, In:M: Zn=1:3:6, In:M:Zn=1:3:8, In:M:Zn=1:4:4, In: M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn=1:4:7, I n:M:Zn=1:4:8, In:M:Zn=1:5:5, In:M:Zn=1:5:6 , In:M:Zn=1:5:7, In:M:Zn=1:5:8, In:M:Zn=1:6 :8 etc.

[0334] The thickness of the third oxide semiconductor film 83 is smaller than that of the first oxide semiconductor film 81, and 2 nm or more and 100 nm or less, preferably 2 nm or more and 50 nm or less, preferably 3 nm or more The thickness of the third oxide semiconductor film 81 is 15 nm or less. By providing the nitride semiconductor film 83, the fluctuation of the threshold voltage of the transistor 10nb is reduced. It is possible.

[0335] <Method for manufacturing a display device> Here, a method for manufacturing a transistor included in a display device will be described. As an example of the light emitting device, the light emitting device shown in FIG. 35 is used, and transistors 10m and 10m are A method for manufacturing the photodiode 10nb will be described with reference to FIGS.

[0336] Films constituting the transistor 10m and the transistor 10nb (insulating film, oxide semiconductor film, Metal oxide films, conductive films, etc.) are deposited by sputtering, chemical vapor deposition (CVD), and vacuum deposition. It can be formed by a method such as a pulsed laser deposition (PLD) method. The film can be formed by a sputtering method, a plasma chemical method, or a printing method. A typical example is a PECVD method, but a thermal CVD method may also be used. Alternatively, MOCVD (metal organic chemical vapor deposition) or ALD (atomic layer deposition) may be used.

[0337] As shown in FIG. 36(A), gate electrodes 13c and 13d and a gate insulating film are formed on a substrate 11. Next, in AB, a third oxide semiconductor film is formed on the gate insulating film 15. The oxide semiconductor film 83 and the first oxide semiconductor film 81 are formed.

[0338] The method for forming the gate electrodes 13c and 13d and the method for forming the gate insulating film 15 are the same as those described above. Since this is shown in the first embodiment, it will be omitted here.

[0339] Here, a silicon oxynitride film is formed as the gate insulating film 15 by the plasma CVD method. Complete.

[0340] The method for forming the third oxide semiconductor film 83 and the first oxide semiconductor film 81 will be described below. The gate insulating film 15 is formed by sputtering, coating, pulse laser deposition, laser deposition, etc. The oxide semiconductor film 83 is formed by a laser ablation method, a thermal CVD method, or the like. and an oxide semiconductor film that will later become the first oxide semiconductor film 81. Next, a mask is formed over the stacked oxide semiconductor film by a photolithography process. Then, the stacked oxide semiconductor film is partly etched using the mask. As shown in 36(B), a portion of the gate electrode 13c is overlapped on the gate insulating film 15. The third oxide semiconductor film 83 and the first oxide semiconductor film 81 are formed so as to separate the elements. After this, the mask is removed.

[0341] When an oxide semiconductor film is formed by a sputtering method, a power source for generating plasma is used. The device may be an RF power supply device, an AC power supply device, a DC power supply device, or the like.

[0342] The sputtering gas may be a rare gas (typically argon) atmosphere, an oxygen atmosphere, a rare gas and In the case of a mixed gas of rare gas and oxygen, the rare gas It is preferable to increase the gas ratio of oxygen.

[0343] The target may be appropriately selected depending on the composition of the oxide semiconductor film to be formed. .

[0344] Note that when the oxide semiconductor film is formed by, for example, a sputtering method, The temperature is 150°C or higher and 750°C or lower, preferably 150°C or higher and 450°C or lower, and more preferably The oxide semiconductor film is formed at a temperature of 200°C or higher and 350°C or lower. S film can be formed.

[0345] In addition, the conditions described in the first embodiment are applied to form the CAAC-OS film. is preferred.

[0346] Here, the atomic ratio of the metal elements in the target is In:Ga: A 10 nm thick oxide semiconductor film with Zn=1:3:6 and the atoms of the target metal element A 35 nm thick oxide semiconductor film with a numerical ratio of In:Ga:Zn=3:1:2 was formed in sequence. After that, a mask is formed on the oxide semiconductor film, and the oxide semiconductor film is selectively etched. Click here.

[0347] The heat treatment is carried out at a temperature higher than 350°C and lower than 650°C, preferably higher than 450°C and lower than 600°C. By carrying out the following, the CAAC conversion rate described below is 70% or more but less than 100%, preferably 80% % or more and less than 100%, preferably 90% or more and less than 100%, more preferably 95% or more and less than 90%. In addition, the oxide semiconductor film can be obtained with a hydrogen content of 8% or less. That is, it is possible to obtain an oxide semiconductor film having a low impurity concentration and a low defect level density. An oxide semiconductor film with a low conductivity can be formed.

[0348] Next, as shown in FIG. 36(B), the gate insulating film 15 and the first oxide semiconductor film 81 are After forming an oxide semiconductor film, the oxide semiconductor film is etched into a desired shape. In the region AB, a second oxide semiconductor film 81 and a third oxide semiconductor film 83 are covered with the second oxide semiconductor film 82. An oxide semiconductor film 82 is formed, and an oxide semiconductor film 84 is formed in the CD.

[0349] In this step, the side surfaces of the third oxide semiconductor film 83 and the first oxide semiconductor film The second oxide semiconductor film 82 is formed so as to cover the top and side surfaces of the first oxide semiconductor film 81. In the process of forming the electrode, the third oxide semiconductor film 83 and the first oxide semiconductor film 81 are As a result, the third oxide semiconductor in the channel width direction of the transistor is This is preferable because it can reduce fluctuations in the lengths of the oxide semiconductor film 83 and the first oxide semiconductor film 81.

[0350] Next, heat treatment may be performed to dehydrogenate or dehydrate the oxide semiconductor film. The treatment temperature is typically 150°C or higher and lower than the substrate strain point, preferably 250°C or higher and 450°C or lower. °C or less, and more preferably 300°C or more and 450°C or less.

[0351] Here, after heat treatment in a mixed gas atmosphere containing nitrogen and oxygen at 450°C, Heat treatment is carried out in an oxygen atmosphere at 0°C.

[0352] Instead of the heat treatment, a similar heat treatment may be performed after the process shown in FIG. 36(A). .

[0353] Next, as shown in FIG. 36(C), a pair of electrodes 19c and A pair of electrodes 19d and 20d are formed on the oxide semiconductor film 84 and the insulating film 20c.

[0354] Here, a copper-manganese alloy film with a thickness of 50 nm, a copper film with a thickness of 400 nm, and a copper film with a thickness of 10 Next, a copper-manganese alloy film with a thickness of 0 nm is deposited by sputtering. A mask is formed on the copper alloy film by a photolithography process, and the copper- The manganese alloy film, the copper film, and the copper-manganese alloy film were dry-etched to form a pair of electrodes 1 9c and 20c form a pair of electrodes 19d and 20d.

[0355] After forming the pair of electrodes 19c and 20c and the pair of electrodes 19d and 20d, heating The heat treatment may be performed on the second oxide semiconductor film 82 and the oxide semiconductor The heat treatment can be carried out under the same conditions as those for the heat treatment carried out after the film 84 is formed.

[0356] After forming the pair of electrodes 19c and 20c and the pair of electrodes 19d and 20d, etching is performed. It is preferable to carry out a washing process to remove the chalk residue. Therefore, it is possible to prevent a short circuit between the pair of electrodes 19c and 20c and the pair of electrodes 19d and 20d. The cleaning process can be carried out using alkaline solutions such as TMAH solution, hydrofluoric acid, oxalic acid, phosphorus acid, etc. This can be done using an acidic solution such as an acid, or water.

[0357] Next, as shown in FIG. 37(A), the gate insulating film 15, the second oxide semiconductor film 82, and the oxide The protective layer 84 is formed on the pair of electrodes 19c and 20c and the pair of electrodes 19d and 20d. A film 21 is formed.

[0358] The protective film 21 can be formed by a sputtering method, a CVD method, a vapor deposition method, or the like.

[0359] The oxide insulating film 23 and the oxide insulating film 25 included in the protective film 21 are formed by plasma C The substrate placed in the evacuated processing chamber of the VD device is heated to 180°C or higher and 280°C or lower. The temperature is preferably kept at 200° C. or higher and 240° C. or lower, and a raw material gas is introduced into the processing chamber. The pressure is 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less, and the electrode installed in the processing chamber is set to 0.17 W / cm 2 More than 0.5W / cm 2 Below or less, and more preferably 0.25 W / cm 2 More than 0.35W / cm 2 The following high frequency power is provided: Depending on the conditions of supply, a silicon oxide film or a silicon oxynitride film is formed.

[0360] The nitride insulating film 27 can be formed by using a sputtering method, a CVD method, or the like.

[0361] Note that after the oxide insulating film 25 is formed, heat treatment may be performed. Typically, the temperature is 150°C or higher and lower than the substrate strain point, preferably 200°C or higher and 450°C or lower, and more preferably The heat treatment is preferably performed at a temperature higher than or equal to 300° C. and lower than or equal to 450° C. A part of the oxygen contained in the first oxide semiconductor film 81, the second oxide semiconductor film 82, and the third oxide semiconductor film 83 is The oxygen vacancies in the oxide semiconductor film 83 and the oxide semiconductor film 84 are then transferred to the oxide semiconductor film 83 and the oxide semiconductor film 84. can be reduced.

[0362] Here, heat treatment is performed at 350°C for 1 hour in a mixed gas atmosphere containing nitrogen and oxygen. .

[0363] After the nitride insulating film 27 is formed, a heat treatment is performed to release hydrogen and the like from the protective film 21. It is possible to do this.

[0364] Here, heat treatment is performed at 350°C for 1 hour in a mixed gas atmosphere containing nitrogen and oxygen. .

[0365] Through the above steps, a transistor with a reduced threshold voltage shift can be manufactured. Furthermore, a transistor with reduced fluctuation in electrical characteristics can be manufactured.

[0366] Next, as shown in FIG. 37B, the second oxide semiconductor film 82 of the transistor 10nb The upper protective film 21 and the electrode 20d of the transistor 10m are exposed through openings. Next, an insulating film 95 having the same structure as the first insulating film 95 of the transistor 10nb is formed on the protective film 21. A conductive film 87 is formed in a region overlapping with the oxide semiconductor film 82 of the second insulating film 95. A first electrode 86a is formed to connect to the electrode 20d of the terminal 10m.

[0367] Here, the insulating film 95 is formed using photosensitive polyimide.

[0368] Next, as shown in FIG. 38(A), a thin film is formed on the insulating film 95, the conductive film 87, and the first electrode 86a. The insulating film 96 is formed by appropriately using the same method as that for the insulating film 95. It is possible.

[0369] Next, as shown in FIG. 38(B), an EL layer 97 is formed on the insulating film 96 and the first electrode 86a. Form.

[0370] The above process allows for high-speed operation, minimizes deterioration due to light irradiation, and provides excellent display quality. Therefore, a display device having a pixel portion can be manufactured.

[0371] 34 and 35, the electrodes 19c, 20c, 19d, A first oxide semiconductor film 81, a second oxide semiconductor film 82, a third oxide semiconductor film 83, a third oxide semiconductor film 84, a fourth oxide semiconductor film 85, a fourth oxide semiconductor film 86, a fifth oxide semiconductor film 87, a sixth oxide semiconductor film 88, a sixth oxide semiconductor film 89 ...1, a sixth oxide semiconductor film 82, a sixth oxide semiconductor film 83, a sixth oxide semiconductor film 84, a The oxide semiconductor film 83, the oxide semiconductor film 84, and the like are provided. This is not limited to this.

[0372] <Variation 8> The transistor described in Embodiment 5 is a channel-etched transistor. A channel protection type transistor can be used.

[0373] <Variation 9> The transistor described in Embodiment 5 is a bottom-gate transistor. The transistors used in the driver circuits are bottom-contact top gate transistors as shown in Figure 22. A gate structure may also be used.

[0374] <Modification 10> The transistor described in Embodiment 5 is a bottom-gate transistor. The transistors used in the driver circuits are top-contact top gate type as shown in Figure 23. A gate structure may also be used.

[0375] Note that the structures and methods shown in this embodiment may be used in conjunction with structures and methods shown in other embodiments and examples. and methods can be used in appropriate combination.

[0376] (Sixth embodiment) In this embodiment, a display device having a configuration partially different from that of the first and fifth embodiments will be described. explain.

[0377] FIG. 43 is a cross-sectional view of a liquid crystal display device, and shows a transistor formed in a driving circuit section at AB. The transistors formed in the pixel area are shown in FIG. 34 in that a conductive film 87 is formed in the drive circuit section. do.

[0378] The transistor 10ka shown in FIG. 43A has a gate electrode 1 provided on a substrate 11. 3c, a gate insulating film 15 formed on the substrate 11 and the gate electrode 13c, and a gate insulating film The first oxide semiconductor film 81 overlaps the gate electrode 13c through the film 15, and the first oxide A second oxide semiconductor film 82 covering the semiconductor film 81 and a second oxide semiconductor film 83 contacting the second oxide semiconductor film 82 are provided. The gate insulating film 15 and the second oxide semiconductor film 20c are formed on the first insulating film 15. A protective film 21 is formed on the pair of electrodes 19c and 20c. In the transistor 10kb shown in FIG. 4B, a conductive film 87 is formed on the protective film 21. The transistor 10ka shown in FIG. 3A and FIG. 3B does not have the conductive film 87 formed thereon. It has the same configuration.

[0379] The protective film 21 contains more oxygen than the oxide insulating film 23 and the oxygen that satisfies the stoichiometric composition. The insulating film 25 includes an oxide insulating film 25 containing silicon, and a nitride insulating film 27.

[0380] The transistor 10mb shown in FIG. 43C has a gate electrode 11 provided on a substrate 11. 3d, a gate insulating film 15 formed on the substrate 11 and the gate electrode 13d, and a gate insulating film The oxide semiconductor film 84 overlaps the gate electrode 13d via the film 15. The gate insulating film 15 and the oxide semiconductor layer 16 are connected to each other. A protective film 21 is formed on the body film 84 and the pair of electrodes 19d and 20d. An organic insulating film 88 may be provided on the protective film 21 .

[0381] On the gate insulating film 15, a conductive oxide semiconductor film 85 is formed. The conductive oxide semiconductor film 85 is formed by stacking the second oxide semiconductor film 82 and the oxide semiconductor film 84. At the same time, the oxide semiconductor film formed is in contact with the nitride insulating film 27, so that oxygen vacancies and water The film has an increased element concentration and enhanced conductivity.

[0382] In addition, in the opening of the protective film 21, a The pixel electrode 86 is provided on the protective film 21. The pixel electrode 86 is made of a conductive film having light-transmitting properties. You can be there.

[0383] The conductive oxide semiconductor film 85, the nitride insulating film 27, and the pixel electrode 86 form a capacitor. The conductive oxide semiconductor film 85 and the pixel electrode 86 are transparent. Since the capacitor element 89 has a light-transmitting property, the capacitor element 89 in the pixel also has a light-transmitting property. Therefore, it is possible to increase the area of ​​the capacitor having a high aperture ratio and a high capacitance value. A pixel can be fabricated having element 89 therein.

[0384] In addition, an alignment film 92a is provided on the protective film 21, the pixel electrode 86, and the organic insulating film 88. .

[0385] In the liquid crystal display device, an opposing substrate 90 is provided, and between the substrate 11 and the opposing substrate 90, A counter electrode 91 and an alignment film 92b are provided in this order from the counter substrate 90 side.

[0386] A liquid crystal layer 93 is disposed between the alignment film 92a and the alignment film 92b. The layer 93 and the counter electrode 91 constitute a liquid crystal element 94 .

[0387] In the liquid crystal display device shown in this embodiment mode, transistors are used in the driver circuit portion and the pixel portion. The structure of the oxide semiconductor film included in the transistor is different. are the same as those in FIG. 1 and FIG. 34, and the same reference numerals are used for the same parts.

[0388] The first oxide semiconductor film 81 and the second oxide semiconductor film 82 have different compositions. The oxide semiconductor film 82 and the oxide semiconductor film 84 have the same composition. The oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor film 84 are formed in separate steps. The second oxide semiconductor film 82 and the oxide semiconductor film 84 are formed in the same process. do.

[0389] A channel region is formed in the first oxide semiconductor film 81 included in the transistor 10ka. Therefore, the first oxide semiconductor film 81 has a larger thickness than the second oxide semiconductor film 82. stomach.

[0390] The thickness of the first oxide semiconductor film 81 is 3 nm or more and 200 nm or less, preferably 3 nm or more. The thickness of the second oxide semiconductor is preferably from 30 nm to 50 nm, and more preferably from 30 nm to 50 nm. The thickness of the conductor film 82 and the oxide semiconductor film 84 is smaller than that of the first oxide semiconductor film 81. and 3 nm or more and 100 nm or less, preferably 10 nm or more and 100 nm or less, The thickness is generally between 30 nm and 50 nm.

[0391] The first oxide semiconductor film 81, the second oxide semiconductor film 82, and the oxide semiconductor film 84 are The materials shown in Embodiment 5 can be used.

[0392] In the liquid crystal display device shown in this embodiment, transistors included in a driver circuit portion and a pixel portion The channel lengths of the transistors may be different.

[0393] Typically, the channel length of the 10kA transistor included in the drive circuit section is less than 2.5 μm. On the other hand, the thickness of the transistors included in the pixel portion is preferably 1.45 μm or more and 2.2 μm or less. The channel length of the 10 mb resistor is 2.5 μm or more, preferably 2.5 μm or more and 20 μm or less. Below.

[0394] The channel length of the transistor 10kA included in the driving circuit section is set to less than 2.5 μm, preferably By setting the thickness between 1.45 μm and 2.2 μm, it is possible to increase the field effect mobility. As a result, a drive circuit section capable of high-speed operation can be created. It can be manufactured.

[0395] The first oxide semiconductor film 81, the second oxide semiconductor film 82, and one of the oxide semiconductor films 84 Since the first oxide semiconductor film 81 and the second oxide semiconductor film 82 function as a channel region of the transistor, The oxide semiconductor film 82 and the oxide semiconductor film 84 have an energy gap of 2 eV or more. The energy is preferably 2.5 eV or more, and more preferably 3 eV or more. By using oxide semiconductors with a wide gap, off-state current of 10kA and 10MB can be achieved. The flow can be reduced.

[0396] Next, other details of the configuration of the liquid crystal display device will be described. This has already been described in the first embodiment, so please refer to it. I will explain it in detail.

[0397] A flexible substrate is used as the substrate 11, and transistors 10ka, 10 Alternatively, a separation may be formed between the substrate 11 and the transistors 10ka and 10mb. The release layer may be formed on the substrate after a part or all of the semiconductor device is completed thereon. The transistor can be separated from the substrate 11 and transferred to another substrate. The 10ka and 10mb can be transferred onto substrates with poor heat resistance or flexible substrates. The delamination may involve, for example, a laminated structure of inorganic films such as a tungsten film and a silicon oxide film, or a substrate. A configuration in which an organic resin film such as polyimide is formed on a plate can be used.

[0398] The thickness of the gate insulating film 15 is 5 nm or more and 400 nm or less, and more preferably 10 nm or more. It is preferable to set the thickness to 300 nm or less, and more preferably to set the thickness to 50 nm or more and 250 nm or less.

[0399] The oxide insulating films 23 and 25 can be made of the same material as the gate insulating film.

[0400] The oxide insulating film 23 may contain nitrogen and have few defects. good.

[0401] Next, the structure of the light emitting device will be described with reference to Figure 44. Note that Figure 35 and Figure 44 are the same. There are many similarities, so we will omit the explanation of the same parts here. In the transistor 10nb, a conductive film 87 is formed on the protective film 21. The transistor 10na shown in FIG. 1B does not have the conductive film 87 formed therein, but otherwise has the same structure. It is completed.

[0402] FIG. 44 is a cross-sectional view of a light emitting device, and shows transistor 1 formed in a driving circuit section at AB. 0na is shown, and CD is shown a transistor 10m formed in the pixel portion.

[0403] <Method for manufacturing a display device> Here, a method for manufacturing a transistor included in a display device will be described. The transistor 10na shown in FIG. 35B does not have the conductive film 87 formed thereon. Since the transistor 10nb has the same structure as that of the transistor 10nb shown in FIG. AB, the conductive film 87 is not required to be formed. For example, the manufacturing method is the same as that shown in Embodiment 5. Therefore, the description will be omitted here.

[0404] In addition, in FIG. 43 and FIG. 44, the electrode 19c, the electrode 20c, the electrode 19d, the electrode 20d, etc., a first oxide semiconductor film 81, a second oxide semiconductor film 82, a third oxide semiconductor film 83, etc. The nitride semiconductor film 83, the oxide semiconductor film 84, and the like are provided. The present invention is not limited to the above. A first oxide semiconductor film 81, a second oxide semiconductor film 82, a third oxide semiconductor film 83, and an oxide An example of such a case is shown in FIGS. Shown below.

[0405] <Variation 11> The transistor shown in FIG. 43 is a channel-etched type transistor, but the channel A protective transistor can be used.

[0406] <Variation 12> The transistor shown in Figure 43 is a bottom gate transistor, but it can be used in pixel circuits or drive circuits. The transistor used in the driving circuit has a bottom-contact top-gate structure as shown in Figure 22. A structure may also be used.

[0407] <Variation 13> The transistor shown in Figure 43 is a bottom gate transistor, but it can be used in pixel circuits or drive circuits. The transistor used in the driving circuit has a top-contact top-gate structure as shown in Figure 23. A structure may also be used.

[0408] Note that the structures and methods shown in this embodiment may be used in conjunction with structures and methods shown in other embodiments and examples. and methods can be used in appropriate combination. [Example]

[0409] In this example, a transistor was fabricated and its Vg-Id characteristics and reliability were evaluated. The results will be explained below.

[0410] <Sample preparation> In this example, a sample including a transistor suitable for a driver circuit of a display device of one embodiment of the present invention was prepared. Sample 1 and Sample 2 including a transistor suitable for a pixel of a display device were fabricated. Specifically, Sample 1, which is one embodiment of the present invention, corresponds to transistor 10k shown in FIG. As Sample 2 of one embodiment of the present invention, Transistor 1 shown in FIG. A configuration equivalent to 0m was created.

[0411] <Sample 1> First, a glass substrate was used as the substrate, and a gate electrode was formed on the substrate.

[0412] A tungsten film with a thickness of 100 nm was formed as a gate electrode by sputtering. A mask is formed on the tungsten film by a photolithography process, and the mask is used to It was formed by etching a part of the tungsten film.

[0413] Next, an insulating film that functions as a gate insulating film was formed on the gate electrode.

[0414] The gate insulating film is a 400 nm thick silicon nitride film and a 50 nm thick silicon oxynitride film. A silicon film was laminated to form the film.

[0415] The silicon nitride film includes a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. The silicon nitride film was laminated to form a three-layer structure.

[0416] The first silicon nitride film was formed using silane at a flow rate of 200 sccm and silane at a flow rate of 2000 sccm. The plasma CVD equipment was used with nitrogen at a flow rate of 100 sccm and ammonia gas at a flow rate of 100 sccm as raw material gases. The pressure in the processing chamber is controlled to 100 Pa, and a high frequency current of 27.12 MHz is applied. The source was used to supply 2000 W of power, and the thickness was formed to be 50 nm. For the silicon nitride film, silane at a flow rate of 200 sccm, nitrogen at a flow rate of 2000 sccm, and ammonia gas at a flow rate of 2000 sccm was used as the source gas for plasma CVD equipment treatment. The pressure in the processing chamber was controlled to 100 Pa, and a high frequency power source of 27.12 MHz was used. The third nitride layer was formed to a thickness of 300 nm by supplying a power of 2000 W. For the silicon film, silane at a flow rate of 200 sccm and nitrogen at a flow rate of 5000 sccm were used. It is supplied as a raw material gas to the processing chamber of the plasma CVD equipment, and the pressure in the processing chamber is controlled to 100 Pa. The thickness was 50 mm. The first silicon nitride film, the second silicon nitride film, and The substrate temperature was set to 350°C when the third silicon nitride film was formed.

[0417] The silicon oxynitride film was prepared by using silane at a flow rate of 20 sccm and silane at a flow rate of 3000 sccm. Nitrous oxide was supplied as a raw material gas to the processing chamber of the plasma CVD equipment, and the pressure in the processing chamber was set at 4 The pressure was controlled to 0 Pa, and 100 W of power was supplied using a 27.12 MHz high frequency power supply. The substrate temperature during the silicon oxynitride film formation was 350°C. did.

[0418] Next, an oxide semiconductor film was formed so as to overlap the gate electrode with the gate insulating film interposed therebetween.

[0419] Here, a 35-nm-thick oxide semiconductor film is formed on the gate insulating film by a sputtering method. did.

[0420] The oxide semiconductor film was prepared by using a sputtering target of In:Ga:Zn=1:1:1 (atomic ratio) The target was a mixture of argon and oxygen with an oxygen ratio of 50%. The pressure in the treatment chamber was controlled to 0.6 Pa, and a 2.5 kW power supply was used. The oxide semiconductor film was formed by supplying electric power. Ta.

[0421] Next, a pair of electrodes in contact with the oxide semiconductor film were formed.

[0422] First, a conductive film was formed over the gate insulating film and the oxide semiconductor film. An aluminum film having a thickness of 400 nm is formed on a tungsten film having a thickness of 50 nm. A titanium film with a thickness of 100 nm was then formed on the aluminum film. A mask is formed on the conductive film, and a part of the conductive film is etched using the mask. An electrode was formed.

[0423] Next, a second gate insulating film was formed over the oxide semiconductor film and the pair of electrodes. The second gate insulating film is a first oxide insulating film having a thickness of 50 nm, and the second gate insulating film is a second oxide insulating film having a thickness of 400 nm. The insulating film had a three-layer structure consisting of an oxide insulating film No. 2 and a nitride insulating film with a thickness of 100 nm.

[0424] The first oxide insulating film was formed using silane at a flow rate of 20 sccm and monoxide at a flow rate of 3000 sccm. Dinitrogen was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 350°C, and the The film was formed by the plasma CVD method in which high frequency power of 1000 kJ / cm was supplied to parallel plate electrodes.

[0425] The second oxide insulating film was formed using silane at a flow rate of 160 sccm and monocarboxylic acid at a flow rate of 4000 sccm. Nitrogen dioxide was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 220°C, and The film was formed by plasma CVD in which 0 W of high frequency power was supplied to parallel plate electrodes. This results in the oxygen content exceeding the stoichiometric value, and some of the oxygen is removed by heating. A silicon oxynitride film that desorbs can be formed.

[0426] Next, heat treatment is performed to remove water, nitrogen, and Hydrogen and the like are released, and part of oxygen contained in the second oxide insulating film is transferred to the oxide semiconductor film. Here, heat treatment was carried out at 350°C for 1 hour in a nitrogen and oxygen atmosphere.

[0427] Next, a nitride insulating film was formed on the second oxide insulating film. silane at a flow rate of 5000 sccm, nitrogen at a flow rate of 5000 sccm, and ammonia at a flow rate of 100 sccm. The gas was used as the raw material gas, the pressure in the processing chamber was 100 Pa, the substrate temperature was 350°C, and the power was 1000 W. The film was formed by the plasma CVD method in which high frequency power of 1000 kJ / cm was supplied to parallel plate electrodes.

[0428] Next, in a region where the oxide semiconductor film and the pair of electrodes are not provided, a gate insulating film An opening reaching the gate electrode was formed in a part of the second gate insulating film. A mask is formed on the second gate insulating film by a photolithography process, and the mask is used to The gate insulating film and the second gate insulating film were partly etched using the insulating film.

[0429] Next, a second gate electrode that functions as a back gate electrode is formed on the second gate insulating film. The back gate electrode is formed on a part of the gate insulating film and the second gate insulating film. The structure was such that the gate electrode was electrically connected through the opening.

[0430] Here, as the back gate electrode, a conductive film of indium oxide-tin oxide compound (ITO-SiO₂) containing silicon oxide with a thickness of 100 nm was formed by sputtering method. The composition of the target used for the conductive film was In₂O₃:SnO₂:SiO₂ = 85 :10:5 [wt%]. After that, heat treatment was carried out at 250 °C for 1 hour in a nitrogen atmosphere.

[0431] Sample 1 of this example was obtained through the above steps.

[0432] <Sample 2> Sample 2 is different from Sample 1 in that it does not have a back gate electrode and has an acrylic resin film with a thickness of 1.5 μm on the nitride insulating film.

[0433] Sample 2 was prepared by omitting the formation process of the back gate electrode in the preparation process of Sample 1 described above. Since the other processes are the same as those of Sample 1 described above, the description of Sample 1 can be cited.

[0434] Note that, as Samples 1 and 2 described above, three types of transistors with a channel width (W) of 50 μm and channel lengths (L) of 2 μm, 3 μm, and 6 μm were fabricated respectively.

[0435] <Vg-Id characteristics> Next, as the initial characteristics of the transistors of Samples 1 and 2, Vg-Id characteristics were measured. Here, the substrate temperature was set at 25 °C, the potential difference between the source and drain (hereinafter also referred to as drain voltage, Vd) was set at 1 V and 10 V, and the potential difference between the source and gate electrodes (hereinafter also referred to as gate voltage, Vg) was changed from -15 V to 15 V. The current between the source and drain The change characteristics of the current (hereinafter referred to as drain current, Id), i.e., the Vg-Id characteristics was measured.

[0436] In the transistor of Sample 1, the gate electrode and the back gate electrode are electrically connected. A driving method was used in which the gate voltage was applied while the transistor was connected to the Therefore, the gate voltages of the gate electrode and the back gate electrode are always equal.

[0437] Figure 24 shows the Vg-Id characteristics of Sample 2. Figures 24(A), (B), and (C) show ,These are the results for transistors with channel lengths (L) of 2 μm, 3 μm, and 6 μm. Similarly, FIG. 25 shows the Vg-Id characteristics of Sample 1.

[0438] 24 and 25, the horizontal axis represents the gate voltage Vg, and the first vertical axis represents the gate The vertical axis represents the drain current Id, and the vertical axis represents the field-effect mobility. The mobility is calculated at a drain voltage Vd of 10 V to show the value in the saturated region. The effect mobility is shown.

[0439] In the sample 2 shown in FIG. 24, the threshold voltage becomes negative as the channel length (L) increases. The results showed that the shift in the direction of the drain current was suppressed. The effect of suppressing the negative shift of the threshold voltage was clearly confirmed. It was found that the field-effect mobility value hardly changes regardless of the length (L).

[0440] In addition, in Sample 1 shown in FIG. 25, the channel length (L) was significantly lower than that of Sample 2. It was confirmed that the field-effect mobility was improved in all cases. It was also found that the field-effect mobility improved as the gate and back gate voltages increased. By applying a gate voltage while the electrode is electrically connected, the channel Even when the filter length (L) is small (L=2 μm), the threshold voltage Vd The change in voltage was found to be extremely small.

[0441] From the above results, it can be seen that the transistor according to one embodiment of the present invention has a gate electrode and a back gate electrode. By adopting a driving method in which the gate voltage is applied while the electrode is electrically connected, It was confirmed that the field-effect mobility improves as the length (L) of the channel decreases. In the transistors of the drive circuit, which require high field effect mobility, the channel length (L) must be reduced. The above driving method is adopted, and normally-off characteristics are required. In the transistor of the pixel to be used, the channel length (L) is set to the transistor of the driving circuit. To provide a display device that can be driven at high speed and consume less power by increasing the size of the display device. can be done. [Example]

[0442] In this example, a transistor was fabricated and its Vg-Id characteristics and reliability were evaluated. The results will be explained.

[0443] <Sample preparation> In this example, Samples 3 to 6 each include a transistor suitable for a display device of one embodiment of the present invention. More specifically, Samples 3 to 6, which are embodiments of the present invention, were fabricated using the drive circuit shown in FIG. A configuration equivalent to the 10k transistors shown in the operating circuit was fabricated.

[0444] First, a glass substrate was used as the substrate, and a gate electrode was formed on the substrate.

[0445] A tungsten film with a thickness of 150 nm was formed as a gate electrode by sputtering. A mask is formed on the tungsten film by a lithography process, and the tungsten film is The SiO 2 film was formed by etching a portion of the SiO 2 film.

[0446] Next, an insulating film that functions as a gate insulating film was formed on the gate electrode.

[0447] The gate insulating film is a 400 nm thick silicon nitride film and a 50 nm thick silicon oxynitride film. The gate insulating film was formed by laminating a silicon film and a silicon dioxide film. The gate insulating film was formed by plasma CVD.

[0448] Next, an oxide semiconductor film was formed so as to overlap the gate electrode with the gate insulating film interposed therebetween.

[0449] Here, an oxide semiconductor film was formed over the gate insulating film by a sputtering method.

[0450] The oxide semiconductor film used in Sample 3 was prepared by sputtering a compound semiconductor (In:Ga:Zn=1: The target is a 1:1 (atomic ratio) mixture of argon and oxygen with an oxygen ratio of 33%. The pressure in the processing chamber was controlled to 0.4 Pa. The oxide semiconductor film was formed to a thickness of 35 nm. did.

[0451] The oxide semiconductor film used in Sample 4 was prepared by sputtering a ZnO film containing In:Ga:Zn=3: The target is 1:2 (atomic ratio), and the mixed gas of argon and oxygen is 33% oxygen. The pressure in the processing chamber was controlled to 0.4 Pa. The oxide semiconductor film was formed to a thickness of 35 nm. did.

[0452] The oxide semiconductor film used in Sample 5 was prepared by sputtering a compound semiconductor (In:Ga:Zn=3: The target is 1:3 (atomic ratio), and the mixed gas of argon and oxygen is 33% oxygen. The pressure in the processing chamber was controlled to 0.4 Pa. The oxide semiconductor film was formed to a thickness of 35 nm. did.

[0453] The oxide semiconductor film used in Sample 6 was prepared by sputtering a compound semiconductor (In:Ga:Zn=3: The target is 1:4 (atomic ratio), and the mixed gas of argon and oxygen is 33% oxygen. The pressure in the processing chamber was controlled to 0.4 Pa. The oxide semiconductor film was formed to a thickness of 35 nm. did.

[0454] Next, a pair of electrodes in contact with the oxide semiconductor film were formed.

[0455] First, a conductive film was formed over the gate insulating film and the oxide semiconductor film. An aluminum film having a thickness of 400 nm is formed on a tungsten film having a thickness of 50 nm. A titanium film with a thickness of 100 nm was formed on the titanium film. A mask is formed on the conductive film, and a part of the conductive film is etched using the mask to form a pair of electrodes. poles formed.

[0456] Next, a second gate insulating film was formed over the oxide semiconductor film and the pair of electrodes. The second gate insulating film is a first oxide insulating film having a thickness of 50 nm and a second oxide insulating film having a thickness of 400 nm. The insulating film had a three-layer structure consisting of an oxide insulating film with a thickness of 100 nm and a nitride insulating film with a thickness of 100 nm.

[0457] The first oxide insulating film was formed using silane at a flow rate of 20 sccm and dioxide at a flow rate of 3000 sccm. Nitrogen was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 350°C, and the power was 100 W. The film was formed by plasma CVD, in which high frequency power was supplied to parallel plate electrodes.

[0458] The second oxide insulating film was formed using silane at a flow rate of 160 sccm and monoxide at a flow rate of 4000 sccm. Dinitrogen was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 220°C, and The film was formed by the plasma CVD method in which a high frequency power of 1000 W was supplied to parallel plate electrodes. As a result, the material contains more oxygen than the stoichiometric composition, and some of the oxygen is removed by heating. A silicon oxynitride film can be formed to separate the silicon oxynitride film from the silicon nitride film.

[0459] Next, heat treatment is performed to remove water, nitrogen, and hydrogen from the first oxide insulating film and the second oxide insulating film. and transferring part of oxygen contained in the second oxide insulating film to the oxide semiconductor film. Here, the heat treatment was carried out in a nitrogen and oxygen atmosphere at 350°C for 1 hour.

[0460] Next, a nitride insulating film was formed on the second oxide insulating film. ccm of silane, 5000 sccm of nitrogen, and 100 sccm of ammonia gas. The pressure in the processing chamber was 100 Pa, the substrate temperature was 350°C, and the power was 1000 W. The film was formed by plasma CVD, in which high frequency power was supplied to parallel plate electrodes.

[0461] Next, in a region where the oxide semiconductor film and the pair of electrodes are not provided, an opening reaching the gate electrode was formed in a part of the gate insulating film and the second gate insulating film. The opening was formed by forming a mask on the second gate insulating film by a photolithography process and etching a part of the gate insulating film and the second gate insulating film using the mask. Next, in a region where the oxide semiconductor film and the pair of electrodes are not provided, an opening reaching the gate electrode was formed in a part of the gate insulating film and the second gate insulating film. The opening was formed by forming a mask on the second gate insulating film by a photolithography process and etching a part of the gate insulating film and the second gate insulating film using the mask. Next, in a region where the oxide semiconductor film and the pair of electrodes are not provided, an opening reaching the gate electrode was formed in a part of the gate insulating film and the second gate insulating film. The opening was formed by forming a mask on the second gate insulating film by a photolithography process and etching a part of the gate insulating film and the second gate insulating film using the mask. Next, in a region where the oxide semiconductor film and the pair of electrodes are not provided, an opening reaching the gate electrode was formed in a part of the gate insulating film and the second gate insulating film. The opening was formed by forming a mask on the second gate insulating film by a photolithography process and etching a part of the gate insulating film and the second gate insulating film using the mask.

[0462] Next, a second gate electrode functioning as a back gate electrode was formed on the second gate insulating film. The back gate electrode was configured to be electrically connected to the gate electrode through an opening provided in a part of the gate insulating film and the second gate insulating film. Next, a second gate electrode functioning as a back gate electrode was formed on the second gate insulating film. The back gate electrode was configured to be electrically connected to the gate electrode through an opening provided in a part of the gate insulating film and the second gate insulating film. Next, a second gate electrode functioning as a back gate electrode was formed on the second gate insulating film. The back gate electrode was configured to be electrically connected to the gate electrode through an opening provided in a part of the gate insulating film and the second gate insulating film.

[0463] Here, as the back gate electrode, a conductive film of an indium oxide - tin oxide compound (ITO - SiO2) containing silicon oxide with a thickness of 110 nm was formed by a sputtering method. The composition of the target used for the conductive film was In2O3:SnO2:SiO2 = 85:10:5 [wt%]. Here, as the back gate electrode, a conductive film of an indium oxide - tin oxide compound (ITO - SiO2) containing silicon oxide with a thickness of 110 nm was formed by a sputtering method. The composition of the target used for the conductive film was In2O3:SnO2:SiO2 = 85:10:5 [wt%]. Here, as the back gate electrode, a conductive film of an indium oxide - tin oxide compound (ITO - SiO2) containing silicon oxide with a thickness of 110 nm was formed by a sputtering method. The composition of the target used for the conductive film was In2O3:SnO2:SiO2 = 85:10:5 [wt%]. Here, as the back gate electrode, a conductive film of an indium oxide - tin oxide compound (ITO - SiO2) containing silicon oxide with a thickness of 110 nm was formed by a sputtering method. The composition of the target used for the conductive film was In2O3:SnO2:SiO2 = 85:10:5 [wt%].

[0464] Next, heat treatment was performed at 250°C for 1 hour in a nitrogen atmosphere.

[0465] Through the above steps, Samples 3, 4, 5, and 6 of this example were obtained.

[0466] Note that, as Samples 3 to 6 described above, three types of transistors with a channel width (W) of 50 μm and channel lengths (L) of 3 μm, 6 μm, and 10 μm were fabricated respectively. Note that, as Samples 3 to 6 described above, three types of transistors with a channel width (W) of 50 μm and channel lengths (L) of 3 μm, 6 μm, and 10 μm were fabricated respectively. Note that, as Samples 3 to 6 described above, three types of transistors with a channel width (W) of 50 μm and channel lengths (L) of 3 μm, 6 μm, and 10 μm were fabricated respectively.

[0467] <Vg - Id Characteristics> Next, as the initial characteristics of the transistors of Samples 3 to 6, Vg - Id characteristics were measured. Here, the substrate temperature is set to 25°C, and the potential difference between the source and drain (hereinafter referred to as drain voltage) is Vd) is set to 1V and 10V, and the potential difference between the source and gate electrodes (hereafter referred to as gate voltage (Vg) from -20V to 20V. The change characteristics of the current (hereinafter referred to as drain current, Id) that flows through the transistor, i.e., the Vg-Id characteristics, are measured. It was determined.

[0468] FIG. 39 shows the Vg-Id characteristics of Samples 3 to 6.

[0469] In FIG. 39, the horizontal axis represents the gate voltage Vg, the first vertical axis represents the drain current Id, and the second vertical axis represents the drain current Id. The vertical axis of each of the graphs indicates the field-effect mobility. To show the value, the field-effect mobility calculated when the drain voltage Vd is 10 V is shown. do.

[0470] As shown in FIG. 39, Samples 4 to 6 have a field effect that is about two to three times higher than that of Sample 3. It was found that sample 4 was a transistor with the highest field effect mobility. It was found that the transistor had high mobility.

[0471] <Reliability> Next, the reliability of Samples 3 to 6 was evaluated. The reliability was evaluated by Vg- The Vg-Id characteristics were measured by the above-mentioned Vg-I Please refer to the description of the measurement method for d characteristics.

[0472] The light irradiation was performed using a xenon lamp at wavelengths of 400 nm, 450 nm, and 500 nm. The light was irradiated from a direction perpendicular to the sample.

[0473] FIG. 40 shows the Vg-Id characteristics of Samples 3 to 6 under light irradiation.

[0474] As can be seen from FIG. 40, Samples 4 to 6, which have a high indium content, show a higher luminance under light irradiation than Sample 3. On the other hand, it was found that the increase in off-state current was large at wavelengths in the visible light range. However, no increase in the off-state current was observed under 500 nm light irradiation.

[0475] From the above results, it can be seen that Sample 3 is suitable for transistors in pixels that may be exposed to light. In addition, although samples 4 to 6 show an increase in off-state current under light irradiation, Because it has high field-effect mobility, it is suitable for use as a transistor in a driver circuit that can be shielded from light. It can be seen that... [Example]

[0476] In this example, Sample 8 and Sample 9 each including a transistor suitable for a pixel of a display device of one embodiment of the present invention were used. Sample 7, which includes a transistor suitable for a driver circuit of a display device, was also fabricated. Specifically, as Sample 8 of one embodiment of the present invention, a transistor 10m shown in the pixel of FIG. As Sample 7, which is one embodiment of the present invention, a configuration corresponding to the driving circuit shown in FIG. We fabricated a structure equivalent to the 10 kb transistor shown in Figure 1. In this case, the second oxide semiconductor film 82 is not provided.

[0477] First, a glass substrate was used as the substrate, and a gate electrode was formed on the substrate.

[0478] A tungsten film with a thickness of 100 nm was formed as a gate electrode by sputtering. A mask is formed on the tungsten film by a lithography process, and the tungsten film is The SiO 2 film was formed by etching a portion of the SiO 2 film.

[0479] Next, an insulating film that functions as a gate insulating film was formed on the gate electrode.

[0480] The gate insulating film is a 50 nm thick silicon nitride film and a 300 nm thick silicon oxynitride film. The gate insulating film was formed by laminating a silicon oxide nitride film and a silicon oxynitride film having a thickness of 50 nm. The insulating film was formed by plasma CVD.

[0481] Next, an oxide semiconductor film was formed so as to overlap the gate electrode with the gate insulating film interposed therebetween.

[0482] Here, an oxide semiconductor film was formed over the gate insulating film by a sputtering method.

[0483] The oxide semiconductor film used in Sample 7 was prepared by sputtering a compound semiconductor (In:Ga:Zn=1: The target is 1:1 (atomic ratio), and the mixture of argon and oxygen is 50% oxygen. into the processing chamber of the sputtering device, and the pressure in the processing chamber is controlled to 0.6 Pa. A direct current of 2.5 kW was supplied to form a 35 nm thick oxide semiconductor film. The substrate temperature during the growth was set to 170°C.

[0484] The oxide semiconductor film used in Sample 8 was prepared by sputtering a compound semiconductor (In:Ga:Zn=3: The target is 1:2 (atomic ratio), and the mixed gas of argon and oxygen is 50% oxygen. into the processing chamber of the sputtering device, and the pressure in the processing chamber is controlled to 0.6 Pa. A direct current power of 5 kW was supplied to form the oxide semiconductor film to a thickness of 35 nm. The substrate temperature during this process was set to 170°C.

[0485] Next, a pair of electrodes in contact with the oxide semiconductor film were formed.

[0486] First, a conductive film was formed over the gate insulating film and the oxide semiconductor film. An aluminum film having a thickness of 400 nm is formed on a tungsten film having a thickness of 50 nm. A titanium film with a thickness of 100 nm was formed on the titanium film. A mask is formed on the conductive film, and a part of the conductive film is etched using the mask to form a pair of electrodes. poles formed.

[0487] Next, a second gate insulating film was formed over the oxide semiconductor film and the pair of electrodes. The second gate insulating film is a first oxide insulating film having a thickness of 50 nm and a second oxide insulating film having a thickness of 400 nm. The insulating film had a three-layer structure consisting of an oxide insulating film with a thickness of 100 nm and a nitride insulating film with a thickness of 100 nm.

[0488] The first oxide insulating film was formed using silane at a flow rate of 30 sccm and dioxide at a flow rate of 4000 sccm. Nitrogen was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 350°C, and the The film was formed by plasma CVD, in which high frequency power was supplied to parallel plate electrodes.

[0489] The second oxide insulating film was formed using silane at a flow rate of 200 sccm and monoxide at a flow rate of 4000 sccm. Dinitrogen was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 220°C, and The film was formed by the plasma CVD method in which a high frequency power of 1000 W was supplied to parallel plate electrodes. As a result, the material contains more oxygen than the stoichiometric composition, and some of the oxygen is removed by heating. A silicon oxynitride film can be formed to separate the silicon oxynitride film from the silicon nitride film.

[0490] Next, heat treatment is performed to remove water, nitrogen, and hydrogen from the first oxide insulating film and the second oxide insulating film. and transferring part of oxygen contained in the second oxide insulating film to the oxide semiconductor film. Here, the heat treatment was carried out in a nitrogen and oxygen atmosphere at 350°C for 1 hour.

[0491] Next, a nitride insulating film was formed on the second oxide insulating film. ccm of silane, 5000 sccm of nitrogen, and 100 sccm of ammonia gas. The pressure in the processing chamber was 100 Pa, the substrate temperature was 350°C, and the power was 1000 W. The film was formed by plasma CVD, in which high frequency power was supplied to parallel plate electrodes.

[0492] Next, in a region where the oxide semiconductor film and the pair of electrodes are not provided, the gate insulating film and An opening reaching the gate electrode was formed in a part of the second gate insulating film. A mask is formed on the second gate insulating film by a photolithography process, and the mask is used to The gate insulating film and the second gate insulating film were partly etched using the etching gas.

[0493] Next, a second gate electrode that functions as a back gate electrode is formed on the second gate insulating film. The back gate electrode is formed by an opening provided in a part of the gate insulating film and the second gate insulating film. The opening was configured to be electrically connected to the gate electrode.

[0494] Here, a 100 nm thick oxide silicon film was deposited by sputtering as the back gate electrode. A conductive film of silicon-containing indium oxide-tin oxide compound (ITO-SiO2) was formed. The composition of the target used for the conductive film was In2O3:SnO2:SiO2=85: The ratio was 10:5 [wt %].

[0495] Next, a heat treatment was carried out in a nitrogen atmosphere at 250° C. for 1 hour.

[0496] By the above steps, Samples 7 and 8 of this example were obtained. In the above-described manufacturing process, the step of forming the back gate electrode was omitted.

[0497] In addition, the above-mentioned samples 7 and 8 have a channel width (W) of 50 μm. Two types of transistors were fabricated, one with a channel length (L) of 3 μm and the other with a length of 6 μm.

[0498] <Reliability> Next, the reliability of the transistors of Samples 7 and 8 was evaluated. This was done using bias stress testing.

[0499] This section explains the measurement method for the Plus Gate BT stress test (Plus BT). The initial electrical characteristics (before stress application) of the transistors subjected to the BT stress test are measured. To determine this, the substrate temperature was set to 60°C, the drain voltage Vd was set to 1V or 10V, and the gate The change characteristic of the drain current Id with respect to the voltage Vg, that is, the Vg-Id characteristic, was measured.

[0500] Next, while the substrate temperature was maintained at 60°C, the drain voltage Vd of the transistor was set to 0V. Next, a gate voltage of Vg+30V was applied and held for 1 hour.

[0501] In the negative gate BT stress test (negative BT), a gate voltage of -30V is applied. Added.

[0502] The positive gate BT stress test and the negative gate BT stress test were conducted in a dark state. (Dark).

[0503] The Vg-Id characteristics of Samples 7 and 8 before and after the gate BT stress test are shown in Figure 41. The Vg-Id characteristics before the test are shown by a solid line, and the Vg-Id characteristics after the test are shown by a solid line. The characteristics are shown by the dashed lines. The change in threshold voltage (ΔVth) and the change in shift value (ΔS The threshold voltage (Vth) is shown in Tables 1 and 2. The gate voltage (voltage between the source and gate) when the transistor is formed. ) is expressed by taking the gate voltage (Vg) on ​​the horizontal axis and the square root of the drain current (Id) on the vertical axis. The curve (Vg-√Id characteristics) created by plotting the data shows the maximum slope. The straight line when the tangent line is extrapolated shows that the square root of the drain current (Id) is 0 (Id is 0A). The gate voltage (Vg) at the intersection with the line was calculated. The shift value was calculated as Vg-I In the curve showing the d characteristics, the straight line obtained by extrapolating the tangent line with the maximum slope and the drain current Id is 1×10 ―12 The gate voltage Vg was calculated as the intersection point with the line representing A.

[0504] [Table 1]

[0505] [Table 2]

[0506] From the above results, it can be seen that the transistor according to one embodiment of the present invention has a gate electrode and a back gate electrode. By adopting a driving method in which a gate voltage is applied while the It was confirmed that the mobility was improved and the reliability was high. [Example]

[0507] In this example, a transistor was fabricated and its Vg-Id characteristics and reliability were evaluated. The results will be explained below.

[0508] <Sample preparation> In this example, Sample 9 and Sample 10 each include a transistor suitable for a pixel of a display device according to one embodiment of the present invention. Sample 10 including a transistor suitable for a driving circuit of a display device was fabricated. Specifically, as Sample 9, which is one embodiment of the present invention, a transistor 10m shown in the pixel of FIG. As a sample 10 according to one embodiment of the present invention, a configuration corresponding to the drive circuit shown in FIG. A configuration equivalent to the 10ka transistor shown in the circuit was fabricated.

[0509] First, a glass substrate was used as the substrate, and a gate electrode was formed on the substrate.

[0510] A tungsten film with a thickness of 100 nm was formed as a gate electrode by sputtering. A mask is formed on the tungsten film by a lithography process, and the tungsten film is The SiO 2 film was formed by etching a portion of the SiO 2 film.

[0511] Next, an insulating film that functions as a gate insulating film was formed on the gate electrode.

[0512] The gate insulating film is a 50 nm thick silicon nitride film and a 200 nm thick silicon oxynitride film. The gate insulating film was formed by laminating a silicon film and a silicon dioxide film. The gate insulating film was formed by plasma CVD.

[0513] Next, an oxide semiconductor film was formed so as to overlap the gate electrode with the gate insulating film interposed therebetween.

[0514] Here, an oxide semiconductor film was formed over the gate insulating film by a sputtering method.

[0515] The sample having a single-layer structure of the oxide semiconductor film is referred to as Sample 9. In Sample 9, the oxide semiconductor film The sputtering target is In:Ga:Zn=1:1:1 (atomic ratio). The sputtering equipment was operated using a mixture of argon and oxygen with an oxygen ratio of 50%. The pressure in the treatment chamber was controlled to 0.6 Pa, and 2.5 kW of DC power was supplied. The oxide semiconductor film was formed to a thickness of 35 nm. It was decided.

[0516] The sample having a stacked structure of oxide semiconductor films is designated as Sample 10. The sputtering target for the film was In:Ga:Zn=3:1:2 (atomic ratio). The sputtering equipment was set up using a mixture of argon and oxygen with an oxygen ratio of 50% as the target. The pressure in the processing chamber was controlled to 0.6 Pa, and 2.5 kW of DC power was supplied. The first layer was formed to a thickness of 10 nm by sputtering, and the sputtering target was In:Ga: The target is Zn=1:1:1 (atomic ratio), and a mixed gas of argon and oxygen is used. The ratio was 50% and the pressure in the processing chamber was 0.6 Pa. and a second layer formed to a thickness of 10 nm by supplying 5 kW of DC power. Note that the substrate temperature was 170° C. when the oxide semiconductor film was formed.

[0517] Next, a pair of electrodes in contact with the oxide semiconductor film were formed.

[0518] First, a conductive film was formed over the gate insulating film and the oxide semiconductor film. An aluminum film having a thickness of 400 nm is formed on a tungsten film having a thickness of 50 nm. A titanium film with a thickness of 100 nm was formed on the titanium film. A mask is formed on the conductive film, and a part of the conductive film is etched using the mask to form a pair of electrodes. poles formed.

[0519] Next, a protective insulating film was formed over the oxide semiconductor film and the pair of electrodes. The first oxide insulating film is 10 nm thick and the second oxide insulating film is 390 nm thick. The membrane has a two-layer structure.

[0520] The first oxide insulating film was formed using silane at a flow rate of 20 sccm and dioxide at a flow rate of 3000 sccm. Nitrogen was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 350°C, and the power was 100 W. The film was formed by plasma CVD, in which high frequency power was supplied to parallel plate electrodes.

[0521] The second oxide insulating film was formed using silane at a flow rate of 160 sccm and monoxide at a flow rate of 4000 sccm. Dinitrogen was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 220°C, and The film was formed by the plasma CVD method in which a high frequency power of 1000 W was supplied to parallel plate electrodes. As a result, the material contains more oxygen than the stoichiometric composition, and some of the oxygen is removed by heating. A silicon oxynitride film can be formed to separate the silicon oxynitride film from the silicon nitride film.

[0522] Next, heat treatment is performed to remove water, nitrogen, and hydrogen from the first oxide insulating film and the second oxide insulating film. and transferring part of oxygen contained in the second oxide insulating film to the oxide semiconductor film. Here, the heat treatment was carried out in a nitrogen and oxygen atmosphere at 350°C for 1 hour.

[0523] Next, in a region where the oxide semiconductor film and the pair of electrodes are not provided, the gate insulating film and An opening reaching the gate electrode was formed in a part of the protective insulating film. The opening was formed by forming a mask on the protective insulating film by a photolithography process and etching a part of the gate insulating film and the protective insulating film using the mask. Next, a heat treatment was performed at 250°C for 1 hour in a nitrogen atmosphere. Samples 9 and 10 of this example were obtained through the above steps.

[0524]

[0525]

[0526] As samples 9 and 10 described above, three types of transistors with a channel width (W) of 50 μm and channel lengths (L) of 2 μm, 3 μm, and 6 μm were fabricated respectively.

[0527] <Vg-Id Characteristics> Next, as the initial characteristics of the transistors of samples 9 and 10, the Vg-Id characteristics were measured. Here, the substrate temperature was set to 25°C, the potential difference between the source and drain (hereinafter also referred to as the drain voltage, Vd) was set to 1V and 10V, and the potential difference between the source and gate electrodes (hereinafter also referred to as the gate voltage, Vg) was changed from -20V to 15V, or from -15V to 10V. The change characteristics of the current flowing between the source and drain (hereinafter also referred to as the drain current, Id), that is, the Vg-Id characteristics were measured.

[0528]

[0529]

[0530]

[0531] Fig. 47 shows the Vg-Id characteristics of samples 9 and 10. Also, in Fig. 47, the horizontal axis represents the gate voltage Vg, the first vertical axis represents the drain current Id, and the second vertical axis represents the field-effect mobility. Here, the field-effect mobility is in the saturation region.To show the value, the field-effect mobility calculated when the drain voltage Vd is 10 V is shown. do.

[0530] As shown in FIG. 47, Sample 10 has a field-effect mobility about three times higher than that of Sample 9. It turned out to be a transistor.

[0531] From the above results, it can be seen that the field-effect transport Therefore, it is suitable for driving circuits that require high field-effect mobility. In the transistor, high efficiency can be achieved by using an oxide semiconductor film with a high proportion of indium. A display device capable of realizing high resolution can be provided. [Explanation of symbols]

[0532] 10k transistor 10kΩ transistor 10kb transistor 10k_1 transistor 10k_2 transistor 10k_3 transistor 10k_4 transistor 10m transistor 10mb transistor 10m_1 transistor 10m_2 transistor 10m_3 transistor 10m_4 transistor 10n transistor 10na transistor 10nb transistor 11 Circuit Board 12 Undercoat insulating film 13 Gate electrode 13c Gate electrode 13d Gate electrode 15 Gate insulating film 19 electrode 19c electrode 19d electrode 20 electrodes 20c electrode 20d electrode 21 Protective film 23 Oxide insulating film 25 Oxide insulating film 27 Nitride insulating film 80 Oxide semiconductor film 80a Oxide semiconductor film 80b Oxide semiconductor film 81 Oxide semiconductor film 81a Oxide semiconductor film 82 Oxide semiconductor film 83 Oxide semiconductor film 83a Oxide semiconductor film 84 Oxide semiconductor film 85 Oxide semiconductor film 86 pixel electrode 86a electrode 87 Conductive Film 88 Organic insulating film 89 Capacitor element 90 Opposing substrate 91 Counter electrode 92a Alignment film 92b Alignment film 93 Liquid crystal layer 94 Liquid crystal element 95 insulating film 96 insulating film 97 EL layer 98 electrode 99 Organic EL element 310 Electron Gun Room 312 Optical system 314 Sample Room 316 Optical system 318 Camera 320 Observation Room 322 Film Room 324 electronic 328 Substance 332 Fluorescent Screen 900 boards 901 Pixel section 902 Scanning line driver circuit 903 Scanning line driver circuit 904 Signal line driver circuit 910 Capacitance wiring 912 Gate wiring 913 Gate wiring 914 Drain electrode 916 Transistor 917 Transistor 918 Liquid crystal element 919 Liquid crystal element 920 pixels 921 Switching Transistor 922 Drive transistor 923 Capacitor 924 Light-emitting element 925 signal line 926 scan lines 927 Power line 928 Common electrode 1001 Main Unit 1002 Case 1003a Display section 1003b Display section 1004 keyboard buttons 1021 Main Unit 1022 Fixed part 1023 Display section 1024 operation buttons 1025 external memory slots 1030 Case 1031 Case 1032 Display device 1033 Speaker 1034 Microphone 1035 Operation Key 1036 Pointing Device 1037 Camera Lens 1038 External connection terminal 1040 solar cells 1041 External memory slot 1050 Television Equipment 1051 Case 1052 Storage media playback and recording unit 1053 Display section 1054 External connection terminal 1055 Stand 1056 external memory 5100 pellets 5120 board 5161 area 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8005 FPC 8006 Display Cell 8007 Backlight Unit 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery

Claims

[Claim 1] A pixel portion and a driver circuit for driving the pixel portion are provided on the same substrate, the pixel portion includes a first transistor including a first oxide semiconductor film, the driver circuit includes a second transistor including a second oxide semiconductor film and a third oxide semiconductor film; the first oxide semiconductor film and the second oxide semiconductor film having a composition different from that of the first oxide semiconductor film are formed on the same insulating surface; a channel length of the first transistor is longer than a channel length of the second transistor; The display device according to claim 1, wherein the third oxide semiconductor film is in contact with a side surface of the second oxide semiconductor film.

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