Semiconductor device

Abstract

To provide a transistor having high and stable electric characteristics even though a structure is fine; or to achieve high performance and high reliability even in a semiconductor device including the transistor.SOLUTION: A semiconductor device has on a substrate, a conductor, an oxide semiconductor, and an insulator. The oxide semiconductor has a first region and a second region, in which the second region has resistance lower than that of the first region and a whole surface of the oxide semiconductor to be the first region is surrounded by the conductor via the insulator.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to, for example, an oxide, a transistor, a semiconductor device, and a method for manufacturing the same. Alternatively, the present invention relates to, for example, an oxide, a display device, a light-emitting device, a lighting device, an electric storage device, The present invention relates to a device, a storage device, a processor, an imaging device, an electronic device, or an oxide, a display device, Manufacturing methods for liquid crystal display devices, light-emitting devices, storage devices, processors, imaging devices, and electronic devices Or, a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a memory device, a processor, The present invention relates to an imaging device and a method for driving an electronic device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect relates to an article, a method, or a manufacturing method. One aspect of the present invention is a process, machine, manufacture, or composition. It is about the (object of matter).

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to a general category of devices, including display devices, light-emitting devices, lighting devices, electro-optical devices, semiconductor circuits, and electronic devices. may have semiconductor devices. [Background technology]

[0004] The technology of constructing transistors using semiconductors on substrates with insulating surfaces is attracting attention. Such transistors are widely used in semiconductor devices such as integrated circuits and display devices. Silicon is known as a semiconductor that can be used in transistors.

[0005] Silicon used as a semiconductor in transistors is classified into amorphous silicon and polycrystalline silicon depending on the application. For example, it is used in transistors that make up large display devices. In this case, it is preferable to use amorphous silicon, for which film formation technology on large-area substrates has been established. On the other hand, it is applied to transistors that constitute high-performance display devices that are integrated with driving circuits. In this case, if polycrystalline silicon is used, it is possible to fabricate transistors with high field effect mobility. Polycrystalline silicon is preferable because it can be obtained by heat treatment at high temperature or by laser light. A method for forming the film by processing is known.

[0006] In recent years, transistors using oxide semiconductors (typically In-Ga-Zn oxide) have become Development is intensifying.

[0007] Oxide semiconductors have a long history. In 1988, crystalline In-Ga-Zn oxide was first used in semiconductor devices. In 1995, the use of oxides A transistor using a semiconductor has been invented, and its electrical characteristics have been disclosed (Patent Document See reference 2. ).

[0008] Furthermore, a transistor using an amorphous oxide semiconductor has been disclosed (see Patent Document 3). Since oxide semiconductors can be deposited by sputtering or the like, they can be used to construct large display devices. The oxide semiconductor can be used as a semiconductor for a transistor. Because of their high field-effect mobility, they are suitable for high-performance display devices with integrated drive circuits. In addition, by improving some of the production facilities for amorphous silicon transistors, Since it is possible to use this system, it also has the advantage of reducing capital investment.

[0009] Furthermore, a transistor including an oxide semiconductor has an extremely low leakage current in an off state. For example, it is known that the leakage current of a transistor using an oxide semiconductor is low. A low-power CPU that utilizes this characteristic has been disclosed (see Patent Document 4). In addition, by forming a well-type potential in the active layer made of oxide semiconductor, high It has been disclosed that a transistor having a field effect mobility can be obtained (see Patent Document 5). .). [Prior art documents] [Patent documents]

[0010] [Patent Document 1] Japanese Patent Application Publication No. 63-239117 [Patent Document 2] Special Publication No. 11-505377 [Patent Document 3] Patent No. 5215589 [Patent Document 4] Japanese Patent Application Laid-Open No. 2012-257187 [Patent Document 5] Japanese Patent Application Laid-Open No. 2012-59860 Summary of the Invention [Problem to be solved by the invention]

[0011] When transistors are miniaturized, the short channel effect occurs. This is a degradation of electrical characteristics due to the reduction of the channel length (L) of the transistor. The short channel effect is caused by the electric field of the drain extending to the source. This results in a normally-on state and an increase in the subthreshold swing value (also called the S value). , an increase in leakage current, etc.

[0012] In view of the above, an object of one embodiment of the present invention is to provide a transistor with improved operating characteristics. Another object is to provide a semiconductor device with low power consumption. One aspect of the present invention is to provide a transistor that can be miniaturized and highly integrated and has stable electrical characteristics. Another object of one embodiment of the present invention is to provide a transistor with small parasitic capacitance. One of the objects is to provide a transistor.

[0013] Another object is to provide a transistor with stable electrical characteristics. An object of the present invention is to provide a transistor with low leakage current when off. Another object of the present invention is to provide a transistor having a large on-state current. It is an object of the present invention to provide a transistor having off-state electrical characteristics. An object of the present invention is to provide a transistor with a small threshold swing value. An object of the present invention is to provide a highly reliable transistor.

[0014] Furthermore, semiconductor devices including the transistors also have improved performance, reliability, and productivity. Alternatively, oxygen is supplied to the channel layer of a transistor. Another object of the present invention is to provide a semiconductor device that can be easily supplied. The description of these issues does not preclude the existence of other issues. It is not necessary for one embodiment of the present invention to solve all of these problems. Other issues will become clear from the description, drawings, claims, etc. It is possible to extract other issues from the description, drawings, claims, etc. is. [Means for solving the problem]

[0015] The semiconductor device includes a conductor, an oxide semiconductor, and an insulator on a substrate, and the oxide semiconductor The oxide semiconductor layer has a first region and a second region, and the first region is surrounded by insulating layers on all four sides. It is characterized by being surrounded by a conductor through the body.

[0016] The semiconductor device includes a conductor, an oxide semiconductor, a first insulator, a second insulator, and a the oxide semiconductor has a first region and a second region, and the second region is The oxide semiconductor serving as the first region has a lower resistance than the first insulator and the second insulator. The present invention is characterized in that the conductive material is surrounded by an insulator.

[0017] In the above structure, the second region has a higher impurity concentration than the first region. do.

[0018] The semiconductor device includes a conductor, an oxide semiconductor, and an insulator on a substrate, and the oxide semiconductor has a first region, a second region, and a third region between the first region and the second region, The oxide semiconductor, which is the third region, is surrounded on all four sides by conductors with insulators interposed therebetween. It is characterized by:

[0019] The semiconductor device includes a conductor, an oxide semiconductor, a first insulator, a second insulator, and a , and the oxide semiconductor has a first region, a second region, and a region between the first region and the second region. The third region is formed between the first insulator and the second insulator. It is characterized by being surrounded by a conductor through two insulators.

[0020] In the above structure, the first region and the second region have a higher impurity concentration than the third region. It is characterized by:

[0021] In the above structure, the first region functions as one of a source region and a drain region, and the second region functions as one of a source region and a drain region. The region (2) functions as the other of the source region and the drain region.

[0022] In the above structure, the first insulator contains silicon, and the second insulator contains hafnium. It is characterized by the following.

[0023] In the above configuration, the first insulator and the second insulator have different thicknesses.

[0024] An electronic device includes the semiconductor device having the above structure. [Effects of the Invention]

[0025] Since the on-current is high and the off-current is low, the driving characteristics of the transistor are good. Furthermore, even with a fine structure, high and stable electrical characteristics can be achieved. Furthermore, it is possible to provide a transistor in which the channel length can be easily controlled and the Even when the transistor is thinned, the short channel effect can be suppressed. Increasing the density will make it possible to further miniaturize all small electronic devices.

[0026] Furthermore, a transistor having stable electrical characteristics can be provided. It is possible to provide a transistor with a small leakage current when the ON current is large. Alternatively, a transistor having normally-off electrical characteristics can be provided. Alternatively, transistors with small subthreshold swing values ​​can be provided. To provide a highly reliable transistor. can be done.

[0027] Furthermore, semiconductor devices including the transistors also have improved performance, reliability, and productivity. Alternatively, a novel semiconductor device or the like can be provided. The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description, This becomes clear from the description, drawings, claims, etc. From any description, it is possible to extract effects other than these. [Brief explanation of the drawings]

[0028] [Figure 1] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 2] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 3] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 4] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 5] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 6] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 7] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 8] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 9] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 10] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 11] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 12]1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 13] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 14] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 15] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 16] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 17] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 18] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 19] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 20] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 21] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 22] 1A and 1B are a cross-sectional view and a top view illustrating one embodiment of a semiconductor device. [Figure 23] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 24] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 25] 10A and 10B illustrate structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 26] Electron diffraction pattern of CAAC-OS. [Figure 27] FIG. 1 shows the change in the crystalline part of an In-Ga-Zn oxide due to electron irradiation. [Figure 28] FIG. 1 is a circuit diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 29] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 30] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 31] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 32]FIG. 1 is a circuit diagram illustrating a memory device according to one embodiment of the present invention. [Figure 33] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 34] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 35] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 36] FIG. 1 is a circuit diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 37] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 38] FIG. 1 is a circuit diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 39] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 40] FIG. 1 is a block diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 41] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 42] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 43] 1A and 1B are a perspective view and a cross-sectional view illustrating a semiconductor device of one embodiment of the present invention. [Figure 44] FIG. 1 is a block diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 45] FIG. 1 is a circuit diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 46] 1A to 1C are a circuit diagram, a top view, and a cross-sectional view illustrating a semiconductor device of one embodiment of the present invention. [Figure 47] 1A and 1B are a circuit diagram and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 48] FIG. 10 is a perspective view illustrating an electronic device according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0029] Hereinafter, embodiments will be described with reference to the drawings. It is possible to carry out the invention in various forms and in various ways without departing from the spirit and scope of the invention. It will be readily apparent to those skilled in the art that various modifications may be made to the design and details of the present invention. The present invention should not be construed as being limited to the following description of the embodiments.

[0030] In addition, in the drawings, the size, thickness of layers, or areas may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The figures are merely diagrammatic representations and are not limited to the shapes or values ​​shown in the drawings. Therefore, the same reference numerals are used in common between different drawings for the same parts or parts having similar functions. In addition, when referring to similar functions, the hatch pattern is used. Similarly, there are cases where no particular symbol is attached.

[0031] In addition, in this specification and the like, ordinal numbers such as 1st, 2nd, etc. are used for convenience. Therefore, for example, "first" may be changed to "second" " or "third" etc. as appropriate. The ordinal numbers used to identify an aspect of the present invention may not match. There is a match.

[0032] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used. The relationship is used for convenience in explaining the relationship with reference to the drawings. The values ​​change depending on the direction in which each component is depicted. It is not limited to words and phrases, and can be rephrased appropriately depending on the situation.

[0033] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices are all semiconductor devices. It may have a conductor device.

[0034] In this specification, a transistor includes a gate, a drain, and a source. It is an element with at least three terminals. And, the drain (drain terminal, drain Between the source (source terminal, source region or drain electrode) and the source (source terminal, source region or source electrode) It has a channel region and allows current to flow through the drain, the channel region, and the source. In this specification and the like, the channel region is a region through which a current mainly flows. This refers to the area where

[0035] The source and drain functions may differ depending on the type of transistor used, or the circuit operation. This may be reversed if the direction of the current changes during operation. In the text, the terms source and drain may be used interchangeably. .

[0036] In this specification and the like, a silicon oxynitride film is a film containing more oxygen than nitrogen as a composition. The content of oxygen is preferably 55 atomic % or more and 65 atomic % or less, and nitrogen is preferably 100 atomic % or more. 1 atomic % to 20 atomic %; silicon is 25 atomic % to 35 atomic %; hydrogen is 0.1 The concentration range of silicon dioxide is 10 atomic % or more. The composition of the material is one in which the nitrogen content is higher than the oxygen content, and preferably the nitrogen content is 55 atomic % to 65 atomic %; oxygen 1 atomic % to 20 atomic %; silicon 25 atomic % % or more and 35 atomic % or less, and hydrogen is contained in the concentration range of 0.1 atomic % or more and 10 atomic % or less To say something.

[0037] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer." It may be possible to change the term to

[0038] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Almost parallel" means that two straight lines are arranged at an angle of between -30° and 30°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0039] For example, in this specification, when it is explicitly stated that X and Y are connected, In this case, X and Y are electrically connected, and X and Y are functionally connected. The case where X and Y are directly connected is also considered to be disclosed in this specification. Therefore, the present invention is not limited to the predetermined connection relationships, for example, the connection relationships shown in the drawings or text. Connections other than those shown in the drawings or text are also treated as if they were described in the drawings or text. do.

[0040] Here, X and Y are the object (for example, a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film, a layer, etc.). , etc.).

[0041] An example of a direct connection between X and Y is a circuit that allows electrical connection between X and Y. The elements to be considered (e.g., switches, transistors, capacitance elements, inductors, resistance elements, When no external device (such as a diode, display element, light-emitting element, or load) is connected between X and Y, The elements that allow electrical connection between X and Y (e.g., switches, transistors, capacitors) elements, inductors, resistors, diodes, display elements, light-emitting elements, loads, etc.) , X and Y are connected.

[0042] An example of an electrical connection between X and Y is The elements to be considered (e.g., switches, transistors, capacitance elements, inductors, resistance elements, One or more devices (such as diodes, display elements, light-emitting elements, and loads) can be connected between X and Y. It is possible. The switch has a function to control on / off. A switch can be in a conducting state (ON state) or a non-conducting state (OFF state), allowing current to flow. The switch has the function of controlling whether or not the current flows. When X and Y are electrically connected, This includes the case where Y is directly connected.

[0043] An example of a functional connection between X and Y is a function that allows the functional connection between X and Y. Circuits that perform the above functions (for example, logic circuits (inverters, NAND circuits, NOR circuits, etc.), signal conversion conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits (voltage power supply circuits (voltage boost circuits, voltage drop circuits, etc.), level shifter circuits that change the signal potential level, etc.) , voltage source, current source, switching circuit, amplifier circuit (which can increase the signal amplitude or current amount, etc.) circuits, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation One or more circuits (e.g., memory circuits, control circuits, etc.) can be connected between X and Y. For example, even if another circuit is inserted between X and Y, the signal output from X If X is transmitted to Y, then X and Y are considered to be functionally connected. When X and Y are functionally connected, there is a direct connection between X and Y and a direct connection between X and Y. This also includes the case where the and are electrically connected.

[0044] In addition, if it is explicitly stated that X and Y are electrically connected, are electrically connected (i.e., there is another element or circuit between X and Y) X and Y are functionally connected (i.e., X and Y are functionally connected) and (When there is a functional connection between them via another circuit) and when X and Y are directly connected (i.e., when X and Y are connected without any other element or circuit between them) is considered to be disclosed in the present specification. If it is explicitly stated that it is connected, The same content is considered to be disclosed in the present specification.

[0045] For example, if the source (or first terminal, etc.) of the transistor is connected via Z1 (or (not shown), electrically connected to X, and the drain (or second terminal, etc.) of the transistor is connected to Z 2 (or not), and is electrically connected to Y, or the source of the transistor (or the first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 is directly connected to X. The drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2. and another part of Z2 is directly connected to Y, It is possible to do so.

[0046] For example, "X and Y and the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor" The terminals of the transistor (or the first terminal) are electrically connected to each other. 1 terminal, etc.), the drain of the transistor (or the second terminal, etc.), and Y. It can be expressed as "connected to the source (or the first The first terminal of the transistor is electrically connected to X, and the drain of the transistor is electrically connected to the second terminal of the transistor. The transistor source (or first terminal, etc.) is electrically connected to Y, and the transistor source (or first terminal, etc.) is electrically connected to X. The drain (or second terminal, etc.) of the transistor, Y, is electrically connected in this order. " Alternatively, "X is the source (or first terminal, etc.) of the transistor. and the drain (or second terminal, etc.) are electrically connected to Y, and X, the source (or first terminal, etc.) of a transistor, the drain (or second terminal, etc.) of a transistor ), Y is provided in this order of connection. By specifying the order of connections in the circuit configuration using a simple expression method, Distinguish between the source (or first terminal, etc.) and the drain (or second terminal, etc.) of a transistor. The technical scope can be determined by the above.

[0047] Alternatively, for example, "the source (or first terminal, etc.) of a transistor" is electrically connected to X through at least a first connection path, and the first connection path is , and the second connection path is a transistor through a transistor. The source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor The first connection path is a path via Z1, and the second connection path is a path between the first and second transistors. The drain (or second terminal, etc.) of the capacitor is electrically connected to Y through at least a third connection path. the third connection path does not have the second connection path, and the third connection path The connection path is the path via Z2. The source (or first terminal, etc.) of the resistor is connected to the resistor via Z1 by at least the first connection path. and electrically connected to X, and the first connection path does not have a second connection path; The second connection path has a connection path through a transistor, and (or the second terminal, etc.) is connected to Y via Z2 by at least a third connection path. The third connection path does not have the second connection path. Alternatively, the source (or first terminal, etc.) of the transistor may be at least The first electrical path is electrically connected to X through Z1. The primary path does not have a second electrical path, and the second electrical path is a From the source (or first terminal, etc.) to the drain (or second terminal, etc.) of the transistor The drain (or second terminal, etc.) of the transistor is connected to at least a third The third electrical path is electrically connected to Y through Z2. , does not have a fourth electrical path, and the fourth electrical path is (or second terminal, etc.) to the source (or first terminal, etc.) of the transistor. Using the same expression as these examples, the circuit configuration By defining the connection path in Distinguishing between the first terminal (or the second terminal, etc.) and the drain (or the second terminal, etc.) to determine the technical scope. can be done.

[0048] These representation methods are merely examples, and the present invention is not limited to these representation methods. , Y, Z1, Z2 are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layer, etc.).

[0049] In addition, the circuit diagram shows independent components as if they are electrically connected to each other. Even if the components are different, one component may have the functions of multiple components. For example, when a part of the wiring also functions as an electrode, one conductive film functions as both the wiring and the electrode. Therefore, the electrode in this specification has the functions of both components. The term "electromagnetic connection" refers to a case where one conductive film has the functions of multiple components. This also falls within the scope of the above.

[0050] (Embodiment 1) In this embodiment mode, one mode of a semiconductor device will be described with reference to FIGS.

[0051] <Configuration Example 1 of Semiconductor Device> FIG. 1 illustrates an example of a transistor 100. Note that for simplicity, only a portion of FIG. The film is omitted. Also, Fig. 1(B) corresponds to the dashed line X1-X2 shown in Fig. 1(A). 1(C) is a cross-sectional view taken along line Y1-Y2.

[0052] The transistor 100 formed on the substrate 101 has a conductor 16 which functions as a gate electrode. 0 and conductor 170, and region 131, which functions as either a source region or a drain region. and a region 133 that functions as the other of the source region and the drain region. The oxide 130 has an insulating layer 120 which functions as a gate insulating layer, and an insulating layer 150. The region 132 is electrically connected to the wiring 140a, and the region 133 is electrically connected to the wiring 140b. The conductor 160 is electrically connected to the wiring 140c.

[0053] In the structure of transistor 100 shown in FIG. 1, oxide 130 includes regions 131, 132, and 133. The regions 132 and 133 are formed, and the regions 132 and 133 are formed in a manner similar to the region 131. For example, the region 131 has a higher impurity concentration than the region 132 and has a lower resistance. and the region with a concentration of 5% or less, the region with a concentration of 2% or less, with respect to the maximum concentration of the impurity in the region 133. The impurities may be in the region of 0.1% or less, or in the region of 1% or less. , which may also be referred to as a dopant or element.

[0054] As shown in FIG. 1B, in the oxide 130, the region 131 overlaps with the conductor 160. The region 132 and the region 133 are regions excluding the region 131. A region 132 and a region 133 are formed in a part of the region where the object 130 and the conductor 160 overlap. This allows the region where the channel of the transistor 100 is formed to be separated from the region where the low resistance The region 132 and the region 133 are in contact with each other, and the region 132 and the region 133 are in contact with each other. Since no high-resistance offset region is formed between the region where transistor 1 is formed and the 00 on-current can be increased.

[0055] The regions 132 and 133 are formed by ion doping, such as ion implantation. For example, when the transistor structure shown in FIG. 1B is provided, the conductor 1 After forming the insulator 60, a doping process may be performed using the conductor 160 as a mask. If 50 is thin enough and the doping ions are accelerated sufficiently, the impurities penetrate into the insulator 150 On the other hand, in the region overlapping with the conductor 160, the impurity Therefore, as shown in FIG. 1(B), regions 132 and 133 are formed. Therefore, the regions 132 and 133 are obtained from the region 131 by SIMS analysis. The concentration of the impurity increases.

[0056] The impurities added to the regions 132 and 133 include, for example, hydrogen, helium, neodymium, and the like. Argon, krypton, xenon, nitrogen, fluorine, phosphorus, chlorine, arsenic, boron, magnesium Nesium, aluminum, silicon, titanium, vanadium, chromium, nickel, zinc, gallium Sodium, Germanium, Yttrium, Zirconium, Niobium, Molybdenum, Indium , tin, lanthanum, cerium, neodymium, hafnium, tantalum or tungsten, etc. Among these elements, helium, neon, argon, krypton, and xenon are Non, nitrogen, fluorine, phosphorus, chlorine, arsenic or boron, ion implantation method, ion doping It can be relatively easily added using methods such as the plasma immersion ion implantation method. This is preferable because it can be added.

[0057] In addition, since many oxygen vacancies are formed in the regions 132 and 133, they are more oxidized than the region 131. The oxygen concentration obtained by SIMS analysis is also low. , the crystallinity is lower than that of region 131 because many defects are formed.

[0058] In addition, in FIG. 1C, the entire surface of the oxide 130 that becomes the region 131 is in contact with the insulator 120 and the The structure is surrounded by the conductor 160 and the conductor 170 with the insulator 150 interposed therebetween. The term "the entire surface of the oxide 130 that will become the region 131" used here means that the oxide 130 is an insulating The oxide 130 is a thin film that is formed on the top, bottom, and side surfaces of the insulating film 120 and the insulating film 150. If the surface is curved and there is no clear distinction between the side, top, and bottom surfaces, then the area 1 This means the outermost surface of the oxide 130 which will become 31.

[0059] The entire surface of the oxide 130 that becomes the region 131 is electrically connected to the insulator 120 and the insulator 150. The structure of the conductor 160 and the conductor 170 is such that the conductor 160 is surrounded by the conductor. Therefore, the four sides of the region 131 where the channel is formed (in other words, excluding the channel length direction) The four sides of the region 131 can be electrically surrounded (by the electric field generated by the conductor). The structure of a transistor that electrically surrounds a semiconductor is called a surrounded channel. This is called the el (s-channel) structure. Therefore, the channel is formed throughout the region 131. In an s-channel structure, the source-drain A large current can flow between the gate and gate electrodes, increasing the on-state current. Since voltage is applied to the entire area, a transistor with reduced leakage current is provided. It can be provided.

[0060] When the transistor has an s-channel structure, the entire surface of the region 131 is Therefore, the thicker the oxide 130, the larger the channel area. That is, the thicker the oxide 130, the higher the on-current of the transistor. In addition, the thicker the oxide 130, the greater the proportion of the region with high carrier controllability. The subthreshold swing value can be reduced, for example, to 10 nm or more. or 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, the productivity of the semiconductor device may be reduced. Therefore, for example, it is 300 nm or less, preferably 200 nm or less, and more preferably The oxide 130 may have a thickness in the region of 150 nm or less.

[0061] Because it can achieve high on-state current, the s-channel structure is suitable for miniaturized transistors. Since the transistor can be miniaturized, a semiconductor having the transistor can be The device can be a highly integrated, high density semiconductor device. The transistor preferably has a channel length of 40 nm or less, more preferably 30 nm or less. More preferably, the transistor has a region of 20 nm or less, and the channel width is preferably Preferably, the thickness is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. It has.

[0062] The conductors 160 and 170 may be made of molybdenum, titanium, tantalum, or tungsten. Metal film containing elements selected from the group consisting of silicon, aluminum, copper, chromium, neodymium, and scandium or a metal nitride film containing the above-mentioned elements (titanium nitride film, molybdenum nitride film, nitride Indium tin oxide, tungsten oxide film, etc. Indium oxide, indium zinc oxide with tungsten oxide, indium zinc oxide with titanium oxide Indium oxide, indium tin oxide with titanium oxide, indium zinc oxide, silicon oxide Conductive materials such as indium tin oxide doped with the above-mentioned conductive material can also be used. It is also possible to use a laminated structure of an electrically conductive material and the above-mentioned metal material.

[0063] The insulators 120 and 150 may be made of a silicon oxide film or a silicon oxynitride film. It is preferable that the insulator 120 contains excess oxygen. It is preferable to use an insulator containing oxygen in excess of the stoichiometric composition. By providing an insulator containing excess oxygen in contact with the oxide 130, oxygen vacancies in the region 131 are eliminated. can be compensated for.

[0064] The insulators 120 and 150 may be made of aluminum oxide, aluminum oxynitride, Gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide Hafnium oxide nitride, silicon nitride, and other barrier materials that have barrier properties against oxygen and hydrogen. When such a material is used, the insulating film 130 can be formed. This layer functions as a layer that prevents oxygen from being released from the substrate and prevents impurities such as hydrogen from entering from the outside.

[0065] The insulators 120 and 150 do not necessarily have to be made of the same material. When the insulators 120 and 150 are formed using different materials, the physical properties such as the dielectric constant are different. Taking this into consideration, the film thickness can be varied to obtain the optimum structure. Silicon-based materials have a higher dielectric constant than silicon oxide-based materials. When a silicon oxide film is used as the insulating film and a hafnium oxide film is used as the insulating film 150, the insulating film 150 is It is preferable that the thickness of the insulating body 150 is larger than that of the insulating body 120. Considering the physical properties of the material, a channel is formed evenly over the entire surface of the oxide 130 that will become the region 131. The thicknesses of the insulators 120 and 150 are appropriately optimized to obtain a transistor that It would be good to do so.

[0066] The insulator 120 and the insulator 150 may have a layered structure. The insulating film containing the oxide 130 is provided in contact with the oxide 130, and is further wrapped with a barrier film. 0 is a state where the composition is almost the same as the stoichiometric composition, or where there is more oxygen than the stoichiometric composition. In addition, the oxide 130 can be saturated. This can be done.

[0067] As shown in FIG. 1B, when a silicon oxide film is used as the insulator 150, the gate and When forming the conductor, the surface side may be etched. and when doping is performed through the insulator 150 to provide the region 133, the region 13 By thinning the insulator 150 on the region 133 and the region 2, it is possible to efficiently add impurities. On the other hand, when a hafnium oxide film or the like is used for the insulator 150, it is difficult to form a conductor that becomes a gate. When forming the insulating layer 150, the surface of the insulating layer 150 is not removed.

[0068] In addition, the oxide constituting the region 131 has a large energy gap of 3.0 eV or more. The oxide film obtained by processing the oxide under appropriate conditions and sufficiently reducing its carrier density is suitable. In the transistor used, the leakage current between the source and drain in the off state (off current) can be made extremely low compared to conventional silicon-based transistors. can.

[0069] Also, applicable oxides include at least indium (In) or zinc (Zn) It is preferable that the oxide semiconductor contains In and Zn. As a stabilizer to reduce the variation in the electrical characteristics of the transistors used, In addition, gallium (Ga), tin (Sn), hafnium (Hf), zirconium (Zr), Titanium (Ti), scandium (Sc), yttrium (Y), lanthanides (e.g., Cerium (Ce), neodymium (Nd), gadolinium (Gd), It is preferable that a plurality of types are included.

[0070] The oxides that can be used for the oxide 130 will be described in detail in the second embodiment. will be explained.

[0071] In the semiconductor device shown in FIG. 1A, an interlayer film is provided to cover the transistor 100. In addition to the interlayer film, an insulator 180 is laminated as a barrier layer. An undercoat film may be formed on the substrate 101. In addition to the undercoat film, a barrier film may be formed. The membrane may be laminated.

[0072] It is desirable to use an insulating material that has barrier properties against oxygen and hydrogen as the barrier film. Examples of such insulators include aluminum oxide, aluminum oxynitride, Gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide Such materials include hafnium, hafnium oxynitride, and silicon nitride. When formed using the above, the barrier film prevents oxygen from being released from the oxide 130 and oxygen from the insulator 120. This layer prevents oxygen from diffusing to anything other than the oxide 130 and prevents impurities such as hydrogen from entering from the outside. It functions as:

[0073] With the above structure, a transistor having stable electrical characteristics can be provided. Alternatively, it is possible to provide a transistor with a small leakage current when it is not conducting. It is possible to provide a transistor with a large on-state current. It is possible to provide a transistor having subthreshold characteristics. It is possible to provide a transistor with a small dipping value or a highly reliable transistor. A star can be provided.

[0074] As mentioned above, the on-current is high and the off-current is low, so the driving characteristics of the transistor are good. Furthermore, it is possible to reduce power consumption. Furthermore, with the miniaturization of transistors, To provide a transistor having high and stable electrical characteristics even if the channel length is shortened. In other words, the short channel effect can be suppressed, miniaturization is possible, and the transistor It is believed that by increasing the degree of integration, it will be possible to further miniaturize all small electronic devices. Furthermore, it is possible to provide a transistor having high and stable electrical characteristics even in a fine structure. It is possible.

[0075] <Configuration Example 2 of Semiconductor Device> 2, 3, and 4 show an example of a transistor 100 different from that of the first configuration example of the semiconductor device. 2A, 3A, and 4A show top views of the transistor 100. For simplicity, some films are shown in Figs. 2(A), 3(A), and 4(A). In addition, Fig. 2(B), Fig. 3(B), and Fig. 4(B) are omitted. 4(A) and 4(B). 2(C), FIG. 3(C), and FIG. 4(C) are cross-sectional views corresponding to Y1-Y2.

[0076] 2, 3, and 4, the transistor 100 shown in FIG. The same reference numerals are used to designate structures having the same functions as those constituting the substrate 100. The transistor 100 formed on the gate electrode 101 has a conductor 160 and a and a conductor 170, a region 131 where a channel is formed, a source region or a drain region and a region 132 that functions as either a source region or a drain region. an oxide 130 having a region 133 corresponding to the oxide 130; an insulator 120 acting as a gate insulating layer; and an insulator 150. The region 132 is electrically connected to the wiring 140a. The area 133 is electrically connected to the wiring 140b, and the conductor 160 is electrically connected to the wiring 140c. Connect.

[0077] As shown in FIGS. 2, 3, and 4, the end of the insulator 150 has a thickness of 100 Å on the oxide 130. By adopting this configuration, the insulator 150 and the conductor 160 can be formed without masking. Therefore, in the doping process, the regions 132 and The region 133 is divided into a region where the impurity is directly doped and a region where the impurity is doped through the insulator 150. Therefore, as shown in FIG. 2(B), the channels of the region 132 and the region 133 are As the position of the side edge in the longitudinal direction of the oxide 130 becomes deeper from the top surface of the oxide 130, In some cases, the region shifts to the side edge of the channel length direction. The regions 132 and 133 are formed too deep relative to the channel forming region and are always in a conductive state. It can also prevent this from happening.

[0078] As shown in FIG. 3, the ends of the insulator 120 and the oxide 130 do not have to coincide. As shown in FIG. 4, the end of the insulator 120 is positioned outside the end of the insulator 150. For example, when the material used for the insulator 150 is different from the material used for the insulator 120, In this case, the thicknesses of the insulators 120 and 150 are made different depending on the dielectric constant, etc. For example, the equivalent oxide thickness (EOT) ) can be optimized appropriately.

[0079] <Semiconductor Device Modification 1> 5, 6, 7, and 8 show examples of modifications of the transistor 100. 6A, 6A, 7A, and 8A show the top surface of the transistor 100. For simplicity, only a portion of the film is shown in FIGS. 5(A), 6(A), 7(A), and 8(A). In addition, Fig. 5(B), Fig. 6(B), Fig. 7(B) and Fig. 8(B) are omitted. 5(A), 6(A), 7(A) and 8(A) are the dashed lines X1-X2. 5(C), 6(C), 7(C) and 8(C) are cross-sectional views corresponding to the Y1-Y2 FIG.

[0080] 5 to 8, the transistor 100 shown in FIG. The same reference numerals are used to designate structures having the same functions as those constituting the substrate 101. The transistor 100 formed in the above-mentioned manner includes a conductor 160 that functions as a gate electrode and a conductor a body 170, a region 131 in which a channel is formed, and one of a source region and a drain region; a region 132 that functions as either a source region or a drain region; The oxide 130 having 133, the insulator 120 acting as a gate insulating layer, and the insulator The region 132 is electrically connected to the wiring 140a, and the region 133 is electrically connected to the wiring 140b. is electrically connected to the wiring 140b, and the conductor 160 is electrically connected to the wiring 140c. .

[0081] As shown in FIGS. 5, 6, 7, and 8, the conductor 170 is formed larger than the oxide 130. By forming the conductor 170 to be larger than the oxide 130, In other words, the film coverage of the oxide 130 and other films formed above the oxide 130 can be improved. Each film constituting the transistor 100 can be formed without impairing flatness. A highly reliable transistor can be provided.

[0082] In the structure shown in Figure 5, the ends of the insulator 120 and the oxide 130 coincide. The insulator 120 and oxide 130 can be shaped simultaneously, eliminating the need for masks. can be done.

[0083] Also, as shown in FIG. 6, the ends of the insulator 120 and the oxide 130 do not have to coincide. 7, the end of the insulator 120 is positioned outside the end of the insulator 150. For example, the material used for the insulator 150 may be different from the material used for the insulator 120. In this case, the film thicknesses of the insulators 120 and 150 may be made different depending on the dielectric constant and the like. Therefore, for example, the structure can be optimized appropriately so that the equivalent oxide thickness (EOT) is the same. stomach.

[0084] Furthermore, as shown in FIG. 8, even if the end of the insulator 120 and the end of the conductor 170 are aligned, In this case, the conductor 170 is electrically connected to the conductor 160 at the side surface. In this case, the insulator 120 and the conductor 170 are simultaneously formed, thereby reducing the number of masks. This can be done.

[0085] <Modification 2 of Semiconductor Device> 9 and 10 show examples of modified examples of the transistor 100. 9A and 10A show the top surface of the transistor 100. For simplicity, FIGS. In Fig. 9(B) and Fig. 10(B), some films are omitted. ) are cross sections corresponding to the dashed lines X1-X2 shown in FIG. 9(A) and FIG. 10(A), respectively. 9(C) and 10(C) are cross-sectional views corresponding to Y1-Y2.

[0086] 9 and 10, the transistor 100 shown in FIG. The same reference numerals are used to designate structures having the same functions as those constituting the substrate 101. The transistor 100 formed in the above-mentioned manner includes a conductor 160 that functions as a gate electrode and a conductor a body 170, a region 131 in which a channel is formed, and one of a source region and a drain region; a region 132 that functions as either a source region or a drain region; The oxide 130 having 133, the insulator 120 acting as a gate insulating layer, and the insulator The region 132 is electrically connected to the wiring 140a, and the region 133 is electrically connected to the wiring 140b. is electrically connected to the wiring 140b, and the conductor 160 is electrically connected to the wiring 140c. .

[0087] As shown in Figures 9 and 10, the conductor 170 may be embedded in the insulator 110. For example, After forming the conductor 170, the insulator 110 is formed and then CMP (Chemical Mechanical Polishing) is performed. Chemical Mechanical Polishing (Chemical Mechanical Polishing) exposes the conductor 170. The insulator 110 can be removed until the insulator 110 is completely embedded. The film coverage of the film formed above 70 can be improved.

[0088] As shown in FIG. 9, after forming the oxide 130 and the insulator 150, the oxide 130 and The insulator 190 may be formed on the side of the insulator 150. For example, the insulator 190 may be formed on the side By providing it as a wall insulator, further miniaturization becomes possible. The material used for the body 120, the material used for the insulator 150, and the material used for the insulator 190 are If they are different, the film thicknesses of the insulators 120, 150, and 190 are determined based on the dielectric constants, etc. By changing the thickness, for example, the equivalent oxide thickness (EOT) can be made the same value. In addition, the insulator 190, the insulator 120, and the insulator 150 have a laminated structure. It may also be constructed as such.

[0089] As shown in FIG. 10, the ends of the insulator 120, the oxide 130, and the insulator 150 are aligned. In the structure shown in FIG. By simultaneously forming the object 130, the number of masks can be reduced.

[0090] <Semiconductor Device Modification 3> 11, 12, 13, 14, and 15 show examples of modifications of the transistor 100. 11(A), 12(A), 13(A), 14(A), and 1 5(A) shows the top surface of the transistor 100. For simplicity, FIGS. Some films are omitted in Figs. 13(A), 14(A), and 15(A). In addition, Fig. 11(B), Fig. 12(B), Fig. 13(B), Fig. 14(B), and Fig. 15( 11(A), 12(A), 13(A), 14(A), and 1 5(A) is a cross-sectional view corresponding to the dashed line X1-X2 shown in FIG. 11(C) and FIG. 12(C) ), FIG. 13(C), FIG. 14(C), and FIG. 15(C) are cross-sectional views corresponding to Y1-Y2. do.

[0091] In the transistor 100 shown in FIGS. 11, 12, 13, 14, and 15, 1. The same reference numerals are used to designate structures having the same functions as those constituting the transistor 100 shown in FIG. Therefore, the transistor 100 formed on the substrate 101 has a gate electrode The functional conductors 160 and 170, the region 131 where the channel is formed, the source A region 132 that functions as either a source region or a drain region, and a region 133 that functions as either a source region or a drain region. The oxide 130 has a region 133 which functions as the other of the gate regions, and a region 134 which functions as the gate insulating layer. The region 132 includes an insulator 120 and an insulator 150. The region 132 also includes a wiring 140. a, the region 133 is electrically connected to the wiring 140b, and the conductor 160 is It is electrically connected to the wiring 140c.

[0092] As shown in FIGS. 11, 12, 13, 14, and 15, the openings in the insulator 110 The structure may include a conductor 170, an insulator 120, and an oxide 130. For example, an opening is formed in the insulator 110 using a dummy layer or the like, and a transistor is inserted in the opening. By using this structure, when a plurality of transistors are manufactured, This can reduce the variation.

[0093] The structure shown in FIG. 11 has a conductor 170, an insulator 120, and an oxide 130 formed in the opening. After that, the insulating layer 110 can be provided by planarizing the insulating layer 110 until the top surface of the insulating layer 110 is exposed. After that, the insulator 150 and the conductor 160 are formed. P, etc. can be used.

[0094] As shown in FIG. 12, the end of the insulator 150 is aligned with the end of the insulator 120. 13, the end of the insulator 150 and the end of the insulator 120 may be omitted. The end does not necessarily have to be on the extension of the side of the opening of the conductor 170. In this case, the insulating The body 120 can also be used as a stopper membrane.

[0095] 14, an insulator 150 may be embedded in the opening. As shown in FIG. 14, the upper surfaces of the insulator 150 and the insulator 120 may be flush with each other. 15, for example, after overetching only the oxide 130, the insulator 150 is removed. The insulating film can be provided by forming the insulating film.

[0096] <Configuration Example 3 of Semiconductor Device> 16, 17, and 18 show examples of modified examples of the transistor 100. ), 17(A), and 18(A) show the top view of the transistor 100. Therefore, some films are omitted in Figures 16(A), 17(A), and 18(A). 16(B), 17(B), and 18(B) are respectively similar to FIG. 16(A), 17(A) and 18(A) are cross-sectional views corresponding to the dashed line X1-X2 shown in FIG. 16(C), 17(C), and 18(C) are cross-sectional views corresponding to Y1-Y2.

[0097] 16, 17, and 18, the transistor 100 shown in FIG. 1 The structures that have the same functions as the structures that make up the transistor 100 are denoted by the same reference numerals. The transistor 100 formed on the substrate 101 has a conductor 102 which functions as a gate electrode. 60 and conductor 170, and region 131, which functions as either a source region or a drain region. a region 132 that functions as the other of the source region or the drain region, and a region 133 that functions as the other of the source region or the drain region. an oxide 130 having the structure, an insulator 120 serving as a gate insulating layer, and an insulator 150 The region 132 is electrically connected to the wiring 140a, and the region 133 is electrically connected to the wiring 140b. The conductor 160 is electrically connected to the wiring 140c.

[0098] In the transistor 100 shown in FIGS. 16, 17, and 18, the oxide 130 is an insulator 130a having a region 131a, a region 132a, and a region 133a; and an insulator 130 a semiconductor 130b having a region 131b, a region 132b, and a region 133b on the semiconductor 130b; Insulator 13 having regions 131c, 132c, and 133c on conductor 130b. 0c. In the insulator 130a, the region 132a and the region 133a are The resistance is reduced, and the region 131a contacts the region 132a and the region 133a. In the semiconductor 130b, the regions 132b and 133b have low resistance, and the region The insulator 131b contacts the region 132b and the region 133b. , region 132c, and region 133c are made to have low resistance, and region 131c is made to have low resistance. 2c and region 133c. The area 132a, the area 132b, and the area 132c are defined as the area 132. The region 133 a, the region 133 b, and the region 133 c are defined as a region 133.

[0099] That is, the insulator 130a, the semiconductor 130b, and the insulator 130c are formed in the regions 132 and 133. The area 132 and the area 133 are insufficient compared to the area 131. The concentration of the impurities is high, and the resistance is low. In the insulator 130c, the region 131 is the region excluding the region 132 and the region 133. do.

[0100] The semiconductor 130b is, for example, an oxide semiconductor containing indium. When b contains indium, the carrier mobility (electron mobility) increases. 30b preferably contains the element M. The element M is preferably Ti, Ga, Y, Zr, L The element M may be a combination of the above elements. The element M may have a high bond energy with oxygen, for example. For example, it is an element whose bond energy with oxygen is higher than that of indium. Alternatively, the element M has a function of increasing the energy gap of the oxide semiconductor, for example. The semiconductor 130b preferably contains zinc. If it contains methylcellulose, it may be prone to crystallization.

[0101] However, the semiconductor 130b is not limited to an oxide semiconductor containing indium. 0b is a non-indium-containing oxide such as zinc tin oxide or gallium tin oxide. oxide semiconductors containing lead, oxide semiconductors containing gallium, oxide semiconductors containing tin, etc. It's okay.

[0102] The insulators 130a and 130c are made of elements other than oxygen that constitute the semiconductor 130b. The semiconductor 130b is composed of one or more elements other than oxygen. Since the insulators 130a and 130c are made of one or more kinds of materials, the insulating At the interface between the insulator 130a and the semiconductor 130b, and at the interface between the semiconductor 130b and the insulator 130c In this case, defect levels are unlikely to be formed.

[0103] The insulator 130a, the semiconductor 130b, and the insulator 130c contain at least indium. It is preferable that the insulator 130a is an In-M-Zn oxide. When the atomic percentage of In is 0.00, it is preferable that In is less than 50 atomic percent and M is 50 atomic percent. more preferably, In is less than 25 atomic % and M is 75 atomic % or more. When the semiconductor 130b is an In-M-Zn oxide, the In When the sum of In and M is 100 atomic %, preferably In is 25 atomic % and M is less than 75 atomic %, and more preferably In is more than 34 atomic %. The insulator 130c is made of In-M-Zn oxide and has an M content of less than 66 atomic %. In the case of a compound, when the sum of In and M is 100 atomic %, preferably In is 5 0 atomic %, M is higher than 50 atomic %, and more preferably In is 25 atomic %, and M is higher than 75 atomic %. Alternatively, the insulator 130c may not contain indium. The insulator 130a or the insulator 130c may be gallium oxide. If the number of atoms of each element contained in the semiconductor 130b and the insulator 130c is in a simple integer ratio, It's okay if it's not there.

[0104] For example, the atomic ratio of the metal elements in the target used for the insulator 130a or the insulator 130c Representative examples are In:M:Zn=1:2:4, In:M:Zn=1:3:2, In: M:Zn=1:3:4, In:M:Zn=1:3:6, In:M:Zn=1:3:8, I n:M:Zn=1:4:3, In:M:Zn=1:4:4, In:M:Zn=1:4:5 , In:M:Zn=1:4:6, In:M:Zn=1:6:3, In:M:Zn=1:6 :4, In:M:Zn=1:6:5, In:M:Zn=1:6:6, In:M:Zn=1 :6:7, In:M:Zn=1:6:8, In:M:Zn=1:6:9, etc.

[0105] Furthermore, for example, as a representative example of the atomic ratio of the metal elements in the target used for the semiconductor 130b, are In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn= 2:1:1.5, In:M:Zn=2:1:2.3, In:M:Zn=2:1:3, In :M:Zn=3:1:2, In:M:Zn=4:2:4.1, etc. When the atomic ratio of In:Ga:Zn=4:2:4.1 is used as the target, The atomic ratio of the semiconductor 130b to be deposited may be approximately In:Ga:Zn=4:2:3. be.

[0106] Indium gallium oxide has a small electron affinity and a high oxygen blocking property. Therefore, it is preferable that the insulator 130c contains indium gallium oxide. The atomic ratio [Ga / (In+Ga)] is, for example, 70% or more, preferably 80% or more, and more preferably Preferably, it is 90% or more.

[0107] The semiconductor 130b is made of, for example, an oxide with a large energy gap. The energy gap of b is, for example, 2.5 eV or more and 4.2 eV or less, preferably 2.8 eV or more and 3.8 eV or less, and more preferably 3 eV or more and 3.5 eV or less. The energy gap of the insulator 130a is larger than the energy gap of the semiconductor 130b. The energy gap of the insulator 130c is larger than that of the semiconductor 130b. It's bigger than a pu.

[0108] The semiconductor 130b is an oxide having a larger electron affinity than the insulator 130a or the insulator 130c. For example, the semiconductor 130b is made of a material that is more conductive than the insulator 130a or the insulator 130c. The electron affinity is 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less. It is more preferable to use an oxide having a larger value by 0.15 eV or more and 0.4 eV or less. Electron affinity is the energy difference between the vacuum level and the bottom of the conduction band. The energy level of the conduction band minimum of the insulator 130a or the semiconductor 130b is It is closer to the vacuum level than the energy level at the lower band edge.

[0109] At this time, when a gate voltage is applied, the insulator 130a or the insulator 130c is not formed, but the insulator 130b is formed. A channel is formed in the semiconductor 130b having a larger electron affinity.

[0110] As described above, when used alone, the insulators 130a and 130c are conductive, semi-conductive, and However, semiconductors 13 When a transistor is formed by stacking semiconductor 130b and semiconductor 130b, electrons The flow passes through the vicinity of the interface between the semiconductor 130b and the insulator 130c. , the insulators 130a and 130c do not function as the channel of the transistor. Therefore, in this specification and the like, the insulator 130a and the insulator 130 The insulator 130a and the insulator c are not described as semiconductors but as insulators. The body 130c is described as an insulator only because it is a transistor compared to the semiconductor 130b. Since the function is similar to that of an insulator, the insulator 130a or the insulator 130c is used. Therefore, a material that can be used for the semiconductor 130b may be used.

[0111] Here, the insulator 130a and the semiconductor 130b are separated by a gap between the insulator 130a and the semiconductor 130b. In addition, there may be a mixed region between the insulator 130c and the semiconductor 130b. The mixed region may have a mixture of the insulator 130c and the semiconductor 130b. Therefore, the potential density of the insulator 130a, the semiconductor 130b, and the insulator 130c is low. In the laminate, the energy changes continuously near each interface (also known as continuous junction). (This is called a band diagram.) The interface between the semiconductor 130c and the semiconductor 130b may not be clearly distinguishable.

[0112] At this time, the electrons pass through the semiconductor 130b, not through the insulators 130a and 130c. As described above, the interface between the insulator 130a and the semiconductor 130b, and By reducing the defect level density at the interface between the insulator 130c and the semiconductor 130b, Therefore, the movement of electrons in the semiconductor 130b is not hindered, and the on-current of the transistor is reduced. It can be made higher.

[0113] In addition, the on-current of the transistor is increased as the factors that hinder the movement of electrons are reduced. For example, if there are no factors that hinder the movement of electrons, electrons can move efficiently. It is estimated that the electron movement is caused by, for example, large physical irregularities in the channel formation region. is also inhibited.

[0114] In order to increase the on-current of the transistor, for example, the upper or lower surface of the semiconductor 130b (the surface to be formed, here the upper surface of the insulator 130a) Root Mean Square (RMS) roughness less than 1 nm, preferably It is preferably less than 0.6 nm, more preferably less than 0.5 nm, and even more preferably less than 0.4 nm. In addition, the average surface roughness (also called Ra) in the area of ​​1 μm × 1 μm is 1 nm. less than 0.6 nm, more preferably less than 0.5 nm, and even more preferably 0 The maximum height difference (PV and ) is less than 10 nm, preferably less than 9 nm, more preferably less than 8 nm, Preferably, it is less than 7 nm. RMS roughness, Ra and PV are measured by SII. Using a scanning probe microscope system SPA-500 manufactured by Nano Technology Co., Ltd. It can be measured.

[0115] The insulators 130a and 130c are electrically connected to the semiconductor 130b where the channel is formed. In order to prevent elements other than oxygen (hydrogen, silicon, etc.) from entering the adjacent insulator, In addition, the channel is blocked from the interface between the adjacent insulator and the insulator 130a. By increasing the distance to the semiconductor 130b where the channel is formed, It is possible to prevent the diffusion of impurities into 0b.

[0116] For example, silicon in an oxide semiconductor can act as a carrier trap or a carrier generation source. Therefore, the lower the silicon concentration of the semiconductor 130b, the more preferable. Secondary ion mass spectroscopy (SIMS) was performed between the insulating layer 130b and the insulating layer 130a. ry Ion Mass Spectrometry) is 1×10 16 atom s / cm 3 More than 1×10 19atoms / cm 3 Less than 1 × 10 16 atom s / cm 3 5x10 or more 18 atoms / cm 3 or less, more preferably 1 × 10 16 a toms / cm 3 Over 2×10 18 atoms / cm 3 The region with the following silicon concentration is In addition, a 1×10 16 atoms / cm 3 More than 1×10 19 atoms / cm 3 Less than 1 × 10 16 atoms / cm 3 5x10 or more 18 atoms / cm 3 More preferably, 1 x10 16 atoms / cm 3 Over 2×10 18 atoms / cm 3 Silicon concentration below It has a region where

[0117] In order to reduce the hydrogen concentration in the semiconductor 130b, the insulators 130a and 130c It is preferable to reduce the hydrogen concentration in the insulators 130a and 130c. 1×10 16 atoms / cm 3 Over 2×10 20 atoms / cm 3 Below, I prefer Or 1 x 10 16 atoms / cm 3 5x10 or more 19 atoms / cm 3 More information below: Preferably 1 x 10 16 atoms / cm 3More than 1×10 19 atoms / cm 3 below, More preferably, 1 × 10 16 atoms / cm 3 5x10 or more 18 atoms / cm 3 In addition, in order to reduce the nitrogen concentration in the semiconductor 130b, It is preferable to reduce the nitrogen concentration in the insulators 130a and 130c. The insulator 130c has a SIMS value of 1×10 15 atoms / cm 3 5x1 or more 0 19 atoms / cm 3 Less than 1 × 10 15 atoms / cm 3 5x1 or more 0 18 atoms / cm 3 Less than 1×10, more preferably 15 atoms / cm 3 1 more x10 18 atoms / cm 3 or less, more preferably 1 × 10 15 atoms / cm 3 5x10 or more 17 atoms / cm 3 The nitrogen concentration ranges as follows:

[0118] Insulator 130a, semiconductor 130b, and insulator 130c shown in this embodiment, especially semiconductor 1 30b is an oxide semiconductor with a low impurity concentration and a low defect state density (few oxygen vacancies). and can be called a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor. Intrinsic or substantially highly purified intrinsic oxide semiconductors have few carrier generation sources, so Therefore, the carrier density can be reduced. A transistor having a negative threshold voltage (also called a normally-on transistor) has electrical characteristics. ) is rarely obtained. In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor In the case of high purity pure silicon, the defect level density is low, so the trap level density may also be low. The oxide semiconductor, which is pure or substantially intrinsic, has a significantly small off-state current and a channel Width W is 1 x 10 6 Even if the device has a channel length L of 10 μm, the source and drain electrodes When the voltage between the drain electrodes (drain voltage) is in the range of 1V to 10V, the off-state current is Below the measurement limit of the parameter analyzer, i.e., 1 × 10 -13 Get the trait A or below It is possible.

[0119] Therefore, the high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor is provided with a channel region. The transistor in which the above-mentioned structure is formed has small fluctuations in electrical characteristics and is highly reliable. Note that charges trapped in the trap states of the oxide semiconductor remain trapped until they are lost. It takes a long time for the charge to be released and it may behave as if it were a fixed charge. A transistor whose channel region is formed in an oxide semiconductor with a high density of gate states has excellent electrical characteristics. Impurities include hydrogen, nitrogen, alkali metals, or alkali metals. Earth metals, etc.

[0120] The hydrogen contained in the insulator 130a, the semiconductor 130b, and the insulator 130c bonds with the metal atoms. The lattice (or the part where oxygen is released) reacts with the oxygen to form water. When hydrogen enters the oxygen vacancy, electrons, which act as carriers, are generated. In addition, some of the hydrogen atoms may bond with oxygen atoms that bond with metal atoms, forming carriers. In particular, hydrogen trapped in oxygen vacancies can generate electrons. Therefore, in oxide semiconductors containing hydrogen, Therefore, a transistor using the insulator 130a is likely to have a normally-on characteristic. It is preferable that the semiconductor 130b and the insulator 130c have as little hydrogen as possible. Specifically, in the insulator 130a, the semiconductor 130b, and the insulator 130c, SIMS The hydrogen concentration obtained by analysis is 2×10 20 atoms / cm 3 Below 5x, preferably 10 19 atoms / cm 3 Less than 1×10, more preferably 19 atoms / cm 3 below , 5×10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Below or less, more preferably 5 × 10 17 atoms / cm 3 or less, more preferably 1 × 10 1 6 atoms / cm 3 The following applies.

[0121] In the insulator 130a, the semiconductor 130b, and the insulator 130c, the element is one of the group 14 elements. When silicon or carbon is contained, the insulator 130a, the semiconductor 130b, and the insulator 130c As a result, oxygen vacancies increase in the insulator 130a and the semiconductor 130b, which become n-type. The concentrations of silicon and carbon in the insulator 130a, the semiconductor 130b, and the insulator 130c are The concentration of silicon and carbon near the interface between the insulator 130b and the insulator 130c (obtained by SIMS analysis) concentration) is 2 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0122] In addition, in the insulator 130a, the semiconductor 130b, and the insulator 130c, SIMS analysis revealed that The resulting concentration of alkali metal or alkaline earth metal is 1×10 18 atoms / c m 3 Less than or equal to 2 x 10 16 atoms / cm 3 The following applies: Alkali metals and When alkaline earth metals combine with oxide semiconductors, they can generate carriers, which can lead to transistors. Therefore, the insulator 130a and the semiconductor 130b may increase the off-state current of the semiconductor 130. It is preferable to reduce the concentration of alkali metals or alkaline earth metals in the insulator 130b and the insulator 130c. Desirable.

[0123] Furthermore, when nitrogen is contained in the insulator 130a, the semiconductor 130b, and the insulator 130c, This generates electrons as carriers, increases the carrier density, and makes it easier to become n-type. A transistor using an oxide semiconductor film containing such a material tends to be normally on. Therefore, it is preferable that nitrogen be reduced as much as possible in the oxide semiconductor film. For example, the nitrogen concentration obtained by SIMS analysis is 5×10 19 atoms / cm 3 less than, Preferably 5 x 10 18 atoms / cm 3 Less than 1×10, more preferably 18 atom s / cm 3Less than 5 × 10, more preferably 17 atoms / cm 3 The following applies.

[0124] As described above, the insulator 130a, the semiconductor 130b, and the insulator 130c shown in this embodiment are , an oxide with low impurity concentration and low defect level density (few oxygen vacancies), The density is low, which tends to increase the contact resistance between the wiring 140a and the wiring 140b. Therefore, in the transistor 100 described in this embodiment, the wiring 140a and the wiring 14 130b, insulator 130a, semiconductor 130b and insulator 130c are oxide 130b, 30 are connected via the low resistance region 132 and the low resistance region 133. This makes it possible to suppress the contact resistance.

[0125] The above-described three-layer structure of the insulator 130a, the semiconductor 130b, and the insulator 130c is an example. For example, a two-layer structure in which either the insulator 130a or the insulator 130c is not provided may be used. Alternatively, a single-layer structure may be used in which neither the insulator 130a nor the insulator 130c is provided. Alternatively, the structure illustrated as an insulator 130a, a semiconductor 130b, and an insulator 130c may be used. It can also be an n-layer structure (n is an integer of 4 or more) having any of an insulator, semiconductor, or conductor. It's okay.

[0126] In the transistor 100 shown in FIG. 16, the channel formation region is mainly the region 131b. The insulator 150 in contact with the region 131b preferably contains oxygen. Furthermore, by using an insulator with high barrier properties for the insulator 120, the reliability of the transistor can be improved. can be improved.

[0127] As shown in FIG. 17, the conductor 170 may be formed larger than the oxide 130. By forming 170 larger than the oxide 130, it is formed above the conductor 170. The film-forming properties of the film can be improved.

[0128] Furthermore, as shown in FIG. 18, the conductor 170 is embedded in the insulator 110, so that the conductor 1 The film coverage of the film formed above 70 can be further improved. In the transistor 100, the channel forming region is mainly the region 131b. It is preferable to use an insulator containing oxygen for the insulator 190 in contact with b. By using an insulator with high barrier properties for the insulating layer 120 and the insulating layer 150, the signal quality of the transistor can be improved. Reliability can be improved.

[0129] <Configuration Example 4 of Semiconductor Device> 19, 20, 21, and 22 show examples of modifications of the transistor 100. 9(A), 20(A), 21(A), and 22(A) are top views of the transistor 100. For simplicity, the figures shown in Figs. 19(A), 20(A), 21(A), and 22(B) are In Fig. 19(B), Fig. 20(B), Fig. 21(A), some films are omitted. B) and 22(B) correspond to Figs. 19(A), 20(A), 21(A), and 22(A) is a cross-sectional view corresponding to the dashed line X1-X2 shown in FIG. 19(C) and FIG. 20 (C), FIG. 21(C), and FIG. 22(C) are cross-sectional views corresponding to Y1-Y2.

[0130] 19, 20, 21, and 22, the transistor 100 shown in FIG. The same reference numerals are used to designate structures having the same functions as those constituting the transistor 100. Therefore, the transistor 100 formed on the substrate 101 has a conductive layer that functions as a gate electrode. Conductor 160 and conductor 170, and region 131, either the source region or the drain region. a region 132 that functions as either a source region or a drain region; The oxide 130 having 133, the insulator 120 acting as a gate insulating layer, and the insulator The region 132 is electrically connected to the wiring 140a, and the region 133 is electrically connected to the wiring 140b. is electrically connected to the wiring 140b, and the conductor 160 is electrically connected to the wiring 140c. .

[0131] In the transistor 100 shown in FIGS. 19, 20, 21, and 22, the oxide 130 , an insulator 130a having a region 131a, a region 132a, and a region 133a; and an insulator a semiconductor 130b having regions 131b, 132b, and 133b on 130a; and an insulating layer having regions 131c, 132c, and 133c on the semiconductor layer 130b. Insulator 130a has regions 132a and 13c. The region 131a is in contact with the region 132a and the region 133a. In addition, in the semiconductor 130b, the regions 132b and 133b have low resistance. The region 131b contacts the region 132b and the region 133b. In this case, the region 132c and the region 133c are made to have low resistance, and the region 131c is made to have low resistance. The area 131a, the area 131b, and the area 133c are adjacent to each other. The area 131a, the area 132b, and the area 132c are referred to as the area 131. 32. The region 133a, the region 133b, and the region 133c are referred to as the region 133.

[0132] That is, the insulator 130a, the semiconductor 130b, and the insulator 130c are formed in the regions 132 and 133. The area 132 and the area 133 are insufficient compared to the area 131. The concentration of the impurities is high, and the resistance is low. In the insulator 130c, the region 131 is the region excluding the region 132 and the region 133. do.

[0133] As shown in FIGS. 19, 20, 21, and 22, in the transistor 100, the semiconductor 13 0b is provided so as to be surrounded by insulators 130a and 130c. Therefore, the side edge of the semiconductor 130b, particularly the vicinity of the side edge in the channel width direction, is covered with the insulator 13 The semiconductor 130b is provided in contact with the insulator 130a and the insulator 130c. A continuous junction is formed between the insulator 130a or the insulator 130c in the vicinity of the defect. The level density is reduced. Therefore, the s-channel structure makes it easier for on-current to flow. Even if the semiconductor 130b is thin, leakage current is suppressed even at the side edge in the channel width direction of the semiconductor 130b, and the semiconductor 130b is stable. The desired electrical characteristics can be obtained.

[0134] As shown in FIG. 19, the bottom surface of the insulator 130c is formed to be in contact with the top surface of the insulator 130a. 20, the bottom surface of the insulator 130c may be in contact with the insulator 120. As shown in FIG. 20, the conductor 170 may be formed in a manner similar to that of the oxide 130. The conductor 170 may be formed larger than the oxide 130. This can improve the film coverage of the film formed above the body 170.

[0135] As shown in FIG. 21, the conductor 170 is embedded in the insulator 110, so that the upper surface of the conductor 170 In addition, the film-forming properties of the film can be further improved.

[0136] As shown in FIG. 22, an opening is formed in the insulator 110, and the transistor 100 is inserted into the opening. By using this configuration, it is possible to reduce the variation between the transistors. You can create multiple transistors.

[0137] With the above structure, a transistor having stable electrical characteristics can be provided. Alternatively, it is possible to provide a transistor with a small leakage current when it is not conducting. It is possible to provide a transistor with a large on-state current. It is possible to provide a transistor having subthreshold characteristics. It is possible to provide a transistor with a small dipping value or a highly reliable transistor. A star can be provided.

[0138] As mentioned above, the on-current is high and the off-current is low, so the driving characteristics of the transistor are good. Furthermore, it is possible to reduce power consumption. Furthermore, with the miniaturization of transistors, To provide a transistor having high and stable electrical characteristics even if the channel length is shortened. In other words, the short channel effect can be suppressed, miniaturization is possible, and the transistor It is believed that by increasing the degree of integration, it will be possible to further miniaturize all small electronic devices. Furthermore, it is possible to provide a transistor having high and stable electrical characteristics even in a fine structure. It is possible.

[0139] Note that one embodiment of the present invention has been described in this embodiment. However, the present invention is not limited to these. That is, in this and other embodiments, various aspects of the invention are described. Therefore, one embodiment of the present invention is not limited to a specific embodiment. The transistor 100 includes a channel forming region, a source / drain region, etc. However, an example in which an oxide semiconductor is included is described. However, one embodiment of the present invention is not limited thereto. In some cases, or depending on the situation, the transistor 100 in one embodiment of the present invention The channel forming region or source / drain region of the transistor is made of various semiconductors. In some cases, or depending on the circumstances, in one aspect of the present invention, The channel forming region or the source / drain region of the transistor 100 Examples of such materials include silicon, germanium, silicon germanium, silicon carbide, and gallium. aluminum gallium arsenide, indium phosphide, gallium nitride, or organic semiconductors For example, in some cases, or Optionally, the transistor channel shape of the transistor 100 in one embodiment of the present invention may be The oxide semiconductor may not be included in the oxide semiconductor layer, the source / drain region, or the like.

[0140] (Embodiment 2) <Oxide semiconductor structure> The structure of an oxide semiconductor will be described below.

[0141] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide semiconductor Conductor, nc-OS (nanocrystalline Oxide Semiconductor) ctor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous li Examples include amorphous oxide semiconductors, amorphous oxide semiconductors, and amorphous oxide semiconductors.

[0142] From another point of view, oxide semiconductors are classified into amorphous oxide semiconductors and other crystalline oxide semiconductors. Crystalline oxide semiconductors are divided into single-crystal oxide semiconductors, CAAC-O S, polycrystalline oxide semiconductor, nc-OS, etc.

[0143] The definition of an amorphous structure is generally that it is not fixed in a metastable state and is isotropic. It is known that the bond angle is flexible and the bond length is short. It can also be described as a structure that has order but does not have long-range order.

[0144] On the other hand, in the case of an essentially stable oxide semiconductor, it is possible to obtain a completely amorphous structure. It cannot be called an oxide semiconductor because it is not isotropic. The oxide semiconductor (for example, having a periodic structure in a microscopic region) is converted into a completely amorphous oxide. It cannot be called a semiconductor. However, a-like OS is a device that can achieve periodicity in a microscopic area. Although it has a structure, it has voids and is an unstable structure. Its physical properties are similar to those of an amorphous oxide semiconductor.

[0145] <caac-os> First, let me explain about CAAC-OS.

[0146] CAAC-OS is an oxide semiconductor having multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of conductor.

[0147] Transmission Electron Microscope (TEM) The CAAC-OS bright-field image and diffraction pattern were analyzed by a combined analysis image (high resolution) When observing the high-resolution TEM image, multiple pellets can be confirmed. In the high-resolution TEM image, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, it is difficult to clearly identify the CAAC-OS. It can be said that the decrease in electron mobility caused by this is unlikely to occur.

[0148] The CAAC-OS observed by TEM will be described below. This shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction (SAC) is required. The spherical aberration correction function was used to obtain a high-resolution TEM image. In particular, it is called a Cs-corrected high-resolution TEM image. This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by Nippon Denshi Co., Ltd. This can be done.

[0149] FIG. 23(B) shows an enlarged Cs-corrected high-resolution TEM image of region (1) in FIG. 23(A). From Figure 23(B), it can be seen that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also referred to as the surface on which the film is to be formed). The surface reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0150] As shown in Figure 23(B), CAAC-OS has a characteristic atomic arrangement. The characteristic atomic arrangement is shown by auxiliary lines in Figure 23(B) and Figure 23(C). Therefore, the size of each pellet can be 1 nm or more, or 3 nm or more. It can be seen that the size of the gap caused by the tilt between the plate and the pellet is about 0.8 nm. Therefore, the pellets can also be called nanocrystals (nc). In addition, CAAC-OS is also available as a C-Axis Aligned nanocry The oxide semiconductor may also be referred to as an oxide semiconductor having stals.

[0151] Here, based on the Cs-corrected high-resolution TEM image, the pellet of CAAC-OS on the substrate 5120 was The layout of the 5100 is shown diagrammatically as a stacked brick or block structure. (See FIG. 23(D)). The inclination between the pellets observed in FIG. 23(C) The location where the crack occurs corresponds to the area 5161 shown in FIG. 23(D).

[0152] In addition, Fig. 24(A) shows the Cs of the plane of the CAAC-OS observed from a direction approximately perpendicular to the sample surface. Corrected high-resolution TEM images are shown for regions (1), (2), and (3) in Figure 24(A). Enlarged Cs-corrected high-resolution TEM images are shown in Fig. 24(B), Fig. 24(C), and Fig. 24(D), respectively. 24(D). From Fig. 24(B), Fig. 24(C) and Fig. 24(D), the pellet It can be seen that the metal atoms are arranged in a triangular, square, or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms between different pellets.

[0153] Next, the CA analyzed by X-ray diffraction (XRD) We will explain AC-OS. For example, CAAC-OS with InGaZnO4 crystals When structural analysis is performed using the out-of-plane method, the results are as shown in Figure 25(A). A peak may appear at a diffraction angle (2θ) of around 31°. Since the crystal orientation of CAAC-OS is attributed to the (009) plane of nO4, the crystal orientation of CAAC-OS is considered to be c-axis oriented. It can be seen that the c-axis is oriented in a direction substantially perpendicular to the surface on which the film is formed or the upper surface.

[0154] In addition, in the structural analysis of CAAC-OS using the out-of-plane method, 2θ is 31° In addition to the peaks around 2θ around 36°, a peak may also appear. The peaks around the center of the crystal grains indicate that some of the CAAC-OS grains do not have a c-axis orientation. The more preferable CAAC-OS is the structure solution by the out-of-plane method. In the analysis, a peak is observed at 2θ of approximately 31°, but no peak is observed at 2θ of approximately 36°.

[0155] On the other hand, in-plan X-ray irradiation is performed on the CAAC-OS in a direction approximately perpendicular to the c-axis. When structural analysis is performed using the e method, a peak appears at 2θ around 56°. This peak is due to In It is attributed to the (110) plane of the GaZnO4 crystal. In the case of CAAC-OS, 2θ is set to 56 The sample was fixed at approximately 100°, and the analysis was performed while rotating the sample around the normal vector of the sample surface (φ axis). Even if a φ scan is performed, no clear peak appears as shown in Figure 25(B). However, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ is When scanning is performed, the peaks attributable to the crystal plane equivalent to the (110) plane are as shown in Figure 25(C). Therefore, from the structural analysis using XRD, it is clear that CAAC-OS has the following structure: It can be seen that the orientation of the a-axis and b-axis is irregular.

[0156] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with nO4 crystals, a probe diameter of 300 nm was placed parallel to the sample surface. When an electron beam is incident, a diffraction pattern (selected area transmission electron diffraction) like that shown in Figure 26(A) is generated. This diffraction pattern may show the InGaZnO4 This includes spots due to the (009) plane of the crystal. Therefore, electron diffraction also reveals The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis is approximately on the surface to be formed or on the upper surface. On the other hand, for the same sample, the probe is oriented perpendicular to the sample surface. The diffraction pattern when an electron beam with a diameter of 300 nm was incident is shown in Figure 26(B). (B) shows a ring-shaped diffraction pattern. Therefore, electron diffraction also reveals It is clear that the a-axis and b-axis of the pellets contained in the CAAC-OS do not have any orientation. The first ring in FIG. 26(B) is the (010) plane of the InGaZnO4 crystal. The second ring in Figure 26(B) is thought to be due to the (100) plane. This is thought to be due to the (110) plane.

[0157] As described above, the CAAC-OS is an oxide semiconductor with high crystallinity. Crystallinity can be reduced by the inclusion of impurities or the formation of defects, so we take the opposite view. CAAC-OS can be considered an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0158] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, oxygen is more likely to be present than metal elements such as silicon that make up oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, thereby changing the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, and niobium Carbon dioxide and other compounds have a large atomic radius (or molecular radius), so they can easily arrange the atoms of oxide semiconductors. This causes disorder and reduces crystallinity.

[0159] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in an oxide semiconductor can act as carrier traps or In addition, oxygen vacancies in oxide semiconductors can become carrier traps. In some cases, they act as carrier generation sources by capturing hydrogen.

[0160] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. Specifically, 8 × 10 11 pieces / cm 3 Less than 1 x 10 11 pieces / cm 3 less than , and more preferably 1 × 10 10 pieces / cm 3 Less than 1 x 10 -9 pieces / cm 3 The above Such an oxide semiconductor can be obtained by using a high-purity pure oxide semiconductor. CAAC-OS is a highly pure or substantially highly pure intrinsic oxide semiconductor. In other words, it can be said that the oxide semiconductor has stable characteristics.

[0161] <nc-os> Next, we will explain nc-OS.

[0162] In the high-resolution TEM image, nc-OS is divided into two regions: one where crystals can be clearly seen and the other where crystals can be clearly seen. The nc-OS has regions where no crystalline parts can be confirmed. The size is often between 1 nm and 10 nm, or between 1 nm and 3 nm. The oxide semiconductor with a crystal size of 10 nm or more and 100 nm or less is called a microcrystalline oxide. For example, in high-resolution TEM images, the grain boundaries of nc-OS are It may not be possible to clearly identify the nanocrystals. Therefore, the crystalline part of nc-OS is referred to as the pellet below. There may be cases where this happens.

[0163] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 3 nm). The atomic arrangement is periodic in the region of less than 100 nm. There is no regularity in the crystal orientation between the dots. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be distinguished from a-like OS or amorphous oxide semiconductor. For example, for nc-OS, there are cases where it is difficult to distinguish between X particles with a diameter larger than that of the pellet. When using X-rays, peaks indicating crystal planes are not detected in the out-of-plane analysis. In addition, for nc-OS, a probe diameter larger than the pellet (for example, 50n When electron diffraction is performed using an electron beam (over 1000 nm), a diffraction pattern resembling a halo pattern is observed. On the other hand, for nc-OS, the size of the pellet is close to or smaller than the pellet. When nanobeam electron diffraction is performed using an electron beam with a diameter of n, spots are observed. When nanobeam electron diffraction is performed on c-OS, a circular (ring-shaped) bright spot appears. In some cases, a ring-shaped area is observed. In addition, multiple spots are observed within the ring-shaped area. There are cases where this happens.

[0164] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, and therefore, nc- OS with RANC (Random Aligned nanocrystals) oxide semiconductors, or NANCs (Non-Aligned Nanocrystals) ) can also be referred to as an oxide semiconductor.

[0165] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. nc-OS has a lower defect state density than a-like OS and amorphous oxide semiconductors. However, there is no regularity in the crystal orientation between different pellets in nc-OS. , the nc-OS has a higher density of defect states than the CAAC-OS.

[0166] <a-like OS> The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. It is a conductor.

[0167] In a-like OS, pores may be observed in high-resolution TEM images. In the high-resolution TEM image, there are areas where crystals can be clearly seen and areas where crystals cannot be seen. and areas where it is not possible to

[0168] Because of the porosity, the a-like OS has an unstable structure. To demonstrate that the OS has an unstable structure compared with CAAC-OS and nc-OS. , showing the structural changes caused by electron irradiation.

[0169] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS ( Prepare CAAC-OS (referred to as sample B) and CAAC-OS (referred to as sample C). The sample is also an In-Ga-Zn oxide.

[0170] First, high-resolution cross-sectional TEM images of each sample are acquired. It can be seen that all of the samples have crystalline parts.

[0171] The determination of which part is to be regarded as one crystal part can be made as follows. For example, The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, including six layers, stacked in layers in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The area where the spacing is 0.28 nm or more and 0.30 nm or less is considered to be the crystal part of InGaZnO4. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0172] Figure 27 shows an example of investigating the average size of the crystal parts (22 to 45 locations) of each sample. However, the length of the lattice fringes mentioned above is the size of the crystal part. It can be seen that the crystalline part of eOS grows in size according to the cumulative amount of electron irradiation. As shown in Figure 27 (1), the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus) was sized at 4.2 × 10 8 e - / nm 2 On the other hand, in the nc-OS, the size of the crystals grows to about 2.6 nm. For CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in 27, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are approximately 1.4 nm and 2.1 nm, respectively. You will realize something.

[0173] In this way, the growth of crystalline parts can be observed in a-like OS due to electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals due to electron irradiation is almost nonexistent. In other words, a-like OS is not as good as nc-OS and CAAC-O. It can be seen that the structure is unstable compared to S.

[0174] In addition, due to its porosity, a-like OS is more flexible than nc-OS and CAAC-OS. Specifically, the density of a-like OS is lower than that of a single crystal with the same composition. The density of nc-OS and CAAC is 78.6% or more and less than 92.3% of that of the original. The density of the -OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form an oxide semiconductor film having a density of less than 78% of that of the oxide semiconductor film.

[0175] For example, in an oxide semiconductor with an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, , the density of a-like OS is 5.0 g / cm 3 More than 5.9g / cm 3 It is less than For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of nc-OS and that of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0176] In some cases, single crystals with the same composition do not exist. In such cases, crystals with different compositions at any ratio are used. By combining single crystals, the density equivalent to a single crystal of the desired composition is estimated. The density corresponding to a single crystal of a desired composition can be obtained by combining single crystals of different compositions. The density should be as low as possible. It is preferable to estimate by combining different types of single crystals.

[0177] As described above, oxide semiconductors have a variety of structures, each of which has a variety of properties. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, an nc-OS, A laminated film containing two or more CAAC-OS materials may also be used.

[0178] (Embodiment 3) In this embodiment, a semiconductor device including a transistor according to one embodiment of the present invention will be described. An example of the circuit will be described.

[0179] <CMOSインバータ> The circuit diagram shown in FIG. 28(A) includes a p-channel transistor 2200 and an n-channel transistor 2201. Transistor 2100 is connected in series and each gate is connected, so-called CMO The configuration of the S inverter is shown.

[0180] <Semiconductor device structure 1> 29 is a cross-sectional view of the semiconductor device corresponding to FIG. 28(A). The transistor 2200 includes a transistor 2100. The transistor 2100 is disposed above the transistor 2200. Therefore, the transistors described in the above embodiments can be used. For the transistor 2100, please refer to the above description of the transistor as appropriate. This can be done.

[0181] A transistor 2200 shown in FIG. 29 is a transistor using a semiconductor substrate 450. The transistor 2200 includes a region 472 a in the semiconductor substrate 450 and a region 472 b in the semiconductor substrate 450. It has a region 472b, an insulator 462, and a conductor 454.

[0182] In transistor 2200, regions 472a and 472b are source and The insulator 462 functions as a gate insulator. The conductor 454 also functions as a gate electrode. The resistance of the channel forming region can be controlled by applying a potential to the body 454. That is, the potential applied to the conductor 454 causes a conduction line between the region 472a and the region 472b. The non-conduction can be controlled.

[0183] The semiconductor substrate 450 may be, for example, a single semiconductor substrate such as silicon or germanium, or or silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide A semiconductor substrate such as gallium oxide may be used. A single crystal silicon substrate is used.

[0184] The semiconductor substrate 450 is a semiconductor substrate containing impurities that impart n-type conductivity. The semiconductor substrate 450 is a semiconductor substrate containing impurities that impart p-type conductivity. In this case, the region that will become the transistor 2200 is given n-type conductivity. Alternatively, even if the semiconductor substrate 450 is an i-type, It's okay.

[0185] The upper surface of the semiconductor substrate 450 preferably has a (110) surface. The ON characteristics of the transistor 2200 can be improved.

[0186] Regions 472a and 472b are regions containing impurities that impart p-type conductivity. In this way, transistor 2200 constitutes a p-channel transistor.

[0187] Note that transistor 2200 is separated from adjacent transistors by regions 460 and the like. The region 460 is an insulating region.

[0188] The semiconductor device shown in FIG. 29 includes an insulator 464, an insulator 466, an insulator 468, and a conductor 480a, conductor 480b, conductor 480c, conductor 478a, and conductor 478b , conductor 478c, conductor 476a, conductor 476b, conductor 474a, and conductor Conductor 474b, conductor 474c, conductor 496a, conductor 496b, and conductor 496 c, conductor 496d, conductor 498a, conductor 498b, conductor 498c, and insulator Insulator 489, insulator 490, insulator 492, insulator 493, insulator 494, and and an edge 495.

[0189] The insulator 464 is disposed on the transistor 2200. The insulator 466 is disposed on the insulator 464. 64. Insulator 468 is disposed on insulator 466. Insulator 468 is disposed on insulator 466. 89 is disposed on the insulator 468. Also, the transistor 2100 is disposed on the insulator 489. The insulator 493 is disposed on the transistor 2100. 94 is disposed on the insulator 493 .

[0190] The insulator 464 has an opening that reaches the region 472a, an opening that reaches the region 472b, and a conductive The openings have openings that reach the conductor 454. The openings also have conductors 480a, 480b, and 480c, respectively. The conductive material 480b or the conductive material 480c is embedded therein.

[0191] In addition, the insulator 466 has an opening that reaches the conductor 480a and an opening that reaches the conductor 480b. The openings each have a portion that is in contact with the conductor 480c, and an opening that reaches the conductor 480c. 478a, conductor 478b or conductor 478c is embedded therein.

[0192] In addition, the insulator 468 has an opening that reaches the conductor 478b and an opening that reaches the conductor 478c. The openings are filled with a conductor 476a or a conductor 476b. It's embedded.

[0193] The insulator 489 has an opening overlapping with a channel formation region of the transistor 2100 and a conductive The opening reaches the conductor 476a and the opening reaches the conductor 476b. The mouths are embedded with conductors 474a, 474b, and 474c, respectively. are.

[0194] The conductor 474a may function as the gate electrode of the transistor 2100. Alternatively, for example, applying a constant potential to the conductor 474a can turn on the transistor 210. The electrical properties, such as the threshold voltage of 0, may be controlled. a and the conductor 504 that functions as the gate electrode of the transistor 2100 are electrically connected to each other. This can increase the on-state current of the transistor 2100. In addition, since the punch-through phenomenon can be suppressed, the transistor 210 The electrical characteristics in the saturated region of 0 can be stabilized. Since this corresponds to the conductor 160 in the embodiment, please refer to the description of the conductor 160 for details. It is possible.

[0195] The insulator 490 has an opening that reaches the conductor 474b. Since this corresponds to the insulator 120 in the above embodiment, please refer to the description of the insulator 120 for details. You can pour drinks.

[0196] Also, the insulator 495 is a region that is either the source or drain of the transistor 2100. 507b to the opening to the conductor 474b and the source of the transistor 2100. An opening extending to the other of the gate and drain regions 507a and 507b of the transistor 2100 is provided. The opening reaches the conductor 504, which is the electrode, and the opening reaches the conductor 474c. The insulator 495 corresponds to the insulator 150 in the above embodiment, and therefore will not be described in detail. The description of the insulator 150 can be taken into consideration.

[0197] Also, the insulator 493 is a region that is either the source or the drain of the transistor 2100. 507b to the opening to the conductor 474b and the source of the transistor 2100. An opening extending to the other of the gate and drain regions 507a and 507b of the transistor 2100 is provided. The opening reaches the conductor 504, which is the electrode, and the opening reaches the conductor 474c. In addition, the openings are provided with a conductor 496a, a conductor 496b, a conductor 496c, or However, each opening is further filled with a conductor 496d. This may be through an opening in one of the components, such as the heater 2100.

[0198] The insulator 494 also has an opening that reaches the conductor 496a and an opening that reaches the conductor 496b and the conductor The opening reaches the conductor 496d, and the opening reaches the conductor 496c. The conductive material 498a, the conductive material 498b, and the conductive material 498c are embedded in the respective conductive materials. do.

[0199] Insulator 464, Insulator 466, Insulator 468, Insulator 489, Insulator 493 and Insulator Examples of 494 include boron, carbon, nitrogen, oxygen, fluorine, magnesium, and aluminum. Umium, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zinc Insulators containing lanthanum, neodymium, hafnium or tantalum are used in single or double layers. Alternatively, they may be used in layers.

[0200] Insulator 464, Insulator 466, Insulator 468, Insulator 489, Insulator 493 or Insulator At least one of the components of 494 has an insulator that blocks impurities such as hydrogen and oxygen. It is preferable to add impurities such as hydrogen and oxygen to the vicinity of the transistor 2100. By disposing an insulator having a locking function, the electrical characteristics of the transistor 2100 are improved. It can stabilize gender.

[0201] Examples of insulators that have the function of blocking impurities such as hydrogen and oxygen include boron. element, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, Argon, Gallium, Germanium, Yttrium, Zirconium, Lanthanum, Neodymium Insulators containing hafnium or tantalum may be used in single or multilayer configurations.

[0202] Conductor 480a, conductor 480b, conductor 480c, conductor 478a, conductor 478b, Conductor 478c, conductor 476a, conductor 476b, conductor 474a, conductor 474b, Conductor 474c, conductor 496a, conductor 496b, conductor 496c, conductor 496d, The conductors 498a, 498b, and 498c may include, for example, boron, nitrogen, and the like. , oxygen, fluorine, silicon, phosphorus, aluminum, titanium, chromium, manganese, cobalt , nickel, copper, zinc, gallium, yttrium, zirconium, molybdenum, ruthenium A conductor containing one or more of aluminum, silver, indium, tin, tantalum and tungsten is formed in a single layer. For example, it may be an alloy or a compound, and aluminum may be used. Conductors containing copper and titanium, Conductors containing copper and manganese, Indium Alternatively, a conductor containing tin and oxygen, a conductor containing titanium and nitrogen, or the like may be used.

[0203] The semiconductor device shown in FIG. 30 is the same as the transistor 2200 of the semiconductor device shown in FIG. The only difference is the structure. Therefore, the semiconductor device shown in FIG. Please refer to the description of the semiconductor device. Specifically, the semiconductor device shown in FIG. The transistor 2200 is a Fin type. This increases the effective channel width, improving the on-state characteristics of the transistor 2200. In addition, the contribution of the electric field of the gate electrode can be increased, The off characteristics of the transistor 2200 can be improved.

[0204] 31 is a circuit diagram of the semiconductor device shown in FIG. 29. The only difference is the structure. Therefore, the semiconductor device shown in FIG. Please refer to the description of the semiconductor device. Specifically, the semiconductor device shown in FIG. 31 shows a case where the semiconductor device 200 is provided on a semiconductor substrate 450 which is an SOI substrate. 1 shows a structure in which region 456 is separated from semiconductor substrate 450 by insulator 452. By using an SOI substrate as the conductor substrate 450, punch-through phenomena and the like can be suppressed. Therefore, the off-state characteristics of the transistor 2200 can be improved. The insulator 452 can be formed by insulating the semiconductor substrate 450. For example, the insulator 452 can be silicon oxide.

[0205] The semiconductor device shown in FIGS. 29 to 31 is a semiconductor substrate in which a p-channel transistor is formed. The area occupied by the element is reduced by fabricating an n-channel transistor above it. That is, the degree of integration of the semiconductor device can be increased. A p-channel transistor and a p-channel transistor were fabricated using the same semiconductor substrate. Compared to the conventional method, the process can be simplified, thereby increasing the productivity of semiconductor devices. In addition, the yield of the semiconductor device can be increased. The transistor is placed in the LDD (Lightly Doped Drain) region, shallow trench In some cases, complex processes such as slit structures and distortion design can be omitted. Compared to manufacturing transistors using semiconductor substrates, productivity and yield can be improved. It may be possible to reduce the

[0206] <CMOSアナログスイッチ> The circuit diagram shown in FIG. 28B is that of the transistor 2100 and the transistor 2200. The figure shows a configuration in which the source and drain of each transistor are connected. It can function as a so-called CMOS analog switch.

[0207] <Storage device 1> A transistor according to one embodiment of the present invention is used to retain stored contents even when power is not supplied. An example of a semiconductor device (memory device) that can be stored and has no limit on the number of times it can be written is shown in FIG. Shown below.

[0208] The semiconductor device shown in FIG. 32A includes a transistor 3200 using a first semiconductor and a second The semiconductor device includes a transistor 3300 and a capacitor 3400. The transistor 3300 is the same as the transistor 2100 described above. It is possible.

[0209] The transistor 3300 preferably has a low off-state current. For example, a transistor including an oxide semiconductor can be used as the transistor 00. The small off-state current of the capacitor 3300 allows for long-term recording at a specific node of the semiconductor device. It is possible to retain the memory contents, i.e., no refresh operation is required, or This allows the frequency of refresh operations to be reduced significantly, resulting in low power consumption semiconductors. It becomes a body device.

[0210] In FIG. 32A, a first wiring 3001 is electrically connected to the source of a transistor 3200. The second wiring 3002 is electrically connected to the drain of the transistor 3200. The third wiring 3003 is electrically connected to one of the source and drain of the transistor 3300. The fourth wiring 3004 is electrically connected to the gate of the transistor 3300. The gate of the transistor 3200 and the source of the transistor 3300 are connected to each other. The other of the drains is electrically connected to one of the electrodes of the capacitor 3400 and is connected to the fifth wiring 30 05 is electrically connected to the other electrode of the capacitor 3400 .

[0211] The semiconductor device shown in FIG. 32A can hold the potential of the gate of the transistor 3200. This property makes it possible to write, store, and read information, as shown below. do.

[0212] Writing and holding of data will be described. First, the potential of the fourth wiring 3004 is changed by a transistor. The transistor 3300 is set to a potential at which it becomes conductive, thereby making the transistor 3300 conductive. As a result, the potential of the third wiring 3003 is applied to the gate of the transistor 3200 and the capacitor The voltage is applied to a node FG electrically connected to one of the electrodes of the capacitor 3400. A predetermined charge is applied to the gate of the register 3200 (write). Charges that give two potential levels (hereinafter referred to as low-level charge and high-level charge) Then, the potential of the fourth wiring 3004 is applied to the transistor. The transistor 3300 is set to a potential at which it is in a non-conductive state, thereby making the transistor 3300 in a non-conductive state. As a result, the charge is held at the node FG (retention).

[0213] Since the off-state current of the transistor 3300 is small, the charge of the node FG is retained for a long time. It will be held.

[0214] Next, the reading of information will be described. A predetermined potential (constant potential) is applied to the first wiring 3001. When an appropriate potential (read potential) is applied to the fifth wiring 3005 in this state, the second wiring 3002 takes a potential according to the amount of charge held in the node FG. If 3200 is an n-channel type, a high level charge is applied to the gate of transistor 3200. The apparent threshold voltage V th_H is the transistor 3200 Apparent threshold voltage V when a low-level charge is applied to the gate th_L Yo Here, the apparent threshold voltage is the voltage at which the transistor 3200 is This refers to the potential of the fifth wiring 3005 required to make it "conductive." The potential of the fifth wiring 3005 is V th_H and V th_L By setting the potential V0 between For example, in a write operation, the charge applied to node FG can be determined. When a high level charge is applied to the fifth wiring 3005, the potential of the fifth wiring 3005 becomes V0 (> V th_H ), transistor 3200 is in a "conducting state." Meanwhile, node FG When a low level charge is applied to the fifth wiring 3005, the potential of the fifth wiring 3005 becomes V0 ( <V th_L ), transistor 3200 remains in a "non-conducting state." By determining the potential of the second wiring 3002, the data stored in the node FG is read. It can be put out.

[0215] When memory cells are arranged in an array, the information of the desired memory cell is read. In a memory cell where information is not read, The potential at which the transistor 3200 is in a "non-conducting state" regardless of the applied charge, i.e. Ri, V th_H By applying a lower potential to the fifth wiring 3005, the information of the desired memory cell is Alternatively, for example, a memory cell from which information is not read can be used. In this case, the transistor 3200 is in a "conducting state" regardless of the charge applied to the node FG. The potential at which V th_L Applying a higher potential to the fifth wiring 3005 Therefore, it is only necessary to have a configuration in which only the information in the desired memory cell can be read out.

[0216] In the above, an example in which two types of charges are held in the node FG is shown. The semiconductor device according to the present invention is not limited to this. For example, It may be configured to be able to hold three or more types of charges. The semiconductor device can be made multi-valued to increase the storage capacity.

[0217] <Memory device structure 1> 33 is a cross-sectional view of the semiconductor device corresponding to FIG. 32(A). has a transistor 3200, a transistor 3300, and a capacitor 3400. The transistor 3300 and the capacitor 3400 are arranged above the transistor 3200. The transistor 3300 is arranged in the same manner as the transistor 2100 described above. The transistor 3200 may be the transistor shown in FIG. Please refer to the description of transistor 2200. Note that in FIG. The case where the transistor 3200 is an n-channel transistor has been described. It may also be a transistor of the NAND type.

[0218] A transistor 2200 shown in FIG. 33 is a transistor using a semiconductor substrate 450. The transistor 2200 includes a region 472 a in the semiconductor substrate 450 and a region 472 b in the semiconductor substrate 450. It has a region 472b, an insulator 462, and a conductor 454.

[0219] The semiconductor device shown in FIG. 33 includes an insulator 464, an insulator 466, an insulator 468, and a conductor 480a, conductor 480b, conductor 480c, conductor 478a, and conductor 478b , conductor 478c, conductor 476a, conductor 476b, conductor 474a, and conductor Conductor 474b, conductor 474c, conductor 496a, conductor 496b, and conductor 496 c, conductor 496d, conductor 498a, conductor 498b, conductor 498c, and insulator Insulator 489, insulator 490, insulator 492, insulator 493, insulator 494, and and an edge 495.

[0220] The insulator 464 is disposed on the transistor 3200. The insulator 466 is disposed on the insulator 4 64. Insulator 468 is disposed on insulator 466. Insulator 468 is disposed on insulator 466. 89 is disposed on the insulator 468. Also, the transistor 2100 is disposed on the insulator 489. The insulator 493 is disposed on the transistor 2100. 94 is disposed on the insulator 493 .

[0221] The insulator 464 has an opening that reaches the region 472a, an opening that reaches the region 472b, and a conductive The openings have openings that reach the conductor 454. The openings also have conductors 480a, 480b, and 480c, respectively. The conductive material 480b or the conductive material 480c is embedded therein.

[0222] In addition, the insulator 466 has an opening that reaches the conductor 480a and an opening that reaches the conductor 480b. The openings each have a portion that is in contact with the conductor 480c, and an opening that reaches the conductor 480c. 478a, conductor 478b or conductor 478c is embedded therein.

[0223] In addition, the insulator 468 has an opening that reaches the conductor 478b and an opening that reaches the conductor 478c. The openings are filled with a conductor 476a or a conductor 476b. It's embedded.

[0224] The insulator 489 has an opening overlapping the channel formation region of the transistor 3300 and a conductive The opening reaches the conductor 476a and the opening reaches the conductor 476b. The mouths are embedded with conductors 474a, 474b, and 474c, respectively. are.

[0225] The conductor 474a may function as a bottom gate electrode of the transistor 3300. Alternatively, for example, applying a constant potential to the conductor 474a can turn on the transistor It is also possible to control electrical properties such as the threshold voltage of 3300. 474a and the conductor 504 which is the top gate electrode of the transistor 3300 are electrically connected. This can increase the on-state current of the transistor 3300. In addition, punch-through phenomenon can be suppressed, so the transistor 3300 This makes it possible to stabilize the electrical characteristics in the saturated region.

[0226] Insulator 490 also has an opening that reaches conductor 474b and an opening that reaches conductor 474c. The insulator 490 corresponds to the insulator 120 in the above embodiment, and therefore For details, please refer to the description of the insulator 120.

[0227] Also, the insulator 495 is a region that is either the source or drain of the transistor 3300. 507b to the opening to the conductor 474b and the source of the transistor 3300. The other of the drain regions 507a and 507b is connected to a conductor 514 that overlaps the drain region 507a via an insulator 511. and an opening reaching the conductor 504, which is the gate electrode of the transistor 3300. , through the region 507a, which is the other of the source or drain of the transistor 3300, The insulator 495 has an opening that reaches the insulator 474c. Since this corresponds to the insulator 150, the description of the insulator 150 can be referred to for details.

[0228] Also, the insulator 493 is a region that is either the source or the drain of the transistor 3300. 507b to the opening to the conductor 474b and the source of the transistor 3300. The other of the drain regions 507a and 507b is connected to a conductor 514 that overlaps the drain region 507a via an insulator 511. and an opening reaching the conductor 504, which is the gate electrode of the transistor 3300. , through the region 507a, which is the other of the source or drain of the transistor 3300, The openings each have an opening that reaches the conductor 496a. , conductor 496b, conductor 496c, or conductor 496d is embedded. Each opening may further include an opening of any of the components, such as the transistor 3300. It may be through the mouth.

[0229] The insulator 494 also has an opening that reaches the conductor 496a and an opening that reaches the conductor 496b. The openings each have a portion that is in contact with the conductor 496c, and an opening that reaches the conductor 496c. 498a, conductor 498b or conductor 498c is embedded therein.

[0230] Insulator 464, Insulator 466, Insulator 468, Insulator 489, Insulator 493 or Insulator At least one of the components of 494 has an insulator that blocks impurities such as hydrogen and oxygen. It is preferable to add impurities such as hydrogen and oxygen to the vicinity of the transistor 3300. By disposing an insulator having a locking function, the electrical characteristics of the transistor 3300 are It can stabilize gender.

[0231] The source or drain of transistor 3200 is connected to the conductor 480b, the conductor 478b , the conductor 476a, the conductor 474b, and the conductor 496c, and is electrically connected to the region 507b which is one of the source or drain of transistor 33 00. Also, the conductor 454 which is the gate electrode of transistor 3200 is connected to the conductor 480c, the conductor 478 c, the conductor 476b, the conductor 474c, and the conductor 496d, and is electrically connected to the region 507a which is the other of the source or drain of transistor 3300.

[0232] The capacitor element 3400 has the region 5<00...​​​​​​​​​​​​​​​​​​​​​​​​​ The case where the transistor 2200 is a p-channel transistor has been described. The transistor 3200 may be an n-channel transistor.

[0235] 35 is a circuit diagram of the semiconductor device shown in FIG. 33. The only difference is the structure. Therefore, the semiconductor device shown in FIG. Please refer to the description of the semiconductor device. Specifically, the semiconductor device shown in FIG. 200 is provided on a semiconductor substrate 450, which is an SOI substrate. The transistor 3200 provided on the semiconductor substrate 450 is Please refer to the description of the transistor 2200. Note that in FIG. The case where the transistor 3200 is an n-channel transistor has been described. It may also be a transistor of the NAND type.

[0236] <Storage device 2> The semiconductor device shown in FIG. 32B differs from the semiconductor device shown in FIG. 32A in that it does not include the transistor 3200. In this case, the operation is the same as that of the semiconductor device shown in FIG. This makes it possible to write and retain information.

[0237] The reading of data from the semiconductor device shown in FIG. When the capacitor 3300 is brought into a conductive state, the third wiring 3003 and the capacitor element 3400, which are in a floating state, The third wiring 3003 and the capacitor 3400 are electrically connected to each other, and charge is redistributed between the third wiring 3003 and the capacitor 3400. As a result, the potential of the third wiring 3003 changes. The amount of change in the potential of the third wiring 3003 is determined by the capacitance The potential of one of the electrodes of the element 3400 (or the charge stored in the capacitor element 3400) , take different values.

[0238] For example, the potential of one electrode of the capacitor 3400 is V, the capacitance of the capacitor 3400 is C, and the third The capacitance component of the third wiring 3003 before the charge is redistributed is CB. If the potential is VB0, the potential of the third wiring 3003 after the charge is redistributed is (CB× Therefore, the state of the memory cell is If the potential of one of the 3400 electrodes takes two states, V1 and V0 (V1>V0), then: The potential of the third wiring 3003 when the potential V1 is maintained (=(CB×VB0+CV1) / (CB+C)) is the potential (=(C It can be seen that this is higher than B×VB0+CV0) / (CB+C)).

[0239] Then, the potential of the third wiring 3003 is compared with a predetermined potential, thereby reading out information. can be done.

[0240] In this case, the transistor to which the first semiconductor is applied is used in a drive circuit for driving the memory cell. A transistor to which a second semiconductor is applied is used as the transistor 3300. The structure may be such that the electrodes are stacked on the drive circuit.

[0241] The semiconductor device described above uses a transistor including an oxide semiconductor and having low off-state current. By doing so, it is possible to retain the memory contents for a long period of time. This eliminates the need for refresh operations or makes it possible to reduce the frequency of refresh operations significantly. Therefore, a semiconductor device with low power consumption can be realized. Even if the potential is fixed, it is possible to store the data for a long period of time. It is possible to maintain the volume.

[0242] Furthermore, since the semiconductor device does not require a high voltage to write information, deterioration of the elements does not occur. For example, unlike conventional nonvolatile memory, injection of electrons into the floating gate Since electrons are not introduced or extracted from the floating gate, there is no risk of insulator degradation. That is, the semiconductor device according to one embodiment of the present invention does not have the same problem as a conventional nonvolatile memory. There is no limit to the number of times that data can be rewritten, which is a problem, and the reliability of this semiconductor device has been dramatically improved. Furthermore, information is written depending on whether the transistor is conductive or non-conductive. This allows for high-speed operation.

[0243] <Storage device 3> Regarding a modification of the semiconductor device (memory device) shown in FIG. 32(A), a circuit diagram shown in FIG. and explain.

[0244] The semiconductor device illustrated in FIG. 36 includes transistors 4100 to 4400 and a capacitor. The transistor 4100 includes a capacitor 4500 and a capacitor 4600. A transistor similar to the transistor 3200 can be used, and the transistor 4200 The transistors 1 to 4400 can be the same as the transistor 3300 described above. Although not shown in FIG. 36, the semiconductor device shown in FIG. 36 is a multi-layer semiconductor device in a matrix. The semiconductor device shown in FIG. 36 includes wiring 4001, wiring 4003, wiring 4005, and wiring 4006. 4009 to 4009, the writing and reading of the data voltage is controlled according to the signal or potential applied to the It is possible.

[0245] One of the source and the drain of the transistor 4100 is connected to a wiring 4003. The other of the source and the drain of the transistor 4100 is connected to the wiring 4001. 6, the conductivity type of the transistor 4100 is shown as a p-channel type, but it can also be an n-channel type. good.

[0246] The semiconductor device shown in FIG. 36 has two data holding units. For example, the first data holding unit is , one of the source and drain of the transistor 4400 connected to the node FG1, Between one electrode of the transistor 4600 and one of the source or drain of the transistor 4200 The second data storage unit stores a charge. The gate of transistor 4100, the other of the source or drain of transistor 4200, A charge is stored between one of the source or drain of the capacitor 300 and one electrode of the capacitor element 4500. Hold.

[0247] The other of the source and the drain of the transistor 4300 is connected to a wiring 4003. The other of the source and the drain of the transistor 4400 is connected to a wiring 4001. The gate of the transistor 4400 is connected to the wiring 4005. The gate of the transistor 4200 is The gate of the transistor 4300 is connected to a wiring 4007. The other electrode of the capacitor 4600 is connected to the wiring 4008. The other electrode is connected to a wiring 4009 .

[0248] The transistors 4200 to 4400 are transistors that control writing of data voltages and retention of charges. Note that the transistors 4200 to 4400 are in a non-conducting state. In this case, a transistor with a low current (off-state current) that flows between the source and drain is used. As a transistor with a low off-state current, it is preferable to use a transistor having an oxidized layer in the channel formation region. Preferably, the transistor is an OS transistor. The transistor has advantages such as low off-state current and the ability to be stacked with a silicon-containing transistor. In FIG. 36, the conductivity types of the transistors 4200 to 4400 are n-channel. However, it may be a p-channel type.

[0249] The transistors 4200, 4300, and 4400 are made of oxide. Even if a transistor is made of a semiconductor, it is preferable to provide it in a separate layer. The semiconductor device shown in FIG. 36 includes a first layer 40 having a transistor 4100. 21, a second layer 4022 having transistor 4200 and transistor 4300, and a third layer 4023 having a transistor 4400. By stacking layers having transistors, the circuit area can be reduced, and the semiconductor device This allows for the device to be made smaller.

[0250] Next, the operation of writing information into the semiconductor device shown in FIG. 36 will be described.

[0251] First, a data voltage write operation (hereinafter, ) will be described below. The data voltage written to the data storage unit is V D1 and the threshold voltage of the transistor 4100 is The voltage is Vth.

[0252] In write operation 1, the wiring 4003 is connected to V D1 Then, after setting the wiring 4001 to the ground potential, The wirings 4005 and 4006 are set to a high level. 007 to 4009 are set to low level. Then, the node FG2 in an electrically floating state The potential of the wiring 40 increases, and a current flows through the transistor 4100. The potential of the transistor 4400 and the transistor 4200 are turned on. Therefore, as the potential of the wiring 4001 increases, the potentials of the nodes FG1 and FG2 also increase. The potential of the node FG2 rises, and a potential difference between the gate and source of the transistor 4100 is When the voltage (Vgs) reaches the threshold voltage Vth of the transistor 4100, the transistor 410 Therefore, the potential of the wiring 4001 and the nodes FG1 and FG2 is The rise stopped, and V D1 Vth has dropped from D1 -Vth" and becomes constant.

[0253] In other words, the V given to wire 4003 D1 When a current flows through the transistor 4100, The potential is applied to the wiring 4001, and the potentials of the nodes FG1 and FG2 increase. , the potential of node FG2 is "V D1 -Vth", the Vgs of transistor 4100 is Vth is reached, and the current stops.

[0254] Next, the data voltage is written to the data storage unit connected to the node FG2 (hereinafter, the write This is called write operation 2. The data voltage written to the part is V D2 It will be explained as follows.

[0255] In write operation 2, wire 4001 is connected to V D2 Then, after setting the wiring 4003 to the ground potential, The wiring 4007 is set to a high level. 4006, 4008, and 4009 are set to low level. Transistor 4300 is set to the conductive state. Therefore, the potential of the node FG2 is also set to low. The voltage of the wiring 4003 decreases as the voltage of the wiring 4003 decreases. The potential of the wiring 4003 increases. As the potential at node FG2 rises, the potential at node FG2 also rises. When Vgs of transistor 4100 becomes Vth of transistor 4100, The current flowing through 100 becomes smaller. Therefore, the potential of wiring 4003 and FG2 does not stop rising. Ri, V D2 Vth has dropped from D2 -Vth" and becomes constant.

[0256] In other words, the V given to wire 4001 D2 When a current flows through the transistor 4100, The potential of the node FG2 is increased by the increase in the potential. The potential of FG2 is "V D2 -Vth", Vgs of transistor 4100 is Vth. At this time, the potential of the node FG1 is 400 are in a non-conductive state, and the "V D1 -Vth" is maintained can be.

[0257] In the semiconductor device shown in FIG. 36, after writing data voltages to a plurality of data holding units, 4009 is set to high level, and the potentials of the nodes FG1 and FG2 are raised. The transistor is made non-conductive, preventing the movement of charge and maintaining the written data voltage. .

[0258] By the above-described operation of writing data voltages to the nodes FG1 and FG2, multiple data The data voltage can be held in the data holding section. D 1-Vth" and "V D2 -Vth" was used as an example, but these are multi-value data. Therefore, each data storage unit stores 4 bits of data. When holding 16 values ​​of "V D1 -Vth" and "V D2 -Vth" can be used.

[0259] Next, the operation of reading information from the semiconductor device shown in FIG. 36 will be described.

[0260] First, the data voltage is read from the data storage unit connected to the node FG2 (hereinafter, This will be referred to as read operation 1.

[0261] In the read operation 1, the wiring 4003 is precharged and then brought into an electrically floating state. The wirings 4005 to 4008 are set to a low level. The potential of the electrically floating node FG2 is set to "V D2 -Vth" When the potential of the node FG2 decreases, a current flows through the transistor 4100. The flow of current reduces the potential of the electrically floating wiring 4003. As the voltage Vgs of transistor 4100 decreases, the voltage Vgs of transistor 4100 decreases. When Vgs becomes Vth of the transistor 4100, the current flowing through the transistor 4100 becomes That is, the potential of the wiring 4003 becomes smaller than the potential of the node FG2 “V D2 -Vth" Vth is larger than Vth. D2 The potential of the wiring 4003 is The data voltage of the data storage section connected to G2 corresponds to the data of the analog value that is read out. The voltage of the capacitor undergoes A / D conversion and acquires data from the data storage section connected to node FG2. .

[0262] That is, the wiring 4003 after precharging is in a floating state, and the potential of the wiring 4009 is set to a high level. Switching the voltage from high to low allows current to flow through transistor 4100. As a result, the potential of the wiring 4003, which was in a floating state, drops to "V D2 ". Tran In register 4100, the "V D2 Vgs between "-Vth" is Vth The current stops. Then, the wiring 4003 is connected to the "V D2 " is read out.

[0263] After acquiring the data of the data storage section connected to node FG2, transistor 4300 is turned on. In the conductive state, the "V D2 -Vth" is discharged.

[0264] Next, the charge held at node FG1 is distributed to node FG2, and the The data voltage of the data storage unit connected to node FG1 is transferred to the data storage unit connected to node FG2. The wiring 4001 and 4003 are set to low level, and the wiring 4006 is set to high level. , the wiring 4005 and the wirings 4007 to 4009 are set to low level. is turned on, the charge of the node FG1 is shared with the node FG2.

[0265] Here, the potential after the charge distribution is the written potential "V D1 -Vth" and Therefore, the capacitance value of the capacitor 4600 is set to be larger than the capacitance value of the capacitor 4500. Alternatively, the potential "V D1 -Vth" is the same data The potential "V D2 It is preferable to set the capacitance value to be larger than "-Vth". By changing the ratio of the potential and increasing the potential to be written in advance, the potential after the charge distribution can be reduced. The fluctuation of the potential due to the distribution of the charge will be described later.

[0266] Next, the data voltage is read from the data storage unit connected to the node FG1 (hereinafter referred to as the read This is called "read-out operation 2.") will be explained below.

[0267] In the read operation 2, the wiring 4003 is precharged and then placed in an electrically floating state. The wirings 4005 to 4008 are set to a low level. It is set to high level during precharge and then to low level. By using this as a pin, the potential of the electrically floating node FG2 is raised to "V D1 -Vth" When the potential of the node FG2 decreases, a current flows through the transistor 4100. The flow of current reduces the potential of the electrically floating wiring 4003. As the voltage Vgs of transistor 4100 decreases, the voltage Vgs of transistor 4100 decreases. When Vgs becomes Vth of the transistor 4100, the current flowing through the transistor 4100 becomes That is, the potential of the wiring 4003 becomes smaller than the potential of the node FG2 “V D1 -Vth" Vth is larger than Vth. D1 The potential of the wiring 4003 is The data voltage of the data storage section connected to G1 corresponds to the data of the analog value that is read out. The voltage of the capacitor undergoes A / D conversion and acquires data from the data storage section connected to node FG1. This completes the read operation of the data voltage to the data storage unit connected to node FG1. .

[0268] That is, the wiring 4003 after precharging is in a floating state, and the potential of the wiring 4009 is set to a high level. Switching the voltage from high to low allows current to flow through transistor 4100. As a result, the potential of the wiring 4003, which was in a floating state, drops to "V D1 ". Tran In register 4100, the "V D1 Vgs between "-Vth" is Vth The current stops. Then, the wiring 4003 is connected to the "V D1 " is read out.

[0269] By the above-described operation of reading the data voltages from the nodes FG1 and FG2, a plurality of data For example, the data voltages at nodes FG1 and FG2 can be read out from the data storage unit. G2 stores 4 bits (16 values) of data, for a total of 8 bits (256 values). In FIG. 36, the first layer 4021 to the third layer The semiconductor device is configured with a layer 4023, but by forming further layers, the area of ​​the semiconductor device can be increased. This allows for an increase in storage capacity without increasing the memory size.

[0270] The potential that is read out is a voltage that is Vth higher than the written data voltage. Therefore, the "V D1 -Vth" and "V D2 - As a result, the Vth of the memory cell can be offset and read. This improves the storage capacity per memory and also brings the read data closer to the correct data. This makes it possible to improve the reliability of the data.

[0271] 37 shows a cross-sectional view of the semiconductor device corresponding to FIG. 36. The semiconductor device shown in FIG. , transistors 4100 to 4400, capacitors 4500 and 4600, 600. Here, the transistor 4100 is formed in the first layer 4021, and the transistor The transistors 4200 and 4300 and the capacitor 4500 are formed in the second layer 4022. The transistor 4400 and the capacitor 4600 are formed in the third layer 4023 .

[0272] Here, the description of the transistor 3300 is used as the transistors 4200 to 4400. The description of the transistor 3200 can be taken into consideration for the transistor 4100. The description in Figure 33 can also be taken into consideration as appropriate for other wiring, insulators, etc.

[0273] In the capacitor element 3400 of the semiconductor device shown in FIG. 33, the conductive layer is provided parallel to the substrate. However, in the capacitor elements 4500 and 4600 shown in FIG. A conductive layer is provided in a square shape to form a capacitance. A large capacitance value can be ensured even with the same occupied area.

[0274] <fpga> Another aspect of the present invention is a field programmable gate array (FPGA). It can also be applied to LSIs such as MOS Arrays.

[0275] FIG. 38(A) shows an example of a block diagram of an FPGA. The logic element 522 is composed of a switch element 521 and a logic element 522. The clock element 522 stores the configuration data stored in the configuration memory. Depending on the application data, the logic circuit functions as a combinational circuit or a sequential circuit. You can switch the function.

[0276] FIG. 38(B) is a schematic diagram for explaining the role of the routing switch element 521. The routing switch element 521 stores the configuration memory 52 3, the connections between the logic elements 522 are determined according to the configuration data stored in the In FIG. 38(B), one switch is shown, and the terminals IN and It shows how to switch the connection between the OUT terminals, but in reality there are multiple logic elements. A switch is provided between the components 522.

[0277] FIG. 38C shows an example of a circuit configuration that functions as the configuration memory 523. The configuration memory 523 is a transistor configured with OS transistors. The transistor M11 is composed of a Si transistor, and the transistor M12 is composed of a Si transistor. Node FN SW The configuration data D S W This configuration data D SW The potential of transistor M1 The configuration can be retained by making 1 non-conductive. Data D SW The potential at the terminal IN and the OUT terminal.

[0278] FIG. 38(D) is a schematic diagram for explaining the role of the logic element 522. The clock element 522 stores the configuration data stored in the configuration memory 527. Depending on the configuration data, the terminal OUT mem The potential of the The up-table 524 is connected to the terminal OUT mem The signal at the terminal IN is processed according to the potential of The logic element 522 can switch the function of the combinational circuit. A register 525, which is an introductory circuit, and a selector 526 for switching the signal at the terminal OUT are provided. The selector 526 receives a signal from a terminal O output from the configuration memory 527. UT mem Depending on the potential of You can choose between 5 signal outputs.

[0279] FIG. 38(E) shows an example of a circuit configuration that functions as the configuration memory 527. The configuration memory 527 is a transistor configured with OS transistors. The transistor M13, the transistor M14, and the transistor M1 5, and transistor M16. Node FN LE The transistor M Configuration data D through 13 LE is given. Node FNB LE for , and the configuration data DB via transistor M14 LE is given. Configuration data DB LE is the configuration data D LE The logic of This corresponds to the inverted potential. LE , configuration Sales data DB LE The potential of the transistor M13 and the transistor M14 is turned off. The configuration data D can be saved by doing the following. LE , Configuration Data DB LE The potential of transistor M15 or transistor M16 The conduction state of one side of the transistor M16 is switched, and the terminal OUT mem The potential VDD or can provide a potential VSS.

[0280] The configuration described in this embodiment can be applied to the configurations of FIGS. 38(A) to 38(E). For example, the transistors M12, M15, and M16 can be made of Si transistors. The transistors M11, M13, and M14 are It is composed of OS transistors. In this case, the wiring that connects the Si transistors on the lower layer This allows the device to be made of a low-resistance conductive material, which improves access speed and reduces power consumption. This results in a circuit with excellent power efficiency.

[0281] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments. can.

[0282] (Fourth embodiment) In this embodiment, an imaging device including a transistor according to one embodiment of the present invention will be described. An example will be described.

[0283] <Configuration of imaging device> FIG. 39A is a plan view showing an example of an imaging device 200 according to one aspect of the present invention. The device 200 includes a pixel section 210, a peripheral circuit 260 for driving the pixel section 210, and a peripheral circuit The pixel section 210 has p rows and q columns. (p and q are integers of 2 or more) are arranged in a matrix. The peripheral circuits 260, 270, 280, and 290 are each The pixel 211 is connected to the plurality of pixels 211 and has a function of supplying signals for driving the plurality of pixels 211. In this specification, the peripheral circuits 260, 270, 280, and and peripheral circuit 290 may be referred to as a "peripheral circuit" or a "drive circuit." For example, peripheral circuit 260 can be considered a part of the peripheral circuit.

[0284] The imaging device 200 preferably includes a light source 291. The light source 291 emits detection light P It can emit 1.

[0285] The peripheral circuits include at least a logic circuit, a switch, a buffer, an amplifier, or a converter. The peripheral circuits may be formed on the substrate on which the pixel portion 210 is formed. In addition, a part or all of the peripheral circuits may be made of semiconductor devices such as IC chips. , the peripheral circuits are peripheral circuit 260, peripheral circuit 270, peripheral circuit 280, and peripheral circuit 290 One or more of these may be omitted.

[0286] As shown in FIG. 39B, in the pixel section 210 of the imaging device 200, By arranging the pixels 211 at an angle, the pixel The pixel interval (pitch) in the column direction can be shortened. This can further improve the quality of the images captured.

[0287] <Pixel configuration example 1> One pixel 211 included in the imaging device 200 is composed of a plurality of sub-pixels 212, and each sub-pixel By combining a filter (color filter) that transmits light in a specific wavelength range with the pixel 212, This allows the acquisition of information for realizing color image display.

[0288] FIG. 40(A) is a plan view showing an example of a pixel 211 for acquiring a color image. The pixel 211 shown in 40(A) is provided with a color filter that transmits light in the red (R) wavelength range. The sub-pixel 212 (hereinafter also referred to as "sub-pixel 212R") transmits light in the green (G) wavelength range. A sub-pixel 212 (hereinafter also referred to as "sub-pixel 212G") is provided with a color filter that transmits light. and a sub-pixel 212 (hereinafter referred to as a sub-pixel 213) provided with a color filter that transmits light in the blue (B) wavelength range. The subpixel 212 functions as a photosensor. It can be done.

[0289] The subpixels 212 (subpixels 212R, 212G, and 212B) are connected to the wiring 23 1, electrically connected to wiring 247, wiring 248, wiring 249, and wiring 250. The pixel 212R, the sub-pixel 212G, and the sub-pixel 212B are each connected to an independent wiring 25 3. In this specification, for example, the pixel 211 in the nth row is connected to The wiring 248 and the wiring 249 are respectively denoted as wiring 248[n] and wiring 249[n]. For example, the wiring 253 connected to the pixel 211 in the mth column is designated as wiring 253[m]. In FIG. 40A, the sub-pixel 212R of the pixel 211 in the m-th column is written as follows: The wiring 253 connected to the subpixel 212G is the wiring 253[m]R. The wiring 253 connected to the line 253[m]G and the subpixel 212B is referred to as wiring 253[m]B. The subpixel 212 is electrically connected to the peripheral circuit via the wiring.

[0290] In addition, the imaging device 200 has color filters that transmit light in the same wavelength range of adjacent pixels 211. The sub-pixels 212 provided with the filters are electrically connected to each other via the switches. In Figure 40(B), the matrix is ​​arranged in n rows (n is an integer between 1 and p) and m columns (m is an integer between 1 and q). The sub-pixel 212 of the pixel 211 arranged in the n+1th row and the mth column adjacent to the pixel 211 is 40B shows an example of connection of sub-pixels 212 included in a pixel 211 placed in the nth row. The sub-pixel 212R arranged in the mth column and the sub-pixel 212R arranged in the n+1th row and the mth column are switched. The sub-pixels 212G arranged in the nth row and the mth column are connected via the n+ The sub-pixels 212G arranged in the first row and the mth column are connected via the switches 202. The sub-pixels 212B arranged in the nth row and the mth column and the sub-pixels 212B arranged in the n+1th row and the mth column are switched. 203.

[0291] The color filters used for the subpixels 212 are not limited to red (R), green (G), and blue (B). color filters that transmit cyan (C), yellow (Y) and magenta (M) light, respectively. A single pixel 211 may have sub-pixels 212 for detecting light in three different wavelength ranges. By providing the sensor 12, a full color image can be obtained.

[0292] Alternatively, color filters that transmit red (R), green (G), and blue (B) light are installed. In addition to the sub-pixel 212, a sub-pixel having a color filter that transmits yellow (Y) light is provided. Pixel 211 may be used with pixel 212. Alternatively, cyan (C), yellow (Y), In addition to the sub-pixel 212 provided with a color filter that transmits light of blue (Y) and magenta (M), The pixel 21 has a sub-pixel 212 provided with a color filter that transmits blue (B) light. One pixel 211 may have four sub-pixels 21 for detecting light in different wavelength ranges. By providing 2, the color reproducibility of the acquired image can be further improved.

[0293] Also, for example, in FIG. 40(A), the sub-pixel 212 for detecting light in the red wavelength region and the sub-pixel 213 for detecting light in the green wavelength region are The sub-pixels 212 for detecting light in the long wavelength range and the sub-pixels 212 for detecting light in the blue wavelength range The ratio of the number of pixels (or the ratio of the light receiving area) does not have to be 1:1:1. The area ratio may be a Bayer array with red:green:blue = 1:2:1. The ratio (light receiving area ratio) may be red:green:blue=1:6:1.

[0294] The number of sub-pixels 212 provided in the pixel 211 may be one, but it is preferable that there are two or more. By providing two or more sub-pixels 212 that detect light in the same wavelength range, redundancy is increased, and imaging The reliability of the device 200 can be improved.

[0295] In addition, IR (IR: Infrared) filters absorb or reflect visible light and transmit infrared light. By using a filter, it is possible to realize an imaging device 200 that detects infrared light.

[0296] In addition, an ND (Neutral Density) filter (neutral density filter) is used. This prevents output saturation that occurs when a large amount of light is incident on the photoelectric conversion element (light receiving element). By combining ND filters with different light reduction levels, This allows for a wider dynamic range of the device.

[0297] In addition to the above-mentioned filter, a lens may be provided in the pixel 211. An example of the arrangement of the pixel 211, the filter 254, and the lens 255 will be described using a cross-sectional view. By providing the lens 255, the photoelectric conversion element can efficiently receive incident light. Specifically, as shown in FIG. 41(A), a lens 255 and a filter 25 formed in the pixel 211 4 (filter 254R, filter 254G and filter 254B), and pixel circuit 2 30 or the like, light 256 can be made incident on the photoelectric conversion element 220.

[0298] However, as shown in the area surrounded by the two-dot chain line, part of the light 256 indicated by the arrow is reflected by the wiring 257. Therefore, as shown in Figure 41(B), A lens 255 and a filter 254 are arranged on the conversion element 220 side, and the photoelectric conversion element 220 It is preferable that the light 256 is received efficiently from the photoelectric conversion element 220 side. By making the light incident on the photoelectric conversion element 220, an imaging device 200 with high detection sensitivity is provided. can be done.

[0299] The photoelectric conversion element 220 shown in FIG. 41 has a pn-type junction or a pin-type junction formed therein. A photoelectric conversion element may also be used.

[0300] The photoelectric conversion element 220 is made of a material that has the function of absorbing radiation and generating electric charges. The material having the function of absorbing radiation and generating charges may be a ceramic. Lead, lead iodide, mercury iodide, gallium arsenide, cadmium telluride, cadmium zinc alloy etc.

[0301] For example, if selenium is used for the photoelectric conversion element 220, in addition to visible light, ultraviolet light, and infrared light, Photoelectric conversion element 22 that has a light absorption coefficient over a wide wavelength range, such as X-rays and gamma rays 0 can be achieved.

[0302] Here, one pixel 211 included in the imaging device 200 has a sub-pixel 212 shown in FIG. 2. The pixel 212 may have a first filter.

[0303] <Pixel configuration example 2> In the following, a transistor using silicon and a transistor using an oxide semiconductor will be described. An example of configuring a pixel using the above will be described.

[0304] 42(A) and 42(B) are cross-sectional views of elements constituting the imaging device. The imaging device shown in FIG. 1 includes a silicon transistor 35 provided on a silicon substrate 300. 1. Transistor 35 using an oxide semiconductor stacked over transistor 351 2 and transistor 353, and a photodiode provided on the silicon substrate 300. Each transistor and photodiode 360 ​​is connected to a different plug 370. and is electrically connected to the wiring 371. 61 has an electrical connection with plug 370 through low resistance region 363 .

[0305] The imaging device also includes a transistor 351 and a photodiode 352 provided on the silicon substrate 300. A layer 310 having an electrode 360 ​​and a layer 371 provided in contact with the layer 310. 20 and a layer 320, which are provided in contact with the layer 320 and have a transistor 352 and a transistor 353. and a layer 330 provided in contact with the layer 330 and having wiring 372 and wiring 373. It has 40.

[0306] In the example of the cross-sectional view of FIG. 42(A), the transistor 35 is formed on the silicon substrate 300. The light receiving surface of the photodiode 360 ​​is located on the surface opposite to the surface on which the photodiode 1 is formed. This configuration ensures an optical path without being affected by various transistors and wiring. Therefore, it is possible to form pixels with a high aperture ratio. The light receiving surface of 360 may be the same as the surface on which the transistor 351 is formed.

[0307] In addition, when a pixel is configured using only transistors using an oxide semiconductor, the layer 31 Alternatively, the layer 310 may be omitted. Alternatively, a pixel may be formed using only a transistor including an oxide semiconductor.

[0308] When a pixel is constructed using only silicon transistors, the layer 330 is An example of a cross-sectional view in which the layer 330 is omitted is shown in FIG.

[0309] The silicon substrate 300 may be an SOI substrate. Instead, germanium, silicon germanium, silicon carbide, gallium arsenide, aluminum arsenide The substrate has aluminum gallium, indium phosphide, gallium nitride, or an organic semiconductor. You can also be there.

[0310] Here, a layer 310 having a transistor 351 and a photodiode 360, An insulator 380 is provided between the layer 330 having the resistor 352 and the transistor 353. However, the position of the insulator 380 is not limited.

[0311] The hydrogen in the insulator provided near the channel forming region of the transistor 351 is converted into silicon dioxide. This has the effect of terminating the ring bonds and improving the reliability of the transistor 351. , hydrogen in an insulator provided near the transistor 352 and the transistor 353, etc. This is one of the factors that generate carriers in the oxide semiconductor. This may cause a decrease in reliability of the transistor 52 and the transistor 353. Therefore, a transistor using an oxide semiconductor is placed on top of a transistor using a silicon semiconductor. When the capacitors are stacked, an insulator 380 having a function of blocking hydrogen is provided between them. By confining hydrogen below the insulator 380, the transistor The reliability of the insulator 351 can be improved. Since hydrogen diffusion to the layer above 380 can be suppressed, the transistor 352 and the transistor The reliability of the transistor 353 can be improved.

[0312] As the insulator 380, for example, an insulator having a function of blocking oxygen or hydrogen is used. There are.

[0313] In the cross-sectional view of FIG. 42(A), the photodiode 360 ​​provided in the layer 310 and the layer The transistor 330 can be formed so as to overlap with the transistor 330. In other words, the resolution of the imaging device can be increased.

[0314] As shown in FIG. 43(A1) and FIG. 43(B1), a part or the whole of the imaging device may be 43(A1) shows the state where the imaging device is bent in the direction of the dashed line X1-X2 in the figure. 43(A2) shows the state where the bent portion is located along the dashed line X1-X in FIG. 43(A3) is a cross-sectional view of the portion indicated by the dashed line Y1-2 in FIG. This is a cross-sectional view of the portion indicated by Y2.

[0315] FIG. 43(B1) shows the case where the imaging device is bent in the direction of the dashed line X3-X4 in the same figure, and FIG. 43(B2) shows the state where the lens is bent in the direction of the dashed line Y3-Y4 in the drawing. 43(B1) is a cross-sectional view of the portion indicated by the dashed line X3-X4 in FIG. 43(B1) is a cross-sectional view of a portion indicated by the dashed dotted line Y3-Y4 in FIG.

[0316] By curving the imaging device, it is possible to reduce field curvature and astigmatism. This makes it easier to design the optical system, such as lenses, that are used in combination with the imaging device. For example, The number of lenses required for aberration correction can be reduced, which contributes to the miniaturization of electronic devices that use imaging devices. It is possible to achieve a lighter weight and improve the quality of the captured image. .

[0317] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments. It can be done.

[0318] (Embodiment 5) In this embodiment, an example of a CPU including a semiconductor device such as a transistor according to an aspect of the present invention and the above-described memory device will be described. An example of a CPU including a semiconductor device such as a transistor according to an aspect of the present invention and the above-described memory device will be described.

[0319] <Configuration of CPU> FIG. 44 is a block diagram showing a configuration of an example of a CPU using a part of the above-described transistor. There is.

[0320] The CPU shown in FIG. 44 has an ALU 1191 (ALU: Arithmetic ic logic unit, arithmetic circuit), ALU controller, instruction shun decoder, interrupt controller, timing controller 1195, register 1196, register controller 1197, bus interface 1 198, rewritable ROM 1199, and ROM interface 1189 on the substrate 1190. The substrate 1190 uses a semiconductor substrate, an SOI substrate, a glass substrate, or the like. ROM 1 199 and the ROM interface may be provided on a separate chip. Of course, The CPU shown in FIG. 44 is only an example shown with its configuration simplified, and an actual CPU has various configurations depending on its application. For example, a configuration including the CPU or arithmetic circuit shown in FIG. 44 is used as one core, and a plurality of such cores are included, and each core operates in parallel. It may be a configuration such that. Also, the number of bits that the CPU can handle with an internal arithmetic circuit or data bus can be , for example, 8 bits, 16 bits, 32 bits, 64 bits, or the like. It can be, for example, 8 bits, 16 bits, 32 bits, 64 bits, etc.

[0321] The instructions input to the CPU via the bus interface 1198 are After being input to the decoder 1193 and decoded, the ALU controller 1192 Rupture controller 1194, register controller 1197, timing controller It is entered into 1195.

[0322] ALU controller 1192, interrupt controller 1194, register controller The timing controller 1197 and the timing controller 1195 control various Specifically, the ALU controller 1192 controls the operation of the ALU 1191. The interrupt controller 1194 also generates signals for the CPU program. During system execution, interrupt requests from external I / O devices and peripheral circuits are handled according to their priority and mask. The register controller 1197 determines the address of the register 1196 and processes it. It generates a response and reads or writes to register 1196 depending on the state of the CPU.

[0323] The timing controller 1195 controls the ALU 1191 and the ALU controller 119 2, an instruction decoder 1193, an interrupt controller 1194, and It generates a signal to control the timing of the operation of the register controller 1197. The timing controller 1195 generates an internal clock signal based on the reference clock signal. The internal clock generator supplies an internal clock signal to the various circuits.

[0324] In the CPU shown in FIG. 44, a memory cell is provided in the register 1196. The above-mentioned transistors and memory devices can be used as the memory cells of 1196. do.

[0325] In the CPU shown in FIG. 44, the register controller 1197 receives the data from the ALU 1191. According to the instruction, the holding operation is selected in the register 1196. That is, the register 1196 In the memory cell of the Select whether to hold data by flip-flop. If the power supply voltage is set to 0, the power supply voltage is supplied to the memory cells in the register 1196. If data retention in the capacitor is selected, the data is rewritten to the capacitor. This allows the supply of power supply voltage to the memory cells in the register 1196 to be stopped.

[0326] FIG. 45 is an example circuit diagram of a storage element 1200 that can be used as the register 1196. The memory element 1200 includes a circuit 1201 in which stored data is volatilized when the power is cut off, and a circuit 1202 in which stored data is volatilized when the power is cut off. A circuit 1202 that prevents stored data from volatilizing when turned off, a switch 1203, and a switch 1204. , a logic element 1206, a capacitor 1207, and a circuit 1220 having a selection function. The circuit 1202 includes a capacitor 1208, a transistor 1209, and a transistor 1210. 10. The memory element 1200 may include a diode, a resistor, It may further include other elements such as an inductor.

[0327] Here, the above-described memory device can be used for the circuit 1202. When the supply of power supply voltage to the ND (0V) or a potential that turns off the transistor 1209 is continuously input. For example, the gate of the transistor 1209 is configured to be grounded via a load such as a resistor. .

[0328] The switch 1203 uses a transistor 1213 of one conductivity type (for example, n-channel type). The switch 1204 is configured as a transistor of a conductivity type opposite to the one conductivity type (for example, a p-channel type). An example using a transistor 1214 is shown. Here, the first terminal of the switch 1203 The input corresponds to one of the source and drain of the transistor 1213, and the second input of the switch 1203. The terminal of corresponds to the other of the source and drain of the transistor 1213, and the switch 1203 A control signal RD input to the gate of the transistor 1213 switches the first terminal and the second terminal Conduction or non-conduction between the terminals (i.e., the conducting or non-conducting state of transistor 1213) The first terminal of the switch 1204 is connected to the source and drain of the transistor 1214. The second terminal of the switch 1204 corresponds to one of the drains of the transistor 1214. The switch 1204 is connected to the gate of the transistor 1214. The control signal RD input to the first terminal determines whether or not the first terminal is electrically connected to the second terminal. The conducting or non-conducting state of transistor 1214 is selected.

[0329] One of the source and drain of the transistor 1209 is connected to a pair of electrodes of the capacitor 1208. The connection point is electrically connected to one of the gate electrodes of the transistor 1210 and the gate of the transistor 1210. The node M2 ​​is connected to the source or drain of the transistor 1210. The other is electrically connected to a wiring (for example, a GND line) that can supply 1203 (one of the source and drain of the transistor 1213) The second terminal of the switch 1203 (the source and drain of the transistor 1213) is connected to the The other terminal of the switch 1204 (one of the source and drain terminals of the transistor 1214) The second terminal of the switch 1204 (the source of the transistor 1214) is electrically connected to the The other of the source and drain terminals is electrically connected to the wiring that can supply the power supply potential VDD. The second terminal of the switch 1203 (the other of the source and drain of the transistor 1213) ) and the first terminal of the switch 1204 (one of the source and drain of the transistor 1214) ), an input terminal of the logic element 1206, and one of a pair of electrodes of the capacitor 1207. are electrically connected. Here, the connection point is referred to as node M1. The other of the electrodes may be configured to have a constant potential input thereto. It can be configured so that a power supply potential (GND, etc.) or a high power supply potential (VDD, etc.) is input. The other of the pair of electrodes of the capacitor 1207 is connected to a line that can supply a low power supply potential. The other of the pair of electrodes of the capacitor 1208 is electrically connected to a line (for example, a GND line). For example, a low power supply potential (such as GND) can be input. ) or a high power supply potential (such as VDD) can be input to the capacitor element 120. The other of the pair of electrodes 8 is connected to a wiring (e.g., GND) that can supply a low power supply potential. The power supply is electrically connected to the power supply line.

[0330] The capacitors 1207 and 1208 are used to reduce the parasitic capacitance of transistors and wirings. It is possible to omit it by actively using it.

[0331] A control signal WE is input to the gate of the transistor 1209. The switch 1204 is connected between the first terminal and the second terminal by a control signal RD that is different from the control signal WE. The conduction or non-conduction state between the first and second terminals of one switch is selected. When the terminals of one switch are in a conductive state, the first and second terminals of the other switch are in a non-conductive state. This becomes:

[0332] The other of the source and drain of the transistor 1209 is connected to a data line held in the circuit 1201. In FIG. 45, the signal output from the circuit 1201 is The example shown is input to the other of the source and drain of the switch 1203. The signal output from the second terminal (the other of the source and drain of the transistor 1213) is The logic value is inverted by the logic element 1206 to become an inverted signal, and is output via the circuit 1220. and input to the circuit 1201.

[0333] In FIG. 45, the second terminal of the switch 1203 (the source and drain of the transistor 1213) The signal output from the other of the two trains is routed through logic element 1206 and circuit 1220. The example shown is an input to the circuit 1201, but is not limited to this. The signal output from the other of the source and drain of the transistor 1213 is inverted. For example, the following may be included in the circuit 1201: When there is a node that holds a signal whose logical value is the inverse of the signal input from the input terminal The second terminal of the switch 1203 (the other of the source and drain of the transistor 1213) A signal output from the node can be input to the node.

[0334] In addition, in FIG. 45, among the transistors used in the memory element 1200, The transistors other than the transistor 1209 are formed by a layer or a substrate 119 made of a semiconductor other than an oxide semiconductor. For example, a transistor in which a channel is formed in a silicon film or The transistor may have a channel formed in a silicon substrate. All transistors used in 1200 are transistors whose channels are formed of oxide semiconductors. Alternatively, the memory element 1200 may include other elements in addition to the transistor 1209. The other transistors may include a transistor in which the channel is formed of an oxide semiconductor. The transistor has a channel formed in a layer or substrate 1190 made of a semiconductor other than an oxide semiconductor. It may also be a transistor.

[0335] For example, a flip-flop circuit can be used for the circuit 1201 in FIG. The logic element 1206 may be, for example, an inverter or a clocked inverter. It is possible.

[0336] In the semiconductor device according to one embodiment of the present invention, while power supply voltage is not supplied to the memory element 1200, The data stored in the circuit 1201 is transferred to the capacitor 1208 in the circuit 1202. It can be held by

[0337] In addition, a transistor in which a channel is formed in an oxide semiconductor has an extremely small off-state current. For example, the off-state current of a transistor in which a channel is formed in an oxide semiconductor is The off-state current is significantly lower than that of transistors whose channels are formed in silicon. By using this transistor as the transistor 1209, the memory element 120 The signal held in the capacitor 1208 is maintained for a long period of time even when power supply voltage is not supplied to the capacitor 1208. In this way, the storage element 1200 maintains its stored contents (data) even when the supply of power supply voltage is stopped. ) can be held.

[0338] Furthermore, by providing the switches 1203 and 1204, the precharge operation Since the memory element is characterized by performing the above operation, after the power supply voltage is restarted, the circuit 1201 This reduces the time required to restore the original data.

[0339] In the circuit 1202, the signal held by the capacitor 1208 is Therefore, the supply of the power supply voltage to the memory element 1200 is resumed. After that, the signal held by the capacitor element 1208 is transferred to the state ( The signal can be converted into a conducting state or a non-conducting state and read out from the circuit 1202. Therefore, even if the potential corresponding to the signal held in the capacitor element 1208 fluctuates slightly, the original signal It is possible to read out the number accurately.

[0340] Such a storage element 1200 may be used as a register or cache memory of a processor. By using it in a storage device, it is possible to prevent the loss of data in the storage device due to a power supply interruption. In addition, after the supply of power voltage is resumed, the state before the power supply was stopped can be restored in a short time. Therefore, the entire processor, or one or more components of the processor, can stop power supply for a short time in multiple logic circuits, reducing power consumption. It can be suppressed.

[0341] Although the storage element 1200 has been described as being used in a CPU, the storage element 1200 can also be used in a DSP ( Digital Signal Processor), custom LSI, R It can also be applied to FPGA (Radio Frequency) devices. Field Programmable Gate Array) and CPLD (Comp Programmable logic devices (PLDs) such as programmable logic devices (PLCs) It can also be applied to LSIs such as Logic Devices.

[0342] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments. can.

[0343] (Embodiment 6) In this embodiment, a display device including a transistor according to one embodiment of the present invention will be described. This will be explained with reference to FIGS. 46 and 47.

[0344] <Display device configuration> Display elements used in display devices include liquid crystal elements (also called liquid crystal display elements), light-emitting elements, and the like. The light-emitting element can be a light-emitting display element. Therefore, the category includes elements whose brightness can be controlled, specifically inorganic EL (Electroluminescent) These include organic EL displays, etc. Display devices using EL elements (EL display devices) and display devices using liquid crystal elements (liquid crystal display devices) This section explains the display device.

[0345] The display device described below is a panel in which a display element is sealed, and a connector for the panel. This includes modules in which ICs including controllers are mounted.

[0346] The display device shown below refers to an image display device or a light source (including a lighting device). Also, connectors, such as FPC, modules with TCP attached, and printers at the end of TCP The IC (integrated circuit) is mounted directly on the module or display element with a printed wiring board using the COG method. All modules mounted on the display device are also included in the display device.

[0347] 46A and 46B show an example of an EL display device according to one embodiment of the present invention. FIG. 46(B) is a top view showing the entire EL display device. FIG. 46(C) is a cross section of MN corresponding to a part of the dashed line MN in FIG. 46(B). .

[0348] FIG. 46(A) is an example of a circuit diagram of a pixel used in an EL display device.

[0349] In this specification, the terms "active elements" and "passive elements" are used interchangeably. For all terminals of elements such as capacitors and resistors, the connection destination must be specified. However, a person skilled in the art may be able to compose an aspect of the invention. Even if the destination is not specified, one aspect of the invention can be said to be clear. When the content is described in this specification, etc., one aspect of the invention that does not specify the connection destination is In particular, if the terminal is connected to multiple When multiple locations are expected, there is no need to limit the connection destination of the terminal to a specific location. Therefore, active elements (transistors, diodes, etc.) and passive elements (capacitance elements, resistance elements) By specifying the connection destinations of only some of the terminals possessed by devices such as It may be possible to configure a different embodiment.

[0350] In this specification and the like, if at least the connection destination of a certain circuit is specified, it is understood by those skilled in the art. It may be possible for a person skilled in the art to identify an invention. A person skilled in the art may be able to identify an invention by at least specifying the function. In other words, if the function is specified, it can be said that one aspect of the invention is clear. It may be possible to determine that one aspect of the invention is described in the present specification. Therefore, even if the function of a circuit is not specified, specifying the connection destination can be considered an aspect of an invention. and can constitute one aspect of the invention. Even if the connection destination of a certain circuit is not specified, if the function is specified, it can be considered as one aspect of the invention. What is disclosed can constitute an aspect of the invention.

[0351] The EL display device shown in FIG. 46(A) includes a switch element 743, a transistor 741, and a capacitor. The light emitting element 719 includes a capacitor 742 and a light emitting element 719 .

[0352] Note that FIG. 46(A) is an example of a circuit configuration, and therefore, if a transistor is added, Conversely, at each node in FIG. 46(A), it is possible to It is also possible to avoid adding passive elements.

[0353] The gate of the transistor 741 is connected to one end of the switch element 743 and one end of the capacitor element 742. The source of the transistor 741 is electrically connected to the other electrode of the capacitor 742. and electrically connected to one electrode of the light-emitting element 719. The drain of the switch element 741 is supplied with a power supply potential VDD. The other end of the switch element 743 is connected to the signal line 7 The other electrode of the light-emitting element 719 is electrically connected to the light-emitting element 44. A constant potential is applied to the other electrode of the light-emitting element 719. The constant potential is the ground potential GND or a potential lower than that.

[0354] It is preferable to use a transistor as the switch element 743. This allows the pixel area to be reduced, resulting in an EL display device with high resolution. The switching element 743 is a transistor manufactured through the same process as the transistor 741. The use of transistor 74 can improve the productivity of the EL display device. 1 and / or the switch element 743, for example, the above-mentioned transistor is applied. It is possible.

[0355] 46(B) is a top view of the EL display device. The EL display device is made up of a substrate 700 and a substrate 7 50, a sealing material 734, a driving circuit 735, a driving circuit 736, a pixel 737, and an FP The sealing material 734 covers the pixel 737, the driving circuit 735, and the driving circuit The driving circuit 735 is disposed between the substrate 700 and the substrate 750 so as to surround the driving circuit 736. Alternatively, the driving circuit 736 may be disposed outside the sealing material 734 .

[0356] FIG. 46(C) is a cross-sectional view of the EL display device corresponding to a part of the dashed line MN in FIG. 46(B). is.

[0357] FIG. 46C shows a transistor 741 including an insulator 701 and an insulator The conductor 702a on the insulating layer 701, the insulating layer 703 in which the conductor 702a is embedded, and the insulating layer 703 are 703, and an insulator 704, and a region 705a and a region 705b on the insulator 704 are provided. A semiconductor 705 is formed on the semiconductor 705, an insulator 706 is formed on the semiconductor 705, and a conductor 707 is formed on the insulator 706. The structure of the transistor 741 is an example, and is shown in FIG. ) may have a different structure from that shown in

[0358] Therefore, in the transistor 741 shown in FIG. 46C, the conductor 702a is The insulators 703 and 706 function as gate insulators. The region 705a functions as a source, and the region 705b functions as a drain. The conductor 707a functions as a gate electrode. The electrical characteristics may change when exposed to light. It is preferable that at least one of the layers 707a has a light-blocking property.

[0359] In FIG. 46C, a conductor 702b over an insulator 701 and a conductor an insulator 703 on the conductor 702b, and a region 705 on the insulator 703 that overlaps with the conductor 702b; b, an insulator 706 on the region 705b, and a conductor on the insulator 706 that overlaps the region 705b. 7 shows a structure having a conductive material 707b.

[0360] In the capacitor 742, the conductor 702b and the region 705b function as one electrode. The conductor 707a serves as the other electrode.

[0361] Therefore, the capacitor 742 can be formed using the same film as that of the transistor 741. It is also preferable that the conductors 702a and 702b are made of the same type of conductor. In this case, the conductor 702a and the conductor 702b can be formed through the same process. In addition, the conductor 707a and the conductor 707b are preferably made of the same type of conductor. In this case, the conductor 707a and the conductor 707b can be formed through the same process. .

[0362] A capacitor 742 shown in FIG. 46C has a large capacitance per occupied area. Therefore, the EL display device shown in FIG. 46(C) has high display quality.

[0363] An insulator 716 and an insulator 720 are provided over the transistor 741 and the capacitor 742. Here, the insulator 716 and the insulator 720 are connected as the source of the transistor 741. The insulator 720 may have an opening that reaches the functional region 705a. The conductor 781 is connected to the transistor 741 through the opening in the insulator 720. Electrically connected.

[0364] A partition 784 having an opening that reaches the conductor 781 is disposed over the conductor 781. A light-emitting layer 782 is disposed on the wall 784 and is in contact with the conductor 781 at the opening of the partition wall 784. A conductor 783 is disposed over the light-emitting layer 782. The overlapping region of the conductor 783 becomes the light-emitting element 719 .

[0365] So far, an example of an EL display device has been described. Next, an example of a liquid crystal display device will be described. do.

[0366] 47(A) is a circuit diagram showing an example of the configuration of a pixel of a liquid crystal display device. A transistor 751, a capacitor 752, and an element in which liquid crystal is filled between a pair of electrodes (liquid crystal) It has a crystal element 753.

[0367] In the transistor 751, one of the source and the drain is electrically connected to a signal line 755. The gate is electrically connected to a scan line 754 .

[0368] In the capacitor 752, one electrode is electrically connected to the other of the source and drain of the transistor 751. The other electrode is electrically connected to a wiring that supplies a common potential.

[0369] In the liquid crystal element 753, one electrode is electrically connected to the other of the source and drain of the transistor 751. The other electrode is electrically connected to a wiring that supplies a common potential. a common potential applied to a wiring to which the other electrode of the capacitor 752 is electrically connected; The common potential applied to the other electrode of the liquid crystal element 753 may be different from the common potential applied to the other electrode of the liquid crystal element 753 .

[0370] The liquid crystal display device will be described assuming that the top view is the same as that of the EL display device. A cross-sectional view of the liquid crystal display device corresponding to the dotted chain line MN is shown in FIG. In this case, the FPC 732 is connected to the wiring 733a via the terminal 731. 3a is a conductor or semiconductor of the same type as the conductor or semiconductor that constitutes the transistor 751. Alternatively, a semiconductor may be used.

[0371] For the transistor 751, refer to the description of the transistor 741. For 752, refer to the description of the capacitor 742. Note that in FIG. Although the structure of the capacitor 752 corresponding to the capacitor 742 in (C) is shown, the present invention is not limited to this. stomach.

[0372] Note that when an oxide semiconductor is used as the semiconductor of the transistor 751, the off-state current is extremely small. Therefore, the charge held in the capacitor 752 can be Therefore, the voltage applied to the liquid crystal element 753 can be maintained for a long period of time. Therefore, when displaying a moving image or a still image with little movement, the transistor 751 is turned off. By doing so, power for the operation of the transistor 751 is not required, and a liquid crystal display with low power consumption is obtained. In addition, the area occupied by the capacitor 752 can be reduced; It is possible to provide a liquid crystal display device with a high aperture ratio or a high-definition liquid crystal display device.

[0373] An insulator 721 is provided over the transistor 751 and the capacitor 752. The insulator 721 has an opening that reaches the transistor 751. On the insulator 721, a conductive The conductor 791 is disposed on the transistor through the opening of the insulator 721. 751 and electrically connected.

[0374] An insulator 792 functioning as an alignment film is provided over the conductor 791. A liquid crystal layer 793 is disposed on the liquid crystal layer 793. An insulator 794, which functions as an alignment film, is disposed on the liquid crystal layer 793. 94 is disposed on the insulator 794. A spacer 795 is disposed on the insulator 794. A conductor 796 is disposed on the insulator 794. The substrate 79 7 is placed.

[0375] The liquid crystal driving method is TN (Twisted Nematic) mode, ST N (Super Twisted Nematic) mode, IPS (In-Plane -Switching) mode, FFS(Fringe Field Switchin) g) Mode, MVA (Multi-domain Vertical Alignmen) t) mode, PVA (Patterned Vertical Alignment) mode mode, ASV (Advanced Super View) mode, ASM (Axial ly Symmetric aligned Micro-cell) mode, OCB( Optically Compensated Birefringence mode, ECB(Electrically Controlled Birefringence) e) mode, FLC (Ferroelectric Liquid Crystal) mode AFLC (AntiFerroelectric Liquid Crystal) ) mode, PDLC (Polymer Dispersed Liquid Crystal al mode, guest host mode, Blue Phase mode, etc. However, it is not limited to this, and various driving methods can be used. can be done.

[0376] By having the above-described structure, it is possible to provide a display device having a capacitor element with a small occupation area. Alternatively, a display device with high display quality can be provided. It is possible to provide a display device.

[0377] For example, in this specification and the like, the term "display element," "display device having a display element," "light emitting element," "light emitting device," "light emitting element ... A light-emitting device, which is a device having a light-emitting element and a light-emitting element, can be used in various forms or in various The display element, the display device, the light-emitting element or the light-emitting device may include, for example, For example, a light-emitting diode (LED) such as white, red, green, or blue ting Diode), transistor (transistor that emits light according to the current), electron Output element, liquid crystal element, electronic ink, electrophoretic element, grating light valve (GLV) , plasma displays (PDP), MEMS (microelectromechanical systems) display elements using a digital micromirror device (DMD), a digital micromirror device (DMS), Micro Shutter), IMOD (Interference Modulation) element, shutter type MEMS display element, optical interference type MEMS display element, electro Wetting elements, piezoelectric ceramic displays, and displays using carbon nanotubes In addition to these, there are also other types of devices that can be used for electrical or magnetic functions. Alternatively, the display medium may have a variable contrast, brightness, reflectance, transmittance, etc.

[0378] An example of a display device using an EL element is an EL display. An example of a display device using this is a field emission display (FED) or is a SED (Surface-conduction E) flat panel display. LCD displays include liquid crystal displays. An example of the device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display). LCD, reflective LCD, direct view LCD, projection LCD) An example of a display device using electronic ink or electrophoretic elements is an electronic page. There are also other LCDs that can be used to realize semi-transmissive and reflective LCD displays. In this case, part or all of the pixel electrode can function as a reflective electrode. For example, a part or all of the pixel electrodes may be made of aluminum, silver, etc. Furthermore, in this case, a memory circuit such as an SRAM can be provided under the reflective electrode. This makes it possible to further reduce power consumption.

[0379] When using an LED, graphene or graphene is placed under the LED electrode or nitride semiconductor. Graphene and graphite can be arranged in layers to form a multilayer film. In this way, by providing graphene or graphite, it is possible to form a nitride layer on the graphene or graphite. Semiconductors, such as n-type GaN semiconductors having crystals, can be easily formed into films. Furthermore, a p-type GaN semiconductor with crystals can be placed on top of it to form an LED. It is possible to form a crystalline n-type GaN semiconductor with graphene or graphite. An AlN layer may be provided. The GaN semiconductor in the LED is formed by MOCVD. However, by providing graphene, the GaN semiconductor of the LED can be It is also possible to form the film by a tartering method.

[0380] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments. can.

[0381] (Embodiment 7) In this embodiment, an electronic device including a transistor according to one embodiment of the present invention will be described. We will explain about this.

[0382] <Electronic equipment> A semiconductor device according to one aspect of the present invention includes a display device, a personal computer, and a recording medium. Image playback devices (typically DVD: Digital Versatile Disc) (Devices having a display that can play back recording media such as DVDs and display the images) In addition, electronic devices in which the semiconductor device according to one embodiment of the present invention can be used are Mobile phones, portable game consoles, portable data terminals, e-book terminals, video cameras , cameras such as digital still cameras, goggle-type displays (head-mounted displays) Ray), navigation systems, sound reproduction devices (car audio, digital audio players, etc.), copiers, facsimiles, printers, printer-combined machines, automated teller machines Examples of such electronic devices include ATMs and vending machines. vinegar.

[0383] FIG. 48A shows a portable game machine, which includes a housing 901, a housing 902, a display unit 903, and a display unit 904, microphone 905, speaker 906, operation keys 907, stylus 908 The portable game machine shown in FIG. 48A has two display units 903 and a display However, the number of display units that the portable game machine has is not limited to this. .

[0384] FIG. 48(B) shows a portable data terminal, which includes a first housing 911, a second housing 912, a first display unit 9 13, a second display unit 914, a connection unit 915, operation keys 916, etc. The first display unit 911 is provided in the first housing 911, and the second display unit 914 is provided in the second housing 912. The first housing 911 and the second housing 912 are connected by a connection part 915. The angle between the first housing 911 and the second housing 912 can be changed by the connecting portion 915. The image on the first display unit 913 is transmitted between the first housing 911 and the second housing 912 at the connection unit 915. 12. Also, the first display unit 913 and a display having a function as a position input device added to at least one of the first display unit 914 and the second display unit 915. The function as a position input device can be achieved by touching the display device. Alternatively, the function as a position input device can be added by providing a touch panel. It can also be added by providing a photoelectric conversion element, also called a photosensor, in the pixel portion of the display device. It is possible.

[0385] FIG. 48C shows a notebook personal computer, which includes a housing 921, a display unit 922, a keyboard, and a keyboard. The computer has a keyboard 923, a pointing device 924, and the like.

[0386] FIG. 48(D) shows an electric refrigerator-freezer, which includes a housing 931, a refrigerator compartment door 932, and a freezer compartment door 93. He holds the third prize.

[0387] FIG. 48(E) shows a video camera, which includes a first housing 941, a second housing 942, a display unit 943, The operation key 944, the lens 945, the connection part 946, etc. 945 is provided in the first housing 941, and the display unit 943 is provided in the second housing 942. The first housing 941 and the second housing 942 are connected by a connecting portion 946. The angle between the first housing 941 and the second housing 942 can be changed by the connecting portion 946. The image on the display unit 943 is transmitted between the first housing 941 and the second housing 94 at the connection unit 946. 2.

[0388] FIG. 48(F) shows an automobile, which includes a body 951, wheels 952, a dashboard 953, and lights. It has 954 etc.

[0389] The structure described in this embodiment mode can be used in appropriate combination with structures described in other embodiments. can.

[0390] In the above embodiment, one aspect of the present invention has been described. The embodiments are not limited to these. In other words, various embodiments of the invention are described in the present embodiment and the like. Therefore, one embodiment of the present invention is not limited to a specific embodiment. In one embodiment, the channel forming region, source region, drain region, etc. of a transistor are oxidized. Although an example in which a semiconductor material is included has been shown, one embodiment of the present invention is not limited to this. Therefore, or depending on the situation, various transistors, The channel forming region of a transistor, or the source region, drain region, etc. of a transistor, In some cases, or depending on the circumstances, one of the present invention Various transistors, channel forming regions of transistors, or transistors according to the embodiments The source and drain regions of the transistor are made of, for example, silicon, germanium, silicon germanium, or silicon dioxide. Rumanium, silicon carbide, gallium arsenide, aluminum gallium arsenide, indium phosphide , gallium nitride, or an organic semiconductor. For example, depending on the circumstances, various trans The channel forming region of a transistor, or the source region or drain region of a transistor The insulating region and the like do not necessarily have to include an oxide semiconductor. [Explanation of symbols]

[0391] 100 transistors 101 Substrate 110 Insulator 120 Insulator 130 Oxides 130a insulator 130b Semiconductors 130c insulator 131 areas 131a area 131b area 131c area 132 areas 132a area 132b area 132c area 133 areas 133a area 133b area 133c area 140a wiring 140b wiring 140c wiring 150 Insulator 160 Conductors 170 Conductors 180 Insulator 190 Insulators 200 Imaging device 201 Switch 202 Switch 203 Switch 210 Pixel section 211 pixels 212 subpixels 212B subpixel 212G subpixel 212R subpixel 220 Photoelectric conversion element 230 pixel circuit 231 Wiring 247 Wiring 248 Wiring 249 Wiring 250 Wiring 253 Wiring 254 filters 254B filter 254G filter 254R filter 255 Lens 256 light 257 Wiring 260 Peripheral Circuits 270 Peripheral Circuits 280 Peripheral Circuits 290 Peripheral Circuits 291 Light source 300 silicon substrate 310 layers 320 layers 330 layers 340 layers 351 Transistor 352 transistors 353 Transistor 360 photodiode 361 Anode 363 Low resistance region 370 Plug 371 Wiring 372 Wiring 373 Wiring 380 Insulator 450 Semiconductor Substrate 452 Insulator 454 Conductors 456 areas 460 areas 462 Insulator 464 Insulator 466 Insulator 468 Insulator 472a area 472b area 474a Conductor 474b Conductor 474c Conductor 476a Conductors 476b Conductor 478a Conductor 478b Conductor 478c Conductor 480a Conductor 480b Conductor 480c conductor 489 Insulators 490 Insulator 492 Insulators 493 Insulators 494 Insulators 495 Insulators 496a Conductors 496b Conductor 496c Conductor 496d Conductor 498a Conductors 498b Conductor 498c Conductor 504 Conductors 507a area 507b area 511 Insulator 514 Conductors 521 Routing Switch Element 522 Logic Elements 523 Configuration Memory 524 Lookup Table 525 registers 526 Selector 527 Configuration Memory 700 boards 701 Insulators 702a Conductor 702b Conductor 703 Insulators 704 Insulator 705 Semiconductors 705a area 705b area 706 Insulator 707a Conductor 707b Conductor 716 Insulator 719 Light-emitting element 720 Insulator 721 Insulator 731 terminal 732 FPC 733a wiring 734 Sealing material 735 Drive Circuit 736 Drive Circuit 737 pixels 741 Transistor 742 Capacitor 743 Switching Elements 744 signal line 750 board 751 Transistor 752 Capacitor 753 Liquid crystal elements 754 scan lines 755 signal line 781 Conductors 782 luminescent layer 783 Conductors 784 Bulkhead 791 Conductors 792 Insulators 793 Liquid Crystal Layer 794 Insulators 795 Spacer 796 Conductors 797 Circuit Board 901 Case 902 Case 903 Display section 904 Display section 905 Microphone 906 Speaker 907 Operation Key 908 Stylus 911 chassis 912 Case 913 Display section 914 Display section 915 Connection 916 Operation Key 921 Case 922 Display section 923 keyboard 924 Pointing Device 931 Case 932 Refrigerator door 933 Freezer door 941 Case 942 Case 943 Display section 944 Operation Key 945 lens 946 Connection 951 body 952 wheels 953 Dashboard 954 Light 1189 ROM interface 1190 PCB 1191 ALU 1192 ALU controller 1193 Instruction Decoder 1194 Interrupt Controller 1195 Timing Controller 1196 registers 1197 Register Controller 1198 Bus Interface 1199 ROM 1200 memory elements 1201 Circuit 1202 Circuit 1203 Switch 1204 Switch 1206 Logic Elements 1207 Capacitor element 1208 Capacitor 1209 Transistor 1210 transistor 1213 Transistor 1214 transistor 1220 circuits 2100 transistors 2200 transistors 3001 Wiring 3002 Wiring 3003 Wiring 3004 Wiring 3005 Wiring 3200 transistors 3300 transistors 3400 Capacitor 4001 Wiring 4003 Wiring 4005 Wiring 4006 Wiring 4007 Wiring 4008 Wiring 4009 Wiring 4021 layers 4022 layers 4023 layers 4100 transistors 4200 transistors 4300 transistors 4400 transistors 4500 Capacitor 4600 Capacitor 5100 pellets 5120 board 5161 area< / fpga>

Claims

[Claim 1] a conductor, an oxide semiconductor, a first insulator, and a second insulator are provided on a substrate; the oxide semiconductor has a first region and a second region; the second region has a lower resistance than the first region; the oxide semiconductor serving as the first region is surrounded on all four sides by the conductor via the first insulator and the second insulator, The semiconductor device is characterized in that the second region has a higher impurity concentration than the first region.

Images