Monitoring control device, data processing method, and data processing program

Abstract

To provide a monitoring control device capable of providing information usable to identify occurrence factors of bit errors in stored data.SOLUTION: Monitoring control devices 1a, 1b for monitoring facilities include: data creation parts 12 for creating monitoring control data on monitoring and controlling of facilities; information addition parts 13 for adding time stamps on the created monitoring control data when the monitoring control data are created; and coding parts 14 for creating check bits for detecting and correcting errors objective for the monitoring control data on which the time stamps are added to write them in store parts 15 by adding the created check bits to the monitoring control data in a state where the time stamps are added.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present disclosure relates to a monitoring control device, a data processing method, and a data processing program that realize a monitoring control system that monitors and controls a facility. [Background technology]

[0002] A monitoring and control system that monitors and controls facilities located over a wide area is composed of, for example, a monitoring and control device that operates as a parent station for centralizing the monitoring and control of each facility in a management office or the like, and a monitoring and control device that operates as a child station that is installed inside or near the facility and directly monitors and controls the facility based on instructions from the parent station, etc. The monitoring and control device operating as a child station stores and holds data such as facility monitoring results and control results in a memory or the like, and transmits some or all of the data to the parent station at a predetermined timing.

[0003] Highly reliable data management is required in monitoring and control systems. In particular, monitoring and control devices at slave stations are often used outdoors or in other environments where the surrounding environment is prone to change. Therefore, it is desirable to develop technology that can prevent data loss even under such conditions.

[0004] For example, Patent Document 1 discloses a technology that enables tracking the history of errors that occur in a memory module by storing an error log in non-volatile management memory that indicates timestamps for errors that occur during operation of the memory module. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 10-40173 Summary of the Invention [Problem to be solved by the invention]

[0006] According to the technology described in Patent Document 1, it is possible to know from the error log when an error such as a voltage error or a temperature error is detected. However, with the technology described in Patent Document 1, it is not possible to know when a bit flip actually occurs and a bit error actually occurs. This poses a problem in that it is difficult to identify the cause of the bit error.

[0007] The present disclosure has been made in view of the above, and aims to provide a monitoring control device that can provide information that can be used to identify the cause of bit errors in stored data. [Means for solving the problem]

[0008] In order to solve the above-mentioned problems and achieve the objectives, the present disclosure provides a monitoring control device that performs monitoring and control of a facility, characterized by comprising: a data generation unit that generates monitoring and control data related to the monitoring and control of the facility; an information addition unit that assigns a timestamp to the generated monitoring and control data when the monitoring and control data is generated; and an encoding unit that generates check bits for error detection and correction for the time-stamped monitoring and control data, assigns the generated check bits to the time-stamped monitoring and control data, and writes the data into a memory unit. [Effects of the Invention]

[0009] According to the present disclosure, it is possible to obtain an effect of providing a monitoring control device that can provide information that can be used to identify the cause of a bit error in stored data. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a diagram illustrating a configuration example of a monitoring and control system realized by applying a monitoring and control device according to a first embodiment; [Figure 2] FIG. 1 is a diagram illustrating an example of a hardware configuration of a monitoring and control device according to a first embodiment. [Figure 3]FIG. 1 is a diagram illustrating a configuration example of a CPU (Central Processing Unit) card that realizes a monitoring control device according to a first embodiment. [Figure 4] FIG. 1 is a diagram illustrating an example of a functional block configuration of a monitoring control device according to a first embodiment; [Figure 5] FIG. 1 is a diagram illustrating an outline of an operation of the monitoring and control device according to the first embodiment; [Figure 6] FIG. 1 is a diagram illustrating an example of data processing in a CPU card that realizes the monitoring and control device according to the first embodiment. [Figure 7] FIG. 10 is a diagram showing an example of bit assignment to data input / output pins of a memory; [Figure 8] 1 is a flowchart illustrating an example of an operation of the monitoring and control device according to the first embodiment. [Figure 9] FIG. 10 is a timing chart showing an example of a data write operation in burst mode. [Figure 10] 10 is a flowchart illustrating an example of an operation of the monitoring and control device according to the second embodiment. [Figure 11] FIG. 10 is a diagram illustrating a configuration example of a railway monitoring and control system according to a third embodiment. [Figure 12] FIG. 11 is a diagram illustrating a configuration example of a CPU card that realizes a station interface device that is a monitoring control device according to a third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] A monitoring control device, a data processing method, and a data processing program according to embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0012] Embodiment 1 FIG. 1 is a diagram illustrating a configuration example of a monitoring and control system 100 implemented by applying a monitoring and control device according to a first embodiment. The monitoring and control system 100 includes a parent station monitoring and control device 1a and a child station monitoring and control device 1b. The monitoring and control system 100 monitors and controls (sometimes referred to as monitoring and control in the following description) rivers, roads, railways, and the like, for example. The monitoring and control system 100 in FIG. 1 includes multiple monitoring and control devices 1a and 1b, but it is sufficient that there are one or more monitoring and control devices 1a and 1b.

[0013] Each monitoring control device 1a of the master station and each monitoring control device 1b of the slave station are connected via an IP (Internet Protocol) network and a router 3, and monitor and control the facilities while transmitting and receiving data as necessary. In this embodiment, the monitoring control device 1a is directly connected to the IP network, and the monitoring control device 1b is connected to the IP network via the router 3. Although not shown, the monitoring control device 1a is installed in an office or the like that centralizes the monitoring and control of multiple facilities, and is used under conditions where the surrounding environment changes little. The monitoring control device 1b of the slave station is installed inside or near each facility to be monitored and controlled, and is used under conditions where the surrounding environment changes more greatly than the monitoring control device 1a.

[0014] The monitoring and control device 1b is connected to various sensors for collecting information about the state of the facility, various devices for operating the facility, etc. For example, if the object to be monitored and controlled is a water treatment facility, temperature sensors, pumps, motors, gates, water level gauges, flow meters, etc. are connected to the monitoring and control device 1b.

[0015] FIG. 2 is a diagram illustrating an example of a hardware configuration of the monitoring and control devices 1a and 1b according to the first embodiment.

[0016] The monitoring and control devices 1a and 1b are configured with a power supply card 101, a CPU (Central Processing Unit) card 102, a hub card 103, a communication control card 104, and an IO (Input / Output) card 105. There may be multiple power supply cards 101, CPU cards 102, and hub cards 103. There may be one communication control card 104, or three or more. There may be three or fewer, or five or more IO cards 105. The combination of the above cards that configure the monitoring and control devices 1a and 1b varies depending on the functions possessed by each of the monitoring and control devices 1a and 1b.

[0017] The power supply card 101 supplies power to the other cards that make up the monitoring and control devices 1a and 1b, that is, the CPU card 102, the hub card 103, the communication control card 104, and the IO card 105.

[0018] The CPU card 102 controls the overall operation of the monitoring and controlling device 1a or 1b.

[0019] The hub card 103 is connected to the CPU card 102 and the communication control card 104 , and relays data transmitted and received between the CPU card 102 and the communication control card 104 .

[0020] The communication control card 104 functions as a network interface for connecting the monitoring and control devices 1a and 1b to an external network such as an IP network.

[0021] The IO card 105 functions as an external interface for connecting various devices installed in the facility to be monitored and controlled, and acquires data from the connected devices and outputs data to the connected devices.

[0022] Next, a description will be given of the configuration of the CPU card 102 shown in Fig. 2. Fig. 3 is a diagram showing an example of the configuration of the CPU card 102 that realizes the monitoring and control devices 1a and 1b according to the first embodiment.

[0023] The CPU card 102 includes a CPU core 121 that executes processes related to monitoring and control, a timestamp generator 122 that generates a timestamp that is time information, a memory controller 123 that has an error checking and correction (ECC) function, and a memory 124 that is a dynamic random access memory (DRAM) that is composed of three chips 125. In the following description, the chips 125 that constitute the memory 124 may be referred to as DRAM chips 125. In the example shown in FIG. 3, the memory 124 is composed of three DRAM chips 125, but the number of DRAM chips 125 that constitute the memory 124 is not limited to three.

[0024] The CPU core 121, the timestamp generator 122, and the memory controller 123 are implemented in an FPGA (Field Programmable Gate Array) 120, which is a SoC (System On Chip) device, that is, an SoC-configured FPGA 120. The timestamp generator 122 and the memory controller 123 are constructed using FPGA user logic.

[0025] FIG. 4 is a diagram illustrating an example of a functional block configuration of the monitoring and control devices 1a and 1b according to the first embodiment.

[0026] As shown in FIG. 4, the monitoring control devices 1a and 1b include a monitoring control unit 10, a data generation unit 12, an information addition unit 13, an encoding unit 14, and a storage unit 15. The data generation unit 12, the information addition unit 13, and the encoding unit 14 constitute a data processing unit 11. The monitoring control unit 10 and the data generation unit 12 are realized by a CPU core 121 of a CPU card 102 shown in FIG. 3 executing a program for operating as the monitoring control unit 10 and the data generation unit 12. The information addition unit 13 is realized by a timestamp generator 122 of the CPU card 102 shown in FIG. 3. The encoding unit 14 is realized by a memory controller 123 of the CPU card 102 shown in FIG. 3. The storage unit 15 is realized by a memory 124 of the CPU card 102 shown in FIG. 3.

[0027] FIG. 5 is a diagram illustrating an outline of the operation of the monitoring and control devices 1a and 1b according to the first embodiment.

[0028] The monitoring and control unit 10 performs monitoring and control of the facility. The data generation unit 12 generates and outputs monitoring and control data related to monitoring and control based on the results of the monitoring and control of the facility by the monitoring and control unit 10. The information addition unit 13 adds a timestamp indicating the current time to the monitoring and control data as time information and outputs the data. The encoding unit 14 adds check bits to the time-stamped monitoring and control data for error detection and correction of the monitoring and control data and outputs the data. The encoding unit 14 may generate check bits for error detection and correction for the monitoring and control data, or may generate check bits for error detection and correction for the time-stamped monitoring and control data, i.e., the monitoring and control data and the timestamp. The storage unit 15 stores the monitoring and control data to which the timestamp and check bits have been added.

[0029] Fig. 6 is a diagram showing an example of data processing in the CPU card 102 that realizes the monitoring and controlling devices 1a and 1b according to the first embodiment. Fig. 6 shows an example in which one word processed by the CPU core 121 is 32 bits, and one word of 32 bits of data is written to the DRAM chip 125 with a 16-bit data bus.

[0030] The memory 124 included in the CPU card 102 shown in Figure 6 is composed of three DRAM chips 125. The CPU core 121 outputs 32 bits of data, and a timestamp generator 122 generates and assigns a 9-bit timestamp to this 32-bit data. The memory controller 123 generates and assigns a 7-bit check bit to the 32-bit data to which the 9-bit timestamp has been assigned. The memory controller 123 also divides the total 48-bit data, to which the 9-bit timestamp and 7-bit check bit have been assigned, into three 16-bit chunks and writes them to the three DRAM chips 125 of the memory 124.

[0031] Fig. 7 is a diagram showing an example of bit assignment to data input / output pins provided in memory 124. Fig. 7 shows an example of bit assignment when performing the data processing shown in Fig. 6. For comparison, Fig. 7 shows a conventional bit assignment and a bit assignment in the monitoring control devices 1a and 1b according to the first embodiment. The conventional bit assignment refers to a case where data is stored with only a check bit added without a timestamp added.

[0032] 7, 32 bits of data generated by CPU core 121 are assigned to 16 data input / output pins D0 to D15 of each of DRAM chips #1 and #2. Seven check bits generated by memory controller 123 are assigned to seven data input / output pins D0 to D6 of DRAM chip #3. A 9-bit timestamp generated by timestamp generator 122 is assigned to nine data input / output pins D7 to D15 of DRAM chip #3. The input / output pins D7 to D15 of DRAM chip #3 to which the 9-bit timestamp is assigned are data input / output pins that were not previously used (hereinafter referred to as unused pins). By assigning the 9-bit timestamp to previously unused pins in this way, a configuration can be achieved in which a timestamp is added to data generated by CPU core 121 while preventing an increase in the number of DRAM chips 125 that make up memory 124.

[0033] FIG. 8 is a flowchart showing an example of the operation of the monitoring control devices 1a and 1b according to the first embodiment, specifically, an example of the operation of storing monitoring control data obtained in the monitoring control of a facility.

[0034] In the monitoring control devices 1a and 1b, first, the data generation unit 12 generates monitoring control data (step S11). The data generation unit 12 generates the monitoring control data based on the results of monitoring and control of the facility by the monitoring control unit 10. The results of monitoring and control of the facility include measurement values ​​from various sensors installed in the facility to be monitored and controlled, control details of devices installed in the facility, operation results of the devices installed in the facility, etc.

[0035] Next, the information adding unit 13 adds a timestamp to the monitoring and control data generated by the data generating unit 12 (step S12). The information adding unit 13 adds time information indicating the current time to the monitoring and control data as a timestamp.

[0036] Next, the encoding unit 14 adds check bits for error detection and correction to the monitoring control data to which the timestamp has been added by the information adding unit 13 (step S13).

[0037] Next, the storage unit 15 stores the data (step S14). In this step S14, the storage unit 15 stores the supervisory control data to which the check bits have been added by the encoding unit 14. That is, the supervisory control data to which the timestamp has been added by the information adding unit 13 and to which the check bits have been added by the encoding unit 14 is written to the storage unit 15 by the encoding unit 14.

[0038] As described above, the monitoring and control devices 1a and 1b according to the first embodiment generate monitoring and control data based on the results of monitoring and control of the facility, and write the data to the storage unit 15 with a timestamp and a check bit. This makes it possible to know from the timestamp the time at which data in which a bit error was detected when read was written to the storage unit 15. Therefore, by comparing the timestamp with, for example, publicly available time information on cosmic rays and lightning strikes, or monitoring log data of power supply voltage, temperature, and humidity held by the monitoring and control devices 1a and 1b, it is possible to know the possible cause of the bit error.

[0039] For example, if data read from memory unit 15 at 10:00:00 on 2024 / 04 / 11 contains an ECC error and the timestamp assigned to this data is 23:00:00 on 2023 / 04 / 10, and it is found that the power supply voltage monitoring log records a spike-like voltage increase at this time, it is possible to infer from this the cause of the ECC error, i.e., the cause of the moment the bit flip occurred.

[0040] Furthermore, the timestamp added to the monitoring and control data is written to the storage unit 15 via a data input / output pin that was previously unused among the data input / output pins of the DRAM chip 125 that constitutes the memory 124. Therefore, the timestamp can be stored as information that can be used when it becomes necessary to identify the cause of a bit error, without changing the conventional hardware configuration.

[0041] Embodiment 2 Next, a monitoring control device according to embodiment 2 will be described. The hardware configuration and functional block configuration of the monitoring control device according to embodiment 2 are the same as those of embodiment 1. In this embodiment, differences from embodiment 1 will be described.

[0042] The monitoring control devices 1a and 1b according to the second embodiment have a function of writing data in burst mode, that is, a function of continuously writing data to the memory 124. Furthermore, in one continuous data write in burst mode, the monitoring control devices 1a and 1b according to the second embodiment add a timestamp or other information to the monitoring control data in each of the successive data write processes.

[0043] Fig. 9 is a diagram showing an example of a timing chart of a data write operation in burst mode. Fig. 9 shows a timing chart when four data strings D1 to D4 are written consecutively in burst mode. In writing data in burst mode, data processing unit 11 transmits control information (Write) that commands writing of data in burst mode and an address (Col.) that indicates the position where the data is to be written to memory unit 15 at any timing synchronized with the clock (CLK), and then transmits data D1 to D4 consecutively.

[0044] Fig. 10 is a flowchart showing an example of the operation of the monitoring control devices 1a and 1b according to the second embodiment, specifically, an example of the operation of storing monitoring control data obtained in the monitoring control of a facility. Fig. 10 shows the operation corresponding to the data writing in burst mode shown in Fig. 9.

[0045] In the monitoring control devices 1a and 1b according to the second embodiment, first, the data generating unit 12 generates monitoring control data (step S21). Based on the results of monitoring and controlling the facility by the monitoring control unit 10, the data generating unit 12 generates the monitoring control data to be written to the storage unit 15 through four write processes in burst mode.

[0046] Next, the information addition unit 13 checks whether the counter is 0 (step S22). If the counter is 0 (step S22: Yes), the information addition unit 13 assigns a timestamp to the monitoring control data to be written first in burst mode (monitoring control data corresponding to data D1 shown in FIG. 9) among the monitoring control data generated by the data generation unit 12 (step S23), and increments the counter (step S24). Next, the encoding unit 14 assigns a check bit to the monitoring control data to which the timestamp has been assigned (step S25), and returns to step S22.

[0047] If the counter is not 0 (step S22: No), the information adding unit 13 checks whether the counter is 1 (step S26). If the counter is 1 (step S26: Yes), the information adding unit 13 adds other information #1 other than the timestamp to the monitoring control data to be written second in burst mode (monitoring control data corresponding to data D2 shown in FIG. 9) among the monitoring control data generated by the data generating unit 12 (step S27), and increments the counter (step S24). The other information #1 is, for example, the input voltage to the memory 124 constituting the storage unit 15. Next, the encoding unit 14 adds a check bit to the monitoring control data to which the other information #1 has been added (step S25), and returns to step S22.

[0048] If the counter is not 1 (step S26: No), the information adding unit 13 checks whether the counter is 2 (step S28). If the counter is 2 (step S28: Yes), the information adding unit 13 adds other information #2 other than the timestamp to the monitoring control data to be written third in burst mode (monitoring control data corresponding to data D3 shown in FIG. 9) among the monitoring control data generated by the data generating unit 12 (step S29), and increments the counter (step S24). The other information #2 may be, for example, the ambient temperature and humidity of the memory 124 constituting the storage unit 15. Next, the encoding unit 14 adds a check bit to the monitoring control data to which the other information #2 has been added (step S25), and returns to step S22.

[0049] If the counter is not 2 (step S28: No), the information adding unit 13 adds other information #3 other than a timestamp to the monitoring control data to be written fourth in burst mode (monitoring control data corresponding to data D4 shown in FIG. 9) among the monitoring control data generated by the data generating unit 12 (step S30), and sets the counter to 0 (step S31). The other information #3 is, for example, vibration information of the monitoring control devices 1a and 1b. Next, the encoding unit 14 adds a check bit to the monitoring control data to which the other information #3 has been added (step S32). After executing step S32, the storage unit 15 stores the data (step S33). Specifically, the storage unit 15 stores the monitoring control data to which the timestamp or any of the other information #1 to #3 and the check bit have been added, which have been generated in steps S21 to S32. In this step S33, the memory controller 123 constituting the encoding unit 14 transfers the monitoring control data, to which a timestamp or any of other information #1 to #3 and a check bit have been added, to the memory 124 constituting the storage unit 15 in burst mode.

[0050] In this way, when the monitoring control devices 1a and 1b according to the second embodiment write monitoring control data in burst mode to the memory 124 constituting the storage unit 15, they assign a timestamp and other information to each of the multiple monitoring control data. This allows the monitoring control devices 1a and 1b to store in the storage unit 15 multiple types of information that can be used in identifying the cause of bit errors. Note that the other information #1 to #3 assigned to the monitoring control data instead of a timestamp is not limited to the information described above.

[0051] Embodiment 3 In this embodiment, a specific example of supervisory control that can be realized by applying the supervisory control devices 1a and 1b described in the first and second embodiments will be described.

[0052] FIG. 11 is a diagram illustrating a configuration example of a railway monitoring and control system according to the third embodiment.

[0053] The railway system shown in Figure 11 includes a station interface (I / F) device 200 corresponding to the slave station monitoring control device 1b described in embodiments 1 and 2, a transmission central device 210 that collects data output from the station I / F device 200, and a car number reading device 220 that reads the car number information of a running train.

[0054] The station I / F device 200 is composed of a station I / F device common input / output unit 201, a duplex switching unit 202, a station I / F device CPU unit 1 system 203, and a station I / F device CPU unit 2 system 204.

[0055] Various devices installed in or around a station are connected to a station I / F device common input / output unit 201 of the station I / F device 200. In the example shown in Fig. 11, a relay interlocking device 301, a CVCF (Constant Voltage Constant Frequency) 302, a railroad crossing monitoring device 303, and an inter-station track 304 are connected to the station I / F device common input / output unit 201.

[0056] The relay interlocking device 301 is a device that controls signals and switches. The CVCF 302 is also called an AC uninterruptible power supply, and supplies power to other devices in the railway system when a power outage occurs and the power supply from the power grid is stopped. The railroad crossing monitoring device 303 is a device that acquires status information from each railroad crossing, indicating whether the crossing is open or closed. The inter-station track 304 is a device that acquires status information indicating whether a train is present in a certain section.

[0057] The station I / F device CPU unit 1 system 203 and the station I / F device CPU unit 2 system 204 of the station I / F device 200 have the same configuration, with one being set as the active system and the other as the standby system. The station I / F device CPU unit 1 system 203 and the station I / F device CPU unit 2 system 204 are realized by the monitoring control device 1b described in the first or second embodiment.

[0058] In the event of a failure, the duplex switching unit 202 switches the station I / F device CPU unit (station I / F device CPU unit 1 system 203 or station I / F device CPU unit 2 system 204) currently used as the active system to the standby system, and also switches the station I / F device CPU unit currently used as the standby system to the active system.

[0059] The station I / F device 200 acquires information about train routes, signal status, etc. from devices connected to the station I / F device common input / output unit 201, and sends the information to a transmission central device 210, which is a central aggregation device, via a communication network. The station I / F device 200 also operates signals and switches according to instructions from the transmission central device 210 to control the train routes.

[0060] Here, memory scrubbing is a well-known function that is available in general memory controllers. Memory scrubbing is a function that periodically reads the entire memory (every few seconds to few minutes) and corrects any correctable ECC 1-bit errors on the spot. ECC 2-bit errors are uncorrectable and require the device to be restarted.

[0061] This memory scrubbing technique makes it possible to determine the date and time of an error at the cyclical time granularity of the ECC execution cycle, eliminating the need to add a timestamp to the monitoring and control data as described above. However, because memory scrubbing cannot understand the meaning (context) of the data, if an uncorrectable error is found, the only safe action available is to reboot the device. Furthermore, in an operating system (OS) that uses virtual addressing, the physical memory address is not deterministic, so it is not possible to read the meaning (context) of the data from the address.

[0062] In supervisory control, there are applications that require 24-hour nonstop operation, so there is a demand to prevent restarts except in situations where a restart is truly necessary. If it were possible to perform different control depending on whether an uncorrectable error discovered by memory scrubbing is in data essential to supervisory control, the requirements of the application field could be met. For example, in the case of railway supervisory control, if there is an error in the monitoring results or control data of railway vehicles or signaling devices, a notification would be sent to the monitoring center as a serious malfunction and a restart would be initiated. On the other hand, if there is an error in data that is not essential to supervisory control, such as data in a log daemon that runs constantly, only the task (process) that handles that data would be restarted. If such a distinction could be made, the requirements of the application field could be met.

[0063] The station I / F device 200, which corresponds to the monitoring control device in this embodiment, is assumed to use a multitasking OS such as Linux (registered trademark), and for example, when switching to a monitoring control task or when the monitoring control task writes monitoring data to the storage unit 15 (memory 124), information indicating the meaning (context) (for example, task ID (Identification), data importance, etc.) is written to the ``optional data setting register'' of the FPGA that constitutes the information addition unit 13.

[0064] The station I / F device 200 is realized by the same hardware as the monitoring control devices 1a and 1b according to the first and second embodiments, but the configuration of the CPU card used in combination is partially different.

[0065] FIG. 12 is a diagram illustrating a configuration example of a CPU card 102a that realizes the station I / F device 200, which is a monitoring control device according to the third embodiment. The CPU card 102a has a configuration in which an optional data setting register 126 is added to the CPU card 102 (see FIG. 3) that realizes the monitoring control devices 1a and 1b according to the first embodiment, and the timestamp generator 122 is replaced with an optional data generator 127. In the CPU card 102a shown in FIG. 12, the same components as those in the CPU card 102 shown in FIG. 3 are assigned the same reference numerals. Description of the components assigned the same reference numerals as those in the CPU card 102 will be omitted. The optional data setting register 126 holds optional data to be added to the monitoring control data. This optional data is written to the optional data setting register 126 by the CPU core 121 at a predetermined timing. The optional data generator 127 generates optional data to be added to the monitoring control data output by the CPU core 121. That is, when the optional data generator 127 receives the monitoring control data output by the CPU core 121, it adds the optional data set in the optional data setting register 126 to the monitoring control data and outputs it to the memory controller 123. Note that the CPU card 102a may also include the timestamp generator 122 described in the first embodiment, and, for example, the data added to the monitoring control data may be switched between a timestamp and optional data as appropriate.

[0066] By configuring the storage unit 15 to store the monitoring and control data to which optional data has been added, when an uncorrectable error is detected by memory scrubbing, if the optional data added to the monitoring and control data is important data (for example, a monitoring and control task ID), the station I / F device 200 is restarted. If the optional data added to the monitoring and control data is not important data (for example, a log task ID), only the log task is restarted, and the monitoring and control operation of the entire station I / F device 200 is continued. In this way, it is possible to increase the availability of the device.

[0067] The flowchart showing the operation of the station I / F device 200 is the same as the flowchart (Figure 8) showing the operation of the monitoring control devices 1a and 1b according to the first embodiment, except that step S12 of assigning a timestamp has been changed to a step of assigning optional data.

[0068] In addition, when the station I / F device 200 operates in the burst mode described in the second embodiment, it may write the above optional data (information regarding the importance of the data to be written) as any of the above other information #1 to #3.

[0069] As described above, the station I / F device 200, which corresponds to the monitoring control device according to the third embodiment, adds information about the importance of the data to the monitoring control data when storing the monitoring control data. This makes it possible to know the importance of the data in which an uncorrectable error has been detected, and to perform different operations depending on the importance.

[0070] The configurations shown in the above embodiments are merely examples, and may be combined with other known technologies, or different embodiments may be combined with each other. It is also possible to omit or modify parts of the configurations as long as they do not deviate from the gist of the invention.

[0071] Various aspects of the present disclosure are summarized below as appendices.

[0072] (Appendix 1) A monitoring control device that performs monitoring and control of a facility, a data generating unit that generates monitoring and control data related to the monitoring and control of the facility; an information adding unit that adds a timestamp to the generated supervisory control data when the supervisory control data is generated; an encoding unit that generates check bits for error detection and correction for the supervisory control data to which a timestamp has been added, and adds the generated check bits to the supervisory control data to which the timestamp has been added, and writes the data into a storage unit; A monitoring control device comprising: (Appendix 2) when the sum of the number of bits of the supervisory control data and the number of bits of the check bits written to the storage unit in one write process is smaller than the number of input / output pins of the memory constituting the storage unit, the timestamp is written to the storage unit using input / output pins that are not used in writing the supervisory control data and the check bits; 2. The monitoring and control device according to claim 1, (Appendix 3) The information adding unit adds the time stamp to each word of the monitoring and control data. 3. The monitoring and control device according to claim 1 or 2. (Appendix 4) The storage unit supports data writing in burst mode, When the monitoring and control data is written to the storage unit in burst mode, The information adding unit generates a plurality of types of information including the timestamp, and adds any one of the plurality of types of information to each of the plurality of monitoring control data to be processed continuously in burst mode. 3. The monitoring and control device according to claim 1 or 2. (Appendix 5) The information adding unit adds information about the importance of the monitoring and control data to the monitoring and control data instead of the timestamp. 5. The monitoring and control device according to claim 1, wherein: (Appendix 6) The facility is a railway, a river, or a road. 6. The monitoring and control device according to any one of claims 1 to 5. (Appendix 7) A data processing method executed by a supervisory control device that performs supervisory control of a facility, a data generation step of generating supervisory control data relating to the monitoring and control of the facility; an information adding step of adding a time stamp to the monitoring and control data; a check bit generating step of generating check bits for error detection and correction of the supervisory control data to which a timestamp has been added; a writing step of adding the generated check bit to the supervisory control data to which the timestamp has been added and writing the data into a storage unit; A data processing method comprising: (Appendix 8) A data processing program that causes a monitoring control device that performs monitoring and control of a facility to execute data processing, a data generation step of generating supervisory control data relating to the monitoring and control of the facility; an information adding step of adding a time stamp to the monitoring and control data; a check bit generating step of generating check bits for error detection and correction of the supervisory control data to which a timestamp has been added; a writing step of adding the generated check bit to the supervisory control data to which the timestamp has been added and writing the data into a storage unit; A data processing program that causes the monitoring control device to execute the above. [Explanation of symbols]

[0073] 1a, 1b Monitoring control device, 3 Router, 10 Monitoring control unit, 11 Data processing unit, 12 Data generation unit, 13 Information addition unit, 14 Encoding unit, 15 Memory unit, 100 Monitoring control system, 101 Power supply card, 102, 102a CPU card, 103 Hub card, 104 Communication control card, 105 IO card, 120, 120a FPGA, 121 CPU core, 122 Time stamp generator, 123 Memory controller, 124 Memory, 125 DRAM chip, 126 Optional data setting register, 127 Optional data generator, 200 Station I / F device, 201 Station I / F device common input / output unit, 202 Duplex switching unit, 203 Station I / F device CPU unit 1 system, 204 Station I / F device CPU unit 2 system, 210 Transmission central device, 220 Vehicle number reader, 301 Relay interlocking device, 302 CVCF, 303 level crossing monitoring device, 304 inter-station track.

Claims

1. A monitoring control device that performs monitoring and control of a facility, a data generating unit that generates monitoring and control data related to the monitoring and control of the facility; an information adding unit that adds a timestamp to the generated supervisory control data when the supervisory control data is generated; an encoding unit that generates check bits for error detection and correction for the supervisory control data to which a timestamp has been added, and adds the generated check bits to the supervisory control data to which the timestamp has been added, and writes the data into a storage unit; A monitoring control device comprising:

2. when the sum of the number of bits of the supervisory control data and the number of bits of the check bits written to the storage unit in one write process is smaller than the number of input / output pins of a memory constituting the storage unit, the timestamp is written to the storage unit using input / output pins that are not used in writing the supervisory control data and the check bits; 2. The monitoring and control device according to claim 1.

3. the information adding unit adds the time stamp to each word of the monitoring and control data; 2. The monitoring and control device according to claim 1.

4. The storage unit supports data writing in burst mode, When the monitoring and control data is written to the storage unit in burst mode, The information adding unit generates a plurality of types of information including the timestamp, and adds any one of the plurality of types of information to each of the plurality of monitoring control data to be processed continuously in burst mode.

2. The monitoring and control device according to claim 1.

5. The information adding unit adds information about the importance of the monitoring and control data to the monitoring and control data instead of the timestamp.

5. The monitoring and control device according to claim 1.

6. The facility is a railway, a river, or a road.

2. The monitoring and control device according to claim 1.

7. A data processing method executed by a supervisory control device that performs supervisory control of a facility, a data generation step of generating supervisory control data relating to the monitoring and control of the facility; an information adding step of adding a time stamp to the monitoring and control data; a check bit generating step of generating check bits for error detection and correction of the supervisory control data to which a timestamp has been added; a writing step of adding the generated check bit to the supervisory control data to which the timestamp has been added and writing the data into a storage unit; A data processing method comprising:

8. A data processing program that causes a monitoring control device that performs monitoring and control of a facility to execute data processing, a data generation step of generating supervisory control data relating to the monitoring and control of the facility; an information adding step of adding a time stamp to the monitoring and control data; a check bit generating step of generating check bits for error detection and correction of the supervisory control data to which a timestamp has been added; a writing step of adding the generated check bit to the supervisory control data to which the timestamp has been added and writing the data into a storage unit; A data processing program that causes the monitoring control device to execute the above.

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