Semiconductor device

Abstract

To provide a highly reliable memory device in which data is held for a long time.SOLUTION: A memory device includes a driver circuit and a plurality of memory cells. The memory cells each include a transistor and a capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, and a negative potential is applied to the first gate and the second gate of the transistor in a period in which the memory cell holds data.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One aspect of the present invention relates to a memory device. In particular, a memory device that can function by utilizing semiconductor characteristics. Related to storage devices.

[0002] It should be noted that one embodiment of the present invention is not limited to the above technical fields. The technical field of the present invention relates to an article, a method, or a manufacturing method. The state may be a process, machine, manufacture, or composition of matter. Matter). [Background technology]

[0003] DRAM (Dynamic Random Access Memory) is a It is widely used as a storage device (also called memory) built into child devices. The AM memory cell is a transistor using an oxide semiconductor (oxide semiconductor transistor, Examples of applying an OS transistor (also called an OS transistor) have been proposed (for example, Patent Document 1 and Non-Patent Document 2). Permitted document 1).

[0004] Oxide semiconductor transistors have extremely low leakage current in the off state (off-state current). Therefore, applying oxide semiconductor transistors to DRAM memory cells will It is possible to manufacture a memory that operates less frequently and consumes less power.

[0005] In this specification and the like, a DRAM in which an oxide semiconductor transistor is used as a memory cell is referred to as a " "Dynamic Oxide Semiconductor DRAM" or "DOSRAM (registered trademark) de Semiconductor Random Access Memory, Dos It is called "Ram".

[0006] On the other hand, oxide semiconductors have recently been attracting attention as semiconductors that can be used in transistors. As oxide semiconductors, for example, oxides of single metals such as indium oxide and zinc oxide are used. In addition, oxides of multi-component metals are also known. Among the multi-component metal oxides, I There has been a lot of research into n-Ga-Zn oxide (also known as IGZO).

[0007] Research on IGZO has revealed that, among oxide semiconductors, it is neither single crystal nor amorphous. AAC (c-axis aligned crystalline) structure and nc( nanocrystalline structure was found (see Non-Patent Documents 2 to 4). (see).

[0008] In Non-Patent Documents 2 and 3, oxide semiconductors having a CAAC structure are used to Furthermore, the technology for fabricating a transistor is disclosed. Even oxide semiconductors with lower crystallinity than those containing SiO2 have minute crystals, as reported in Non-Patent Document 5 and and Non-Patent Document 6.

[0009] Non-Patent Document 7 describes that a transistor using an oxide semiconductor has an extremely small off-state current. It has been reported that the off-state current is extremely small. LSIs and displays using this technology have been reported. [Prior art documents] [Patent documents]

[0010] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-256820 [Non-patent literature]

[0011]

Non-licensed literature 1

Non-licensed Document 2

Non-licensed Document 4

Non-licensed Document 5

Non-licensed Document 6

Non-licensed Document 7

[0012] In OS transistors, the threshold voltage is increased by applying a negative potential to the back gate. and the voltage between the source and drain when the gate voltage Vgs relative to the source is 0V. The current Ids (also called cutoff current) can be reduced. In DRAM (DOSRAM) where transistors are used as memory cells, data is stored Can extend the duration.

[0013] However, the potential applied to the back gate of a transistor affects the electrical characteristics of the transistor. A relatively large potential was required to have an effect. Applying a large potential to the gate reduces the reliability of the transistor. There was.

[0014] One embodiment of the present invention provides a highly reliable storage device having a long data retention time. Another object of one embodiment of the present invention is to provide a novel storage device. Another embodiment of the present invention provides an electronic device having a novel storage device. One of the challenges is to

[0015] It should be noted that one embodiment of the present invention does not necessarily have to solve all of the above problems, but at least It is sufficient if the invention can solve one of the problems. Other issues include the need to improve the description, claims, drawings, etc. The above will become clear from the description, claims, drawings, etc. It is possible to extract other issues besides these. [Means for solving the problem]

[0016] One embodiment of the present invention is a memory device including a driver circuit and a plurality of memory cells. The memory cell has a transistor and a capacitor element, and the source or drain of the transistor One of the electrodes is electrically connected to one of the electrodes of the capacitor element, and the transistor has a channel forming region The transistor has a first gate and a second gate, and the first gate The first gate and the second gate have overlapping regions with the channel forming region therebetween. The driver circuit has a function of driving the first gate, and the period during which the memory cell retains data In the above, the driver circuit applies a voltage to the first gate of the transistor and to the source and drain of the transistor. The second gate of the transistor is connected to the source and A second potential is applied that is lower than the potential applied to the drain.

[0017] In the above embodiment, the second potential is lower than the first potential.

[0018] Another embodiment of the present invention is a memory device including a driver circuit and a plurality of memory cells. The memory cell has a transistor and a capacitor element, and the source or drain of the transistor One of the inputs is electrically connected to one of the electrodes of the capacitor element, and the transistor is The transistor has a first gate and a second gate, and The first gate and the second gate have overlapping regions with a channel forming region therebetween. The driver circuit has a function of driving the first gate and the second gate, and the memory cell During the data holding period, the driver circuit connects the first gate to the source of the transistor. A first potential lower than the potential applied to the source and drain is output, and the memory cell stores data. During the holding period, the driver circuit connects the second gate to the source and The transistor outputs a second potential that is lower than the potential applied to the drain.

[0019] In the above embodiment, the metal oxide is at least In (indium) or Zn ( zinc) or both.

[0020] In the above embodiment, the metal oxide contains Ga (gallium).

[0021] Another embodiment of the present invention is an electronic device including the storage device described in any of the above embodiments. [Effects of the Invention]

[0022] According to one embodiment of the present invention, a highly reliable storage device having a long data retention time is provided. According to one embodiment of the present invention, a novel storage device can be provided. According to one embodiment of the present invention, an electronic device including a novel storage device can be provided. Cut.

[0023] The description of these effects does not preclude the existence of other effects. One embodiment does not necessarily have all of these effects. Effects other than these may be clearly It is clear from the description, claims, drawings, etc. Other effects can be extracted from the claims, drawings, etc. [Brief explanation of the drawings]

[0024] [Figure 1] FIG. 2 is a block diagram showing an example of the configuration of a memory. [Figure 2] FIG. 1A is a diagram illustrating a memory cell array, and FIG. 1B is a circuit diagram showing an example of the configuration of a memory cell. [Figure 3] (A), (B), and (C) are circuit diagrams showing examples of memory cell configurations. [Figure 4] FIG. 1A is a block diagram showing an example of the configuration of a word line driver circuit, and FIG. 1B is a circuit diagram showing an example of the configuration of a circuit LVB. [Figure 5] 1A and 1B are diagrams showing examples of input and output of a word line driver circuit. [Figure 6] 1A and 1B are circuit diagrams showing examples of the configuration of a potential generating circuit. [Figure 7] FIG. 2 is a diagram for explaining a configuration example of a memory cell array and a bit line driver circuit. [Figure 8] FIG. 2 is a diagram illustrating an example of a circuit configuration. [Figure 9] 4 is a timing chart illustrating an example of the operation of the storage device. [Figure 10] 4 is a timing chart illustrating an example of the operation of the storage device. [Figure 11] 4 is a timing chart illustrating an example of the operation of the storage device. [Figure 12] 1 is a cross-sectional view showing a configuration example of a semiconductor device. [Figure 13] (A), (B), and (C) are cross-sectional views showing examples of transistor structures. [Figure 14] 1A is a top view illustrating an example of a transistor structure, and FIGS. 1B and 1C are cross-sectional views illustrating an example of a transistor structure. [Figure 15] 1A is a top view illustrating an example of a transistor structure, and FIGS. 1B and 1C are cross-sectional views illustrating an example of a transistor structure. [Figure 16] 1A is a top view illustrating an example of a transistor structure, and FIGS. 1B and 1C are cross-sectional views illustrating an example of a transistor structure. [Figure 17] 1A is a top view illustrating an example of a transistor structure, and FIGS. 1B and 1C are cross-sectional views illustrating an example of a transistor structure. [Figure 18] 1A is a top view illustrating an example of a transistor structure, and FIGS. 1B and 1C are cross-sectional views illustrating an example of a transistor structure. [Figure 19] 1A is a top view illustrating a structural example of a transistor, and FIG. 1B is a perspective view illustrating a structural example of a transistor. [Figure 20] 1A and 1B are cross-sectional views showing examples of the structure of a transistor. [Figure 21] (A) and (C) are cross-sectional views of a transistor, and (B) and (D) are diagrams showing the electrical characteristics of the transistor. [Figure 22] A diagram explaining the product image. [Figure 23] (A), (B), (C), (D), (E1), and (E2) are diagrams showing examples of the configuration of electronic devices. [Figure 24] FIG. 10 is a graph showing temperature dependence of VG-ID characteristics of a transistor. [Figure 25] (A), (B), and (C) are diagrams explaining a method for calculating the operating frequency. [Figure 26] FIG. 10 is a diagram showing the calculation results of the operating frequency. [Figure 27] (A) A perspective view showing a transistor structure, and (B) a graph showing the back gate voltage dependence of Id-Vg characteristics. [Figure 28] 1A is a graph showing the dependence of field-effect mobility μFE on the back-gate voltage Vbg, and FIG. 1B is a graph showing the dependence of threshold voltage Vth on the back-gate voltage Vbg. [Figure 29] Block diagram of 64kb DOSRAM. [Figure 30] (A) Id-Vg characteristics of a CAAC-IGZO FET, (B) and (C) operating voltages. [Figure 31] FIG. 10 shows the evaluation results of the data retention status of DOSRAM. [Figure 32] (A) and (B) Evaluation results of retention time and yield at an ambient temperature of 85°C. [Figure 33] FIG. 2A is a block diagram of a negative potential generating circuit, and FIG. 2B is a diagram showing the operating waveforms of the negative potential generating circuit. [Figure 34] (A) A diagram showing the operating conditions of the ring oscillator, and (B) a diagram showing the operating conditions of the charge pump. [Figure 35] (A) Circuit diagram of the comparator, (B) diagram showing the operating waveforms of the comparator. [Figure 36] Estimated power consumption and area for 1Mb DOSRAM. [Figure 37] A photo of the prototype DOSRAM chip. DETAILED DESCRIPTION OF THE INVENTION

[0025] Hereinafter, embodiments will be described with reference to the drawings. It is possible to implement the invention in various forms without departing from the spirit and scope of the invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0026] In addition, the following embodiments can be combined as appropriate. When a plurality of configuration examples are shown in one embodiment, the configuration examples may be combined with each other as appropriate. It is possible to do this.

[0027] In the drawings attached to this specification, the components are classified by function and are separated into blocks independent of each other. Although the block diagram is shown as a block, the actual components are completely separated by function. This can be difficult, and one component may be involved in multiple functions.

[0028] In addition, in the drawings, the size, thickness of layers, regions, etc. may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. and is not limited to the shapes or values ​​shown in the drawings.

[0029] In addition, in drawings, etc., the same elements, elements having similar functions, or elements made of the same material Alternatively, elements formed at the same time may be given the same reference numerals, and the explanation of such repetitions may be omitted. The 'myo' may be omitted.

[0030] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer" It may be possible to change the term to

[0031] In addition, in this specification, terms indicating placement such as "above" and "below" refer to the positions of components. The relationship is not limited to being "directly above" or "directly below." For example, If the expression "gate electrode on insulating layer" is used, it means that there are other components between the gate insulating layer and the gate electrode. Do not exclude anything that contains elements.

[0032] In addition, in this specification, ordinal numbers such as "first," "second," and "third" refer to components. This is added to avoid confusion and is not intended to limit the number.

[0033] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "of" is not subject to any particular restrictions as long as it allows the transmission and reception of electrical signals between connected objects. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. switching elements such as capacitors, resistors, inductors, capacitors, and other various functions. This includes elements such as

[0034] In this specification, the term "voltage" refers to the difference between a certain potential and a reference potential (for example, ground potential). Therefore, voltage and potential difference can be interchanged. can be done.

[0035] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals, including a drain (drain terminal, drain drain region, or drain electrode) and source (source terminal, source region, or source electrode) ) and a channel forming region is formed between the source and drain. In this specification and the like, a channel is formed between the The region refers to the region through which the current mainly flows.

[0036] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. .

[0037] Unless otherwise specified, in this specification and the like, the off-state current refers to the current that flows when a transistor is off. This refers to the drain current when the device is in a non-conducting state (also known as a cut-off state). Unless otherwise specified, for n-channel transistors, the voltage of the gate relative to the source is When Vgs is lower than the threshold voltage Vth, in a p-channel transistor, This refers to the state in which the gate voltage Vgs is higher than the threshold voltage Vth. The off-state current of a transistor is the voltage Vgs of the gate relative to the source that is equal to the threshold voltage. This may be referred to as the drain current when the voltage is lower than Vth.

[0038] In the above description of the off-state current, the drain may be read as the source. The current may refer to the source current when the transistor is in the off state. In this specification and the like, the off-state current is also referred to as leakage current. refers to the current that flows between the source and drain when the transistor is in the off state There are cases where this happens.

[0039] In this specification, the term "metal oxide" is used in a broad sense. Metal oxides are oxide insulators, oxide conductors (transparent oxide conductors, They are divided into semiconductors, oxide semiconductors, etc. It is classified as.

[0040] For example, when a metal oxide is used in a channel formation region of a transistor, the metal oxide In other words, metal oxides have amplifying, rectifying, and When the metal oxide has at least one switching function, the metal oxide is called a metal oxide semiconductor. (metal oxide semiconductor). Specifically, a transistor having a metal oxide in a channel formation region is called an "oxide semiconductor transistor." Similarly, the above-mentioned “oxide semiconductor transistor” can be called an “OS transistor.” The "transistor using this method" is also a transistor having a metal oxide in a channel formation region.

[0041] In this specification and the like, metal oxides containing nitrogen are also referred to as metal oxides (metal ox). Metal oxides containing nitrogen are sometimes called metal oxynitrides (metal oxynitrides). Metal oxides may also be called metal oxynitrides. Details of metal oxides will be discussed later. do.

[0042] (Embodiment 1) In this embodiment, a configuration example of a storage device according to one embodiment of the present invention will be described. The memory device according to one embodiment of the present invention is a memory device that can function by utilizing the characteristics of semiconductors. , also called memory.

[0043] <Memory configuration example> FIG. 1 is a block diagram showing an example of the configuration of a memory 100 according to an embodiment of the present invention. The memory cell array 100 includes a peripheral circuit 111 and a memory cell array 201 (referred to as "Memory The peripheral circuit 111 includes a row decoder 121. , word line driver circuit 122, bit line driver circuit 130, output circuit 140, negative potential The circuit includes a generating circuit 150, a negative potential generating circuit 151, and a control logic circuit 160. In the drawings described in this specification, the flow of main signals is indicated by arrows or lines. Power lines, etc. may be omitted.

[0044] The bit line driver circuit 130 includes a column decoder 131, a precharge circuit 132, a The precharge circuit 132 includes a sense amplifier 133 and an input / output circuit 134. The sense amplifier 133 has a function of precharging the line BL. The input / output circuit 134 has a function of writing a data signal to the wiring BL and amplifying the data signal. and a function of outputting a data signal read from the wiring BL to the output circuit 140. The column decoder 131, the precharge circuit 132, the sense amplifier 133, etc. The details will be explained in the second embodiment.

[0045] The wiring BL, the wiring WL, and the wiring WLB are the memory cells included in the memory cell array 201. This is the wiring connected to memory cell 211 (labeled "Memory Cell" in Figure 1). The amplified data signal is output via an output circuit 140 as a digital signal. The data signal RDATA is output to the outside of the memory 100.

[0046] The memory 100 is supplied with a low power supply potential VSS and a high voltage VSS for the peripheral circuit 111 as external power supplies. A power supply potential VDD and a high power supply potential VIH for the memory cell array 201 are supplied. The high power supply potential VDD is a potential higher than the low power supply potential VSS. The potential VIH is set to a potential higher than the high power supply potential VDD or the same potential as the high power supply potential VDD. It is possible.

[0047] Furthermore, the negative potential generating circuit 150 generates a low power supply potential VLL from an externally supplied power supply. The negative potential generating circuit 151 generates the low power supply potential VBL. The power supply potential VBL is a potential lower than the low power supply potential VSS. The generator circuit 150 and the negative potential generator circuit 151 are not provided, and the low power supply potential VLL and The low power supply potential VBL may be supplied from outside the memory 100.

[0048] The memory 100 includes control signals (CE, WE, RE), an address signal ADDR, a data signal The address signal ADDR is input from the row decoder 121 and and WDATA is input to the column decoder 131, and WDATA is input to the input / output circuit 134.

[0049] The control logic circuit 160 processes external input signals (CE, WE, RE). and generates control signals for the row decoder 121 and the column decoder 131. WE is the write enable signal, and RE is the read enable signal. The signals processed by the control logic circuit 160 are not limited to these. Instead, other control signals may be input as needed.

[0050] In the memory 100, the above-mentioned circuits, signals, and potentials may be appropriately controlled as needed. Alternatively, other circuits, other signals, or other potentials may be added. stomach.

[0051] Here, by applying OS transistors to the transistors constituting the memory cells 211, Since the OS transistor has a very small off-state current, it is possible to write data to the memory cell 211. Therefore, the data stored in the memory cell 211 can be retained for a long time. This reduces the frequency of the read operation, making the memory 100 a memory with low power consumption. Note that the OS transistor will be described in detail in Embodiments 3 and 4. Reveal.

[0052] The OS transistor is a thin film transistor and is stacked on a semiconductor substrate. For example, the transistors constituting the peripheral circuit 111 may be formed on a single crystal silicon substrate. A Si transistor formed in the vicinity of the substrate can be applied. The edge circuit 111 is capable of high-speed operation. The cell 211 can be stacked above the peripheral circuit 111 .

[0053] FIG. 2A shows the details of the memory cell array 201. , m (m is an integer greater than or equal to 1) items in a column, n (n is an integer greater than or equal to 1) items in a row, totaling m × n items The memory cells 211 are arranged in a matrix. The addresses of the memory cells 211 are also shown, [1,1], [m,1], [i,j], [ [1,n], [m,n] (i is an integer between 1 and m, and j is an integer between 1 and n) are the memory This is the address of cell 211.

[0054] Each memory cell 211 is connected to a wiring BL, a wiring WL, and a wiring WLB. The memory cell array 201 includes n wirings BL (BL(1) to BL(n)) and m wirings WL (WL(1) to WL(m)) and m wirings WLB (WLB(1) ) to WLB(m). As shown in FIG. 2(A), The recell 211 is connected to the word line driver circuit via the wiring WL(i) and the wiring WLB(i). 122 and is electrically connected to the bit line driver circuit 130 via wiring BL(j). are connected to the network.

[0055] <Memory cell configuration example> FIG. 2B is a circuit diagram showing a configuration example of the memory cell 211. As shown in FIG.

[0056] The memory cell 211 includes a transistor M11 and a capacitance element CA. The DISTA M11 is a front gate (sometimes simply called a gate) and a back gate. It has.

[0057] One of the source and drain of the transistor M11 is electrically connected to the first terminal of the capacitance element CA. The other of the source and drain of the transistor M11 is connected to the wiring BL. The gate of the transistor M11 is connected to the wiring WL. The back gate is connected to the wiring WLB. The second terminal of the capacitance element CA is connected to the wiring CAL. and is connected.

[0058] The wiring BL functions as a bit line, and the wiring WL functions as a word line. L functions as a wiring for applying a predetermined potential to the second terminal of the capacitance element CA. The wiring WLB is used as a wiring for applying a potential to the back gate of the transistor M11. By applying an arbitrary potential to the wiring WLB, the threshold voltage of the transistor M11 is The voltage can be increased or decreased by a small amount.

[0059] The transistor M11 connects the first terminal of the capacitance element CA and the line BL in a conductive or non-conductive state. The writing or reading of data is performed by connecting the wiring WL. A potential of a high level is applied to the first terminal of the capacitance element CA and the wiring BL to bring the first terminal of the capacitance element CA and the wiring BL into a conductive state. That is, the memory cell 211 stores charge in the capacitance element CA. The memory cell 211 is a memory that stores data. The data stored in the memory cell 211 is transferred via the wiring BL and and transistor M11.

[0060] The transistor M11 is a transistor having a metal oxide in the channel formation region. For example, the channel shape of the transistor M11 can be In the composition region, indium, element M (element M is aluminum, gallium, yttrium, copper , vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium Aluminum, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten or magnesium), or zinc In particular, metal oxides of indium, gallium, and zinc can be used. An oxide is preferred.

[0061] Since the off-state current of the OS transistor is very small, the OS transistor is used as the transistor M11. By using the memory cell 211, data written in the memory cell 211 can be retained for a long time. Therefore, the frequency of refreshing the memory cell 211 can be reduced, and the memory 1 00 can be used as a memory with low power consumption.

[0062] Alternatively, by using an OS transistor as the transistor M11, This can eliminate the need for refresh operations, or the OS transistor can be connected to transistor M11. By using a register, multi-value data or analog data is stored in the memory cell 211. It is possible.

[0063] By using an OS transistor as the transistor M11, the above-mentioned DOSRAM is configured. It is possible.

[0064] <Memory cell configuration example 2> The memory cell 211 is not limited to the above configuration. The memory cell 212 is another example of the configuration of the memory cell 211.

[0065] The memory cell 212 includes a transistor M12, a transistor M13, a capacitance element CB, and The transistor M12 has a front gate and a back gate.

[0066] One of the source and drain of the transistor M12 is connected to the first terminal of the capacitance element CB, and and the gate of the transistor M13, and the source or The other of the drains is connected to the wiring WBL. The back gate of the transistor M12 is connected to the line WL, and the back gate of the transistor M13 is connected to the line WLB. The second terminal of the capacitance element CB is connected to the wiring CAL. One of the source and drain of the transistor M13 is connected to the wiring SL. The other end of the drain is connected to the wiring RBL.

[0067] The wiring WBL functions as a write bit line, and the wiring RBL functions as a read bit line. The wiring WL functions as a word line. The wiring CAL is connected to the second terminal of the capacitance element CB. The wiring WLB functions as a wiring for applying a constant potential. It functions as a wiring for applying a potential to the back gate of 2. By applying a voltage V 1 , the threshold voltage of transistor M12 can be increased or decreased.

[0068] The transistor M12 connects the first terminal of the capacitance element CB and the line WBL in a conductive or non-conductive state. It has the function of a switch.

[0069] To write data, a high-level potential is applied to the line WL, and the transistor M12 is turned on. By electrically connecting the first terminal of the capacitance element CB to the wiring WBL, Specifically, when the transistor M12 is in a conductive state, A potential corresponding to the data is applied to the first terminal of the capacitance element CB and the first terminal of the transistor M13. The potential is written to the gate. After that, a low level potential is applied to the wiring WL, and the transistor By making the transistor M12 non-conductive, the potential of the first terminal of the capacitance element CB and the The potential of the gate of transistor M13 is maintained.

[0070] Data is read by applying a predetermined potential to the line SL. The current flowing between the source and drain of transistor M13 is equal to the gate and the potential of one of the source and drain of the transistor M13 (the wiring SL). This current is determined by the source or drain of the transistor M13. Therefore, the potential of the other of the source or drain of the transistor M13 is determined. By reading out the potential of the wiring RBL connected to the first terminal (or The potential held in the gate of transistor M13 can be read out. The potential held at the first terminal of the capacitance element CB (or the gate of the transistor M13) Therefore, the data written in the memory cell 212 can be read.

[0071] The transistor M12 has a metal oxide in the channel formation region. OS transistors have a very small off-state current. Therefore, by using an OS transistor for the transistor M12, it is possible to write to the memory cell 212. The transistor M13 can hold the written data for a long time. For example, an OS transistor may be used for the transistor M13, or a Si transistor may be used. A transistor may also be used.

[0072] The memory cell 212 is a gain cell type memory cell having two transistors and one capacitance element. Even if the capacitance of the capacitive element is small, the gain cell type memory cell can transfer the accumulated charge to the most recent By amplifying it with a transistor, it can function as a memory. By using an OS transistor with extremely low off-state current for transistor M12, The memory cell 212 can retain the accumulated charge even during the period when the power supply is stopped. It has the properties of a non-volatile memory. It is a gain cell type memory that uses OS transistors. In this specification, a memory configured by cells is referred to as "NOSRAM (Nonvolatile RAM)." ile Oxide Semiconductor Random Access Me NOSRAM is called "memory." Data is rewritten by charging and discharging the capacitance element. In principle, there is no limit to the number of times it can be rewritten.

[0073] In addition, the memory cell 212 has a wiring WBL and a wiring RBL integrated into one wiring BL. The wiring WBL and the wiring RBL may be combined into a single wiring BL. An example is shown in FIG. 3(B).

[0074] The memory cell 213 shown in FIG. 3B has a source or drain of a transistor M12. The other of the source and drain of the transistor M13 is connected to the wiring BL. That is, the memory cell 213 has a write bit line and a read bit line. In this case, when writing data, It is preferable that SL is in an electrically floating state.

[0075] <Memory cell configuration example 3> The memory cell 212 is a gain cell type memory cell with three transistors and one capacitance element. The memory cell 212 may be a gain cell type memory cell having three transistors and one capacitor. An example of the configuration in this case is shown in FIG. 3(C).

[0076] The memory cell 214 shown in FIG. 3C includes transistors M14 to M16. , and a capacitance element CC. The transistor M14 has a front gate and a back gate. It has.

[0077] One of the source and drain of the transistor M14 is connected to the first terminal of the capacitance element CC, and and the gate of the transistor M15, and the source or The other of the drains is connected to the wiring BL. The back gate of the transistor M14 is connected to the wiring WLB. The second terminal of the capacitance element CC is connected to the line CAL and the source or drain of the transistor M15. The other of the source or drain of transistor M15 is electrically connected to , electrically connected to one of the source and drain of the transistor M16. The other of the source and drain of the transistor M16 is connected to the wiring BL. The gate of 6 is connected to the wiring RWL.

[0078] The wiring BL functions as a bit line, the wiring WL functions as a write word line, and the wiring R The line WL functions as a read word line. The line CAL is connected to the second terminal of the capacitance element CC. It functions as a wiring for applying a potential (for example, a low-level potential as a predetermined potential). The line WLB applies a potential to the back gate of the transistor M14. By applying an arbitrary potential to the wiring WLB, The threshold voltage of transistor M14 can be increased or decreased.

[0079] The transistor M14 connects the first terminal of the capacitance element CC and the line BL in a conductive or non-conductive state. The transistor M16 functions as a switch to connect the source of the transistor M15 Or, it functions as a switch that connects the other drain and the wiring BL to conduction or non-conduction. Has.

[0080] To write data, a high-level potential is applied to the line WL, and the transistor M14 is turned on. The first terminal of the capacitance element CC is electrically connected to the wiring BL. Specifically, when the transistor M14 is in a conductive state, the data to be written is transmitted to the wiring BL. A potential corresponding to the first terminal of the capacitance element CC and the gate of the transistor M15 is applied. Then, a low level potential is applied to the wiring WL, and the transistor M By making the transistor 14 non-conductive, the potential of the first terminal of the capacitance element CC and the The potential of the gate of transistor M15 is maintained.

[0081] To read data, a predetermined potential is applied to the line BL (precharge), and then the line B L is electrically floating (floating) and a high-level potential is applied to the wiring RWL. By applying a high-level potential to the wiring RWL, The transistor M16 is in a conductive state and is connected to the other of the source and drain of the transistor M15. The line BL is electrically connected. At this time, the source and drain of the transistor M15 A voltage corresponding to the potential difference between the wiring BL and the wiring CAL is applied between the two terminals of the transistor M. The current flowing between the source and drain of transistor M15 is determined by the potential of the gate of transistor M15 and and the voltage applied between the source and drain.

[0082] Here, the potential of the wiring BL is the potential of the current flowing between the source and drain of the transistor M15. Since the potential of the wiring BL changes depending on the current, the first capacitance of the capacitance element CC can be read by reading the potential of the wiring BL. The potential held at the terminal (or the gate of transistor M15) can be read out. That is, the voltage held at the first terminal of the capacitance element CC (or the gate of the transistor M15) is The data written in the memory cell 214 can be read from the potential.

[0083] The transistor M14 is a transistor having a metal oxide in the channel formation region (OS OS transistors have extremely low off-state current, By using an OS transistor as the transistor M14, The data can be retained for a long time. M16 is not particularly limited. For example, the transistors M15 and M16 An OS transistor or a Si transistor may be used.

[0084] Note that other configuration examples of the memory cell 211 have been described with reference to FIGS. 3A to 3C. However, the configuration of the memory cell 211 is not limited to these examples, and the circuit configuration can be changed as appropriate. can.

[0085] <Example of word line driver circuit configuration> FIG. 4A is a block diagram showing an example of the configuration of the word line driver circuit 122. As shown in FIG.

[0086] The word line driver circuit 122 has a function of driving the wiring WL that functions as a word line. The word line driver circuit 122 receives the lines WL and W from the row decoder 121. Signals WI and WIB are input to drive LB. The signal WIB is a digital signal that can be expressed as a high level or a low level, and the signal WI B is an inverted signal obtained by inverting the logic of the signal WI.

[0087] Since there are m wires WL and m wires WLB, the signals WI and WI The number of W1 through W1(m) is also m. These are represented as IB(1) through WIB(m).

[0088] The row decoder 121 is supplied with a low power supply potential VSS and a high power supply potential VDD. Therefore, the potential corresponding to the high level of the signals WI and WIB is the high power supply potential VDD. The potential corresponding to the low level of the signals WI and WIB is the low power supply potential VSS. .

[0089] On the other hand, in the memory cell array 201, the potential corresponding to the high level of the wiring WL is The high power supply potential VIH is used for the wiring WL, and the low power supply potential WL is used for the wiring WL. A low power supply potential VBL is supplied to the wiring WLB.

[0090] Therefore, the word line driver circuit 122 detects whether the input signal is high or low. The function to adjust the bell, or high and low levels (also called level adjustment) The wiring WL (represented as WL(1) to WL(m) in FIG. 4(A)) is driven by the input signal. The word line driver circuit 122 has a function (also called a buffer) that adds the ability to , m circuits LVB, which are represented as LVB(1) to LVB(m) in FIG. 4(A).

[0091] Further, the low power supply potential VBL is input to the word line driver circuit 122, and the low power supply potential VB L is output to the wiring WLB (represented as WLB(1) to WLB(m) in FIG. 4(A)). .

[0092] <Example of circuit LVB configuration> FIG. 4B is a circuit diagram showing an example of the configuration of the circuit LVB.

[0093] The circuit LVB includes n-channel transistors 13 to 21 and p-channel transistors 13 to 21. The circuit LVB has a plurality of channel transistors 33 to 41. Terminal WI_IN, input terminal WIB_IN, wiring VIH_IN, wiring VSS_IN, wiring V The input terminal WL_IN and the output terminal WL_OUT are also included.

[0094] The signal WI is input to the input terminal WI_IN of the circuit LVB, and the signal WI is input to the input terminal WIB_IN. The signal WIB is input to the line VIH_IN, the high power supply potential VIH is input to the line VS The low power supply potential VSS is input to S_IN, and the low power supply potential VLL is input to the wiring VLL_IN. Then, the circuit LVB outputs a signal to drive the wiring WL from the output terminal WL_OUT. Output.

[0095] In the circuit LVB, either the source or the drain of the transistor 13 is connected to the The other of the source and drain of the transistor 13 is electrically connected to the line VSS_IN. , one of the source or drain of transistor 34 and the gate of transistor 35 The gate of the transistor 13 is electrically connected to the input terminal WI_IN and the The source or drain of the transistor 34 is electrically connected to the gate of the transistor 34. The other end is electrically connected to one of the source and drain of the transistor 33. The other of the source and drain of the resistor 33 is electrically connected to the wiring VIH_IN. do.

[0096] One of the source and drain of the transistor 14 is electrically connected to the wiring VSS_IN. The other of the source or drain of transistor 14 is connected to the source or drain of transistor 36. The transistor 33 is electrically connected to one of the drains and the gate of the transistor 33. The gate of the transistor 14 is electrically connected to the input terminal WIB_IN and the gate of the transistor 36. The other of the source and drain of the transistor 36 is connected to the and the source or drain of the transistor 35. The other end of the drain is electrically connected to the wiring VIH_IN. The other of the source or drain of transistor 6 and the other of the source or drain of transistor 35 The connection point is called a node N11, and other elements electrically connected to the node N11 are More details will be given later.

[0097] Transistor 13, transistor 14, and transistors 33 to 3 6, the potential corresponding to the high level of the input signals WI and WIB is set to the high power supply potential. It has a level adjustment function that converts VDD to the high power supply potential VIH.

[0098] In the circuit LVB, either the source or the drain of the transistor 15 is connected to the wiring VSS_IN, and the other of the source and drain of the transistor 15 is One of the source or drain of transistor 37, the gate of transistor 16, and The gate of transistor 15 is electrically connected to the gate of node N1. 1 and the gate of transistor 37. The other of the source and drain is electrically connected to the wiring VIH_IN. The other of the source or drain of the transistor 15 and the source or drain of the transistor 37 The connection between one of the inputs, the gate of transistor 16, and the gate of transistor 38 , node N12, and other elements electrically connected to node N12 will be described later. do.

[0099] One of the source and drain of the transistor 16 is electrically connected to the wiring VSS_IN. The other of the source or drain of transistor 16 is connected to the source or drain of transistor 38. and the other of the source or drain of transistor 38. The other end is electrically connected to the wiring VIH_IN. or the connection between the other of the drain and one of the source or drain of the transistor 38 , node N13, and other elements electrically connected to node N13 will be described later. do.

[0100] Transistors 15 and 37 generate the inverse of the signal at node N11. It has the function of

[0101] In the circuit LVB, either the source or the drain of the transistor 18 is connected to the wiring VLL_IN, and the other of the source and drain of the transistor 18 is The transistor 17 is electrically connected to either the source or the drain of the transistor 17. The other of the source or drain of the transistor 39 is connected to the other of the source or drain of the transistor 39. and the gate of transistor 20, and the source or drain of transistor 39. The other drain is electrically connected to the wiring VIH_IN. The gate of the transistor 39 is electrically connected to the node N12 and the gate of the transistor 39.

[0102] One of the source and drain of the transistor 20 is electrically connected to the wiring VLL_IN. The other of the source or drain of the transistor 20 is connected to the source or drain of the transistor 19. and the other of the source or drain of the transistor 19. On the other hand, one of the source or drain of transistor 40 and the gate of transistor 18 The other of the source and drain of the transistor 40 is electrically connected to the wiring VIH The gate of the transistor 19 is electrically connected to the node N13 and The source of the transistor 20 is electrically connected to the gate of the transistor 40. the connection between the other of the source or drain of the transistor 19 and the source or drain of the transistor 20. The node N14 is referred to as a node N14, and other elements electrically connected to the node N14 will be described later. Describe.

[0103] Transistors 17 to 20, transistor 39, and transistor 40 The potentials corresponding to the low level of the signals at the nodes N12 and N13 are set to the low power supply potential It has a level adjustment function that converts VSS to a low power supply potential VLL.

[0104] In the circuit LVB, either the source or the drain of the transistor 21 is connected to the wiring VLL_IN, and the other of the source and drain of the transistor 21 is The source or drain of the transistor 41 is electrically connected to the output terminal WL_OUT. The gate of transistor 21 is connected to node N14 and the gate of transistor 41. The other of the source and drain of the transistor 41 is electrically connected to the It is electrically connected to the line VIH_IN.

[0105] The transistor 21 and the transistor 41 connect the signal at the node N14 to the output terminal WL It has the function of a buffer that outputs from _OUT.

[0106] <Example of input / output of word line driver circuit> FIG. 5A is a diagram showing an example of inputs and outputs of the word line driver circuit 122. As shown in FIG.

[0107] 5A, the signals WI and W input to the word line driver circuit 122 are IB, the wiring WL driven by the word line driver circuit 122, and the wiring WLB. The signal WI, the signal WIB, the wiring WL, and the wiring WLB are respectively Since there are m, one of them (WI(i), WIB(i), wiring WL(i), and W LB(i)) (i is an integer between 1 and m) will be used as an example.

[0108] The vertical axis of FIG. 5(A) represents the potential, and the potentials are, from high to low, the high power supply potential VIH, the high power supply potential V DD, low power supply potential VSS, low power supply potential VLL, low power supply potential VBL. do.

[0109] In FIG. 5A, T1 and T2 indicate times, and the signals WI(i) and WIB(i ) and the wiring WL(i) is driven at approximately the same time. The input signal WI(i) and signal WIB(i) and the wiring WL(i) are driven. There may be delays in the signal, and the signal may be distorted or contain noise. ) shows the waveform in the ideal case.

[0110] As shown in FIG. 5A, the signals WI(i) and WIB(i) are connected to the high power supply potential VD It is a digital signal that represents a high or low level at the power supply potential VSS or VSS. The signal WI(i) is a memory cell electrically connected to the wiring WL(i) and the wiring WLB(i). When data is written to or read from the signal 211, the signal (The signal WIB is an inverted signal of the signal WI, and therefore is at a low level.)

[0111] When the signal WI(i) is at a low level, the word line driver circuit 122 When the signal WI(i) is at a high level, a low power supply potential VLL is output to the wiring WL(i). The word line driver circuit 122 outputs the power supply potential VIH to the wiring WLB(i). Outputs the low power supply potential VBL.

[0112] Alternatively, the word line driver circuit 122 drives the line WLB in addition to the line WL. When the word line driver circuit 122 drives the wiring WLB, for example, This is done by adding a circuit LVB to the driver circuit 122.

[0113] FIG. 5B shows an example of inputs and outputs of the word line driver circuit 122, similar to FIG. 5A. As shown in FIG. 5B, for example, the word line driver circuit 122 outputs a signal WI When (i) is at a low level, a low power supply potential VBL is output to the wiring WLB(i), and a signal WI( When WLB(i) is at a high level, the line WLB(i) is connected between the high power supply potential VDD and the low power supply potential VSS. It is possible to output a potential of

[0114] In this manner, the word line driver circuit 122 generates the signals WI(i) and WIB(i). By changing the high level or low level, or the high level and low level, L(i), or the wiring WL(i) and the wiring WLB(i) are driven.

[0115] <Negative potential generation circuit> Next, the circuits 54 and 55 applicable to the negative potential generating circuit 150 and the negative potential generating circuit 151 will be described. An example of the configuration of the circuit 55 is shown in FIG. 6(A) and FIG. 6(B).

[0116] The circuit 54 and the circuit 55 are step-down charge pumps, and apply a low power supply voltage to the input terminal IN. The power supply potential VSS is input, and the low power supply potential VLL or VBL is output from the output terminal OUT. Here, as an example, the number of stages in the basic circuit of the charge pump circuit is set to four. However, the present invention is not limited to this and the charge pump circuit may be configured with any number of stages.

[0117] The circuit 54 shown in FIG. 6A includes transistors M21 to M24, and The capacitors C21 to C24 are included. The transistor M24 is an n-channel transistor.

[0118] The transistors M21 to M24 are connected between the input terminal IN and the output terminal OUT. The transistors M21 to M24 are connected in series. The gate and either the source or the drain are electrically connected to form a transistor. The transistors M21 to M24 function as diodes. The gates of the transistors M1 to M24 are connected to the capacitors C21 to C24, respectively. are electrically connected.

[0119] A clock signal CLK is input to one electrode of the odd-numbered capacitor elements C21 and C23. The clock signal CLKB is input to one electrode of the even-numbered capacitor elements C22 and C24. The clock signal CLKB is an inverted clock signal obtained by inverting the phase of the clock signal CLK. is.

[0120] The circuit 54 reduces the low power supply potential VSS input to the input terminal IN to a low power supply potential VLL The circuit 54 has a function of generating a clock signal CLK and a low power supply potential VBL. By supplying only the clock signal CLKB, the low power supply potential VSS can be lowered to the low power supply potential VLL. Alternatively, a low power supply potential VBL can be generated.

[0121] The circuit 55 shown in FIG. 6B includes a p-channel transistor M31 The other components are the same as those in the circuit 54. Using Ming as a reference.

[0122] <Transistor M11> As described above, transistors M11, M12, and M1 An OS transistor having a back gate can be used for the transistor 4. The threshold voltage can be increased or decreased by applying a potential to the back gate. In other words, by increasing the potential applied to the back gate of an OS transistor, the threshold voltage The voltage is shifted to the negative side, and the potential applied to the back gate is lowered, thereby lowering the threshold voltage. The pressure shifts to the positive.

[0123] That is, the potential applied to the back gate (low power supply potential VBL in this specification) By lowering the gate voltage Vgs to the source, the difference between the source and drain The current Ids (also called cutoff current) that flows between the By reducing the current, the retention time of the data written in the memory cell 211 can be extended. can be done.

[0124] In addition, the potential applied to the front gate when the transistor is not conducting (off state) is set to a low voltage. By setting the potential lower than the power supply potential VSS (low power supply potential VLL in this specification, etc.), This reduces the current flowing between the source and drain of the transistor. When conducting, applying a low power supply potential VLL to the front gate allows the low power supply potential VBL and Even if the potential difference of the power supply potential VSS is reduced, the current that flows between the source and drain of the transistor The current can be reduced.

[0125] By reducing the potential difference between the low power supply potential VBL and the low power supply potential VSS, The insulating film between the gate and the channel forming region (also called the gate insulating film or gate insulating layer) (c) can reduce the electric field strength applied to the transistor, improving its reliability. That is, the electric field stress applied to the transistor can be reduced. Therefore, the reliability of the transistor can be improved. This makes it possible to provide a long-lasting and highly reliable storage device.

[0126] Note that this embodiment mode may be implemented in appropriate combination with other embodiment modes described in this specification. It is possible.

[0127] (Embodiment 2) In this embodiment, a configuration example of a memory cell array 201 included in a memory 100 and its An example of operation will be described.

[0128] 7 shows an example of a memory cell array 201 different from that shown in FIG. This is a memory cell array of the bit line system (folded bit line system). The cell 221 is used in a memory cell array of an open bit line system. In addition, the wiring WLB is omitted in FIG.

[0129] The memory cell array 201 shown in FIG. 7 has m×n memories in a row and m memories in a column. The memory cells 221 are arranged in a matrix. For example, [i, j] indicates the address of memory cell 221 in the i-th row and j-th column. It shows 21.

[0130] The memory cell array 201 shown in FIG. 7 is electrically connected to the word line driver circuit 122. The wiring WL(1) is electrically connected to the memory cell 221 in the first row. Similarly, the wiring WL(i) is electrically connected to the memory cell 221 in the i-th row. do.

[0131] In addition, the memory cell array 201 shown in FIG. 7 has two wirings BIL (wiring BILa) in one column. In FIG. 7, the first row of wiring BILa is shown as wiring BILa(1 ), and the wiring BILb in the j-th column is indicated as wiring BILb(j).

[0132] The memory cells 221 arranged in odd-numbered rows are connected to either the wiring BILa or the wiring BILb. The memory cells 221 arranged in the even-numbered rows are electrically connected to the wiring BILa or the wiring BI Lb is electrically connected to the other end of Lb.

[0133] The wiring BILa and the wiring BILb are connected to the precharge circuit 13 provided for each column. 2, the sense amplifier 133, and the input / output circuit 134. The circuit 134 is electrically connected to the wiring SALa and the wiring SALb for each column. The precharge circuit 132 in the first column is designated as the precharge circuit 132(1), and the The precharge circuit 132 is shown as a precharge circuit 132(j). The bit line driver circuit 130 and the input / output circuit 134 are also denoted in the same manner. has a column decoder 131 (see FIG. 1).

[0134] <Circuit configuration example> 8 shows a memory cell 221 in the Jth column, a precharge circuit 132, a sense amplifier 133, 13 shows an example of the circuit configuration of the input / output circuit 134.

[0135] <Precharge circuit 132> The precharge circuit 132(j) includes n-channel transistors Tr21 to Tr24. The transistors Tr21 to Tr23 are p-channel transistors. Either the source or the drain of the transistor Tr21 is connected to the wiring BI The other of the source and drain is connected to the wiring PRE. One of the source and drain of the transistor Tr22 is connected to the wiring BILb(j), and the source The other of the source and drain of the transistor Tr23 is connected to the wiring PRE. One of the drains is connected to the wiring BILa(j), and the other of the source or drain is connected to the wiring BI Lb(j) is connected to the gate of transistor Tr21 and the gate of transistor Tr22. The gate of the transistor Tr21 and the gate of the transistor Tr22 are connected to the wiring PL. The PRC circuit has the function of initializing the potentials of the wirings BILa(j) and BILb(j). Has.

[0136] <Sense amplifier 133> The sense amplifier 133(j) includes a p-channel transistor Tr31 and a transistor The transistor Tr32 has an n-channel type transistor Tr33 and a transistor Tr34. One of the source and drain of the transistor Tr31 is connected to the wiring SP. The other drain is connected to the gate of transistor Tr32, the gate of transistor Tr34, and the The line BILa(j) is connected to either the source or drain of the transistor Tr33. is the gate of the transistor Tr32, the gate of the transistor Tr34, and the wiring BLa(j ), and the other of the source and drain is connected to a wiring SN. One of the source or drain of r32 is connected to the wiring SP, and the other of the source or drain is The gate of the transistor Tr31, the gate of the transistor Tr33, and the wiring BLb(j) One of the source and drain of the transistor Tr34 is connected to the transistor T The gate of r31, the gate of transistor Tr33, and the wiring BLb(j) are connected. The other of the source and drain is connected to a wiring SN. The sense amplifier 1 has the function of amplifying the potential of the lines BLa(j) and BILb(j). 33(j) functions as a latch-type sense amplifier.

[0137] <Input / output circuit 134> The input / output circuit 134(j) includes an n-channel transistor Tr41 and a transistor T The transistors Tr41 and Tr42 are p-channel transistors. One of the source and drain of the transistor Tr41 is connected to the wiring BILa( The other of the source and drain is connected to the wiring SALa(j). One of the source and drain of the transistor Tr42 is connected to the wiring BILb(j). The other of the source and drain of the transistor Tr41 is connected to the wiring SALb(j). The gate of the transistor Tr41 and the gate of the transistor Tr42 are connected to the line CSEL.

[0138] The input / output circuit 134(j) controls the line BILa based on the potential supplied to the line CSEL. (j) and wiring SALa(j), and wiring BILb(j) and wiring SALb(j) That is, the input / output circuit 134(j) has a function of controlling the conduction state of the wiring. It is possible to select whether or not to output a potential to the wiring SALa(j) and wiring SALb(j).

[0139] The wiring SP, the wiring SN, the wiring CSEL, the wiring PRE, and the wiring PL are connected to the precharge circuit 13 2. Transmits signals for controlling the operation of the sense amplifier 133 and the input / output circuit 134. The wiring SP, wiring SN, wiring CSEL, wiring PRE, and wiring PL are shown in Figure 1. The control logic circuit 160 is connected to the control logic circuit 160. is a function for supplying control signals to the wiring SP, wiring SN, wiring CSEL, wiring PRE, and wiring PL. Possess the ability.

[0140] <Example of operation> The memory cell 221[i,j], the precharge circuit 132(j), the sense amplifier 132(j), and the The operation mode of the memory 100 is determined by using the input / output circuit 133(j) and the input / output circuit 134(j). It is also assumed that −3 V is supplied to the wiring BGL(i).

[0141] <Read mode> First, when reading data from the memory cell 221[i,j], the sense amplifier 133(j An example of the operation of the above will be described with reference to the timing chart shown in FIG.

[0142] [Period T11] In period T11, the precharge circuit 132(j) is operated, and the wiring BILa(j) Specifically, the potential of the wiring PL is set to a high level. (VH_PL), and transistors Tr21 to Tr23 are turned on. As a result, the potential Vpr of the wiring PRE is applied to the wiring BILa(j) and the wiring BILb(j). The potential Vpre is set to, for example, (VH_SP+VL_SN) / 2. VH_SP is a high-level potential supplied to the wiring SP, and VL_SN is a low-level potential supplied to the wiring SN.

[0143] Note that in the period T11, the potential of the wiring CSEL is at a low level (VL_CSEL). In the input / output circuit 134(j), the transistors Tr41 and Tr42 are turned on. In addition, the potential of the wiring WL(i) is at a low level (VL_WL), and the memory The transistor M11 in the cell 221[i,j] is in the off state. Although not shown, the potential of the wiring WL[i+1] is at a low level (VL_WL), and The transistor M11 in the resistor 221[i+1,j] is in the off state. The potential of the SP and the wiring SN is the potential Vpre, and the sense amplifier 133(j) is in a stopped state. It has become.

[0144] It is preferable that VL_WL is a lower potential than VL_SN. WL is a potential lower than the potential obtained by subtracting the Vth of the transistor M11 from VL_SN. In other words, when VL_SN is set to the reference potential (0V), VL_WL is set to a negative potential (also called a "negative potential" or "negative bias").

[0145] By supplying a negative bias to the wiring WL(i), the transistor M11 is more reliably In particular, it is possible to achieve a long data retention time even under high temperature operation. An apparatus can be provided.

[0146] In addition, the transistor M11 can also be turned on by supplying a negative bias to the wiring BGL(i). In particular, both the wiring WL(i) and the wiring BGL(i) are in a load state. By providing a negative bias to one side, a smaller bias is obtained than when only one side is provided with a negative bias. The same effect can be achieved by using bias. Also, the electric field stress applied to transistor M11 is reduced. This can reduce the load current and improve the reliability of the transistor M11. The power consumption of the transistor M11 can be reduced. This improves performance and reduces power consumption.

[0147] [Period T12] In a period T12, the potential of the wiring PL is set to a low level (VL_PL). The transistors Tr21 to Tr23 are turned off. Also, the wiring WL(i) is selected. Specifically, by setting the potential of the wiring WL(i) to a high level (VH_WL), The transistor M11 in the memory cell 221[i,j] is turned on. In the memory cell 221[i,j], the wiring BILa(j) and the capacitance element CA are transistors. M11, and the wire B is connected according to the amount of charge stored in the capacitance element CA. The potential of ILa(j) fluctuates.

[0148] Here, VH_WL is preferably a higher potential than VH_SP. , VH_WL is a potential higher than the potential obtained by adding VH_SP to the Vth of the transistor M11. It is preferable that:

[0149] In FIG. 9, data “1” is stored in the memory cell 221[i,j], and the capacitance element CA This shows an example in which the amount of accumulated charge is large. When the amount of charge stored in the capacitor is large, the charge is released from the capacitor element CA to the wiring BILa(j). As a result, the potential of the wiring BILa(j) rises by ΔV1 from the potential Vpre. Data “0” is stored in the rechargeable cell 221[i,j], and the charge stored in the capacitance element CA When the amount of charge is small, the charge flows from the wiring BILa(j) to the capacitance element CA. , the potential of the wiring BILa(j) drops by ΔV2 (not shown).

[0150] Note that in the period T12, the potential of the wiring CSEL is at a low level (VL_CSEL). In the input / output circuit 134(j), the transistors Tr41 and Tr42 are turned on. The potentials of the wirings SP and SN are Vpre, and the sense amplifier 133(j) remains suspended.

[0151] [Period T13] In a period T13, the potential of the wiring SP is changed to a high level (VH_SP). The potential of SN is changed to a low level (VL_SN). The sense amplifier 133(j) is connected to the line BILa(j) and the line BIL Sense amplifier 1 has the function of amplifying the potential difference (ΔV1 in FIG. 9) between b(j). When 33(j) is activated, the potential of the wiring BILa(j) becomes Vpre+ΔV 1, the potential of the wiring SP (VH_SP). Also, the potential of the wiring BILb(j) approaches V The potential approaches the potential (VL_SN) of the wiring SN from pre.

[0152] Note that at the beginning of the period T13, the potential of the wiring BILa(j) is Vpre-ΔV2. In this case, the sense amplifier 133(j) is activated, and the wiring BILa(j) The potential of the wiring B approaches the potential of the wiring SN (VL_SN) from Vpre-ΔV2. The potential of ILb(j) approaches the potential (VH_SP) of the wiring line SP from the potential Vpre.

[0153] In addition, during the period T13, the potential of the wiring PL is at a low level (VL_PL). In the charge circuit 132(j), the transistors Tr21 to Tr23 are turned off. In addition, the potential of the wiring CSEL is at a low level (VL_CSEL), and the input / output In the circuit 134(j), the transistors Tr41 and Tr42 are in the off state. In addition, the potential of the wiring WL(i) is at a high level (VH_WL), and the memory cell 221 The transistor M11 in memory cell [i,j] is in the on state. i,j], the amount of charge according to the potential (VH_SP) of the wiring BILa(j) is It is accumulated in A.

[0154] [T14 period] In the period T14, the potential of the wiring CSEL is controlled to j) is turned on. Specifically, the potential of the wiring CSEL is set to a high level (VH_CSEL ), the transistors Tr41 and Tr42 are turned on. As a result, the potential of the wiring BILa(j) is supplied to the wiring SALa(j), and the potential of the wiring BILb The potential of (j) is supplied to the wiring SALb(j).

[0155] In the period T14, the potential of the wiring PL is at a low level (VL_PL). In the charge circuit 132(j), transistors Tr21 to Tr23 are turned on. In addition, the potential of the wiring WL(i) is at a high level (VH_WL), and the memory cell The transistor M11 of the filter 221[i,j] is in an on state. The potential of the wiring SN is at a high level (VH_SP), and the potential of the wiring SN is at a low level (VL_SN). Therefore, the sense amplifier 133(j) is in an active state. In this case, the charge corresponding to the potential (VH_SP) of the wiring BILa(j) is accumulated in the capacitance element CA. It is being done.

[0156] [Period T15] In the period T15, the potential of the wiring CSEL is controlled to j) is turned off. Specifically, the potential of the wiring CSEL is set to a low level (VL_CSEL ), the transistor Tr41 and the transistor Tr42 are turned off.

[0157] In addition, during the period T15, VL_WL is supplied to the wiring WL(i) to Specifically, the potential of the wiring WL(i) is set to a low level (VL_WL). As a result, the transistor in the memory cell 221[i,j] is turned off. As a result, the amount of charge according to the potential (VH_SP) of the wiring BLa is transferred to the memory cells 221[i, j] has. Therefore, even after the data is read, The data is stored in memory cell 221[i,j].

[0158] By setting the VL_WL supplied to the wiring WL(i) to a negative potential, the transistor M11 is further In particular, the data retention time is improved even under high temperature operation. Long storage can be provided.

[0159] Even if the input / output circuit 134(j) is turned off during the period T15, the sense amplifier If 133(j) is in operation, the potential of the wiring BILa(j) and the wiring BILb(j) is sensed. Therefore, the sense amplifier 133(j) is held It has the function of temporarily storing data read from the reseller 221[i,j].

[0160] By the above operation, data can be read from memory cell 221[i,j]. The read data is sent via wiring SALa(j) and / or wiring SALb(j). The data is supplied to the output circuit 140 (see FIG. 1). The data can be read from the memory cell 221[i,j] in the same manner as in the memory cell 221[i,j].

[0161] <Write mode> Next, the sense amplifier 133(j) when writing data to the memory cell 221[i,j] An example of the operation of memory cell 2 will be described with reference to the timing chart shown in FIG. Data can be written to 21[i+1,j] using the same principle as above.

[0162] [Period T21] During the period T21, the transistor Tr21 of the precharge circuit 132(j) Transistor Tr23 is turned on, and wiring BILa(j) and wiring BILb(j) Specifically, the potential of the wiring PL is set to a high level (VH_PL), and the potential of the wiring PL is set to a high level (VH_PL). The transistors Tr21 to Tr23 are turned on. The potential Vpre of the wiring PRE is supplied to the wiring La(j) and the wiring BILb(j). The potential Vpre can be set to, for example, (VH_SP+VL_SN) / 2.

[0163] [Period T22] In a period T22, the potential of the wiring PL is then set to a low level (VL_PL). The transistors Tr21 to Tr23 are turned off. The wiring WL(i) connected to the memory cell 221[i,j] to be subjected to the above is selected. , the potential of the wiring WL(i) is set to a high level (VH_WL), and the memory cell 221[i,j] This turns on the transistor M11 of the memory cell 221[i,j ], the wiring BILa(j) and the capacitance element CA are in a conductive state through the transistor M11. become.

[0164] During the write mode operation, a negative bias is supplied to the line BGL(i). However, when the potential of the wiring WL(i) becomes VH_WL, the wiring BGL In the period T22 in FIG. 10, the potential of the wiring BGL(i) may be increased. The potential is set to L potential (for example, 0V).

[0165] By increasing the potential of the wiring BGL(i) in accordance with the increase in the potential of the wiring WL(i), The threshold voltage Vth of the transistor M11 is reduced, and the operating speed can be increased. Therefore, the time required for the write operation can be reduced. This can increase the production speed.

[0166] In addition, by increasing the potential of both the wiring WL(i) and the wiring BGL(i), The same write speed can be achieved with a smaller potential increase than when only the potential of the gate electrode is increased. Therefore, the electric field stress applied to the transistor M11 can be reduced, This can improve the reliability of the transistor M11. That is, the reliability of the memory 100 can be improved and the power consumption can be reduced. This can be done.

[0167] At this time, if data “1” is already stored in the memory cell 221[i,j], When charge is released from element CA to wiring BILa(j), the potential Vpre changes to ΔV The potential of the wiring BILa(j) increases by 1.

[0168] [Period T23] In a period T23, the potential of the wiring SP is set to a high level (VH_SP), and the potential of the wiring SN is set to a low level (VH_SP). The signal level is set to low level (VL_SN) to activate the sense amplifier 133(j).

[0169] [T24 period] In the period T24, the potential of the wiring CSEL is controlled to j) is turned on. This makes the wiring BILa(j) and the wiring SALa(j) conductive. This brings the wiring BILb(j) and the wiring SALb(j) into a conductive state.

[0170] The data signal WDATA is input / output via the wiring SALa(j) and wiring SALb(j). The signal is supplied to the output circuit 134(j). By supplying a write potential corresponding to the data signal WDATA, the input / output circuit 134 ( A write potential is applied to the wiring BILa(j) and the wiring BILb(j) via For example, when data “0” is stored in memory cell 221[i,j], the wiring SALa( j), and a high level (VH_S P).

[0171] Then, the transistors Tr31 to T The on / off state of r34 is reversed, and the potential (VL_SN) of the wiring SN is applied to the wiring BILa(j). The potential (VL_SP) of the wiring SP is supplied to the wiring BILb(j). The amount of charge corresponding to the potential (VL_SN) indicating data "0" is stored in the capacitive element CA. By such an operation, data can be written to the memory cell 221[i,j].

[0172] [Period T25] During the period T25, VL_WL is supplied to the wiring WL(i) and the wiring WL(i) is not selected. As a result, the charge written in the memory cell 221[i,j] is held. If the potential of the wiring BGL(i) is increased in accordance with the increase in the potential of the wiring WL(i), As the potential of line WL(i) becomes VL_WL, the potential of wiring BGL(i) is lowered. For example, supply -3V to wire BGL(i).

[0173] In addition, by setting the potential of the wiring CSEL to low level (VL_CSEL), The transistor Tr41 and the transistor Tr42 are turned off.

[0174] After the potential of the wiring SALa(j) is supplied to the wiring BILa(j), In 134(j), even if the transistor Tr41 and the transistor Tr42 are turned off, If the sense amplifier 133(j) is in an operating state, the wiring BILa(j) and the wiring BILb( The potential of transistor Tr4 is maintained by sense amplifier 133(j). 1. The timing when the transistor Tr42 changes from the on state to the off state is determined by the wiring WL( This may be done before or after selecting i).

[0175] By the above operation, data can be written to the memory cell 221[i,j]. The data is written to the memory cell 221[i+1,j] by the same method as the memory cell 221[i, j] can be done in the same way.

[0176] By setting the VL_WL supplied to the wiring WL(i) to a negative potential, the transistor M11 is further In particular, the data retention time is improved even under high temperature operation. Long storage can be provided.

[0177] <Refresh mode> To maintain the data written in the memory cell 221[i,j], the data is refreshed at regular intervals. The sense amplifier 133 ( An example of the operation of j) will be explained using the timing chart shown in FIG. The refresh operation can be performed on the same principle as above.

[0178] [Period T31] During the period T31, the transistor Tr21 of the precharge circuit 132(j) Transistor Tr23 is turned on, and wiring BILa(j) and wiring BILb(j) Specifically, the potential of the wiring PL is set to a high level (VH_PL), and the potential of the wiring PL is set to a high level (VH_PL). The transistors Tr21 to Tr23 are turned on. The potential Vpre of the wiring PRE is supplied to La(j) and the wiring BILb(j).

[0179] [Period T32] In a period T32, the potential of the wiring PL is set to a low level (VL_PL). The transistors Tr21 to Tr23 are turned off. The wiring WL(i) connected to the memory cell 221[i,j] is selected. Specifically, the wiring W The potential of L(i) is set to a high level (VH_WL), and the The transistor M11 is turned on. This causes the memory cell 221[i,j] As a result, the wiring BILa(j) and the capacitance element CA are brought into a conductive state via the transistor M11.

[0180] During operation in refresh mode, a negative bias is supplied to the line BGL(i). However, when the potential of the wiring WL(i) becomes VH_WL, the wiring B In the period T32 in FIG. 11, the potential of the wiring BGL(i ) is set to the L potential (for example, 0V).

[0181] By increasing the potential of the wiring BGL(i) in accordance with the increase in the potential of the wiring WL(i), The operating speed of the transistor M11 can be increased. Therefore, the operating speed of the memory 100 can be increased.

[0182] In addition, by increasing the potential of both the wiring WL(i) and the wiring BGL(i), The same write speed can be achieved with a smaller potential increase than when only the potential of the gate electrode is increased. Therefore, the electric field stress applied to the transistor M11 can be reduced, This can improve the reliability of the transistor M11. can be reduced.

[0183] At this time, if data “1” is already stored in the memory cell 221[i,j], When charge is released from element CA to wiring BILa(j), the potential Vpre changes to ΔV The potential of the wiring BILa(j) increases by 1.

[0184] [Period T33] In a period T33, the potential of the wiring SP is set to a high level (VH_SP), and the potential of the wiring SN is set to a low level (VH_SP). The signal level is set to a low level (VL_SN) to activate the sense amplifier 133(j). When the amplifier 133(j) is activated, the potential of the wiring BILa(j) becomes Vp The potential of the wiring SP (VH_SP) approaches from re+ΔV1. The potential approaches the potential of the wiring SN (VL_SN) from Vpre. In this case, the time required for the period T33 is called the "write time."

[0185] [Period T34] In the period T34, VL_WL is supplied to the wiring WL(i) and the wiring WL(i) is not selected. Specifically, the potential of the wiring WL(i) is set to a low level (VL_WL). As a result, the transistor in the memory cell 221[i,j] is turned off. As a result, the amount of charge corresponding to the potential (VH_SP) of the wiring BLa is The capacitance is held in a capacitance element CA.

[0186] In addition, by setting VL_WL to a negative potential, the transistor M11 is more reliably turned off. In particular, it is possible to provide a storage device that has a long data retention time even under high temperature operation. It is possible.

[0187] In addition, as the potential of the wiring WL(i) becomes VL_WL, the potential of the wiring BGL(i) For example, supply -3V to the wire BGL(i).

[0188] In refresh mode, no data is read or written, so input / output Circuit 134(j) can remain off. Thus, refresh mode is the same as read mode. This can be done in a shorter time than the read and write modes. The refresh mode of [i+1,j] is performed in the same manner as the memory cell 221[i,j]. can be done.

[0189] Note that this embodiment mode may be implemented in appropriate combination with other embodiment modes described in this specification. It is possible.

[0190] (Embodiment 3) In this embodiment, a Si transistor applicable to the peripheral circuit 111 described in the above embodiment is used. 211 and an example of the configuration of an OS transistor applicable to memory cell 211 will be described. In this embodiment, the Si transistor and the OS transistor are used together. , referred to as semiconductor device.

[0191] <Configuration example of semiconductor device> The semiconductor device shown in FIG. 12 includes a transistor 300, a transistor 500, and a capacitor. 13A is a cross-sectional view of the transistor 500 in the channel length direction. 13(B) is a cross-sectional view of the transistor 500 in the channel width direction, and FIG. 13( 4C) is a cross-sectional view of the transistor 300 in the channel width direction.

[0192] The transistor 500 is a transistor having a metal oxide in a channel formation region (OS transistor). Since the off-state current of the transistor 500 is small, it is By using it, it is possible to retain the memory contents for a long period of time. Since the frequency of flash operations is low or no refresh operations are required, semiconductor devices This can reduce the power consumption of the device.

[0193] The semiconductor device described in this embodiment includes a transistor 300, a transistor 301, and a transistor 302 as shown in FIG. The transistor 500 has a capacitance element 600. The capacitor element 600 is provided above the transistor 300 and the transistor 500. It is located on the side.

[0194] The transistor 300 is disposed on a substrate 311, and includes a conductor 316, an insulator 315, and a substrate A semiconductor region 313 consisting of a part of 311 and functioning as a source region or a drain region. The semiconductor device has a low resistance region 314a that functions as a dielectric film, and a low resistance region 314b.

[0195] As shown in FIG. 13(C), the transistor 300 is formed by forming a semiconductor region 313 on the upper surface thereof and a transistor region 314 on the lower surface thereof. The side surfaces in the width direction of the channel are covered with the conductor 316 via the insulator 315. By making the transistor 300 a fin type, the effective channel width increases. This can improve the on-state characteristics of the transistor 300. Since the contribution of the MOSFET can be increased, the off-state characteristics of the transistor 300 can be improved. can.

[0196] The transistor 300 may be either a p-channel type or an n-channel type. .

[0197] The region where the channel of the semiconductor region 313 is formed, the region in the vicinity thereof, the source region, or In the low resistance region 314a which becomes the drain region and the low resistance region 314b, silicon It preferably contains a semiconductor such as a silicon-based semiconductor, and it preferably contains single crystal silicon. Or Ge (germanium), SiGe (silicon germanium), GaAs (gallium It may be made of materials containing gallium aluminum arsenide (GaAlAs) or GaAlAs (Gallium Aluminum Arsenide). Silicon with effective mass controlled by applying stress to the crystal lattice and changing the lattice spacing. Alternatively, GaAs and GaAlAs may be used to form a transistor. The Star 300 is a HEMT (High Electron Mobility Transistor) stor) can also be used.

[0198] The low resistance region 314a and the low resistance region 314b are formed by the semiconductor layer applied to the semiconductor region 313. In addition to the conductive material, elements that impart n-type conductivity, such as arsenic and phosphorus, or p-type conductivity, such as boron, are added. It contains elements that impart electrical conductivity to the material.

[0199] The conductor 316, which functions as a gate electrode, is made of arsenic, phosphorus, or the like, which provides n-type conductivity. Semiconductor materials such as silicon that contain elements or elements that give them p-type conductivity, such as boron Conductive materials such as aluminum, metal, alloy, or metal oxide materials can be used. .

[0200] Since the work function is determined by the conductor material, the The Vth of the transistor can be adjusted. It is preferable to use a material such as tantalum. It is preferable to use a metal material such as tungsten or aluminum laminated on the conductor. In particular, tungsten is preferably used in terms of heat resistance.

[0201] The transistor 300 shown in FIG. 12 is an example, and the structure is not limited to this. An appropriate transistor may be used depending on the structure and driving method. For example, transistor 500 Similarly, the transistor 300 may be formed using an oxide semiconductor.

[0202] Over the transistor 300 are insulators 320, 322, 324, and The edge members 326 are stacked in order.

[0203] The insulators 320, 322, 324, and 326 may be, for example, an acid. silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, Aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like may be used.

[0204] The insulator 322 serves to eliminate a step caused by the transistor 300 and other components disposed below it. For example, the top surface of the insulator 322 may have a function as a planarizing film. To improve flatness, the surface is flattened by a planarization process using chemical mechanical polishing (CMP) or other methods. It may be possible.

[0205] The insulator 324 is also provided with a substrate 311 or a transistor 300 or the like. A film having a barrier property to prevent diffusion of hydrogen and impurities is formed in the area where the star 500 is provided. It is preferable to use

[0206] An example of a film having a barrier property against hydrogen is silicon nitride formed by CVD. Here, a semiconductor having an oxide semiconductor such as the transistor 500 can be used. The diffusion of hydrogen into semiconductor elements can cause a deterioration in the characteristics of the semiconductor elements. Therefore, a film that suppresses hydrogen diffusion is provided between the transistor 500 and the transistor 300. Specifically, the film that suppresses the diffusion of hydrogen is a film that reduces the amount of hydrogen desorption. The membrane is thin.

[0207] The amount of hydrogen desorption can be analyzed using, for example, thermal desorption spectroscopy (TDS). For example, the amount of hydrogen desorbed from the insulator 324 can be determined by TDS analysis as follows: In the range of 50°C to 500°C, the amount of desorption converted to hydrogen atoms is Converted to a hit, it's 10 x 10 15 atoms / cm 2 Less than or equal to 5 x 10 15 a toms / cm 2 The following is fine.

[0208] It is preferable that the insulator 326 has a lower dielectric constant than the insulator 324. For example, The dielectric constant of the insulator 326 is preferably less than 4, more preferably less than 3. The relative dielectric constant of the insulator 326 is preferably 0.7 times or less than the relative dielectric constant of the insulator 324, and more preferably 0.6 times or less. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced. It can be reduced.

[0209] In addition, the insulators 320, 322, 324, and 326 are provided with capacitive elements. 600, or the conductor 328 and the conductor 330 connected to the transistor 500 are buried. The conductors 328 and 330 are plugs or wires. In addition, the conductor having the function of a plug or wiring has a plurality of structures. In addition, in this specification and the like, the wiring and the wiring The conductor and the plug to be connected may be an integral part. In some cases, a part of the conductor functions as a plug.

[0210] The materials for each plug and wiring (conductor 328, conductor 330, etc.) are metal. Conductive materials such as metals, alloy materials, metal nitride materials, or metal oxide materials are applied as single layers or Materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity, can be used. It is preferable to use any high melting point material, and it is preferable to use tungsten. It is preferable to form the conductive layer from a low-resistance conductive material such as aluminum or copper. By using this material, the wiring resistance can be reduced.

[0211] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In this case, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 is a plug or wiring that connects to the transistor 300. The conductor 356 is made of the same material as the conductors 328 and 330. It can be provided using.

[0212] For example, the insulator 350 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator having a barrier property against hydrogen. It is preferable that the insulating material 350 has a barrier property against hydrogen. A conductor having a barrier property against hydrogen is formed in the opening. The transistor 300 and the transistor 500 can be separated by a barrier layer. The diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

[0213] As a conductor having a barrier property against hydrogen, for example, tantalum nitride or the like is used. In addition, by laminating tantalum nitride and highly conductive tungsten, The diffusion of hydrogen from the transistor 300 can be suppressed while maintaining the overall conductivity. In this case, the tantalum nitride layer having a barrier property against hydrogen is It is preferable that the insulating body 350 has a structure in which the insulating body 350 is in contact with the insulating body 350.

[0214] A wiring layer may be provided on the insulator 354 and the conductor 356. For example, in FIG. In this case, an insulator 360, an insulator 362, and an insulator 364 are stacked in this order. In addition, a conductor 366 is formed on the insulators 360, 362, and 364. The conductor 366 functions as a plug or wiring. can be formed using the same materials as the conductors 328 and 330.

[0215] For example, the insulator 360 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator having a barrier property against hydrogen. It is preferable that the insulating material 360 has a barrier property against hydrogen. A conductor having a barrier property against hydrogen is formed in the opening. The transistor 300 and the transistor 500 can be separated by a barrier layer. The diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

[0216] A wiring layer may be provided on the insulator 364 and the conductor 366. For example, in FIG. In this case, an insulator 370, an insulator 372, and an insulator 374 are stacked in this order. In addition, a conductor 376 is formed on the insulators 370, 372, and 374. The conductor 376 functions as a plug or wiring. can be formed using the same materials as the conductors 328 and 330.

[0217] For example, the insulator 370 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator having a barrier property against hydrogen. In particular, an insulator 370 having a barrier property against hydrogen is useful. A conductor having a barrier property against hydrogen is formed in the opening. The transistor 300 and the transistor 500 can be separated by a barrier layer. The diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

[0218] A wiring layer may be provided on the insulator 374 and the conductor 376. For example, in FIG. In this case, an insulator 380, an insulator 382, ​​and an insulator 384 are stacked in this order. In addition, a conductor 386 is formed on the insulators 380, 382, ​​and 384. The conductor 386 functions as a plug or wiring. can be formed using the same materials as the conductors 328 and 330.

[0219] For example, the insulator 380 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator having a barrier property against hydrogen. It is preferable that the insulator 380 has a barrier property against hydrogen. A conductor having a barrier property against hydrogen is formed in the opening. The transistor 300 and the transistor 500 can be separated by a barrier layer. The diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

[0220] In the above, the wiring layer including the conductor 356, the wiring layer including the conductor 366, the conductor 376 The wiring layer including the conductor 386 has been described. The semiconductor device is not limited to this. The number of layers may be three or less, or five or more wiring layers similar to the wiring layer including the conductor 356. That's fine.

[0221] On the insulator 384 are an insulator 510, an insulator 512, an insulator 514, and an insulator 516. are stacked in this order. At least one of the insulators 516 is made of a material that has a barrier property against oxygen and hydrogen. It is preferable to use

[0222] For example, the insulator 510 and the insulator 514 may include, for example, the substrate 311 or the transformer. The region where the transistor 300 is provided is transferred to the region where the transistor 500 is provided by hydrogen or impurities. It is preferable to use a film that has a barrier property that prevents the diffusion of the insulator 3. The same materials as those in 24 can be used.

[0223] As an example of a film with barrier properties against hydrogen, silicon nitride formed by CVD is used. Here, a semiconductor element including an oxide semiconductor, such as the transistor 500, However, the diffusion of hydrogen may deteriorate the characteristics of the semiconductor element. A film that suppresses hydrogen diffusion is used between the transistor 500 and the transistor 300. Specifically, the film that suppresses hydrogen diffusion is a film that releases a small amount of hydrogen. do.

[0224] In addition, as a film having a barrier property against hydrogen, for example, an insulator 510 and an insulator 514 uses metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide. It is preferable that

[0225] In particular, aluminum oxide is highly resistant to oxygen and water, which can cause fluctuations in the electrical characteristics of transistors. It has a high blocking effect that prevents impurities such as oxygen and moisture from penetrating the membrane. Aluminum oxide is a material that can withstand hydrogen, moisture, and other chemicals during and after the transistor manufacturing process. This can prevent impurities from entering the transistor 500. This can suppress the release of oxygen from the oxide that makes up the transistor. It is suitable for use as a protective film for the substrate 500.

[0226] For example, the insulators 512 and 516 may be made of the same material as the insulator 320. In addition, by using a material with a relatively low dielectric constant as the interlayer film, the For example, the insulators 512 and 516 may be formed of For example, a silicon oxide film or a silicon oxynitride film can be used.

[0227] In addition, the insulators 510, 512, 514, and 516 are made of conductive materials. 518, and the conductor (conductor 503) that constitutes the transistor 500 are embedded. Note that the conductor 518 is a capacitor 600 or a transistor connected to the transistor 300. The conductor 518 functions as a lug or wiring. It can be provided using the same material as 330.

[0228] In particular, the insulator 510 and the conductor 518 in the region in contact with the insulator 514 are oxidized to oxygen, hydrogen, and It is preferable that the conductive material has a barrier property against water. The transistor 300 and the transistor 500 have barrier properties against oxygen, hydrogen, and water. The layer having the hydrogen atoms can be separated from the transistor 300 to the transistor 500. The diffusion of the substance can be suppressed.

[0229] Above the insulator 516 is the transistor 500 .

[0230] As shown in FIGS. 13A and 13B, the transistor 500 includes an insulator 512 and an insulator 513. A conductor 503 disposed so as to be embedded in an insulator 516, and a conductor 503 an insulator 521 disposed on the insulator 522; An insulator 524 is disposed on the body 522, and an oxide 530 is disposed on the insulator 524. a, an oxide 530b disposed on the oxide 530a, and an oxide 530b disposed on the oxide 530b. Conductor 542a and conductor 542b are spaced apart, and conductor 542a and conductor The conductive material 542a is disposed on the conductive material 542b, and an opening is formed between the conductive material 542a and the conductive material 542b so as to overlap the conductive material 542a. The insulating material 580 is disposed in the opening, the conductor 560 is disposed in the opening, and the oxide 530b, the conductor 5 42a, conductor 542b, and an insulator 580 disposed between the conductor 560. The insulating layer 550, the oxide 530b, the conductor 542a, the conductor 542b, and the insulator 580 and an insulator 550 and an oxide 530c disposed therebetween.

[0231] As shown in FIGS. 13A and 13B, the oxide 530a, the oxide 530b, the conductor 542a, and an insulator 544 is disposed between the conductor 542b and the insulator 580. 13(A) and 13(B), the conductor 560 is preferably an insulator 550. and a conductor 560a provided inside the conductor 560a so as to be embedded inside the conductor 560a. It is preferable that the conductive material 560b is provided with a conductive material 560b. Insulator 574 is disposed on insulator 580, conductor 560, and insulator 550. It is preferable that

[0232] In the following, the oxide 530a, the oxide 530b, and the oxide 530c will be collectively referred to as oxide 530a, oxide 530b, and oxide 530c. The conductor 542a and the conductor 542b are sometimes collectively referred to as oxide 530. It may also be referred to as conductor 542.

[0233] In the transistor 500, an oxide is formed in the region where the channel is formed and in the vicinity thereof. 5 shows a structure in which three layers of oxide 530a, oxide 530b, and oxide 530c are stacked. However, the present invention is not limited to this. For example, a single layer of oxide 530b, an oxide Two-layer structure of oxide 530b and oxide 530a, two-layer structure of oxide 530b and oxide 530c Alternatively, a stacked structure of four or more layers may be provided. Although the conductor 560 is shown as a two-layer laminate structure, the present invention is not limited to this. For example, the conductor 560 may have a single layer structure or a laminated structure of three or more layers. The transistor 500 illustrated in FIGS. 12 and 13A and 13B is an example. There is no limitation to this structure, and an appropriate transistor may be used depending on the circuit configuration and driving method. .

[0234] Here, the conductor 560 functions as the gate electrode of the transistor, and the conductors 542a and and the conductor 542b function as a source electrode and a drain electrode, respectively. Thus, conductor 560 is inserted through the opening in insulator 580 and through conductors 542a and 542b. The conductor 560, the conductor 542a, and the conductor 542b are formed so as to be embedded in the region sandwiched between them. The placement of the conductor 542b is selected to be self-aligned with the opening of the insulator 580. In the transistor 500, the gate electrode is disposed between the source electrode and the drain electrode. Therefore, the conductor 560 can be arranged in a self-aligned manner without providing a margin for alignment. Since the transistor 500 can be formed without any gaps, the area occupied by the transistor 500 can be reduced. This allows for miniaturization and high integration of semiconductor devices.

[0235] Furthermore, the conductor 560 is self-aligned in the region between the conductors 542a and 542b. Since the conductor 560 is formed, the area where the conductor 560 overlaps with the conductor 542a or the conductor 542b is As a result, the conductor 560 does not have a gap between the conductor 542a and the conductor 542b. The parasitic capacitance formed can be reduced. This improves the scanning speed and provides high frequency characteristics.

[0236] Conductor 560 may function as a first gate (also called a top gate) electrode. The conductor 503 serves as a second gate (also called a bottom gate or a back gate). In this case, the potential applied to the conductor 503 may be applied to the conductor 56. By changing the potential applied to VOUT1 and VOUT2 independently, the VOUT of transistor 500 can be In particular, by applying a negative potential to the conductor 503, By making the Vth of the transistor 500 larger than 0 V, it is possible to reduce the off-current. Therefore, applying a negative potential to the conductor 503 increases the resistance of the conductor 503 compared to not applying a negative potential. When the potential applied to 560 is 0V, the drain current can be reduced.

[0237] The conductor 503 is arranged to overlap the oxide 530 and the conductor 560. When a potential is applied to the conductor 560 and the conductor 503, The electric field generated by the conductor 503 is connected to the electric field generated by the conductor 503, and the choke formed in the oxide 530 is generated. In this specification and the like, the first gate electrode and the second gate electrode can cover the channel forming region. The electric field of the gate electrode of the transistor electrically surrounds the channel forming region. This structure is called a surrounded channel (S-channel) structure. In this specification, the surrounded channel (S-channel) The structure has conductor 542a and conductor 54b acting as source and drain electrodes. The side and periphery of the oxide 530 in contact with 2b are I-type, just like the channel forming region. In addition, the oxide 530 in contact with the conductor 542a and the conductor 542b The side and periphery are in contact with the insulator 580, and therefore are I-shaped like the channel forming region. In this specification, Type I is treated as the same as high-purity genuine, which will be described later. In addition, the S-channel structure disclosed in this specification and the like can be used in a fin type structure and a planar structure. The S-channel structure is different from the trainer structure. In other words, it is possible to make a transistor that is less susceptible to short channel effects. can.

[0238] The conductor 503 has the same structure as the conductor 518, and the insulator 514 and the insulator Conductor 503a is formed in contact with the inner wall of the opening of 516, and conductor 503b is formed further inside. It is formed.

[0239] The insulators 521, 522, 524, and 550 form a gate insulating film. It has the function of

[0240] Here, the insulator 524 in contact with the oxide 530 has more oxygen than the stoichiometric composition. It is preferable to use an insulator that contains a large amount of oxygen. That is, the insulator 524 has an excess oxygen region. It is preferable that the insulator containing such excess oxygen is formed in the oxide 530. By providing the oxide 530 in contact with the oxide 530, oxygen vacancies in the oxide 530 are reduced, and the signal quality of the transistor 500 is improved. The reliability can be improved.

[0241] As an insulator having an excess oxygen region, specifically, an oxide in which a part of oxygen is released by heating is used. It is preferable to use oxide materials. Oxides that release oxygen when heated are called TDS (Th Thermal Desorption Spectroscopy (DSS) analysis revealed that the oxygen atoms The converted amount of oxygen desorption is 1.0 x 10 18 atoms / cm 3 or more, preferably 1.0 x10 19 atoms / cm 3 More preferably, 2.0 × 10 19 atoms / c m 3 or more, or 3.0 x 10 20 atoms / cm 3 The oxide film is as described above. The surface temperature of the film during the TDS analysis is 100°C or higher and 700°C or lower, or The temperature is preferably in the range of 00°C or higher and 400°C or lower.

[0242] Also, if the insulator 524 has an excess oxygen region, the insulator 522 may be oxygen-rich (e.g., It has the function of suppressing the diffusion of oxygen atoms, oxygen molecules, etc. (the oxygen is less likely to permeate) It is preferable that:

[0243] The insulator 522 has a function of suppressing the diffusion of oxygen and impurities, and the oxide 530 The oxygen contained in the conductor 503 is preferably not diffused to the insulator 521 side. This can prevent the insulator 524 and the oxide 530 from reacting with oxygen.

[0244] The insulator 522 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, or zinc oxide. lead zirconate titanate (PZT), strontium titanate (SrTiO3 ) or (Ba,Sr)TiO3 (BST), which are so-called high-k materials It is preferable to use the body in a single layer or a multilayer structure. As this progresses, problems such as leakage current may occur due to the thinning of the gate insulating film. By using a high-k material as an insulator that functions as a gate insulating film, This makes it possible to reduce the gate potential during transistor operation.

[0245] In particular, it has the function of suppressing the diffusion of impurities and oxygen (the oxygen is less likely to permeate). a) Insulating materials containing oxides of one or both of aluminum and hafnium It is recommended to use an insulator containing oxides of either or both aluminum and hafnium. The oxides include aluminum oxide, hafnium oxide, aluminum and hafnium. It is preferable to use oxide (hafnium aluminate) or the like. When the insulator 522 is formed by the oxide 530, the insulator 522 is resistant to oxygen release from the oxide 530 and to The layer serves to prevent impurities such as hydrogen from entering the oxide 530 from the periphery of the transistor 500. It works like this.

[0246] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, or the like may be added to these insulators. um, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, Zirconium oxide may be added, or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. .

[0247] The insulator 521 is preferably thermally stable. For example, silicon oxide and Silicon oxide nitride and silicon oxynitride are suitable because they are thermally stable. By combining this insulator with silicon oxide or silicon oxynitride, Furthermore, it is possible to obtain the insulator 521 having a laminated structure with a high relative dielectric constant.

[0248] The insulators 521, 522, and 524 each have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the same material, but may be made of different materials. It may have a laminated structure.

[0249] The transistor 500 includes an oxide 530 including a channel formation region, and an oxide semiconductor It is preferable to use a functional metal oxide. For example, the oxide 530 is In-M- Zn oxide (element M is aluminum, gallium, yttrium, copper, vanadium, beryl Sodium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, la tantalum, tungsten, or magnesium It is preferable to use a metal oxide such as one or more selected from the group consisting of aluminum, etc. The material 530 may be an In-Ga oxide or an In-Zn oxide.

[0250] The metal oxide that functions as the channel forming region in the oxide 530 has a band gap It is preferable to use one having a value of 2 eV or more, preferably 2.5 eV or more. The use of metal oxides with wide band gaps reduces the off-state current of transistors. It is possible.

[0251] The oxide 530 has an oxide 530a under the oxide 530b, so that the oxide 530a The diffusion of impurities from structures formed below the oxide 530b can be suppressed. In addition, by having the oxide 530c on the oxide 530b, the oxide 530c can be formed. Therefore, the diffusion of impurities from the structure formed above into the oxide 530b can be suppressed. do.

[0252] The oxide 530 has a layered structure made of oxides with different atomic ratios of metal atoms. Specifically, in the metal oxide used for the oxide 530a, the constituent elements are preferably The atomic ratio of element M in the oxide 530b is It is preferable that the atomic ratio of the metal oxide used for the oxide 530a is larger than that of the element M. In the oxide 530b, the atomic ratio of the element M to In is It is preferable that the atomic ratio of element M to In is larger than that of element M. In the metal oxide used, the atomic ratio of In to the element M is It is preferable that the atomic ratio of In to the element M in the metal oxide is larger than that of In. Oxide 530c is a metal oxide that can be used for oxide 530a or oxide 530b. Things can be used.

[0253] The energy of the conduction band minimum of the oxide 530a and the oxide 530c is It is preferable that the energy of the conduction band minimum of 0b is higher than that of the oxide. The electron affinity of the oxide 530a and the oxide 530c is smaller than the electron affinity of the oxide 530b. It is preferable that

[0254] Here, at the junctions of oxide 530a, oxide 530b, and oxide 530c, The energy level of the conduction band minimum changes gradually. The energy level of the conduction band minimum at the junction of the oxide 530b and the oxide 530c is It can also be said that the oxide layer is continuously changed or continuously bonded. At the interface between oxide 530a and oxide 530b, and at the interface between oxide 530b and oxide 530c In this case, the defect level density of the mixed layer formed in the step (b) is preferably reduced.

[0255] Specifically, oxide 530a and oxide 530b, and oxide 530b and oxide 530c are By having a common element other than oxygen (as the main component), a mixed layer with low defect level density is formed. For example, when the oxide 530b is an In-Ga-Zn oxide, the oxide 530a and oxide 530c, In-Ga-Zn oxide, Ga-Zn oxide, oxide Gallium nitride or the like may be used.

[0256] At this time, the main path of the carriers is the oxide 530b. By configuring 30c as described above, the interface between oxide 530a and oxide 530b and the oxide This can reduce the defect state density at the interface between the oxide 530b and the nitride 530c. Therefore, the influence of interface scattering on carrier conduction is reduced, and the transistor 500 has high A large on-current can be obtained.

[0257] On the oxide 530b, a conductor 542 is formed, which functions as a source electrode and a drain electrode. (conductor 542a and conductor 542b) are provided. Aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tantalum Gusten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, Choose from beryllium, indium, ruthenium, iridium, strontium, and lanthanum. or an alloy containing the above-mentioned metal elements or a combination of the above-mentioned metal elements. It is preferable to use an alloy of tantalum nitride, titanium nitride, tungsten nitride, etc. titanium and aluminum nitrides, tantalum and aluminum nitrides, and titanium oxides Ruthenium, ruthenium nitride, oxides containing strontium and ruthenium, lanthanum and nickel It is preferable to use oxides containing titanium. Nitrides containing tantalum and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide , ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel Oxides are conductive materials that are resistant to oxidation or that maintain conductivity even after absorbing oxygen. Therefore, it is preferable.

[0258] As shown in FIG. 13A, the oxide 530 is formed at the interface with the conductor 542 and its vicinity. In the second embodiment, a region 543 (region 543a and region 543b) is formed as a low resistance region. In this case, the region 543a functions as either a source region or a drain region. The region 543b functions as the other of the source region and the drain region. A channel forming region is formed in the region sandwiched between region 543a and region 543b.

[0259] By providing the conductor 542 so as to be in contact with the oxide 530, the oxygen concentration in the region 543 In addition, the metal contained in the conductor 542 and the oxide 53 In such a case, a metal compound layer containing the component 0 may be formed. The carrier density increases, and region 543 becomes a low resistance region.

[0260] The insulator 544 is provided to cover the conductor 542 and prevents oxidation of the conductor 542. At this time, the insulator 544 covers the side surface of the oxide 530 and is in contact with the insulator 524. It may be provided.

[0261] Insulator 544 includes hafnium, aluminum, gallium, yttrium, and zirconium. Sm, tungsten, titanium, tantalum, nickel, germanium, or magnesium A metal oxide containing one or more metals selected from the group consisting of fluorine, fluorine, arsenic ...

[0262] In particular, the insulator 544 may be an oxide of aluminum or hafnium or both. Insulators containing aluminum oxide, hafnium oxide, aluminum and hafnium It is preferable to use oxides containing hafnium (hafnium aluminate). Hafnium aluminate has higher heat resistance than hafnium oxide. In addition, the conductor 542 is preferably resistant to oxidation. If the material is a material that absorbs oxygen and does not significantly lose conductivity, the insulator 544 is not necessary. This is not a necessary configuration, and can be designed appropriately depending on the desired transistor characteristics.

[0263] The insulator 550 functions as a gate insulating film. The insulator 550 is preferably disposed in contact with the upper and side surfaces of the substrate. It is preferable to form the insulating material from which the element is released. For example, In the DS analysis, the amount of oxygen released was 1.0 x 10 18 atoms / c m 3 or more, preferably 1.0 × 10 19 atoms / cm 3 Above, more preferably 2. 0×10 19 atoms / cm 3 or more, or 3.0 x 10 20 atoms / cm 3 End The oxide film is an oxide film having a surface temperature of 100°C during the TDS analysis. The temperature is preferably in the range of 700°C or more and 700°C or less.

[0264] Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, Silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, carbon and Silicon oxide doped with nitrogen, silicon oxide having vacancies, etc. can be used. In particular, silicon oxide and silicon oxynitride are preferred because they are stable to heat.

[0265] An insulator that releases oxygen when heated is used as the insulator 550, and is placed on the top surface of the oxide 530c. By providing the oxide 530b in contact with the insulator 550, the oxide 530c passes through the oxide 530b. In addition, oxygen can be effectively supplied to the channel formation region of the insulator 524. In addition, it is preferable that the concentration of impurities such as water or hydrogen in the insulator 550 is reduced. The thickness of the insulator 550 is preferably 1 nm or more and 20 nm or less.

[0266] In addition, in order to efficiently supply excess oxygen contained in the insulator 550 to the oxide 530, A metal oxide may be provided between the insulating material 550 and the conductor 560. It is preferable to suppress the diffusion of oxygen from the body 550 to the conductor 560. By providing a metal oxide, the diffusion of excess oxygen from the insulator 550 to the conductor 560 is suppressed. In other words, it is possible to suppress the decrease in the amount of excess oxygen supplied to the oxide 530. In addition, oxidation of the conductor 560 due to excess oxygen can be suppressed. Any material that can be used for the insulator 544 may be used.

[0267] The conductor 560 functioning as the first gate electrode has a two-layer structure in FIGS. However, it may have a single layer structure or a laminated structure of three or more layers.

[0268] The conductor 560a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. (N2O, NO, NO2, etc.), conductive material with the function of suppressing the diffusion of impurities such as copper atoms It is preferable to use a material containing a small amount of oxygen (for example, oxygen atoms, oxygen molecules, etc.). It is preferable to use a conductive material that has the function of suppressing the diffusion of at least one of the conductors. Since 60a has the function of suppressing the diffusion of oxygen, the oxygen contained in the insulator 550 This can prevent the conductor 560b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing scattering include tantalum, tantalum nitride, and tantalum fluoride. It is preferable to use ruthenium or ruthenium oxide.

[0269] The conductor 560b is a conductive material mainly composed of tungsten, copper, or aluminum. In addition, since the conductor 560b also functions as a wiring, It is preferable to use a conductor with high conductivity, such as tungsten, copper, or aluminum. The conductor 560b can be made of a conductive material containing aluminum as a main component. For example, it may be a laminated structure of titanium, titanium nitride and the above conductive material. stomach.

[0270] The insulator 580 is provided on the conductor 542 via the insulator 544. Preferably, the insulator 580 has an excess oxygen region. For example, silicon oxide is used as the insulator 580. , silicon oxynitride, silicon nitride oxide, silicon nitride, fluorine-doped silicon oxide , carbon-doped silicon oxide, carbon- and nitrogen-doped silicon oxide, vacancy-containing silicon oxide It is preferable that the insulating layer contains silicon oxide or resin. In particular, silicon oxide and oxide Silicon nitride is preferred because it is thermally stable. In particular, silicon oxide and vacant oxide are preferred. Silicon dioxide is preferred because it allows for easy formation of an excess oxygen region in a subsequent step.

[0271] The insulator 580 preferably has an excess oxygen region. Oxygen is released upon heating. By providing the insulator 580 in contact with the oxide 530c, the oxygen in the insulator 580 is oxidized. The oxide 530 can be efficiently supplied through the insulator 530c. It is preferable that the concentration of impurities such as water or hydrogen in 80 is reduced.

[0272] The opening in the insulator 580 is formed to overlap the region between the conductor 542a and the conductor 542b. As a result, the conductor 560 is connected to the opening of the insulator 580 and the conductor 542a. It is formed so as to be embedded in the region sandwiched between the bodies 542b.

[0273] In miniaturizing semiconductor devices, it is required to shorten the gate length. It is necessary to prevent the conductivity of the conductor 60 from decreasing. In this embodiment, the conductor 560 may have a shape with a high aspect ratio. The conductor 560 is provided so as to be embedded in the opening of the insulator 580. Even a shape with a high ratio can be formed without causing the conductor 560 to collapse during the process. Cut.

[0274] The insulator 574 is disposed on the top surface of the insulator 580, the top surface of the conductor 560, and the top surface of the insulator 550. The insulator 574 is preferably provided in contact with the surface. Thus, an excess oxygen region can be provided in the insulator 550 and the insulator 580. From this excess oxygen region, oxygen can be supplied into the oxide 530 .

[0275] For example, the insulator 574 may be hafnium, aluminum, gallium, yttrium, Zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium It is possible to use a metal oxide containing one or more metals selected from the group consisting of cadmium, cadmium, and sulphur. Cut.

[0276] In particular, aluminum oxide has a high barrier property and is a thin film of 0.5 nm to 3.0 nm. Therefore, the diffusion of hydrogen and nitrogen can be suppressed even if sputtering is performed. The aluminum oxide film formed by this method is a source of oxygen and also a barrier for impurities such as hydrogen. It can also function as a film.

[0277] In addition, it is preferable to provide an insulator 581 that functions as an interlayer film over the insulator 574. The insulator 581, like the insulator 524, has a low impurity concentration such as water or hydrogen in the film. is preferably reduced.

[0278] Also, the insulating material 581, the insulating material 574, the insulating material 580, and the insulating material 544 are formed. The conductor 540a and the conductor 540b are placed in the opening. The conductors 540a and 540b are provided opposite each other with the conductor 560 in between. b has the same configuration as conductor 546 and conductor 548 described later.

[0279] An insulator 582 is provided on the insulator 581. The insulator 582 is resistant to oxygen and hydrogen. Therefore, the insulator 582 is preferably made of an insulating material. The insulator 582 may be made of the same material as the insulator 514. For example, aluminum oxide may be used. It is preferable to use metal oxides such as tungsten oxide, hafnium oxide, and tantalum oxide.

[0280] In particular, aluminum oxide is highly resistant to oxygen and water, which can cause fluctuations in the electrical characteristics of transistors. It has a high blocking effect that prevents impurities such as oxygen and moisture from penetrating the membrane. Aluminum oxide is a material that can withstand hydrogen, moisture, and other chemicals during and after the transistor manufacturing process. This can prevent impurities from entering the transistor 500. This can suppress the release of oxygen from the oxide that makes up the transistor. It is suitable for use as a protective film for the substrate 500.

[0281] An insulator 586 is provided on the insulator 582. The insulator 586 is The same material as that of 320 can be used. In addition, a material with a relatively low dielectric constant can be used as the interlayer film. For example, the insulator 586 may be For example, a silicon oxide film or a silicon oxynitride film can be used.

[0282] Also, the insulator 521, the insulator 522, the insulator 524, the insulator 544, the insulator 580, the insulator The insulator 574, the insulator 581, the insulator 582, and the insulator 586 are provided with the conductor 546 and and a conductor 548 and the like are embedded therein.

[0283] The conductor 546 and the conductor 548 are connected to the capacitor 600, the transistor 500, or The conductor 546 functions as a plug or wiring that connects to the transistor 300. The conductor 548 is made of the same material as the conductor 328 and the conductor 330. It is possible.

[0284] Next, a capacitor 600 is provided above the transistor 500. 600 includes a conductor 610, a conductor 620, and an insulator 630.

[0285] Furthermore, a conductor 612 may be provided over the conductor 546 and the conductor 548. 612 has a function as a plug or wiring that connects to the transistor 500. The conductor 610 functions as an electrode of the capacitor 600. The conductive material 610 and the conductive material 610 can be formed simultaneously.

[0286] Conductor 612 and conductor 610 may be made of molybdenum, titanium, tantalum, tungsten, or the like. Metal film containing elements selected from the group consisting of silicon, aluminum, copper, chromium, neodymium, and scandium or a metal nitride film containing the above-mentioned elements (tantalum nitride film, titanium nitride film, nitride Molybdenum film, tungsten nitride film, etc. can be used. oxides containing tungsten oxide, indium zinc oxides containing tungsten oxide Lead oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide, Conductive materials such as indium zinc oxide and indium tin oxide doped with silicon oxide are used. It can also be used.

[0287] In FIG. 12, the conductor 612 and the conductor 610 are shown as single-layer structures. For example, a conductive material having a barrier property and a conductive material having a high conductivity may be used. Conductors with barrier properties between weak conductors and highly conductive conductors with good adhesion may form a highly conductive material.

[0288] The conductor 620 is provided so as to overlap with the conductor 610 with the insulator 630 interposed therebetween. The conductor 620 is made of a conductive material such as a metal material, an alloy material, or a metal oxide material. High-melting-point materials such as tungsten and molybdenum, which are both heat-resistant and conductive, are used. It is preferable to use tungsten, and it is particularly preferable to use tungsten. When forming the structure at the same time as other structures, low-resistance metal materials such as Cu (copper) and Al (aluminum) are used. You can use a .um.

[0289] An insulator 650 is provided on the conductor 620 and the insulator 630. The insulator 50 can be made of the same material as the insulator 320. , and may function as a planarizing film that covers the underlying unevenness.

[0290] By using this structure, a semiconductor device using a transistor having an oxide semiconductor This makes it possible to suppress fluctuations in electrical characteristics and improve reliability. A transistor including an oxide semiconductor and having a large on-state current can be provided. It is possible to provide a transistor including an oxide semiconductor with low current. A semiconductor device having an oxide semiconductor can be provided. In a semiconductor device using a transistor, miniaturization or high integration can be achieved.

[0291] <Example of transistor structure> Note that the transistor 500 of the semiconductor device described in this embodiment is not limited to the above structure. The following describes examples of structures that can be used for the transistor 500. .

[0292] <Transistor structure example 1> An example of the structure of the transistor 510A will be described with reference to FIGS. 14(A), (B), and (C). FIG. 14(A) is a top view of the transistor 510A. FIG. 14(B) is a top view of the transistor 510A. FIG. 14(C) is a cross-sectional view of the portion indicated by the dashed line L1-L2 in FIG. 14(A). 14A is a cross-sectional view of the portion indicated by the chain line W1-W2. For clarity, some elements are omitted from the illustration.

[0293] 14(A), (B), and (C), a transistor 510A and a layer functioning as an interlayer film are shown. Insulators 511, 512, 514, 516, 580, and 582, and insulator 584. Also shown are transistors 510A and 510B. The conductors 546 (conductors 546a and 546b) functioning as contact plugs 6b) and a conductor 503 that functions as a wiring.

[0294] The transistor 510A has a conductor 560 (conductor 56 0a and conductor 560b), and conductor 505 (which functions as a second gate electrode). and a conductive material 505a and a conductive material 505b), and an insulator 55 which functions as a first gate insulating film. 0, and insulators 521, 522, and 523 functioning as a second gate insulating film. 24 and an oxide 530 (oxide 530a, oxide 53 0b, and oxide 530c) and a conductor 530 serving as either a source or a drain. 42a, a conductor 542b serving as the other of the source and drain, and an insulator 574 It has the following.

[0295] In addition, in the transistor 510A shown in FIGS. 14(A), (B), and (C), oxide 5 30c, an insulator 550, and a conductor 560 are inserted into an opening in the insulator 580. The oxide 530c, the insulator 550, and the conductor 574 are disposed between the oxide 530c and the insulator 550. 560 is disposed between the conductor 542a and the conductor 542b.

[0296] The insulators 511 and 512 function as interlayer films.

[0297] The interlayer film may be silicon oxide, silicon oxynitride, silicon nitride oxide, or aluminum oxide. um, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZ T), strontium titanate (SrTiO3) or (Ba,Sr)TiO3 (BST ) can be used as a single layer or a laminate. For example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, Titanium oxide, tungsten oxide, yttrium oxide, and zirconium oxide may be added. Alternatively, these insulators may be nitrided. Silicon or silicon nitride may also be used in a laminated form.

[0298] For example, the insulator 511 prevents impurities such as water or hydrogen from entering the transistor 51 from the substrate side. It is preferable that the insulating film functions as a barrier film that prevents the inclusion of OA. The body 511 has a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms. It is preferable to use an insulating material that has high oxygen content (which is difficult for the impurities to penetrate). (e.g., at least one of oxygen atoms, oxygen molecules, etc.) It is preferable to use an insulating material that is difficult for oxygen to permeate. Aluminum oxide or silicon nitride may be used as the material of the electrode 1. Impurities such as water are prevented from diffusing from the substrate side to the transistor 510A side by the insulator 511. It can be suppressed.

[0299] For example, the insulator 512 preferably has a lower dielectric constant than the insulator 511. By using a low-cost material for the interlayer film, the parasitic capacitance occurring between wirings can be reduced.

[0300] The conductor 503 is formed so as to be embedded in the insulator 512. The height of the upper surface of the conductor 503 can be made to be approximately the same as the height of the upper surface of the insulator 512. Although a single layer structure is shown, the present invention is not limited to this. For example, The conductor 503 may have a multilayer structure of two or more layers. It is preferable to use a highly conductive material containing silicon, copper, or aluminum as the main component. It's nice.

[0301] In transistor 510A, conductor 560 is connected to the first gate (also called the top gate). The conductor 505 may function as a second gate (bottom gate). In this case, the potential applied to the conductor 505 may be , and the potential applied to the conductor 560 is changed independently. The threshold voltage of 510A can be controlled. In particular, applying a negative potential to the conductor 505 By this, the threshold voltage of the transistor 510A is increased to be higher than 0 V, and the off-state current is reduced. Therefore, applying a negative potential to the conductor 505 is more effective in reducing the printed The drain current when the potential applied to the conductor 560 is 0 V is smaller than when no potential is applied. It is possible.

[0302] In addition, for example, by providing the conductor 505 and the conductor 560 so that they overlap with each other, the conductor 56 0, and when a potential is applied to the conductor 505, the electric field generated by the conductor 560 and the conductor The electric field generated from 505 is connected to the oxide 530, and the channel forming region is covered. It is possible to do so.

[0303] That is, the electric field of the conductor 560 functioning as the first gate electrode and the electric field of the second gate electrode The electric field of the conductor 505, which functions as an electrode, electrically connects the channel forming region. In this specification, the first gate electrode and the second gate electrode The structure of a transistor in which the channel formation region is electrically surrounded by an electric field is called surro This is called an unded channel (S-channel) structure.

[0304] The insulators 514 and 516 are layers similar to the insulators 511 and 512. For example, the insulator 514 functions as a barrier film to prevent impurities such as water or hydrogen from entering the substrate. It is preferable that the film functions as a barrier film that prevents the metal oxide from entering the transistor 510A. This structure allows impurities such as hydrogen and water to pass through the insulator 514 from the substrate side to the transistor. 510A. It is preferable that the dielectric constant of the interlayer film is lower than that of the substrate 514. By using a material with a low dielectric constant as the interlayer film, The parasitic capacitance occurring between the wirings can be reduced.

[0305] Conductor 505, which functions as a second gate, is connected to openings in insulators 514 and 516. A conductor 505a is formed in contact with the inner wall of the Here, the height of the upper surfaces of the conductors 505a and 505b and the upper surface of the insulator 516 are In the transistor 510A, the heights of the conductors 505a and 505b can be made approximately the same. Although the structure in which the bodies 505b are stacked is shown, the present invention is not limited to this. For example, the conductor 505 may be provided as a single layer or a laminated structure of three or more layers. good.

[0306] Here, the conductor 505a is a diffusion layer for impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms. It is preferable to use a conductive material that has the function of suppressing the impurities (i.e., the impurities are less likely to permeate). Alternatively, the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) is suppressed. It is preferable to use a conductive material that has the above-mentioned function (which is difficult for oxygen to permeate). In the specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of the above impurities or oxygen. The function is to suppress the diffusion of any one or all of the oxygen.

[0307] For example, the conductor 505a has a function of suppressing the diffusion of oxygen, so that the conductor 505 This can prevent b from being oxidized and the electrical conductivity from decreasing.

[0308] When the conductor 505 also functions as a wiring, the conductor 505b is made of tungsten, copper, or the like. It is preferable to use a conductive material having high conductivity, such as aluminum or aluminum-based. In this case, the conductor 503 is not necessarily provided. However, it may have a laminated structure, for example, titanium, titanium nitride and the above conductive material. The above may be laminated.

[0309] The insulators 521, 522, and 524 function as a second gate insulating film. Possess the ability.

[0310] Furthermore, the insulator 522 preferably has a barrier property. By having this, impurities such as hydrogen from the periphery of the transistor 510A to the transistor 510A can be prevented. It functions as a layer that suppresses the inclusion of impurities.

[0311] The insulator 522 may be, for example, aluminum oxide, hafnium oxide, aluminum and hafnium oxide. Oxides containing hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, Lead zirconate titanate (PZT), strontium titanate (SrTiO3) or (B Insulators containing so-called high-k materials such as a,Sr)TiO3 (BST) are deposited as single layers or As transistors become smaller and more highly integrated, Thinning the gate insulating film can cause problems such as leakage current. By using high-k materials as insulators that function as a transistor, the physical thickness can be maintained. This makes it possible to reduce the gate potential during start operation.

[0312] For example, the insulator 521 is preferably thermally stable, e.g., silicon oxide. Silicon oxide nitride and silicon oxynitride are suitable because they are thermally stable. By combining the insulating material with silicon oxide or silicon oxynitride, Furthermore, it is possible to obtain the insulator 521 having a laminated structure with a high relative dielectric constant.

[0313] In addition, in FIGS. 14(B) and (C), a three-layer laminated structure is shown as the second gate insulating film. However, it may be a single layer, two layers, or a laminated structure of four or more layers. In that case, the same material The laminated structure is not limited to a laminated structure made of two or more materials, but may be a laminated structure made of different materials.

[0314] The oxide 530 having a region that functions as a channel formation region is formed by an oxide 530a and an oxide The oxide 530b is on the oxide 530a, and the oxide 530c is on the oxide 530b. By having the oxide 530a under the oxide 530b, the oxide 530b is formed below the oxide 530a. The diffusion of impurities from the oxide 530b to the oxide 530b can be suppressed. By having oxide 530c on object 530b, the oxide 530c is formed above the oxide 530c. The diffusion of impurities from the structure to the oxide 530b can be suppressed. As the material, an oxide semiconductor, which is one of the above-mentioned metal oxides, can be used.

[0315] The oxide 530c is formed in the opening of the insulator 580 through the insulator 574. When the insulator 574 has a barrier property, the insulating material 574 is preferably provided with a barrier layer. This can prevent impurities from diffusing into the oxide 530.

[0316] One of the conductors 542 functions as a source electrode and the other functions as a drain electrode. .

[0317] The conductor 542a and the conductor 542b may be made of aluminum, titanium, chromium, nickel, Copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, etc. In particular, tantalum nitride, etc. The metal nitride film has barrier properties against hydrogen and oxygen, and is highly resistant to oxidation. ,preferable.

[0318] Although a single layer structure is shown in FIG. 14(B), a laminated structure of two or more layers may also be used. For example, a tantalum nitride film and a tungsten film may be stacked. Alternatively, a two-layer structure in which an aluminum film is laminated on a tungsten film, or a copper film may be laminated on a tungsten film. - Two-layer structure with copper film laminated on magnesium-aluminum alloy film, copper film laminated on titanium film Alternatively, a two-layer structure in which a copper film is laminated on a tungsten film may be used.

[0319] Also, a titanium film or titanium nitride film and an aluminum film overlaid on the titanium film or titanium nitride film are used. An aluminum film or a copper film is laminated, and a titanium film or a titanium nitride film is further formed thereon. A three-layer structure consisting of a molybdenum film or molybdenum nitride film and a molybdenum film or molybdenum nitride film. An aluminum or copper film is layered on top of the molybdenum film, and then a molybdenum or There are three-layer structures in which indium oxide, tin oxide or molybdenum nitride are formed. Alternatively, a transparent conductive material containing zinc oxide may be used.

[0320] A barrier layer may be provided on the conductor 542. The barrier layer is resistant to oxygen or hydrogen. It is preferable to use a substance having a barrier property against the insulator 574. During film formation, the conductor 542 can be prevented from being oxidized.

[0321] The barrier layer may be made of, for example, a metal oxide, particularly aluminum oxide, Using insulating films such as hafnium oxide and gallium oxide that have barrier properties against oxygen and hydrogen It is also preferable to use silicon nitride formed by the CVD method.

[0322] The barrier layer can broaden the range of material options for the conductor 542. For example, The conductor 542 is made of tungsten or aluminum, which has low oxidation resistance but high conductivity. In addition, for example, a conductive material that is easy to form a film or process can be used. You can be there.

[0323] The insulator 550 functions as a first gate insulating film. The oxide 530c and the insulator 574 are provided in the opening provided in the is preferred.

[0324] As transistors become smaller and more highly integrated, the gate insulating film becomes thinner, which reduces the lead In this case, the insulator 550 may be a second gate insulating film. Similarly, a stacked structure may be used. By using a laminated structure of a material and a thermally stable material, the thickness of the material can be maintained while maintaining the thickness of the material. It is possible to reduce the gate potential during transistor operation. A laminated structure can be obtained.

[0325] The conductor 560 functioning as the first gate electrode is made up of the conductor 560a and the conductor 56 Conductor 560a has a conductor 560b on top of conductor 505a. Conductor 560a is a hydrogen atom, similar to conductor 505a. Conductive materials that have the function of suppressing the diffusion of impurities such as electrons, hydrogen molecules, water molecules, and copper atoms. It is preferable to use at least one of oxygen (for example, oxygen atom, oxygen molecule, etc.) It is preferable to use a conductive material that has the function of suppressing the diffusion of .

[0326] The conductor 560a has a function of suppressing the diffusion of oxygen, and therefore the material of the conductor 560b In other words, by having the conductor 560a, the conductor 560 The oxidation of b is suppressed, and the decrease in electrical conductivity can be prevented.

[0327] Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum and tantalum nitride. It is preferable to use ruthenium, ruthenium oxide, or the like. As Oa, an oxide semiconductor that can be used as the oxide 530 can be used. In this case, the conductor 560b is formed by sputtering, so that the electric potential of the conductor 560a is reduced. This is called OC (Oxide Conductor). The electrode can be called a ctor electrode.

[0328] The conductor 560b is made of a conductive material mainly composed of tungsten, copper, or aluminum. In addition, since the conductor 560 functions as a wiring, it is preferable to use a material having high conductivity. It is preferable to use a conductor that is strong enough to withstand the heat. For example, tungsten, copper, or aluminum may be used as the main material. The conductor 560b may have a layered structure. For example, a laminate of titanium, titanium nitride and the above conductive material may be used.

[0329] An insulator 574 is disposed between the insulator 580 and the transistor 510A. 4 is an insulating material that has the function of suppressing the diffusion of impurities such as water or hydrogen, and oxygen. For example, aluminum oxide or hafnium oxide is preferably used. In addition, other examples include magnesium oxide, gallium oxide, germanium oxide, Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide or tantalum oxide Metal oxides such as silicon nitride oxide or silicon nitride can be used.

[0330] By including the insulator 574, impurities such as water and hydrogen contained in the insulator 580 can be converted into an acid. The oxide 530c is prevented from diffusing into the oxide 530b through the insulator 550. In addition, the excess oxygen contained in the insulator 580 can prevent the conductor 560 from being oxidized. It is possible.

[0331] Insulators 580, 582, and 584 function as interlayer films.

[0332] The insulator 582, like the insulator 514, prevents impurities such as water or hydrogen from traversing the It is preferable that the insulating film functions as a barrier insulating film that prevents the metal from being mixed into the transistor 510A.

[0333] In addition, the insulators 580 and 584, like the insulator 516, are thicker than the insulator 582. By using a material with a low dielectric constant as the interlayer film, the This can reduce the parasitic capacitance.

[0334] Also, transistor 510A is connected to insulators 580, 582, and 584. Electrical connections to other structures may be made through plugs or wiring such as embedded conductors 546. good.

[0335] The material of the conductor 546 may be a metal material, an alloy material, or a gold material, similar to the conductor 505. Conductive materials such as metal nitride materials or metal oxide materials can be used as a single layer or a laminate. For example, high-melting-point materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity, can be used. It is preferable to use a material such as aluminum or copper. It is preferable to use a low-resistance conductive material to reduce wiring resistance. .

[0336] For example, the conductor 546 may be a material having barrier properties against hydrogen and oxygen. By using a layered structure of conductive materials such as tantalum nitride and highly conductive tungsten, It is possible to suppress the diffusion of impurities from the outside while maintaining the conductivity of the wiring. .

[0337] By using the above structure, a transistor including an oxide semiconductor with a large on-state current can be used. Alternatively, a semiconductor device having an oxide semiconductor with a small off-state current can be provided. A semiconductor device using a transistor can be provided. To provide a semiconductor device having stable electrical characteristics and improved reliability. can be done.

[0338] <Transistor structure example 2> An example of the structure of the transistor 510B will be described with reference to FIGS. 15(A), (B), and (C). FIG. 15(A) is a top view of transistor 510B. FIG. 15(B) is a top view of transistor 510B. FIG. 15(C) is a cross-sectional view of the portion indicated by the dashed line L1-L2 in FIG. 15(A) is a cross-sectional view of the portion indicated by the chain line W1-W2. For clarity, some elements are omitted from the illustration.

[0339] Transistor 510B is a modification of transistor 510A. To avoid confusion, differences from transistor 510A will be mainly described.

[0340] Transistor 510B has conductors 542 (conductors 542a and 542b) and , the oxide 530c, the insulator 550, and the conductor 560 overlap each other. With this structure, a transistor with a high on-state current can be provided. Therefore, a highly efficient transistor can be provided.

[0341] The conductor 560 functioning as the first gate electrode is made up of the conductor 560a and the conductor 56 Conductor 560a has a conductor 560b on top of conductor 505a. Conductor 560a is a hydrogen atom, similar to conductor 505a. Conductive materials that have the function of suppressing the diffusion of impurities such as electrons, hydrogen molecules, water molecules, and copper atoms. It is preferable to use at least one of oxygen (for example, oxygen atom, oxygen molecule, etc.) It is preferable to use a conductive material that has the function of suppressing the diffusion of .

[0342] The conductor 560a has a function of suppressing the diffusion of oxygen, and therefore the material of the conductor 560b In other words, by having the conductor 560a, the conductor 560 The oxidation of b is suppressed, and the decrease in electrical conductivity can be prevented.

[0343] In addition, the top and side surfaces of the conductor 560, the side surfaces of the insulator 550, and the oxide 530c It is preferable to provide an insulator 574 so as to cover the side surface. When an insulating material is used that has the function of suppressing the diffusion of impurities such as hydrogen and oxygen, For example, it is preferable to use aluminum oxide or hafnium oxide. Other examples include magnesium oxide, gallium oxide, germanium oxide, and yttrium oxide. metals such as sodium, zirconium oxide, lanthanum oxide, neodymium oxide or tantalum oxide Oxide, silicon nitride oxide, silicon nitride, or the like can be used.

[0344] By providing the insulator 574, oxidation of the conductor 560 can be suppressed. By providing the insulator 574, impurities such as water and hydrogen contained in the insulator 580 are absorbed into the transistor. This can prevent diffusion to resistor 510B.

[0345] In addition, an insulator 576 (insulator) having a barrier property is provided between the conductor 546 and the insulator 580. By providing the insulator 576, The oxygen in the insulator 580 reacts with the conductor 546, and the conductor 546 is prevented from being oxidized. This can be done.

[0346] In addition, by providing an insulator 576 having a barrier property, the conductive material used for the plug and wiring can be For example, the conductor 546 can be made of a material with oxygen-absorbing properties. While having high electrical conductivity, the use of metal materials provides a semiconductor device with low power consumption. Specifically, tungsten and aluminum have low oxidation resistance, but In addition, for example, a material that is easy to form a film or process can be used. A conductor may be used.

[0347] <Transistor structure example 3> An example of the structure of the transistor 510C will be described with reference to FIGS. 16(A), (B), and (C). FIG. 16(A) is a top view of transistor 510C. FIG. 16(B) is a top view of transistor 510C. FIG. 16(C) is a cross-sectional view of the portion indicated by the dashed line L1-L2 in FIG. 16(A) is a cross-sectional view of the portion indicated by the chain line W1-W2. For clarity, some elements are omitted from the illustration.

[0348] Transistor 510C is a modification of transistor 510A. To avoid confusion, differences from transistor 510A will be mainly described.

[0349] The transistor 510C shown in FIGS. 16A, 16B, and 16C has a conductor 542a and A conductor 547a is disposed between the oxide 530b, and a conductor 542b is disposed between the oxide 530b. The conductor 547b is disposed on the conductor 542a (conductor 542b). The conductor 547a (conductor 547b) extends beyond the upper surface and the side surface on the conductor 560 side, and The conductor 547 has a region that contacts the upper surface of the conductor 542. Furthermore, the thickness of the conductor 547 is at least It is preferably thicker than the conductive material 542 .

[0350] The transistor 510C shown in FIGS. 16(A), (B), and (C) has the above-described configuration. conductor 542 is closer to conductor 560 than transistor 510A. Alternatively, the end of the conductor 542a and the end of the conductor 542b may be connected to the conductor The body 560 can be overlapped, which effectively forms the channel of the transistor 510C. This can shorten the length and improve the on-state current and frequency characteristics.

[0351] In addition, the conductor 547a (conductor 547b) overlaps with the conductor 542a (conductor 542b). By adopting such a configuration, the conductor 546a (the conductor In the etching to form the opening in which the conductor 547a (conductor 546b) is embedded, 47b) acts as a stopper to prevent over-etching of oxide 530b. It is possible.

[0352] 16(A), (B), and (C) is a transistor 510C. The insulator 544 may be made of water or other suitable material. Impurities such as hydrogen or excess oxygen are mixed into the transistor 510C from the insulator 580 side. It is preferable that the insulator 545 functions as a barrier insulating film that suppresses the penetration of Insulators that can be used for the insulator 544 can be used. Examples of the nitride include aluminum nitride, aluminum titanium nitride, titanium nitride, and silicon nitride. Nitride insulators such as silicon or silicon oxynitride may also be used.

[0353] The transistor 510C shown in FIGS. 16(A), (B), and (C) is Unlike the transistor 510A shown in Figs. 5A, 5B, and 5C, the conductor 505 is formed in a single layer structure. In this case, the patterned conductor 505 may be provided with an insulator 516. An insulating film is formed, and the upper part of the insulating film is removed by a CMP method or the like until the upper surface of the conductor 505 is exposed. Here, it is preferable to improve the flatness of the upper surface of the conductor 505. For example, the average surface roughness (Ra) of the upper surface of the conductor 505 is set to 1 nm or less, preferably 0.5 nm or less, more preferably 0.3 nm or less. The insulating layer 530b and the oxide 530c are formed on the insulating layer 530a. It is possible to improve the quality of life.

[0354] <Transistor structure example 4> An example of the structure of the transistor 510D will be described with reference to FIGS. 17(A), (B), and (C). FIG. 17(A) is a top view of transistor 510D. FIG. 17(B) is a top view of transistor 510D. FIG. 17(C) is a cross-sectional view of the portion indicated by the dashed line L1-L2 in FIG. 17A is a cross-sectional view of the portion indicated by the chain line W1-W2. For clarity, some elements are omitted from the illustration.

[0355] Transistor 510D is a variation of the transistor described above. To prevent this, differences from the above transistor will be mainly described.

[0356] In FIGS. 17A to 17C, the conductor 503 is not provided, and the second gate The functional conductor 505 also functions as a wiring. The metal oxide 552 is formed on the insulator 550. 2, and an insulator 570 is provided on the conductor 560. 0 has an insulator 571 on it.

[0357] The metal oxide 552 preferably has a function of suppressing oxygen diffusion. By providing a metal oxide 552 between the conductive material 560 and the conductive material 560, which suppresses the diffusion of oxygen, The diffusion of oxygen into the dielectric 560 is suppressed. In other words, the amount of oxygen supplied to the oxide 530 is reduced. In addition, oxidation of the conductor 560 by oxygen can be suppressed. .

[0358] Note that the metal oxide 552 may function as a part of the first gate. The oxide semiconductor that can be used as the oxide 530 is used as the metal oxide 552. In this case, the conductor 560 can be formed by sputtering to form a metal oxide film. The electrical resistance of the oxide 552 can be reduced to form a conductive layer. e Conductor) electrode.

[0359] The metal oxide 552 may also function as a part of the gate insulating film. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 550, the metal oxide The material 552 is preferably a metal oxide, which is a high-k material having a high dielectric constant. This laminated structure is stable against heat and has a high dielectric constant. Therefore, the gate voltage applied during transistor operation can be adjusted while maintaining the physical film thickness. In addition, the equivalent oxide thickness ( It is possible to reduce the thickness of the EOT.

[0360] In the transistor 510D, the metal oxide 552 is shown as a single layer, but it may be a stack of two or more layers. For example, a metal oxide that functions as a part of the gate electrode and a gate insulating film may be used. A metal oxide that functions as part of the film may be laminated.

[0361] When the metal oxide 552 functions as a gate electrode, It is possible to improve the on-current of transistor 510D without weakening the influence of these electric fields. Alternatively, when it functions as a gate insulating film, the insulating film 550 and the metal oxide 55 2, the physical thickness of the conductor 560 and the oxide 530 are kept at a distance from each other. The leakage current between the conductor 560 and the oxide 530 can be suppressed. By providing a stacked structure of the conductor 550 and the metal oxide 552, the conductor 560 and the oxide The physical distance between the conductor 560 and the oxide 530, and the electric field strength acting on the oxide 530 from the conductor 560 are , and can be easily adjusted appropriately.

[0362] Specifically, the metal oxide 552 may be an oxide semiconductor that can be used for the oxide 530. By lowering the resistance of the body, it can be used as metal oxide 552. Um, aluminum, gallium, yttrium, zirconium, tungsten, titanium, One selected from tantalum, nickel, germanium, or magnesium, or A metal oxide containing two or more kinds of metals can be used.

[0363] In particular, the insulating layer contains oxides of either or both of aluminum and hafnium. , aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium (hafnium It is preferable to use hafnium aluminate. Therefore, the heat resistance of the hafnium oxide film is higher than that of the hafnium oxide film. It is preferable because it is difficult to crystallize. Note that the metal oxide 552 is not an essential component. It may be designed appropriately depending on the transistor characteristics.

[0364] The insulator 570 has a function of suppressing the permeation of impurities such as water or hydrogen, and oxygen. For example, aluminum oxide or hafnium oxide can be used. This prevents the conductor 560 from being damaged by oxygen from above the insulator 570. In addition, the insulator 570 can prevent water or hydrogen from flowing from above the insulator 570. Impurities such as ions may be mixed into the oxide 530 via the conductor 560 and the insulator 550. This can suppress the above.

[0365] The insulator 571 functions as a hard mask. When processing 60, the side of the conductor 560 is approximately perpendicular to the substrate surface. The angle between the side surface of 560 and the substrate surface is set to 75 degrees or more and 100 degrees or less, preferably 80 degrees or more and 90 degrees or less. It can be set to 5 degrees or less.

[0366] The insulator 571 has a function of suppressing the permeation of impurities such as water or hydrogen, and oxygen. By using an insulating material having the above structure, the insulating material may also function as a barrier layer. In this case, the insulator 570 may not be provided.

[0367] The insulator 571 is used as a hard mask to form the insulator 570, the conductor 560, and the metal oxide 552, insulator 550, and oxide 530c are selectively removed to remove these The side surfaces of the oxide 530b can be made substantially flush with each other, and part of the surface of the oxide 530b can be exposed.

[0368] Transistor 510D also has regions 531a and 531b on a portion of the exposed oxide 530b surface. and region 531b. One of region 531a or region 531b is used as a source region. one functions as a drain region, and the other functions as a drain region.

[0369] The regions 531a and 531b can be formed by, for example, ion implantation or ion doping. The exposed oxide is then removed using a method such as plasma immersion ion implantation or plasma treatment. This can be achieved by introducing impurity elements such as phosphorus or boron into the surface of the oxide 530b. In this embodiment, the term "impurity element" refers to an element other than the main component element. .

[0370] In addition, after exposing a part of the surface of the oxide 530b, a metal film is formed and then heat-treated. By this, the elements contained in the metal film are diffused into the oxide 530b, and the regions 531a and A region 531b can also be formed.

[0371] The region of the oxide 530b into which the impurity element is introduced has a reduced electrical resistivity. The regions 531a and 531b may be referred to as "impurity regions" or "low resistance regions." do.

[0372] By using the insulator 571 and / or the conductor 560 as a mask, the region 531a The region 531b can be formed in a self-aligned manner. Therefore, the region 531a and / or the region 531b do not overlap with the conductor 560, and the parasitic capacitance is reduced. In addition, the channel forming region and the source / drain region (region 531a and No offset region is formed between region 531a and region 531b. By forming 1b in a self-aligned manner, the on-current is increased and the threshold This allows for reduction of the voltage threshold and improvement of the operating frequency.

[0373] In order to further reduce the off-state current, an off-state current is formed between the channel forming region and the source / drain region. An offset region is a region having a high electrical resistivity, and The offset region is a region where the introduction of the impurity element is not performed. This can be achieved by introducing the impurity element described above after the formation of the insulator 5. The insulating layer 75 functions as a mask in the same manner as the insulating layer 571. Impurity elements are not introduced into the region overlapping with the body 575, and the electrical resistivity of the region remains high. It is possible.

[0374] The transistor 510D includes an insulator 570, a conductor 560, a metal oxide 552, and an insulator 554. 50, and an insulator 575 is provided on the side of the oxide 530c. The insulator 575 has a relative permittivity It is preferable that the insulating material has a low resistance. For example, silicon oxide, silicon oxynitride, silicon nitride, silicon dioxide, silicon nitride, fluorine-doped silicon dioxide, carbon-doped silicon dioxide silicon dioxide doped with carbon and nitrogen, silicon dioxide with voids, or resin. In particular, silicon oxide, silicon oxynitride, silicon nitride oxide, When silicon oxide having vacancies is used as the insulator 575, excess silicon dioxide is formed in the insulator 575 in a later process. It is preferable because an oxygen region can be easily formed. In addition, silicon oxide and silicon oxynitride are also preferable. is preferable because it is thermally stable. In addition, the insulator 575 has a function of diffusing oxygen. It is preferable that

[0375] Also, transistor 510D has insulator 575 and insulator 574 on oxide 530. The insulator 574 is preferably formed by sputtering. By using this method, it is possible to form an insulator film with few impurities such as water or hydrogen. For example, aluminum oxide may be used as the insulator 574.

[0376] In addition, the oxide film formed by the sputtering method may extract hydrogen from the structure on which the film is formed. Therefore, the insulator 574 absorbs hydrogen and water from the oxide 530 and the insulator 575. This allows the hydrogen concentration in the oxide 530 and the insulator 575 to be reduced.

[0377] <Transistor structure example 5> A structural example of the transistor 510E will be described with reference to FIGS. 18A to 18C. FIG. 18(A) is a top view of the transistor 510E. 18(C) is a cross-sectional view of the portion indicated by the dashed dotted line L1-L2 in FIG. 18(A) is a cross-sectional view of the portion indicated by W1-W2. For this reason, some elements are omitted in the illustration.

[0378] Transistor 510E is a modification of the transistor described above. To prevent this, differences from the above transistor will be mainly described.

[0379] 18A to 18C, the exposed oxide 530 is removed without providing the conductor 542. b has regions 531a and 531b on a part of the surface. One of the oxides 1b functions as a source region and the other functions as a drain region. An insulator 573 is provided between the object 530b and the insulator 574.

[0380] The region 531 (region 531a and region 531b) shown in FIG. 18(B) is made of oxide 5 The region 531 is a region where an element described later is added to the region 30b. It can be formed by using

[0381] Specifically, a dummy gate is provided on the oxide 530b, and the dummy gate is used as a mask. It is preferable to use the oxide 530b as a thin film and add an element that reduces the resistance of the oxide 530b. The element is added to the region not overlapping with the dummy gate, forming a region 531. The element is added by mass-separating the ionized source gas. ion implantation, which adds ionized source gas without mass separation; and ion doping, which adds ionized source gas without mass separation. method, plasma immersion ion implantation method, etc. can be used.

[0382] Representative elements that reduce the resistance of the oxide 530 include boron and phosphorus. In addition, hydrogen, carbon, nitrogen, fluorine, sulfur, chlorine, titanium, rare gas elements, etc. Representative examples of rare gas elements include helium, neon, argon, krypton, The concentration of these elements is measured by secondary ion mass spectrometry (SIMS). It is possible to measure it using methods such as standard ion mass spectrometry. stomach.

[0383] In particular, boron and phosphorus are used in the manufacturing of amorphous silicon or low-temperature polysilicon. This is preferable because existing equipment can be used. Existing facilities can be repurposed. Capital investment can be reduced.

[0384] Next, an insulating film that will become an insulator 573 and a An insulating film to be the insulator 573 and an insulating film to be the insulator 574 may be formed. By laminating an insulating film that becomes the insulating layer 574, the region 531, the oxide 530c, and the insulating layer 574 are An overlapping area with the edge body 550 can be provided.

[0385] Specifically, after forming an insulating film to be the insulator 580 on the insulating film to be the insulator 574, The insulating film that will become the insulating film 580 is subjected to CMP (Chemical Mechanical Polishing). By performing a dummy gate etching process, a part of the insulating film that will become the insulator 580 is removed. Subsequently, when the dummy gate is removed, the insulator 57 in contact with the dummy gate is removed. Therefore, the side of the opening in the insulator 580 is covered with insulating material. The opening exposes the insulating layer 574 and the insulating layer 573. ... A part of the region 531 is exposed. Next, an oxide film that becomes oxide 530c is formed in the opening. After forming an insulating film to be the insulator 550 and a conductive film to be the conductor 560 in this order, The oxide film that becomes oxide 530c and the insulator 55 are formed by CMP processing or the like until 580 is exposed. 18(A) and the insulating film that will become the conductor 560 are removed. 18(C) can be formed.

[0386] Note that the insulators 573 and 574 are not essential components. It may be designed appropriately depending on the characteristics.

[0387] The transistors shown in FIGS. 18A to 18C can be formed by converting existing devices. Furthermore, since the conductor 542 is not provided, costs can be reduced.

[0388] <Transistor structure example 6> 12 and 13(A) and (B), the conductor 560 functioning as a gate is The structure formed inside the opening of the insulator 580 has been described. It is also possible to use a structure in which the insulator is provided above the insulator. Examples of the structure of the star are shown in Figures 19(A), (B), 20(A), and (B).

[0389] FIG. 19(A) is a top view of a transistor, and FIG. 19(B) is a perspective view of the transistor. 20(A) shows a cross section taken along line X1-X2 in FIG. 19(A), and A cross-sectional view of 2 is shown in FIG.

[0390] The transistors shown in FIGS. 19(A), (B), 20(A), and (B) have a back gate and The conductor BGE functions as a gate insulating film, and the insulator BGI functions as a gate insulating film. , an oxide semiconductor S, an insulator TGI having a function as a gate insulating film, and a front gate The conductive material TGE has a function as a gate, and the conductive material WE has a function as a wiring. In addition, the conductor PE is a mixture of the conductor WE and the oxide S, the conductor BGE, or the conductor TGE. In this case, the oxide semiconductor S has a function as a plug for connecting the , an example is shown that is composed of three oxide layers S1, S2, and S3.

[0391] <Transistor electrical characteristics> Next, the electrical characteristics of an OS transistor will be described. A transistor having a first gate and a second gate is described. A transistor having a gate can be turned on or off by applying different potentials to the first gate and the second gate. For example, by applying a negative potential to the second gate, the threshold voltage can be controlled. By doing so, the threshold voltage of the transistor can be increased to more than 0 V, thereby reducing the off-state current. That is, by applying a negative potential to the second gate, the voltage applied to the first electrode can be reduced. This can reduce the drain current when the applied potential is 0V.

[0392] In addition, when impurities such as hydrogen are added to an oxide semiconductor, the carrier density may increase. For example, when hydrogen is added to an oxide semiconductor, it reacts with oxygen that bonds with metal atoms. In some cases, hydrogen atoms enter the oxygen vacancies, forming water. The carrier density increases. Also, some of the hydrogen atoms bond with oxygen atoms that bond with metal atoms, and the carrier density increases. In other words, oxide semiconductors to which impurities such as hydrogen are added can generate electrons that are The body becomes n-type and has low resistance.

[0393] Therefore, the resistance of the oxide semiconductor can be selectively reduced. There is a region in the body that functions as a semiconductor with low carrier density and functions as a channel formation region. The carrier density is high and the low resistance region functions as a source region or a drain region. A region may be provided.

[0394] Here, when different potentials are applied to the first gate and the second gate, We evaluated the influence of the low-resistance and high-resistance regions on the electrical characteristics of the transistor. Worth it.

[0395] [Transistor structure] 21(A) and 21(C) are cross-sectional views of the transistors used to evaluate the electrical characteristics. In addition, in Fig. 21(A) and Fig. 21(C), some elements are omitted for clarity. The diagram is as follows:

[0396] The transistors shown in FIGS. 21A and 21C function as first gates. A conductor TGE, an insulator TGI functioning as a first gate insulating film, and a side of the first gate an insulator SW serving as a sidewall provided on the surface; an oxide semiconductor S; and a second A conductor BGE that functions as a gate and an insulator BGI that functions as a second gate insulating film The insulator BGI has a first layer in contact with the conductor BGE, a second layer on the first layer, and a second layer The third layer is in contact with the oxide semiconductor S.

[0397] Here, the oxide semiconductor S included in the transistor in FIG. 21A has an n+ region and On the other hand, the transistor shown in FIG. The oxide semiconductor S has an n+ region, an i region overlapping with the conductor TGE, and a region between the n+ region and the i region. and an n-region between the n-region and the n-region.

[0398] The n+ region functions as a source region or a drain region and has a high carrier density. The i-region functions as a channel forming region, and the n+ region The n- region is a high-resistance region with a lower carrier density than the n+ region. This region has a low carrier density and a higher carrier density than the i-region.

[0399] Although not shown, the n+ region of the oxide semiconductor S functions as a source or a drain. The structure is such that it comes into contact with the S / D electrode.

[0400] [Electrical characteristics evaluation results] In the transistor illustrated in FIG. 21(A) and the transistor illustrated in FIG. 21(C), The Id-Vg characteristics were calculated and the electrical characteristics of the transistor were evaluated.

[0401] Here, the threshold voltage of a transistor (hereinafter referred to as The change in the voltage Vsh (hereinafter referred to as ΔVsh) was used. In the d-Vg characteristics, Id=1.0×10 -12 It is defined as the value of Vg at [A].

[0402] The Id-Vg characteristics are determined by the conductor TGE functioning as the first gate of the transistor. The potential applied to the gate (hereinafter also referred to as gate potential (Vg)) is changed from a first value to a second value. When the gate is turned on, the current between the source and drain (hereinafter referred to as the drain current (Id)) ) is the fluctuation characteristic.

[0403] Here, the potential between the source and drain (hereinafter also referred to as drain potential Vd) is set to +0 0.1V, and the potential between the source and the conductor TGE acting as the first gate is -1V. The change in drain current (Id) was evaluated when the voltage was changed from +4V to +4V.

[0404] The calculation was performed using the Silvaco device simulator ATLAS. The table shows the parameters used in the calculation. Eg is the energy gap, Nc is the conduction where Nv is the effective density of states in the valence band.

[0405] [Table 1]

[0406] The transistor shown in FIG. 21(A) has an n+ region of 700 nm on one side and an n- region of 100 nm on the other side. The transistor shown in FIG. 21(C) has an n+ region on one side set to 6 nm. The thickness of the n-region on one side was set to 45 nm. In the transistor shown in FIG. 21(C), the second gate is In this evaluation, the conductive BG that functions as the second gate is The potential of E (hereinafter also referred to as back gate potential (Vbg)) is set to 0.00V, -3.00V , or -6.00V.

[0407] FIG. 21B shows the Id-Vg calculated for the transistor shown in FIG. 21A. The characteristics results are shown below. When the back gate potential is set to -3.00V, the In comparison, the variation in the threshold voltage of the transistor (ΔVsh) was +1.2V. In addition, when the back gate potential is set to -6.00V, the threshold voltage is lower than when it is set to 0.00V. The variation in the threshold voltage of the transistor (ΔVsh) was +2.3V. When the gate potential is set to -6.00V, the transistor The change in the threshold voltage of the second gate (ΔVsh) was +1.1V. Even if the potential of the conductor BGE, which functions as a In addition, even if the back gate voltage is increased, the rise characteristics No changes were observed.

[0408] FIG. 21(D) shows the Id-Vg calculated for the transistor shown in FIG. 21(C). The characteristics results are shown below. When the back gate potential is set to -3.00V, the In comparison, the variation in the threshold voltage of the transistor (ΔVsh) was +1.2V. In addition, when the back gate potential is set to -6.00V, the threshold voltage is lower than when it is set to 0.00V. The variation in the threshold voltage of the transistor (ΔVsh) was +3.5V. When the gate potential is set to -6.00V, the transistor The change in the threshold voltage of the second gate (ΔVsh) was +2.3V. The higher the potential of the conductor BGE, which functions as a On the other hand, the larger the back gate voltage, the worse the rise characteristics become. did.

[0409] From the above, the transistor shown in FIG. 21C has a conductor B The larger the potential of GE, the larger the fluctuation of the threshold voltage of the transistor. On the other hand, the transistor shown in FIG. 21(A) has a conductive layer that functions as a second gate. Even if the potential of the BGE is increased, no change in the amount of fluctuation in the threshold voltage of the transistor is observed. There wasn't.

[0410] Note that this embodiment mode may be implemented in appropriate combination with other embodiment modes described in this specification. It is possible.

[0411] (Fourth embodiment) In this embodiment, the semiconductor device can be used for the OS transistor described in the above embodiment. The structure of the metal oxide will be described.

[0412] <Metal oxide composition> In this specification, CAAC (c-axis aligned crystal), Also sometimes referred to as CAC (Cloud-Aligned Composite) CAAC represents an example of a crystal structure, and CAC represents an example of a function or material configuration. vinegar.

[0413] CAC-OS or CAC-metal oxide is a material that has a conductive function in some parts. The material has insulating properties in some parts and semiconductor properties in the whole material. Note that CAC-OS or CAC-metal oxide is used as the channel of a transistor. When used in the panel formation region, the conductive function is to allow electrons (or holes) to flow as carriers. The insulating function is the function of preventing the flow of electrons, which act as carriers. The function of switching is achieved by making the function of switching and the function of insulating act in a complementary manner. (On / Off function) attached to CAC-OS or CAC-metal oxide In CAC-OS or CAC-metal oxide, By separating the functions of each, the functionality of both can be maximized.

[0414] In addition, CAC-OS or CAC-metal oxide is a conductive region and an insulating region. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. In addition, the conductive region and the insulating region in the material are formed by nanoparticle layers. The conductive and insulating regions may be separated by a bell. In addition, the conductive area may be observed as a cloud-like connected area with a blurred periphery. This may be the case.

[0415] In addition, in the CAC-OS or CAC-metal oxide, a conductive region and The insulating regions are each 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. They may be dispersed in the material at sizes of less than 1 m.

[0416] In addition, CAC-OS or CAC-metal oxide has different band gaps For example, CAC-OS or CAC-metal ox The ide consists of a wide-gap component due to the insulating region and a conductive component due to the conductive region. In this configuration, when carriers flow, In addition, carriers mainly flow in the narrow gap component. The component with a narrow gap acts complementary to the component with a wide gap. Carriers also flow into the wide-gap component in conjunction with the component that has a wide gap. CAC-OS or CAC-metal oxide is used as the channel formation region of the transistor. When used in a transistor, it has a high current driving force in the on-state, i.e., a large on-current. , and high field-effect mobility can be obtained.

[0417] That is, CAC-OS or CAC-metal oxide is a matrix composite. matrix composite, or metal matrix composite It can also be called a matrix composite.

[0418] <Metal oxide structure> Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, for example, CAAC-OS (c-axis oriented crystal-coated oxide semiconductor) igned crystalline oxide semiconductor), Crystalline oxide semiconductor, nc-OS (nanocrystalline oxide semiconductor) semiconductor), pseudo-amorphous oxide semiconductor (a-like OS) amorphous-like oxide semiconductors and amorphous oxide semiconductors There is the body.

[0419] A thin film with high crystallinity can be used as the oxide semiconductor for the transistor. The use of the thin film is preferable because it improves the stability or reliability of the transistor. The thin film may be, for example, a thin film of a single crystal oxide semiconductor or a thin film of a polycrystalline oxide semiconductor. However, thin films of single crystal oxide semiconductors or polycrystalline oxide semiconductors are also suitable. To form a thin film of the material on a substrate, a high temperature or laser heating process is required. This increases the cost of the manufacturing process and also reduces throughput.

[0420] In 2009, we developed an In-Ga-Zn oxide (CAAC-IGZO) with a CAAC structure. The discovery of a new compound called 'anti-cancer drug' has been reported in Non-Patent Documents 2 and 3. CAAC-IGZO has a c-axis orientation, the grain boundaries are not clearly visible, and it can be grown at low temperatures. It has been reported that it is possible to form a thin film on a substrate using CAAC-IGZO. The resulting transistors have been reported to have excellent electrical properties and reliability.

[0421] In 2013, we also developed an In-Ga-Zn oxide (nc-IGZO) with an nc structure. Here, nc-IGZO is a material that can be grown in minute regions ( For example, the atomic arrangement has periodicity in the region of 1 nm or more and 3 nm or less, and It has been reported that no regularity is observed in the crystal orientation between the two.

[0422] In Non-Patent Documents 5 and 6, the above-mentioned CAAC-IGZO, nc-IGZO, The average crystal size of IGZO thin films and low-crystalline IGZO thin films was measured by electron beam irradiation. The change in the thickness is shown in Fig. 1. In a thin film of IGZO with low crystallinity, before the electron beam irradiation, Even in thin films, crystalline IGZO of about 1 nm has been observed. In this case, completely amorphous structure Furthermore, it has been reported that the presence of IGZO with low crystallinity could not be confirmed. Compared with the thin films of CAAC-IGZO and nc-IGZO, the thin films of CAAC-IGZO and nc-IGZO are more resistant to electron beam irradiation. Therefore, CAA is a promising semiconductor for transistors. It is preferable to use a thin film of C-IGZO or a thin film of nc-IGZO.

[0423] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The crystal structure is distorted by the connection of multiple nanocrystals. In the region, the lattice arrangement is changed between a region with a uniform lattice arrangement and another region with a uniform lattice arrangement. This refers to the point where the direction of the

[0424] Nanocrystals are basically hexagonal, but are not limited to regular hexagonal shapes. They may also have non-regular hexagonal shapes. In addition, the distortion may have lattice arrangements such as pentagons and heptagons. In addition, in CAAC-OS, clear grain boundaries (grain bows) are not observed even near the strain. It is not possible to confirm the presence of grain boundaries (also called grain boundaries). This is because the CAAC-OS has a crystalline structure in the ab-plane direction. The oxygen atoms are not densely packed, and the bond distance between atoms is shortened by the substitution of metal elements. This is thought to be because distortion can be tolerated by changing the thickness of the film.

[0425] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter referred to as an In layer) and an elemental A layered crystal consisting of layers containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer). It is noted that indium and element M tend to have a structure (also called a layered structure). When the element M in the (M,Zn) layer is replaced with indium, the (In,M,Zn) ) layer. Also, when indium in the In layer is replaced with element M, it can be expressed as (In, It can also be expressed as the M layer.

[0426] CAAC-OS is an oxide semiconductor with high crystallinity. Since it is not possible to confirm the grain boundaries, the decrease in electron mobility caused by the grain boundaries occurs. In addition, the crystallinity of oxide semiconductors can be affected by impurities and defects. Therefore, CAAC-OS is an oxidized material with few impurities and defects (such as oxygen vacancies). Therefore, oxide semiconductors with CAAC-OS have stable physical properties. Therefore, oxide semiconductors having CAAC-OS are heat-resistant and highly reliable. In addition, CAAC-OS is designed to withstand the high temperatures (so-called thermal budget) in the manufacturing process. Therefore, when a CAAC-OS is used for an OS transistor, This allows for greater freedom.

[0427] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). The atomic arrangement is periodic in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. It may be indistinguishable from the body.

[0428] The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. It is a semiconductor. A-like OS has pores or low density areas. e-OS has lower crystallinity than nc-OS and CAAC-OS.

[0429] Oxide semiconductors have a variety of structures, each of which has different properties. The oxide semiconductors in The compound may have two or more of the c-OS and CAAC-OS.

[0430] <Transistors containing oxide semiconductors> Next, a case where the oxide semiconductor is used in a transistor will be described.

[0431] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility can be obtained. Furthermore, a highly reliable transistor can be realized. do.

[0432] Furthermore, the transistor including the oxide semiconductor has a very low leakage current in a non-conducting state. Specifically, the off-state current per 1 μm of transistor channel width is yA / μ m(10 -24 A / μm) order is shown in Non-Patent Document 7. For example, Low power consumption by utilizing the low leakage current characteristics of transistors using nitride semiconductors. A CPU and other components are disclosed (see Non-Patent Document 8).

[0433] In addition, by utilizing the low leakage current of a transistor using an oxide semiconductor, The application of this transistor to display devices has been reported (see Non-Patent Document 9). The displayed image changes several tens of times per second. The number is called the refresh rate. The refresh rate is also called the drive frequency. Such high-speed screen switching, which is difficult for the human eye to perceive, can cause eye fatigue. Therefore, the refresh rate of the display device is reduced to improve image quality. It has been proposed to reduce the number of times the screen is rewritten. By driving the display device, it is possible to reduce the power consumption of the display device. This is called Idling Stop (IDS) drive.

[0434] In addition, an oxide semiconductor with low carrier density is preferably used for the transistor. When the carrier density of the oxide semiconductor film is reduced, the impurity concentration in the oxide semiconductor film is reduced. In this specification and the like, the impurity concentration is low, and the defect level density is low. A low density of defect states is called high purity intrinsic or substantially high purity intrinsic. For example, oxide Semiconductors have a carrier density of 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 That's all Just do that.

[0435] In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. Since the density is low, the trap level density may also be low.

[0436] In addition, the time required for the charges trapped in the trap levels of the oxide semiconductor to disappear is Therefore, the trap level density is high. A transistor in which a channel formation region is formed in an oxide semiconductor has unstable electrical characteristics. This may be the case.

[0437] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor In order to reduce the impurity concentration in the oxide semiconductor, it is effective to reduce It is preferable to reduce the impurity concentration in the adjacent film. These include alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0438] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0439] When oxide semiconductors contain silicon or carbon, which are elements of Group 14, they are oxidized. Defect levels are formed in semiconductors, which is why defects in silicon and carbon in oxide semiconductors The concentration of silicon and carbon near the interface with the oxide semiconductor (secondary ion mass spectrometry) (SIMS: Secondary Ion Mass Spectrometry) The concentration obtained is 2 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 a toms / cm 3 The following applies.

[0440] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, the defect level is Therefore, alkali metals or alkaline earth metals A transistor using an oxide semiconductor containing such a compound tends to be normally on. Therefore, it is possible to reduce the concentration of alkali metals or alkaline earth metals in the oxide semiconductor. Specifically, it is preferable to use an alkali metal or The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0441] In addition, when nitrogen is contained in an oxide semiconductor, electrons that serve as carriers are generated, and As a result, the oxide semiconductor containing nitrogen is easily converted into an n-type semiconductor. Therefore, the transistor used in the oxide semiconductor tends to be normally on. In this case, it is preferable that the nitrogen content is reduced as much as possible. For example, the nitrogen content in the oxide semiconductor is The concentration is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Below, More preferably 5×10 17 atoms / cm 3 The following applies.

[0442] In addition, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the electron carrier In addition, some of the hydrogen atoms may bond with the oxygen atoms that bond with the metal atoms, forming chiral ions. Therefore, it is necessary to use an oxide semiconductor containing hydrogen. Therefore, the hydrogen in the oxide semiconductor tends to cause a transistor to be normally on. It is preferable that the amount of Si in the oxide semiconductor is as small as possible. The hydrogen concentration obtained by MS was 1×10 20 atoms / cm 3 Less than 1x, preferably 10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than , and more preferably 1 × 10 18 atoms / cm 3 Less than.

[0443] By using an oxide semiconductor with sufficiently reduced impurities for a channel formation region of a transistor, This makes it possible to impart stable electrical properties.

[0444] The discovery of the CAAC and nc structures has led to the discovery of oxide semiconductors with the CAAC or nc structures. Improved electrical characteristics and reliability of conductor-based transistors, as well as reduced manufacturing process costs. This contributes to reducing power consumption and improving throughput. Taking advantage of this property, research is being conducted into the application of this transistor to display devices and LSIs. It is being done.

[0445] Note that this embodiment mode may be implemented in appropriate combination with other embodiment modes described in this specification. It is possible.

[0446] (Embodiment 5) In this embodiment, a product image in which the storage device described in the above embodiment can be used is shown. An example of a display and an electronic device will be described below.

[0447] <Product image> First, a product image that can be used for a storage device according to one embodiment of the present invention is shown in FIG. The region 701 shown in FIG. 22 represents high temperature characteristics (High T operation). , region 702 represents high frequency characteristics (High f operate), and region 703 represents Region 704 represents low off characteristics (Ioff), and is 03 represents the overlapping area.

[0448] When filling the region 701, carbon is used as a channel formation region of a transistor. By applying carbides or nitrides such as silicon nitride or gallium nitride, Also, when the region 702 is to be filled, the channel formation of the transistor can be performed. By applying silicides such as single crystal silicon or crystalline silicon as the region, In addition, when trying to fill the region 703, the channel of the transistor By using an oxide semiconductor or a metal oxide for the hole formation region, the above requirement can be roughly met. can.

[0449] The storage device according to one embodiment of the present invention is preferably used for products in the range shown in area 704, for example. You can be there.

[0450] In conventional products, it is not possible to satisfy all of the areas 701, 702, and 703. However, it has been difficult to achieve this by using a transistor included in a memory device according to one embodiment of the present invention. The transistor has a crystalline OS in the channel formation region. In this case, a memory device and an electric power device which satisfy high temperature characteristics, high frequency characteristics, and low off characteristics are provided. Child devices can be provided.

[0451] The products in the range shown in the area 704 include, for example, low-power consumption and high-performance CPUs. and in-vehicle electronic devices that require high reliability in high-temperature environments. More specifically, the following can be mentioned: FIG. 2(E2) shows an example of an electronic device equipped with a storage device according to one embodiment of the present invention.

[0452] <Electronic equipment> A memory device according to one embodiment of the present invention can be installed in various electronic devices. A storage device according to one embodiment of the present invention can be used as a memory built into an electronic device. Examples of electronic devices include television sets, desktop or laptop computers. personal computers, computer monitors, digital signage (D Comparison of digital signage, pachinko machines, and other large game machines In addition to electronic devices with large screens, digital cameras, digital video cameras, digital Examples include photo frames, mobile phones, portable game consoles, personal digital assistants, and audio playback devices. It can be obtained.

[0453] The electronic device according to an embodiment of the present invention may include an antenna. By doing so, it is possible to display images, information, etc. on the display unit. If the device has a secondary battery, the antenna may be used for contactless power transmission.

[0454] The electronic device according to one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation Number, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power (including the ability to measure radiation, flow rate, humidity, gradient, vibration, odor or infrared) It may have.

[0455] The electronic device according to an embodiment of the present invention can have various functions. (still images, videos, text images, etc.) on the display, touch panel function, calendar Functions such as displaying date and time, running various software (programs) functions, wireless communication functions, and functions to read programs or data recorded on recording media. It can have functions such as those shown in Figures 23(A), (B), (C), (D), and (E1). (E2) shows an example of an electronic device.

[0456] FIG. 23(A) illustrates a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 has a housing 5510 and a display unit 5511. As an interface, a touch panel is provided on the display unit 5511, and buttons are provided on the housing 551. It is provided for 0.

[0457] 23(B) shows a desktop information terminal 5300. The information terminal 5300 includes a main body 5301 of the information terminal, a display 5302, and a keyboard. It has 5303.

[0458] In the above, a smartphone and a desktop information terminal are used as examples of electronic devices. As shown in Figures 23(A) and 23(B), the smartphone and desktop It is possible to apply information terminals other than the standard information terminals, such as smartphones and desktops. Examples of information terminals other than the above include PDAs (Personal Digital Assistants). Assistant), notebook information terminals, and workstations.

[0459] FIG. 23(C) shows an electric refrigerator-freezer 5800, which is an example of the electric appliance. The refrigerator 5800 includes a housing 5801, a refrigerator door 5802, a freezer door 5803, and the like. do.

[0460] In this example, an electric refrigerator-freezer was described as an electrical appliance, but other electrical appliances may also be used. Examples include vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, and induction cookers. , water dispenser, heating and cooling appliances including air conditioners, washing machines, dryers, Examples include audiovisual equipment.

[0461] FIG. 23(D) shows a portable game machine 5200, which is an example of a game machine. The computer includes a housing 5201, a display portion 5202, buttons 5203, and the like.

[0462] In FIG. 23(D), a portable game machine is shown as an example of a game machine. The game machine to which the storage device according to the present invention can be applied is not limited to this. Examples of game machines to which the storage device can be applied include home game machines, Arcade game machines installed in entertainment facilities (game centers, amusement parks, etc.), sports facilities Examples include pitching machines for batting practice that are installed in the facility.

[0463] FIG. 23(E1) shows an automobile 5700 as an example of a moving object, and FIG. 23(E2) shows an automobile FIG. 23(E2) is a diagram showing the area around the windshield in the interior of a vehicle. Display panels 5701, 5702, and 5703 attached to the board Also shown is a display panel 5704 mounted on the pillar.

[0464] The display panels 5701 to 5703 display a speedometer, a tachometer, It provides various information by displaying the driving distance, fuel gauge, gear status, air conditioning settings, etc. In addition, the display items and layout displayed on the display panel can be adjusted by the user. It can be changed as needed to suit your taste, enhancing the design. The display panels 5701 to 5703 can also be used as lighting devices.

[0465] The display panel 5704 displays images from an imaging device (not shown) installed in the automobile 5700. By projecting images, it is possible to compensate for the blind spots obstructed by the pillars. That is, by displaying an image from an imaging device provided on the outside of the automobile 5700, This can compensate for blind spots and increase safety. By doing so, the driver can check for safety more naturally and without any discomfort. 4 can also be used as a lighting device.

[0466] In the above description, an automobile is used as an example of a moving body. For example, the moving object may be a train, a monorail, a ship, an aircraft (helicopter, These include vehicles such as drones, airplanes, and rockets. The storage device according to one embodiment of the present invention can be applied to a moving object.

[0467] A storage device according to one embodiment of the present invention has a long data retention time even in a high-temperature environment. This product can be used in the above electronic devices, and can operate at high speed even in low temperature environments. By using a storage device according to one aspect of the present invention, it is possible to It is possible to provide a highly reliable electronic device that can operate reliably even in Furthermore, it is possible to reduce the power consumption of electronic devices.

[0468] Note that this embodiment mode may be implemented in appropriate combination with other embodiment modes described in this specification. It is possible. [Example]

[0469] In this example, the operating frequency of the memory cell 211 shown in the first embodiment is estimated. In this embodiment, the transistor M11 of the memory cell 211 is an OS transistor. Since the memory cell 211 uses a DOSRAM, the memory cell 211 constitutes a DOSRAM.

[0470] "Allowable voltage fluctuation," one of the specifications required for DOSRAM, is the capacity of DOSRAM. The DOSR is the tolerance for the amount of change in the voltage applied to the capacitance element after data is written. The "data retention time" of AM is the amount of fluctuation in the voltage applied to the capacitance element of DOSRAM. This is the time required to reach the allowable voltage fluctuation. In this example, the "allowable voltage fluctuation" is set to 0. 2V, and the "data retention time" is the voltage applied to the capacitance element (retention capacitance 3.5fF) until the data This is the time required for the voltage to drop by 0.2 V from the state after writing. If the data retention time of OSRAM is 1 hour, the voltage applied to the capacitance element of the OSRAM is This means that it takes 1 hour for the voltage to drop by 0.2V after writing data. .

[0471] The data retention time of DOSRAM is determined by the cutoff voltage of the transistors in the DOSRAM. Here, the cut-off current of a transistor depends on the magnitude of the gate current of the transistor. Port voltage V G = 0V, the drain current I D (hereinafter referred to as Icut) For example, the data retention characteristics of DOSRAM can be improved by If the data retention time of DOSRAM depends only on the size of Icut of the DOS It is inversely proportional to the size of Icut of the transistors that the RAM has.

[0472] If the Icut of the transistors in the DOSRAM is known, The data retention time is the amount of charge lost from the capacitor during data retention (the retention capacity of the capacitor (3. 0.7fC), which is equivalent to the product of the capacitance (0.5fF) and the voltage drop across the capacitance element (0.2V). It can be calculated by dividing by Icut. By setting the retention time and dividing the charge amount 0.7 fC by the retention time, DOSRAM The value of Icut required for the transistors in the If the target retention time is 1 hour, the Icut required for the transistor is Approximately 200zA (200 x 10 -21 A) Icut0 shown in Figure 24 is 200zA. By adjusting the back gate voltage so that In this embodiment, a DOSRAM having a high operating frequency in a wide temperature range can be obtained. The relationship between the back gate voltage and the operating frequency of DOSRAM was evaluated.

[0473] In estimating the operating frequency of DOSRAM, the transistors shown in Figs. A transistor (hereinafter referred to as Sample 1) having the same structure as the transistor 500 was fabricated. The parameters necessary for estimation were extracted from the electrical characteristics. Assuming a transistor 500 as the transistor M11, estimate the operating frequency of the DOSRAM. Got it.

[0474] First, the structure of sample 1 will be described. As shown in FIGS. 13(A) and 13(B), sample 1 has , an insulator 524 disposed on a substrate (not shown), and an acid disposed on the insulator 524. oxide 530a, oxide 530b disposed on oxide 530a, and oxide 530b an oxide 530c disposed thereon; an insulator 550 disposed on the oxide 530c; Conductors 560 (conductors 560a and 560b) arranged on the edge 550; , has.

[0475] The insulator 524 was made of silicon oxynitride with a thickness of 35 nm.

[0476] The oxide 530a is an In film having a thickness of 5 nm formed by DC sputtering. The oxide 530a was formed using In:Ga:Zn=1 A target with an atomic ratio of 3:4 was used, and 45 sccm of oxygen gas was used as the deposition gas. The deposition pressure was 0.7 Pa, the deposition power was 500 W, the substrate temperature was 200° C., and the temperature was 100° C. The distance between the target and the substrate was set to 60 mm.

[0477] The oxide 530b is a 20 nm thick I film formed by DC sputtering. The oxide 530b was formed using an n-Ga-Zn oxide. A target with an atomic ratio of 4:2:4.1 was used, and argon gas was used for the deposition gas. ccm, oxygen gas 15sccm, film formation pressure 0.7Pa, film formation power 500W The substrate temperature was set to 200° C., and the distance between the target and the substrate was set to 60 mm.

[0478] As oxide 530c, a 5 nm thick In film was formed using a DC sputtering method. The oxide 530c was formed using In:Ga:Zn=4. A target with an atomic ratio of 2:4.1 was used, and the deposition gas was oxygen gas at 45 sccm. The deposition pressure was set to 0.7 Pa, the deposition power was set to 500 W, and the substrate temperature was set to 130°C. The distance between the target and the substrate was set to 60 mm.

[0479] The insulator 550 was made of silicon oxynitride with a thickness of 8 nm. Titanium nitride with a film thickness of 10 nm was used as the conductor 560b. We used

[0480] Sample 1 having the above-described configuration has a channel length of 0.37 μm and a channel width of 0.24 μm. The sample 1 is a transistor having a capacitance of m. In addition, the insulator 514, the insulator 516, the conductor 503, the insulator 522, the conductor 54 2, insulator 554, conductor 540, insulator 580, insulator 574, insulator 581, etc. do.

[0481] Next, in sample 1, the I D -VG Measurements were taken. D -V G measurement The drain potential V D to +1.08V, and the source potential V S to 0V, Port potential V G The back gate voltage was swept from -1.0V to +3.3V. V BG The measurement was performed at -7.1V. The measurement temperatures were -37°C, 27°C, 83°C, 121°C, and 14°C. The test was carried out at six levels: 4°C, 192°C, and 6°C. The 5-inch square substrate was fixed on a thermo chuck set to each of the above temperatures, and the transistor was Ta's I D -V G Measurements were also carried out. BG and measurement temperature Measurements were carried out on three elements for each degree.

[0482] Obtained I D -V G From the curve, the transistor shift voltage (Vsh) and subthreshold voltage The threshold swing value (S value) was calculated. The gate voltage change in the subthreshold region changes the drain current by one order of magnitude at a constant voltage. This refers to the amount of

[0483] As shown in the previous embodiment, the transistor 500 has a metal oxide film in the channel forming region. A transistor using a metal oxide in a channel formation region is, for example, Compared to transistors that use Si in the panel formation region, the leakage current in the non-conducting state is extremely low. Therefore, the transistors that use metal oxide in the channel formation region have It may be difficult to detect Icut. Since it was difficult to measure the actual value of I D -V G Vsh and Sva obtained from the curve Icut was estimated from lue by extrapolation using equation (1). As shown, the off-state current of the transistor is V G = 0V according to the S value. I D is assumed to be monotonically decreasing.

[0484]

number

[0485] Next, the I of transistor 500 D -V S Measurements were taken.

[0486] Here, a method for estimating the DOSRAM operating frequency will be explained. The frequency is the reciprocal of the data write cycle time of DOSRAM. The data write cycle time is set based on the charging time of the capacitance element of the DOSRAM. In this embodiment, the data write cycle time of the DOSRAM is The time equivalent to 40% of the DOSRAM operating frequency (the inverse of the DOSRAM operating frequency) is The time was set to the charging time of the quantum element.

[0487] The operating frequency of DOSRAM depends on the charging time of the capacitance element of DOSRAM. Therefore, when estimating the DOSRAM operating frequency, the capacitance element of the DOSRAM must be considered first. In this embodiment, the charge time of the DOSRAM is known in advance. The state in which a potential of 0.52V or more is applied to the storage capacitor (3.5fF) is called the "charge" state. Therefore, in this embodiment, the data write operation of the DOSRAM is defined as "a state in which the data is written to the DOSRAM." The time from when the operation starts until the potential applied to the capacitor element reaches 0.52V is This corresponds to the charging time of the capacitance element in the SRAM.

[0488] The charging time of the capacitance element of DOSRAM is , I of the transistors in DOSRAM D Therefore, in this embodiment, It is assumed that the transistors in the DOSRAM are affected when writing data to the DOSRAM. The potential (see FIG. 25A) of the transistor according to one embodiment of the present invention (L / W=0. 37 / 0.24μm) to reproduce the DOSRAM data write operation. , the I of the transistor at this time D Figure 25(A) shows the capacitance element C It is assumed that data is written to A via transistor M11 (the capacity of FIG. 2(B) The capacitance element corresponding to the capacitance element CA is represented as Cs in Figure 25(A). D represents the drain. , G represents the gate, and S represents the source. The potential of the source of transistor Tr1 (capacitance The voltage applied to the capacitance element Cs is V S By turning on transistor Tr1, current I D flows, and the capacitance element Cs is charged. Specifically, the gate potential V g to +2.97V, drain potential Vd to +1.08V, and source potential V S from 0V to + By sweeping the voltage to 1.2V, the I D Measurement was performed. Back gate voltage V BG The measurement was performed at -7.1V. The measurement temperatures were -37℃, 27℃, 83℃, 121℃, 144℃, The test was carried out at six levels of 192°C.

[0489] The DOSRAM has a channel length (L) of 60 nm and a channel width (W) of 60 nm. A configuration including a transistor and a capacitance element with a storage capacitance of 3.5 fF was assumed. I obtained from transistor 500 (L / W=0.37μm / 0.24μm) D The value of The size of the transistor (L / W=60 / 60nm) assumed to be used in DOSRAM is used as a compensation. Corrected.

[0490] DOSRAM starts charging and V S is the write determination voltage V CS Charging is complete when it reaches This time is the charging time t W (See Figure 25(B)). The charge stored in the capacitance element of the storage capacitance Cs [F] is Q [C], and the charging time is t W [sec ], the potential applied to the capacitance element by charging is Vcs (= Vs) [V], The drain current of the transistor is I D When [A] is used, the following formula is used between each parameter. The relationship (2) holds.

[0491]

number

[0492] By modifying equation (2), the charging time t W The following formula (3) (see Figure 25(C)).

[0493]

number

[0494] In this example, Cs in formula (3) is 3.5 fF, Vcs is +0.52 V, and the above-mentioned I D -V S The measured I D Substituting the above, the charging time t W Calculate Ta.

[0495] DOSRAM operating frequency f and charging time t W The relationship can be expressed by equation (4).

[0496]

number

[0497] In equation (4), A is a coefficient. In DOSRAM, the write time is Since the time required for writing is estimated to be 40%, in this example, coefficient A is set to 0.4. The operating frequency f was calculated.

[0498] In sample 1, the D when the power supply voltage was 3.3 V and the back gate voltage was -7.1 V The operating frequency of the OSRAM is shown in Fig. 26. In Fig. 26, the horizontal axis is the reciprocal of the temperature [K -1 ] (In Figure 26, it is written as "1000 / Temperature[1 / K]"), and the vertical axis indicates the operating frequency [MHz]. As shown in Figure 26, the higher the temperature, the higher the operating frequency. As shown in Figure 26, the operating frequency at 192°C was 1 The frequency was calculated to be 053MHz.

[0499] From the above, it is possible to use metal oxide in the channel formation region of the transistor in DOSRAM. By doing so, we found that the higher the temperature, the higher the operating frequency of the DOSRAM.

[0500] The configurations, methods, etc. shown in this example may be at least partially similar to other examples described in this specification. The present invention can be implemented in appropriate combination with the embodiments. [Example]

[0501] In recent years, there has been a remarkable development in AI (Deep Learning) and an improvement in the processing power of processors. Therefore, there is a demand for larger capacity and lower power consumption of the calculation memory. In M, in order to obtain sufficient off and on states of the cell transistor, the conventional 3.3V power supply was used.

[0502] 65nm CAAC-IGZO FET (In-Ga with CAAC structure in semiconductor layer) -Zn oxide containing transistors) and 60nm Si CMOS process Using the actual measurement data of a DOSRAM with a memory capacity of 64 kb, the word line potential We investigated the reduction of power supply voltage by optimizing the back gate potential.

[0503] Figure 27(A) shows the device structure of the CAAC-IGZO FET included in the memory cell. The transistor is the same as the transistor 500 described in the above embodiment. Therefore, the transistor has a top gate electrode (TGE), a top Gate insulating layer on the gate electrode side (TGI), back gate electrode (BGE), back gate It has a gate insulating layer (BGI) on the electrode side. The transistor is an S-channel It is a transistor with this structure.

[0504] Figure 27(B) shows the back gate voltage Vbg of the CAAC-IGZO FET, which is changed from 0V to - The actual measurement results of the Id-Vg characteristics when the voltage was changed in 2V increments up to 18V are shown in Figure 28(A). ) shows the dependence of the field effect mobility μFE on the back gate voltage Vbg. 1 shows the dependency of the threshold voltage Vth on the back gate voltage Vbg.

[0505] From Figures 27(A), 27(B), 28(A), and 28(B), the Si FET In the case of CAAC-IGZO FET, the threshold voltage is controlled by channel doping. The back gate voltage Vbg allows the threshold voltage Vth to be controlled over a wide range. On the other hand, if the back gate voltage Vbg becomes too large in the negative direction, the field effect As can be seen from FIG. 28(A), when Vbg is less than −8 V, the field effect It can be seen that the decrease in mobility μFE is large.

[0506] Figure 29 shows the block diagram of the prototype 64kb DOSRAM. The DOSRAM includes a memory cell array 801 and a peripheral circuit 802. The circuit 803 and the peripheral circuit 802 such as the bit line driver circuit are driven at 1.2V. The word line driver circuit 803 also includes a level shifter 804 and a buffer 805 . The low potential side power supply for these two circuits is generated by a negative potential generating circuit 811 for the top gate, which will be described later. The word line WL is connected to the output of the buffer. The CAAC-IGZO included in the memory cell 806 that constitutes the memory cell array 801 The back gate of the FET is connected to the output of a back gate negative potential generating circuit 821, which will be described later. The negative potential (Vbg) supplied by the generating circuit is applied.

[0507] The refresh frequency of a memory cell is mainly determined by the leakage current of the cell transistor. To achieve one flash per hour, the drain current Id in the unselected state must be 200 zA / F at 85°C. ET or less (z is 10- 21 The back gate voltage (prefixed with ) needs to be very low. When adjusting Vbg to make the drain current Id 200zA or less when Vg is 0V, Vb g must be below -7V.

[0508] In order to reduce the power supply voltage, the word line potential (top gate potential) and back gate potential The word line potential and back gate potential were optimized. Three types of operating conditions will be explained. The first is the top gate voltage Vtg (corresponding to the voltage supplied to the word line WL) H is set to 3.3V, the low-potential side voltage VSSL is set to 0V, and the back gate voltage Vbg is set to -7V. The second is drive condition A, where the high-potential side voltage VDDH is 2.5 V and the low-potential side voltage VSSL is 1. The third is drive condition B, where V is -0.8V and the back gate voltage Vbg is -3V. The high-side voltage VDDH is set to 1.8V, the low-side voltage VSSL is set to -1.5V, and the back gate This is drive condition C, where the output voltage Vbg is 0 V. Note that an operating frequency of about 100 MHz is obtained. Therefore, in this study, the word line The potential difference (VDDH-VSSL) was fixed at 3.3V.

[0509] Figure 30(A) shows the CAAC-I driven under drive conditions A, B, and C. 30(B) and 30(C) show the Id-Vg characteristics of the GZO FET under the driving conditions. 10A, a diagram showing the operating voltages under drive conditions B and C.

[0510] To retain the data written in the memory cell, the drain current Id must be sufficiently small. In addition, when writing data to a memory cell, it is necessary to Therefore, the drain current Id needs to be increased. The thickness of I) is calculated as EOT equivalent compared to the thickness of the gate insulating layer (TGI) on the top gate electrode side. Therefore, under driving condition A, an extremely small drain current of 1 zA is generated. To achieve this, the back gate voltage Vbg must be set to -7V.

[0511] On the other hand, under driving condition B, a negative voltage is applied not only to the back gate electrode but also to the top gate electrode. Under drive condition B, the back gate voltage Vbg is -3 V, so the threshold voltage The amount of change in Vth is smaller than in drive condition A, but the negative potential VSSL is applied to the top gate electrode. By supplying a sufficient amount of Furthermore, under drive condition C, the back gate voltage Vbg can be set to 0V.

[0512] By supplying a negative potential to the top gate electrode as the low-potential side voltage VSSL, Therefore, the absolute value of the output voltage Vbg can be reduced, thereby improving the reliability of the memory device. This can be done.

[0513] Figure 31 shows a combination of a 65nm CAAC-IGZO FET and a 60nm Si CMOS. VDDH, VSSL, and Vbg of the DOSRAM prototyped using the combined process The results of the evaluation of the data retention status are shown in Figure 37. vinegar. The evaluation was carried out at an ambient temperature of 25°C, with the potential difference between VDDH and VSSL at 3.3V, and using multiple The same combination of VDDH, VSSL, and Vbg was tested.

[0514] Specifically, information is written to the entire 64kb DOSRAM memory cell array, After holding for 1 second, the information is read (Figure 31 shows "write→1s hold→re ad") to check whether the written information is correctly retained (Pas The write time (charging the memory cell capacitance) was The time) was set to 200 ns and the read time was set to 150 ns.

[0515] Prior to evaluation, the voltage was set to VDDH=1.7V, VSSL=-1.2V, and Vbg=0V. The error bits in the condition are removed as initial defects (see Figure 31). al FAILs are removed assuming ○ region h (This condition is written as "as no error bits.") Therefore, the error is considered to be caused by the DOSRAM manufacturing process. can be obtained.

[0516] Figure 32 (A) and (B) show the retention time at an ambient temperature of 85°C (Figure 32 shows "da "Ta retention at 85℃" and "write→hold→read" are displayed. The evaluation results for VDDH=1.8V, VSSL=-1.5V, and Vbg=0V. The yield for each retention time is the yield for a retention time of 1 second. As can be seen from Figure 31, even when the retention time is 1 hour, This shows that a high yield has been achieved.

[0517] From Figure 31 and Figures 32(A) and (B), it can be seen that by adjusting Vbg, driving condition B (Vb Normal operation was observed under all conditions, including drive condition C (Vbg=-3V) and drive condition C (Vbg=0V). ℃ 1 hour retention characteristics are obtained. In addition, from the viewpoint of operation and retention performance, the power supply voltage is set to 3.3V It was demonstrated that it is possible to reduce Vbg from -7V to 0V. This reduces the load on the cell transistor and Vbg generation circuit, and improves signal quality. This is advantageous for reliability.

[0518] The effect of the above difference in operating voltage was measured using a cell with a cell area of ​​3.696um. 2 1Mb DOSRAM (maximum The estimate was made assuming that the small array was 128 x 128. Under drive condition A, Vbg is -7V. The absolute value of the voltage is large and a high-voltage transistor is required. Therefore, here, we will use driving condition B. A comparison is made for drive condition C.

[0519] FIG. 33(A) shows a negative potential generating circuit (negative potential generating circuit 811 and / or negative potential generating circuit The negative potential generating circuit 811 includes a ring oscillator 812, a transistor 813, and a The negative potential generating circuit 8 is configured by a charge pump 813 and a comparator 814. The negative potential generating circuit 821 has a function of supplying VSSL. 822, a charge pump 823, and a comparator 824. The generating circuit 821 has a function of supplying Vbg.

[0520] FIG. 33(B) shows a negative potential generating circuit (negative potential generating circuit 811 and / or negative potential generating circuit The operating waveform of the circuit 821 is shown in FIG. 34(A). FIG. 34(B) shows the conditions for verifying the operation of the charge pump. In FIG. 1, the ring oscillator 812 is driven by the output signal EN of the comparator 814. The output ROOUT of the ring oscillator 812 is fed to a charge pump 813. Similarly, in the negative potential generating circuit 821, the ring oscillator 822 The intermittent operation is controlled by the output signal EN of the comparator 824. The output ROOUT of 2 is supplied to a charge pump 823 .

[0521] That is, the charge pump (charge pump 813 and / or charge pump 823) When the output of the ring oscillator (ring oscillator 812 and / or The ring oscillator 822 and the charge pump are in operation (also known as the "active state"). If it is too low, it stops functioning (also known as "dormant" or "sleep" state).

[0522] In the negative potential generating circuit 811 that generates VSSL, the load current during operation ( , "load current") is 8uA on average (Figure 34(B) shows "8uA ( Since the back gate electrode has a floating structure, In the negative potential generating circuit 821 under condition A, the load current is small (in FIG. 34(B), "l The negative potential generating circuit 811 and the negative potential generating circuit 82 The number of inverter stages that make up 1 (indicated as "# of INV.s" in Figure 34(A)) Both have five stages, and the number of charge pump stages (Figure 34(B) shows "# of stages" The minimum output voltage (indicated as "mini ges") is six-stage. Both of the voltages are approximately -5V (as shown in Figure 34(B)). is written as "approx. -5V").

[0523] FIG. 35(A) shows a comparator (comparator 814 and / or comparator 824) ) is shown in the circuit diagram. Figure 35(B) shows the operation waveform of the comparator. A CAAC-IGZO FET is used for the differential pair for comparison, and the negative potential VIN (VSSL or The structure is such that Vbg (or Vbg) is applied to the back gate and Vref is applied to the top gate. i When using a FET, convert the negative potential into a positive potential using a resistor string or other means to divide the voltage. It is necessary to compare the results from the viewpoint of the back gate potential of the CAAC-IGZO FET. By supplying negative potential, it is possible to convert negative potential without increasing the current consumption or using an extra circuit to convert it to positive potential. It is possible to compare the voltage level. When Vref=1.18V, it is possible to determine whether VIN=-1.5V. This can be done.

[0524] Figures 36(A) to 36(C) show the results of simulations of 1Mb (storage capacity, Figure 36(C) shows the results of simulations of 1Mb (storage capacity, (Denoted as "Density") The estimated power consumption and area of ​​DOSRAM are shown. The number of memory cells per word line of 1Mb DOSRAM (Fig. 36(C) shows "Me The memory cells per WL is 128. b The power consumption of DOSRAM during operation ("operating power" or "active power") ") and standby power consumption (also called "standby power" or "Standby Power" By adopting the 1.8V power supply and drive condition C, the 2.5 Compared to drive condition B of V, the standby power consumption is reduced by approximately 50% to 120.2 nW.

[0525] FIG. 36B shows the estimated power consumption and operating time of the negative potential generating circuit 811 under the driving condition B. From Figure 36(B), the operating time for generating a negative potential ("Active The sleep time (also called "Sleep Time") is 2.48 μs. The time it takes to generate a negative voltage (VSSL = -1.5V) is 28.4 seconds. , once every 28.4 seconds, and the impact on standby power consumption is practically negligible (Fig. 36(B), average Average Power (also referred to as "Average Power").

[0526] In 1Mb DOSRAM, the memory section (also called "Memory") includes a memory cell array. All circuits other than the negative potential generating circuit (also called "Neg. Bias") are The power source can be turned off (1 nW or less) (also, in FIG. 36(A), the memory section and the negative potential (The total includes the generation circuit.) Therefore, the consumption of 1Mb DOSRAM The power consumption is the power consumption of the negative potential generating circuit when it is in sleep mode ("sleep power" or "Sleep Po wer) accounts for almost 100%.

[0527] In the negative potential generating circuit 811, the driving condition B (VSSL=-0.8V) is lower than the driving condition C (VSSL=-0.8V). However, the power consumption of C (VSSL=-1.5V) is large. The operating power of the negative potential generating circuit is 132 μW (see FIG. 36(A)). This is only 2.68% of the power consumption of M, which is 4.83mW when operating at 100MHz.

[0528] FIG. 36(C) shows the area occupied by the memory section including the memory cell array (also called "Area A"). ) and the area occupied by the negative potential generator (also called "Area B"). The area occupied by Mb DOSRAM is 128 memory cells connected to one word line WL. As shown in FIG. 36(C), the area occupied by the negative potential generating circuit is The ratio of the occupied area to that of 1Mb DOSRAM (Figure 36 shows "ratio A / (A+B)" (expressed as ) and is small at 0.209%.

[0529] 1.8V power supply DOSRAM is low-power, suitable for IoT and AI edge computing It is an embedded memory. [Explanation of symbols]

[0530] C21: Capacitor element, C22: Capacitor element, C24: Capacitor element, M11: Transistor M12: transistor, M13: transistor, M14: transistor M15: transistor, M16: transistor, M21: transistor M24: Transistor, M31: Transistor, M34: Transistor N11: Node, N12: Node, N13: Node, N14: Node S1: oxide; Tr21: transistor; Tr22: transistor; Tr23: Transistor, Tr31: Transistor, Tr32: Transistor , Tr33: transistor, Tr34: transistor, Tr41: transistor Tr42: Transistor, 13: Transistor, 14: Transistor , 15:Transistor , 16:Transistor , 17:Transistor , 1 8: transistor, 19: transistor, 20: transistor, 21: transistor Transistor, 33: transistor, 34: transistor, 35: transistor , 36: Transistor , 37: Transistor , 38: Transistor , 3 9: transistor, 40: transistor, 41: transistor, 54: circuit , 55: Circuit

Claims

1. A plurality of circuits arranged in a matrix, At least one of the circuits is a semiconductor device having a first transistor, a first conductive layer having a region that functions as a first gate electrode of the first transistor; a first insulating layer having a region overlying the first conductive layer; an oxide semiconductor layer having a region located over the first insulating layer and including a channel formation region of the first transistor; a second insulating layer having a region located on the oxide semiconductor layer; a second conductive layer having a region located on the second insulating layer and functioning as a second gate electrode of the first transistor; a third insulating layer having a region located on the second conductive layer; a third conductive layer having a region in contact with an upper surface of the third insulating layer and electrically connected to the oxide semiconductor layer; a fourth conductive layer having a region in contact with an upper surface of the third insulating layer and electrically connected to the first conductive layer; a fifth conductive layer having a region in contact with an upper surface of the third insulating layer and electrically connected to the second conductive layer; the third insulating layer has a region in contact with a side surface of the second insulating layer and a region in contact with a top surface of the second conductive layer; the fourth conductive layer has a region extending in a first direction; the fifth conductive layer has a region extending in the first direction, the third conductive layer has a region in contact with an upper surface of the oxide semiconductor layer, the fifth conductive layer is electrically connected to a second gate electrode of a first transistor included in a circuit adjacent to the circuit in the row direction.

2. A plurality of circuits arranged in a matrix, At least one of the circuits is a semiconductor device having a first transistor, a first conductive layer having a region that functions as a first gate electrode of the first transistor; a first insulating layer having a region overlying the first conductive layer; an oxide semiconductor layer having a region located over the first insulating layer and including a channel formation region of the first transistor; a second insulating layer having a region located on the oxide semiconductor layer; a second conductive layer having a region located on the second insulating layer and functioning as a second gate electrode of the first transistor; a third insulating layer having a region located on the second conductive layer; a third conductive layer having a region in contact with an upper surface of the third insulating layer and electrically connected to the oxide semiconductor layer; a fourth conductive layer having a region in contact with an upper surface of the third insulating layer and electrically connected to the first conductive layer; a fifth conductive layer having a region in contact with an upper surface of the third insulating layer and electrically connected to the second conductive layer; the third insulating layer has a region in contact with a side surface of the second insulating layer and a region in contact with a top surface of the second conductive layer; the fourth conductive layer has a region extending in a first direction; the fifth conductive layer has a region extending in the first direction, the third conductive layer has a region extending in a direction intersecting the first direction, the third insulating layer has at least a first opening, a second opening, and a third opening; the oxide semiconductor layer and the third conductive layer are electrically connected through the first opening; the first conductive layer and the fourth conductive layer are electrically connected through the second opening, the second conductive layer and the fifth conductive layer are electrically connected through the third opening, the first opening overlaps with the oxide semiconductor layer; the second opening does not overlap with the oxide semiconductor layer and does not overlap with the second conductive layer; the third opening does not overlap with the oxide semiconductor layer and does not overlap with the first conductive layer; the third conductive layer has a region in contact with an upper surface of the oxide semiconductor layer, the fifth conductive layer is electrically connected to a second gate electrode of a first transistor included in a circuit adjacent to the circuit in the row direction.

3. In claim 1 or 2, In a plan view, the second conductive layer has a first region having a first width in a channel length direction of the first transistor, and a second region having a second width in the channel length direction of the first transistor that is smaller than the first width; the third conductive layer overlaps with the oxide semiconductor layer in the second region.

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