Nitride semiconductor device

Abstract

To provide a nitride semiconductor device capable of enhancing device characteristics.SOLUTION: A nitride semiconductor device includes a first polarization doped layer that is a nitride semiconductor containing aluminum and that has a first conductive-type characteristic due to an aluminum compositional gradient in a thickness direction thereof. The first polarization doped layer includes a fin part projecting upward from a top surface. The nitride semiconductor device includes a gate electrode that is disposed on a side face of the fin part via a gate insulating film or disposed on the side face of the fin part in a Schottky junction. The nitride semiconductor device includes a first electrode disposed on an upper surface of the fin part. The nitride semiconductor device includes a second electrode disposed below the fin part.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The technology disclosed in this specification relates to a nitride semiconductor device. [Background technology]

[0002] Patent Document 1 discloses a fin field effect transistor using a wide-gap semiconductor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2024-16694 Summary of the Invention [Problem to be solved by the invention]

[0004] Aluminum-containing nitride semiconductors are ultra-wide bandgap semiconductors that can improve the performance of fin field-effect transistors. However, their deep dopant levels make it difficult to convert them to n-type or p-type by impurity doping, making it difficult to fabricate fin field-effect transistors. [Means for solving the problem]

[0005] One aspect of the nitride semiconductor device disclosed in this specification is a nitride semiconductor containing aluminum, and includes a first polarization-doped layer having first conductivity type characteristics due to an aluminum composition gradient in the thickness direction. The first polarization-doped layer includes a fin portion protruding upward from the upper surface. The nitride semiconductor device includes a gate electrode disposed on a side surface of the fin portion via a gate insulating film, or disposed on the side surface of the fin portion by a Schottky junction. The nitride semiconductor device includes a first electrode disposed on the upper surface of the fin portion. The nitride semiconductor device includes a second electrode disposed below the fin portion.

[0006] In this specification, the term "aluminum-containing nitride semiconductor" is a concept that includes binary or higher-component nitride semiconductors. Therefore, binary nitride semiconductors (e.g., AlN), ternary nitride semiconductors (e.g., AlGaN, AlInN, AlBN), and quaternary nitride semiconductors (e.g., AlGaInN) are also included in the scope of nitride semiconductors in this specification.

[0007] According to the above configuration, the first polarization-doped layer having the fin portion can be made to have the first conductivity type by grading the aluminum composition, which makes it possible to fabricate a fin field effect transistor of the first conductivity type. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a schematic cross-sectional view of a semiconductor device 1. FIG. [Figure 2] FIG. 10 is a diagram showing p-type polarization doping when the principal surface orientation is an Al polar plane. [Figure 3] 2A to 2C are schematic cross-sectional views illustrating a method for manufacturing the semiconductor device 1. FIG. [Figure 4] 2A to 2C are schematic cross-sectional views illustrating a method for manufacturing the semiconductor device 1. FIG. [Figure 5] FIG. 10 is a schematic cross-sectional view of a semiconductor device 201 according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION [Example]

[0009] (Structure of semiconductor device 1) 1 shows a schematic cross-sectional view of a semiconductor device 1. The semiconductor device 1 is a vertical fin field effect transistor. The semiconductor device 1 mainly includes a support substrate 10, a first polarization doped layer 11, a second polarization doped layer 12, a gate insulating film 13, a gate electrode 14, an interlayer insulating film 15, a source electrode 21, and a drain electrode 22.

[0010] The support substrate 10 is a free-standing SiC substrate. The support substrate 10 is p-type SiC doped with acceptor impurities. In this example, the support substrate 10 is 4H—SiC with an acceptor concentration of 5×1019 (cm -3 ) A second polarization doped layer 12 and a first polarization doped layer 11 are stacked on an upper surface 10t of the support substrate 10. That is, the support substrate 10 is disposed in contact with a lower surface 12b of the second polarization doped layer 12. The first polarization doped layer 11 is disposed in contact with an upper surface 12t of the second polarization doped layer 12. A first interface IF1 is formed between the first polarization doped layer 11 and the second polarization doped layer 12. A second interface IF2 is formed between the second polarization doped layer 12 and the support substrate 10.

[0011] The second polarization doped layer 12 and the first polarization doped layer 11 are layers formed on the support substrate 10 by epitaxial growth (e.g., MOVPE). Heteroepitaxial growth of AlN on SiC can reduce lattice mismatch and thermal expansion mismatch. Therefore, the second polarization doped layer 12 and the first polarization doped layer 11 can be made into high-quality crystals.

[0012] The second polarization doped layer 12 and the first polarization doped layer 11 are nitride semiconductors containing aluminum, and have p-type characteristics due to the aluminum composition gradient in the thickness direction (z direction). The second polarization doped layer 12 and the first polarization doped layer 11 are layers to which carrier impurities such as donor impurities and acceptor impurities are not intentionally added. Specific details of the second polarization doped layer 12 and the first polarization doped layer 11 will be described later.

[0013] The second polarization doped layer 12 and the first polarization doped layer 11 may inevitably contain carrier impurities. However, even in this case, distributed polarization doping, which will be described later, is dominant. In addition, the concept of "aluminum-containing nitride semiconductor" in this specification includes binary or higher nitride semiconductors. Therefore, binary nitride semiconductors (e.g., AlN), ternary nitride semiconductors (e.g., AlGaN, AlInN, AlBN), and quaternary nitride semiconductors (e.g., AlGaInN) are also included in the scope of nitride semiconductors in this specification. In this example, the second polarization doped layer 12 and the first polarization doped layer 11 are made of AlGaN.

[0014] The first polarization-doped layer 11 includes a drift portion 11d and multiple fin portions 11f. The drift portion 11d is located at the bottom of the first polarization-doped layer 11 and includes an upper surface 11t. The drift portion 11d functions as a drift layer. The multiple fin portions 11f are located at the top of the first polarization-doped layer 11 and protrude upward (in the +z direction) from the upper surface 11t. The fin portion 11f functions as a channel layer of a fin field-effect transistor. The fin portion 11f includes side surfaces 11fs on the ±x-direction sides and an upper surface 11u at its upper end. The fin portion 11f has a fin width Wf and a fin height Hf. The fin width Wf and the fin height Hf can be appropriately determined so as to enable an enhancement mode operation, which will be described later. The multiple fin portions 11f are periodically arranged in the x-direction with a fin pitch Pf.

[0015] A gate insulating film 13 is disposed on the side surface 11fs of the fin portion 11f and the top surface 11t of the drift portion 11d. A gate electrode 14 is disposed on the surface of the gate insulating film 13. The gate electrode 14 has a gate length Lg in the depth direction. An interlayer insulating film 15 covers the side surface 14s, top surface 14t, and end surface 14e of the gate electrode 14.

[0016] A contact layer 11c is formed on the upper surface 11u of the fin portion 11f. The contact layer 11c is a layer for making an ohmic contact between the source electrode 21 and the fin portion 11f by a metal / AlN junction. The contact layer 11c is a layer doped with beryllium. The contact layer 11c can be formed by ion-implanting beryllium into the upper surface 11u and then annealing. The depth profile of the beryllium concentration in the upper surface 11u has a peak near the upper surface 11u. The concentration peak exists in a region 10 nm deep from the upper surface 11u. In other words, the contact layer 11c is an ultra-thin layer of 10 nm or less.

[0017] The source electrode 21 is disposed so as to be in contact with the contact layer 11c. The source electrode 21 is also disposed on the surface of the interlayer insulating film 15, which covers the side surface 14s, the top surface 14t, and the end surface 14e of the gate electrode 14. This forms a field plate FP. The function of the field plate FP will be described later. A portion of the side surface 14s of the gate electrode 14 and a portion of the source electrode 21 face each other via the interlayer insulating film 15. That is, in a direction parallel to the top surface 11t of the first polarization-doped layer 11 (i.e., the x-direction), the gate electrode 14 and the source electrode 21 overlap in an overlap region OL.

[0018] The drain electrode 22 is disposed in contact with the lower surface 10b of the support substrate 10. In other words, the drain electrode 22 is disposed on the lower side (-z direction side) of the fin portion 11f.

[0019] (Explanation of distributed polarization doping) The first polarization-doped layer 11 and the second polarization-doped layer 12 are layers formed by distributed polarization doping (DPD). DPD is realized by AlGaN with an AlN mole fraction that is graded in the direction perpendicular to the substrate (z direction). Note that, hereinafter, the AlN mole fraction may be referred to as the "Al composition."

[0020] DPD will be explained. Group III nitride semiconductor crystals such as AlN and GaN have large polarization due to their strong ionic bonding. Polarization charges usually appear on the front and back surfaces of the crystal. However, in the case of a mixed crystal semiconductor (AlN) where AlN and GaN are mixed in a ratio of x:(1-x), x Ga 1-x In GaN, when the Al composition x changes, the difference in polarization between AlN and GaN causes positive or negative polarized charges corresponding to the composition change to be generated inside the crystal. Electrons and holes are attracted by these charges, which essentially produces the same effect as impurity doping.

[0021] As shown in Figure 2, when the Al polarity plane is the principal plane orientation (

[0001] direction), the upper surface is the aluminum surface and the lower surface is the nitrogen surface. In this plane orientation, if there is a composition gradient G0 in which the Al composition decreases toward the upper surface, p-type polarization doping occurs (see Figure 2). On the other hand, in this plane orientation, if there is a composition gradient in which the Al composition decreases toward the lower surface, n-type polarization doping occurs (not shown).

[0022] The thickness of the DPD layer can be in the range of several tens of nanometers to several micrometers. The composition distribution of the DPD layer can be controlled to within the order of several tens of nanometers. A linear (straight-line) composition gradient in the thickness direction can produce a nearly uniform charge distribution. The greater the gradient of the composition gradient (the amount of change in composition per unit distance), the higher the space charge density can be. In other words, the same effect as increasing the impurity doping concentration can be obtained. The composition gradient is not limited to a linear gradient; various curves are also possible. This allows for a nonlinear charge distribution in the thickness direction. In this example, no intentional impurity doping was performed on the DPD layer.

[0023] (Explanation of the first polarization doped layer 11 and the second polarization doped layer 12) In this embodiment, as shown in Fig. 1, the first polarization-doped layer 11 and the second polarization-doped layer 12 have an Al polarity plane as the principal surface orientation (the <0001> direction) and have a composition gradient in which the Al composition decreases toward the upper surface. Therefore, they are p-type polarization doped.

[0024] The thickness T2 of the second polarization doped layer 12 is 50 nm. In the second polarization doped layer 12, the Al composition changes linearly from the Al composition (100%) at the second interface IF2 to the Al composition (90%) at the first interface IF1. This forms an aluminum composition gradient G2. Note that an Al composition of 100% means AlN. The thickness T1 of the first polarization doped layer 11 is 3000 nm. In the first polarization doped layer 11, the Al composition changes linearly from the Al composition (90%) at the first interface IF1 to the Al composition (80%) at the upper surface 11u. This forms an aluminum composition gradient G1.

[0025] The aluminum composition gradient G2 of the second polarization doped layer 12 is larger than the aluminum composition gradient G1 of the first polarization doped layer 11. This allows the p-type concentration of the second polarization doped layer 12 to be higher than the p-type concentration of the first polarization doped layer 11. In this embodiment, the effective acceptor concentration of the first polarization doped layer 11 is set to 2×10 16 (cm -3 ) The substantial acceptor concentration of the second polarization doped layer 12 was set to 1×10 18 (cm -3 ) was decided.

[0026] Furthermore, the minimum Al composition of the first polarization doped layer 11 and the second polarization doped layer 12 is preferably 80% or more, which can improve the hole mobility in the <0001> direction, as will be described later.

[0027] (Method of manufacturing semiconductor device 1) A method for manufacturing the semiconductor device 1 will be described. Using DPD technology, a second polarization-doped layer 12 and a first polarization-doped layer 11 are grown in this order on a support substrate 10. Beryllium ions are implanted into the upper surface 11u of the first polarization-doped layer 11. Annealing is then performed to form a contact layer 11c. This completes the structure shown in FIG. 3.

[0028] Next, as shown in Figure 4, trenches TR are formed using well-known lithography and dry etching techniques. The depth of the trenches TR corresponds to the fin height Hf, the width of the trenches TR corresponds to the fin pitch Pf, and the distance between the trenches TR corresponds to the fin width Wf. The bottom surfaces of the trenches TR correspond to the top surfaces 11t of the drift portion 11d. This completes the formation of multiple fin portions 11f.

[0029] A gate insulating film 13 and a gate electrode 14 are formed in the trench TR. An interlayer insulating film 15 is formed so as to cover the entire surface of the gate electrode 14. A source electrode 21 is formed on the entire upper surface of the first polarization doped layer 11. A drain electrode 22 is formed on the lower surface 10b of the support substrate 10. This completes the semiconductor device 1 shown in FIG.

[0030] (Advantages of semiconductor device 1) The semiconductor device 1 of this embodiment has the following three advantages. First, it has high hole mobility. Second, it operates in an enhancement mode (normally off operation). Third, it is suitable for high power applications. These advantages will be explained in detail below.

[0031] The first advantage (high hole mobility) is achieved by two factors: (1) carriers are generated by DPD, and (2) holes are transported along the <0001> direction. The first factor is explained below. DPD does not require impurity dopants, so carrier scattering by impurities does not occur. This allows for increased carrier mobility.

[0032] The second factor is explained. In wurtzite AlN, the valence band inversion occurs even in an unstrained state due to the lack of centrosymmetry and high internal parameters resulting from the unique crystal structure. Of the three valence bands (heavy hole band, light hole band, and split-off hole band), the split-off hole band is the highest valence band, and holes have a dominant population in this band. An important feature of the split-off hole band is that the effective mass along the

[0001] direction is small, significantly improving the hole mobility in the

[0001] direction. In the semiconductor device 1 of this embodiment, the (0001) principal plane orientation allows holes to be transported in the z direction (the

[0001] direction). This enables high drift layer mobility in the drift region 11d and high channel mobility in the fin region 11f.

[0033] In order to ensure that the valence band structure of AlGaN is dominated by split-off holes, the minimum value of the Al composition of the first polarization doped layer 11 and the second polarization doped layer 12 is preferably 80% or more.

[0034] Increasing hole mobility can reduce the mobility difference between P-FETs and N-FETs, which in turn reduces the size difference required to handle the same current between P-FETs and N-FETs, as well as the difference in conduction loss caused by the high on-resistance of P-FETs.

[0035] The second advantage (enhancement mode operation) is realized by the fact that the fin portion 11f of the semiconductor device 1 has a nano-sized fin width Wf, which allows the depletion region to spread across the entire channel of the fin portion 11f. This enables normally-off operation, thereby improving the operational safety of the semiconductor device 1.

[0036] The third advantage (suitability for high-power applications) is achieved by the following three factors. The first factor is the high critical electric field characteristics of AlN. This characteristic enables the semiconductor device 1 to achieve a high breakdown voltage. The second factor is the vertical structure of the semiconductor device 1. Current flows vertically between the source and drain, preventing congestion of the current and electric field. This makes it possible to increase the power processing capacity of the semiconductor device 1. The third factor is the high thermal conductivity of SiC and AlN. Because the semiconductor device 1 is made of SiC and AlN, which have high thermal conductivity, it has excellent heat dissipation properties. This makes it possible to apply the semiconductor device 1 to high-power devices that generate a large amount of heat.

[0037] (effect) The problem will be explained. Aluminum-containing nitride semiconductors have the widest band gap Eg (6.1 eV) among known semiconductor materials, and therefore have deep dopant levels. Therefore, it is difficult to make them n-type or p-type by impurity doping, making it difficult to fabricate fin field-effect transistors. According to the technology of this embodiment, the first polarization-doped layer 11 having the fin portion 11f can be made p-type by DPD technology using an aluminum composition gradient. This makes it possible to fabricate fin field-effect transistors.

[0038] The AlN / SiC heterointerface contains a high density of dislocations and other defects, which creates carrier traps within the band gap. When a high electric field is applied to this heterointerface region due to reverse blocking mode or the like, these traps may release electrons and holes, resulting in leakage current. Therefore, in the semiconductor device 1 of this embodiment, the second polarization-doped layer 12 is disposed so as to be in contact with the second interface IF2, which is the heterointerface. The second polarization-doped layer 12 has a higher aluminum composition gradient than the first polarization-doped layer 11 and a high impurity concentration, so it functions as a field-stopping layer. Therefore, the high electric field region can be maintained outside the second interface IF2, thereby suppressing an increase in leakage current.

[0039] Under conditions where the gate and source are zero biased and the drain is high-voltage biased (e.g., −500 V), a peak electric field occurs in the edge region ER of the fin portion 11f (see FIG. 1). The edge region ER is a region near the boundary with the drift portion 11d and near the side surface 11fs. Therefore, the semiconductor device 1 of this embodiment is provided with a field plate FP. The field plate FP has a structure in which the source electrode 21 extends in the depth direction (−z direction) along the side surface 11fs. In other words, the field plate FP has an overlap region OL (a region where the source electrode 21 overlaps with the gate electrode 14 in the x direction). This can alleviate electric field concentration near the edge region ER, thereby improving the breakdown voltage of the semiconductor device 1.

[0040] (Modification of Example 1) Although the support substrate 10 has been described as being p-type SiC, the present invention is not limited to this. For example, the support substrate 10 may be n-type SiC. N-type SiC substrates have the advantage of being cheaper and more readily available than p-type SiC substrates. [Example]

[0041] (Structure of semiconductor device 201) 5 shows a schematic cross-sectional view of a semiconductor device 201 of Example 2. The semiconductor device 201 of Example 2 differs from the semiconductor device 1 (FIG. 1) of Example 1 in the arrangement of the drain electrode. Components common to Examples 1 and 2 are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0042] The second polarization-doped layer 12 has a specific region SR where the upper surface 12t is exposed. The drain electrode 222 is disposed on the upper surface 12t within the specific region SR. No drain electrode is disposed on the lower surface 10b of the support substrate 10. This allows a current path CP to be formed from the drain electrode 222 through the second polarization-doped layer 12 and the first polarization-doped layer 11 to the source electrode 21 (see the dotted arrow). Therefore, the semiconductor device 201 can have a quasi-vertical device structure.

[0043] In the quasi-vertical device structure, the support substrate 10 does not need to be conductive, which increases the degree of freedom in the material of the support substrate 10. The material of the support substrate 10 can be, for example, SiC, AlN, or sapphire.

[0044] Although specific examples of the present invention have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and variations of the specific examples exemplified above. The technical elements described in this specification or drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Furthermore, the technology exemplified in this specification or drawings can achieve multiple objectives simultaneously, and achieving one of these objectives alone is technically useful.

[0045] (Variation) The technology of the present specification is not limited to a MOSFET (metal-oxide-semiconductor field-effect transistor) structure, but can be applied to elements of various structures. For example, the technology of the present specification can be applied to a MESFET (metal-semiconductor field effect transistor) structure. In this case, a gate electrode 14 made of a metal with Schottky junction properties may be disposed on the side surface 11fs of the fin portion 11f. That is, the gate electrode 14 may be Schottky-junctioned to the side surface 11fs. The metal material of the gate electrode 14 may be various, and for example, Ni or Cu may be used.

[0046] The fin portion 11f of the semiconductor device 1 may be configured as an n-type semiconductor. In this case, the n-type semiconductor may be fabricated by DPD. However, a structure including the n-type fin portion 11f cannot sufficiently achieve the effect of increasing the hole mobility in the <0001> direction.

[0047] In this specification, the case where the Al polarity plane is the principal surface orientation (

[0001] direction) has been described, but this configuration is not limited thereto. The nitrogen polarity plane may be the principal surface orientation ([000-1] direction). In this case, the upper surface is the nitrogen surface and the lower surface is the aluminum surface. In this plane orientation, if there is a composition gradient in which the Al composition increases toward the upper surface, p-type polarization doping is achieved. On the other hand, if there is a composition gradient in which the Al composition decreases toward the upper surface, n-type polarization doping is achieved.

[0048] Although the present specification has described a case where the Al composition of AlGaN is graded, this is not limiting. For example, AlBN or AlInN may also be used. In AlBN, when the Al polarity plane is oriented as the primary surface (

[0001] direction), the upper surface is an aluminum surface and the lower surface is a nitrogen surface. In this surface orientation, a composition gradient in which the Al composition decreases toward the upper surface is called n-type polarization doping. In addition, in AlBN, when the N polarity plane is oriented as the primary surface ([000-1] direction), the upper surface is a nitrogen surface and the lower surface is an aluminum surface. In this surface orientation, a composition gradient in which the Al composition decreases toward the upper surface is called p-type polarization doping. On the other hand, in AlInN, when the Al polarity plane is oriented as the primary surface (

[0001] direction), the upper surface is an aluminum surface and the lower surface is a nitrogen surface. In this surface orientation, a composition gradient in which the Al composition decreases toward the upper surface is called p-type polarization doping. In addition, in the case of AlInN, when the N-polarity plane is the principal plane orientation ([000-1] direction), the upper surface is the nitrogen plane and the lower surface is the aluminum plane. In this plane orientation, if there is a composition gradient where the Al composition decreases toward the upper surface, it becomes n-type polarization doping.

[0049] The contact layer 11c is not limited to an ultra-thin layer of beryllium, but may be various layers. For example, it may be a p-type GaN layer heavily doped with p-type impurities such as Mg. It may also be an n-type AlGaN layer with a tunnel junction.

[0050] Aspects of the present technology are listed below. [Aspect 1] a first polarization-doped layer that is a nitride semiconductor containing aluminum and has a first conductivity type characteristic due to an aluminum composition gradient in the thickness direction, the first polarization-doped layer having a fin portion protruding upward from an upper surface; a gate electrode disposed on a side surface of the fin portion via a gate insulating film or disposed on the side surface of the fin portion by a Schottky junction; a first electrode disposed on an upper surface of the fin portion; a second electrode disposed below the fin portion; A nitride semiconductor device comprising: [Aspect 2] a second polarization-doped layer, which is disposed in contact with a lower surface of the first polarization-doped layer, is made of the nitride semiconductor, and has a gradient aluminum composition in a thickness direction, thereby having the first conductivity type characteristics; 2. The nitride semiconductor device according to aspect 1, wherein the aluminum composition gradient in the second polarization doped layer is greater than the aluminum composition gradient in the first polarization doped layer. [Aspect 3] a substrate disposed on a lower surface of the second polarization-doped layer; 3. The nitride semiconductor device according to aspect 2, wherein the second electrode is disposed on a lower surface of the substrate. [Aspect 4] 4. The nitride semiconductor device of claim 3, wherein the substrate is SiC. [Aspect 5] a substrate disposed on a lower surface of the second polarization-doped layer; the second polarization-doped layer has a specific region where an upper surface of the second polarization-doped layer is exposed; 3. The nitride semiconductor device according to aspect 2, wherein the second electrode is disposed on an upper surface of the second polarization doped layer in the specific region. [Aspect 6] 6. The nitride semiconductor device according to aspect 5, wherein the substrate is made of any one of SiC, AlN, and sapphire. [Aspect 7] the first conductivity type is p-type, The nitride semiconductor device according to any one of aspects 1 to 6, wherein the upper surface of the first polarization-doped layer is an aluminum surface and the lower surface is a nitrogen surface, and the first polarization-doped layer has an aluminum composition gradient in which the aluminum content decreases toward the upper surface, or the upper surface of the first polarization-doped layer is a nitrogen surface and the lower surface is an aluminum surface, and the first polarization-doped layer has an aluminum composition gradient in which the aluminum content decreases toward the lower surface. [Aspect 8] 8. The nitride semiconductor device according to any one of aspects 1 to 7, wherein the first polarization-doped layer has an aluminum composition ratio that is at least 80%. [Aspect 9] a depth profile of the beryllium concentration in the upper surface of the fin portion has a peak near the upper surface; Aspect 9. The nitride semiconductor device according to any one of Aspects 1 to 8, wherein the peak exists in a region up to a depth of 10 nm from the upper surface. [Aspect 10] the first conductivity type is n-type, The nitride semiconductor device according to any one of aspects 1 to 6, wherein the upper surface of the first polarization-doped layer is an aluminum surface and the lower surface is a nitrogen surface, and the first polarization-doped layer has an aluminum composition gradient in which the aluminum content decreases toward the lower surface, or the upper surface of the first polarization-doped layer is a nitrogen surface and the lower surface is an aluminum surface, and the first polarization-doped layer has an aluminum composition gradient in which the aluminum content decreases toward the upper surface. [Aspect 11] an interlayer insulating film disposed on the side surface of the fin portion and covering the gate electrode; the first electrode is further disposed on a surface of the interlayer insulating film, 10. The nitride semiconductor device according to any one of aspects 1-9, wherein at least a portion of the gate electrode and the first electrode overlap in a direction parallel to the top surface of the first polarization doped layer. [Explanation of symbols]

[0051] 1: semiconductor device 11: first polarization doped layer 11d: drift portion 11f: fin portion 12: second polarization doped layer 13: gate insulating film 14: gate electrode 15: interlayer insulating film 21: source electrode 22: drain electrode

Claims

1. a first polarization-doped layer that is a nitride semiconductor containing aluminum and has a first conductivity type characteristic due to an aluminum composition gradient in the thickness direction, the first polarization-doped layer having a fin portion protruding upward from an upper surface; a gate electrode disposed on a side surface of the fin portion via a gate insulating film or disposed on the side surface of the fin portion by a Schottky junction; a first electrode disposed on an upper surface of the fin portion; a second electrode disposed below the fin portion; A nitride semiconductor device comprising:

2. a second polarization-doped layer, which is disposed in contact with a lower surface of the first polarization-doped layer, is made of the nitride semiconductor, and has a gradient aluminum composition in a thickness direction, thereby having the first conductivity type characteristics; The nitride semiconductor device according to claim 1 , wherein the aluminum composition gradient in said second polarization doped layer is greater than the aluminum composition gradient in said first polarization doped layer.

3. a substrate disposed on a lower surface of the second polarization-doped layer; The nitride semiconductor device according to claim 2 , wherein said second electrode is disposed on a lower surface of said substrate.

4. The nitride semiconductor device according to claim 3 , wherein said substrate is made of SiC.

5. a substrate disposed on a lower surface of the second polarization-doped layer; the second polarization-doped layer has a specific region where an upper surface of the second polarization-doped layer is exposed; The nitride semiconductor device according to claim 2 , wherein said second electrode is disposed on an upper surface of said second polarization doped layer in said specific region.

6. 6. The nitride semiconductor device according to claim 5, wherein said substrate is made of any one of SiC, AlN, and sapphire.

7. the first conductivity type is p-type, A nitride semiconductor device according to any one of claims 1 to 6, wherein the upper surface of the first polarization doped layer is an aluminum surface and the lower surface is a nitrogen surface, and the first polarization doped layer has an aluminum composition gradient in which the aluminum content decreases toward the upper surface, or the upper surface of the first polarization doped layer is a nitrogen surface and the lower surface is an aluminum surface, and the first polarization doped layer has an aluminum composition gradient in which the aluminum content decreases toward the lower surface.

8. The nitride semiconductor device according to claim 7 , wherein the minimum value of the aluminum composition ratio of said first polarization doped layer is 80% or more.

9. a depth profile of the beryllium concentration in the upper surface of the fin portion has a peak near the upper surface; The nitride semiconductor device according to claim 1 , wherein said peak exists in a region up to a depth of 10 nm from said upper surface.

10. the first conductivity type is n-type, A nitride semiconductor device according to any one of claims 1 to 6, wherein the upper surface of the first polarization doped layer is an aluminum surface and the lower surface is a nitrogen surface, and the first polarization doped layer has an aluminum composition gradient in which the aluminum content decreases toward the lower surface, or the upper surface of the first polarization doped layer is a nitrogen surface and the lower surface is an aluminum surface, and the first polarization doped layer has an aluminum composition gradient in which the aluminum content decreases toward the upper surface.

11. an interlayer insulating film disposed on the side surface of the fin portion and covering the gate electrode; the first electrode is further disposed on a surface of the interlayer insulating film, The nitride semiconductor device according to claim 1 , wherein at least a portion of said gate electrode and said first electrode overlap in a direction parallel to said top surface of said first polarization doped layer.

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