Chip systems and electronic devices

Abstract

The present disclosure provides a chip system and an electronic device, which belongs to the field of electronic technology. The chip system includes a BGA chip (1), a PCB (2), a signal source module (3), and a detection module (4). A functional pin (111) of the BGA chip (1) is soldered to a functional solder pad (21) of the PCB (2) by using a first solder ball (6), and a detection pin (112) of the BGA chip (1) is soldered to a detection solder pad (22) of the PCB (2) by using a second solder ball (7). The designed life of the second solder ball (7) is shorter than the designed life of the first solder ball (6). A detection path (10) is formed between the BGA chip (1) and the PCB (2), and the detection path (10) includes the second solder ball (7). The signal source module (3) is configured to transmit a detection signal to the detection module (4) via the detection path (10), and the detection module (4) is configured to determine a status of the detection path (10) based on the received detection signal.

Description

[Technical field]

[0001] The present disclosure relates to the field of electronic technology, and in particular to chip systems and electronic devices. [Background technology]

[0002] A ball grid array (BGA) chip is soldered to a printed circuit board (PCB) by using solder balls, and signals can be transmitted between the BGA chip and the PCB by using the solder balls.

[0003] However, in the process of using BGA chips, the solder balls may crack due to various types of stress, which may affect the quality of the transmitted signal and even cause signal interruption. Summary of the Invention

[0004] The present disclosure provides a chip system and an electronic device. The chip system provided in the present disclosure can predict the status of the first solder ball between the functional pin of the BGA chip and the functional solder pad of the PCB by monitoring the status of the second solder ball between the detection pin of the BGA chip and the detection solder pad of the PCB, so that measures can be taken in a timely manner to delay or even avoid the cracking of the first solder ball, thereby improving the reliability of the chip system. The technical solutions of the chip system and the electronic device are described as follows.

[0005] According to a first aspect, the present disclosure provides a chip system. The chip system includes a ball grid array (BGA) chip, a printed circuit board (PCB), a signal source module, and a detection module. The BGA chip has a plurality of functional pins and at least one detection pin, and the PCB has a plurality of functional solder pads and at least one detection solder pad. The functional pins are soldered to the functional solder pads by using a first solder ball, and the detection pin is soldered to the detection solder pad by using a second solder ball. At least one detection path is formed between the BGA chip and the PCB, the detection path includes one or more unit circuits connected in series, and the unit circuit includes the detection pin, the second solder ball, and the detection solder pad connected in sequence. The signal source module is configured to send a detection signal to the detection module via the at least one detection path, and the detection module is configured to determine a status of the at least one detection path based on the received detection signal.

[0006] The functional pins of the BGA chip may be pins used to implement the basic functions of the BGA chip, such as power pins, ground pins, and functional pins. Power pins are pins that provide a connection for a power source for the BGA chip, ground pins are pins that provide a connection for a ground for the BGA chip, and functional pins are pins that provide a connection for a signal required by the BGA chip. If a crack occurs in the first solder ball between the functional pin and the functional solder pad, the function or performance of the BGA chip may be affected.

[0007] The detection pin of the BGA chip may be a pin that is specially used to monitor the status of the second solder ball. The detection pin 112 may have no other function except for status monitoring. If the second solder ball between the detection pin and the detection solder pad is cracked, the BGA chip may still operate normally.

[0008] A functional solder pad on a PCB refers to a solder pad that is soldered to a functional pin, and a detection solder pad on a PCB refers to a solder pad that is soldered to a detection pin.

[0009] The first solder ball is located between the functional pin and the functional solder pad, and the second solder ball is located between the detection pin and the detection solder pad. The designed life of the second solder ball is shorter than the designed life of the first solder ball. Therefore, in a normal case, the second solder ball may crack before the first solder ball. Therefore, the status of the first solder ball may be predicted by monitoring the status of the second solder ball.

[0010] The signal source module is configured to generate a detection signal and transmit the detection signal to the detection module via the detection path, and the detection module is configured to receive the detection signal via the detection path and determine a status of the detection path based on the received detection signal, in other words, a status of the second solder ball included in the detection path.

[0011] According to the technical solution provided in the present disclosure, a detection path is formed between the BGA chip and the PCB of the chip system, the detection path includes a second solder ball, the signal source module can send a detection signal to the detection module through the detection path, and the detection module can determine a status of the second solder ball included in the detection path based on the received detection signal, in other words, the detection module can monitor the status of the second solder ball.

[0012] The second solder ball has a designed lifespan shorter than the designed lifespan of the first solder ball. Therefore, in a normal case, the second solder ball may crack before the first solder ball. Therefore, when a crack is detected in the second solder ball, measures can be taken in a timely manner to delay or avoid the cracking of the first solder ball, thereby improving the reliability of the chip system.

[0013] In a possible implementation, the BGA chip includes a substrate and a die. The substrate has a function pin and a detection pin, the signal source module and the detection module are integrated into the die, and the die includes at least one signal sending end and at least one signal receiving end. The detection path includes at least two unit circuits connected in series, both of the two ends of the detection path are detection pins, and the signal sending end and the signal receiving end are respectively electrically connected to the two ends of the detection path.

[0014] According to the technical solution provided in the present disclosure, both the signal source module and the detection module are integrated into the die, so that the die can transmit and receive the detection signal, no additional hardware circuit needs to be added to the PCB, and only some detection solder pads on the PCB need to be electrically connected together to implement the series connection of the unit circuits, which makes the chip system provided in the present disclosure easier to implement.

[0015] In a possible implementation, the signal source module and the detection module are located on a PCB, the detection path includes at least two unit circuits connected in series, both of the two ends of the detection path are detection solder pads, and the signal source module and the detection module are electrically connected to the two ends of the detection path, respectively.

[0016] In a possible implementation, the BGA chip includes a substrate and a die. The substrate has functional pins and sense pins, the signal source module is integrated on the die, and the sense module is located on the PCB. One end of the sense path is the sense pin, and the other end is the sense solder pad. The die is electrically connected to the sense pin at one end of the sense path, and the sense module is electrically connected to the sense solder pad at the other end of the sense path.

[0017] In a possible implementation, the signal source module is located on the PCB, the BGA chip includes a substrate and a die, the substrate has a functional pin and a detection pin, and the detection module is integrated on the die. One end of the detection path is the detection solder pad, and the other end is the detection pin. The signal source module is electrically connected to the detection solder pad at one end of the detection path, and the die is electrically connected to the detection pin at the other end of the detection path.

[0018] In a possible implementation, the detection pins are closer to the edge of the BGA chip than the functional pins.

[0019] In a possible implementation, the detection pins are closer to the corners of the BGA chip than the functional pins.

[0020] In a possible implementation, the second solder ball is closer to the edge of the BGA chip than the first solder ball.

[0021] According to the technical solution provided in the present disclosure, stress damage to the BGA chip usually occurs at the edge of the BGA chip, so the second solder ball is located closer to the edge and the first solder ball is located closer to the center, so that the designed life of the second solder ball may be shorter than the designed life of the first solder ball.

[0022] In a possible implementation, the second solder ball is closer to a corner of the BGA chip than the first solder ball.

[0023] According to the technical solution provided in the present disclosure, furthermore, in the case of edges, stress damage to the BGA chip is usually more likely to occur at the corners of the BGA chip, therefore, the second solder balls are disposed at the corners of the BGA chip and the first solder balls are disposed at non-corner positions, so that the designed life of the second solder balls may be shorter than the designed life of the first solder balls.

[0024] In a possible implementation, the outer diameter of the second solder ball is smaller than the outer diameter of the first solder ball.

[0025] According to the technical solution provided in the present disclosure, the first solder ball is less likely to crack than the second solder ball based on the aforementioned arrangement, and as a result, the designed life of the second solder ball is shorter than the designed life of the first solder ball.

[0026] In a possible implementation, the strength of the material of the second solder ball is less than the strength of the material of the first solder ball.

[0027] According to the technical solution provided in the present disclosure, the strength of the material of the second solder ball is less than that of the first solder ball, so the second solder ball is more likely to crack than the first solder ball, and as a result, the designed life of the second solder ball is shorter than that of the first solder ball.

[0028] In a possible implementation, N levels of detection paths are formed between the BGA chip and the PCB, and the designed life of the second solder ball included in the (M-1)th level detection path is shorter than the designed life of the second solder ball included in the Mth level detection path.

[0029] N is an integer greater than 1, and M is any integer greater than 1 but not greater than N.

[0030] According to the technical solution provided in the present disclosure, an N-level detection path is set, and the designed lifespan of the second solder ball included in the N-level detection path is different, so that the cracking process of the solder ball can be tracked based on the status of the second solder ball included in the N-level detection path, and the status of the first solder ball can be predicted more accurately, so that corresponding measures can be taken accurately in a more timely manner to delay or even avoid the cracking of the first solder ball, which can further improve the reliability of the chip system.

[0031] In a possible implementation, a first level sense path and a second level sense path are formed between the BGA chip and the PCB, there are one or more sense paths in the first level and there are one or more sense paths in the second level, and the designed life of the second solder ball included in the first level sense path is shorter than the designed life of the second solder ball included in the second level sense path.

[0032] In a possible implementation, the sense pins included in the (M-1)th level sense path are closer to the edge of the BGA chip than the sense pins included in the Mth level sense path.

[0033] In a possible implementation, the sense pins included in the (M-1)th level sense path are closer to the corners of the BGA chip than the sense pins included in the Mth level sense path.

[0034] In a possible implementation, the second solder ball included in the (M-1)th level sensing path is closer to the edge of the BGA chip than the second solder ball included in the Mth level sensing path.

[0035] According to the technical solution provided in the present disclosure, stress damage to the BGA chip is usually more likely to occur at the edge of the BGA chip, and therefore the designed life of the second solder ball included in the (M-1)th level detection path may be shorter than the designed life of the second solder ball included in the Mth level detection path based on the above arrangement.

[0036] In a possible implementation, the second solder ball included in the (M-1)th level sensing path is closer to the corner of the BGA chip than the second solder ball included in the Mth level sensing path.

[0037] According to the technical solution provided in the present disclosure, furthermore, in the case of edges, stress damage to the BGA chip is usually more likely to occur at the corners of the BGA chip. Therefore, the designed life of the second solder ball included in the (M-1)th level detection path may be shorter than the designed life of the second solder ball included in the Mth level detection path based on the above arrangement.

[0038] In a possible implementation, the outer diameter of the second solder ball included in the (M-1)th level sensing path is smaller than the outer diameter of the second solder ball included in the Mth level sensing path.

[0039] According to the technical solution provided in the present disclosure, based on the above-mentioned arrangement, the second solder ball included in the detection path of the Mth level is less likely to crack than the second solder ball included in the detection path of the (M-1)th level, and as a result, the designed life of the second solder ball included in the detection path of the (M-1)th level is shorter than the designed life of the second solder ball included in the detection path of the Mth level.

[0040] In a possible implementation, the strength of the material of the second solder ball included in the (M-1)th level detection path is less than the strength of the material of the second solder ball included in the Mth level detection path.

[0041] According to the technical solution provided in the present disclosure, the strength of the material of the second solder ball included in the detection path of the (M-1)th level is lower than the strength of the material of the second solder ball included in the detection path of the Mth level, so that the second solder ball included in the detection path of the (M-1)th level is more likely to crack than the second solder ball included in the detection path of the Mth level, and as a result, the designed life of the second solder ball included in the detection path of the (M-1)th level is shorter than the designed life of the second solder ball included in the detection path of the Mth level.

[0042] In a possible implementation, both M and N are two.

[0043] In a possible implementation, the designed lifetime of the second solder balls belonging to the same level of the sensing path is the same.

[0044] In a possible implementation, the detection module is configured to: determine that a crack has occurred in a second solder ball included in the target detection path when no detection signal is received via the target detection path, where the target detection path is any detection path.

[0045] In a possible implementation, the chip system further includes a control module, the control module configured to adjust a temperature of the BGA chip based on the status of the detection path determined by the detection module.

[0046] In a possible implementation, the control module is configured to: reduce a degree of temperature fluctuation of the BGA chip when it determines that a crack has occurred in the second solder ball included in the at least one detection path.

[0047] The temperature fluctuation degree of the BGA chip may be understood as the temperature change range of the BGA chip.

[0048] In a possible implementation, the control module is configured to: reduce a degree of temperature fluctuation of the BGA chip through a first operation when it is determined that a crack has occurred in a second solder ball included in the (M-1)th level detection path; and reduce a degree of temperature fluctuation of the BGA chip through a second operation when it is determined that a crack has occurred in a second solder ball included in the Mth level detection path.

[0049] The degree of temperature fluctuation of the BGA chip obtained by the second operation is smaller than the degree of temperature fluctuation of the BGA chip obtained by the first operation.

[0050] According to the technical solution provided in the present disclosure, the reduced temperature fluctuation of the BGA chip is adapted to the status of the first solder balls based on the above-mentioned arrangement, which not only prevents the rapid deterioration of the status of the first solder balls caused by insufficient reduction of the temperature fluctuation, but also prevents the excessive increase of the power consumption of the chip system caused by excessive reduction of the temperature fluctuation.

[0051] In a possible implementation, the control module is configured to: report a status message indicating that the BGA chip is abnormal if it determines that a crack has occurred in a second solder ball included in the Nth level detection path.

[0052] In a possible implementation, the control module is configured to: report status information indicating that the BGA chip is abnormal if it determines that a crack occurs in a second solder ball included in the at least two levels of the detection path within the target duration.

[0053] In a possible implementation, the control module is configured to: report status information indicating that the BGA chip is abnormal if it determines that a crack has occurred in a second solder ball included in the detection path at any level.

[0054] In a possible implementation, the control module is configured to: control a range of change in power consumption of the BGA chip in an operational state to be narrower when it determines that a crack has occurred in a second solder ball included in at least one detection path.

[0055] According to the technical solution provided in the present disclosure, when the variation range of the power consumption of the BGA chip is narrowed, the variation range of the heat generated by the BGA chip in the working state is narrowed, which is helpful in reducing the temperature fluctuation degree of the BGA chip.

[0056] In a possible implementation, the control module is configured to: reduce a frequency at which the BGA chip switches between an operational state and a non-operational state when it determines that a crack has occurred in the second solder ball included in the at least one detection path.

[0057] The non-operating state may be a sleep state, a power-off state, etc. The BGA chip in the non-operating state consumes very low or even no power. Therefore, the BGA chip in the non-operating state generates very little or even no heat, which is significantly different from the heat generated in the operating state.

[0058] According to the technical solution provided in the present disclosure, the frequency of switching of the BGA chip between the operating state and the non-operating state is reduced, and as a result, the number of times that the heat generated by the BGA chip increases significantly and the number of times that the heat generated by the BGA chip decreases significantly are reduced, which helps to reduce the degree of temperature fluctuation of the BGA chip.

[0059] In a possible implementation, the control module is configured to: control a range of change in power consumption of the target heat source device in an operational state to be narrower when it determines that a crack has occurred in a second solder ball included in the at least one detection path.

[0060] The target heat source device is a device whose emitted heat can affect the temperature of the BGA chip.

[0061] According to the technical solution provided in the present disclosure, when the change range of the power consumption of the target heat source device is small, the change range of the heat generated by the target heat source device in the operating state is small, so that the temperature of the BGA chip will not be significantly changed by the target heat source device, which is helpful in reducing the temperature fluctuation degree of the BGA chip.

[0062] In a possible implementation, the control module is configured to: reduce a frequency of switching of the target heat source device between an operational state and a non-operational state when it determines that a crack has occurred in the second solder ball included in the at least one detection path.

[0063] According to the technical solution provided in the present disclosure, the frequency of switching of the target heat source device between the operating state and the non-operating state is reduced, so that the number of times that the heat generated by the target heat source device increases significantly and the number of times that the heat generated by the target heat source device decreases significantly are reduced, which helps to reduce the degree of temperature fluctuation of the BGA chip.

[0064] In a possible implementation, the control module is configured to: enable a constant temperature protection circuit if it determines that a crack has occurred in the second solder ball included in the at least one detection path.

[0065] In a possible implementation, the control module is configured to: adjust the heat dissipation efficiency of the heat dissipation system when it determines that a crack has occurred in the second solder ball included in the at least one detection path.

[0066] In a possible implementation, the control module and the detection module are integrated into the same component.

[0067] According to a second aspect, the present disclosure provides a chip system. The chip system includes a BGA chip and a PCB. The BGA chip has a plurality of functional pins and at least one detection pin, and the PCB has a plurality of functional solder pads and at least one detection solder pad. The functional pins are soldered to the functional solder pads by using a first solder ball, and the detection pins are soldered to the detection solder pads by using a second solder ball. The designed life of the second solder ball is shorter than the designed life of the first solder ball. At least one detection path is formed between the BGA chip and the PCB. The detection path includes at least two unit circuits connected in series, the unit circuits including a detection pin, a second solder ball, and a detection solder pad connected in sequence, and both of the two ends of the detection path are detection pins. The BGA chip includes at least one signal sending end and at least one signal receiving end, and the signal sending end and the signal receiving end are electrically connected to the two ends of the detection path, respectively. The BGA chip is configured to transmit a detection signal via the signal transmitting end, and is configured to determine a status of the at least one detection path based on the detection signal received by the signal receiving end.

[0068] According to the technical solution provided in the present disclosure, a detection path is formed between the BGA chip and the PCB of the chip system, and the detection path includes a second solder ball. A signal sending end of the BGA chip can send a detection signal to a signal receiving end of the BGA chip through the detection path, and the BGA chip can determine the status of the second solder ball included in the detection path based on the detection signal received by the signal receiving end, in other words, the BGA chip can monitor the status of the second solder ball. The designed life of the second solder ball is shorter than the designed life of the first solder ball. Therefore, in a normal case, the second solder ball may crack before the first solder ball. Therefore, when it is detected that the second solder ball has cracked, measures can be taken in a timely manner to delay or avoid the cracking of the first solder ball, thereby improving the reliability of the chip system.

[0069] In a possible implementation, the signal sending end and the signal receiving end are located on the die of the BGA chip.

[0070] According to a third aspect, the present disclosure provides a chip system. The chip system includes a BGA chip, a PCB, a signal source module, and a detection module. The BGA chip has a plurality of functional pins and at least one detection pin, and the PCB has a plurality of functional solder pads and at least one detection solder pad. The functional pins are soldered to the functional solder pads by using a first solder ball, and the detection pins are soldered to the detection solder pads by using a second solder ball. The designed life of the second solder ball is shorter than the designed life of the first solder ball. At least one detection path is formed between the BGA chip and the PCB, where the detection path includes at least two unit circuits connected in series, the unit circuits include a detection pin, a second solder ball, and a detection solder pad connected in sequence, and both of the two ends of the detection path are detection solder pads. The signal source module and the detection module are located on the PCB, and the signal source module and the detection module are electrically connected to the two ends of the detection path, respectively. The signal source module is configured to transmit a detection signal to the detection module via the at least one detection path, and the detection module is configured to determine a status of the at least one detection path based on the received detection signal.

[0071] According to the technical solution provided in the present disclosure, a detection path is formed between the BGA chip and the PCB of the chip system, and the detection path includes a second solder ball. The signal source module can send a detection signal to the detection module through the detection path, and the detection module can determine the status of the second solder ball included in the detection path based on the received detection signal, in other words, the detection module can monitor the status of the second solder ball. The designed life of the second solder ball is shorter than the designed life of the first solder ball. Therefore, in a normal case, the second solder ball may crack before the first solder ball. Therefore, when it is detected that the second solder ball has cracked, measures can be taken in a timely manner to delay or avoid the cracking of the first solder ball, thereby improving the reliability of the chip system.

[0072] According to a fourth aspect, the present disclosure provides a chip system. The chip system includes a BGA chip, a PCB, and a detection module. The BGA chip has a plurality of functional pins and at least one detection pin, and the PCB has a plurality of functional solder pads and at least one detection solder pad. The functional pins are soldered to the functional solder pads by using a first solder ball, and the detection pin is soldered to the detection solder pad by using a second solder ball. The designed life of the second solder ball is shorter than the designed life of the first solder ball. At least one detection path is formed between the BGA chip and the PCB, where the detection path includes one or more unit circuits connected in series, and the unit circuit includes a detection pin, a second solder ball, and a detection solder pad connected in sequence. One end of the detection path is the detection pin, and the other end is the detection solder pad. The die of the BGA chip is electrically connected to the detection pin at one end of the detection path, and the detection module is located on the PCB and electrically connected to the detection solder pad at the other end of the detection path. The die is configured to transmit a detection signal via the at least one detection path to the detection module, and the detection module is configured to determine a status of the at least one detection path based on the received detection signal.

[0073] According to the technical solution provided in the present disclosure, a detection path is formed between the BGA chip and the PCB of the chip system, and the detection path includes a second solder ball. The die can send a detection signal to a detection module through the detection path, and the detection module can determine the status of the second solder ball included in the detection path based on the received detection signal, in other words, the detection module can monitor the status of the second solder ball. The designed life of the second solder ball is shorter than the designed life of the first solder ball. Therefore, in a normal case, the second solder ball may crack before the first solder ball. Therefore, when it is detected that the second solder ball has cracked, measures can be taken in a timely manner to delay or avoid the cracking of the first solder ball, thereby improving the reliability of the chip system.

[0074] According to a fifth aspect, the present disclosure provides a chip system. The chip system includes a BGA chip, a PCB, and a signal source module. The BGA chip has a plurality of functional pins and at least one detection pin, and the PCB has a plurality of functional solder pads and at least one detection solder pad. The functional pins are soldered to the functional solder pads by using a first solder ball, and the detection pin is soldered to the detection solder pad by using a second solder ball. The designed life of the second solder ball is shorter than the designed life of the first solder ball. At least one detection path is formed between the BGA chip and the PCB, where the detection path includes one or more unit circuits connected in series, and the unit circuit includes a detection pin, a second solder ball, and a detection solder pad connected in sequence. One end of the detection path is the detection solder pad, and the other end is the detection pin. The signal source module is located on the PCB and is electrically connected to the detection solder pad at one end of the detection path, and the die of the BGA chip is electrically connected to the detection pin at the other end of the detection path. The signal source module is configured to transmit a detection signal to the die via the at least one detection path, and the die is configured to determine a status of the at least one detection path based on the received detection signal.

[0075] According to the technical solution provided in the present disclosure, a detection path is formed between the BGA chip and the PCB of the chip system, and the detection path includes a second solder ball. The signal source module can send a detection signal to the die through the detection path, and the die can determine the status of the second solder ball included in the detection path based on the received detection signal, in other words, the die can monitor the status of the second solder ball. The designed life of the second solder ball is shorter than the designed life of the first solder ball. Therefore, in a normal case, the second solder ball may crack before the first solder ball. Therefore, when it is detected that the second solder ball has cracked, measures can be taken in a timely manner to delay or avoid the cracking of the first solder ball, thereby improving the reliability of the chip system.

[0076] According to a sixth aspect, the present disclosure provides an electronic device comprising the chip system of any one of the first to fifth aspects.

[0077] In a possible implementation, the electronic device is a communication device, a terminal device, a storage device or a server. [Brief description of the drawings]

[0078] [Figure 1] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0079] [Diagram 2] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0080] [Diagram 3] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0081] [Figure 4] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0082] [Diagram 5] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0083] [Figure 6] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0084] [Figure 7] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0085] [Figure 8] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0086] [Figure 9]FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0087] [Figure 10] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0088] [Figure 11] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0089] [Figure 12] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0090] [Figure 13] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0091] [Figure 14] FIG. 2 is a diagram of an arrangement of pins on a BGA chip according to an embodiment of the present disclosure.

[0092] [Figure 15] FIG. 1 is a diagram of an architecture of a chip system according to an embodiment of the present disclosure.

[0093] [Figure 16] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0094] [Figure 17] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0095] [Figure 18] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0096] [Figure 19] FIG. 1 is a diagram of a chip system according to an embodiment of the present disclosure.

[0097] Reference sign 1. BGA chip; 10. detection path; 100. unit circuit; 11. substrate; 111. functional pin; 112. detection pin; 113. another pin; 12. die; 2. PCB; 21. functional solder pad; 22. detection solder pad; 3. signal source module; 4. detection module; 5. control module; 6. first solder ball; 7. second solder ball; a. signal transmitting end; and b. signal receiving end. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0098] A ball grid array (BGA) chip is soldered to a printed circuit board (PCB) by using solder balls, and signals can be transmitted between the BGA chip and the PCB by using the solder balls.

[0099] In the process of using BGA chips, the solder balls are exposed to various types of stress. For example, the substrate of the BGA chip and the PCB have different coefficients of thermal expansion (CTEs), so when the temperature of the BGA chip and the PCB changes, the substrate of the BGA chip and the PCB expand to different degrees, which causes the solder balls to be exposed to shear forces. Under the action of various types of stress, the solder balls may be damaged or even cracked, which affects the quality of the transmitted signal and even causes signal interruption.

[0100] In order to evaluate the condition of the solder balls, the chip system formed by the BGA chip and the PCB is usually modeled and simulated in the related art to evaluate the stress on the solder balls.

[0101] However, the modeling parameters and operating conditions involved in the modeling and simulation are complex, making it difficult to guarantee the accuracy of the simulation results. In addition, based on the modeling and simulation method, the cracking process of the solder ball cannot be effectively predicted or tracked, and corresponding protective measures cannot be taken.

[0102] In view of the above technical problem, an embodiment of the present disclosure provides a chip system. As shown in FIG. 1 to FIG. 13, the chip system includes a BGA chip 1, a PCB 2, a signal source module 3, and a detection module 4. The BGA chip 1 has a plurality of functional pins 111 and at least one detection pin 112, and the PCB 2 has a plurality of functional solder pads 21 and at least one detection solder pad 22. The functional pins 111 are soldered to the functional solder pads 21 by using a first solder ball 6, and the detection pins 112 are soldered to the detection solder pads 22 by using a second solder ball 7. The designed life of the second solder ball 7 is shorter than the designed life of the first solder ball 6. At least one detection path 10 is formed between the BGA chip 1 and the PCB 2, and each detection path 10 includes one or more unit circuits 100 connected in series, and the unit circuit 100 includes a detection pin 112, a second solder ball 7, and a detection solder pad 22 connected in sequence. The signal source module 3 is configured to transmit a detection signal to the detection module 4 via at least one detection path 10, and the detection module 4 is configured to determine a status of the at least one detection path 10 based on the received detection signal.

[0103] The functional pins 111 of the BGA chip 1 may be pins used to implement basic functions of the BGA chip 1, such as power pins, ground pins, and functional pins. A power pin is a pin that provides a connection for a power source of the BGA chip 1, a ground pin is a pin that provides a connection for a ground of the BGA chip 1, and a functional pin is a pin that provides a connection for a signal required by the BGA chip 1. If a crack occurs in the first solder ball 6 between the functional pin 111 and the functional solder pad 21, the function or performance of the BGA chip 1 may be affected.

[0104] The detection pin 112 of the BGA chip 1 may be a pin that is specially used to monitor the status of the second solder ball 7. The detection pin 112 may have no other function except for status monitoring. If a crack occurs in the second solder ball 7 between the detection pin 112 and the detection solder pad 22, the BGA chip 1 may still operate normally. For example, the detection pin 112 may be an original free pin on the BGA chip 1, which is also called an NC (Not Connected) pin.

[0105] Functional solder pads 21 on PCB2 refer to solder pads soldered to functional pins 111, and sense solder pads 21 on PCB2 refer to solder pads soldered to sense pins 112.

[0106] The first solder ball 6 is located between the functional pin 111 and the functional solder pad 21 , and the second solder ball 7 is located between the detection pin 112 and the detection solder pad 22 . The designed life of the second solder ball 7 is shorter than the designed life of the first solder ball 6. Therefore, in the normal case, the second solder ball 7 may crack before the first solder ball 6. Therefore, the status of the first solder ball 6 may be predicted by monitoring the status of the second solder ball 7.

[0107] The signal source module 3 is configured to generate a detection signal and transmit the detection signal to the detection module 4 via a detection path 10. The detection module 4 is configured to receive the detection signal via the detection path and determine a status of the detection path 10 based on the received detection signal, in other words, determine a status of the second solder ball 7 included in the detection path 10. In some examples, the detection module 4 is configured to determine that the second solder ball 7 included in the detection path 10 is cracked if the detection signal is not received via the detection path 10.

[0108] According to the technical solutions provided in the embodiments of the present disclosure, a detection path 10 is formed between the BGA chip 1 and the PCB 2 of the chip system, and the detection path 10 includes a second solder ball 7. The signal source module 3 can send a detection signal to the detection module 4 through the detection path 10, and the detection module 4 can determine the status of the second solder ball 7 included in the detection path 10 based on the received detection signal; in other words, the detection module 4 can monitor the status of the second solder ball 7.

[0109] The designed life of the second solder ball 7 is shorter than the designed life of the first solder ball 6. Therefore, the second solder ball 7 may crack before the first solder ball 6. Therefore, if a crack is detected in the second solder ball 7, it may be predicted that a crack may subsequently occur in the first solder ball 6. Therefore, measures may be taken in a timely manner to delay or avoid the cracking of the first solder ball 6, thereby improving the reliability of the BGA chip 1.

[0110] The type of the detection signal is not limited in the embodiment of the present disclosure. The detection signal can be any signal that meets the interface agreement between the signal source module 3 and the detection module 4. For example, the detection signal can be a fixed level signal, a flipped signal, etc. The flipped signal is a signal whose level changes with time, and can also be referred to as a time-varying signal.

[0111] The positions of the signal source module 3 and the detection module 4 are not limited in the embodiments of the present disclosure. Both the signal source module 3 and the detection module 4 may be integrated into the BGA chip 1, or may be located on the PCB 2, or one may be integrated into the BGA chip 1 and the other may be located on the PCB 2.

[0112] In the following, the specific locations of the signal source module 3 and the detection module 4, and the corresponding cases of the detection path 10, etc. will be described in more detail using examples.

[0113] (1) In some examples, as shown in Figures 1 to 4, a BGA chip 1 includes a substrate 11 and a die 12. The substrate 11 has a functional pin 111 and a detection pin 112, the signal source module 3 and the detection module 4 are integrated into the die 12, and the die 12 includes at least one signal sending end a and at least one signal receiving end b. The detection path 10 includes at least two unit circuits 100 connected in series, both of the two ends of the detection path 10 are detection pins 112, and the signal sending end a and the signal receiving end b are electrically connected to the two ends of the detection path 10, respectively.

[0114] According to the technical solutions provided in the embodiments of the present disclosure, both the signal source module 3 and the detection module 4 are integrated into the die 12, so that the die 12 can transmit and receive detection signals, and no additional hardware circuits need to be added to the PCB 2, and only some detection solder pads 21 on the PCB 2 need to be electrically connected together to implement the series connection of the unit circuits 100. This makes the chip system provided in the embodiments of the present disclosure easier to implement.

[0115] 1, there is one detection path 10, and the die 12 includes one signal sending end a and one signal receiving end b. The signal sending end a is electrically connected to the detection pin 112 at one end of the detection path 10, and the signal receiving end b is electrically connected to the detection pin 112 at the other end of the detection path 10.

[0116] 2, there are multiple (e.g., two) detection paths 10, and the die 12 includes multiple (e.g., two) signal sending ends a and multiple (e.g., two) signal receiving ends b. The multiple signal sending ends a are electrically connected to the detection pins 112 at the ends of the multiple detection paths 10, and the multiple signal receiving ends b are electrically connected to the detection pins 112 at the other ends of the multiple detection paths 10.

[0117] In order to reduce the number of signal sending ends a and save resources of the BGA chip 1, in some other examples, as shown in FIG. 3, there are multiple (e.g., two) detection paths 10, and the die 12 includes one signal sending end a and multiple (e.g., two) signal receiving ends b, where the one signal sending end a is electrically connected to all detection pins 112 at the end of the multiple detection paths 10, and the multiple signal receiving ends b are each electrically connected to a detection pin 112 at the other end of the multiple detection paths 10.

[0118] In addition to the above technical solution in which the same number of signal transmitting ends as that of the detection paths 10 are arranged and one signal transmitting end a is arranged, in some other examples, when there are multiple detection paths 10, multiple signal transmitting ends a may be arranged, but it should be noted that the number of multiple signal transmitting ends a is smaller than the number of detection paths 10, and at least one signal transmitting end a is electrically connected to the detection pin 112 at the end of at least two detection paths 10. Therefore, the number of signal transmitting ends a is reduced, and the problem of excessively complicated cable wiring on the board 11 caused by excessive detection pins 112 being connected to the same signal transmitting end a is avoided.

[0119] In the following, an example is used to describe possible implementations of the signal sending end a and the signal receiving end b.

[0120] In some examples, as shown in FIGS. 1 to 4, the signal sending end a is a bump on the die 12.

[0121] In some examples, as shown in FIGS. 1-3, the bumps may be bumps that are specially reserved on the die 12 and used to generate a detection signal.

[0122] In some examples, the bump may alternatively be a bump that is electrically connected to a functional pin 111 and may generate a detection signal, as shown in Figure 4. For example, if the bump is a bump used to transmit a clock signal, the detection signal is a time-varying signal. In another example case, if the bump is a bump used for power supply, the detection signal is a fixed level signal.

[0123] In some examples, the signal sending end a may not be a bump on the die 12. For example, the signal sending end a may be a power module on the die 12, and the power module is electrically connected to the detection pin 112 at one end of the detection path 10. In this case, the detection signal is a fixed level signal.

[0124] 1 to 4, in some examples, the signal receiving end b is a bump on the die 12. In addition, since the die 12 (or the detection module 4) needs to distinguish detection signals from multiple detection paths 10, the number of the signal receiving ends b is the same as the number of the detection paths 10, and the signal receiving ends b have a one-to-one correspondence with the detection paths 10.

[0125] In addition, it can be seen that since it is necessary to ensure that both of the two ends of the detection path 10 are detection pins 112, each detection path 10 needs to include an even number of unit circuits 100.

[0126] It should be noted that the chip system shown in FIGS. 1 to 4 can alternatively be described as follows.

[0127] An embodiment of the present disclosure provides a chip system. As shown in FIG. 1 to FIG. 4, the chip system includes a BGA chip 1 and a PCB 2. The BGA chip 1 has a plurality of functional pins 111 and at least one detection pin 112, and the PCB 2 has a plurality of functional solder pads 21 and at least one detection solder pad 22. The functional pins 111 are soldered to the functional solder pads 21 by using a first solder ball 6, and the detection pins 112 are soldered to the detection solder pads 22 by using a second solder ball 7. The designed life of the second solder ball 7 is shorter than the designed life of the first solder ball 6. At least one detection path 10 is formed between the BGA chip 1 and the PCB 2, and each detection path 10 includes at least two unit circuits 100 connected in series, and the unit circuit 100 includes a detection pin 112, a second solder ball 7, and a detection solder pad 22 connected in sequence, and both of the two ends of the detection path 10 are detection pins 112. The BGA chip 1 includes at least one signal sending end a and at least one signal receiving end b, where the signal sending end a and the signal receiving end b are respectively electrically connected to two ends of the detection path 10. The BGA chip 1 is configured to send a detection signal via the signal sending end a, and is configured to determine the status of the detection path 10 based on the detection signal received by the signal receiving end b.

[0128] (2) In some examples, as shown in Figures 5 and 6, the signal source module 3 and the detection module 4 are located on the PCB 2. The detection path 10 includes at least two unit circuits 100 connected in series, and both of the two ends of the detection path 10 are detection solder pads 22. The signal source module 3 and the detection module 4 are electrically connected to the two ends of the detection path 10, respectively.

[0129] In some examples, as shown in FIG. 5, there is one detection path 10, and the signal source module 3 is electrically connected to the detection solder pad 22 at one end of the detection path 10, and the detection module 4 is electrically connected to the detection solder pad 22 at the other end of the detection path 10.

[0130] In some other examples, as shown in FIG. 6, there are multiple (e.g., two) detection paths 10, the signal source module 3 is electrically connected to the detection solder pads 22 at the ends of the multiple detection paths 10, and the detection module 4 is electrically connected to the detection solder pads 22 at the other ends of the multiple detection paths 10.

[0131] In some examples, the signal source module 3 and the detection module 4 are one or two circuits integrated into the PCB 2, such as an integrated circuit (IC) chip or a discrete device. The signal source module 3 and the detection module 4 may be a newly added hardware circuit for specifically monitoring the status of the detection path 10, or may be an existing hardware circuit on the PCB 2. This is not limited in the embodiments of the present disclosure.

[0132] In addition, it can be appreciated that since it is necessary to ensure that both of the two ends of the detection path 10 are detection solder pads 22, each detection path 10 must include an even number of unit circuits 100.

[0133] It should be noted that the chip system shown in FIGS. 5 and 6 can alternatively be described as follows.

[0134] An embodiment of the present disclosure provides a chip system. As shown in Figures 5 and 6, the chip system includes a BGA chip 1, a PCB 2, a signal source module 3, and a detection module 4. The BGA chip 1 has a plurality of functional pins 111 and at least one detection pin 112, and the PCB 2 has a plurality of functional solder pads 21 and at least one detection solder pad 22. The functional pins 111 are soldered to the functional solder pads 21 by using first solder balls 6, and the detection pins 112 are soldered to the detection solder pads 22 by using second solder balls 7. The designed life of the second solder balls 7 is shorter than the designed life of the first solder balls 6. At least one detection path 10 is formed between the BGA chip 1 and the PCB 2, and each detection path 10 includes at least two unit circuits 100 connected in series, and the unit circuits 100 include a detection pin 112, a second solder ball 7, and a detection solder pad 22 connected in sequence, and both of the two ends of the detection path 10 are the detection solder pads 22. The signal source module 3 and the detection module 4 are located on the PCB 2, and the signal source module 3 and the detection module 4 are electrically connected to the two ends of the detection path 10, respectively. The signal source module 3 is configured to send a detection signal to the detection module 4 through the at least one detection path 10, and the detection module 4 is configured to determine the status of the at least one detection path 10 based on the received detection signal.

[0135] (3) In some examples, as shown in Figures 7 to 10, the signal source module 3 is integrated on the die 12 and the detection module 4 is located on the PCB 2. One end of the detection path 10 is the detection pin 112 and the other end is the detection solder pad 22. The die 12 is electrically connected to the detection pin 112 at one end of the detection path 10, and the detection module 4 is electrically connected to the detection solder pad 22 at the other end of the detection path 10.

[0136] 7, there is one detection path 10, the detection path 10 includes one unit circuit 100, and the die 12 includes one signal sending end a. The signal sending end a is electrically connected to the detection pin 112 at one end of the detection path 10, and the detection module 4 is electrically connected to the detection solder pad 22 at the other end of the detection path 10.

[0137] 8, there is one detection path 10, the detection path 10 includes three unit circuits 100 connected in series, and the die 12 includes one signal sending end a. The signal sending end a is electrically connected to the detection pin 112 at one end of the detection path 10, and the detection module 4 is electrically connected to the detection solder pad 22 at the other end of the detection path 10.

[0138] 9, there are multiple (e.g., two) detection paths 10, and the die 12 includes one signal sending end a. The signal sending end a is electrically connected to a detection pin 112 at the end of the multiple detection paths 10, and the detection module 4 is electrically connected to a detection solder pad 22 at the other end of the multiple detection paths 10.

[0139] The number of signal transmitting ends a is reduced based on the above disposition, and the resources of the BGA chip 1 are saved.

[0140] In some other examples, there are multiple detection paths 10, and the die 12 includes multiple signal sending ends a. The multiple signal sending ends a are electrically connected to the detection pins 112 at the ends of the multiple detection paths 10, and the detection module 4 is electrically connected to the detection solder pads 22 at the other ends of the multiple detection paths 10.

[0141] In addition to the above technical solution in which the same number of signal transmitting ends as that of the detection paths 10 are arranged and one signal transmitting end a is arranged, in some other examples, when there are multiple detection paths 10, multiple signal transmitting ends a may be arranged, but it should be noted that the number of multiple signal transmitting ends a is smaller than the number of detection paths 10, and at least one signal transmitting end a is electrically connected to the detection pin 112 at the end of at least two detection paths 10. Therefore, the number of signal transmitting ends a is reduced, and the problem of excessively complicated cable wiring on the board 11 caused by excessive detection pins 112 being connected to the same signal transmitting end a is avoided.

[0142] In the following, a possible implementation of the signal transmitting end a is described using an example.

[0143] In some examples, the signal transmitting end a is a bump on the die 12 .

[0144] In some examples, as shown in FIGS. 7 through 9, the bumps may be bumps that are specially reserved on the die 12 and used to generate a detection signal.

[0145] In some other examples, the bump may alternatively be a bump that is electrically connected to a functional pin 111 and may generate a detection signal, as shown in Figure 10. For example, if the bump is a bump used to transmit a clock signal, the detection signal is a time-varying signal. In another example case, if the bump is a bump used for power supply, the detection signal is a fixed level signal.

[0146] In some examples, the signal sending end a may not be a bump on the die 12. For example, the signal sending end a may be a power module on the die 12, and the power module is electrically connected to the detection pin 112 at one end of the detection path 10. In this case, the detection signal is a fixed level signal.

[0147] In some examples, the detection module 4 is a circuit, such as an IC chip or a discrete device, integrated into the PCB 2. The detection module 4 may be a newly added hardware circuit for specifically monitoring the status of the detection path 10, or may be an existing hardware circuit on the PCB 2. This is not limited in the embodiments of the present disclosure.

[0148] In addition, it can be appreciated that since it is necessary to ensure that one end of the detection path 10 is a detection pin 112 and the other end is a detection solder pad 22, each detection path 10 must include an odd number of unit circuits 100.

[0149] It should be noted that the chip system shown in FIGS. 7 to 10 can alternatively be described as follows.

[0150] An embodiment of the present disclosure provides a chip system. As shown in FIG. 7 to FIG. 10, the chip system includes a BGA chip 1, a PCB 2, and a detection module 4. The BGA chip 1 has a plurality of functional pins 111 and at least one detection pin 112, and the PCB 2 has a plurality of functional solder pads 21 and at least one detection solder pad 22. The functional pins 111 are soldered to the functional solder pads 21 by using a first solder ball 6, and the detection pins 112 are soldered to the detection solder pads 22 by using a second solder ball 7. The designed life of the second solder ball 7 is shorter than the designed life of the first solder ball 6. At least one detection path 10 is formed between the BGA chip 1 and the PCB 2, and each detection path 10 includes one or more unit circuits 100 connected in series, and the unit circuits 100 include the detection pins 112, the second solder balls 7, and the detection solder pads 22 connected in sequence. One end of the detection path 10 is a detection pin 112, and the other end is a detection solder pad 22. The die 12 of the BGA chip 1 is electrically connected to the detection pin 112 at one end of the detection path 10, and the detection module 4 is located on the PCB 2 and electrically connected to the detection solder pad 22 at the other end of the detection path 10. The die 12 is configured to send a detection signal to the detection module 4 via the at least one detection path 10, and the detection module 4 is configured to determine a status of the at least one detection path 10 based on the received detection signal.

[0151] (4) In some examples, as shown in Figures 11 to 13, the signal source module 3 is located on the PCB 2, and the detection module 4 is integrated into the die 12. One end of the detection path 10 is the detection solder pad 22, and the other end is the detection pin 112. The signal source module 3 is electrically connected to the detection solder pad 22 at one end of the detection path 10, and the die 12 is electrically connected to the detection pin 112 at the other end of the detection path 10.

[0152] 11, there is one detection path 10, the detection path 10 includes one unit circuit 100, and the die 12 includes one signal receiving end b. The signal source module 3 is electrically connected to the detection solder pad 22 at one end of the detection path 10, and the signal receiving end b is electrically connected to the detection pin 112 at the other end of the detection path 10.

[0153] 12, there is one detection path 10, the detection path 10 includes three unit circuits 100 connected in series, and the die 12 includes one signal receiving end b. The signal source module 3 is electrically connected to the detection solder pad 22 at one end of the detection path 10, and the signal receiving end b is electrically connected to the detection pin 112 at the other end of the detection path 10.

[0154] In some examples, as shown in Fig. 13, there are multiple (e.g., two) detection paths 10, and the die 12 includes multiple (e.g., two) signal receiving ends b. The signal source module 3 is electrically connected to the odor detection solder pads 22 at the ends of the multiple detection paths 10, and the multiple signal receiving ends b are each electrically connected to a detection pin 112 at the other end of the multiple detection paths 10.

[0155] In some examples, the signal receiving end b is a bump on the die 12. In addition, the die 12 (or the detection module 4) needs to distinguish detection signals from multiple detection paths 10, so the number of signal receiving ends b is the same as the number of detection paths 10.

[0156] In some examples, the signal source module 3 is a circuit, such as an IC chip or a discrete device, integrated into the PCB 2. The signal source module 3 may be a newly added hardware circuit for specifically monitoring the status of the detection path 10, or may be an existing hardware circuit on the PCB 2. This is not limited in the embodiments of the present disclosure.

[0157] In addition, it can be appreciated that since it is necessary to ensure that one end of the detection path 10 is a detection solder pad 22 and the other end is a detection pin 112, each detection path 10 must include an odd number of unit circuits 100.

[0158] It should be noted that the chip system shown in FIGS. 11 to 13 can alternatively be described as follows.

[0159] An embodiment of the present disclosure provides a chip system. As shown in FIG. 11 to FIG. 13, the chip system includes a BGA chip 1, a PCB 2, and a signal source module 3. The BGA chip 1 has a plurality of functional pins 111 and at least one detection pin 112, and the PCB 2 has a plurality of functional solder pads 21 and at least one detection solder pad 22. The functional pins 111 are soldered to the functional solder pads 21 by using a first solder ball 6, and the detection pins 112 are soldered to the detection solder pads 22 by using a second solder ball 7. The designed life of the second solder ball 7 is shorter than the designed life of the first solder ball 6. At least one detection path 10 is formed between the BGA chip 1 and the PCB 2, and each detection path 10 includes one or more unit circuits 100 connected in series, and the unit circuit 100 includes a detection pin 112, a second solder ball 7, and a detection solder pad 22 connected in sequence. One end of the detection path 10 is a detection solder pad 22, and the other end is a detection pin 112. The signal source module 3 is located on the PCB 2 and is electrically connected to the detection solder pad 22 at one end of the detection path 10, and the die 12 of the BGA chip 1 is electrically connected to the detection pin 112 at the other end of the detection path 10. The signal source module 3 is configured to send a detection signal to the detection module 4 via the at least one detection path 10, and the die 12 is configured to determine a status of the at least one detection path 10 based on the received detection signal.

[0160] The designed life of the second solder ball 7 in the chip system provided in the embodiment of the present disclosure is shorter than the designed life of the first solder ball 6. Therefore, the status of the first solder ball 6 can be predicted by monitoring the status of the second solder ball 7. The implementation in which the designed life of the second solder ball 7 is shorter than the designed life of the first solder ball 6 is not limited in the embodiment of the present disclosure. The following provides some possible implementations.

[0161] In some examples, the second solder balls 7 are closer to the edge of the BGA chip 1 than the first solder balls 6 .

[0162] Stress damage to the BGA chip 1 is usually more likely to occur at the edges of the BGA chip 1. Therefore, the second solder balls 7 are located closer to the edges and the first solder balls 6 are located closer to the center, so that the designed life of the second solder balls 7 may be shorter than the designed life of the first solder balls 6.

[0163] In some examples, the second solder balls 7 are closer to the corners of the BGA chip 1 than the first solder balls 6 .

[0164] Furthermore, in the case of edges, stress damage to the BGA chip 1 is usually more likely to occur at the corners of the BGA chip 1. Therefore, the second solder balls 7 are placed at the corners of the BGA chip 1 and the first solder balls 6 are placed at non-corner positions, so that the designed life of the second solder balls 7 may be shorter than the designed life of the first solder balls 6.

[0165] 14 shows the arrangement of pins on the BGA chip 1. It can be seen from the figure that the detection pins 112 are closer to the corners of the BGA chip 1 than the functional pins 111, the first solder balls 6 are soldered to the functional pins 111, and the second solder balls 7 are soldered to the detection pins 112. Thus, the second solder balls 7 are closer to the corners of the BGA chip 1 than the first solder balls 6.

[0166] 14 that in addition to the functional pins 111 and the detection pins 112, the BGA chip 1 further has another pin 113. The another pin 113 may be understood as a pin of the same type as the detection pin 112, but which is not used to monitor the status of the second solder ball 7. The another pin 113 may be closer to a corner of the BGA chip 1 than the detection pin 112, or closer to the center of the BGA chip 1 than the detection pin 112. This is not limited to the embodiment of the present disclosure.

[0167] Of course, the second solder balls 7 provided in the embodiments of the present disclosure do not necessarily need to be closer to the edge or corner of the BGA chip 1 than the first solder balls 6, and the second solder balls 7 may be closer to the center of the BGA chip 1 than the first solder balls 6. For example, if the pins at the edge or corner of the BGA chip 1 are not suitable to be used as the detection pins 112 due to reasons such as over-connection, some pins located in the center may be used as the detection pins 112, in other words, the second solder balls 7 may alternatively be closer to the center of the BGA chip 1. Of course, in this case, other methods need to be used to set the designed life of the second solder balls 7 shorter than the designed life of the first solder balls 6.

[0168] In some examples, the outer diameter of the second solder ball 7 is smaller than the outer diameter of the first solder ball 6. Therefore, the first solder ball 6 is less likely to crack than the second solder ball 7, and as a result, the designed life of the second solder ball 7 is shorter than the designed life of the first solder ball 6.

[0169] In some examples, the strength of the material of the second solder balls 7 is less than the strength of the material of the first solder balls 6 .

[0170] The strength of the material of the second solder balls 7 is less than the strength of the material of the first solder balls 6. Therefore, the second solder balls 7 are more likely to crack than the first solder balls 6, and as a result, the designed life of the second solder balls 7 is shorter than the designed life of the first solder balls 6.

[0171] For example, the material of the second solder balls 7 is solder tin, and the material of the first solder balls 6 is solder tin and an additive (eg, an alloy).

[0172] In another example, the materials of the second solder ball 7 and the first solder ball 6 are both solder tin and an additive (e.g., an alloy), but the ratio of the additive contained in the second solder ball 7 is different from the ratio of the additive contained in the first solder ball 6.

[0173] It should be noted that the above implementations may be used separately or in any combination, which is not limited to the embodiments of the present disclosure.

[0174] The chip system provided in the embodiments of the present disclosure may include multiple detection paths 10, and the relationship between the designed lifetimes of the second solder balls 7 included in different detection paths 10 is not limited in the embodiments of the present disclosure.

[0175] In some examples, the designed life of the second solder balls 7 included in all sensing paths 10 is the same.

[0176] In some other examples, N levels of detection paths 10 are formed between the BGA chip 1 and the PCB 2, and the designed life of the second solder ball 7 included in the (M-1)th level of detection path 10 is shorter than the designed life of the second solder ball 7 included in the Mth level of detection path 10.

[0177] N is an integer greater than 1, and M is any integer greater than 1 and not greater than N, for example, both N and M are 2. As shown in Fig. 14, a two-level detection path 10 is formed between a BGA chip 1 and a PCB 2, and the designed life of the second solder balls 7 included in the first level detection path is shorter than the designed life of the second solder balls 7 included in the second level detection path.

[0178] According to the technical solution provided in the embodiment of the present disclosure, N levels of detection paths 10 are set, and the designed life spans of the second solder balls 7 included in the N levels of detection paths 10 are different, so that the cracking process of the solder balls can be tracked based on the status of the second solder balls 7 included in the N levels of detection paths 10, and the status of the first solder balls 6 can be predicted more accurately, so that corresponding measures can be taken more timely and accurately to delay or even avoid the cracking of the first solder balls 6, which can further improve the reliability of the chip system.

[0179] For example, after it is detected that a crack has occurred in the second solder ball 7 included in the first level detection path, corresponding measures can be taken to delay the cracking of the first solder ball 6. In addition, the effectiveness of these measures can be recognized by monitoring the status of another level detection path 10, and the status of the first solder ball 6 can be predicted by continuing to monitor the status of the another level detection path 10. The measures taken can be to reduce the temperature fluctuation degree of the BGA chip 1.

[0180] If it is detected that the second solder balls 7 included in another level of detection path 10 no longer crack, this indicates that the measures previously taken are effective.

[0181] After continued cracking is detected in the second solder ball 7 included in another level of detection path 10, more effective measures (e.g., continuing to reduce the temperature fluctuation rate of the BGA chip 1) can be taken to delay the cracking of the first solder ball 6 until no more cracks are present in the second solder ball 7 included in the next level of detection path 10 or until cracks also occur in the second solder ball 7 included in the final level of detection path.

[0182] If a crack also occurs in the second solder ball 7 included in the last level detection path, the status of the first solder ball 6 is unpredictable and final, i.e. effective, measures can be taken to delay the cracking of the first solder ball 6. Alternatively, for example, the chip system can be directly repaired or replaced.

[0183] In addition, after appropriate measures have been taken, if a crack is confirmed in a second solder ball 7 included in a next level detection path 10 or in a second solder ball 7 included in some next level detection paths 10 within the target duration, final measures may be taken even if no crack still occurs in a second solder ball 7 included in a final level detection path.

[0184] A crack of the second solder ball 7 included in the next-level detection path 10 or the second solder balls 7 included in some next-level detection paths 10 within the target duration indicates that the status of the first solder ball 6 is rapidly deteriorating, and final measures need to be taken immediately to avoid cracking the first solder ball 6. The specific value of the target duration is not limited in the embodiments of the present disclosure, and the specific value of the target duration can be set by staff members based on actual requirements.

[0185] It should be additionally noted that the corresponding measures taken to delay the cracking of the first solder balls 6, such as reducing the temperature fluctuation of the BGA chip 1, may cause certain damage to the chip system or the electronic device including the chip system. For example, to reduce the temperature fluctuation of the BGA chip 1, it may be necessary to reduce the number of times the BGA chip 1 sleeps, thereby increasing the power consumption of the BGA chip 1.

[0186] According to the technical solution provided in the embodiment of the present disclosure, N levels of detection paths 10 are set, and after a crack occurs in the second solder ball included in a higher level detection path 10, the strength of the measures taken is higher (and accordingly more damage occurs to the chip system or the electronic device including the chip system), so that the strength of the measures taken is adapted to the status of the first solder ball 6, and the strength of the measures taken can be adjusted accordingly based on the status of the first solder ball 6. This avoids the case where a stronger measure is taken when the first solder ball 6 is in a good state, and a weaker measure is still taken when the first solder ball 6 is in a bad state.

[0187] When the measure taken is to reduce the temperature fluctuation degree of the BGA chip 1, a stronger measure indicates that the temperature fluctuation degree of the BGA chip 1 is smaller.

[0188] The implementation in which the designed life of the second solder balls 7 included in the (M-1)th level detection path 10 is shorter than the designed life of the second solder balls 7 included in the Mth level detection path 10 is not limited in the embodiments of the present disclosure. In the following, some possible implementations are provided.

[0189] In some examples, the second solder balls 7 included in the detection paths 10 of the (M-1)th level are closer to the edge of the BGA chip 1 than the second solder balls 7 included in the detection paths 10 of the Mth level.

[0190] Stress damage to the BGA chip 1 is typically more likely to occur at the edges of the BGA chip 1, and therefore the designed life of the second solder ball 7 included in the (M-1)th level detection path 10 may be shorter than the designed life of the second solder ball 7 included in the Mth level detection path 10 based on the above-described arrangement.

[0191] In some examples, the second solder balls 7 included in the detection paths 10 of the (M-1)th level are closer to the corners of the BGA chip 1 than the second solder balls 7 included in the detection paths 10 of the Mth level.

[0192] Furthermore, in the case of edges, stress damage to the BGA chip 1 is usually more likely to occur at the corners of the BGA chip 1. Therefore, the designed life of the second solder balls 7 included in the (M-1)th level of detection paths 10 may be shorter than the designed life of the second solder balls 7 included in the Mth level of detection paths 10 based on the above-mentioned arrangement.

[0193] 14 shows the arrangement of pins on a BGA chip 1. It can be seen from the figure that the detection pin 112 included in the first level detection path is closer to the corner of the BGA chip 1 than the detection pin 112 included in the second level detection path. Therefore, the second solder ball 7 included in the first level detection path is also closer to the corner of the BGA chip 1 than the second solder ball 7 included in the second level detection path.

[0194] Of course, the second solder balls 7 included in the (M-1)th level detection path 10 do not necessarily need to be closer to an edge or corner of the BGA chip 1 than the second solder balls 7 included in the Mth level detection path 10. Instead, the designed life of the second solder balls 7 included in the (M-1)th level detection path 10 can be set shorter than the designed life of the second solder balls 7 included in the Mth level detection path 10 by using other methods.

[0195] In some examples, the outer diameter of the second solder ball 7 included in the detection path 10 of the (M-1)th level is smaller than the outer diameter of the second solder ball 7 included in the detection path 10 of the Mth level. The second solder ball 7 included in the detection path 10 of the Mth level is less likely to crack than the second solder ball 7 included in the detection path 10 of the (M-1)th level, and as a result, the designed life of the second solder ball 7 included in the detection path 10 of the (M-1)th level is shorter than the designed life of the second solder ball 7 included in the detection path 10 of the Mth level.

[0196] In some examples, the strength of the material of the second solder balls 7 included in the sensing paths 10 of the (M-1)th level is less than the strength of the material of the second solder balls 7 included in the sensing paths 10 of the Mth level.

[0197] The strength of the material of the second solder balls 7 included in the detection path 10 of the (M-1)th level is less than the strength of the material of the second solder balls 7 included in the detection path 10 of the Mth level. Therefore, the second solder balls 7 included in the detection path 10 of the (M-1)th level are more likely to crack than the second solder balls 7 included in the detection path 10 of the Mth level.

[0198] For example, the material of the second solder ball 7 included in the (M-1)th level detection path 10 is solder tin, and the material of the second solder ball 7 included in the Mth level detection path 10 is solder tin and an additive (e.g., an alloy).

[0199] In another example, the materials of the second solder balls 7 are both solder tin and an additive (e.g., an alloy), but the ratio of the additive contained in the second solder balls 7 included in the detection path 10 of the (M-1)th level is different from the ratio of the additive contained in the second solder balls 7 included in the detection path 10 of the Mth level.

[0200] It should be noted that the above implementations may be used separately or in any combination, which is not limited to the embodiments of the present disclosure.

[0201] In addition, for sensing paths 10 at the same level, the designed lifetime of the second solder balls 7 belonging to the sensing paths 10 at the same level may be the same.

[0202] For example, as shown in FIG. 14, the distances from the multiple detection pins 112 included in the first level detection path to the corner ends of the BGA chip 1 are basically the same, and the distances from the multiple detection pins 112 included in the second level detection path to the corner ends of the BGA chip 1 are basically the same.

[0203] The measures taken after it is detected that the second solder ball 7 is cracked are not limited in the embodiments of the present disclosure. In some examples, after determining that the second solder ball 7 is cracked, the detection module 4 controls sending an instruction message to instruct a staff member to take corresponding measures.

[0204] In some other examples, the chip system provided in the embodiments of the present disclosure may further include a control module 5. The control module 5 is configured to perform corresponding operations based on the status information determined by the detection module 4.

[0205] 15 is a diagram of the architecture of the chip system. The signal source module 3 sends detection signals to the detection module 4 through each detection path 10 in the detection network. The detection module 4 determines the status of the detection path 10 based on the received detection signals, and sends the determined status of the detection path 10 to the controller module 5. The controller 5 performs corresponding operations based on the status of the detection path 10.

[0206] The location of the control module 5 is not limited in the embodiments of the present disclosure. In some examples, the control module 5 and the detection module 4 are integrated into the same component, as shown in Figures 16 to 19. Alternatively, the control module 5 and the detection module 4 can be understood as the same module.

[0207] For example, as shown in FIG. 16, the signal source module 3, the detection module 4, and the control module 5 are all integrated into a die 12.

[0208] In another example, as shown in FIG. 17, the signal source module 3, all the detection modules 4, and the control module 5 are located on a PCB board 2.

[0209] In another example, as shown in FIG. 18, the signal source module 3 is integrated into the die 12, and both the detection module 4 and the control module 5 are located on the PCB substrate 2.

[0210] In another example, as shown in FIG. 19, the signal source module 3 is located on the PCB substrate 2, and the detection module 4 and the control module 5 are integrated into the die 12.

[0211] In some other examples, the control module 5 and the detection module 4 may not be located in the same component. For example, the BGA chip 1 may be located in a service board or a switch board in a communication device, and the control module 5 may be located in a main control board. Thus, the control module 5 may receive the status information of the detection path 10 fed back by the detection module 4 in all the service boards and switch boards, and perform corresponding operations.

[0212] In the following, the actions performed by the control module 5 based on the status of the detection path 10 will be explained in more detail by using an example.

[0213] In some examples, the control module 5 is configured to adjust the temperature of the BGA chip 1 based on the status of the sensing path 10 determined by the sensing module 4.

[0214] It has been found that during practical application, when the temperature changes significantly and frequently, the stress on the first solder balls 6 and the second solder balls 7 increases and changes frequently, and the possibility of cracking increases significantly. Therefore, the stress on the first solder balls 6 and the second solder balls 7 can be adjusted by adjusting the temperature of the BGA chip 1.

[0215] When the temperature of the BGA chip 1 is adjusted, the power consumption of the BGA chip 1 may be adjusted to adjust the heat generated by the BGA chip 1, or the power consumption of the target heat source device may be adjusted. The target heat source device is a device whose emitted heat can affect the temperature of the BGA chip 1 .

[0216] If it is determined that the second solder balls 7 included in the at least one detection path 10 are cracked, the control module 5 is configured to reduce the temperature fluctuations of the BGA chip 1 to slow the cracking of the first solder balls 6. In this manner, the stress on the first solder balls 6 may be reduced.

[0217] The temperature fluctuation degree of the BGA chip 1 may be indicated by the variance of the temperature of the BGA chip 1. The temperature fluctuation degree of the BGA chip 1 may be understood as the temperature difference range of the temperature of the BGA chip 1, the number of temperature changes, etc. The number of temperature changes is the number of times the temperature change is greater than the target temperature threshold. Reducing the temperature fluctuation degree of the BGA chip 1 may be understood as one or both of narrowing the temperature difference range of the BGA chip 1 and / or reducing the number of temperature changes of the BGA chip 1.

[0218] In addition, when there are N levels of detection paths 10 and when cracks occur in the second solder balls 7 included in the detection paths 10 at different levels, the degree of temperature fluctuation of the BGA chip 1 reduced by the control module 5 may also be different.

[0219] In some examples, the control module 5 is configured to: reduce a degree of temperature fluctuation of the BGA chip 1 by a first operation when it is determined that a crack has occurred in the second solder ball 7 included in the detection path 10 of the (M-1)th level; and reduce a degree of temperature fluctuation of the BGA chip 1 by a second operation when it is determined that a crack has occurred in the second solder ball 7 included in the detection path 10 of the Mth level.

[0220] The degree of temperature fluctuation of the BGA chip 1 acquired by the second operation is smaller than the degree of temperature fluctuation of the BGA chip 1 acquired by the first operation. It can be understood that, in general, before a crack occurs in the second solder ball 7 included in the detection path 10 of the Mth level, a crack also occurs in the second solder ball 7 included in the detection path 10 of the (M-1)th level.

[0221] In other words, if a crack occurs in the second solder ball 7 in the higher level detection path 10, the temperature fluctuation degree of the BGA chip 1 will be smaller after an operation is performed.

[0222] In some examples, the control module 5 is configured to: report a status message indicating that the BGA chip 1 is abnormal if it determines that a crack has occurred in the second solder ball 7 included in the Nth level detection path 10. In this way, a staff member can be reminded to replace or repair the chip system.

[0223] In some examples, if a crack occurs in the second solder ball 7 included in the Nth level detection path 10, the control module 5 may no longer additionally reduce the temperature fluctuation rate of the BGA chip 1. In some other examples, if the BGA chip 1 reports status information indicating that it is abnormal, the control module 5 may instead continue to reduce the temperature fluctuation rate of the BGA chip 1.

[0224] In some other examples, the control module 5 is configured to: report status information indicating that the BGA chip 1 is abnormal if it determines that a crack has occurred in a second solder ball 7 included in at least two levels of the detection path 10 within the target duration.

[0225] If the second solder ball 7 included in the at least two levels of the detection path 10 cracks within the target duration, it indicates that the status of the first solder ball 6 deteriorates rapidly. In this case, the status information can be reported in a timely manner to remind the staff member to repair or replace the chip system. The specific value of the target duration is not limited in the embodiment of the present disclosure, and the specific value of the target duration can be set by the staff member based on the actual requirements.

[0226] In some other examples, the control module 5 is configured to: report status information indicating that the BGA chip 1 is abnormal if it determines that a crack has occurred in a second solder ball 7 included in any level of the detection path 10. In addition, the status information may further retain the level of the detection path 10 to which the cracked second solder ball 7 belongs. In this way, staff members may better understand the status of the BGA chip 1.

[0227] The implementation of the control module 5 to reduce the temperature fluctuation degree of the BGA chip 1 is not limited to the embodiments of the present disclosure. The following provides some possible implementations.

[0228] In some examples, the control module 5 is configured to control the power consumption of the BGA chip 1 in an operational state to have a narrow variation range.

[0229] When the variation range of the power consumption of the BGA chip 1 is narrowed, the variation range of the heat generated by the BGA chip 1 in the working state is narrowed, which helps to reduce the temperature fluctuation degree of the BGA chip 1.

[0230] In some examples, the control module 5 is configured to reduce the frequency with which the BGA chip 1 switches between operational and non-operational states.

[0231] The non-operating state may be a sleep state, a power-off state, etc. The BGA chip 1 in the non-operating state consumes very low or even no power. Therefore, the BGA chip 1 in the non-operating state generates very little or even no heat, which is significantly different from the heat generated in the operating state.

[0232] According to the technical solutions provided in the embodiments of the present disclosure, the frequency at which the BGA chip 1 switches between the operating state and the non-operating state is reduced, and as a result, the number of times that the heat generated by the BGA chip 1 significantly increases and the number of times that the heat generated by the BGA chip 1 significantly decreases are reduced, which helps to reduce the degree of temperature fluctuation of the BGA chip 1.

[0233] In some examples, the control module 5 is configured to control the power consumption of the target heat source device in an operational state to have a narrow range of variation.

[0234] When the change range of the power consumption of the target heat source device is narrow, the change range of the heat generated by the target heat source device in the operating state is narrow, so that the temperature of the BGA chip 1 is not significantly changed by the target heat source device, which helps to reduce the degree of temperature fluctuation of the BGA chip 1.

[0235] In some examples, the control module 5 is configured to reduce the frequency with which the target heat source device switches between operational and non-operational states.

[0236] The frequency with which the target heat source device switches between operating and non-operating states is reduced, thereby reducing the number of times that the heat generated by the target heat source device increases significantly and the number of times that the heat generated by the target heat source device decreases significantly, which helps reduce the degree of temperature fluctuation of the BGA chip 1.

[0237] In some examples, the control module 5 is configured to activate a constant temperature protection circuit, in this way the temperature of the BGA chip 1 is kept as constant as possible.

[0238] In some examples, the control module 5 is configured to adjust the heat dissipation efficiency of the heat dissipation system, for example, by adjusting the rotation speed of the heat dissipation fan, thereby keeping the temperature of the BGA chip 1 as constant as possible.

[0239] It should be noted that the above-mentioned implementations may be used separately or in any combination, which is not limited in the embodiments of the present disclosure. The temperature of the BGA chip 1 may be understood as the temperature of the environment in which the BGA chip 1 is located.

[0240] An embodiment of the present disclosure further provides an electronic device, the electronic device having the chip system in any one of the above implementations.

[0241] The type of electronic device is not limited in the embodiments of the present disclosure. The electronic device can be any electronic device having a BGA chip. For example, the electronic device is a communication device, a terminal device, a storage device, or a server.

[0242] The above description is merely an optional embodiment of the present disclosure, but is not intended to limit the present disclosure. Any modification, equivalent replacement or improvement made without departing from the principle of the present disclosure should be included in the protection scope of the present disclosure.

Claims

1. A chip system comprising a ball grid array (BGA) chip (1), a printed circuit board (PCB) (2), a signal source module (3) and a detection module (4), The BGA chip (1) has a plurality of functional pins (111) and at least one detection pin (112), the PCB (2) has a plurality of functional solder pads (21) and at least one detection solder pad (22), the functional pins (111) are soldered to the functional solder pads (21) by using first solder balls (6), the detection pins (112) are soldered to the detection solder pads (22) by using second solder balls (7), and the designed life of the second solder balls (7) is shorter than the designed life of the first solder balls (6); At least one detection path (10) is formed between the BGA chip (1) and the PCB (2), the detection path (10) having one or more unit circuits (100) connected in series, the unit circuits (100) including the detection pin (112), the second solder ball (7), and the detection solder pad (22) connected in sequence; The signal source module (3) is configured to transmit a detection signal to the detection module (4) via the at least one detection path (10); The detection module (4) is configured to determine a status of the at least one detection path (10) based on the received detection signal.

2. The BGA chip (1) has a substrate (11) and a die (12), the substrate (11) includes the functional pin (111) and the detection pin (112), the signal source module (3) and the detection module (4) are integrated into the die (12), and the die (12) includes at least one signal transmitting end (a) and at least one signal receiving end (b); 2. The chip system of claim 1, wherein the detection path (10) has at least two unit circuits (100) connected in series, both of the two ends of the detection path (10) are detection pins (112), and the signal transmitting end (a) and the signal receiving end (b) are electrically connected to the two ends of the detection path (10), respectively.

3. The signal source module (3) and the detection module (4) are located on the PCB (2); 2. The chip system of claim 1, wherein the detection path (10) has at least two unit circuits (100) connected in series, both of the two ends of the detection path (10) are detection solder pads (22), and the signal source module (3) and the detection module (4) are each electrically connected to the two ends of the detection path (10).

4. The BGA chip (1) has a substrate (11) and a die (12), the substrate (11) includes the functional pins (111) and the detection pins (112), the signal source module (3) is integrated into the die (12), and the detection module (4) is located on the PCB (2); 2. The chip system of claim 1, wherein one end of the detection path (10) is the detection pin (112) and the other end is the detection solder pad (22); the die (12) is electrically connected to the detection pin (112) at one end of the detection path (10), and the detection module (4) is electrically connected to the detection solder pad (22) at the other end of the detection path (10).

5. The signal source module (3) is located on the PCB (2), the BGA chip (1) has a substrate (11) and a die (12), the substrate (11) includes the function pins (111) and the detection pins (112), and the detection module (4) is integrated into the die (12); 2. The chip system of claim 1, wherein one end of the detection path (10) is the detection solder pad (22) and the other end is the detection pin (112); the signal source module (3) is electrically connected to the detection solder pad (22) at one end of the detection path (10), and the die (12) is electrically connected to the detection pin (112) at the other end of the detection path (10).

6. 6. The chip system according to claim 1, wherein the second solder balls (7) are closer to an edge of the BGA chip (1) than the first solder balls (6).

7. 7. The chip system according to claim 1, wherein the second solder balls (7) are closer to the corners of the BGA chip (1) than the first solder balls (6).

8. 8. The chip system according to claim 1, wherein the outer diameter of the second solder ball (7) is smaller than the outer diameter of the first solder ball (6).

9. 9. The chip system according to claim 1, wherein the strength of the material of the second solder balls (7) is less than the strength of the material of the first solder balls (6).

10. 10. The chip system of claim 1, wherein N levels of detection paths (10) are formed between the BGA chip (1) and the PCB (2), and a designed life (7) of a second solder ball included in an (M-1)th level of detection path (10) is shorter than a designed life (7) of a second solder ball included in an Mth level of detection path (10), where N is an integer greater than 1 and M is any integer greater than 1 and not greater than N.

11. The chip system of claim 10, wherein the second solder ball (7) included in the detection path (10) of the (M-1) level is closer to the edge of the BGA chip (1) than the second solder ball (7) included in the detection path (10) of the M level.

12. The chip system of claim 10 or 11, wherein the second solder ball (7) included in the detection path (10) of the (M-1) level is closer to the corner of the BGA chip (1) than the second solder ball (7) included in the detection path (10) of the M level.

13. The chip system of any one of claims 10 to 12, wherein the outer diameter of the second solder ball (7) included in the detection path (10) of the (M-1) level is smaller than the outer diameter of the second solder ball (7) included in the detection path (10) of the M level.

14. The chip system of any one of claims 10 to 13, wherein the strength of the material of the second solder ball (7) included in the detection path (10) of the (M-1) level is less than the strength of the material of the second solder ball (7) included in the detection path (10) of the M level.

15. 15. The chip system according to any one of claims 10 to 14, wherein the second solder balls (7) belonging to the same level of detection paths (10) have the same designed lifetime.

16. The detection module (4) comprises: determining that a crack has occurred in a second solder ball (7) included in the target detection path when no detection signal is received via the target detection path, wherein the target detection path is any detection path (10); The chip system of claim 1 , configured to:

17. The chip system of any one of claims 1 to 16, further comprising a control module (5), the control module (5) configured to adjust the temperature of the BGA chip (1) based on the status of the detection path (10) determined by the detection module (4).

18. The chip system of claim 17, wherein the control module (5) is configured to: reduce a degree of temperature fluctuation of the BGA chip (1) when it determines that a crack has occurred in the second solder ball (7) included in the at least one detection path (10).

19. the N levels of detection paths (10) are formed between the BGA chip (1) and the PCB (2), and the designed life of the second solder ball (7) included in the (M-1)th level of the detection path (10) is shorter than the designed life of the second solder ball (7) included in the Mth level of the detection path (10), where N is an integer greater than 1 and M is any integer greater than 1 and not greater than N; The control module (5) comprises: reducing the degree of temperature fluctuation of the BGA chip (1) by a first operation when it is determined that a crack has occurred in the second solder ball (7) included in the detection path (10) of the (M-1) level; and If it is determined that a crack occurs in the second solder ball (7) included in the detection path (10) of the M level, a temperature fluctuation degree of the BGA chip (1) is reduced by a second operation, where the temperature fluctuation degree of the BGA chip (1) obtained by the second operation is smaller than the temperature fluctuation degree of the BGA chip (1) obtained by the first operation. The chip system of claim 18 configured to:

20. The chip system of claim 19, wherein the control module (5) is configured to: report a status message indicating that the BGA chip (1) is abnormal if it determines that a crack has occurred in a second solder ball (7) included in the Nth level detection path (10).

21. The control module (5): when determining that a crack has occurred in the second solder ball (7) included in the at least one detection path (10), performs the following actions, namely: Controlling the power consumption of the BGA chip (1) in an operational state so that the variation range is narrow; Reducing the frequency with which the BGA chip (1) switches between the operating and non-operating states; Controlling the power consumption of a target heat source device in an operating state to have a narrow variation range, where the target heat source device is a device whose generated heat may affect the BGA chip (1); Reducing the frequency with which the target heat source device switches between the operating state and the non-operating state; and Enable the constant temperature protection circuit 21. The chip system of claim 17, configured to perform one or more of the following:

22. 22. An electronic device, said electronic device comprising a chip system according to any one of claims 1 to 21.

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