Optical encoder controller, electronic-to-optical encoder, optical computer or optical computer chip, and method performed by the optical encoder controller.

Abstract

A controller for an optical encoder is provided that is configured to receive an electronic signal, receive a feedback signal whose value is based on a complex element and based on a phase drift associated with a photonic device of the optical encoder, modify the received electronic signal based on the received feedback signal, generate a modified electronic signal, and provide the modified electronic signal to modulate the photonic device.

Description

[Technical field]

[0001] The present disclosure relates to a method and apparatus for controlling an optical encoder that encodes and decodes complex numbers to and from an optical signal and performs operations using optical circuits. [Background technology]

[0002] Optical computing approaches promise to perform mathematical operations much faster and with much less energy consumption than similar operations using digital electronics. Nevertheless, optical computing systems are typically designed to only support integer values ​​and are limited by digital interfaces to existing hardware. It would be beneficial to provide optical computing systems that can perform more advanced operations. Summary of the Invention

[0003] This Summary is intended to introduce concepts that are described in more detail in the Detailed Description. This Summary is not intended to identify essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

[0004] The methods disclosed herein generally relate to systems and methods for providing improved optical computing systems that can perform significantly more complex operations than those performed by existing optical computing systems. As optical computing systems become more sophisticated, various factors and requirements must be addressed and compensated for to enable the improved optical computing systems to operate reliably and efficiently. Additionally, it is desirable for the controller and control circuitry to be compatible with multiple types of optical devices, so that each type of optical (photonic) device does not require its own custom control circuitry. The present disclosure provides mechanisms for addressing these objectives.

[0005] More specifically, the inventors recognize that as optical computing systems become more advanced, e.g., to accommodate calculations involving complex numbers, the optical computing systems become sensitive to phase changes and phase effects operating in / on components of the optical computing system. These phase effects must be compensated for to ensure accuracy of the calculations performed. The present disclosure provides methods and apparatus directed to controllers of optical encoders, such as may be used as part of an optical computing system, that can account for such phase effects.

[0006] Additionally, the present inventors have recognized that there may be a need to use an array of photonic device types in an optical computing system, and it is desirable for the control circuitry of the controller to be easily scalable to accommodate different types of photonic devices, thereby avoiding the need to provide separate controller types to suit every possible photonic device type.

[0007] According to a first aspect of the present disclosure, a controller of an optical encoder is provided, the controller being configured to receive an electronic signal, receive a feedback signal, the value of the electronic signal being based on a complex element and based on a phase drift associated with a photonic device of the optical encoder, modify the received electronic signal based on the received feedback signal to generate a modified electronic signal, and provide the modified electronic signal to modulate the photonic device. It will be apparent that there may be multiple controllers and multiple photonic devices. The controller and the photonic devices may operate together in the described manner in a one-to-one, one-to-many, or many-to-one relationship. Thus, a reference to a "controller" may be construed as a reference to "one or more controllers" and a reference to a "photonic device" may be construed as a reference to "one or more photonic devices."

[0008] A "complex element" in this context is understood to mean a complex number or a component of a complex number. A component of a complex number can be a real or imaginary part of a complex number or can be based on a real or imaginary part of a complex number (e.g. a component can be the modulus of the real or imaginary part of a complex number, or a positive or negative value of the real or imaginary part of a complex number).

[0009] In the manner described above, the controller can compensate for phase drift of the photonic device of the optical encoder. As described above, the effects of such phase drift can otherwise impair the ability of the photonic device (and thus the entire optical computing system) to perform accurate and reliable calculations and operations. By receiving a feedback signal related to the phase drift and using it to modify the input signal to the photonic device, a feedback loop can be established that, depending on the arrangement, can continuously or periodically update the electronic signal as needed. In this manner, the phase drift of the photonic device can be continuously or periodically corrected to ensure reliable and accurate calculations.

[0010] The feedback signal may be received as an offset voltage that is provided via feedback logic. In this manner, information regarding the phase drift of the photonic device is received and processed by the feedback logic, which may then be configured to provide an appropriate correction to the electronic signal in the form of an offset voltage that is provided to the controller. In this manner, the feedback logic may be adapted as necessary based on the type of photonic device used and to take into account other considerations that may affect the desired correction to the electronic signal.

[0011] The controller may be configured to split the received electronic signal into a first signal component and a second signal component, which may advantageously be treated differently and, optionally, encode different information, as described in more detail below.

[0012] The second signal component may be an inverted version of the first signal component in order to increase the dynamic operating range of a photonics device and reduce the quantization noise from such a device, thus improving the bit precision / precision / addressability limit of said photonics device.

[0013] The controller may invert the second signal component of the split signal in the digital domain or in the analog domain. For example, in one arrangement, the controller may include a push-pull amplifier configured to invert the second signal component in the analog domain. In another arrangement, the controller may include an inverter configured to invert the second signal component in the digital domain. If the second signal component is inverted in the digital domain, the circuit may be advantageously simplified. This is because inversion in the analog domain may require additional circuit components, such as a push-pull amplifier. Such a push-pull amplifier may remove AC coupling or add DC artifacts to the second signal component, and such artifacts may need to be corrected using additional circuitry. Inverting the second signal component in the digital domain avoids the need for such corrections and associated components. However, inverting a digital signal requires two digital-to-analog converters and may increase power consumption. The trade-off between the designs is achieved by considering the overall power budget of the electronic circuit.

[0014] The controller may be configured to receive an adjustment signal for compensating for a DC offset on the second signal component and to modify the second signal component based on the received adjustment signal to generate a modified second signal component. Correcting the DC offset or correcting the DC artifact advantageously ensures that the second signal component remains AC coupled. AC coupling improves signal resolution by removing the DC component or DC offset of the signal. This AC coupling is particularly advantageous when dealing with high frequency signals or when the DC offset is large.

[0015] The controller may be configured to modify the received electronic signal by adjusting the first and second signal components to offset a phase drift associated with the photonic device. This is one mechanism by which the controller compensates for phase drift in the photonic device. Compensating at the level of the split signal components provides a finer level of control, precision, and flexibility. For example, a first signal component may be used to carry a data signal to the photonic device, and a second signal component may be used to interpret and compensate for the effects of phase drift in the photonic device. In such an example, the second signal component may be used to modify the first signal component as needed to compensate for the phase drift.

[0016] The controller may be configured to modify the received electronic signal by adjusting the first and second signal components so that their swing voltage spans the dynamic operating range of the photonic device. This adjustment advantageously allows the voltage to swing closer to its maximum value, or rail-to-rail, without the waveform being clipped. This can reduce signal distortion and increase the amplitude of the output signal.

[0017] The controller can be configured to receive an indication of a dynamic operating range of the photonic device and modify the received electronic signal based on the received indication of the dynamic operating range. This further enables the signal provided to the photonic device to take into account the operating parameters and limitations of the photonic device, ultimately resulting in improved control and resulting in more accurate and reliable calculations and operations. Adjusting the signal based on the dynamic operating range of the photonic device can also reduce signal distortion and increase the amplitude of the output signal by allowing the voltage to swing closer to a maximum value or to swing rail-to-rail while not clipping the waveform.

[0018] The controller can be configured to amplify the received electronic signal. Amplifying the signal in this manner advantageously allows the output signal to have a higher amplitude without changing the shape of the input signal. Amplification also helps minimize the effects of signal noise and interference.

[0019] The received electronic signal may be a digital electronic signal. The controller may be configured to convert the received (digital) electronic signal into an analog electronic signal using a digital-to-analog converter (DAC).

[0020] The controller can be configured to AC-couple the analog electronic signal to adjust for the DC offset of the analog electronic signal. The DC offset correction or DC artifact correction ensures that the signal remains AC-coupled. AC coupling improves the resolution of the signal by removing the DC component or DC offset of the signal. This AC coupling is particularly advantageous when dealing with high frequency signals or when the DC offset is large.

[0021] The controller can be configured to modify the received electronic signal to compensate for a phase shift induced by the push-pull amplifier of the optical encoder, thereby enabling the system to compensate for undesirable phase effects induced by the push-pull amplifier that may otherwise impair the ability of the optical computing system to perform accurate and reliable calculations or operations.

[0022] The controller may be configured to provide a modified electronic signal: provide a first portion of the modified electronic signal, the first portion being fast moving, and provide a second portion of the modified electronic signal, the second portion being slow moving. In this context, a "fast moving" signal refers to an AC data signal. In this context, a "slow moving" signal refers to a slow moving DC signal. The slow moving component of the circuit may generally be comprised of a DC component.

[0023] In one arrangement, the fast-moving signal may constitute the data signal and the slow-moving signal may constitute the correction signal. In this way, the fast-moving signal may rapidly transmit data to the photonic device, while the slow-moving signal may encode a correction prompted by the received feedback signal. The slow-moving signal may be used to correct the fast-moving signal when necessary. This is because phase drift in photonic devices occurs slowly, so the slow-moving signal is sufficient to capture and correct these phase effects. Fast-moving signals are not well suited to correcting phase drift, since it can only be corrected as it occurs. On the other hand, the fast-moving signal may continue to transfer data to the photonic device at high speed.

[0024] A second portion of the modified electronic signal may be generated by modifying the received electronic signal. The received electronic signal may be a multi-bit signal. The received electronic signal may be received via an interface and at least one buffer. The interface may comprise a digital input / output board.

[0025] According to a second aspect of the present disclosure, there is provided an electronic-optical encoder comprising a controller as described herein and a photonic device as described herein, the photonic device comprising a modulator configured to apply a first modulation element to an optical input signal based on a modified electronic signal, the first modulation element being operable to encode a complex element onto the optical input signal to generate an encoded optical signal.

[0026] According to a third aspect of the present disclosure, there is provided a method performed by a controller of an optical encoder, the method comprising: receiving an electronic signal, a value of the electronic signal being based on a complex element; receiving a feedback signal based on a phase drift associated with a photonic device of the optical encoder; modifying the received electronic signal based on the received feedback signal to generate a modified electronic signal; and providing the modified electronic signal to modulate the photonic device.

[0027] The present disclosure generally relates to improved optical computing systems capable of performing operations of increasing complexity. More specifically, the present disclosure provides methods and devices that enable the optical computing system to compensate for phase effects that affect components of the system. While these phase effects do not adversely affect more rudimentary optical computing systems, the inventors recognize that as the complexity of optical computing systems increases, these phase effects must be accounted for. Compensating for these effects ensures reliability and accuracy of the calculations performed by the optical computing system. [Brief description of the drawings]

[0028] Hereinafter, specific embodiments will be described by way of example with reference to the accompanying drawings.

[0029] [Figure 1a] FIG. 2 is an Argand diagram including a plot of complex numbers. [Figure 1b]FIG. 2 is an Argand diagram including a plot of complex numbers. [Figure 1c] FIG. 2 is an Argand diagram including a plot of complex numbers. [Diagram 2] It shows the components of photonic circuits (modulators), their photonic functions and the mathematical operators they apply to complex elements in the optical domain. [Figure 3a] 1 illustrates a method for encoding a full complex number into an optical input signal, according to an embodiment. [Figure 3b] 1 shows an optical encoder according to an embodiment; [Figure 4a] 1 illustrates an optical encoder including a controller according to an embodiment. [Figure 4b] 3b and 4a show specific examples of the optical encoders of FIG. [Figure 4c] 3b and 4a show specific examples of the optical encoders of FIG. [Figure 4d] 3b and 4a show specific examples of the optical encoders of FIG. [Figure 4e] 3b and 4a show specific examples of the optical encoders of FIG. [Figure 4f] 3b and 4a show specific examples of the optical encoders of FIG. [Figure 4g] 3b and 4a show specific examples of the optical encoders of FIG. [Figure 5a] 1 shows an optical encoder according to an embodiment; [Figure 5b] 5b shows an embodiment of the optical encoder of FIG. 5a. [Figure 5c] 5b shows an embodiment of the optical encoder of FIG. 5a. [Figure 5d] 5b shows an embodiment of the optical encoder of FIG. 5a. [Figure 5e] 5b shows an embodiment of the optical encoder of FIG. 5a. [Figure 5f] 5b shows an embodiment of the optical encoder of FIG. 5a. [Figure 6a] 1 shows an optical encoder according to an embodiment; [Figure 6b] 6b shows an embodiment of the optical encoder of FIG. 6a. [Figure 6c] 6b shows an embodiment of the optical encoder of FIG. 6a. [Figure 6d] 6a-6c show graphs of magnitude and phase of the output of the encoder according to FIGS. 6a-6c as a function of the phase shift applied by each phase shifter. [Figure 6e] 6a-6c show graphs of magnitude and phase of the output of the encoder according to FIGS. 6a-6c as a function of the phase shift applied by each phase shifter. [Figure 7a] An optical circuit including an encoder is shown, the optical circuit being configured to perform an operation on an encoded optical signal. [Figure 7b] An optical circuit including an encoder is shown, the optical circuit being configured to perform an operation on an encoded optical signal. [Figure 8a] 1 shows an optical decoder according to an embodiment; [Figure 8b] 1 shows an optical decoder according to an embodiment; [Figure 9a] FIG. 2 is a schematic diagram of an optical Fourier transform stage. [Figure 9b] FIG. 1 is a schematic diagram of a free-space optical Fourier transform stage with two-dimensional input and output arrays. [Figure 9c] 9b and 9d. FIG. 9c is a close-up schematic diagram of the two-dimensional I / O array of FIG. 9b and the one-dimensional I / O array of FIG. 9d. [Figure 9d] FIG. 1 is a schematic diagram of an integrated optical Fourier transform stage with one-dimensional input / output arrays. [Figure 10a] 1 is a schematic diagram of an optical device according to an embodiment. [Figure 10b] FIG. 10b is a schematic diagram illustrating mathematical operations that can be performed using the optical device of FIG. [Figure 11] 1 is a schematic diagram of an optical device according to an embodiment. [Figure 12] 12 is a schematic diagram illustrating mathematical operations that can be performed using the optical device of FIG. 11. [Figure 13] FIG. 2 is a schematic diagram illustrating mathematical operations that can be performed using an optical Fourier transform stage according to an embodiment. [Figure 14]1 illustrates an example of a system for compensating for encoder phase effects. [Figure 15] 14 shows first and second exemplary embodiments illustrating signal flow through components of a controller 1402 of an optical encoder. [Figure 16] 14 shows first and second exemplary embodiments illustrating signal flow through components of a controller 1402 of an optical encoder. [Figure 17] 16 is an example of a circuit used to implement the controller of FIG. 15. [Figure 18] 1 is a flowchart of a method implemented by a controller to provide an input signal to a photonic device. [Figure 19] 4 shows a circuit for processing an optical signal received by a decoder according to an embodiment; [Figure 20] 4 shows a circuit for processing an optical signal received by a decoder according to an embodiment; [Figure 21] A detailed example of the operation of the differential ADC and binary output decoder of FIGS. 19 and 20 is shown. [Figure 22] A detailed example of the operation of the differential ADC and binary output decoder of FIGS. 19 and 20 is shown.

[0030] In the drawings, like reference numbers indicate like parts. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0031] The present disclosure begins with a description of an encoder arranged to encode complex elements into an optical signal, an optical circuit for performing mathematical operations on the complex elements, and a decoder arranged to decode the complex elements from the optical signal, with reference to Figs. 1-8b. As used in the present disclosure, the term "complex element" may be understood to mean a complex number or a component of a complex number. A component of a complex number may be a real or imaginary part of a complex number, or may be based on a real or imaginary part of a complex number (e.g., a component may be a modulus of a real or imaginary part of a complex number, or a positive or negative value of a real or imaginary part of a complex number).

[0032] Following this, Figures 9a-13 describe optical devices (e.g., photonic integrated circuits) capable of performing complex operations including arithmetic, optical Fourier transforms (OFTs), and convolutions, each of which is performed with complex elements to decode a full complex number from any output signal. Such operations are the basis of many computationally intensive applications, including cryptography, artificial intelligence, and scientific simulation. Photonic architectures provided as part of optical computing systems natively manipulate multi-bit information and are amenable to silicon photonics (SiPh) platforms as well as III-V semiconductor material systems, or the integration of the two.

[0033] These optical computing systems, methods and apparatus are subsequently described with reference to Figures 14-22, which include electronic circuitry that controls the encoder and assists in decoding complex numbers from signals received by the decoder. These electronic circuitry elements compensate for phase effects that affect advanced optical computing systems such as those disclosed herein.

[0034] I-Encoder, decoder, optical circuit Encoding Complex Numbers Using Photonics Complex numbers can be encoded into an optical signal emitted by a coherent light source. JPEG2025508560000002.jpg33 is the actual number JPEG2025508560000003.jpg55 and imaginary numbers JPEG2025508560000004.jpg45 is used to define the complex number, which is coded using Cartesian coordinates (equation 1a) or its absolute value JPEG2025508560000005.jpg45 and the phase (hereafter called "argument") φ, which is coded in polar coordinates (Equation 1b). JPEG2025508560000006.jpg1161

[0035] As shown in Figure 1a, an Argand diagram 100 can be defined by a first axis 101 and a second axis 102 that is orthogonal to the first axis 101 such that the angular relationship between the positive arm of the second axis 102 and the positive arm of the first axis 101 is π / 2 radians. The intersection of the first and second axes 101, 102 defines the origin 103 of the Argand diagram 100. The first axis 101 represents the real dimension and the second axis 102 represents the imaginary dimension. Complex numbers 104 are defined as points on the Argand diagram.

[0036] It is convenient to define the complex number 104 and its location on the Argand diagram 100 using a vector 105 starting at the origin 103 and ending at the point representing the complex number 104. This vector can be defined by the vector sum of its projections onto the first and second axes 101, 102. The projections are the real numbers in Cartesian coordinates JPEG2025508560000007.jpg46 and imaginary number JPEG2025508560000008.jpg46 components. Alternatively, the vector 105 defines a magnitude (or modulus or absolute value) that is measured as the length of the vector 105. JPEG2025508560000009.jpg45 and a deviation angle φ measured as the angle that the vector 105 deflects from the first axis 101.

[0037] Each real component JPEG2025508560000010.jpg55 and imaginary component JPEG2025508560000011.jpg55 has the absolute value JPEG2025508560000012.jpg413, JPEG2025508560000013.jpg412 with polarity (or sign) JPEG2025508560000014.jpg413, JPEG2025508560000015.jpg, which can be simplified to multiplying by 413: JPEG2025508560000016.jpg1153

[0038] 1b and 1c respectively show Argand diagrams having the same properties as the Argand diagram 100 of FIG. 1a, representing an array of complex numbers 104a, 104b in a system capable of coding the complex numbers 104a, 104b at a fixed interval of quantization levels N for each component. As shown by comparing FIG. 1b and FIG. 1c, the complex numbers Representing JPEG2025508560000017.jpg33 gives us the complex plane (complex domain) with an equidistant rectangular grid, whereas representing the complex numbers in polar coordinates (Fig. 1c) To represent JPEG2025508560000018.jpg33, we use the complex number JPEG2025508560000019.jpg33 absolute value As JPEG2025508560000020.jpg45 grows, the system's resolution becomes denser near the origin and sparser in the argument domain, resulting in non-uniform resolution across the complex domain. Another prominent space onto which coordinates are projected, which we will not discuss in detail here, is the two-dimensional surface of the Riemann sphere. However, this too can present problems for uniform resolution when using fixed intervals on quantization levels. Thus, while encoding in each of these spaces is possible, encoding in Cartesian coordinates is advantageous in any quantized (or digital) encoding system that has fixed intervals on the quantization levels N of the components.

[0039] Although the complex domain as shown in Figures 1a-1c is represented in Cartesian coordinates with orthogonal axes, it is also possible to represent the complex domain using axes arranged diagonally such that the angle between them is greater than 0 degrees and less than 90 degrees. That is, the phase difference (or argument difference) between the real and imaginary parts is no longer π / 2 radians, but a number greater than 0 radians and less than π radians. Transformation matrices can be used to map complex numbers from one set of axes to the other.

[0040] The inventors have recognized that by operating one or a combination of photonic devices based on quantized (or digital) electronic signals, the optical signal modulated by the photonic devices can be coded with mathematical complex numbers (or at least components of complex numbers). The complex numbers (or components) originate in the digital electronic domain, but are coded in the optical domain for processing in the optical domain. For example, the constituent terms on the right hand side of Equations 1a-2b can be expressed in the optical domain by coding them into optical signals. A digital electronic signal having a value based on said terms is converted to an analog signal and one or more photonic devices are driven to modulate an optical input signal to generate an optical signal coded with said terms. The use of a received digital electronic signal coded with a complex number, followed by conversion of the data to an optical signal output by a photonic device (which typically operates in an analog manner), creates an improved interface between the digital signal domain used in electronic computing and the optical domain used in optical computing. In particular, dividing a digital word defining a complex element into segments and separately using these segments to control separate modulators that encode the entire complex element into an optical stream is a more efficient and controllable means of encoding an optical signal having a complex element, thereby making it easier, more efficient, and more effective to integrate optical computer processors with electronic computer processors.

[0041] Photonic circuit components (also referred to herein as photonic devices or modulators) are used to modulate the phase or amplitude of optical signals to encode complex elements (e.g., complex numbers or components thereof) into optical signals, and / or to combine or otherwise process optical signals to perform mathematical operations such as addition, multiplication, Fourier transform, convolution, etc. on complex numbers or components thereof.

[0042] Figure 2 shows the various optical circuit components, their optical functions, and the mathematical operations they encode into the optical signal.

[0043] As shown in FIG. 2, summation of complex numbers (or their components) in the optical domain is performed using a Y-branch 211 or a 2×1 multimode interferometer (MMI) 212, or a combination of either or both in parallel.

[0044] A phase shift of π / 2 by the π / 2 phase shifter 220 (e.g., real terms in different branches of the optical circuit) JPEG2025508560000021.jpg55 and the imaginary term JPEG2025508560000022.jpg55) can be encoded into the optical signal using either a current / voltage driven phase shifter 221 utilizing thermal effects, plasma dispersion effects, Franz-Keldysh effect, or electroabsorption effects, or a delay line 222, or a combination of both.

[0045] Multiplication of complex numbers or their components that have already been encoded into an optical signal can be performed in the optical domain by simply cascading the photonic elements representing the numbers in series at branch 231 of the optical circuit.

[0046] The polarity or sign of the complex number (or its components) can be encoded into the optical signal by imparting a fixed phase shift of π by a phase shifter 240 using, for example, one or more of a thermal phase shifter 241, a carrier depletion phase shifter 242, or an electroabsorption phase shifter 243. The phase shifter may be a phase switch.

[0047] The absolute value or modulus of the complex number (or its components) can be encoded into the optical signal by an intensity modulator 250, such as a microring resonator (MRR) 251, a Mach-Zehnder interferometer (MZI) operating in push-pull mode 252, an electroabsorption modulator (EAM), or a directly intensity modulated laser (DIML) 253.

[0048] The devices described above and shown in Figure 2 can be realized using silicon photonics and / or III-V photonics. Using these devices in combination, some or all of the terms in Equations 1a-2b can be encoded into an optical signal using a photonic integrated circuit (also referred to herein as a PIC architecture, an encoder, or an electro-optical encoder).

[0049] Additionally, the PIC architecture is modularized in the following ways: Complete Complex Coding Using Photonics Encoding signed real and imaginary components of complex numbers and their addition in photonics Encoding unsigned real and imaginary components of complex numbers and their addition in photonics

[0050] Encoding complex numbers into Cartesian coordinates using photonics Complex numbers expressed in Cartesian (rectangular) coordinates are coded in the optical domain by separately encoding the coded real term and the coded imaginary term of the complex number and then adding them together.

[0051] In all diagrams showing the coding circuits, the propagation of the optical signal is from left to right.

[0052] FIG. 3A illustrates a complex-numbered hologram in the optical domain by modulating and combining input optical signals to form an optical output signal. 1 is a schematic diagram showing a process 30 for encoding JPEG2025508560000023.jpg33.

[0053] A first optical input signal 331 is received at a first serial branch 311 of the optical circuit and a second optical input signal 332 is simultaneously received at a second serial branch 312 of the optical circuit. In a first step S301, the first input signal 331 is a complex number 1st component of JPEG2025508560000024.jpg33 JPEG2025508560000025.jpg55 absolute value In a second step S302, the first amplitude modulated signal 361 is polarity (or sign) coded to generate a first intermediate signal 362. In a third step S303, the second input signal 332 is a complex number 2nd component of JPEG2025508560000027.jpg33 JPEG2025508560000028.jpg55 absolute value In a fourth step S304, the second amplitude modulated signal is polarity or sign coded to generate a second intermediate signal 364. In a fifth step S305, the second intermediate signal 364 is phase shift coded to generate a phase shifted signal 365, which is in quadrature with the first intermediate signal 362. In a sixth step S306, the first intermediate signal 362 and the phase shifted signal 365 are added to generate the output signal 333.

[0054] The output signal 333 is a complex number of the form shown in Equation 1a. The first amplitude modulated signal 361 is encoded as JPEG2025508560000030.jpg33. The first amplitude modulated signal 361 is a complex unsigned real component JPEG2025508560000031.jpg45 represents a complex number Real part of JPEG2025508560000032.jpg33 The first intermediate signal 362 constitutes the absolute value of JPEG2025508560000033.jpg55. Real part (or component) of JPEG2025508560000034.jpg33 Real numbers [with sign (+ or -)] that make up JPEG2025508560000035.jpg55 JPEG2025508560000036.jpg36 or The second amplitude modulation signal 363 represents the complex number Imaginary part of JPEG2025508560000038.jpg33 Unsigned imaginary part of the modulus (absolute value) of JPEG2025508560000039.jpg55 The second intermediate signal 364 represents the complex number Imaginary part of JPEG2025508560000041.jpg33 Real numbers [signed (+ or -)] that make up JPEG2025508560000042.jpg55 JPEG2025508560000043.jpg46 or JPEG2025508560000044.jpg44. The phase shift signal 365 represents the imaginary part JPEG2025508560000045.jpg55 multiplied by an indefinite value j. JPEG2025508560000046.jpg519 (i.e., j is a complex number whose square is -1).

[0055] In mathematical terms, the absolute values ​​of the real and imaginary terms are multiplied by the sign of the real and imaginary terms, respectively. The relative argument of the real and imaginary terms, (2n-1)π / 2, is offset by (2n-1)π / 2, where n is an integer. The real and imaginary terms are then added together to form a complex number.

[0056] The first input signal 331 and the second input signal 332 are coherent. This allows the output signal 333 to be expressed as a complex number It can be encoded exactly as JPEG2025508560000047.jpg33.

[0057] Although FIG. 3a shows the first and third steps S301, S303 occurring before the second and fourth steps S302, S304, respectively, the order of these steps may be reversed such that the sign is coded before the absolute value in either or both of the first and second serial branches 311, 312.

[0058] Complex numbers Real part of JPEG2025508560000048.jpg33 JPEG2025508560000049.jpg55 and imaginary part Since both JPEG2025508560000050.jpg55 can be positive, the third and fourth steps S303 and S304 are optional. JPEG2025508560000051.jpg55 and the imaginary part If JPEG2025508560000052.jpg55 is a positive value, then in the second and fourth steps S302, S304 no further modulation of the first and second amplitude modulated signals 361, 363 is necessary and therefore these steps become redundant. As will be explained below with reference to Figure 3b, one suitable way to achieve such an arbitrary modulation of the sign of the signal is to use a phase switch.

[0059] Although the fifth step S305 is shown as occurring in the second series branch 312, this step could instead occur in the first series branch 311, or alternatively occur partly in the first series branch 311 and partly in the second series branch 312. The purpose of the fifth step S305 is to provide orthogonality (e.g. in the complex domain of FIG. 1a) between the signals emerging from the first and second series branches 311, 312. That is, the fifth step S305 involves imparting a phase difference of (2n-1)π / 2 between the signals of the first and second series branches 311, 312 before they are added together. This could occur in the second series branch 312 by adding a phase shift of, for example, (2n-1)π / 2 on the second intermediate signal, or in the first series branch 311 by adding a phase shift of, for example, -(2n-1)π / 2 on the first intermediate signal. Alternatively, the fifth step S305 may occur by adding a phase shift of, for example, -(2n-1)π / 4 on the first intermediate signal and a phase shift of, for example, (2n-1)π / 4 on the second intermediate signal, such that the total phase shift between the first and second series branches 311, 312 is (2n-1)π / 2.

[0060] Additionally, although the fifth step S305 is shown as occurring between the fourth step S304 and the sixth step S306, the fifth step S305 may be performed at any stage prior to the sixth step S306, for example the fifth step S305 may be performed in the first series branch 311 prior to the first step S301, or in the second series branch 312 between the second step S302 and the fourth step S304. The reader will appreciate that the nomenclature of first, second, etc., when used in reference to steps, is a convenient denotation convention, but is not necessarily limiting as to when steps may be performed relative to one another.

[0061] Furthermore, the orthogonality (provided by a phase shift of (2n-1)π / 2) radians) is However, if the angle between the axes in the complex domain is greater than zero and less than π (as explained earlier with reference to a distorted version of the Argand diagram where the angle between the real and imaginary axes is greater than zero and less than π radians), then the complex number It is possible to encode JPEG2025508560000054.jpg33. The complex number encoded in this way Finding the correct coordinate system for the real and imaginary axes is more difficult than if an orthogonal relationship existed between the real and imaginary axes, because corrections, usually involving applying a scale factor between the two axes, must be made and the new angular relationship between the axes in the chosen (non-conventional) complex plane must be taken into account.

[0062] The method of Figure 3a may be implemented in an exemplary encoder 300 shown in Figure 3b. The encoder includes a first series branch 321 and a second series branch 322. The first series branch 321 includes a first intensity modulator 351 and a first phase switch 341. The second series branch 322 includes a second intensity modulator 352 and a second phase switch 342. The encoder includes a first output from the first series branch 321. JPEG2025508560000056.jpg55 and the second output from the second serial branch 322 JPEG2025508560000057.jpg55 is combined to get a complex number The second serial branch 322 further includes a coupler 310 arranged to generate an optical signal encoded with JPEG2025508560000058.jpg33. The second serial branch 322 phase-shift encodes the second output to generate a phase-shifted signal It may further include a phase shifter 320 arranged to generate JPEG2025508560000059.jpg44, the first output and the second output being in quadrature.

[0063] In the encoder 300 of Fig. 3b, the first and third steps S301, S303 (from Fig. 3a) are performed by the first and second intensity modulators 351, 352, respectively. The second and fourth steps S302, S304 are performed by the first and second phase switches 341, 342, respectively. The fifth step S305 is performed by the phase shifter 320 and the sixth step S306 is performed by the combiner 310. The processed and generated signals are as described with reference to Fig. 3a. As will be appreciated by those skilled in the art, all the described variations of the method of Fig. 3a are possible by placing the first and second intensity modulators 351, 352, the first and second phase switches 341, 342 and the phase shifter 320 in different positions in the first and second series branches 311, 312 to realize the various methods described herein in relation to Fig. 3a. For example, the order of the first intensity modulator 351 and the first phase switch 341, or the second intensity modulator 352 and the second phase switch 342, can be reversed, and / or a phase shifter 320 can be incorporated into either the first and second series branches 321, 322, either as a stand-alone component or as a component incorporated into one or more of the first intensity modulator 351, the second intensity modulator 352, the first phase switch 341, or the second phase switch 342. As with any of the photonic components described herein for encoding an optical signal, the first intensity modulator 351, the second intensity modulator 352, the first phase switch 341, or the second phase switch 342 may more generally be described as modulators.

[0064] The encoder 300 of Fig. 3b may be passive in the sense that the first and second intensity modulators do not receive control signals and are instead configured to apply a fixed intensity modulation to the first and second input signals 331, 332, respectively. Similarly, the first and second phase switches 341, 342 may be passive in the sense that they do not receive control signals and apply a fixed phase shift (or no phase shift) to the first and second input signals 331, 332. Similarly, the π / 2 phase shifter 320 is passive, does not receive any control signals and does not apply any phase shift to the first and / or second input signals 331, 332.

[0065] A passive encoder can generate the same complex number 4a, it may be useful to provide an active encoder that can code any given complex element into an optical signal based on a received digital electronic signal that carries information based on the value of the complex element. With an active encoder, the first and / or second intensity modulators 351, 352 and the first and second phase switches 341, 342 encode different absolute values ​​and signs into the first and second input signals 331, 332, thereby forming a complex number Real component of JPEG2025508560000061.jpg33 JPEG2025508560000062.jpg55 and the imaginary component The pixel data can be addressable to provide different amplitude and phase modulation to encode JPEG2025508560000063.jpg55 to have different values.

[0066] Figure 4a shows the encoder 300 of Figure 3b as part of a system 400 that includes a controller 460. The controller 460 receives the digital electronic signals and controls the components 351, 341, 352, 342 of the encoder based on the values ​​of the digital electronic signals 461, 462, 463, 464, thereby generating a complex number encoded in the optical signal output 430 from the encoder. It is positioned to control the value of JPEG2025508560000064.jpg33.

[0067] The digital word contains the sign and absolute value of the real or imaginary components of the complex number, or the sign and absolute value of both the real and imaginary components, which forms the complete complex number. The received digital signals of all the encoders described herein are segments of this digital word. The controller generates PAMx, NRZ, DC, or any combination of these signals to control the encoder components 351, 341, 352, 342. The controller can do this by generating PAMx, NRZ, or DC analog electronic signals based on the received digital data (i.e., segments of the digital word) and feeding the analog electronic signals to the modulator. The PAMx, NRZ, and DC signals can be described as quantified analog signals.

[0068] Thus, the controller 460 is configured to provide: based on the value of the first digital electronic signal, a first electronic signal 461 via at least one first line 401 to the first intensity modulator 351; based on the value of the second digital electronic signal, a second electronic signal 462 via at least one second line 402 to the first phase switch 341; based on the value of the third digital electronic signal, a third electronic signal 463 via at least one third line 403 to the second intensity modulator 352; based on the value of the fourth digital electronic signal, a fourth electronic signal 464 via at least one fourth line 404 to the second phase switch 342. Optionally, the controller 460 can provide a DC electronic signal 465 via at least one fifth line 405 to the phase shifter 320. Alternatively, no signal is provided to the phase shifter 320, and instead passive components (such as the (phase) delay line 222) are used.

[0069] The first and third electronic signals 461, 463 are PAMx (Pulse Amplitude Modulation) signals, where x is 2 or more (i.e., 4-level PAM (PAM4) or more). That is, the first and third electronic signals 461, 463 are multi-bit signals. PAMx signals are unipolar signals. The larger the value of x, the higher the resolution of the first and second intensity modulators 351, 352, and the higher the complex number 1st component of JPEG2025508560000065.jpg33 JPEG2025508560000066.jpg55 and its second component The coding precision of the absolute value of JPEG2025508560000067.jpg55 is improved.

[0070] The second and fourth electronic signals 462, 464 are non-return-to-zero (NRZ) signals (PAMx signals, x equals 2). That is, the second and fourth electronic signals 462, 464 are single-bit or binary signals because the first and second phase switches 341, 342 only need to toggle between two possible states. Each of the first and second phase switches 341, 342 is configured to add a phase of 2nπ when the sign of the respective coded component is positive and to add a phase of (2n-1)π when the sign of the respective coded component is negative, where n is an integer. That is, each of the first and second phase switches 341, 342 adds a phase of zero or an even number of π when coding a positive value and adds a phase of an odd number of π when coding a positive value. Although not ideal, it is possible to encode positive and negative signals using other summed phase values, as long as the difference between the phase used to encode positive values ​​and the phase used to encode negative values ​​is π. Such a system will shift the overall output in terms of phase. If such a phase shift is undesirable, a phase compensator can be added elsewhere in the circuit to ensure that the positive-coded signal is in phase with the input signal.

[0071] The format of the signals that control photonic devices can be summarized as follows: ○ The absolute values ​​(both real and imaginary terms) are multi-bit signals derived from the received digital data (such as an analog PAMx signal quantified to have levels of x, where x=2 N , N is the bit precision of the system). o The polarity (both real and imaginary terms) is modulated based on a binary signal derived from the received digital data (such as an analog NRZ signal quantized to have only two levels). o The quadrature argument offset between the real and imaginary terms is controlled using a variable DC / voltage line that does not necessarily (although in some cases it may) depend on the received digital data.

[0072] The method of Fig. 3a can be implemented using any one of the encoders 411, 412, 413, 414, 415, 416 shown in Fig. 4b-4g, which are more specific examples of the encoder 300 shown in Fig. 3b. Each of the encoders 411, 412, 413, 414, 415, 416 of Fig. 4b-4g is configured to perform the method 30 described with reference to Fig. 3a. Each of the encoders 411, 412, 413, 414, 415, 416 of Fig. 4b-4g can be connected to a controller 460 to provide electronic signals to the optical (photonic) components 320, 341, 342, 351, 352 based on the received digital electronic signals 461, 462, 463, 464, 465, similar to that described with reference to Fig. 4a.

[0073] The encoder 411 of FIG. 4b encodes the real component of a complex number. JPEG2025508560000068.jpg55 and the imaginary component JPEG2025508560000069.jpg shows the use of a microring resonator (MRR) 251 as an intensity modulator 451, 452 to encode both the absolute value or modulus of the 55. A carrier depletion phase shifter 242 is used as a phase switch 441, 442 to encode the real component. JPEG2025508560000070.jpg55 and the imaginary component JPEG2025508560000071.jpg55. The phase separation between the first series branch 311 and the second series branch 312 is performed by a thermal phase shifter 221 used as a phase switch 420 to phase shift the imaginary component by π / 2. The Y branch 211 or the 2x1 MMI 212 (not shown) phase shifts the real component JPEG2025508560000072.jpg55 and the imaginary component It functions as a combiner 410 that adds JPEG2025508560000073.jpg55.

[0074] Similarly, the encoder 412 of FIG. 4C converts the real component of a complex number into JPEG2025508560000074.jpg55 and the imaginary component JPEG2025508560000075.jpg55 shows the use of the MRR 251 as an intensity modulator 451, 452 to encode both the absolute value or modulus of the real component. The thermal phase shifter 241 is used as a phase switch 443, 444 to encode both the absolute value or modulus of the real component. JPEG2025508560000076.jpg55 and the imaginary component JPEG2025508560000077.jpg55. In this case, one of the phase switches 444 also functions to shift the phase of the imaginary component by π / 2, so the controller 460 sends a DC signal superimposed on the NRZ signal to control the phase switch. The Y-branch 211 or the 2x1 MMI 212 shifts the real component JPEG2025508560000078.jpg55 and the imaginary component It functions as a combiner 410 that adds JPEG2025508560000079.jpg55.

[0075] The encoder 413 in FIG. JPEG2025508560000080.jpg55 and the imaginary component JPEG2025508560000081.jpg shows the use of the MZI 252 as an intensity modulator 453, 454 to encode both the absolute value or modulus of the 55. The carrier depletion phase shifter 242 is used as a phase switch 441, 442 to encode the real component JPEG2025508560000082.jpg55 and the imaginary component JPEG2025508560000083.jpg55. The phase separation between the first series branch 311 and the second series branch 312 is performed by a thermal phase shifter 221 used as a phase switch 420 to phase shift the imaginary component by π / 2. The Y branch 211 or the 2x1 MMI 212 (not shown) phase shifts the real component JPEG2025508560000084.jpg55 and the imaginary component It functions as a combiner 410 that adds JPEG2025508560000085.jpg55.

[0076] Similarly, the encoder 414 of FIG. JPEG2025508560000086.jpg55 and the imaginary component JPEG2025508560000087.jpg shows the use of the MZI 252 as an intensity modulator 453, 454 to encode both the absolute value or modulus of the 55. The thermal phase shifter 241 is used as a phase switch 443, 444 to encode the real component. JPEG2025508560000088.jpg55 and the imaginary component JPEG2025508560000089.jpg55. One of the phase switches 444 is also used to phase shift the imaginary component by π / 2 by applying a DC+NRZ signal, as described with reference to FIG. 4c. The Y-branch 211 or 2×1 MMI 212 (not shown) phase shifts the real component JPEG2025508560000090.jpg55 and the imaginary component It functions as a combiner 410 that adds JPEG2025508560000091.jpg55.

[0077] The encoder 415 of FIG. 4f encodes the real component of a complex number. JPEG2025508560000092.jpg55 and the imaginary component JPEG2025508560000093.jpg shows the use of the DIML 253 as an intensity modulator 455, 456 to encode both the absolute value or modulus of the real component 55. The electro-absorption phase shifter 243 is used as a phase switch 445, 446 to switch the real component 55. JPEG2025508560000094.jpg55 and the imaginary component JPEG2025508560000095.jpg55. The delay line 222 is used as a phase shifter 421 to phase shift the imaginary component by π / 2. The Y-branch 211 or 2x1 MMI 212 (not shown) encodes the polarity (or sign) of the real component. JPEG2025508560000096.jpg55 and the imaginary component It functions as a combiner 410 that adds JPEG2025508560000097.jpg55.

[0078] Similarly, the encoder 416 of FIG. 4g encodes the real component of a complex number JPEG2025508560000098.jpg55 and the imaginary component JPEG2025508560000099.jpg shows the use of the DIML 253 as an intensity modulator 455, 456 to encode both the absolute value or modulus of the real component 55. The electro-absorption phase shifter 243 is used as a phase switch 445, 447 to encode both the absolute value or modulus of the real component 55. JPEG2025508560000100.jpg55 and the imaginary component JPEG2025508560000101.jpg55. One of the phase shifters 447 is also used to phase shift the imaginary component by π / 2 by applying a DC+NRZ signal, as described with reference to FIG. 4c. The Y-branch 211 or 2×1 MMI 212 (not shown) phase shifts the real component JPEG2025508560000102.jpg55 and the imaginary component It functions as a combiner 410 that adds JPEG2025508560000103.jpg55.

[0079] In Figures 4f and 4g, the DIML is phase-locked to another master laser (not shown) to lock the phase of the DIML to that of the master laser, so that the light in both arms encoding the real and imaginary terms has the same phase.

[0080] Encoding signed real and imaginary components of complex numbers using photonics It is sometimes useful to code only parts (i.e. components) of a complex number. For example, the real and imaginary components of a complex number can be coded separately. This is useful when performing mathematical operations on complex numbers, since operations can be performed independently on the components of the complex number.

[0081] FIG. 5a shows an encoder 500 that is identical in structure, function and operation to the first serial branch 311 of the system shown in FIG. 4a. The encoder 500 of FIG. 5a is Real component of JPEG2025508560000104.jpg33 JPEG2025508560000105.jpg55 or imaginary component JPEG2025508560000106.jpg55 into a first input signal 331. The encoder 500 shown in Fig. 5a includes a first intensity modulator 351 and a first phase switch 341 arranged in series, as described with reference to Fig. 4a. The encoder 500 also includes a controller 460 arranged to receive the first and second digital electronic signals and to apply a first electronic signal 461 and a second electronic signal 462 to the first intensity modulator 351 and the first phase switch 341, respectively, as described with reference to Fig. 4a.

[0082] The encoders 511, 512, 513, 514, 515 shown in Figures 5b-5f are an example of the encoder 500 of Figure 5a. Each of the encoders 511, 512, 513, 514, 515 of Figures 5b-5f is configured to perform the first and second steps S301, S302 as described with reference to Figure 3a. Each of the encoders 511, 512, 513, 514, 515 of Figures 5b-5f can be connected to a controller 460 to provide electronic signals to optical (photonic) components in a similar manner as described with reference to Figures 4a and 5a.

[0083] Figure 5b shows the real component of a complex number. JPEG2025508560000107.jpg55 or imaginary component JPEG2025508560000108.jpg55 shows an encoder 511 including an intensity modulator 451, specifically an MRR 251, configured to encode the absolute value or modulus of the real component JPEG2025508560000109.jpg55 or imaginary component JPEG2025508560000110.jpg55 is connected in series with a carrier depletion phase shifter 242 which is used as a phase switch 441 to encode the polarity (or sign) of the signal.

[0084] Figure 5C shows the real component of a complex number. JPEG2025508560000111.jpg55 or imaginary component JPEG2025508560000112.jpg55 shows an encoder 512 including an intensity modulator 451, specifically an MRR 251, configured to encode the absolute value or modulus of the real component JPEG2025508560000113.jpg55 or imaginary component JPEG2025508560000114.jpg55 is connected in series with a thermal phase shifter 241 which is used as a phase switch 443 to encode the polarity (or sign) of the signal.

[0085] Figure 5d shows the real component of a complex number. JPEG2025508560000115.jpg55 or imaginary component JPEG2025508560000116.jpg55 shows an encoder 513 including an intensity modulator 453, specifically an MZI 252, configured to encode the absolute value or modulus of the real component JPEG2025508560000117.jpg55 or imaginary component JPEG2025508560000118.jpg55 is connected in series with a carrier depletion phase shifter 242 which is used as a phase switch 441 to encode the polarity (or sign) of the signal.

[0086] Figure 5e shows the real component of a complex number. JPEG2025508560000119.jpg55 or imaginary component JPEG2025508560000120.jpg55 is shown to include an encoder 514 including an intensity modulator 453, specifically an MZI 252, configured to encode the absolute value or modulus of the real component JPEG2025508560000121.jpg55 or imaginary component JPEG2025508560000122.jpg55 is connected in series with a thermal phase shifter 241 which is used as a phase switch 443 to encode the polarity (or sign) of the signal.

[0087] Figure 5f shows the real component of a complex number. JPEG2025508560000123.jpg55 or imaginary component JPEG2025508560000124.jpg55 shows an encoder 515 including an intensity modulator 455, specifically a DIML253, for encoding the absolute value or modulus of the real component JPEG2025508560000125.jpg55 or imaginary component JPEG2025508560000126.jpg55 is connected in series with an electro-absorption phase shifter 243 which is used as a phase switch 445 to encode the polarity (or sign) of the signal.

[0088] Encoding unsigned real and imaginary components of complex numbers using photonics 5a to 5f show the real component of a complex number including its polarity or sign. JPEG2025508560000127.jpg55 or imaginary component 2 shows an encoder arranged to encode JPEG2025508560000128.jpg55, but with the unsigned real component by encoding the absolute value of the component using only the intensity modulator 250 (without using phase shifters and / or phase switches 220, 240). JPEG2025508560000129.jpg55 or imaginary component It is also possible to encode the image JPEG2025508560000130.jpg55. Suitable intensity modulators 250 are shown in Figures 5b-5f and include an MRR 251, an MZI 252 operating in push-pull mode, a DIML 253, including a surface-emitting DIML such as a vertical cavity surface-emitting laser, a microdisk laser, a distributed feedback laser, or a laser with a multi-sectional sampled grating distributed Bragg reflector.

[0089] Encoding complex numbers in polar coordinates using photonics. Complex numbers represented in polar coordinates can be encoded in the optical domain by simultaneously modulating the magnitude and phase of the input signal, exploiting the physics of the encoding circuit. Figure 6a shows how a complex number can be encoded in this way. 6 is a schematic diagram of an encoder 600 configured to encode JPEG2025508560000131.jpg33. The encoder 600 provides electronic signals 661, 662 to the optical (photonic) components of the encoder 600, which convert the optical input signal into a complex number in polar form. The electronic signal includes a controller 660 arranged to encode the image data in the form JPEG2025508560000132.jpg33. JPEG2025508560000133.jpg is based on a digital signal carrying data representing 33 components.

[0090] The optical portion of the encoder 600 is in the form of an MZI, a first branch 611 of which includes a first phase shifter 641 and a second branch 612 of which includes a second phase shifter 642. The input channel 630 is operatively connected to a splitter 605, which is operatively connected to inputs of the first and second branches 631, 632 of the MZI 252. The outputs of the first and second branches 633, 634 are operatively connected to a combiner 610, which is operatively connected to an output line 635. A controller 660 is connected to the first phase shifter 641 via at least one first line 601 and to the second phase shifter 642 via at least one second line 602.

[0091] In operation, an optical input signal is provided via an input channel 630, which is split by a splitter 605 into a first and a second branch 631, 632 of the MZI 252. A controller 660 provides at least one first electronic signal 661 to a first phase shifter 641 via at least one first line 601 and at least one second electronic signal 662 to a second phase shifter 642 via at least one second line 602. The at least one first electronic signal and the at least one second electronic signal are each based on at least one value of the first and second digital electronic signals received by the controller. The digital data received by the controller is calibrated against (or obtained from) a digital look-up table. The digital look-up table contains the data words necessary for the accurate encoding of complex numbers, more specifically the encoding of phase and absolute value in polar coordinates. In this way, the controller provides the phase shifters with the first and second electronic signals necessary to accurately represent a given complex number. The first and second phase shifters 641, 642 introduce independent phase shifts in the first and second branches 611, 612 of the MZI 252, for example by exploiting plasma dispersion effects, Franz-Keldysh effects, electroabsorption effects, or thermal effects, respectively. The outputs from the first and second branches 633, 634 are then combined by a combiner 610 (Y-branch 211 or 2x1 MMI 212) to produce a complex number represented in polar form, i.e., in the form of Equation 1b: It provides an optical signal encoded in JPEG2025508560000134.jpg33.

[0092] More specifically, the amplitude and phase of the optical signal at the combiner 610 is controlled by controlling the phase shifts (φ1), (φ2) at the first and second phase shifters 641, 642 relative to the phase at the splitter 605. Figures 6d and 6e show graphs of the normalized intensity (magnitude, absolute value) change and phase at the combiner 610 relative to the input optical signal as a function of the independent relative phase shifts (φ1), (φ2) at the first phase shifter 641 and the second phase shifter 642, respectively. The information represented by these graphs can alternatively take the form of a look-up table. Electronic signals 661 and 662 driving the first and second phase shifters 641 and 642 are provided such that the phase at each branch of the MZI is modulated such that the intensity and phase of the optical signal at the combiner 610 form an accurate optical representation of the mathematical equivalent of each of the complex numbers encoded in the digital electronic signals received at the controller (and consequently the electronic signals provided to the phase shifters). The look-up table knows the phase shifts (φ1), (φ2) in the first and second phase shifters 641, 642 as a function of the voltage or current of the photonic device, and the controller supplies electronic signals sufficient to provide the required phase shifts in the first and second phase shifters 641, 642.

[0093] More specifically, a first lookup table (or function or graph) contains master data of phase and magnitude (of the output signal at the combiner 610) as a function of phase perturbation in both arms of the MZI. The native digital data (complex number-magnitude and argument) is checked against the first lookup table or equivalent phase and magnitude graphs of Fig. 6d and Fig. 6e to ascertain the required phase perturbation in MZI arms 1 and 2, respectively. A second lookup table (or function or graph) containing the voltage and / or current data required to drive the phase shifter to apply the required phase shift is then used to obtain the exact digital data used by the controller for analog conversion and then sending electronic signals to the phase shifter to encode the complex number into the optical input signal.

[0094] In the encoder 600 of FIG. 6a, the first and second electronic signals 661, 662 are both PAMx signals, where x is greater than 2 (in other words, the first and second electronic signals 661, 662 are multi-bit signals).

[0095] Figures 6b and 6c show an example of the encoder 600 described with reference to Figure 6a, where the splitter 605 and the combiner 610 are both Y-branch 211. In Figure 6b, phase shifters 643, 644 are both carrier-depleted phase shifters 242, and in Figure 6c, phase shifters 645, 646 are both thermal phase shifters 241.

[0096] In the alternative arrangement described with reference to FIG. 6a, complex numbers expressed in polar coordinates JPEG2025508560000135.jpg33 can be encoded in the optical domain by separately modulating the absolute value and phase of the input optical signal in a single serial branch, thereby effectively multiplying the absolute and phase values. Such a method can be implemented using the systems of Figures 5a-5f, but with a phase shifter instead of a phase switch, and the second electronic signal 462 is (or is based on) a PAMx signal (i.e., a multi-bit signal) where x is greater than 2, so that a range of argument values ​​can be encoded into the optical input signal. That is, the photonic device modulates a multi-bit signal (such as PAMx, where x=2 N , N is the bit precision of the system).

[0097] The controller described with reference to Figures 4a-4g, 5a-5f and 6a-6c may include multiple sub-controllers, such that each modulator receives a signal from a separate sub-controller. Each sub-controller is arranged to receive a digital electronic signal and control the modulator based on the value of the digital electronic signal to apply a respective element of modulation such that the modulator is operable to encode a complex element into the optical signal. Examples of such sub-controllers are described with reference to Figures 15, 16 and 17.

[0098] Encoding in this manner improves (e.g., is more efficient, more streamlined) digital data entry and allows for faster / more efficient encoding of input streams / optical signals by complex elements. Photonic integrated circuits employing such encoders are better suited for interfacing with external electronic components, such as computer processors and memories.

[0099] Performing mathematical operations on complex numbers encoded in optical signals A method is provided for performing mathematical operations (eg, arithmetic) on complex numbers using photonics.

[0100] Complex multiplication Multiplication of complex elements (complex numbers or components of a complex number) can be performed by cascading encoders that represent each of the multiplicands successively in series. For example, FIG. 7a shows a first encoder 711 and a second encoder 712 connected in series such that the optical output signal from the first encoder 711 forms the input to the second encoder 712. The first and second encoders 711, 712 may be any of the encoders described in this disclosure. In FIG. 7a, the first and second encoders 711, 712 each take the form of an encoder as described with reference to FIG. 4b. In FIG. 7a, the first encoder 711 represents a first complex number The second encoder 712 is configured to encode JPEG2025508560000136.jpg412 into the optical input signal to provide a first encoded optical signal. The output of the first encoder 711 is connected to an input of a second encoder 712 via a connection branch 730, such that the optical signal input to the second encoder 712 is a first complex number The optical output signal 731 from the second encoder 712 is a first complex number and a second complex number JPEG2025508560000139.jpgThe third complex number that is a multiple of 411 JPEG2025508560000140.jpg414. Using the principle of Fig. 7a, it is also possible to multiply a first complex number by a second complex number by feeding an optical signal already coded with a first complex element (by whatever means, for example via the output of an OFT stage) to the input of an encoder configured to code the second complex number.

[0101] Complex addition Addition of complex elements can be performed by placing encoders representing each of the multiplicands in parallel. For example, FIG. 7b shows a first encoder 713 and a second encoder 714 connected in parallel. An optical input signal is input to a Y-branch which acts as a splitter 710 to provide an optical input to the first encoder 713 and an identical optical input to the second encoder 714. The first and second encoders 713, 714 can be any of the encoders described in this disclosure. In FIG. 7b, the first and second encoders 713, 714 each take the form of an encoder as described with reference to FIG. 4b. In FIG. 7b, the first encoder 713 outputs a first complex number The second encoder 714 is configured to encode JPEG2025508560000141.jpg412 into the optical input signal to provide a first coded optical signal. The Y-branch 211 is configured to encode JPEG2025508560000142.jpg412 into an optical signal and provide a second encoded optical signal. The Y-branch 211 functions as a combiner 715 that combines the output of the first encoder 713 with the output of the second encoder 714, and the optical output signal 732 output from the combiner 715 is a first and second complex number JPEG2025508560000143.jpgThe third complex number, which is the sum of 411 JPEG2025508560000144.jpg419. Using the principle of Figure 7b, it is also possible to add a first complex element and a second complex element by inputting an optical signal already coded (by whatever means) with a first complex element and an optical signal already coded (by whatever means) with a second complex element into a combiner.

[0102] Detecting Complex Numbers with Photonics Any of the methods and apparatus described herein provide a method for detecting a complex number or a component of a complex number from a characteristic of an optical signal previously coded with a complex number (or a component of a complex number), which may include detecting a second complex number or a component of a complex number from a characteristic of an optical signal previously coded with a first complex number (or a component of a complex number) and modified to perform a mathematical (e.g., arithmetic, OFT or convolution) operation on the first complex number to generate the second complex number.

[0103] Decoding the absolute value or modulus of a complex number encoded in an optical signal An intensity detector, such as a photodiode, can be used to natively detect the absolute value or modulus of the complex number encoded in the optical signal by detecting the amplitude of the optical signal.

[0104] Decoding real or imaginary components of a complex number Homodyne detection using a balanced detector can be used to natively decode real or imaginary numbers (i.e. real or imaginary components of a complex number, including its modulus and sign) encoded in an optical signal. A schematic diagram of a balanced detector 800 configured for such decoding is shown in FIG. 8a. The balanced detector 800 comprises a first input branch consisting of a reference line 801 having a reference input and a second input branch consisting of a signal line 802 having a signal input coupled to an input of an interferometer 810, in particular a 2x2 MMI. The interferometer has two output branches 803, each having a photodetector 804 contained therein, in particular two balanced photodetectors connected to receive the output 803 from the interferometer 810. The output 805 from the balanced photodetector 804 is the difference of the photocurrents from each of the constituent photodetectors forming the balanced photodetector. The reference line includes a (e.g. variable) phase shifter 806. The reference line is arranged to receive a signal based on the input optical signal to the encoder as a source.

[0105] A complete complex number can be decoded from the optical signal by performing two detections (or measurements) with a balanced detector, one to decode the real part of the complex number and one to decode the imaginary part, by appropriately adjusting the phase shifter 806 (e.g., a thermal heater or a delay line). The real part of the complex number is decoded from the optical signal by selecting the reference input to the balanced detector to be in phase with the light used to encode the real part. The imaginary part of the complex number is decoded if the phase of the reference input to the balanced detector is selected to be in phase with the light used to encode the imaginary part. The complete complex number in Cartesian coordinates (Cartesian form) is restored by adding the decoded real and imaginary parts. For polar coordinates, the absolute value and argument are calculated digitally from the real and imaginary terms using Equations 3a and 3b, respectively. JPEG2025508560000145.jpg430 (Formula 3a) JPEG2025508560000146.jpg434 (Formula 3b)

[0106] Decoding complex numbers encoded in optical signals To natively detect the complex numbers encoded in the optical signal, two balanced detectors and a π / 2 (90 degree) optical hybrid can be used. Figure 8b shows such an arrangement. In Figure 8b, a decoder circuit 850 includes a first balanced detector 851 configured to decode the real part of the complex number and a second balanced detector 852 configured to decode the imaginary part of the complex number. The first and second balanced detectors 851, 852 are each substantially similar in structure, function and operation to the balanced detector 800 described with reference to Figure 8a.

[0107] 8b shows a reference branch 860 split into a first input branch 861 and a second input branch 862, and a signal branch 865 split into a third input branch 863 and a fourth input branch 864. The first and third input branches 861, 863 serve as reference and signal inputs 871, 872, respectively, to a first balanced detector 851. The second and fourth branches 862, 864 serve as reference and signal inputs 873, 874, respectively, to a second balanced detector 852. The first input branch 861 includes a first phase shifter 891 and the second input branch 862 includes a second phase shifter 892.

[0108] In operation, the encoded optical signal (encoded with a full complex number) is input into the signal branch 865, and at the same time a reference (reference) input signal is input into the reference branch 860. The reference input signals 861 and 862 are selected to be in phase with the light used to encode the real and imaginary parts of the complex number, respectively, when the complex number is encoded into the optical signal. The first and second phase shifters 891, 892 allow the phase of the reference input signals 861, 862 to be adjusted in the first input branch 861 and the second input branch 862, respectively. The first phase shifter 891 is configured such that the signal in the first input branch 861 is in phase with the light encoded with the real part of the complex number. For example, if the encoder 300 described with reference to FIG. 4a is used to encode a complex number, the first reference in the first input branch 861 in the decoder circuit 850 of FIG. 8b is selected to be the same as the signal in the first serial branch 311 of the encoder 300 of FIG. 4a, and the second phase shifter 892 is configured so that the reference in the second input branch 862 is in phase with the signal in the second serial branch 312 after a phase shift (i.e., step S305) that provides orthogonality.

[0109] In other words, a 90 degree optical hybrid splits the reference input signal in two. The imaginary part of the coded complex number is recovered from the coded optical signal using a second balanced detector 852, where the phase of the reference input signal is shifted by π / 2 so that it is in phase with the light used to code the imaginary part. The real part of the coded complex number is recovered from the coded optical signal using a first balanced detector 851, where the phase of the reference input signal is unchanged.

[0110] With reference to Figures 19, 20, 21 and 22, we now describe in detail the electronic decoder circuitry connected to the balanced detector shown in Figures 8a and 8b. Such electronic decoder circuitry converts the optical signal received at the photodetector into a digital electronic signal carrying the complex elements encoded in the optical signal.

[0111] Once the real and imaginary parts of a complex number are decoded, the complete complex number is reconstructed by adding the decoded real and imaginary parts together.

[0112] More generally, a decoder is provided that is arranged to generate a first differential signal based on the output stream of the optical Fourier transform stage and a first reference stream, and to generate a second differential signal based on the output stream and a second reference stream. The output stream is coded with a full complex number (e.g. the aforementioned second complex element). The decoder is also arranged to detect at least one first characteristic of the first differential signal, to detect at least one second characteristic of the second differential signal, to output a first digital electronic signal coded with a first component of the second complex number based on the at least one first characteristic, and to output a second digital electronic signal coded with a second component of the full complex number based on the at least one second characteristic. The at least one characteristic may be phase and / or amplitude.

[0113] The decoder comprises at least one balanced detector, e.g., a first and a second balanced detector, where the first balanced detector is configured to receive the output stream and a first reference stream, and the second balanced detector is configured to receive the output stream and a second reference stream, where the phase difference between the first reference stream and the second reference stream is nπ / 2, where n is an odd integer.

[0114] The first digital signal is a first segment of a digital word, the first segment representing a real component of a full complex number, the second digital signal is a second segment of the digital word, the second segment representing an imaginary component of the full complex number, and the digital word represents the full complex number.

[0115] Decoding in this manner improves the digital data output, providing faster and more efficient decoding of the output stream, and photonic integrated circuits employing this type of decoder are better suited for interfacing with external electronic components, such as computer processors and memories.

[0116] II - Optical Devices (Photonic Integrated Circuits) Basic Optical Fourier Transform Stage 9a-9d show the characteristics of the optical Fourier transform stage.

[0117] 9a is a schematic diagram of a 2f stage 900. The 2f stage includes a transparent free-space optical block (hereafter "optical block") 901 that houses a Fourier lens 902. The Fourier lens is located one focal length f from each of the input end 903 and output end 904 of the optical block 901. Light incident on the input end 903 undergoes an optical Fourier transformation as it passes through the Fourier lens 902. Thus, the light at the output end 904 of the optical block is the Fourier transform of the light incident on the input end 903.

[0118] FIG. 9b shows a schematic diagram of the 2f stage 900 of FIG. 9a including an array of input waveguides, where a stream of light (i.e., optical signals) enters an optical block 901 after exiting the input waveguides. The light is coupled into the optical block via fiber, the use of grating couplers, or other methods of outcoupling light from the waveguides. The output waveguide focuses the optical output of the 2f stage into the output face of a Fourier lens. In this case, the optical block 901 has prism ends at the input and output ends, where the light first enters the transparent block perpendicular to the optical axis of the Fourier lens, and the light path is bent 90 degrees by internal reflections forming the surfaces of the prism ends to pass through the Fourier lens 902. The output end of the optical block is formed similarly, where the light passing through the Fourier lens 902 is bent 90 degrees towards the input aperture of the output waveguide. The output stream of light is coupled into the output waveguide.

[0119] As shown in Figure 9c, the input ports 905 and output ports 906 (i.e., the exit aperture of the input waveguide and the entrance aperture of the output waveguide, respectively) can be arranged in a 2D array or a 1D array. The term "input port" refers to a terminal of a waveguide located at the beginning of a 2f stage such that an input stream of light leaving the waveguide enters the 2f stage. The term "output port" refers to a terminal of a waveguide located at the end of a 2f stage such that light leaving the 2f stage enters the waveguide as an output stream of light.

[0120] The integrated OFT device of Figure 9d is a guided mode device, so beam quality is irrelevant. For the 2f stage of Figure 9b, the optical block can be equipped with corrective optics such as microlens arrays at each input or output port to ensure that the beam quality allows efficient coupling into the receiving waveguide.

[0121] An example of a 2f stage arrangement using a one-dimensional array of waveguides is given in C. Dragone, 'Efficient N * N star couplers using Fourier optics', J. Light.Technol.3, pp. 479-489, Mar. 1989, doi: 10.1109 / 50.16884. Figure 9d shows an OFTC type 2f stage with a one-dimensional array of input ports and a one-dimensional array of output ports. In such a device, the input ports 905 and output ports 906 are arranged along the circumference of two confocal circles, the radius of which depends on the number of input and output waveguides.

[0122] Optical Fourier transform stage including encoder and decoder In general terms, an optical device according to one embodiment includes a plurality of encoders, each encoder arranged to encode a first complex element into an input stream of light, and a plurality of input ports arranged in a first array. Each input port is arranged to be fed with a corresponding one of the input streams, thereby forming an input function definable based on the value of the first complex element and the position of the corresponding input port in the first array. The input ports are arranged to provide an optical input to an optical Fourier transform stage arranged to perform at least one optical Fourier transform or convolution of the input function. The optical device further includes a plurality of output ports arranged in a second array, each output port arranged to receive a portion of the output of the optical Fourier transform stage, thereby forming an output stream. The optical device also includes a plurality of decoders, each decoder arranged to decode a second complex element from each of the output streams based on at least one characteristic of the respective output stream.

[0123] FIG. 10a is a schematic diagram of a more specific example of such an optical device. The optical device 1000 of FIG. 10a is built around an optical Fourier transform stage 1000 that includes either a two focal length (2f stage) or a four focal length (4f stage) Fourier optics arrangement, the 4f stage arrangement being composed of a first and a second 2f stage. Each 2f stage can take the form of FIG. 9b (2D array of input and output ports) or FIG. 9d (OFTC with 1D array of input and output ports). The optical device can be described as a photonic circuit (or photonic integrated circuit PIC) and may be included as part of a hybrid computer chip that includes both electronic and optical components.

[0124] In general terms, the optical device includes a light source arranged to provide coherent light and a splitter arranged to split the coherent light into multiple input streams. In an embodiment, the light source is a laser light source, for example a solid-state semiconductor laser. However, the embodiments are not limited to laser light sources, and other coherent light sources are envisioned. The optical device is wavelength independent, but the use of monochromatic light for each Fourier transform ensures the fidelity of the optical Fourier transform. It is also possible to use a broadband light source if filtering methods are employed for each Fourier transform.

[0125] In the optical device (or PIC) of FIG. 10a, a solid-state semiconductor laser source 1010 provides coherent light. The laser can be housed off-chip, in which case light is coupled into the PIC (i.e., the remainder of the optical device) using a fiber 1011, and coupled to said fiber via a grating coupler 1012, or a ferrule 1013, or an edge coupler using a V-groove. Alternatively, the optical (e.g., laser) source 1010 can be packaged on the same carrier substrate as the PIC, and light is coupled into the PIC via an edge coupler and / or photonic wire bonds. Alternatively, the optical (e.g., laser) source 1010 can be integrated with the PIC, and light is coupled into the PIC via an edge coupler and taper, with or without photonic wire bonds.

[0126] In the optical device of FIG. 10a, the input coherent light from the light source 1010 is amplified using an optical amplifier 1015 before being split into multiple input waveguides 1025. This is accomplished by splitting the coherent light from a laser off-chip and using a fiber splitter 1021 to couple the laser light into a fiber bundle, or by first coupling the laser light into a single fiber and splitting the light using a cascaded MMI or Y-branch 1022. The input waveguide 1025 is the channel for the input stream and may include, for example, optical fiber or any other optical conduit. When using cascaded MMIs or Y-branch 1022, the input stream comes from the output of the last stack or cascaded 1x2 splitters. The input waveguide 1025 carries the input stream of light split from the light source to the input ports 1005 arranged in the first array.

[0127] FIG. 10a shows a number of optical encoders 1030 (also referred to herein as photonic devices), each optical encoder 1030 arranged in the path of a corresponding one of the input streams. The optical encoders 1030 are arranged to encode a first complex element into the corresponding input stream. An optical encoder 1030 of the type shown in FIG. 4b is shown in FIG. 10a as an example, so that a full complex number in Cartesian form is encoded into each of the input streams. However, the optical encoder 1030 may include any of the encoders described with reference to FIG. 3a, FIG. 3b, FIG. 4a-g, FIG. 5a-f, or FIG. 6a-c. The optical encoder 1030 encodes a complex element (e.g. a complex mathematical number, or a component of a complex mathematical number) into the optical input stream before the input stream enters the optical Fourier transform stage 1001. Optionally, the input stream may pass through an optical circuit, each optical circuit including at least the optical encoder 1030 and optionally further optical encoders. Optical circuits operate on each input stream of light before it enters an optical Fourier transform stage, applications of such optical circuits are described herein.

[0128] The input streams (and later output streams and intermediate streams) described herein can be described as streams of light, or optical signals. In an embodiment, the streams are transmitted by waveguides. As used herein, the term "waveguide" refers to an optical (i.e., photonic) waveguide, such as an optical fiber. The light in the streams is monochromatic and coherent both within each input stream and between input streams.

[0129] Because the value of the first complex element encoded in each input stream differs between the input streams, the value of the input function varies with the position of the input port in the first array due to variation of the input function in the x and / or y directions.

[0130] Two variables can be used to define or approximate each of the input and output functions: (i) the relative position (e.g., xy position) of the port within the array, and (ii) the complex value encoded into the stream of light passing through (e.g., entering or exiting) the port. It can thus be understood that the input and output functions are each sampled versions of continuous functions, with the sampling resolution being determined by the aperture size of the port and / or the spacing or pitch of the ports.

[0131] Temporal variations in the input streams can also be applied by varying over time the value of the first complex element encoded in each input stream. The input streams may be continuous (always on, or on for multiple cycles of a clock signal). Alternatively, the input streams may be pulsed (intermittently on and off, optionally synchronized with a clock signal). The value of the first complex element encoded in the input streams may vary from clock cycle to clock cycle, such that multiple optical Fourier transforms can be performed successively per frame.

[0132] The waveguides carrying the individual input streams may be split and recombined in a variety of ways depending on the type of encoder used to encode the first complex elements and the type of optical circuitry used to perform computations on the first complex elements, as described in more detail herein.

[0133] Outcoupling from the waveguide to the optical Fourier transform stage (i.e., OFTC or free-space optical element, depending on the type of OFT stage), and vice versa, can be performed using a grating coupler device, or alternatively using a fiber bundle coupled to the OFT stage using an edge coupler.

[0134] The first array of input ports will now be described in more detail, but this description is also applicable to the second array of output ports, as well as the third array of intermediate output ports and the fourth array of intermediate input ports described herein. The terms "array" and "port" are temporarily used as general substitutes for the aforementioned features.

[0135] The ports are sometimes described as pixels, and the waveguides carrying the respective streams are sometimes called "channels". In embodiments, the arrays of ports described herein are 1D or 2D arrays. The arrays may be arranged on a line (1D), a plane (2D), a curve (1D) or other type of spline (1D), or a curved surface (2D) or other type of surface (2D), depending on the type of optical Fourier transform stage used. For example, when the optical Fourier transform is performed with an integrated OFTC device, the array is typically, but not always, a 1D array arranged on a curve. Conversely, when using a free-space optical Fourier transform stage with a Fourier transform lens, the array can be arranged on a plane facing the Fourier transform lens. The arrays can take the form of one- or two-dimensional patterns, such as a regular rectangular array of regular port rows and orthogonal port columns, or a staggered array, in which adjacent port columns are offset from each other in the column direction, and the port columns are formed in an oblique direction relative to the column direction.

[0136] The array faces a Fourier transform lens, with the input port positioned to illuminate the Fourier transform lens and the output port positioned to collect light that has passed through the Fourier transform lens. The input port is positioned one focal point behind the Fourier transform lens and the output port is positioned one focal point in front of the Fourier transform lens. It is understood that the input port is positioned to provide an optical input to an optical Fourier transform stage and the output port is positioned to sample the optical output of the optical Fourier transform stage. The optical Fourier transform stage optically Fourier transforms the optical input to provide an optical output.

[0137] Returning to FIG. 10a, the optical device includes an array of output ports 1008, each connected via an output waveguide 1065 to an optical amplifier 1080, which is further connected to a detector (or decoder) 1090. Each optical amplifier 1080 is arranged to amplify a respective output stream. In FIG. 10a, the optical amplifiers 1080 are semiconductor optical amplifiers (SOAs). However, embodiments are not so limited and other types of optical amplifiers may be used. Alternatively, no optical amplifiers are used.

[0138] The detectors (or decoders) 1090 are arranged to detect (or decode) the second complex elements encoded in each output stream collected by the output ports 1008. In Fig. 10a, the decoder shown in Fig. 8b is shown as an example, which utilizes two balanced detectors with 90 degree optical hybrids to detect the complete complex numbers from the output streams. However, each of the decoders 1090 may include any of the decoders described with reference to Fig. 8a or Fig. 8b or other types of decoders arranged to decode the complex elements from the optical signals. The decoders may include one or more of the circuits described with reference to Figs. 19, 20, 21 and 22.

[0139] The decoder 1090 is arranged to decode a second complex element from each output stream based on at least one characteristic of the respective output stream. The value of the at least one characteristic is detected by the decoder and converted into a form representative of the second complex element. In an embodiment, the at least one characteristic is a phase and / or an amplitude of the output stream, the value of said phase and / or amplitude being equal to or correlated with the value of the second complex element. The phase may be relative to the phase of the input stream.

[0140] In another example, the optical Fourier transform stage consists of a single 2f stage (two focal length OFT) that is used to calculate the OFT of an input function and obtain the Fourier transform of the input function as an output function. A complex function g is encoded into the input stream. The OFT of the input function is performed using the optical Fourier transform stage. The OFT light is recombined into an output port and returned to the waveguide that channels the output stream for decoding. As with all 2f stages described herein, the OFT stage can include a free space optical module as shown in Figures 9a and 9b, or an OFTC as shown in Figure 9d.

[0141] Figure 10b shows an application of the optical device of Figure 10a. In Figure 10b, a first complex element is coded into the input stream to create an input function g that is displayed in a first array at the input to OFT stage 1001, a 2f stage. An optical Fourier transform is performed using optical Fourier transform stage 1001 to generate an output function G = F(g) in the Fourier plane (the plane where the output ports are). The output function G = F(g) is the Fourier transform of the input function g. If the input function is itself the product of two Fourier transforms g = F(x) * F(y), then the output of the Fourier transform is the convolution of the input functions x and y.

[0142] Mathematical operations and the optical Fourier transform A first complex element encoded into the input stream may be subject to a mathematical operation before the input stream leaves the input port. For example, the first complex element may be multiplied by or added to an additional complex element to encode a third complex element into the input stream, the third complex element being the result of the mathematical operation. The mathematical operation may be implemented by encoding the complex element into the input stream using one or more encoders. The one or more encoders are said to form an optical circuit.

[0143] In general terms, the optical device further comprises a plurality of first optical circuits, each first optical circuit arranged to operate on a corresponding one of the input streams to perform an arithmetic operation on a corresponding coded first complex element, thereby coding the input stream with a third complex element, and an input function is definable based on the value of the third complex element instead of the value of the first complex element and the position of the corresponding input port in the first array.

[0144] In general terms, each first optical circuit is a multiplication circuit arranged to operate on the input stream to multiply the first complex element by an additional complex element in turn to encode the input stream with a third complex element. In other embodiments, each first optical circuit is an addition circuit arranged to operate on the input stream to add the additional complex element to the first complex element in turn to encode the input stream with a third complex element.

[0145] In an embodiment, the optical circuit is any of the optical circuits described with reference to Figures 7a and 7b. For example, the multiplication circuit may be of the type described with reference to Figure 7a, with the first encoder 711 arranged to code a first complex element and the second encoder 712 arranged to code an additional complex element, and the output stream from the multiplication circuit is coded with a third complex element, which is the product of the first complex element and the additional complex element. The summation circuit may be of the type described with reference to Figure 7b, with the first encoder 713 arranged to code a first complex element and the second encoder 714 arranged to code an additional complex element, and the output stream from the summation circuit is coded with a third complex element, which is the sum of the first complex element and the additional complex element.

[0146] Generally speaking, in the first mode of operation, the value of the additional complex element is such that the third complex element is equal to the first complex element, and in the second mode of operation, the value of the additional complex element is such that the third complex element is not equal to the first complex element.

[0147] The first mode of operation described above is achieved by setting the value of the sum complex element in the multiplication circuit to one (ie, unity) and in the multiplication circuit to zero.

[0148] OFT stage for performing 2f convolution A single 2f optical Fourier transform stage (hereinafter referred to as "2f stage") can perform the same function (i.e., convolution) as a 4f optical Fourier transform stage by performing two successive OFT operations as follows.

[0149] In an initial operation, the 2f stage is set to a first mode of operation as described above. The additional complex elements are set as described above for the first mode of operation such that the input function to the 2f stage is defined by the values ​​of the first complex elements in the first array. The 2f stage then performs an optical Fourier transform of the input function and outputs a first output function to a second array of output ports. The second complex elements are decoded from the output stream as described herein. An intermediate stage can then be performed that determines the output function from the output stream and the positions of the corresponding output ports.

[0150] In the second operation, the value of each additional complex element applied to the optical circuit is set to be equal to the value of a second complex element decoded from the output stream generated in the first mode of operation. In other words, in the first mode of operation the output function is sampled, and in the second mode of operation the resulting output function is fed back to the optical circuit in the form of an additional complex element. This can be implemented for each of the input streams by configuring an encoder that encodes the additional complex element and applying this encoder to the optical circuit together with an encoder arranged to encode the first complex element. As a result, the optical circuit effectively multiplies the first complex element by the additional complex element such that the input stream is encoded with a third complex element.

[0151] Continuing in the second mode of operation, the 2f stage performs another optical Fourier transform of the input function, this time defined by the value of a third complex element and the corresponding position of the input port in the array. The output function is sampled in the second mode of operation by decoding the complex elements from the output stream.

[0152] This method, which involves two successive measurements using the same 2f stage, effectively provides the same results as a single measurement using a 4f stage in which an additional complex element is applied to the optical circuitry located between the two 2f stages that make up the 4f stage. Such a 4f stage is now described.

[0153] 4fOFT stage for performing convolution In general terms, said optical Fourier transform stage is a 4f stage consisting of a first 2f stage and a second 2f stage, the input port is arranged to provide an optical input as an input to the first 2f stage and each of the output ports is arranged to receive a portion of the output of the second 2f stage as said portion of the output of the optical Fourier transform stage.

[0154] Thus, the input port to the optical Fourier transform stage described above is part of a first 2f stage, and the output port of the optical Fourier transform stage described above is part of a second 2f stage.

[0155] Continuing in general terms, the 4f stage further comprises a plurality of intermediate output ports arranged in a third array, each intermediate output port being arranged to receive a portion of the output of the first 2f stage, thereby forming a first intermediate stream coded with a fourth complex element. The 4f stage comprises a plurality of second optical circuits, each second optical circuit being arranged to operate on the intermediate stream to perform an arithmetic operation on the fourth complex element, thereby coding the intermediate stream with a fifth complex element. The 4f stage also comprises a plurality of intermediate input ports arranged in a fourth array, each intermediate input port being arranged to receive a corresponding one of the intermediate streams, thereby forming a definable intermediate function based on the value of the fifth complex element and the position of the corresponding intermediate input port in the fourth array. The intermediate input ports are arranged to provide an optical input to the second 2f stage.

[0156] The intermediate output ports are arranged in the output plane of the first 2f stage such that an intermediate output function, which is a Fourier transform of the aforementioned input function, is sampled by the intermediate output ports, the intermediate output function being definable based on the value of the fourth complex element coded in the intermediate stream and the position of the corresponding intermediate output port in the third array.

[0157] The intermediate input port is disposed on the input face of the second 2f stage such that an intermediate input function is input to the second 2f stage, the intermediate input function being definable based on the value of the fifth complex element coded in the intermediate stream and the position of the corresponding intermediate input port in the fourth array.

[0158] Figure 11 shows an example of a 4f circuit embodying the principles of the 4f stage described above. The 4f stage is composed of a first 2f stage 1001a and a second 2f stage 1001b. The input to the first 2f stage 1001a and the output from the second 2f stage 1001b are structurally as described for the input and output of the optical Fourier transform stage described with reference to Figure 10a, respectively, and therefore a detailed description of identical components will be omitted here, except that the encoder referred to in Figure 10a is labelled "first encoder" 1030a with reference to Figure 11.

[0159] 11 shows a number of intermediate output ports 1006 arranged in a third array. Each intermediate output port is arranged to receive a portion of the output of the first 2f stage, thereby forming a first intermediate stream in an intermediate waveguide 1045, the intermediate stream being coded with a fourth complex element. The 4f stage consists of a number of second encoders 1030b, each of which is arranged to operate on the intermediate stream to perform an arithmetic operation on the fourth complex element, thereby coding the intermediate stream with a fifth complex element.

[0160] Each second encoder 1030b is arranged to encode an additional complex element in the light stream. If the operation is multiplication, each second encoder 1030b is simply arranged "in-line" (or in series) in the optical waveguide carrying the intermediate stream. Thus, the optical circuit described above in the general description of the 4f stage is simply composed of the second encoder and no other encoders (in other words, each optical circuit is replaced by a second encoder).

[0161] 12 also comprises a plurality of intermediate input ports 1007 arranged in a fourth array, each intermediate input port arranged to be fed with a corresponding one of the intermediate streams (or the other stream coded with the fifth complex element, e.g. the intermediate stream combined with the separate stream in the case of addition), thereby forming an intermediate function definable based on the value of the fifth complex element and the position of the corresponding intermediate input port 1007 in the fourth array. The intermediate input ports 1007 are arranged to provide an optical input to the second 2f stage 1001b.

[0162] In some embodiments, each second encoder is arranged to operate on the intermediate stream to multiply the fourth complex element by an additional complex element in order to code the intermediate stream with a fifth complex element.

[0163] FIG. 12 is a schematic diagram showing a complex mathematical function represented by a 4f stage consisting of a first and a second 2f stage 1001a, 1001b described with reference to FIG. 11. In FIG. 12, a convolution is performed using a 4f stage, where first, the OFT of a function g is optically calculated, the OFT being an intermediate output function G=F(g). The OFT result (G) is then optically multiplied with another function H=F(h) pre-calculated (optionally retrieved from memory). This produces an intermediate input function G*H. The convolution g*h is calculated after the OFT of the product of the multiplication GH. With this method, the signal processing remains in the optical / photonic domain. However, a pre-processed OFT multiplication function H (also referred to herein as an additional function) is required.

[0164] More specifically, with reference to Figures 11 and 12, an input function g to the first 2f stage can be defined based on the value of the first complex element coded into the input stream and the corresponding position of the input port 1005 in the first array. The first 2f stage 1001a performs an optical Fourier transform of the input function to form an intermediate output function G = F(g). The intermediate output function G = F(g) can be defined based on the value of the fourth complex element coded into the intermediate stream and the corresponding position of the intermediate output port 1006 of the third array. The intermediate output function is then multiplied by an additional function H = F(h) that is applied to the intermediate stream. This can be done by using the second encoder 1030b to code an additional complex element into the intermediate stream, which is itself already coded with the fourth complex element. As described above, this results in a fifth complex element being coded into the intermediate stream when it reaches the intermediate input port 1007 that provides the input to the second 2f stage. The additional function H=F(h) can be defined based on the value of the additional complex element and the position of the intermediate output port 1007 corresponding to the intermediate stream into which the additional complex element is coded. The result of the multiplication of the intermediate output function G=F(g) and the additional function H=F(h) is the intermediate input function JPEG2025508560000147.jpg37. Intermediate input function JPEG2025508560000148.jpg37 can be defined based on the value of the fifth complex element and the position of the corresponding intermediate input port 1007 in the fourth array. The second 2f stage then calculates the intermediate input function JPEG2025508560000149.jpg37 and providing an output function g*h (the convolution of g and h), which is definable based on the values ​​of the second complex elements coded into the output stream and the corresponding positions of the output ports 1008 of the second array.

[0165] Another method of optically computing the convolution of two functions g*h is shown in FIG. 13. FIG. 13 shows a method of convolution using a modular rearrangement of a first 2f stage 1301a, a second 2f stage 1301c, and a third 2f stage 1301b. Each of the first, second, and third stages may be of the form described with reference to FIG. 10a. The first and second 2f stages are used to optically compute the OFT of the first input functions g and a and the second input function h to provide a first intermediate output function G=F(g) and a second intermediate output function H=F(h), respectively. The results are multiplied electronically (e.g., using a feedforward circuit) to obtain the intermediate function i=G·H. The multiplied electronic result is encoded into the optical domain and then inverse Fourier transformed using the third 2f stage to obtain the convolution. JPEG2025508560000150.jpg423 is computed. Using this approach, although an electronic multiplication stage is used, the OFTs of both functions are computed during run-time, i.e. functions g and h can be received and processed simultaneously, speeding up operation and eliminating the need to store / retrieve previously computed values ​​of H, in contrast to the process described with reference to FIG. 12.

[0166] All functions described herein are mathematical functions defined by complex elements. The output functions may be defined by full complex numbers (and therefore may be referred to as complex output functions). If the coded complex elements are full complex numbers, the input functions may be complex functions. If the coded complex elements are components of complex numbers, the input functions may be real functions.

[0167] III - Controller Correction of phase effects and photonic device properties More sophisticated forms of optical computing systems capable of performing complex operations are described. As discussed above, the inventors have determined that sophisticated optical computing systems such as those disclosed herein are subject to phase effects that do not adversely affect less sophisticated optical computing devices. More specifically, the photonic devices of the disclosed optical computing systems are subject to so-called "phase drift" as a result of environmental factors, such as temperature. This phase drift affects the behavior of the light that the photonic devices use to perform operations or arithmetic. More specifically, since the presently disclosed systems utilize the phase of light to encode complex numbers, phase drift in the photonic devices affects this process and thus the associated calculations. The inventors have therefore devised mechanisms to compensate for such phase effects to enable reliable and accurate calculations. These mechanisms are now described in detail with respect to Figures 14-22.

[0168] Turning first to FIG. 14, an example of a system for correcting phase effects such as phase drift of a photonic device in an optical computing system is shown in schematic form. An example chiplet is shown including at least four schematic building blocks 1401, 1402, 1403, 1404. The chiplet's digital backend 1401 is comprised of a set of driver electronics, digital backend logic, and digital interconnects, enabling data exchange to and from the chiplet. In practice, data is typically received from a data bus of a digital computing element. Connected to the chiplet's digital backend 1401 is a controller 1402 of the chiplet's optical encoder. The controller 1402 may alternatively be referred to as an optical driver or an encoder driver. The controller 1402 enables data streaming through the chiplet and provides signals to a photonic device within the chiplet's photonic integrated circuit (PIC) 1403. The PIC 1403 is connected to the optical encoder's controller 1402 and consists of at least one photonic device (optical element) that allows performing optical operations, optical Fourier transforms (OFTs), and convolutions on complex mathematical elements or numbers.

[0169] It will be appreciated that the controller 1402 may be included as part of any of the encoders in the arrangements described with reference to any of Figures 3a-6d (successively and inclusive). Similarly, the PIC 1403 may be any of the PICs or optical devices described with reference to Figures 9a-13 (successively and inclusive). The controller 1402 may take the form of any of the controllers described with reference to Figures 15, 16 or 17.

[0170] The feedback 1404 from the PIC 1403 is fed back to the controller 1402 of the optical encoder. In this example, the feedback 1404 provides the controller 1402 with an offset voltage set by the feedback logic. The feedback signal 1404 may be used to modify the signal provided from the controller 1402 to the PIC 1403 in a manner described in more detail below. If this occurs periodically or continuously, the arrangement of FIG. 14 may thereby form a continuous or periodic feedback loop. The operation of the PIC 1403 is controlled with a dedicated state machine that, in this example, controls, monitors, and optimizes the electronic control of the photonic devices within the PIC 1403 to maximize efficiency, reduce data latency, and improve throughput. To this end, the PIC 1403 is hybridized or co-integrated with the digital backend 1401 via the controller 1402. The feedback signal provided by the feedback 1404 from the PIC allows the system to maximize the performance of the multi-bit operation of the photonic devices.

[0171] With this generalized overview in mind, a more complete example embodiment of the optical encoder controller 1402 will now be described.

[0172] Figures 15 and 16 provide first and second exemplary embodiments showing signal flow through components of an optical encoder controller 1402. Figures 15 and 16 are shown coupled for ease of understanding and to show which common components (e.g., power management and feedback logic modules) provide signals to which components in each embodiment. However, it will be understood that the coupling of the two arrangements is merely schematic and that in practice one or the other arrangement may be provided separately.

[0173] In both the arrangements of Fig. 15 and Fig. 16, each photonic device is provided with a signal via an optical encoder. For simplicity, only a single optical encoder is described in connection with Fig. 15 and Fig. 16, but there may be multiple optical encoders. The optical encoder is comprised of an encoder driver that receives an electronic input signal from an interface, where the value of the electronic signal is based on complex elements. The optical encoder in this example is comprised of at least one buffer, more specifically at least one FIFO (First-In-First-Out) that formats and organizes the data. The interface may be comprised of a digital input and output (DIDO) board or module. The received electronic signal may be a multi-bit signal or a bit stream of data from the interface, more specifically from the data back-end logic of the digital back-end 1401.

[0174] Within the optical encoder, the received electronic signal is split into two components, a first signal component and a second signal component, in the embodiment of Fig. 15 and Fig. 16. The second signal component is an inverted version of the first signal component, providing a push-pull signal. Thus, the received electronic signal may be modified or inverted in some way before being output to the photonic device or before being fed to the photonic device. Fig. 15 and Fig. 16 show two exemplary embodiments of how the received electronic signal may be split and inverted and fed to the photonic device. Fig. 15 shows an embodiment using a push-pull amplifier configured to invert the second signal component in the analog domain, and Fig. 16 shows an embodiment using an inverter configured to invert the second signal component in the digital domain. When the second signal component is inverted in the digital domain, i.e. when the arrangement of Fig. 16 is used, the circuit may be advantageously simplified since no additional circuit components are required when inverting the signal in the analog domain. In this example, one signal component is fed to each of the two contacts of the photonic device. For example, a first signal component may be provided to a first photonic device contact and a second signal component may be provided to a second photonic device contact (where the first and second photonic device contacts are contacts of the same photonic device). In other examples, this may be different. For example, in other embodiments, the first signal may be provided to the first photonic device contact and the second photonic device contact may be connected to a ground or reference voltage line.

[0175] Now looking at Figure 15 in more detail, in this example arrangement, the electronic signal received from the FIFO is a digital electronic signal and is stored in the digital buffer. The received electronic signal is output from the digital buffer to a digital-to-analog converter (DAC), which converts the received electronic signal to an analog electronic signal. The output of the DAC is AC-coupled to adjust the DC offset of the analog electronic signal. In other words, the received digital electronic signal is finally converted to an AC-coupled analog electronic signal. The DAC may be accompanied by a sample-and-hold circuit that captures and holds the analog signal until the next circuit, more specifically the VGA, is ready to process that signal. The sample-and-hold circuit holds the value and only changes the output value when new data is retrieved from the FIFO.

[0176] The controller 1402 in this example is configured to amplify the received electronic signal using a variable gain amplifier (VGA). However, it can be understood that a VGA may or may not be included depending on the voltage range supported by the DAC. The received electronic signal is output from the VGA and split into a first signal component and a second signal component. Splitting the electronic signal in this manner forms a push-pull signal. The second signal component is inverted using a push-pull amplifier, such that the second signal component is an inverted version of the first signal component. In this example, the push-pull amplifier is configured to invert the second signal component in the analog domain because the push-pull amplifier can drive two output levels. This means that signal inversion is possible. However, the push-pull amplifier may cause removal of AC coupling or addition of DC artifacts. Therefore, if AC coupling of the second signal component is required, the second signal component may be adjusted (or balanced) to balance.

[0177] Voltage V BALto the controller 1402 to adjust for such balancing, in other words, the DC offset, DC artifacts, and / or lack of AC coupling of the second signal component. This adjustment is designated as "balancing" in FIG. 15 and is represented by a tuning signal consisting of V BAL The provision of the conditioned signal is shown in FIG. 17. In this way, the second signal component is derived from the received conditioned signal V BAL to generate a modified second signal component. The conditioned signal may comprise an average voltage of the desired peak-to-peak swing voltage.

[0178] This V BAL The adjustment of V depends on the voltage swing required by the controller 1402 in this example arrangement and can be set, for example, by firmware implemented by the power management logic as shown diagrammatically in Figure 15. Advantageously, the firmware can be configured to take into account the type of photonic device to which the controller 1402 is connected. This can be achieved by adjusting the V BAL In other words, the adjustment signal V BAL can depend on the type of photonic device used in the optical encoder, and thus the controller can be adapted to the type of photonic device.

[0179] The controller 1402 may further be configured to modify the received electronic signal to compensate for a phase shift induced by a push-pull amplifier of the optical encoder. Such an adjustment is shown in FIG. 15 and designated as a "center adjustment." In this embodiment, the first and second signal components of the electronic signal are adjusted to compensate for a phase shift imparted to the AC-coupled analog electronic signal by active components in the circuit, such as a push-pull amplifier. An analog delay line may be used to align the phase of the signals.

[0180] To allow such tuning, the dynamic operating range of the photonic device, V, is limited as shown in Figure 17. CENTREThe instruction is received by the controller 1402. The received electronic signal is then converted into a dynamic operating range V CENTRE This process is sometimes called "centering" the signal. BAL As with the dynamic operating range V CENTRE The indication of can be set by firmware that can be configured to take into account the type of photonic device to which the controller 1402 is connected, as described above. In other words, the adjustment signal V CENTRE can depend on the type of photonic device used in the optical encoder. Furthermore, since the received electronic signal is split into two components, the centering correction performed in this embodiment consists of adjusting the first and second signal components such that their swing voltages span the dynamic operating range of the photonic device and such that the signal-to-noise ratio and bit precision / accuracy specifications outlined for the photonic device are met.

[0181] As mentioned above, the regulation signal V BAL and dynamic operating range V CENTRE The indication of can be provided by firmware that can take into account the type of photonic device that the optical encoder uses. For example, different photonic devices may require different dynamic voltage ranges to function properly. BAL and dynamic operating range V CENTRE , such changes to the dynamic voltage range when providing an input signal to the photonic device can be made. As a result, the same controller 1402 can be used for a variety of different photonic devices. When a new photonic device is used, the firmware of the controller 1402 can simply be updated to change V accordingly. BAL and V CENTREThis eliminates the need to use different types of controllers 1402 for different types of photonic devices or to design multiple controller circuits for each specific photonic device. Typically, the adjustment signal V BAL and dynamic operating range V CENTRE can be set by a power management block running the aforementioned firmware, which controls the voltage lines of the circuit(s) of the controller 1402. This is shown diagrammatically in FIG.

[0182] Returning to FIG. 15, a final adjustment is shown, called "offset adjustment." This adjustment involves the controller 1402 receiving a feedback signal that is based on a phase drift associated with the photonic device of the optical encoder. In response to this feedback signal, the controller 1402 modifies the received electronic signal based on the received feedback signal to generate a modified electronic signal (which may be referred to as an offset adjustment) and provides the modified electronic signal to modulate the photonic device. The feedback signal is coupled to an offset voltage V provided via or by feedback logic, as shown in FIG. OFFSET In this embodiment where the electronic signal is split into two components, the received electronic signal is modified by adjusting the first and second signal components to offset the phase drift associated with the photonic device.

[0183] The adjustment processes described above (designated as balance adjustment, center adjustment, and offset adjustment) may be implemented as a feedback loop. In particular, as shown in FIG. 14, a signal may be output from the controller 1402 to the photonic device. The effect of that signal on the photonic device may then be evaluated through monitoring of the photonic device. Based on this monitoring, the system may determine (e.g., via firmware operational feedback and / or power management logic) that an adjustment is required. This adjustment is made through the balance adjustment, center adjustment, and offset adjustment described above to generate a modified signal. This cyclic feedback loop may then be repeated such that each feedback signal received by the controller 1402 is based on the effect of a modified electronic signal previously provided by the controller 1402 to the photonic device. This results in the feedback loop shown diagrammatically in FIG. 14. In practice, it will be appreciated that the balance adjustment signal, center adjustment signal, and offset adjustment signal may each be provided in the form of a respective input voltage to the circuitry of the controller 1402, as shown in FIG. 17.

[0184] Turning now to Figure 16, an alternative arrangement of how the optical encoder controller 1402 may be implemented is shown. The flow of Figure 16 is similar in many ways to the flow of Figure 15, but there are some notable differences.

[0185] In Figure 16, the received electronic signal from the FIFO is a digital electronic signal, which is again split into a first and a second signal component. Splitting the signal forms a push-pull signal. As with the arrangement of Figure 15, the second signal component is inverted, in this case an inverter, so that the second signal component is an inverted version of the first signal component. However, unlike the arrangement of Figure 15, in Figure 16 both the splitting and the inversion of the signal are performed in the digital domain. The inverter in this example is a digital inverter. As a result of the inversion being performed in the digital domain, in contrast to the arrangement of Figure 15, no balancing adjustments need to be made. Thus, since the received electronic signal is still a digital electronic signal, no balancing signal is required. VBAL is not required. This simplifies the circuitry of the controller 1402 compared to the push-pull amplifier embodiment of FIG.

[0186] After inversion, in the arrangement of FIG. 16, the first and second signal components are propagated to two digital buffers. Each of the digital buffers outputs either the first or second signal component to one of two DACs to convert the first and second signal components of the received electronic signal into an analog electronic signal. Each of the DACs may be accompanied by a sample-and-hold circuit that captures and holds the analog signal until the next circuit, more specifically the VGA, is ready to process the analog signal. The sample-and-hold circuit holds the value and only changes the output value when new data is retrieved from the FIFO. As in FIG. 15, the controller 1402 in this example is then configured to amplify the received electronic signal using a variable gain amplifier (VGA).

[0187] Also similar to the arrangement of Figure 15, the received electronic signal is output and subjected to a centering procedure so as to be AC-coupled to adjust for the DC offset of the analog electronic signal. In other words, the first and second signal components of the digital electronic signal are converted to AC-coupled analog electronic signals as described above in relation to Figure 15.

[0188] As mentioned above, the dynamic operating range of a photonic device, VCENTRE The received electronic signal is indicative of a received dynamic operating range V CENTRE The dynamic operating range V CENTRE The indication of VCENTRE is set by firmware that depends on the connected photonic device. Furthermore, when the received electronic signal is split, the received electronic signal is modified by adjusting the first and second signal components such that its swing voltage spans the dynamic operating range of the photonic device. The indication of the dynamic operating range VCENTRE can be set by the power management block, allowing the circuit to be reused for a variety of different photonic devices instead of using a different circuit for each photonic device, as described with reference to FIG. 15.

[0189] 15, the signal then undergoes an offset adjustment in which the controller 1402 receives a feedback signal based on the phase drift associated with the photonic device of the optical encoder, modifies (or offset adjusts) the received electronic signal based on the received feedback signal to generate a modified electronic signal, and provides the modified electronic signal to modulate the photonic device. As described in connection with FIG. 15, the feedback signal is offset by an offset voltage V provided through or set by feedback logic, as shown in FIG. OFFSET is received as

[0190] In this embodiment, where the signal is split into two components, the received electronic signal is modified by adjusting the first and second signal components to offset the phase drift associated with the photonic device.

[0191] As described in connection with FIG. 15, the process of FIG. 16 may be performed as part of a feedback loop, where a previously corrected signal provided to the photonic device by the controller 1402 informs the next “loop” of corrections provided via center and offset adjustments.

[0192] Unlike driver circuits used in conventional data communications applications, the exemplary push-pull and data inversion optical encoder circuit used to implement the controller flow shown in FIGS. 15-16 uses a regulating signal V BAL and dynamic operating range V CENTRE The photonic device includes a photonic device having a photonic device voltage swing that spans its dynamic operating range, or in other words, a photonic device voltage swing that is centered around its dynamic operating range. This improves data level separation of the optical signal generated using the photonic device. Furthermore, phase drift is compensated for by modifying the received electronic signal based on a received feedback signal, the feedback signal being received as an offset voltage provided via feedback logic. The feedback logic also sets the amplification factor of the VGA.

[0193] Turning now to Figure 17, an example circuit for use in implementing the controller 1402 is shown. Such a circuit can be used to control and execute the signal flows shown generally in Figure 15. Various blocks are provided within the circuit to implement the functionality described above with reference to Figure 15. Resistors are designated R sub where the subscript "sub" indicates which functional block the resistor forms part of. Similarly, a capacitor is denoted as C sub The subscript "sub" indicates which functional block the capacitor is part of. The power supply voltage is V dd and V SS It is written as V dd is the positive supply voltage, V SS indicates a connection to the negative supply voltage or ground. The letters "d" and "s" stand for drain and source respectively. This means that the circuit presented is built using field effect transistors (FETs).

[0194] An input signal is received from a DAC as described in relation to Figure 15. This signal is then amplified by a VGA 1702. A split signal consisting of the first and second signal components then flows from the VGA 1702 onto two branches of the circuit.

[0195] As explained in relation to FIG. 15, both components can be adjusted by the Offset Adjust 1712 and Center Adjust 1710 blocks, and the adjustments are OFFSET Terminal and V CENTRE It is controlled by a signal supplied to the terminal.

[0196] V OFFSET The signal provided to can be set using feedback logic 1708 that sets an offset based on a feedback signal indicative of a phase drift experienced by a photonic device of the optical encoder. Offset adjustment 1712 can then modify the signal provided to the photonic device such that the modified input signal results in operating the photonic device in a manner that compensates for or corrects said phase drift. This ensures proper functioning of the photonic device and ultimately enables accurate and reliable computations.

[0197] V CENTRE The adjustment may be set by the power management logic 1706, which sets the center adjustment based on the type of photonic device connected to the optical encoder to which the output signal is to be supplied. This allows the center adjustment 1710 to adapt the signal supplied to the photonic device taking into account the particular requirements, characteristics and / or operation of the photonic device. If a new type of photonic device is connected to the controller 1402, the V CENTRE This avoids the need for separate, specific controllers for each type of photonic device, or for changing controllers wholesale when new types of photonic devices are connected.

[0198] As explained in relation to FIG. 15, one of the split signal components may be further subjected to push-pull and balancing correction. This is implemented in FIG. 17 through push-pull driver 1704 and balancing 1714. As explained in relation to FIG. 15, the balancing is performed at terminal V BAL As with center adjustment 1710, balance adjustment 1714 allows the control circuitry to adapt the signal provided to the photonic device taking into account the particular requirements, characteristics and operation of the photonic device.

[0199] After the various modifications mentioned above, the two components of the processed signal are finally fed to the terminals V of the photonic device. OUT1 , V OUT2 It will be appreciated that if more than one photonic device is provided, multiple copies of the circuit of Figure 17 may be provided, each supplying a terminal of a respective photonic device.

[0200] If the process flow of FIG. 16 is to be implemented rather than that of FIG. 15, the circuit of FIG. 17 can be provided with appropriate modifications. For example, the push-pull driver 1704 and balance adjuster 1714 may be omitted as they are not required in the process of FIG. 16. The circuit can be further modified by using two DACs with sample and hold and two VGAs 1702 instead of one. The output of the VGA is fed to the remainder of the control circuitry consisting of a center adjust 1710 and a balance adjust 1714, which then couples the two components of the processed signal to the terminals V of the photonic device. OUT1 , V OUT2 will be provided.

[0201] The optical encoder in this example is a mixed-signal circuit made up of different logic families: CMOS (Complementary Metal Oxide Semiconductor) logic for the digital data and TTL (Transistor-Transistor Logic) for the analog circuitry, therefore appropriate signal integrity blocks (pull-up / pull-down resistor networks) are used to ensure signal integrity is maintained within the circuit.

[0202] 18, a method of the present disclosure is shown generally as being capable of being implemented by a controller 1402 to provide input signals to a photonic device of a PIC 1403.

[0203] The method of FIG. 18 begins at block 1801 by receiving an electronic signal, the value of which is based on a complex element. As noted above, a "complex element" in this context may be understood to mean a complex number or a component of a complex number. A component of a complex number may be a real or imaginary part of a complex number, or may be based on a real or imaginary part of a complex number (e.g., a component may be a modulus of a real or imaginary part of a complex number, or a positive or negative value of a real or imaginary part of a complex number). In this manner, method E provides a mechanism by which controller 1402 may provide input signals to a photonic device that enable the photonic device to code and perform operations utilizing complex numbers or components thereof.

[0204] The method then proceeds at block 1802 by receiving a feedback signal based on a phase drift associated with a photonic device of the optical encoder. As discussed above, photonic devices such as the PIC 1403 experience phase drift due to environmental factors such as temperature. If not addressed, such phase drift may impair the ability of the photonic device to perform accurate and reliable calculations. The feedback signal received at block 1802 is configured to enable the controller 1402 to modify the electronic signals being processed to compensate for the phase drift experienced by the photonic device. The feedback signal may be set / provided via feedback logic that monitors the photonic device and quantifies or evaluates any phase drift experienced by the photonic device.

[0205] The method further includes, at block 1803, modifying the received electronic signal based on the received feedback signal to generate a modified electronic signal. This may include modifying a parameter of the received electronic signal such that when the modified electronic signal is provided to the photonic device, phase drift of the photonic device as indicated in the received feedback signal is compensated. In practice, the modification provided at block 1803 may be performed by adjusting the V in the manner described above in connection with FIGS. OFFSET This can be provided by providing a suitable offset signal to

[0206] The method then proceeds at block 1804 by providing a modified electronic signal to modulate the photonic device in a manner that compensates for or corrects the identified phase drift of the photonic device, thereby ensuring that such phase drift does not impair the ability of the photonic device to perform accurate and reliable computations.

[0207] The method of Fig. 18 may be implemented as a loop, as already described in relation to Fig. 14. In other words, a feedback signal may be continuously or periodically provided to the controller 1402, for example via feedback logic, so that the controller 1402 can continuously or periodically update the signal it is providing to the photonic device in order to continuously or periodically compensate for the phase drift experienced by the photonic device, thereby ensuring continued reliability of the calculations.

[0208] It will be appreciated that the method of FIG. 18 may include additional blocks, particularly to compensate for or adjust for other factors such as the type of photonic device used in the optical encoder.

[0209] The method may include splitting a received electronic signal into a first signal component and a second signal component. The second signal component may be an inverted version of the first signal component. The method may include inverting the second signal component of the split signal in the digital or analog domain in a manner as described above.

[0210] The method may include receiving an adjustment signal to correct a DC offset on the second signal component, and modifying the second signal component based on the received adjustment signal to generate a modified second signal component.

[0211] The method may include modifying the received electronic signal by adjusting the first and second signal components to offset a phase drift associated with the photonic device.The method may include modifying the received electronic signal by adjusting the first and second signal components such that a swing voltage spans a dynamic operating range of the photonic device.

[0212] The method may include receiving an indication of a dynamic operating range of the photonic device, and modifying the received electronic signal based on the received indication of the dynamic operating range.

[0213] The method may include amplifying the received electronic signal. The received electronic signal may be a digital electronic signal. The method may include converting the received (digital) electronic signal to an analog electronic signal using a digital-to-analog converter (DAC).

[0214] The method may include AC coupling the analog electronic signal to adjust for a DC offset in the analog electronic signal.

[0215] The method may include modifying the received electronic signal to compensate for a phase shift induced by a push-pull amplifier of the optical encoder.

[0216] Providing 1804 the modified electronic signal may include providing a first portion of the modified electronic signal, the first portion being fast moving. Providing 1804 the modified electronic signal may include providing a second portion of the modified electronic signal, the second portion being slow moving. In this context, a "fast moving" signal refers to an AC data signal. In this context, a "slow moving" signal refers to a slow moving DC signal. The slow moving component of the circuit may generally include a DC component.

[0217] Modifying 1803 the received electronic signal may include generating a second portion of the modified electronic signal. The received electronic signal may be a multi-bit signal. The received electronic signal may be received via an interface and at least one buffer. The interface may be comprised of a digital input / output board.

[0218] Figures 19 and 20 provide first and second exemplary embodiments showing the signal flow through the components of the controller of the optical decoder. The optical decoder referred to herein may include any previously described optical decoder 850 and detector (or decoder) 1090 described with reference to Figures 8a or 8b. The optical detector referred to herein may consist of any previously described optical detector 804.

[0219] In both the arrangements of Fig. 19 and Fig. 20, the optical decoder receives an optical signal from the optical device. For example, the optical signal can be an output stream received at any output port of the OFT optical device described above. The two exemplary embodiments are arranged to decode the sign and absolute value of the complex elements, e.g., components of a complex number, from the respective output streams based on at least one characteristic of the respective output streams. In an embodiment, the differential photocurrent from the balanced photodiode is converted into an electronic signal, more specifically, a digital electronic signal or digital data consisting of one bit (or sign bit) for the sign (or polarity) of the real and / or imaginary parts and a multi-bit signal (or multi-bit word) for the absolute value (or modulus or absolute value) of the real and / or imaginary parts. The digital electronic signal is also called a binary number. In a binary number, the leftmost bit is called the most significant bit and the rightmost bit is called the least significant bit. The sign bit is generally the most significant bit of a binary number.

[0220] This circuitry may be implemented using a single-ended or differential ADC. FIG. 19 illustrates an embodiment in which the analog electronic signal is split into a third and a fourth component. The single-ended ADC is configured to convert the fourth component into a modulus of a digital electronic signal, and the remaining circuitry is configured to convert the third component into a sign bit of a digital signal. Meanwhile, FIG. 20 illustrates an embodiment using a differential ADC configured to convert the analog electronic signal into a sign bit of a digital electronic signal and a modulus of a digital electronic signal. The sign bit and modulus of the digital electronic signal represent the complex element encoded into the optical signal received at the photodetector.

[0221] In both embodiments, the received electronic signal provided from the balanced photodetector to the optical decoder is the difference of the photocurrents from each of the constituent photodetectors forming the balanced photodetector. This current is amplified and converted to a voltage signal using a transimpedance amplifier (TIA). If further gain in the voltage signal is required, a VGA amplifies the voltage signal. High gain improves the accuracy of the voltage signal and is useful when noise in the system is high. Following amplification by the TIA and VGA, the voltage signal (or analog electronic signal) is converted to a digital electronic signal using a different method in each embodiment of FIG. 19 and FIG. 20.

[0222] Looking more closely at Figure 19, after the voltage signal has been amplified if necessary, it is split into two analog components, a third component and a fourth component. The sign of the complex element is determined from the third component, and the modulus of the complex element is determined from the fourth component, thereby determining the complex element encoded in the optical signal received by the photodetector.

[0223] To determine the sign of the complex element, a comparator is connected to the reference line and the VGA to compare the voltage of the third component with a reference voltage. The reference voltage is fed to the comparator through the reference line and is set by the power management component. The comparator then outputs a modified third component that indicates which of the two voltages input to the comparator is greater. Since the comparator uses TTL logic, its output is a binary signal, more specifically, a TTL signal. The modified third component voltage signal is negative if the voltage of the third component is less than the reference voltage. For example, if the reference line is fed with a reference voltage equal to 0, the output of the comparator indicates that if the voltage of the third component is less than 0, the modified third component voltage signal is negative. The output of the comparator is converted from TTL logic to CMOS logic. A TTL CMOS pull-up takes the modified third component and converts it to a voltage level understood by CMOS logic. A TTL CMOS pull-up is essentially a resistor circuit that changes the voltage level of the received signal by connecting the unused input pin of a digital logic gate (such as a digital inverter) to a DC supply voltage, which holds the input voltage of the resistor circuit HIGH. The change in voltage level is necessary because the HIGH and LOW voltage (or current) values ​​are different in TTL logic and CMOS logic. By using CMOS logic, the power consumption can be kept very low. It is also possible for the comparator to use other logic families, in which case an appropriate matching network would be in place to convert the comparator output to CMOS logic, but in this embodiment the comparator uses TTL logic.

[0224] The digital logic gate in this embodiment is a digital inverter (or NOT gate), which realizes logical negation for CMOS conversion. Therefore, the modified third component is inverted by the digital inverter, and a bit (or sign bit) indicating the sign of the complex element is output. This is used because TTL CMOS pull-up circuits have a certain range of errors, so the output (sign bit) may be inaccurate. Therefore, the digital inverter ensures that the sign is correct. If logic level 1 is used to represent a negative number, the output of the digital inverter will be the sign bit. On the other hand, if logic level 0 represents a negative number, the output of the digital inverter is inverted again to determine the sign and output the sign bit.

[0225] In determining the modulus of the received signal, the fourth component is rectified using a rectifier circuit in the analog domain, which inverts the polarity of the negative portion of the fourth component. In this way, the absolute value of the fourth component can be tracked, as the rectifier circuit clips the signal so that there is no negative portion, leaving only the magnitude (or modulus or absolute value). In this embodiment, the fourth component undergoes full-wave rectification, which results in the negative portion being inverted to ensure single polarity. This allows the modulus of the signal to be extracted. The corrected fourth component is then fed into a single-ended ADC, which converts the corrected fourth component into a multi-bit word (which is a segment of a longer word that defines a complete complex number). The single-ended ADC is a unipolar device, so it covers the range from 0 to positive values. The output from the single-ended ADC indicates the modulus of the signal. Two instances of this circuit are used, one for the real terms and one for the imaginary terms, to make up the complete complex number.

[0226] The third and fourth components are then modified to output the code and modulus in the form of digital electronic signals. These signals are fed to separate digital buffers, which output the code bits or multi-bit words, respectively, to one of two FIFOs for storage. The code bits and multi-bit words may then be input as digital signals to any of the optical encoders described previously.

[0227] Looking now at FIG. 20 in more detail, in this example arrangement, after the voltage signal is amplified by the TIA and VGA components as described with respect to FIG. 19, the voltage signal is fed to a differential ADC. The differential ADC specifies a maximum (+) and minimum (-) voltage range. If the voltage signal fed to the differential ADC is within the specified voltage range, the output of the differential ADC is a digital electronic signal (or binary signal or digital number or binary signal or code). In an optical computing system designed to accommodate integer values ​​only, there is no need to realize the sign and modulus of the integer value, so the circuit stops here. The currently described system is capable of performing more advanced operations since the output of the differential ADC can be decoded by separating the sign bit and modulus of the number using signed output decoder logic. In this embodiment, the signed output decoder logic is provided in a binary output decoder that splits the signal into a (single) bit signal (the sign bit) and a multi-bit signal (a multi-bit word, which is a segment of a word that defines a complete complex number). The values ​​of the bit signal and the multibit signal respectively represent the sign and modulus of the complex number encoded into the optical signal received by the photodiode.

[0228] Figures 21 and 22 show detailed examples of the operation of a differential ADC and a binary output decoder. Figure 21 shows an embodiment where the differential ADC output is signed, and Figure 22 shows an embodiment where the differential ADC output is unsigned. In both embodiments, the differential ADC is supplied with a reference signal and a voltage signal from the preceding component in the decoder. The reference signal specifies the aforementioned voltage range of the differential ADC. As previously mentioned, the differential ADC output is a digital number. This digital number can be signed or unsigned.

[0229] FIG. 21 illustrates the operation of the Binary Output Decoder of FIG. 20 for the case where the digital number is signed. If the signed digital number is negative, the Binary Output Decoder sets the sign bit to negative, and if the signed digital number is not negative, the Binary Output Decoder sets the sign bit to positive. The sign bit of a signed digital number is the most significant bit. Thus, if the sign bit of a signed digital number is 0, the sign bit is negative, and if the sign bit of a signed digital number is 1, the sign bit is positive. The modulus of the signed digital number is realized from the remaining bits of the signed digital number as an absolute value (or absolute word, abs word) and set as the modulus of the signed digital number.

[0230] Figure 22 shows the operation of the Binary Output Decoder of Figure 20 when the digital number is unsigned. If the unsigned digital number is less than the code of 0 of the Differential ADC, the Binary Output Decoder sets the sign bit to negative, and if the unsigned digital number is greater than the code of 0 of the Differential ADC, the Binary Output Decoder sets the sign bit to positive. In the Binary Output Decoder, the input lines are either logic level 0 or 1. Furthermore, one output line is HIGH for logic 1, and the remaining output lines are held LOW for logic 0. The combination of these input lines determines which output line is held LOW for logic 0 and which output is held HIGH for logic 1. Since the code of "0" of the Differential ADC identifies this input line to be set to logic "0", the unsigned digital number determines which output line is "HIGH" for logic "1". In other words, the binary output that is HIGH when an unsigned digital number is input identifies the sign bit. In this embodiment, the first input of the binary output decoder (differential ADC) is 0 and the second input is set by the unsigned digital number. If the unsigned digital number is negative (i.e. logic level 0), the output line identifying the second input as logic 0 is HIGH at logic 1 and the sign bit is set as negative. On the other hand, if the unsigned digital number is positive (i.e. logic level 1), the output line identifying the second input as logic 1 is HIGH at logic 1 and the sign bit is set as positive. The code of 0 of the differential ADC is then subtracted from the unsigned digital number and the modulus of the signed digital number is realized as an absolute value (or absolute word or abs word) from the bits of the unsigned digital number that are set as the modulus of the unsigned digital number. In another embodiment, the logic can be reversed, i.e. 0 becomes 1 (HIGH becomes LOW) and vice versa. In this case, it is necessary to carry out the corresponding adjustments as will be understood by those skilled in the art.

[0231] The binary output decoder splits the signal into a fifth component (transmission code) and a sixth component (transmission modulus). The fifth and sixth components can be considered similar to the third and fourth components described with reference to FIG. 19 in that they respectively constitute a sign bit and a multi-bit word. These fifth and sixth components are each fed into a separate digital buffer. The digital buffer outputs the sign bit or the multi-bit word, respectively, for storage in one of two FIFOs. The values ​​of the sign bit and the multi-bit word respectively represent the sign and the magnitude (modulus) of the complex element coded into the optical signal received by the photodiode.

[0232] The described embodiments are provided for illustrative purposes and are not intended to be limiting. Various modifications to the embodiments can be made as will be appreciated by those skilled in the art. The present invention is defined by the appended claims.

Claims

1. It is a controller for an optical encoder, An electronic signal is received, and the value of the electronic signal is based on complex elements. The optical encoder receives a feedback signal based on phase drift related to the photonic device, Based on the received feedback signal, the received electronic signal is modified to generate a modified electronic signal. A controller configured to supply the modified electronic signal for modulating the photonic device.

2. The aforementioned feedback signal is received as an offset voltage provided via the feedback logic. The controller according to claim 1.

3. The received electronic signal is divided into a first signal component and a second signal component. The system is configured to generate the modified electronic signal by modifying the first signal component and / or the second signal component based on the received feedback signal. The controller according to claim 1 or 2.

4. The second signal component is an inverted version of the first signal component. The controller according to claim 3.

5. An adjustment signal is received to adjust the DC offset of the second signal component. Based on the received adjustment signal, the second signal component is modified, and the modified second signal component is generated. The controller according to claim 4.

6. The system further comprises a push-pull amplifier configured to invert the second signal component in the analog domain. The controller according to claim 4.

7. Further including an inverter configured to invert a second signal component in the digital domain, The controller according to claim 4.

8. The controller according to claim 3, configured to modify the received electronic signal by adjusting the first signal component and the second signal component in order to offset the phase drift associated with the photonic device.

9. The dynamic operating range of the photonic device is received, The received electronic signal is modified based on the received dynamic operating range indication. The controller according to claim 1.

10. Receiving an instruction indicating the dynamic operating range of the photonic device, The system is configured to modify the received electronic signal based on the received instruction indicating the dynamic operating range, The received electronic signal is modified by adjusting the first signal component and the second signal component so that their swing voltages extend within the dynamic operating range of the photonic device. The controller according to claim 3.

11. The received electronic signal is configured to be amplified, The controller according to claim 1.

12. The received electronic signal is a digital electronic signal. The aforementioned controller, A digital-to-analog converter (DAC) is used to convert the received electronic signal into an analog electronic signal. The controller according to claim 1.

13. It is configured to AC-couple an analog electronic signal and adjust the DC offset of the analog electronic signal. The controller according to claim 12.

14. The received electronic signal is configured to correct the phase shift induced by the push-pull amplifier of the optical encoder. The controller according to claim 1.

15. The modified electronic signal is supplied, A first portion of the modified electronic signal is supplied, and the first portion moves at high speed. A second portion of the modified electronic signal is supplied, and the second portion moves at a low speed. The controller according to claim 1.

16. The received feedback signal is further based on a modified electronic signal previously supplied to the photonic device by the controller. The controller according to claim 1.

17. The received electronic signal is a multi-bit signal. The controller according to claim 1.

18. The received electronic signal Interface and It is received via at least one buffer, The aforementioned interface consists of a digital input / output board. The controller according to claim 1.

19. The controller according to claim 1, The photonic device described in claim 1, The photonic device is a modulator configured to apply a first modulation element to an optical input signal based on the modified electronic signal, The first modulation element is operable to encode the complex element into the optical input signal and generate an encoded optical signal. Electronic-optical encoder.

20. Includes the electron-optical encoder or controller described in claim 1, Optical computer or optical computer chip.

21. A method performed by a controller of an optical encoder, wherein the method is An electronic signal is received, and the value of the electronic signal is based on complex elements. The optical encoder receives a feedback signal based on phase drift related to the photonic device, Based on the received feedback signal, the received electronic signal is modified to generate a modified electronic signal. To modulate the photonic device, the modified electronic signal is supplied. method.

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